Re: [PATCH 1/3] ahci: exynos: add ahci sata support on Exynos platform
On Tuesday, October 08, 2013 8:45 PM, Yuvaraj Kumar wrote: > On Fri, Oct 4, 2013 at 6:03 AM, Jingoo Han wrote: > > On Thursday, October 03, 2013 8:32 PM, Bartlomiej Zolnierkiewicz wrote: > >> On Tuesday, October 01, 2013 12:03:01 PM Yuvaraj Kumar C D wrote: > >> > Exynos5250 contains one Synopsys AHCI SATA controller.The avalaible > >> > ahci_platform driver is not sufficient to handle the AHCI PHY and PHY > >> > clock related initialization. > >> > > >> > This patch adds exynos specific ahci sata driver,contained the exynos > >> > specific initialized codes, re-use the generic ahci_platform driver, and > >> > keep the generic ahci_platform driver clean as much as possible. > >> > > >> > This patch depends on the below patch > >> > [1].drivers: phy: add generic PHY framework > >> > by Kishon Vijay Abraham I > >> > > >> > Signed-off-by: Yuvaraj Kumar C D > >> > --- > >> > drivers/ata/Kconfig |9 ++ > >> > drivers/ata/Makefile |1 + > >> > drivers/ata/ahci_exynos.c | 226 > >> > + > >> > 3 files changed, 236 insertions(+) > >> > create mode 100644 drivers/ata/ahci_exynos.c > >> > > > > > > > [.] > > > >> > + priv->phy = devm_phy_get(dev , "sata-phy"); > >> > + if (IS_ERR(priv->phy)) > >> > + return PTR_ERR(priv->phy); > > > > [.] > > > >> Also please take a look at the following patch: > >> > >> https://lkml.org/lkml/2013/9/19/173 > >> > >> it adds PHY support to ahci_platform driver, maybe it can be used > >> for your needs as well. > > > > I also agree with Bartlomiej Zolnierkiewicz's opinion. > > 'ahci_exynos.c' just calls PHY API, without any additional control > > for Exynos AHCI IP. > In addition to PHY handling,it also deals with the special clock > sclk_sata which is not dealt in ahci_platform.c(certainly exynos > specific). Handling the special clock 'sclk_sata' is another issue. Please, look at that other 'sclk_*'s are handled. Also, if possible, please add 'the code handling the special clock' to 'ahci_platform.c'. > > Morever there is a wrapper driver to handle the platform specific > things for the sata.Please refer the patch[1] > [1]ata: ti_sata: Add Texas Instruments SATA Wrapper driver > https://lkml.org/lkml/2013/9/19/166 As Roger Quadros mentioned, 'ti_sata' driver will be dropped. > [2]ahci_imx: add ahci sata support on imx platforms > 'ahci_imx' is necessary, because 'ahci_imx' controls some specific registers. However, 'ahci_exynos.c' does not control any registers. > I think, if we have platform specific driver like ahci_xxx.c , it > would be better to handle the sata PHY in ahci_xxx.c so that we can > retain and re-use the ahci_platform.c as it is. I think that the platform specific driver like ahci_xxx.c is not necessary, because 'ahci_exynos.c' does not control any special registers. Best regards, Jingoo Han > > Further comments will be much appreciated. > -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V2] ARM: EXYNOS: Move arm core power down clock to exynos5250 common clock
Now with common clock support added for exynos5250 it is necessary to move
this code to exynos5250 common clock driver as clock registers should be
handled there. This change is tested in exynos5250 based arndale platform.
Cc: Abhilash Kesavan
Cc: Thomas Abraham
Acked-by: Kukjin Kim
Reviewed-by: Bartlomiej Zolnierkiewicz
Signed-off-by: Amit Daniel Kachhap
---
Changes in V2:
* Rebased against linux-next tree.
* Removed un-used macros in regs-clock.h
arch/arm/mach-exynos/cpuidle.c | 35
arch/arm/mach-exynos/include/mach/regs-clock.h | 16 -
drivers/clk/samsung/clk-exynos5250.c | 42
3 files changed, 42 insertions(+), 51 deletions(-)
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index 1bde6ad..40963ce 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -161,46 +161,11 @@ static int exynos4_enter_lowpower(struct cpuidle_device
*dev,
return exynos4_enter_core0_aftr(dev, drv, new_index);
}
-static void __init exynos5_core_down_clk(void)
-{
- unsigned int tmp;
-
- /*
-* Enable arm clock down (in idle) and set arm divider
-* ratios in WFI/WFE state.
-*/
- tmp = PWR_CTRL1_CORE2_DOWN_RATIO | \
- PWR_CTRL1_CORE1_DOWN_RATIO | \
- PWR_CTRL1_DIV2_DOWN_EN | \
- PWR_CTRL1_DIV1_DOWN_EN | \
- PWR_CTRL1_USE_CORE1_WFE| \
- PWR_CTRL1_USE_CORE0_WFE| \
- PWR_CTRL1_USE_CORE1_WFI| \
- PWR_CTRL1_USE_CORE0_WFI;
- __raw_writel(tmp, EXYNOS5_PWR_CTRL1);
-
- /*
-* Enable arm clock up (on exiting idle). Set arm divider
-* ratios when not in idle along with the standby duration
-* ratios.
-*/
- tmp = PWR_CTRL2_DIV2_UP_EN | \
- PWR_CTRL2_DIV1_UP_EN | \
- PWR_CTRL2_DUR_STANDBY2_VAL | \
- PWR_CTRL2_DUR_STANDBY1_VAL | \
- PWR_CTRL2_CORE2_UP_RATIO | \
- PWR_CTRL2_CORE1_UP_RATIO;
- __raw_writel(tmp, EXYNOS5_PWR_CTRL2);
-}
-
static int __init exynos_cpuidle_probe(struct platform_device *pdev)
{
int cpu_id, ret;
struct cpuidle_device *device;
- if (soc_is_exynos5250())
- exynos5_core_down_clk();
-
if (soc_is_exynos5440())
exynos4_idle_driver.state_count = 1;
diff --git a/arch/arm/mach-exynos/include/mach/regs-clock.h
b/arch/arm/mach-exynos/include/mach/regs-clock.h
index d36ad76..b59b0ad 100644
--- a/arch/arm/mach-exynos/include/mach/regs-clock.h
+++ b/arch/arm/mach-exynos/include/mach/regs-clock.h
@@ -347,22 +347,6 @@
#define EXYNOS5_EPLLCON0_LOCKED_SHIFT (29)
-#define PWR_CTRL1_CORE2_DOWN_RATIO (7 << 28)
-#define PWR_CTRL1_CORE1_DOWN_RATIO (7 << 16)
-#define PWR_CTRL1_DIV2_DOWN_EN (1 << 9)
-#define PWR_CTRL1_DIV1_DOWN_EN (1 << 8)
-#define PWR_CTRL1_USE_CORE1_WFE(1 << 5)
-#define PWR_CTRL1_USE_CORE0_WFE(1 << 4)
-#define PWR_CTRL1_USE_CORE1_WFI(1 << 1)
-#define PWR_CTRL1_USE_CORE0_WFI(1 << 0)
-
-#define PWR_CTRL2_DIV2_UP_EN (1 << 25)
-#define PWR_CTRL2_DIV1_UP_EN (1 << 24)
-#define PWR_CTRL2_DUR_STANDBY2_VAL (1 << 16)
-#define PWR_CTRL2_DUR_STANDBY1_VAL (1 << 8)
-#define PWR_CTRL2_CORE2_UP_RATIO (1 << 4)
-#define PWR_CTRL2_CORE1_UP_RATIO (1 << 0)
-
/* Compatibility defines and inclusion */
#include
diff --git a/drivers/clk/samsung/clk-exynos5250.c
b/drivers/clk/samsung/clk-exynos5250.c
index adf3234..07f2f46 100644
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c
@@ -22,6 +22,8 @@
#define APLL_CON0 0x100
#define SRC_CPU0x200
#define DIV_CPU0 0x500
+#define PWR_CTRL1 0x1020
+#define PWR_CTRL2 0x1024
#define MPLL_LOCK 0x4000
#define MPLL_CON0 0x4100
#define SRC_CORE1 0x4204
@@ -77,6 +79,23 @@
#define GATE_IP_DISP1 0x10928
#define GATE_IP_ACP0x1
+/*Below definitions are used for PWR_CTRL settings*/
+#define PWR_CTRL1_CORE2_DOWN_RATIO (7 << 28)
+#define PWR_CTRL1_CORE1_DOWN_RATIO (7 << 16)
+#define PWR_CTRL1_DIV2_DOWN_EN (1 << 9)
+#define PWR_CTRL1_DIV1_DOWN_EN (1 << 8)
+#define PWR_CTRL1_USE_CORE1_WFE(1 << 5)
+#define PWR_CTRL1_USE_CORE0_WFE(1 << 4)
+#define PWR_CTRL1_USE_CORE1_WFI(1 << 1)
+#define PWR_CTRL1_USE_CORE0_WFI(1 << 0)
+
+#define PWR_CTRL2_DIV2_UP_EN (1 << 25)
+#define PWR_CTRL2_DIV1_UP_EN (1 << 24)
+#d
[RFC/PATCH V3] spi: s3c64xx: Enable Word transfer
This patch enables word transfer for s3c64xx spi driver.
User can set bits_per_word to 32 before calling spi_setup,
which would enable the word transfer mode.
Signed-off-by: Rajeshwari S Shinde
---
Changes in V2
- Reduced the call for s3c64xx_spi_config.
Changes in V3:
- Corrected the coding style nits.
drivers/spi/spi-s3c64xx.c | 25 ++---
1 file changed, 18 insertions(+), 7 deletions(-)
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 512b889..cbbeff3 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -498,6 +498,18 @@ static void enable_datapath(struct s3c64xx_spi_driver_data
*sdd,
chcfg = readl(regs + S3C64XX_SPI_CH_CFG);
chcfg &= ~S3C64XX_SPI_CH_TXCH_ON;
+ if(sdd->cur_bpw == 32) {
+ /* For word transfer we need to swap bytes */
+ u32 swapcfg = (S3C64XX_SPI_SWAP_TX_EN |
S3C64XX_SPI_SWAP_TX_BYTE |
+ S3C64XX_SPI_SWAP_TX_HALF_WORD |
+ S3C64XX_SPI_SWAP_RX_EN |
+ S3C64XX_SPI_SWAP_RX_BYTE |
+ S3C64XX_SPI_SWAP_RX_HALF_WORD);
+ writel(swapcfg, regs + S3C64XX_SPI_SWAP_CFG);
+ } else {
+ writel(0, regs + S3C64XX_SPI_SWAP_CFG);
+ }
+
if (dma_mode) {
chcfg &= ~S3C64XX_SPI_CH_RXCH_ON;
} else {
@@ -905,13 +917,12 @@ static int s3c64xx_spi_transfer_one_message(struct
spi_master *master,
bpw = xfer->bits_per_word;
speed = xfer->speed_hz ? : spi->max_speed_hz;
- if (xfer->len % (bpw / 8)) {
- dev_err(&spi->dev,
- "Xfer length(%u) not a multiple of word
size(%u)\n",
- xfer->len, bpw / 8);
- status = -EIO;
- goto out;
- }
+ /*
+* Enable byte transfer if transfer length not a multiple of
+* word size
+*/
+ if (xfer->len % (bpw / 8))
+ bpw = 8;
if (bpw != sdd->cur_bpw || speed != sdd->cur_speed) {
sdd->cur_bpw = bpw;
--
1.7.12.4
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Re: [RFC/PATCH V2] spi: s3c64xx: Enable Word transfer
Hi Sachin,
On Thu, Oct 10, 2013 at 5:12 PM, Sachin Kamat wrote:
> On 10 October 2013 16:11, Rajeshwari S Shinde
> wrote:
>> + if(sdd->cur_bpw == 32) {
>> + /* For word transfer we need to swap bytes */
>> + u32 swapcfg = (S3C64XX_SPI_SWAP_TX_EN |
>> S3C64XX_SPI_SWAP_TX_BYTE |
>> + S3C64XX_SPI_SWAP_TX_HALF_WORD |
>> + S3C64XX_SPI_SWAP_RX_EN |
>> + S3C64XX_SPI_SWAP_RX_BYTE |
>> + S3C64XX_SPI_SWAP_RX_HALF_WORD);
>> + writel(swapcfg, regs + S3C64XX_SPI_SWAP_CFG);
>> + } else
>> + writel(0, regs + S3C64XX_SPI_SWAP_CFG);
>
> coding style: braces needed around else as 'if' block has it. I had
> pointed this out on v1 of this patch too.
Yes my mistake, missed correcting them, will correct in next version.
>
> [snip]
>
>> + /*
>> +* Enable byte tranfer if transfer length not a multiple of
>
> typo: s/tranfer/transfer
will correct this.
--
Regards,
Rajeshwari Shinde
>
> --
> With warm regards,
> Sachin
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc"
> in
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Re: [RESEND PATCH 1/3] ARM: EXYNOS: Move arm core power down clock to exynos5250 common clock
Hi Bartlomeij, Yes these patches have missed 2 merge windows and still not merged. Mike: I am re-basing these patches on linux-next. Please merge them. Regards, Amit On Wed, Oct 9, 2013 at 3:18 PM, Bartlomiej Zolnierkiewicz wrote: > > Hi, > > Mike: > > Could you please apply this patch? It is few months overdue.. > > Amit: > > This patch no longer applies to -next. Could you please refresh and resend it? > > You can add: > > Reviewed-by: Bartlomiej Zolnierkiewicz > > while at it. > > Thanks. > > Best regards, > -- > Bartlomiej Zolnierkiewicz > Samsung R&D Institute Poland > Samsung Electronics > > On Friday, August 16, 2013 10:22:44 AM amit daniel kachhap wrote: >> Hi Mike, >> >> Please merge this patch as it is pending since last merge window. >> >> Thanks, >> Amit >> >> On Thu, Jun 13, 2013 at 5:56 PM, Kukjin Kim wrote: >> > Amit Daniel Kachhap wrote: >> >> >> >> Now with common clock support added for exynos5250 it is necessary to move >> >> this code to exynos5250 common clock driver as clock registers should be >> >> handled there. This change is tested in exynos5250 based arndale platform. >> >> >> >> Cc: Abhilash Kesavan >> >> Cc: Thomas Abraham >> >> Signed-off-by: Amit Daniel Kachhap >> > >> > Hmm...I'm not sure it's better to handle the ARM core power down clock in >> > common clock but the clock registers should be handled in one part, clock. >> > >> > Acked-by: Kukjin Kim >> > >> > Mike, the mach-exynos/cpuidle.c is not touched in samsung tree at this >> > moment, so this patch will not create any conflict between samsung and clk. >> > >> > Thanks, >> > - Kukjin > > > ___ > linux-arm-kernel mailing list > linux-arm-ker...@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel On Wed, Oct 9, 2013 at 3:18 PM, Bartlomiej Zolnierkiewicz wrote: > > Hi, > > Mike: > > Could you please apply this patch? It is few months overdue.. > > Amit: > > This patch no longer applies to -next. Could you please refresh and resend it? > > You can add: > > Reviewed-by: Bartlomiej Zolnierkiewicz > > while at it. > > Thanks. > > Best regards, > -- > Bartlomiej Zolnierkiewicz > Samsung R&D Institute Poland > Samsung Electronics > > On Friday, August 16, 2013 10:22:44 AM amit daniel kachhap wrote: >> Hi Mike, >> >> Please merge this patch as it is pending since last merge window. >> >> Thanks, >> Amit >> >> On Thu, Jun 13, 2013 at 5:56 PM, Kukjin Kim wrote: >> > Amit Daniel Kachhap wrote: >> >> >> >> Now with common clock support added for exynos5250 it is necessary to move >> >> this code to exynos5250 common clock driver as clock registers should be >> >> handled there. This change is tested in exynos5250 based arndale platform. >> >> >> >> Cc: Abhilash Kesavan >> >> Cc: Thomas Abraham >> >> Signed-off-by: Amit Daniel Kachhap >> > >> > Hmm...I'm not sure it's better to handle the ARM core power down clock in >> > common clock but the clock registers should be handled in one part, clock. >> > >> > Acked-by: Kukjin Kim >> > >> > Mike, the mach-exynos/cpuidle.c is not touched in samsung tree at this >> > moment, so this patch will not create any conflict between samsung and clk. >> > >> > Thanks, >> > - Kukjin > > > ___ > linux-arm-kernel mailing list > linux-arm-ker...@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC/PATCH V2] spi: s3c64xx: Enable Word transfer
Hi Leela,
On Thu, Oct 10, 2013 at 5:36 PM, Leela Krishna Amudala
wrote:
> Hi Rajeshwari,
>
> On Thu, Oct 10, 2013 at 4:11 PM, Rajeshwari S Shinde
> wrote:
>> This patch enables word transfer for s3c64xx spi driver.
>> User can set bits_per_word to 32 before calling spi_setup,
>> which would enable the word transfer mode.
>>
>> Signed-off-by: Rajeshwari S Shinde
>> ---
>> Chnages in V2:
>> - Reduced the call for s3c64xx_spi_config
>> drivers/spi/spi-s3c64xx.c | 24 +---
>> 1 file changed, 17 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
>> index 512b889..d1b0a2b 100644
>> --- a/drivers/spi/spi-s3c64xx.c
>> +++ b/drivers/spi/spi-s3c64xx.c
>> @@ -498,6 +498,17 @@ static void enable_datapath(struct
>> s3c64xx_spi_driver_data *sdd,
>> chcfg = readl(regs + S3C64XX_SPI_CH_CFG);
>> chcfg &= ~S3C64XX_SPI_CH_TXCH_ON;
>>
>> + if(sdd->cur_bpw == 32) {
>> + /* For word transfer we need to swap bytes */
>> + u32 swapcfg = (S3C64XX_SPI_SWAP_TX_EN |
>> S3C64XX_SPI_SWAP_TX_BYTE |
>> + S3C64XX_SPI_SWAP_TX_HALF_WORD |
>> + S3C64XX_SPI_SWAP_RX_EN |
>> + S3C64XX_SPI_SWAP_RX_BYTE |
>> + S3C64XX_SPI_SWAP_RX_HALF_WORD);
>> + writel(swapcfg, regs + S3C64XX_SPI_SWAP_CFG);
>
> In s3c64xx_spi_probe() function
> sdd->cur_bpw is hard coded to 8
By default sdd->cur_bpw is set to 8 bits transfer.
>
> is there any provision somehow to configure cur_bpw to 32 ?
The user can set bits_per_word to 32 later as per his requirement.
>
> wouldn't 16 bits per word transfers also need swapping?
This patch is tested for Word transfer.
>
> Best Wishes,
> Leela Krishna.
>
>> + } else
>> + writel(0, regs + S3C64XX_SPI_SWAP_CFG);
>> +
>> if (dma_mode) {
>> chcfg &= ~S3C64XX_SPI_CH_RXCH_ON;
>> } else {
>> @@ -905,13 +916,12 @@ static int s3c64xx_spi_transfer_one_message(struct
>> spi_master *master,
>> bpw = xfer->bits_per_word;
>> speed = xfer->speed_hz ? : spi->max_speed_hz;
>>
>> - if (xfer->len % (bpw / 8)) {
>> - dev_err(&spi->dev,
>> - "Xfer length(%u) not a multiple of word
>> size(%u)\n",
>> - xfer->len, bpw / 8);
>> - status = -EIO;
>> - goto out;
>> - }
>> + /*
>> +* Enable byte tranfer if transfer length not a multiple of
>> +* word size
>> +*/
>> + if (xfer->len % (bpw / 8))
>> + bpw = 8;
>>
>> if (bpw != sdd->cur_bpw || speed != sdd->cur_speed) {
>> sdd->cur_bpw = bpw;
>> --
>> 1.7.12.4
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc"
>> in
>> the body of a message to majord...@vger.kernel.org
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> --
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> in
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--
Regards,
Rajeshwari Shinde
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Re: [PATCH 1/2] ARM: dts: Update display clock frequency for Origen-4210
Kukjin,
Without these patches display is broken on these boards. Please add them.
On 26 September 2013 10:20, Sachin Kamat wrote:
> From: Tushar Behera
>
> As per the timing information for supported panel, the value should
> be between 47.2 MHz to 47.9 MHz for 60Hz refresh rate.
>
> Total horizontal pixels = 1024 (x-res) + 80 (margin) + 48 (hsync) = 1152
> Total vertical pixels = 600 (y-res) + 80 (margin) + 3 (vsync) = 653
>
> Target pixel clock rate for refresh rate @60 Hz
> = 1152 * 653 * 60 = 47208960 Hz ~ 47.5 MHz
>
> Signed-off-by: Tushar Behera
> Signed-off-by: Sachin Kamat
> ---
> arch/arm/boot/dts/exynos4210-origen.dts |2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/exynos4210-origen.dts
> b/arch/arm/boot/dts/exynos4210-origen.dts
> index 382d8c7..6906e8a 100644
> --- a/arch/arm/boot/dts/exynos4210-origen.dts
> +++ b/arch/arm/boot/dts/exynos4210-origen.dts
> @@ -301,7 +301,7 @@
> display-timings {
> native-mode = <&timing0>;
> timing0: timing {
> - clock-frequency = <5>;
> + clock-frequency = <4750>;
> hactive = <1024>;
> vactive = <600>;
> hfront-porch = <64>;
> --
> 1.7.9.5
>
--
With warm regards,
Sachin
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[PATCH 3/3] ARM: S3C24XX: add dma pdata for s3c2410, s3c2440 and s3c2442
s3c2410 and s3c2442 share the same dma channels while s3c2440 has
slight differences. But on all three the reachable sources per dma
channel has constraints attached and thus encodes the usable
combinations using the S3C24XX_DMA_CHANREQ macro.
This also fixes the warning about s3c2410_dma_resource being unused
as reported by Olof Johansson.
Signed-off-by: Heiko Stuebner
---
arch/arm/mach-s3c24xx/common.c| 100 +
arch/arm/mach-s3c24xx/common.h|2 +
include/linux/platform_data/dma-s3c24xx.h |3 +
3 files changed, 105 insertions(+)
diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c
index 16ac669..4cfe7a4 100644
--- a/arch/arm/mach-s3c24xx/common.c
+++ b/arch/arm/mach-s3c24xx/common.c
@@ -343,6 +343,50 @@ static struct resource s3c2410_dma_resource[] = {
};
#endif
+#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2442)
+static struct s3c24xx_dma_channel s3c2410_dma_channels[DMACH_MAX] = {
+ [DMACH_XD0] = { S3C24XX_DMA_AHB, true, S3C24XX_DMA_CHANREQ(0, 0), },
+ [DMACH_XD1] = { S3C24XX_DMA_AHB, true, S3C24XX_DMA_CHANREQ(0, 1), },
+ [DMACH_SDI] = { S3C24XX_DMA_APB, false, S3C24XX_DMA_CHANREQ(2, 0) |
+ S3C24XX_DMA_CHANREQ(2, 2) |
+ S3C24XX_DMA_CHANREQ(1, 3),
+ },
+ [DMACH_SPI0] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(3, 1), },
+ [DMACH_SPI1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(2, 3), },
+ [DMACH_UART0] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(1, 0), },
+ [DMACH_UART1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(1, 1), },
+ [DMACH_UART2] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(0, 3), },
+ [DMACH_TIMER] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(3, 0) |
+S3C24XX_DMA_CHANREQ(3, 2) |
+S3C24XX_DMA_CHANREQ(3, 3),
+ },
+ [DMACH_I2S_IN] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(2, 1) |
+ S3C24XX_DMA_CHANREQ(1, 2),
+ },
+ [DMACH_I2S_OUT] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(0, 2), },
+ [DMACH_USB_EP1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 0), },
+ [DMACH_USB_EP2] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 1), },
+ [DMACH_USB_EP3] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 2), },
+ [DMACH_USB_EP4] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 3), },
+};
+
+static struct s3c24xx_dma_platdata s3c2410_dma_platdata = {
+ .num_phy_channels = 4,
+ .channels = s3c2410_dma_channels,
+ .num_channels = DMACH_MAX,
+};
+
+struct platform_device s3c2410_device_dma = {
+ .name = "s3c2410-dma",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(s3c2410_dma_resource),
+ .resource = s3c2410_dma_resource,
+ .dev= {
+ .platform_data = &s3c2410_dma_platdata,
+ },
+};
+#endif
+
#ifdef CONFIG_CPU_S3C2412
static struct s3c24xx_dma_channel s3c2412_dma_channels[DMACH_MAX] = {
[DMACH_XD0] = { S3C24XX_DMA_AHB, true, 17 },
@@ -384,6 +428,62 @@ struct platform_device s3c2412_device_dma = {
};
#endif
+#if defined(CONFIG_CPU_S3C2440)
+static struct s3c24xx_dma_channel s3c2440_dma_channels[DMACH_MAX] = {
+ [DMACH_XD0] = { S3C24XX_DMA_AHB, true, S3C24XX_DMA_CHANREQ(0, 0), },
+ [DMACH_XD1] = { S3C24XX_DMA_AHB, true, S3C24XX_DMA_CHANREQ(0, 1), },
+ [DMACH_SDI] = { S3C24XX_DMA_APB, false, S3C24XX_DMA_CHANREQ(2, 0) |
+ S3C24XX_DMA_CHANREQ(6, 1) |
+ S3C24XX_DMA_CHANREQ(2, 2) |
+ S3C24XX_DMA_CHANREQ(1, 3),
+ },
+ [DMACH_SPI0] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(3, 1), },
+ [DMACH_SPI1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(2, 3), },
+ [DMACH_UART0] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(1, 0), },
+ [DMACH_UART1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(1, 1), },
+ [DMACH_UART2] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(0, 3), },
+ [DMACH_TIMER] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(3, 0) |
+S3C24XX_DMA_CHANREQ(3, 2) |
+S3C24XX_DMA_CHANREQ(3, 3),
+ },
+ [DMACH_I2S_IN] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(2, 1) |
+ S3C24XX_DMA_CHANREQ(1, 2),
+ },
+ [DMACH_I2S_OUT] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(5, 0) |
+ S3C24XX_DMA_CHANREQ(0, 2),
+ },
+ [DMACH_PCM_IN] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(6, 0) |
+
[PATCH 2/3] dmaengine: s3c24xx-dma: add support for the s3c2410 type of controller
The earliest variants of the dma controller did not contain support for
controlling clocks.
Signed-off-by: Heiko Stuebner
---
drivers/dma/s3c24xx-dma.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/dma/s3c24xx-dma.c b/drivers/dma/s3c24xx-dma.c
index 56c9253..4cb1279 100644
--- a/drivers/dma/s3c24xx-dma.c
+++ b/drivers/dma/s3c24xx-dma.c
@@ -1078,6 +1078,13 @@ static void s3c24xx_dma_free_virtual_channels(struct
dma_device *dmadev)
list_del(&chan->vc.chan.device_node);
}
+/* s3c2410, s3c2440 and s3c2442 have a 0x40 stride without separate clocks */
+static struct soc_data soc_s3c2410 = {
+ .stride = 0x40,
+ .has_reqsel = false,
+ .has_clocks = false,
+};
+
/* s3c2412 and s3c2413 have a 0x40 stride and dmareqsel mechanism */
static struct soc_data soc_s3c2412 = {
.stride = 0x40,
@@ -1094,6 +1101,9 @@ static struct soc_data soc_s3c2443 = {
static struct platform_device_id s3c24xx_dma_driver_ids[] = {
{
+ .name = "s3c2410-dma",
+ .driver_data= (kernel_ulong_t)&soc_s3c2410,
+ }, {
.name = "s3c2412-dma",
.driver_data= (kernel_ulong_t)&soc_s3c2412,
}, {
--
1.7.10.4
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[PATCH 1/3] ARM: S3C24XX: Fix possible dma selection warning
Currently the s3c sound support selects CONFIG_S3C2410_DMA on s3c24xx architectures while the generic dma config is enabled by CONFIG_S3C24XX_DMA. With the way the Kconfig options are layed out currently it is possible to enable Samsung sound support without enabling the necessary dma support resulting in warnings like warning: (SND_SOC_SAMSUNG && SND_S3C24XX_I2S && SND_S3C2412_SOC_I2S && SND_SOC_SAMSUNG_SMDK2443_WM9710 && SND_SOC_SAMSUNG_LN2440SBC_ALC650) selects S3C2410_DMA which has unmet direct dependencies (ARCH_S3C24XX && S3C24XX_DMA && (CPU_S3C2410 || CPU_S3C2442)) Therefore bring the s3c2410 dma support in line with the way the other s3c24xx SoCs handle this by having the SoC dma-support selected if the generic s3c dma support is enabled and have the sound support depend on S3C24XX_DMA on these arches. The s3c2442 is using the same dma descriptors and therefore also selected S3C2410_DMA. Signed-off-by: Heiko Stuebner --- arch/arm/mach-s3c24xx/Kconfig |3 ++- sound/soc/samsung/Kconfig |2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig index dba2173..8f1d327 100644 --- a/arch/arm/mach-s3c24xx/Kconfig +++ b/arch/arm/mach-s3c24xx/Kconfig @@ -28,6 +28,7 @@ config CPU_S3C2410 select CPU_ARM920T select CPU_LLSERIAL_S3C2410 select S3C2410_CLOCK + select S3C2410_DMA if S3C24XX_DMA select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ select S3C2410_PM if PM select SAMSUNG_WDT_RESET @@ -70,6 +71,7 @@ config CPU_S3C2442 select CPU_ARM920T select CPU_LLSERIAL_S3C2440 select S3C2410_CLOCK + select S3C2410_DMA if S3C24XX_DMA select S3C2410_PM if PM help Support for S3C2442 Samsung Mobile CPU based systems. @@ -148,7 +150,6 @@ config S3C2410_DMA_DEBUG config S3C2410_DMA bool depends on S3C24XX_DMA && (CPU_S3C2410 || CPU_S3C2442) - default y if CPU_S3C2410 || CPU_S3C2442 help DMA device selection for S3C2410 and compatible CPUs diff --git a/sound/soc/samsung/Kconfig b/sound/soc/samsung/Kconfig index 2eea184..37459df 100644 --- a/sound/soc/samsung/Kconfig +++ b/sound/soc/samsung/Kconfig @@ -2,7 +2,7 @@ config SND_SOC_SAMSUNG tristate "ASoC support for Samsung" depends on PLAT_SAMSUNG select S3C64XX_DMA if ARCH_S3C64XX - select S3C2410_DMA if ARCH_S3C24XX + select S3C24XX_DMA if ARCH_S3C24XX help Say Y or M if you want to add support for codecs attached to the Samsung SoCs' Audio interfaces. You will also need to -- 1.7.10.4 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/3] ARM: S3C24XX: add missing dma-devices and warning fix
When Olof reported the warning about the unused s3c2410_dma_resource, I thought the best way forward would be to simply implement the missing pieces and so it has users :-) . Therefore this series adds the necessary platform-devices for s3c2410, s3c2440 and s3c2442. This especially also includes the channel-constraints of those socs. As I do not have access to any of those socs these changes are of course compile-tested only. Heiko Stuebner (3): ARM: S3C24XX: Fix possible dma selection warning dmaengine: s3c24xx-dma: add support for the s3c2410 type of controller ARM: S3C24XX: add dma platformdata for s3c2410, s3c2440 and s3c2442 arch/arm/mach-s3c24xx/Kconfig |3 +- arch/arm/mach-s3c24xx/common.c| 100 + arch/arm/mach-s3c24xx/common.h|2 + drivers/dma/s3c24xx-dma.c | 10 +++ include/linux/platform_data/dma-s3c24xx.h |3 + sound/soc/samsung/Kconfig |2 +- 6 files changed, 118 insertions(+), 2 deletions(-) -- 1.7.10.4 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 1/5] ARM: dts: Add fimd display-timings for exynos5250-snow
This patch adds the internal panel timings to the exynos5250-snow board
dts file.
Signed-off-by: Sean Paul
---
v2: No difference
v3: Added status = "okay"
arch/arm/boot/dts/exynos5250-snow.dts | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts
b/arch/arm/boot/dts/exynos5250-snow.dts
index fd711e2..28eea9b 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -186,6 +186,24 @@
samsung,vbus-gpio = <&gpx1 1 0>;
};
+ fimd: fimd@1440 {
+ status = "okay";
+ display-timings {
+ native-mode = <&lcd_timing>;
+ lcd_timing: 1366x768 {
+ clock-frequency = <70589280>;
+ hactive = <1366>;
+ vactive = <768>;
+ hfront-porch = <40>;
+ hback-porch = <40>;
+ hsync-len = <32>;
+ vback-porch = <10>;
+ vfront-porch = <12>;
+ vsync-len = <6>;
+ };
+ };
+ };
+
fixed-rate-clocks {
xxti {
compatible = "samsung,clock-xxti";
--
1.8.4
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[PATCH v3 3/5] drm/bridge: Add PTN3460 bridge driver
This patch adds a drm_bridge driver for the PTN3460 DisplayPort to LVDS
bridge chip.
Signed-off-by: Sean Paul
---
v2:
- Changed header definition to static inline
- Changed dt node name to lvds-bridge
v3: No changes
.../devicetree/bindings/drm/bridge/ptn3460.txt | 27 ++
drivers/gpu/drm/Kconfig| 2 +
drivers/gpu/drm/Makefile | 1 +
drivers/gpu/drm/bridge/Kconfig | 4 +
drivers/gpu/drm/bridge/Makefile| 3 +
drivers/gpu/drm/bridge/ptn3460.c | 349 +
include/drm/bridge/ptn3460.h | 37 +++
7 files changed, 423 insertions(+)
create mode 100644 Documentation/devicetree/bindings/drm/bridge/ptn3460.txt
create mode 100644 drivers/gpu/drm/bridge/Kconfig
create mode 100644 drivers/gpu/drm/bridge/Makefile
create mode 100644 drivers/gpu/drm/bridge/ptn3460.c
create mode 100644 include/drm/bridge/ptn3460.h
diff --git a/Documentation/devicetree/bindings/drm/bridge/ptn3460.txt
b/Documentation/devicetree/bindings/drm/bridge/ptn3460.txt
new file mode 100644
index 000..52b93b2
--- /dev/null
+++ b/Documentation/devicetree/bindings/drm/bridge/ptn3460.txt
@@ -0,0 +1,27 @@
+ptn3460 bridge bindings
+
+Required properties:
+ - compatible: "nxp,ptn3460"
+ - reg: i2c address of the bridge
+ - powerdown-gpio: OF device-tree gpio specification
+ - reset-gpio: OF device-tree gpio specification
+ - edid-emulation: The EDID emulation entry to use
+ +---++--+
+ | Value | Resolution | Description |
+ | 0 | 1024x768 | NXP Generic |
+ | 1 | 1920x1080 | NXP Generic |
+ | 2 | 1920x1080 | NXP Generic |
+ | 3 | 1600x900 | Samsung LTM200KT |
+ | 4 | 1920x1080 | Samsung LTM230HT |
+ | 5 | 1366x768 | NXP Generic |
+ | 6 | 1600x900 | ChiMei M215HGE |
+ +---++--+
+
+Example:
+ lvds-bridge@20 {
+ compatible = "nxp,ptn3460";
+ reg = <0x20>;
+ powerdown-gpio = <&gpy2 5 1 0 0>;
+ reset-gpio = <&gpx1 5 1 0 0>;
+ edid-emulation = <5>;
+ };
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 95d..cd7bfb3 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -236,3 +236,5 @@ source "drivers/gpu/drm/tilcdc/Kconfig"
source "drivers/gpu/drm/qxl/Kconfig"
source "drivers/gpu/drm/msm/Kconfig"
+
+source "drivers/gpu/drm/bridge/Kconfig"
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index f089adf..9234253 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -56,3 +56,4 @@ obj-$(CONFIG_DRM_TILCDC) += tilcdc/
obj-$(CONFIG_DRM_QXL) += qxl/
obj-$(CONFIG_DRM_MSM) += msm/
obj-y += i2c/
+obj-y += bridge/
diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
new file mode 100644
index 000..f8db069
--- /dev/null
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -0,0 +1,4 @@
+config DRM_PTN3460
+ tristate "PTN3460 DP/LVDS bridge"
+ depends on DRM && I2C
+ ---help---
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
new file mode 100644
index 000..b4733e1
--- /dev/null
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -0,0 +1,3 @@
+ccflags-y := -Iinclude/drm
+
+obj-$(CONFIG_DRM_PTN3460) += ptn3460.o
diff --git a/drivers/gpu/drm/bridge/ptn3460.c b/drivers/gpu/drm/bridge/ptn3460.c
new file mode 100644
index 000..a9e5c1a
--- /dev/null
+++ b/drivers/gpu/drm/bridge/ptn3460.c
@@ -0,0 +1,349 @@
+/*
+ * NXP PTN3460 DP/LVDS bridge driver
+ *
+ * Copyright (C) 2013 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "drmP.h"
+#include "drm_edid.h"
+#include "drm_crtc.h"
+#include "drm_crtc_helper.h"
+
+#include "bridge/ptn3460.h"
+
+#define PTN3460_EDID_ADDR 0x0
+#define PTN3460_EDID_EMULATION_ADDR0x84
+#define PTN3460_EDID_ENABLE_EMULATION 0
+#define PTN3460_EDID_EMULATION_SELECTION 1
+#define PTN3460_EDID_SRAM_LOAD_ADDR0x85
+
+struct ptn3460_bridge {
+ struct drm_connector connector;
+ struct i2c_client *client;
+ struct drm_encoder *encoder;
+ stru
[PATCH v3 5/5] ARM: dts: Add ptn3460 to exynos5250-snow
This patch adds a node for the ptn3460 DP-LVDS chip in the
exynos5250-snow board dts file.
Signed-off-by: Sean Paul
---
v2: Changed node name to lvds-bridge
v3: No changes
arch/arm/boot/dts/exynos5250-snow.dts | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts
b/arch/arm/boot/dts/exynos5250-snow.dts
index f813644..8c92df8 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -33,6 +33,13 @@
sd3_bus4: sd3-bus-width4 {
samsung,pin-drv = <0>;
};
+
+ ptn3460_gpios: ptn3460-gpios {
+ samsung,pins = "gpy2-5", "gpx1-5";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
};
gpio-keys {
@@ -186,6 +193,18 @@
samsung,vbus-gpio = <&gpx1 1 0>;
};
+ i2c@12CD {
+ lvds-bridge@20 {
+ compatible = "nxp,ptn3460";
+ reg = <0x20>;
+ powerdown-gpio = <&gpy2 5 0>;
+ reset-gpio = <&gpx1 5 0>;
+ edid-emulation = <5>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ptn3460_gpios>;
+ };
+ };
+
dp-controller@145B {
samsung,color-space = <0>;
samsung,dynamic-range = <0>;
--
1.8.4
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[PATCH v3 2/5] ARM: dts: Add dp-controller node to exynos5250-snow
This patch adds the dp-controller node to the exynos5250-snow board dts
file.
Signed-off-by: Sean Paul
---
v2: Added dp-controller address to node (rebased on linux-next)
v3: Added status = "okay"
arch/arm/boot/dts/exynos5250-snow.dts | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts
b/arch/arm/boot/dts/exynos5250-snow.dts
index 28eea9b..f813644 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -186,6 +186,19 @@
samsung,vbus-gpio = <&gpx1 1 0>;
};
+ dp-controller@145B {
+ samsung,color-space = <0>;
+ samsung,dynamic-range = <0>;
+ samsung,ycbcr-coeff = <0>;
+ samsung,color-depth = <1>;
+ samsung,link-rate = <0x0a>;
+ samsung,lane-count = <2>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&dp_hpd>;
+ status = "okay";
+ };
+
fimd: fimd@1440 {
status = "okay";
display-timings {
--
1.8.4
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[PATCH v3 4/5] drm/exynos: Initialize ptn3460 if present
This patch adds code to look for the ptn3460 in the device tree file on
exynos initialization. If ptn node is found, the driver will initialize
the ptn3460 driver and skip creating a DP connector (since the bridge
driver will register its own connector).
Signed-off-by: Sean Paul
---
v2:
- Changed include from of_i2c.h to i2c.h
- Changed of_find_by_name to of_find_compatible
v3: No changes
drivers/gpu/drm/exynos/exynos_drm_core.c | 44 +++-
1 file changed, 43 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_core.c
b/drivers/gpu/drm/exynos/exynos_drm_core.c
index 1bef6dc..08ca4f9 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_core.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_core.c
@@ -12,7 +12,9 @@
* option) any later version.
*/
+#include
#include
+#include
#include "exynos_drm_drv.h"
#include "exynos_drm_encoder.h"
#include "exynos_drm_connector.h"
@@ -20,6 +22,40 @@
static LIST_HEAD(exynos_drm_subdrv_list);
+struct bridge_init {
+ struct i2c_client *client;
+ struct device_node *node;
+};
+
+static bool find_bridge(const char *compat, struct bridge_init *bridge)
+{
+ bridge->client = NULL;
+ bridge->node = of_find_compatible_node(NULL, NULL, compat);
+ if (!bridge->node)
+ return false;
+
+ bridge->client = of_find_i2c_device_by_node(bridge->node);
+ if (!bridge->client)
+ return false;
+
+ return true;
+}
+
+/* returns the number of bridges attached */
+static int exynos_drm_attach_lcd_bridge(struct drm_device *dev,
+ struct drm_encoder *encoder)
+{
+ struct bridge_init bridge;
+ int ret;
+
+ if (find_bridge("nxp,ptn3460", &bridge)) {
+ ret = ptn3460_init(dev, encoder, bridge.client, bridge.node);
+ if (!ret)
+ return 1;
+ }
+ return 0;
+}
+
static int exynos_drm_create_enc_conn(struct drm_device *dev,
struct exynos_drm_subdrv *subdrv)
{
@@ -36,6 +72,13 @@ static int exynos_drm_create_enc_conn(struct drm_device *dev,
DRM_ERROR("failed to create encoder\n");
return -EFAULT;
}
+ subdrv->encoder = encoder;
+
+ if (subdrv->manager->display_ops->type == EXYNOS_DISPLAY_TYPE_LCD) {
+ ret = exynos_drm_attach_lcd_bridge(dev, encoder);
+ if (ret)
+ return 0;
+ }
/*
* create and initialize a connector for this sub driver and
@@ -48,7 +91,6 @@ static int exynos_drm_create_enc_conn(struct drm_device *dev,
goto err_destroy_encoder;
}
- subdrv->encoder = encoder;
subdrv->connector = connector;
return 0;
--
1.8.4
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[PATCH v3 0/5] Add some missing bits for exynos5250-snow
This set adds some missing devicetree nodes to the exynos5250-snow file as well as adds a drm_bridge driver for the ptn3460 DP-LVDS chip. This chip is used in the exynos5250-snow board. Sean Sean Paul (5): ARM: dts: Add fimd display-timings for exynos5250-snow ARM: dts: Add dp-controller node to exynos5250-snow drm/bridge: Add PTN3460 bridge driver drm/exynos: Initialize ptn3460 if present ARM: dts: Add ptn3460 to exynos5250-snow Documentation/devicetree/bindings/drm/bridge/ptn3460.txt | 27 arch/arm/boot/dts/exynos5250-snow.dts| 50 drivers/gpu/drm/Kconfig | 2 ++ drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/bridge/Kconfig | 4 +++ drivers/gpu/drm/bridge/Makefile | 3 ++ drivers/gpu/drm/bridge/ptn3460.c | 349 drivers/gpu/drm/exynos/exynos_drm_core.c | 44 include/drm/bridge/ptn3460.h | 37 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v10 20/20] iommu/exynos: add devices attached to the System MMU to an IOMMU group
On Mon, 2013-10-07 at 10:58 +0900, Cho KyongHo wrote:
> Patch written by Antonios Motakis :
>
> IOMMU groups are expected by certain users of the IOMMU API,
> e.g. VFIO. Since each device is behind its own System MMU, we
> can allocate a new IOMMU group for each device.
>
> Reviewd-by: Cho KyongHo
> Signed-off-by: Antonios Motakis
> ---
> drivers/iommu/exynos-iommu.c | 28
> 1 files changed, 28 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
> index 5025338..24505a0 100644
> --- a/drivers/iommu/exynos-iommu.c
> +++ b/drivers/iommu/exynos-iommu.c
> @@ -1028,6 +1028,32 @@ static phys_addr_t exynos_iommu_iova_to_phys(struct
> iommu_domain *domain,
> return phys;
> }
>
> +static int exynos_iommu_add_device(struct device *dev)
> +{
> + struct iommu_group *group;
> + int ret;
> +
> + group = iommu_group_get(dev);
Seems reasonable, my only nit would be whether it's really an error to
get a group back from the above call. If devices are always isolated
and IOMMU groups are always singleton, it would be an error to find one
already associated with the device. Right? Thanks,
Alex
> +
> + if (!group) {
> + group = iommu_group_alloc();
> + if (IS_ERR(group)) {
> + dev_err(dev, "Failed to allocate IOMMU group\n");
> + return PTR_ERR(group);
> + }
> + }
> +
> + ret = iommu_group_add_device(group, dev);
> + iommu_group_put(group);
> +
> + return ret;
> +}
> +
> +static void exynos_iommu_remove_device(struct device *dev)
> +{
> + iommu_group_remove_device(dev);
> +}
> +
> static struct iommu_ops exynos_iommu_ops = {
> .domain_init = &exynos_iommu_domain_init,
> .domain_destroy = &exynos_iommu_domain_destroy,
> @@ -1036,6 +1062,8 @@ static struct iommu_ops exynos_iommu_ops = {
> .map = &exynos_iommu_map,
> .unmap = &exynos_iommu_unmap,
> .iova_to_phys = &exynos_iommu_iova_to_phys,
> + .add_device = &exynos_iommu_add_device,
> + .remove_device = &exynos_iommu_remove_device,
> .pgsize_bitmap = SECT_SIZE | LPAGE_SIZE | SPAGE_SIZE,
> };
>
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Re: [PATCH 1/3] dmaengine: pl330: Set residue in tx_status callback.
On Wed, Oct 09, 2013 at 01:37:56PM -0700, Dylan Reid wrote: > On Sun, Oct 6, 2013 at 8:48 PM, Vinod Koul wrote: > > On Mon, Oct 07, 2013 at 10:39:34AM +0900, Chanho Park wrote: > >> > > Why didn't you use a cookie value to track the request? > >> > > The cookie is assigned when each transfer is submitted. > >> > > If you save the value in the desc, we can find the request easily. > >> > > >> > If there are several cyclic desc in the work list, is there a better way > >> > to find the "current" one? The chan struct tracks the last completed and > >> > last submitted cookies, but these will be the first and last > >> > respectively as long as the cyclic transfer is active. Is there an > >> > "active" cookie stored somewhere that I missed? > >> > >> Assume there are three cookies. If you want to get the second cookie not > >> latest cookie, your way can be also correct in such case? > >> I think tx_status API is to get dma status of the given cookie. > >> You are only considering a cyclic case. > > For cyclic case you would have possible same descriptor running till you > > terminate. > > The cyclic case that makes this interesting is when there are multiple > cyclic descriptors in the list. The cookie and completed_cookie > markers don't help to determine which of the descriptors in the list > is currently active. dma_cookie_complete isn't called for a cyclic > desc, the desc is just pushed to the end of the list. Yes the cyclic is a very different case. I think driver can still return for cyclic case which was txstate->last and that will give clue to client which is getting processed now! > > For non cyclic, if you have 3 descriptors submitted, the cookie value can > > be, say > > 7, 8 and 9. If you query the status of any descriptor and pass the last > > optional > > txstate arg then you will know the last cookie completed. so if > > txstate->last is > > 7, then 7th was completed and 8 should be running and 9 in queue! > > Got it, but the correct desc for cookie 8 will still have to be > searched for, correct? Yes -- ~Vinod -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/5] drm/bridge: Add PTN3460 bridge driver
On Thu, Oct 10, 2013 at 08:40:38PM +0900, Inki Dae wrote: > That is what I mentioned. Some boards _could control_ the actual regulator > for lvds-bridge, and that would be depended on how HW engineer designs the > board. For the driver this should be totally transparent - it should just control the regulator all the time, the regulator API will just not do anything if the regulator state can't actually be changed. signature.asc Description: Digital signature
Re: [RFC/PATCH V2] spi: s3c64xx: Enable Word transfer
Hi Rajeshwari,
On Thu, Oct 10, 2013 at 4:11 PM, Rajeshwari S Shinde
wrote:
> This patch enables word transfer for s3c64xx spi driver.
> User can set bits_per_word to 32 before calling spi_setup,
> which would enable the word transfer mode.
>
> Signed-off-by: Rajeshwari S Shinde
> ---
> Chnages in V2:
> - Reduced the call for s3c64xx_spi_config
> drivers/spi/spi-s3c64xx.c | 24 +---
> 1 file changed, 17 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
> index 512b889..d1b0a2b 100644
> --- a/drivers/spi/spi-s3c64xx.c
> +++ b/drivers/spi/spi-s3c64xx.c
> @@ -498,6 +498,17 @@ static void enable_datapath(struct
> s3c64xx_spi_driver_data *sdd,
> chcfg = readl(regs + S3C64XX_SPI_CH_CFG);
> chcfg &= ~S3C64XX_SPI_CH_TXCH_ON;
>
> + if(sdd->cur_bpw == 32) {
> + /* For word transfer we need to swap bytes */
> + u32 swapcfg = (S3C64XX_SPI_SWAP_TX_EN |
> S3C64XX_SPI_SWAP_TX_BYTE |
> + S3C64XX_SPI_SWAP_TX_HALF_WORD |
> + S3C64XX_SPI_SWAP_RX_EN |
> + S3C64XX_SPI_SWAP_RX_BYTE |
> + S3C64XX_SPI_SWAP_RX_HALF_WORD);
> + writel(swapcfg, regs + S3C64XX_SPI_SWAP_CFG);
In s3c64xx_spi_probe() function
sdd->cur_bpw is hard coded to 8
is there any provision somehow to configure cur_bpw to 32 ?
wouldn't 16 bits per word transfers also need swapping?
Best Wishes,
Leela Krishna.
> + } else
> + writel(0, regs + S3C64XX_SPI_SWAP_CFG);
> +
> if (dma_mode) {
> chcfg &= ~S3C64XX_SPI_CH_RXCH_ON;
> } else {
> @@ -905,13 +916,12 @@ static int s3c64xx_spi_transfer_one_message(struct
> spi_master *master,
> bpw = xfer->bits_per_word;
> speed = xfer->speed_hz ? : spi->max_speed_hz;
>
> - if (xfer->len % (bpw / 8)) {
> - dev_err(&spi->dev,
> - "Xfer length(%u) not a multiple of word
> size(%u)\n",
> - xfer->len, bpw / 8);
> - status = -EIO;
> - goto out;
> - }
> + /*
> +* Enable byte tranfer if transfer length not a multiple of
> +* word size
> +*/
> + if (xfer->len % (bpw / 8))
> + bpw = 8;
>
> if (bpw != sdd->cur_bpw || speed != sdd->cur_speed) {
> sdd->cur_bpw = bpw;
> --
> 1.7.12.4
>
> --
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RE: [PATCH 3/5] drm/bridge: Add PTN3460 bridge driver
> -Original Message- > From: Mark Brown [mailto:broo...@kernel.org] > Sent: Thursday, October 10, 2013 6:37 PM > To: Inki Dae > Cc: 'Olof Johansson'; 'Sean Paul'; devicet...@vger.kernel.org; linux- > samsung-...@vger.kernel.org; linux-...@vger.kernel.org; linux- > ker...@vger.kernel.org; 'DRI mailing list'; linux-arm- > ker...@lists.infradead.org > Subject: Re: [PATCH 3/5] drm/bridge: Add PTN3460 bridge driver > > On Thu, Oct 10, 2013 at 01:18:05PM +0900, Inki Dae wrote: > > > > > I still think the pin could be replaced with a regulator. But > > > > lvds-bridge node has "powerdown-gpio" property - it say this board > > > > will use gpio pin - specific to board. So it seems no problem. > > > > No, don't model things that aren't regulators as regulators - it's > > > just confusing from a usability standpoint and causes breakage when > > > the pins don't behave like regulators. > > > It seems that there was your missing point. That _is not_ what I > mentioned. > > I mean that other boards can use a regulator instead of gpio pin. > > What I'm saying is no boards should use a regulator to control that GPIO > pin, obviously if they're controlling the actual regulators that's fine That is what I mentioned. Some boards _could control_ the actual regulator for lvds-bridge, and that would be depended on how HW engineer designs the board. > but the reset signal should not be controlled via the regulator API (there > are some unfortunate cases where people have done that already but let's > not have any more). -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC/PATCH V2] spi: s3c64xx: Enable Word transfer
On 10 October 2013 16:11, Rajeshwari S Shinde wrote:
> + if(sdd->cur_bpw == 32) {
> + /* For word transfer we need to swap bytes */
> + u32 swapcfg = (S3C64XX_SPI_SWAP_TX_EN |
> S3C64XX_SPI_SWAP_TX_BYTE |
> + S3C64XX_SPI_SWAP_TX_HALF_WORD |
> + S3C64XX_SPI_SWAP_RX_EN |
> + S3C64XX_SPI_SWAP_RX_BYTE |
> + S3C64XX_SPI_SWAP_RX_HALF_WORD);
> + writel(swapcfg, regs + S3C64XX_SPI_SWAP_CFG);
> + } else
> + writel(0, regs + S3C64XX_SPI_SWAP_CFG);
coding style: braces needed around else as 'if' block has it. I had
pointed this out on v1 of this patch too.
[snip]
> + /*
> +* Enable byte tranfer if transfer length not a multiple of
typo: s/tranfer/transfer
--
With warm regards,
Sachin
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[PATCH 1/2] spi: Provide common spi_message processing loop
From: Mark Brown
The loops which SPI controller drivers use to process the list of transfers
in a spi_message are typically very similar and have some error prone areas
such as the handling of /CS. Help simplify drivers by factoring this code
out into the core - if drivers provide a transfer_one() function instead
of a transfer_one_message() function the core will handle processing at the
message level.
/CS can be controlled by either setting cs_gpio or providing a set_cs
function. If this is not possible for hardware reasons then both can be
omitted and the driver should continue to implement manual /CS handling.
This is a first step in refactoring and it is expected that there will be
further enhancements, for example factoring out of the mapping of transfers
for DMA and the initiation and completion of interrupt driven transfers.
Signed-off-by: Mark Brown
---
drivers/spi/spi.c | 88 +
include/linux/spi/spi.h | 21 ++--
2 files changed, 107 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 253ea3b..49e63c7 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -526,6 +526,91 @@ int spi_register_board_info(struct spi_board_info const
*info, unsigned n)
/*-*/
+static void spi_set_cs(struct spi_device *spi, bool enable)
+{
+ if (spi->mode & SPI_CS_HIGH)
+ enable = !enable;
+
+ if (spi->cs_gpio >= 0)
+ gpio_set_value(spi->cs_gpio, !enable);
+ else if (spi->master->set_cs)
+ spi->master->set_cs(spi, !enable);
+}
+
+/*
+ * spi_transfer_one_message - Default implementation of transfer_one_message()
+ *
+ * This is a standard implementation of transfer_one_message() for
+ * drivers which impelment a transfer_one() operation. It provides
+ * standard handling of delays and chip select management.
+ */
+static int spi_transfer_one_message(struct spi_master *master,
+ struct spi_message *msg)
+{
+ struct spi_transfer *xfer;
+ bool cur_cs = true;
+ bool keep_cs = false;
+ int ret = 0;
+
+ spi_set_cs(msg->spi, true);
+
+ list_for_each_entry(xfer, &msg->transfers, transfer_list) {
+ INIT_COMPLETION(master->xfer_completion);
+
+ ret = master->transfer_one(master, msg->spi, xfer);
+ if (ret < 0) {
+ dev_err(&msg->spi->dev,
+ "SPI transfer failed: %d\n", ret);
+ goto out;
+ }
+
+ if (ret > 0)
+ wait_for_completion(&master->xfer_completion);
+
+ if (msg->status != -EINPROGRESS)
+ goto out;
+
+ if (xfer->delay_usecs)
+ udelay(xfer->delay_usecs);
+
+ if (xfer->cs_change) {
+ if (list_is_last(&xfer->transfer_list,
+&msg->transfers)) {
+ keep_cs = true;
+ } else {
+ cur_cs = !cur_cs;
+ spi_set_cs(msg->spi, cur_cs);
+ }
+ }
+
+ msg->actual_length += xfer->len;
+ }
+
+out:
+ if (ret != 0 || !keep_cs)
+ spi_set_cs(msg->spi, false);
+
+ if (msg->status == -EINPROGRESS)
+ msg->status = ret;
+
+ spi_finalize_current_message(master);
+
+ return ret;
+}
+
+/**
+ * spi_finalize_current_transfer - report completion of a transfer
+ *
+ * Called by SPI drivers using the core transfer_one_message()
+ * implementation to notify it that the current interrupt driven
+ * transfer has finised and the next one may be scheduled.
+ */
+void spi_finalize_current_transfer(struct spi_master *master)
+{
+ complete(&master->xfer_completion);
+}
+EXPORT_SYMBOL_GPL(spi_finalize_current_transfer);
+
/**
* spi_pump_messages - kthread work function which processes spi message queue
* @work: pointer to kthread work struct contained in the master struct
@@ -836,6 +921,8 @@ static int spi_master_initialize_queue(struct spi_master
*master)
master->queued = true;
master->transfer = spi_queued_transfer;
+ if (!master->transfer_one_message)
+ master->transfer_one_message = spi_transfer_one_message;
/* Initialize and start queue */
ret = spi_init_queue(master);
@@ -1236,6 +1323,7 @@ int spi_register_master(struct spi_master *master)
spin_lock_init(&master->bus_lock_spinlock);
mutex_init(&master->bus_lock_mutex);
master->bus_lock_flag = 0;
+ init_completion(&master->xfer_completion);
/* register the device, then userspace will see it.
* registration fails if the bus ID is in use.
diff --git a/include/linux/spi/spi
[PATCH 2/2] spi/s3c64xx: Use core message handling
From: Mark Brown
Signed-off-by: Mark Brown
---
drivers/spi/spi-s3c64xx.c | 152 +-
1 file changed, 56 insertions(+), 96 deletions(-)
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index c7b36c0..25eb352 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -879,121 +879,81 @@ static int s3c64xx_spi_prepare_message(struct spi_master
*master,
return 0;
}
-static int s3c64xx_spi_transfer_one_message(struct spi_master *master,
- struct spi_message *msg)
+static int s3c64xx_spi_transfer_one(struct spi_master *master,
+ struct spi_device *spi,
+ struct spi_transfer *xfer)
{
struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
- struct spi_device *spi = msg->spi;
- struct spi_transfer *xfer;
- int status = 0, cs_toggle = 0;
+ int status;
u32 speed;
u8 bpw;
+ unsigned long flags;
+ int use_dma;
- list_for_each_entry(xfer, &msg->transfers, transfer_list) {
-
- unsigned long flags;
- int use_dma;
-
- INIT_COMPLETION(sdd->xfer_completion);
-
- /* Only BPW and Speed may change across transfers */
- bpw = xfer->bits_per_word;
- speed = xfer->speed_hz ? : spi->max_speed_hz;
-
- if (xfer->len % (bpw / 8)) {
- dev_err(&spi->dev,
- "Xfer length(%u) not a multiple of word
size(%u)\n",
- xfer->len, bpw / 8);
- status = -EIO;
- goto out;
- }
-
- if (bpw != sdd->cur_bpw || speed != sdd->cur_speed) {
- sdd->cur_bpw = bpw;
- sdd->cur_speed = speed;
- s3c64xx_spi_config(sdd);
- }
-
- /* Slave Select */
- enable_cs(sdd, spi);
-
- /* Polling method for xfers not bigger than FIFO capacity */
- use_dma = 0;
- if (!is_polling(sdd) &&
- (sdd->rx_dma.ch && sdd->tx_dma.ch &&
- (xfer->len > ((FIFO_LVL_MASK(sdd) >> 1) + 1
- use_dma = 1;
-
- spin_lock_irqsave(&sdd->lock, flags);
+ INIT_COMPLETION(sdd->xfer_completion);
- /* Pending only which is to be done */
- sdd->state &= ~RXBUSY;
- sdd->state &= ~TXBUSY;
+ /* Only BPW and Speed may change across transfers */
+ bpw = xfer->bits_per_word;
+ speed = xfer->speed_hz ? : spi->max_speed_hz;
- enable_datapath(sdd, spi, xfer, use_dma);
-
- /* Start the signals */
- writel(0, sdd->regs + S3C64XX_SPI_SLAVE_SEL);
+ if (xfer->len % (bpw / 8)) {
+ dev_err(&spi->dev,
+ "Xfer length(%u) not a multiple of word size(%u)\n",
+ xfer->len, bpw / 8);
+ return -EIO;
+ }
- /* Start the signals */
- writel(0, sdd->regs + S3C64XX_SPI_SLAVE_SEL);
+ if (bpw != sdd->cur_bpw || speed != sdd->cur_speed) {
+ sdd->cur_bpw = bpw;
+ sdd->cur_speed = speed;
+ s3c64xx_spi_config(sdd);
+ }
- spin_unlock_irqrestore(&sdd->lock, flags);
+ /* Polling method for xfers not bigger than FIFO capacity */
+ use_dma = 0;
+ if (!is_polling(sdd) &&
+ (sdd->rx_dma.ch && sdd->tx_dma.ch &&
+(xfer->len > ((FIFO_LVL_MASK(sdd) >> 1) + 1
+ use_dma = 1;
- status = wait_for_xfer(sdd, xfer, use_dma);
+ spin_lock_irqsave(&sdd->lock, flags);
- if (status) {
- dev_err(&spi->dev, "I/O Error: rx-%d tx-%d res:rx-%c
tx-%c len-%d\n",
- xfer->rx_buf ? 1 : 0, xfer->tx_buf ? 1 : 0,
- (sdd->state & RXBUSY) ? 'f' : 'p',
- (sdd->state & TXBUSY) ? 'f' : 'p',
- xfer->len);
+ /* Pending only which is to be done */
+ sdd->state &= ~RXBUSY;
+ sdd->state &= ~TXBUSY;
- if (use_dma) {
- if (xfer->tx_buf != NULL
- && (sdd->state & TXBUSY))
- s3c64xx_spi_dma_stop(sdd, &sdd->tx_dma);
- if (xfer->rx_buf != NULL
- && (sdd->state & RXBUSY))
- s3c64xx_spi_dma_stop(sdd, &sdd->rx_dma);
- }
+ enable_datapath(sdd, spi, xfer, use_dma);
- goto out;
- }
+
[RFC/PATCH V2] spi: s3c64xx: Enable Word transfer
This patch enables word transfer for s3c64xx spi driver.
User can set bits_per_word to 32 before calling spi_setup,
which would enable the word transfer mode.
Signed-off-by: Rajeshwari S Shinde
---
Chnages in V2:
- Reduced the call for s3c64xx_spi_config
drivers/spi/spi-s3c64xx.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 512b889..d1b0a2b 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -498,6 +498,17 @@ static void enable_datapath(struct s3c64xx_spi_driver_data
*sdd,
chcfg = readl(regs + S3C64XX_SPI_CH_CFG);
chcfg &= ~S3C64XX_SPI_CH_TXCH_ON;
+ if(sdd->cur_bpw == 32) {
+ /* For word transfer we need to swap bytes */
+ u32 swapcfg = (S3C64XX_SPI_SWAP_TX_EN |
S3C64XX_SPI_SWAP_TX_BYTE |
+ S3C64XX_SPI_SWAP_TX_HALF_WORD |
+ S3C64XX_SPI_SWAP_RX_EN |
+ S3C64XX_SPI_SWAP_RX_BYTE |
+ S3C64XX_SPI_SWAP_RX_HALF_WORD);
+ writel(swapcfg, regs + S3C64XX_SPI_SWAP_CFG);
+ } else
+ writel(0, regs + S3C64XX_SPI_SWAP_CFG);
+
if (dma_mode) {
chcfg &= ~S3C64XX_SPI_CH_RXCH_ON;
} else {
@@ -905,13 +916,12 @@ static int s3c64xx_spi_transfer_one_message(struct
spi_master *master,
bpw = xfer->bits_per_word;
speed = xfer->speed_hz ? : spi->max_speed_hz;
- if (xfer->len % (bpw / 8)) {
- dev_err(&spi->dev,
- "Xfer length(%u) not a multiple of word
size(%u)\n",
- xfer->len, bpw / 8);
- status = -EIO;
- goto out;
- }
+ /*
+* Enable byte tranfer if transfer length not a multiple of
+* word size
+*/
+ if (xfer->len % (bpw / 8))
+ bpw = 8;
if (bpw != sdd->cur_bpw || speed != sdd->cur_speed) {
sdd->cur_bpw = bpw;
--
1.7.12.4
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Re: [PATCH 3/5] drm/bridge: Add PTN3460 bridge driver
On Thu, Oct 10, 2013 at 01:18:05PM +0900, Inki Dae wrote: > > > I still think the pin could be replaced with a regulator. But > > > lvds-bridge node has "powerdown-gpio" property - it say this board > > > will use gpio pin - specific to board. So it seems no problem. > > No, don't model things that aren't regulators as regulators - it's just > > confusing from a usability standpoint and causes breakage when the pins > > don't behave like regulators. > It seems that there was your missing point. That _is not_ what I mentioned. > I mean that other boards can use a regulator instead of gpio pin. What I'm saying is no boards should use a regulator to control that GPIO pin, obviously if they're controlling the actual regulators that's fine but the reset signal should not be controlled via the regulator API (there are some unfortunate cases where people have done that already but let's not have any more). signature.asc Description: Digital signature
[PATCH V2] ARM: dts: exynos5: add pwm DT nodes to Exynos5250 and Exynos5420
Add the device-tree binding for the PWM controller to Exynos5250 and Exynos5420
Signed-off-by: Andrew Bresticker
Signed-off-by: Olof Johansson
Signed-off-by: Leela Krishna Amudala
---
changes since v1:
- Moved the common properties in the node to exynos5.dtsi file
suggested by Sachin Kamat
arch/arm/boot/dts/exynos5.dtsi|7 +++
arch/arm/boot/dts/exynos5250.dtsi |5 +
arch/arm/boot/dts/exynos5420.dtsi |5 +
3 files changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index 074739d..eb74ebc 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -109,6 +109,13 @@
status = "disabled";
};
+ pwm: pwm@12dd {
+ compatible = "samsung,exynos4210-pwm";
+ reg = <0x12dd 0x100>;
+ samsung,pwm-outputs = <0>, <1>, <2>, <3>;
+ #pwm-cells = <3>;
+ };
+
fimd@1440 {
compatible = "samsung,exynos5250-fimd";
interrupt-parent = <&combiner>;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 7cb5c4b..52bf8d2 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -521,6 +521,11 @@
};
};
+ pwm: pwm@12dd {
+ clocks = <&clock 311>;
+ clock-names = "timers";
+ };
+
amba {
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm/boot/dts/exynos5420.dtsi
index 09aa06c..9387b15 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -210,6 +210,11 @@
clock-names = "uart", "clk_uart_baud0";
};
+ pwm: pwm@12dd {
+ clocks = <&clock 279>;
+ clock-names = "timers";
+ };
+
dp_phy: video-phy@10040728 {
compatible = "samsung,exynos5250-dp-video-phy";
reg = <0x10040728 4>;
--
1.7.10.4
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[PATCH] s5p-jpeg: fix encoder and decoder video dev names
It is hard to distinguish between decoder and encoder video device because their names are same. So this patch fixes the names. Signed-off-by: Seung-Woo Kim --- drivers/media/platform/s5p-jpeg/jpeg-core.c |8 1 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/s5p-jpeg/jpeg-core.c b/drivers/media/platform/s5p-jpeg/jpeg-core.c index 15d2396..d5b4a0d 100644 --- a/drivers/media/platform/s5p-jpeg/jpeg-core.c +++ b/drivers/media/platform/s5p-jpeg/jpeg-core.c @@ -1387,8 +1387,8 @@ static int s5p_jpeg_probe(struct platform_device *pdev) ret = -ENOMEM; goto vb2_allocator_rollback; } - strlcpy(jpeg->vfd_encoder->name, S5P_JPEG_M2M_NAME, - sizeof(jpeg->vfd_encoder->name)); + snprintf(jpeg->vfd_encoder->name, sizeof(jpeg->vfd_encoder->name), + "%s-enc", S5P_JPEG_M2M_NAME); jpeg->vfd_encoder->fops = &s5p_jpeg_fops; jpeg->vfd_encoder->ioctl_ops= &s5p_jpeg_ioctl_ops; jpeg->vfd_encoder->minor= -1; @@ -1415,8 +1415,8 @@ static int s5p_jpeg_probe(struct platform_device *pdev) ret = -ENOMEM; goto enc_vdev_register_rollback; } - strlcpy(jpeg->vfd_decoder->name, S5P_JPEG_M2M_NAME, - sizeof(jpeg->vfd_decoder->name)); + snprintf(jpeg->vfd_decoder->name, sizeof(jpeg->vfd_decoder->name), + "%s-dec", S5P_JPEG_M2M_NAME); jpeg->vfd_decoder->fops = &s5p_jpeg_fops; jpeg->vfd_decoder->ioctl_ops= &s5p_jpeg_ioctl_ops; jpeg->vfd_decoder->minor= -1; -- 1.7.4.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RESEND] [PATCH] ARM: dts: exynos5: add pwm DT nodes to Exynos5250 and Exynos5420
Hi Sachin,
On Thu, Oct 10, 2013 at 11:18 AM, Sachin Kamat wrote:
> Hi Leela,
>
> On 10 October 2013 11:12, Leela Krishna Amudala wrote:
>> Add the device-tree binding for the PWM controller to Exynos5250 and
>> Exynos5420
>>
>> Signed-off-by: Andrew Bresticker
>> Signed-off-by: Olof Johansson
>> Signed-off-by: Leela Krishna Amudala
>> ---
>> arch/arm/boot/dts/exynos5250.dtsi |9 +
>> arch/arm/boot/dts/exynos5420.dtsi |9 +
>> 2 files changed, 18 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/exynos5250.dtsi
>> b/arch/arm/boot/dts/exynos5250.dtsi
>> index 864ae90..99abc72 100644
>> --- a/arch/arm/boot/dts/exynos5250.dtsi
>> +++ b/arch/arm/boot/dts/exynos5250.dtsi
>> @@ -521,6 +521,15 @@
>> };
>> };
>>
>> + pwm: pwm@12dd {
>> + compatible = "samsung,exynos4210-pwm";
>> + reg = <0x12dd 0x100>;
>> + samsung,pwm-outputs = <0>, <1>, <2>, <3>;
>> + #pwm-cells = <3>;
>> + clocks = <&clock 311>;
>> + clock-names = "timers";
>> + };
>> +
>> amba {
>> #address-cells = <1>;
>> #size-cells = <1>;
>> diff --git a/arch/arm/boot/dts/exynos5420.dtsi
>> b/arch/arm/boot/dts/exynos5420.dtsi
>> index d537cd7..80afc8b 100644
>> --- a/arch/arm/boot/dts/exynos5420.dtsi
>> +++ b/arch/arm/boot/dts/exynos5420.dtsi
>> @@ -206,6 +206,15 @@
>> clock-names = "uart", "clk_uart_baud0";
>> };
>>
>> + pwm: pwm@12dd {
>> + compatible = "samsung,exynos4210-pwm";
>> + reg = <0x12dd 0x100>;
>> + samsung,pwm-outputs = <0>, <1>, <2>, <3>;
>> + #pwm-cells = <3>;
>> + clocks = <&clock 279>;
>> + clock-names = "timers";
>> + };
>> +
>
> Looking at the properties in the above 2 nodes, can't we have the
> common ones defined in exynos5.dtsi?
>
Yes, we can do it, will change and post the next version
> --
> With warm regards,
> Sachin
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc"
> in
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[PATCH V2 5/5] USB: host: Rename ehci-s5p to ehci-exynos
Currently, Samsung is using 'EXYNOS' as the name of Samsung SoCs.
Thus, ehci-exynos is preferred than ehci-s5p.
Signed-off-by: Jingoo Han
---
drivers/usb/host/Kconfig |5 +-
drivers/usb/host/Makefile |2 +-
drivers/usb/host/{ehci-s5p.c => ehci-exynos.c} | 132
3 files changed, 69 insertions(+), 70 deletions(-)
rename drivers/usb/host/{ehci-s5p.c => ehci-exynos.c} (62%)
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 70cb1a9..80e72fb 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -203,12 +203,11 @@ config USB_EHCI_SH
Enables support for the on-chip EHCI controller on the SuperH.
If you use the PCI EHCI controller, this option is not necessary.
-config USB_EHCI_S5P
+config USB_EHCI_EXYNOS
tristate "EHCI support for Samsung S5P/EXYNOS SoC Series"
depends on PLAT_S5P || ARCH_EXYNOS
help
- Enable support for the Samsung S5P and Exynos3/4/5 SOC's
- on-chip EHCI controller.
+ Enable support for the Samsung Exynos SOC's on-chip EHCI controller.
config USB_EHCI_MV
bool "EHCI support for Marvell PXA/MMP USB controller"
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 0b9fdee..9dc11c2 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -34,7 +34,7 @@ obj-$(CONFIG_USB_EHCI_MXC)+= ehci-mxc.o
obj-$(CONFIG_USB_EHCI_HCD_OMAP)+= ehci-omap.o
obj-$(CONFIG_USB_EHCI_HCD_ORION) += ehci-orion.o
obj-$(CONFIG_USB_EHCI_HCD_SPEAR) += ehci-spear.o
-obj-$(CONFIG_USB_EHCI_S5P) += ehci-s5p.o
+obj-$(CONFIG_USB_EHCI_EXYNOS) += ehci-exynos.o
obj-$(CONFIG_USB_EHCI_HCD_AT91) += ehci-atmel.o
obj-$(CONFIG_USB_EHCI_MSM) += ehci-msm.o
obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
diff --git a/drivers/usb/host/ehci-s5p.c b/drivers/usb/host/ehci-exynos.c
similarity index 62%
rename from drivers/usb/host/ehci-s5p.c
rename to drivers/usb/host/ehci-exynos.c
index 45e1ad3..016352e 100644
--- a/drivers/usb/host/ehci-s5p.c
+++ b/drivers/usb/host/ehci-exynos.c
@@ -1,5 +1,5 @@
/*
- * SAMSUNG S5P USB HOST EHCI Controller
+ * SAMSUNG EXYNOS USB HOST EHCI Controller
*
* Copyright (C) 2011 Samsung Electronics Co.Ltd
* Author: Jingoo Han
@@ -28,7 +28,7 @@
#include "ehci.h"
-#define DRIVER_DESC "EHCI s5p driver"
+#define DRIVER_DESC "EHCI EXYNOS driver"
#define EHCI_INSNREG00(base) (base + 0x90)
#define EHCI_INSNREG00_ENA_INCR16 (0x1 << 25)
@@ -39,18 +39,18 @@
(EHCI_INSNREG00_ENA_INCR16 | EHCI_INSNREG00_ENA_INCR8 | \
EHCI_INSNREG00_ENA_INCR4 | EHCI_INSNREG00_ENA_INCRX_ALIGN)
-static const char hcd_name[] = "ehci-s5p";
-static struct hc_driver __read_mostly s5p_ehci_hc_driver;
+static const char hcd_name[] = "ehci-exynos";
+static struct hc_driver __read_mostly exynos_ehci_hc_driver;
-struct s5p_ehci_hcd {
+struct exynos_ehci_hcd {
struct clk *clk;
struct usb_phy *phy;
struct usb_otg *otg;
};
-#define to_s5p_ehci(hcd) (struct s5p_ehci_hcd *)(hcd_to_ehci(hcd)->priv)
+#define to_exynos_ehci(hcd) (struct exynos_ehci_hcd *)(hcd_to_ehci(hcd)->priv)
-static void s5p_setup_vbus_gpio(struct platform_device *pdev)
+static void exynos_setup_vbus_gpio(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
int err;
@@ -69,9 +69,9 @@ static void s5p_setup_vbus_gpio(struct platform_device *pdev)
dev_err(dev, "can't request ehci vbus gpio %d", gpio);
}
-static int s5p_ehci_probe(struct platform_device *pdev)
+static int exynos_ehci_probe(struct platform_device *pdev)
{
- struct s5p_ehci_hcd *s5p_ehci;
+ struct exynos_ehci_hcd *exynos_ehci;
struct usb_hcd *hcd;
struct ehci_hcd *ehci;
struct resource *res;
@@ -89,15 +89,15 @@ static int s5p_ehci_probe(struct platform_device *pdev)
if (!pdev->dev.coherent_dma_mask)
pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
- s5p_setup_vbus_gpio(pdev);
+ exynos_setup_vbus_gpio(pdev);
- hcd = usb_create_hcd(&s5p_ehci_hc_driver,
+ hcd = usb_create_hcd(&exynos_ehci_hc_driver,
&pdev->dev, dev_name(&pdev->dev));
if (!hcd) {
dev_err(&pdev->dev, "Unable to create HCD\n");
return -ENOMEM;
}
- s5p_ehci = to_s5p_ehci(hcd);
+ exynos_ehci = to_exynos_ehci(hcd);
if (of_device_is_compatible(pdev->dev.of_node,
"samsung,exynos5440-ehci"))
@@ -109,21 +109,21 @@ static int s5p_ehci_probe(struct platform_device *pdev)
dev_warn(&pdev->dev, "no platform data or transceiver
defined\n");
return -EPROBE_DEFER;
} else {
- s5p_ehci->phy = phy;
- s5p_ehci->otg = phy->otg;
+ exynos_ehci->phy = phy;
+ exynos_ehci->o
[PATCH V2 4/5] USB: ohci-exynos: Add missing usb_put_hcd()
When devm_usb_get_phy() fails, usb_put_hcd() should be called
to prevent memory leak.
Signed-off-by: Jingoo Han
---
drivers/usb/host/ohci-exynos.c |1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/host/ohci-exynos.c b/drivers/usb/host/ohci-exynos.c
index 5c877bf..aa50e18 100644
--- a/drivers/usb/host/ohci-exynos.c
+++ b/drivers/usb/host/ohci-exynos.c
@@ -91,6 +91,7 @@ static int exynos_ohci_probe(struct platform_device *pdev)
phy = devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2);
if (IS_ERR(phy)) {
+ usb_put_hcd(hcd);
dev_warn(&pdev->dev, "no platform data or transceiver
defined\n");
return -EPROBE_DEFER;
} else {
--
1.7.10.4
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[PATCH V2 1/5] ARM: SAMSUNG: Remove unused s5p_device_ehci
Since commit ca91435 "ARM: EXYNOS: Remove unused board files",
s5p_device_ehci is not used anymore. Thus, s5p_device_ehci can
be removed. Also, unnecessary S5P_DEV_USB_EHCI option is removed.
Signed-off-by: Jingoo Han
Reviewed-by: Sylwester Nawrocki
---
arch/arm/plat-samsung/Kconfig |5 -
arch/arm/plat-samsung/devs.c | 34 -
arch/arm/plat-samsung/include/plat/devs.h |1 -
3 files changed, 40 deletions(-)
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 7dfba93..99bfbb3 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -382,11 +382,6 @@ config S5P_DEV_TV
help
Compile in platform device definition for TV interface
-config S5P_DEV_USB_EHCI
- bool
- help
- Compile in platform device definition for USB EHCI
-
config S3C24XX_PWM
bool "PWM device support"
select PWM
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 8ce0ac0..25f40c9 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -49,7 +49,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -1359,39 +1358,6 @@ void __init s3c24xx_udc_set_platdata(struct
s3c2410_udc_mach_info *pd)
}
#endif /* CONFIG_PLAT_S3C24XX */
-/* USB EHCI Host Controller */
-
-#ifdef CONFIG_S5P_DEV_USB_EHCI
-static struct resource s5p_ehci_resource[] = {
- [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
- [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
-};
-
-struct platform_device s5p_device_ehci = {
- .name = "s5p-ehci",
- .id = -1,
- .num_resources = ARRAY_SIZE(s5p_ehci_resource),
- .resource = s5p_ehci_resource,
- .dev= {
- .dma_mask = &samsung_device_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- }
-};
-
-void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
-{
- struct s5p_ehci_platdata *npd;
-
- npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
- &s5p_device_ehci);
-
- if (!npd->phy_init)
- npd->phy_init = s5p_usb_phy_init;
- if (!npd->phy_exit)
- npd->phy_exit = s5p_usb_phy_exit;
-}
-#endif /* CONFIG_S5P_DEV_USB_EHCI */
-
/* USB HSOTG */
#ifdef CONFIG_S3C_DEV_USB_HSOTG
diff --git a/arch/arm/plat-samsung/include/plat/devs.h
b/arch/arm/plat-samsung/include/plat/devs.h
index 0dc4ac4..eece188 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -75,7 +75,6 @@ extern struct platform_device s3c_device_usb_hsotg;
extern struct platform_device s3c_device_usb_hsudc;
extern struct platform_device s3c_device_wdt;
-extern struct platform_device s5p_device_ehci;
extern struct platform_device s5p_device_fimc0;
extern struct platform_device s5p_device_fimc1;
extern struct platform_device s5p_device_fimc2;
--
1.7.10.4
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[PATCH V2 2/5] USB: ehci-s5p: Remove non-DT support
The non-DT for EXYNOS SoCs is not supported from v3.11.
Thus, there is no need to support non-DT for Exynos EHCI driver.
The 'include/linux/platform_data/usb-ehci-s5p.h' file has been
used for non-DT support. Thus, the 'usb-ehci-s5p.h' file can
be removed.
Signed-off-by: Jingoo Han
---
drivers/usb/host/ehci-s5p.c| 32
include/linux/platform_data/usb-ehci-s5p.h | 21 --
2 files changed, 4 insertions(+), 49 deletions(-)
delete mode 100644 include/linux/platform_data/usb-ehci-s5p.h
diff --git a/drivers/usb/host/ehci-s5p.c b/drivers/usb/host/ehci-s5p.c
index 7c3de95..45e1ad3 100644
--- a/drivers/usb/host/ehci-s5p.c
+++ b/drivers/usb/host/ehci-s5p.c
@@ -20,7 +20,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -47,11 +46,8 @@ struct s5p_ehci_hcd {
struct clk *clk;
struct usb_phy *phy;
struct usb_otg *otg;
- struct s5p_ehci_platdata *pdata;
};
-static struct s5p_ehci_platdata empty_platdata;
-
#define to_s5p_ehci(hcd) (struct s5p_ehci_hcd *)(hcd_to_ehci(hcd)->priv)
static void s5p_setup_vbus_gpio(struct platform_device *pdev)
@@ -75,7 +71,6 @@ static void s5p_setup_vbus_gpio(struct platform_device *pdev)
static int s5p_ehci_probe(struct platform_device *pdev)
{
- struct s5p_ehci_platdata *pdata = dev_get_platdata(&pdev->dev);
struct s5p_ehci_hcd *s5p_ehci;
struct usb_hcd *hcd;
struct ehci_hcd *ehci;
@@ -105,21 +100,14 @@ static int s5p_ehci_probe(struct platform_device *pdev)
s5p_ehci = to_s5p_ehci(hcd);
if (of_device_is_compatible(pdev->dev.of_node,
- "samsung,exynos5440-ehci")) {
- s5p_ehci->pdata = &empty_platdata;
+ "samsung,exynos5440-ehci"))
goto skip_phy;
- }
phy = devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2);
if (IS_ERR(phy)) {
- /* Fallback to pdata */
- if (!pdata) {
- usb_put_hcd(hcd);
- dev_warn(&pdev->dev, "no platform data or transceiver
defined\n");
- return -EPROBE_DEFER;
- } else {
- s5p_ehci->pdata = pdata;
- }
+ usb_put_hcd(hcd);
+ dev_warn(&pdev->dev, "no platform data or transceiver
defined\n");
+ return -EPROBE_DEFER;
} else {
s5p_ehci->phy = phy;
s5p_ehci->otg = phy->otg;
@@ -167,8 +155,6 @@ skip_phy:
if (s5p_ehci->phy)
usb_phy_init(s5p_ehci->phy);
- else if (s5p_ehci->pdata->phy_init)
- s5p_ehci->pdata->phy_init(pdev, USB_PHY_TYPE_HOST);
ehci = hcd_to_ehci(hcd);
ehci->caps = hcd->regs;
@@ -189,8 +175,6 @@ skip_phy:
fail_add_hcd:
if (s5p_ehci->phy)
usb_phy_shutdown(s5p_ehci->phy);
- else if (s5p_ehci->pdata->phy_exit)
- s5p_ehci->pdata->phy_exit(pdev, USB_PHY_TYPE_HOST);
fail_io:
clk_disable_unprepare(s5p_ehci->clk);
fail_clk:
@@ -210,8 +194,6 @@ static int s5p_ehci_remove(struct platform_device *pdev)
if (s5p_ehci->phy)
usb_phy_shutdown(s5p_ehci->phy);
- else if (s5p_ehci->pdata->phy_exit)
- s5p_ehci->pdata->phy_exit(pdev, USB_PHY_TYPE_HOST);
clk_disable_unprepare(s5p_ehci->clk);
@@ -225,7 +207,6 @@ static int s5p_ehci_suspend(struct device *dev)
{
struct usb_hcd *hcd = dev_get_drvdata(dev);
struct s5p_ehci_hcd *s5p_ehci = to_s5p_ehci(hcd);
- struct platform_device *pdev = to_platform_device(dev);
bool do_wakeup = device_may_wakeup(dev);
int rc;
@@ -237,8 +218,6 @@ static int s5p_ehci_suspend(struct device *dev)
if (s5p_ehci->phy)
usb_phy_shutdown(s5p_ehci->phy);
- else if (s5p_ehci->pdata->phy_exit)
- s5p_ehci->pdata->phy_exit(pdev, USB_PHY_TYPE_HOST);
clk_disable_unprepare(s5p_ehci->clk);
@@ -249,7 +228,6 @@ static int s5p_ehci_resume(struct device *dev)
{
struct usb_hcd *hcd = dev_get_drvdata(dev);
struct s5p_ehci_hcd *s5p_ehci = to_s5p_ehci(hcd);
- struct platform_device *pdev = to_platform_device(dev);
clk_prepare_enable(s5p_ehci->clk);
@@ -258,8 +236,6 @@ static int s5p_ehci_resume(struct device *dev)
if (s5p_ehci->phy)
usb_phy_init(s5p_ehci->phy);
- else if (s5p_ehci->pdata->phy_init)
- s5p_ehci->pdata->phy_init(pdev, USB_PHY_TYPE_HOST);
/* DMA burst Enable */
writel(EHCI_INSNREG00_ENABLE_DMA_BURST, EHCI_INSNREG00(hcd->regs));
diff --git a/include/linux/platform_data/usb-ehci-s5p.h
b/include/linux/platform_data/usb-ehci-s5p.h
deleted file mode 100644
index 5f28cae..000
--- a/include/linux/platform_data/usb-ehci-s5p.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * C
[PATCH V2 3/5] USB: ohci-exynos: Remove non-DT support
The non-DT for EXYNOS SoCs is not supported from v3.11.
Thus, there is no need to support non-DT for Exynos OHCI driver.
The 'include/linux/platform_data/usb-ohci-exynos.h' file has been
used for non-DT support. Thus, the 'usb-ohci-exynos.h' file can
be removed.
Signed-off-by: Jingoo Han
---
drivers/usb/host/ohci-exynos.c| 16 ++--
include/linux/platform_data/usb-ohci-exynos.h | 21 -
2 files changed, 2 insertions(+), 35 deletions(-)
delete mode 100644 include/linux/platform_data/usb-ohci-exynos.h
diff --git a/drivers/usb/host/ohci-exynos.c b/drivers/usb/host/ohci-exynos.c
index f5f372e..5c877bf 100644
--- a/drivers/usb/host/ohci-exynos.c
+++ b/drivers/usb/host/ohci-exynos.c
@@ -18,7 +18,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -38,7 +37,6 @@ struct exynos_ohci_hcd {
struct clk *clk;
struct usb_phy *phy;
struct usb_otg *otg;
- struct exynos4_ohci_platdata *pdata;
};
static void exynos_ohci_phy_enable(struct platform_device *pdev)
@@ -48,8 +46,6 @@ static void exynos_ohci_phy_enable(struct platform_device
*pdev)
if (exynos_ohci->phy)
usb_phy_init(exynos_ohci->phy);
- else if (exynos_ohci->pdata && exynos_ohci->pdata->phy_init)
- exynos_ohci->pdata->phy_init(pdev, USB_PHY_TYPE_HOST);
}
static void exynos_ohci_phy_disable(struct platform_device *pdev)
@@ -59,13 +55,10 @@ static void exynos_ohci_phy_disable(struct platform_device
*pdev)
if (exynos_ohci->phy)
usb_phy_shutdown(exynos_ohci->phy);
- else if (exynos_ohci->pdata && exynos_ohci->pdata->phy_exit)
- exynos_ohci->pdata->phy_exit(pdev, USB_PHY_TYPE_HOST);
}
static int exynos_ohci_probe(struct platform_device *pdev)
{
- struct exynos4_ohci_platdata *pdata = dev_get_platdata(&pdev->dev);
struct exynos_ohci_hcd *exynos_ohci;
struct usb_hcd *hcd;
struct resource *res;
@@ -98,13 +91,8 @@ static int exynos_ohci_probe(struct platform_device *pdev)
phy = devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2);
if (IS_ERR(phy)) {
- /* Fallback to pdata */
- if (!pdata) {
- dev_warn(&pdev->dev, "no platform data or transceiver
defined\n");
- return -EPROBE_DEFER;
- } else {
- exynos_ohci->pdata = pdata;
- }
+ dev_warn(&pdev->dev, "no platform data or transceiver
defined\n");
+ return -EPROBE_DEFER;
} else {
exynos_ohci->phy = phy;
exynos_ohci->otg = phy->otg;
diff --git a/include/linux/platform_data/usb-ohci-exynos.h
b/include/linux/platform_data/usb-ohci-exynos.h
deleted file mode 100644
index c256c59..000
--- a/include/linux/platform_data/usb-ohci-exynos.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * Copyright (C) 2011 Samsung Electronics Co.Ltd
- * http://www.samsung.com/
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#ifndef __MACH_EXYNOS_OHCI_H
-#define __MACH_EXYNOS_OHCI_H
-
-struct exynos4_ohci_platdata {
- int (*phy_init)(struct platform_device *pdev, int type);
- int (*phy_exit)(struct platform_device *pdev, int type);
-};
-
-extern void exynos4_ohci_set_platdata(struct exynos4_ohci_platdata *pd);
-
-#endif /* __MACH_EXYNOS_OHCI_H */
--
1.7.10.4
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[PATCH V2 0/5] USB: host: Remove non-DT support for Exynos EHCI and OHCI
This patchset removes non-DT support for Exynos EHCI and OHCI
from arch and driver directories, because the non-DT for EXYNOS SoCs
is not supported from v3.11. Also, missing usb_put_hcd() is added to
prevent memory leak.
In order to keep the consistency, ehci-s5p.c is changed to
ehci-exynos.c. So, the names of Exynos EHCI and OHCI drivers are
as below:
- ehci-exynos.c
- ohci-exynos.c
In order to prevent build error issues or merge conflict,
this patchset includes the following patches that were
previously submitted.
- [PATCH] ARM: SAMSUNG: Remove unused s5p_device_ehci
(http://www.spinics.net/lists/linux-samsung-soc/msg23397.html)
- [PATCH] USB: ohci-exynos: Add missing usb_put_hcd() to prevent memory leak
(http://www.spinics.net/lists/linux-usb/msg95282.html)
These patches were tested on Exynos5250.
Changes from v1:
* Changed the order of patches in order to avoid unnecessary code churn
Jingoo Han (5)
ARM: SAMSUNG: Remove unused s5p_device_ehci
USB: ehci-s5p: Remove non-DT support
USB: ohci-exynos: Remove non-DT support
USB: ohci-exynos: Add missing usb_put_hcd()
USB: host: Rename ehci-s5p to ehci-exynos
---
arch/arm/plat-samsung/Kconfig |5 -
arch/arm/plat-samsung/devs.c | 34 -
arch/arm/plat-samsung/include/plat/devs.h |1 -
drivers/usb/host/Kconfig |5 +-
drivers/usb/host/Makefile |2 +-
drivers/usb/host/{ehci-s5p.c => ehci-exynos.c} | 164 ++--
drivers/usb/host/ohci-exynos.c | 17 +--
include/linux/platform_data/usb-ehci-s5p.h | 21 ---
include/linux/platform_data/usb-ohci-exynos.h | 21 ---
9 files changed, 76 insertions(+), 194 deletions(-)
rename drivers/usb/host/{ehci-s5p.c => ehci-exynos.c} (55%)
delete mode 100644 include/linux/platform_data/usb-ehci-s5p.h
delete mode 100644 include/linux/platform_data/usb-ohci-exynos.h
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[PATCH] s5p-jpeg: fix uninitialized use in hdr parse
For hdr parse error, it can return false without any assignments
which cause build warning.
Signed-off-by: Seung-Woo Kim
---
drivers/media/platform/s5p-jpeg/jpeg-core.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/media/platform/s5p-jpeg/jpeg-core.c
b/drivers/media/platform/s5p-jpeg/jpeg-core.c
index 15d2396..7db374e 100644
--- a/drivers/media/platform/s5p-jpeg/jpeg-core.c
+++ b/drivers/media/platform/s5p-jpeg/jpeg-core.c
@@ -442,14 +442,14 @@ static bool s5p_jpeg_parse_hdr(struct s5p_jpeg_q_data
*result,
while (notfound) {
c = get_byte(&jpeg_buffer);
if (c == -1)
- break;
+ return false;
if (c != 0xff)
continue;
do
c = get_byte(&jpeg_buffer);
while (c == 0xff);
if (c == -1)
- break;
+ return false;
if (c == 0)
continue;
length = 0;
--
1.7.4.1
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Re: [PATCH 3/5] USB: ehci-exynos: Remove non-DT support
On Thursday, October 10, 2013 3:49 PM, Sachin Kamat wrote: > On 10 October 2013 12:01, Jingoo Han wrote: > > The non-DT for EXYNOS SoCs is not supported from v3.11. > > Thus, there is no need to support non-DT for Exynos EHCI driver. > > > > The 'include/linux/platform_data/usb-ehci-exynos.h' file has been > > used for non-DT support. Thus, the 'usb-ehci-exynos.h' file can > > be removed. > > Wouldn't it be better to do the non-DT cleanup first and then the renaming. > This would avoid unnecessary code churn. For e.g., since the header file is > deleted in this patch, it doesn't make sense to rename the file and > other variable/function > names in the previous patch. Hi Sachin Kamat, OK, I see. I will do the non-DT cleanup first and then the renaming, as you mentioned. Then, the v2 patches will be as below: [PATCH 1/5] ARM: SAMSUNG: Remove unused s5p_device_ehci [PATCH 2/5] USB: ehci-s5p: Remove non-DT support [PATCH 3/5] USB: ohci-exynos: Remove non-DT support [PATCH 4/5] USB: host: Rename ehci-s5p to ehci-exynos [PATCH 5/5] USB: ohci-exynos: Add missing usb_put_hcd() Best regards, Jingoo Han -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
