Re: [GIT PULL 1/6] Samsung cleanup for v3.13

2013-10-27 Thread Olof Johansson
On Mon, Oct 21, 2013 at 07:14:35AM +0900, Kukjin Kim wrote:
 The following changes since commit 4a10c2ac2f368583138b774ca41fac4207911983:
 
   Linux 3.12-rc2 (2013-09-23 15:41:09 -0700)
 
 are available in the git repository at:
 

 git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
 tags/samsung-cleanup
 
 for you to fetch changes up to ae3c5d74ea0d5e2f1c32c527e5de36c7614525af:
 
   ARM: EXYNOS: remove CONFIG_MACH_EXYNOS[4, 5]_DT config options
 (2013-10-21 06:35:47 +0900)

Thanks, pulled into next/cleanup. Trivial add/add conflict when merging
into for-next due to the 64xx DT platform, no big deal.


-Olof
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Re: [GIT PULL 3/6] Samsung s3c64xx-common-clk for v3.13

2013-10-27 Thread Olof Johansson
On Mon, Oct 21, 2013 at 07:14:59AM +0900, Kukjin Kim wrote:
 The following changes since commit 272b98c6455f00884f0350f775c5342358ebb73f:
 
   Linux 3.12-rc1 (2013-09-16 16:17:51 -0400)
 
 are available in the git repository at:
 

 git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
 tags/s3c64xx-common-clk
 
 for you to fetch changes up to 66fcbe6b7c2827866100837611c9838298a28486:
 
   ARM: S3C64XX: Remove old clock management code (2013-09-17
 06:47:36 +0900)
 
 
 use common clock for s3c64xx
 - remove old clock management code
 - migrate clock handling to common clock framework
 
 
 Tomasz Figa (5):
   ARM: SAMSUNG: Add soc_is_s3c6400/s3c6410 macros
   ARM: S3C64XX: Use clk_prepare_enable/clk_disable_unprepare in dma.c
   usb: ohci-s3c2410.c: Use clk_prepare_enable/clk_disable_unprepare
   ARM: S3C64XX: Migrate clock handling to Common Clock Framework
   ARM: S3C64XX: Remove old clock management code

We already have this branch in our tree, so there's no need to pull it. Please
check your workflow to avoid sending redundant pull requests in the future.


-Olof
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Re: [GIT PULL 4/6] Samsung s3c64xx-dt for v3.13

2013-10-27 Thread Olof Johansson
On Mon, Oct 21, 2013 at 07:15:12AM +0900, Kukjin Kim wrote:
 The following changes since commit 272b98c6455f00884f0350f775c5342358ebb73f:
 
   Linux 3.12-rc1 (2013-09-16 16:17:51 -0400)
 
 are available in the git repository at:
 

 git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
 tags/s3c64xx-dt
 
 for you to fetch changes up to 2ec35a4252eae3d5277af041bd1b5ae4f6183cad:
 
   ARM: dts: Add dts file for S3C6410-based SMDK6410 board
 (2013-09-17 06:48:29 +0900)
 
 
 Device tree for S3C64XX
 - based on common-clk-s3c64xx branch
 - add s3c64xx dt board file for using dt
 - add dts file for s3c6410-smdk6410 board
 - add dts file for s3c6410-mini6410 board

Same here, we already have it.

If you try to merge the different pull requests into our for-next branch before
you send them out you would see this. It would also give you an indication
whether we would see merge conflicts at our end so you can give us a heads up
about it.


-Olof
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Re: [GIT PULL 5/6] Samsung s3c24xx-dma for v3.13

2013-10-27 Thread Olof Johansson
On Mon, Oct 21, 2013 at 07:15:25AM +0900, Kukjin Kim wrote:
 The following changes since commit 15c03dd4859ab16f9212238f29dd315654aa94f6:
 
   Linux 3.12-rc3 (2013-09-29 15:02:38 -0700)
 
 are available in the git repository at:
 

 git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
 tags/s3c24xx-dma
 
 for you to fetch changes up to 1fecf8958eb7f90791f2c7e99afac393b64fa976:
 
   ARM: S3C24XX: add dma pdata for s3c2410, s3c2440 and s3c2442
 (2013-10-21 05:32:48 +0900)
 
 
 add dmaengine based s3c24xx dma driver

Thanks, pulled into next/drivers.

But please write better tag descriptions. What I ended up writing up for this
was:


From Kukjin Kim, this branch adds device-tree support to the DMA controller
on the older Samsung SoCs. It also adds support for one of the missing SoCs
in the family (2410).

The driver has been Ack:ed by Vinod Koul, but is merged through here due
to dependencies with platform code.



-Olof
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Re: [PATCH] ARM: dts: disable PCIe for SD5v1 board

2013-10-27 Thread Olof Johansson
On Wed, Sep 4, 2013 at 11:08 PM, Jingoo Han jg1@samsung.com wrote:
 Disable PCIe for SD5v1 board, because there is no PCIe slot
 on SD5v1 board.

 Signed-off-by: Jingoo Han jg1@samsung.com
 ---
 Tested on SD5v1 board.

  arch/arm/boot/dts/exynos5440-sd5v1.dts |7 +++
  1 file changed, 7 insertions(+)

 diff --git a/arch/arm/boot/dts/exynos5440-sd5v1.dts 
 b/arch/arm/boot/dts/exynos5440-sd5v1.dts
 index 5b22508..78a239d 100644
 --- a/arch/arm/boot/dts/exynos5440-sd5v1.dts
 +++ b/arch/arm/boot/dts/exynos5440-sd5v1.dts
 @@ -36,4 +36,11 @@
 status = disabled;
 };

 +   pcie@29 {
 +   status = disabled;
 +   };
 +
 +   pcie@2a {
 +   status = disabled;
 +   };
  };

Usually IP blocks like these are always left disabled in the dtsi, and
explicitly _enabled_ in the DTS on boards that make use of that part
of the chip.
So the real solution here should be to move the disabling to the 5440
.dtsi instead.


-Olof
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Re: [GIT PULL 6/6] Samsung update for v3.13

2013-10-27 Thread Olof Johansson
On Mon, Oct 21, 2013 at 07:15:39AM +0900, Kukjin Kim wrote:
 The following changes since commit 4a10c2ac2f368583138b774ca41fac4207911983:
 
   Linux 3.12-rc2 (2013-09-23 15:41:09 -0700)
 
 are available in the git repository at:
 

 git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
 tags/exynos-dt
 
 for you to fetch changes up to c6ad2259c629bef992be5ee82d3e74cd1e90c440:
 
   ARM: dts: disable PCIe for SD5v1 board (2013-10-08 06:58:01 +0900)
 
 
 update device tree for exynos
 - add MIPI PHY node for exynos4
 - update regulator for origen and exynos5250-arndale
 - add support HDMI for exynos5250, exynos5420
 - disable PCIe for exynos5440-sd5v1

Hi,

The last patch on this branch should be done differently (the disable should be
in the dtsi instead).

Since that patch is at the very end of the branch, I'll pull in everything
but that in next/dt. You can send the patch for 5440 PCIe separately (even
as a patch instead of in a branch) and I can apply it later -- ideally
before -rc1 but at least not too long after.


-Olof
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Re: [PATCH] ARM: dts: disable PCIe for SD5v1 board

2013-10-27 Thread Jingoo Han
On Monday, October 28, 2013 1:52 PM, Olof Johansson wrote:
 On Wed, Sep 4, 2013 at 11:08 PM, Jingoo Han jg1@samsung.com wrote:
  Disable PCIe for SD5v1 board, because there is no PCIe slot
  on SD5v1 board.
 
  Signed-off-by: Jingoo Han jg1@samsung.com
  ---
  Tested on SD5v1 board.
 
   arch/arm/boot/dts/exynos5440-sd5v1.dts |7 +++
   1 file changed, 7 insertions(+)
 
  diff --git a/arch/arm/boot/dts/exynos5440-sd5v1.dts 
  b/arch/arm/boot/dts/exynos5440-sd5v1.dts
  index 5b22508..78a239d 100644
  --- a/arch/arm/boot/dts/exynos5440-sd5v1.dts
  +++ b/arch/arm/boot/dts/exynos5440-sd5v1.dts
  @@ -36,4 +36,11 @@
  status = disabled;
  };
 
  +   pcie@29 {
  +   status = disabled;
  +   };
  +
  +   pcie@2a {
  +   status = disabled;
  +   };
   };
 
 Usually IP blocks like these are always left disabled in the dtsi, and
 explicitly _enabled_ in the DTS on boards that make use of that part
 of the chip.
 So the real solution here should be to move the disabling to the 5440
 .dtsi instead.

OK, right.
Thank you for your guidance.

Then, do you mean the following?
If it is right, I will send the v2 patch.

./arch/arm/boot/dts/exynos5440.dtsi
pcie@29 {
.
status = disabled;
};
pcie@2a {
.
status = disabled;
};

./arch/arm/boot/dts/exynos5440-ssdk5440.dts
pcie@29 {
.
status = okay;
};
pcie@2a {
.
status = okay;
};

Best regards,
Jingoo Han

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[PATCH v5] iio: exynos_adc: use wait_for_completion_timeout instead of interruptible

2013-10-27 Thread Naveen Krishna Chatradhi
1. The irq routine is so simple (just one register read) shouldn't be long
   Hence, reduce the timeout to 100milli secs,
2. With 100ms of wait time, interruptible is very much unnecessary.
   Hence, use wait_for_completion_timeout instead of
   wait_for_completion_interruptible_timeout
3. Reset software if a timeout happens.
4. Add INIT_COMPLETION before the wait_for_completion_timeout in raw_read()

Note: submitted for review at https://patchwork.kernel.org/patch/2279591/

Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Cc: Doug Anderson diand...@chromium.org
Cc: Lars-Peter Clausen l...@metafoo.de
Reviewed-on: https://chromium-review.googlesource.com/172724
Reviewed-by: Doug Anderson diand...@chromium.org
---
Changes since v1:
As per discussion at
http://marc.info/?l=linux-kernelm=136517637228869w=3

Changes since v2:
None.
Rebased and reposting.

Changes since v3:
1. commit message change and
2. removed an unncessary assignment

Changes since v4:
Moved INIT_COMPLETION call to the starting of the function


 drivers/iio/adc/exynos_adc.c | 69 
 1 file changed, 38 insertions(+), 31 deletions(-)

diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
index 0f2ca60..a675751 100644
--- a/drivers/iio/adc/exynos_adc.c
+++ b/drivers/iio/adc/exynos_adc.c
@@ -81,7 +81,7 @@ enum adc_version {
 #define ADC_CON_EN_START   (1u  0)
 #define ADC_DATX_MASK  0xFFF
 
-#define EXYNOS_ADC_TIMEOUT (msecs_to_jiffies(1000))
+#define EXYNOS_ADC_TIMEOUT (msecs_to_jiffies(100))
 
 struct exynos_adc {
void __iomem*regs;
@@ -111,6 +111,30 @@ static inline unsigned int exynos_adc_get_version(struct 
platform_device *pdev)
return (unsigned int)match-data;
 }
 
+static void exynos_adc_hw_init(struct exynos_adc *info)
+{
+   u32 con1, con2;
+
+   if (info-version == ADC_V2) {
+   con1 = ADC_V2_CON1_SOFT_RESET;
+   writel(con1, ADC_V2_CON1(info-regs));
+
+   con2 = ADC_V2_CON2_OSEL | ADC_V2_CON2_ESEL |
+   ADC_V2_CON2_HIGHF | ADC_V2_CON2_C_TIME(0);
+   writel(con2, ADC_V2_CON2(info-regs));
+
+   /* Enable interrupts */
+   writel(1, ADC_V2_INT_EN(info-regs));
+   } else {
+   /* set default prescaler values and Enable prescaler */
+   con1 =  ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN;
+
+   /* Enable 12-bit ADC resolution */
+   con1 |= ADC_V1_CON_RES;
+   writel(con1, ADC_V1_CON(info-regs));
+   }
+}
+
 static int exynos_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val,
@@ -120,11 +144,13 @@ static int exynos_read_raw(struct iio_dev *indio_dev,
struct exynos_adc *info = iio_priv(indio_dev);
unsigned long timeout;
u32 con1, con2;
+   int ret;
 
if (mask != IIO_CHAN_INFO_RAW)
return -EINVAL;
 
mutex_lock(indio_dev-mlock);
+   INIT_COMPLETION(info-completion);
 
/* Select the channel to be used and Trigger conversion */
if (info-version == ADC_V2) {
@@ -144,16 +170,21 @@ static int exynos_read_raw(struct iio_dev *indio_dev,
ADC_V1_CON(info-regs));
}
 
-   timeout = wait_for_completion_interruptible_timeout
+   timeout = wait_for_completion_timeout
(info-completion, EXYNOS_ADC_TIMEOUT);
-   *val = info-value;
+   if (timeout == 0) {
+   dev_warn(indio_dev-dev, Conversion timed out! Resetting\n);
+   exynos_adc_hw_init(info);
+   ret = -ETIMEDOUT;
+   } else {
+   *val = info-value;
+   *val2 = 0;
+   ret = IIO_VAL_INT;
+   }
 
mutex_unlock(indio_dev-mlock);
 
-   if (timeout == 0)
-   return -ETIMEDOUT;
-
-   return IIO_VAL_INT;
+   return ret;
 }
 
 static irqreturn_t exynos_adc_isr(int irq, void *dev_id)
@@ -225,30 +256,6 @@ static int exynos_adc_remove_devices(struct device *dev, 
void *c)
return 0;
 }
 
-static void exynos_adc_hw_init(struct exynos_adc *info)
-{
-   u32 con1, con2;
-
-   if (info-version == ADC_V2) {
-   con1 = ADC_V2_CON1_SOFT_RESET;
-   writel(con1, ADC_V2_CON1(info-regs));
-
-   con2 = ADC_V2_CON2_OSEL | ADC_V2_CON2_ESEL |
-   ADC_V2_CON2_HIGHF | ADC_V2_CON2_C_TIME(0);
-   writel(con2, ADC_V2_CON2(info-regs));
-
-   /* Enable interrupts */
-   writel(1, ADC_V2_INT_EN(info-regs));
-   } else {
-   /* set default prescaler values and Enable prescaler */
-   con1 =  ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN;
-
-   /* Enable 12-bit ADC resolution */
-   con1 |= ADC_V1_CON_RES;
-   writel(con1,