Re: [PATCH v9 1/2] regulator: Add driver for max77802 PMIC PMIC regulators
On Mon, Aug 18, 2014 at 2:02 PM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
The MAX77802 PMIC has 10 high-efficiency Buck and 32 Low-dropout
(LDO) regulators. This patch adds support for all these regulators
found on the MAX77802 PMIC and is based on a driver added by Simon
Glass to the Chrome OS kernel 3.8 tree.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
---
Changes since v7:
- Remove DVS support since that can be added as a follow up.
Changes since v6: None
Changes since v5:
- Take out the mfd changes from v4 that were squashed by mistake.
Suggested by Lee Jones.
Changes since v4: None
Changes since v3:
- Set the supply_name for regulators to lookup their parent supply node.
Suggested by Mark Brown.
- Change Exyno5 for Exynos5420/Exynos5800 in regulator driver Kconfig.
Suggested by Doug Anderson.
---
drivers/regulator/Kconfig| 9 +
drivers/regulator/Makefile | 1 +
drivers/regulator/max77802.c | 578
+++
3 files changed, 588 insertions(+)
create mode 100644 drivers/regulator/max77802.c
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 2dc8289..8134a99 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -387,6 +387,15 @@ config REGULATOR_MAX77693
and one current regulator 'CHARGER'. This is suitable for
Exynos-4x12 chips.
+config REGULATOR_MAX77802
+ tristate Maxim 77802 regulator
+ depends on MFD_MAX77686
+ help
+ This driver controls a Maxim 77802 regulator
+ via I2C bus. The provided regulator is suitable for
+ Exynos5420/Exynos5800 SoCs to control various voltages.
+ It includes support for control of voltage and ramp speed.
+
config REGULATOR_MC13XXX_CORE
tristate
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index aa4a6aa..b4ec6c8 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -52,6 +52,7 @@ obj-$(CONFIG_REGULATOR_MAX8997) += max8997.o
obj-$(CONFIG_REGULATOR_MAX8998) += max8998.o
obj-$(CONFIG_REGULATOR_MAX77686) += max77686.o
obj-$(CONFIG_REGULATOR_MAX77693) += max77693.o
+obj-$(CONFIG_REGULATOR_MAX77802) += max77802.o
obj-$(CONFIG_REGULATOR_MC13783) += mc13783-regulator.o
obj-$(CONFIG_REGULATOR_MC13892) += mc13892-regulator.o
obj-$(CONFIG_REGULATOR_MC13XXX_CORE) += mc13xxx-regulator-core.o
diff --git a/drivers/regulator/max77802.c b/drivers/regulator/max77802.c
new file mode 100644
index 000..5f022f8
--- /dev/null
+++ b/drivers/regulator/max77802.c
@@ -0,0 +1,578 @@
+/*
+ * max77802.c - Regulator driver for the Maxim 77802
+ *
+ * Copyright (C) 2013-2014 Google, Inc
+ * Simon Glass s...@chromium.org
+ *
+ * Copyright (C) 2012 Samsung Electronics
+ * Chiwoong Byun woong.b...@smasung.com
+ * Jonghwa Lee jonghwa3@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * This driver is based on max8997.c
+ */
+
+#include linux/kernel.h
+#include linux/bug.h
+#include linux/err.h
+#include linux/gpio.h
+#include linux/slab.h
+#include linux/gpio/consumer.h
+#include linux/platform_device.h
+#include linux/regulator/driver.h
+#include linux/regulator/machine.h
+#include linux/regulator/of_regulator.h
+#include linux/mfd/max77686.h
+#include linux/mfd/max77686-private.h
+
+/* Default ramp delay in case it is not manually set */
+#define MAX77802_RAMP_DELAY10 /* uV/us */
+
+#define MAX77802_OPMODE_SHIFT_LDO 6
+#define MAX77802_OPMODE_BUCK234_SHIFT 4
+#define MAX77802_OPMODE_MASK 0x3
+
+#define MAX77802_VSEL_MASK 0x3F
+#define MAX77802_DVS_VSEL_MASK 0xFF
+
+#define MAX77802_RAMP_RATE_MASK_2BIT 0xC0
+#define MAX77802_RAMP_RATE_SHIFT_2BIT 6
+#define MAX77802_RAMP_RATE_MASK_4BIT 0xF0
+#define MAX77802_RAMP_RATE_SHIFT_4BIT 4
+
+/* MAX77802 has two register formats: 2-bit and 4-bit */
+static const unsigned int ramp_table_77802_2bit[] = {
+ 12500,
+ 25000,
+ 5,
+ 10,
+};
+
+static unsigned int ramp_table_77802_4bit[] = {
+ 1000, 2000, 3030, 4000,
+ 5000, 5880, 7140, 8330,
+ 9090, 1, 0, 12500,
+ 16670, 25000, 5, 10,
+};
+
+struct max77802_regulator_prv {
+ int num_regulators;
+
[PATCH 00/15] drm/exynos/ipp: image post processing fixes and improvements, part four
This set of patches contains various improvement and fixes for exynos_drm ipp framework. The patchset is based on exynos-drm-next branch. IPP framework was tested for regressions on exynos4210-trats target. Regards Andrzej Andrzej Hajda (15): drm/exynos/ipp: remove fake pm callbacks drm/exynos/ipp: cancel works before command node clean drm/exynos/ipp: move file reference from memory to command node drm/exynos/ipp: remove only related commands on file close drm/exynos/ipp: remove unused field in command node drm/exynos/ipp: free partially allocated resources on error drm/exynos/ipp: move nodes cleaning to separate function drm/exynos/ipp: clean memory nodes on command node cleaning drm/exynos/ipp: replace work_struct casting with better constructs drm/exynos/ipp: stop hardware before freeing memory drm/exynos/ipp: remove events during command cleaning drm/exynos/fimc: avoid clearing overflow bits drm/exynos/fimc: do not enable fimc twice drm/exynos/fimc: simplify buffer queuing drm/exynos/fimc: fix source buffer registers drivers/gpu/drm/exynos/exynos_drm_fimc.c| 90 ++- drivers/gpu/drm/exynos/exynos_drm_gsc.c | 3 +- drivers/gpu/drm/exynos/exynos_drm_ipp.c | 369 drivers/gpu/drm/exynos/exynos_drm_ipp.h | 4 +- drivers/gpu/drm/exynos/exynos_drm_rotator.c | 3 +- 5 files changed, 180 insertions(+), 289 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 02/15] drm/exynos/ipp: cancel works before command node clean
All pending works should be canceled prior to its removal.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
index da917ca..9770966 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
@@ -502,6 +502,11 @@ err_clear:
static void ipp_clean_cmd_node(struct ipp_context *ctx,
struct drm_exynos_ipp_cmd_node *c_node)
{
+ /* cancel works */
+ cancel_work_sync(c_node-start_work-work);
+ cancel_work_sync(c_node-stop_work-work);
+ cancel_work_sync(c_node-event_work-work);
+
/* delete list */
list_del(c_node-list);
--
1.9.1
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[PATCH 12/15] drm/exynos/fimc: avoid clearing overflow bits
Overflow bits shall be cleared by H/W. Signed-off-by: Andrzej Hajda a.ha...@samsung.com --- drivers/gpu/drm/exynos/exynos_drm_fimc.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c b/drivers/gpu/drm/exynos/exynos_drm_fimc.c index 3264ed3..bbaf4f9 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimc.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimc.c @@ -341,9 +341,6 @@ static bool fimc_check_ovf(struct fimc_context *ctx) fimc_set_bits(ctx, EXYNOS_CIWDOFST, EXYNOS_CIWDOFST_CLROVFIY | EXYNOS_CIWDOFST_CLROVFICB | EXYNOS_CIWDOFST_CLROVFICR); - fimc_clear_bits(ctx, EXYNOS_CIWDOFST, - EXYNOS_CIWDOFST_CLROVFIY | EXYNOS_CIWDOFST_CLROVFICB | - EXYNOS_CIWDOFST_CLROVFICR); dev_err(ippdrv-dev, occurred overflow at %d, status 0x%x.\n, ctx-id, status); -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 15/15] drm/exynos/fimc: fix source buffer registers
FIMC in default mode of operation uses only one input buffer,
but the driver used also second buffer, as a result only the
first frame was processed correctly. The patch fixes it.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_fimc.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c
b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
index b20078e..e985253 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
@@ -720,24 +720,24 @@ static int fimc_src_set_addr(struct device *dev,
case IPP_BUF_ENQUEUE:
config = property-config[EXYNOS_DRM_OPS_SRC];
fimc_write(ctx, buf_info-base[EXYNOS_DRM_PLANAR_Y],
- EXYNOS_CIIYSA(buf_id));
+ EXYNOS_CIIYSA0);
if (config-fmt == DRM_FORMAT_YVU420) {
fimc_write(ctx, buf_info-base[EXYNOS_DRM_PLANAR_CR],
- EXYNOS_CIICBSA(buf_id));
+ EXYNOS_CIICBSA0);
fimc_write(ctx, buf_info-base[EXYNOS_DRM_PLANAR_CB],
- EXYNOS_CIICRSA(buf_id));
+ EXYNOS_CIICRSA0);
} else {
fimc_write(ctx, buf_info-base[EXYNOS_DRM_PLANAR_CB],
- EXYNOS_CIICBSA(buf_id));
+ EXYNOS_CIICBSA0);
fimc_write(ctx, buf_info-base[EXYNOS_DRM_PLANAR_CR],
- EXYNOS_CIICRSA(buf_id));
+ EXYNOS_CIICRSA0);
}
break;
case IPP_BUF_DEQUEUE:
- fimc_write(ctx, 0x0, EXYNOS_CIIYSA(buf_id));
- fimc_write(ctx, 0x0, EXYNOS_CIICBSA(buf_id));
- fimc_write(ctx, 0x0, EXYNOS_CIICRSA(buf_id));
+ fimc_write(ctx, 0x0, EXYNOS_CIIYSA0);
+ fimc_write(ctx, 0x0, EXYNOS_CIICBSA0);
+ fimc_write(ctx, 0x0, EXYNOS_CIICRSA0);
break;
default:
/* bypass */
--
1.9.1
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[PATCH 14/15] drm/exynos/fimc: simplify buffer queuing
The patch removes redundant checks, redundant HW reads
and simplifies code.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_fimc.c | 64
1 file changed, 15 insertions(+), 49 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c
b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
index bd6628d..b20078e 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
@@ -1124,67 +1124,34 @@ static int fimc_dst_set_size(struct device *dev, int
swap,
return 0;
}
-static int fimc_dst_get_buf_count(struct fimc_context *ctx)
-{
- u32 cfg, buf_num;
-
- cfg = fimc_read(ctx, EXYNOS_CIFCNTSEQ);
-
- buf_num = hweight32(cfg);
-
- DRM_DEBUG_KMS(buf_num[%d]\n, buf_num);
-
- return buf_num;
-}
-
-static int fimc_dst_set_buf_seq(struct fimc_context *ctx, u32 buf_id,
+static void fimc_dst_set_buf_seq(struct fimc_context *ctx, u32 buf_id,
enum drm_exynos_ipp_buf_type buf_type)
{
- struct exynos_drm_ippdrv *ippdrv = ctx-ippdrv;
- bool enable;
- u32 cfg;
- u32 mask = 0x0001 buf_id;
- int ret = 0;
unsigned long flags;
+ u32 buf_num;
+ u32 cfg;
DRM_DEBUG_KMS(buf_id[%d]buf_type[%d]\n, buf_id, buf_type);
spin_lock_irqsave(ctx-lock, flags);
- /* mask register set */
cfg = fimc_read(ctx, EXYNOS_CIFCNTSEQ);
- switch (buf_type) {
- case IPP_BUF_ENQUEUE:
- enable = true;
- break;
- case IPP_BUF_DEQUEUE:
- enable = false;
- break;
- default:
- dev_err(ippdrv-dev, invalid buf ctrl parameter.\n);
- ret = -EINVAL;
- goto err_unlock;
- }
+ if (buf_type == IPP_BUF_ENQUEUE)
+ cfg |= (1 buf_id);
+ else
+ cfg = (1 buf_id);
- /* sequence id */
- cfg = ~mask;
- cfg |= (enable buf_id);
fimc_write(ctx, cfg, EXYNOS_CIFCNTSEQ);
- /* interrupt enable */
- if (buf_type == IPP_BUF_ENQUEUE
- fimc_dst_get_buf_count(ctx) = FIMC_BUF_START)
- fimc_mask_irq(ctx, true);
+ buf_num = hweight32(cfg);
- /* interrupt disable */
- if (buf_type == IPP_BUF_DEQUEUE
- fimc_dst_get_buf_count(ctx) = FIMC_BUF_STOP)
+ if (buf_type == IPP_BUF_ENQUEUE buf_num = FIMC_BUF_START)
+ fimc_mask_irq(ctx, true);
+ else if (buf_type == IPP_BUF_DEQUEUE buf_num = FIMC_BUF_STOP)
fimc_mask_irq(ctx, false);
-err_unlock:
spin_unlock_irqrestore(ctx-lock, flags);
- return ret;
}
static int fimc_dst_set_addr(struct device *dev,
@@ -1242,7 +1209,9 @@ static int fimc_dst_set_addr(struct device *dev,
break;
}
- return fimc_dst_set_buf_seq(ctx, buf_id, buf_type);
+ fimc_dst_set_buf_seq(ctx, buf_id, buf_type);
+
+ return 0;
}
static struct exynos_drm_ipp_ops fimc_dst_ops = {
@@ -1297,10 +1266,7 @@ static irqreturn_t fimc_irq_handler(int irq, void
*dev_id)
DRM_DEBUG_KMS(buf_id[%d]\n, buf_id);
- if (fimc_dst_set_buf_seq(ctx, buf_id, IPP_BUF_DEQUEUE) 0) {
- DRM_ERROR(failed to dequeue.\n);
- return IRQ_HANDLED;
- }
+ fimc_dst_set_buf_seq(ctx, buf_id, IPP_BUF_DEQUEUE);
event_work-ippdrv = ippdrv;
event_work-buf_id[EXYNOS_DRM_OPS_DST] = buf_id;
--
1.9.1
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[PATCH 13/15] drm/exynos/fimc: do not enable fimc twice
The patch removes redundant H/W activation.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_fimc.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c
b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
index bbaf4f9..bd6628d 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
@@ -1596,12 +1596,9 @@ static int fimc_ippdrv_start(struct device *dev, enum
drm_exynos_ipp_cmd cmd)
fimc_clear_bits(ctx, EXYNOS_CIOCTRL, EXYNOS_CIOCTRL_WEAVE_MASK);
- if (cmd == IPP_CMD_M2M) {
+ if (cmd == IPP_CMD_M2M)
fimc_set_bits(ctx, EXYNOS_MSCTRL, EXYNOS_MSCTRL_ENVID);
- fimc_set_bits(ctx, EXYNOS_MSCTRL, EXYNOS_MSCTRL_ENVID);
- }
-
return 0;
}
--
1.9.1
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[PATCH 11/15] drm/exynos/ipp: remove events during command cleaning
Events were removed only during stop command, as a result
there were memory leaks if program prematurely exited.
This patch fixes it.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 155
1 file changed, 78 insertions(+), 77 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
index 6de75aa..ec88393 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
@@ -601,6 +601,81 @@ static void ipp_clean_mem_nodes(struct drm_device *drm_dev,
mutex_unlock(c_node-mem_lock);
}
+static void ipp_free_event(struct drm_pending_event *event)
+{
+ kfree(event);
+}
+
+static int ipp_get_event(struct drm_device *drm_dev,
+ struct drm_file *file,
+ struct drm_exynos_ipp_cmd_node *c_node,
+ struct drm_exynos_ipp_queue_buf *qbuf)
+{
+ struct drm_exynos_ipp_send_event *e;
+ unsigned long flags;
+
+ DRM_DEBUG_KMS(ops_id[%d]buf_id[%d]\n, qbuf-ops_id, qbuf-buf_id);
+
+ e = kzalloc(sizeof(*e), GFP_KERNEL);
+ if (!e) {
+ spin_lock_irqsave(drm_dev-event_lock, flags);
+ file-event_space += sizeof(e-event);
+ spin_unlock_irqrestore(drm_dev-event_lock, flags);
+ return -ENOMEM;
+ }
+
+ /* make event */
+ e-event.base.type = DRM_EXYNOS_IPP_EVENT;
+ e-event.base.length = sizeof(e-event);
+ e-event.user_data = qbuf-user_data;
+ e-event.prop_id = qbuf-prop_id;
+ e-event.buf_id[EXYNOS_DRM_OPS_DST] = qbuf-buf_id;
+ e-base.event = e-event.base;
+ e-base.file_priv = file;
+ e-base.destroy = ipp_free_event;
+ mutex_lock(c_node-event_lock);
+ list_add_tail(e-base.link, c_node-event_list);
+ mutex_unlock(c_node-event_lock);
+
+ return 0;
+}
+
+static void ipp_put_event(struct drm_exynos_ipp_cmd_node *c_node,
+ struct drm_exynos_ipp_queue_buf *qbuf)
+{
+ struct drm_exynos_ipp_send_event *e, *te;
+ int count = 0;
+
+ mutex_lock(c_node-event_lock);
+ list_for_each_entry_safe(e, te, c_node-event_list, base.link) {
+ DRM_DEBUG_KMS(count[%d]e[0x%x]\n, count++, (int)e);
+
+ /*
+* qbuf == NULL condition means all event deletion.
+* stop operations want to delete all event list.
+* another case delete only same buf id.
+*/
+ if (!qbuf) {
+ /* delete list */
+ list_del(e-base.link);
+ kfree(e);
+ }
+
+ /* compare buffer id */
+ if (qbuf (qbuf-buf_id ==
+ e-event.buf_id[EXYNOS_DRM_OPS_DST])) {
+ /* delete list */
+ list_del(e-base.link);
+ kfree(e);
+ goto out_unlock;
+ }
+ }
+
+out_unlock:
+ mutex_unlock(c_node-event_lock);
+ return;
+}
+
static void ipp_clean_cmd_node(struct ipp_context *ctx,
struct drm_exynos_ipp_cmd_node *c_node)
{
@@ -611,6 +686,9 @@ static void ipp_clean_cmd_node(struct ipp_context *ctx,
cancel_work_sync(c_node-stop_work-work);
cancel_work_sync(c_node-event_work-work);
+ /* put event */
+ ipp_put_event(c_node, NULL);
+
for_each_ipp_ops(i)
ipp_clean_mem_nodes(ctx-subdrv.drm_dev, c_node, i);
@@ -707,81 +785,6 @@ static int ipp_set_mem_node(struct exynos_drm_ippdrv
*ippdrv,
return ret;
}
-static void ipp_free_event(struct drm_pending_event *event)
-{
- kfree(event);
-}
-
-static int ipp_get_event(struct drm_device *drm_dev,
- struct drm_file *file,
- struct drm_exynos_ipp_cmd_node *c_node,
- struct drm_exynos_ipp_queue_buf *qbuf)
-{
- struct drm_exynos_ipp_send_event *e;
- unsigned long flags;
-
- DRM_DEBUG_KMS(ops_id[%d]buf_id[%d]\n, qbuf-ops_id, qbuf-buf_id);
-
- e = kzalloc(sizeof(*e), GFP_KERNEL);
- if (!e) {
- spin_lock_irqsave(drm_dev-event_lock, flags);
- file-event_space += sizeof(e-event);
- spin_unlock_irqrestore(drm_dev-event_lock, flags);
- return -ENOMEM;
- }
-
- /* make event */
- e-event.base.type = DRM_EXYNOS_IPP_EVENT;
- e-event.base.length = sizeof(e-event);
- e-event.user_data = qbuf-user_data;
- e-event.prop_id = qbuf-prop_id;
- e-event.buf_id[EXYNOS_DRM_OPS_DST] = qbuf-buf_id;
- e-base.event = e-event.base;
- e-base.file_priv = file;
- e-base.destroy = ipp_free_event;
- mutex_lock(c_node-event_lock);
- list_add_tail(e-base.link, c_node-event_list);
- mutex_unlock(c_node-event_lock);
-
- return 0;
-}
-
-static void
[PATCH 10/15] drm/exynos/ipp: stop hardware before freeing memory
Memory shouldn't be freed when hardware is still running.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
index c72d8d1..6de75aa 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
@@ -1283,12 +1283,15 @@ static int ipp_stop_property(struct drm_device *drm_dev,
struct drm_exynos_ipp_cmd_node *c_node)
{
struct drm_exynos_ipp_property *property = c_node-property;
- int ret = 0, i;
+ int i;
DRM_DEBUG_KMS(prop_id[%d]\n, property-prop_id);
/* put event */
ipp_put_event(c_node, NULL);
+ /* stop operations */
+ if (ippdrv-stop)
+ ippdrv-stop(ippdrv-dev, property-cmd);
/* check command */
switch (property-cmd) {
@@ -1304,16 +1307,10 @@ static int ipp_stop_property(struct drm_device *drm_dev,
break;
default:
DRM_ERROR(invalid operations.\n);
- ret = -EINVAL;
- goto err_clear;
+ return -EINVAL;
}
-err_clear:
- /* stop operations */
- if (ippdrv-stop)
- ippdrv-stop(ippdrv-dev, property-cmd);
-
- return ret;
+ return 0;
}
void ipp_sched_cmd(struct work_struct *work)
--
1.9.1
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[PATCH 08/15] drm/exynos/ipp: clean memory nodes on command node cleaning
The nodes should be removed before removing command node.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
index 22bd551..6ab6190 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
@@ -604,11 +604,16 @@ static void ipp_clean_mem_nodes(struct drm_device
*drm_dev,
static void ipp_clean_cmd_node(struct ipp_context *ctx,
struct drm_exynos_ipp_cmd_node *c_node)
{
+ int i;
+
/* cancel works */
cancel_work_sync(c_node-start_work-work);
cancel_work_sync(c_node-stop_work-work);
cancel_work_sync(c_node-event_work-work);
+ for_each_ipp_ops(i)
+ ipp_clean_mem_nodes(ctx-subdrv.drm_dev, c_node, i);
+
/* delete list */
list_del(c_node-list);
--
1.9.1
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[PATCH 09/15] drm/exynos/ipp: replace work_struct casting with better constructs
Type casting should be avoided if possible. In case of
work_struct it can be simply replaced by reference to member field.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_fimc.c| 2 +-
drivers/gpu/drm/exynos/exynos_drm_gsc.c | 3 +--
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 6 +++---
drivers/gpu/drm/exynos/exynos_drm_rotator.c | 3 +--
4 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c
b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
index 35db665..3264ed3 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
@@ -1307,7 +1307,7 @@ static irqreturn_t fimc_irq_handler(int irq, void *dev_id)
event_work-ippdrv = ippdrv;
event_work-buf_id[EXYNOS_DRM_OPS_DST] = buf_id;
- queue_work(ippdrv-event_workq, (struct work_struct *)event_work);
+ queue_work(ippdrv-event_workq, event_work-work);
return IRQ_HANDLED;
}
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gsc.c
b/drivers/gpu/drm/exynos/exynos_drm_gsc.c
index 9e3ff16..c6a013f 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gsc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_gsc.c
@@ -1326,8 +1326,7 @@ static irqreturn_t gsc_irq_handler(int irq, void *dev_id)
buf_id[EXYNOS_DRM_OPS_SRC];
event_work-buf_id[EXYNOS_DRM_OPS_DST] =
buf_id[EXYNOS_DRM_OPS_DST];
- queue_work(ippdrv-event_workq,
- (struct work_struct *)event_work);
+ queue_work(ippdrv-event_workq, event_work-work);
}
return IRQ_HANDLED;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
index 6ab6190..c72d8d1 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
@@ -791,7 +791,7 @@ static void ipp_handle_cmd_work(struct device *dev,
cmd_work-ippdrv = ippdrv;
cmd_work-c_node = c_node;
- queue_work(ctx-cmd_workq, (struct work_struct *)cmd_work);
+ queue_work(ctx-cmd_workq, cmd_work-work);
}
static int ipp_queue_buf_with_run(struct device *dev,
@@ -1319,7 +1319,7 @@ err_clear:
void ipp_sched_cmd(struct work_struct *work)
{
struct drm_exynos_ipp_cmd_work *cmd_work =
- (struct drm_exynos_ipp_cmd_work *)work;
+ container_of(work, struct drm_exynos_ipp_cmd_work, work);
struct exynos_drm_ippdrv *ippdrv;
struct drm_exynos_ipp_cmd_node *c_node;
struct drm_exynos_ipp_property *property;
@@ -1532,7 +1532,7 @@ err_event_unlock:
void ipp_sched_event(struct work_struct *work)
{
struct drm_exynos_ipp_event_work *event_work =
- (struct drm_exynos_ipp_event_work *)work;
+ container_of(work, struct drm_exynos_ipp_event_work, work);
struct exynos_drm_ippdrv *ippdrv;
struct drm_exynos_ipp_cmd_node *c_node;
int ret;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_rotator.c
b/drivers/gpu/drm/exynos/exynos_drm_rotator.c
index 55af6b4..b6a37d4 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_rotator.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_rotator.c
@@ -156,8 +156,7 @@ static irqreturn_t rotator_irq_handler(int irq, void *arg)
event_work-ippdrv = ippdrv;
event_work-buf_id[EXYNOS_DRM_OPS_DST] =
rot-cur_buf_id[EXYNOS_DRM_OPS_DST];
- queue_work(ippdrv-event_workq,
- (struct work_struct *)event_work);
+ queue_work(ippdrv-event_workq, event_work-work);
} else {
DRM_ERROR(the SFR is set illegally\n);
}
--
1.9.1
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[PATCH 05/15] drm/exynos/ipp: remove unused field in command node
Since command node have file pointer dev field became useless.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 1 -
drivers/gpu/drm/exynos/exynos_drm_ipp.h | 2 --
2 files changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
index 81f780e..060a198 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
@@ -444,7 +444,6 @@ int exynos_drm_ipp_set_property(struct drm_device *drm_dev,
void *data,
property-prop_id, property-cmd, (int)ippdrv);
/* stored property information and ippdrv in private data */
- c_node-dev = dev;
c_node-property = *property;
c_node-state = IPP_STATE_IDLE;
c_node-filp = file;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.h
b/drivers/gpu/drm/exynos/exynos_drm_ipp.h
index 0311035..2a61547 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_ipp.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_ipp.h
@@ -48,7 +48,6 @@ struct drm_exynos_ipp_cmd_work {
/*
* A structure of command node.
*
- * @dev: IPP device.
* @list: list head to command queue information.
* @event_list: list head of event.
* @mem_list: list head to source,destination memory queue information.
@@ -65,7 +64,6 @@ struct drm_exynos_ipp_cmd_work {
* @filp: associated file pointer.
*/
struct drm_exynos_ipp_cmd_node {
- struct device *dev;
struct list_headlist;
struct list_headevent_list;
struct list_headmem_list[EXYNOS_DRM_OPS_MAX];
--
1.9.1
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[PATCH 07/15] drm/exynos/ipp: move nodes cleaning to separate function
The patch introduces ipp_clean_mem_nodes function which replaces
redundant code. Additionally memory node function definitions
are moved up to increase its visibility.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 231 +++-
1 file changed, 107 insertions(+), 124 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
index 728f3b9..22bd551 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
@@ -498,6 +498,109 @@ err_clear:
return ret;
}
+static int ipp_put_mem_node(struct drm_device *drm_dev,
+ struct drm_exynos_ipp_cmd_node *c_node,
+ struct drm_exynos_ipp_mem_node *m_node)
+{
+ int i;
+
+ DRM_DEBUG_KMS(node[0x%x]\n, (int)m_node);
+
+ if (!m_node) {
+ DRM_ERROR(invalid dequeue node.\n);
+ return -EFAULT;
+ }
+
+ DRM_DEBUG_KMS(ops_id[%d]\n, m_node-ops_id);
+
+ /* put gem buffer */
+ for_each_ipp_planar(i) {
+ unsigned long handle = m_node-buf_info.handles[i];
+ if (handle)
+ exynos_drm_gem_put_dma_addr(drm_dev, handle,
+ c_node-filp);
+ }
+
+ /* conditionally remove from queue */
+ if (m_node-list.next)
+ list_del(m_node-list);
+ kfree(m_node);
+
+ return 0;
+}
+
+static struct drm_exynos_ipp_mem_node
+ *ipp_get_mem_node(struct drm_device *drm_dev,
+ struct drm_file *file,
+ struct drm_exynos_ipp_cmd_node *c_node,
+ struct drm_exynos_ipp_queue_buf *qbuf)
+{
+ struct drm_exynos_ipp_mem_node *m_node;
+ struct drm_exynos_ipp_buf_info *buf_info;
+ int i;
+
+ m_node = kzalloc(sizeof(*m_node), GFP_KERNEL);
+ if (!m_node)
+ return ERR_PTR(-ENOMEM);
+
+ buf_info = m_node-buf_info;
+
+ /* operations, buffer id */
+ m_node-ops_id = qbuf-ops_id;
+ m_node-prop_id = qbuf-prop_id;
+ m_node-buf_id = qbuf-buf_id;
+
+ DRM_DEBUG_KMS(m_node[0x%x]ops_id[%d]\n, (int)m_node, qbuf-ops_id);
+ DRM_DEBUG_KMS(prop_id[%d]buf_id[%d]\n, qbuf-prop_id, m_node-buf_id);
+
+ for_each_ipp_planar(i) {
+ DRM_DEBUG_KMS(i[%d]handle[0x%x]\n, i, qbuf-handle[i]);
+
+ /* get dma address by handle */
+ if (qbuf-handle[i]) {
+ dma_addr_t *addr;
+
+ addr = exynos_drm_gem_get_dma_addr(drm_dev,
+ qbuf-handle[i], file);
+ if (IS_ERR(addr)) {
+ DRM_ERROR(failed to get addr.\n);
+ ipp_put_mem_node(drm_dev, c_node, m_node);
+ return ERR_PTR(-EFAULT);
+ }
+
+ buf_info-handles[i] = qbuf-handle[i];
+ buf_info-base[i] = *addr;
+ DRM_DEBUG_KMS(i[%d]base[0x%x]hd[0x%lx]\n, i,
+ buf_info-base[i], buf_info-handles[i]);
+ }
+ }
+
+ mutex_lock(c_node-mem_lock);
+ list_add_tail(m_node-list, c_node-mem_list[qbuf-ops_id]);
+ mutex_unlock(c_node-mem_lock);
+
+ return m_node;
+}
+
+static void ipp_clean_mem_nodes(struct drm_device *drm_dev,
+ struct drm_exynos_ipp_cmd_node *c_node, int ops)
+{
+ struct drm_exynos_ipp_mem_node *m_node, *tm_node;
+ struct list_head *head = c_node-mem_list[ops];
+
+ mutex_lock(c_node-mem_lock);
+
+ list_for_each_entry_safe(m_node, tm_node, head, list) {
+ int ret;
+
+ ret = ipp_put_mem_node(drm_dev, c_node, m_node);
+ if (ret)
+ DRM_ERROR(failed to put m_node.\n);
+ }
+
+ mutex_unlock(c_node-mem_lock);
+}
+
static void ipp_clean_cmd_node(struct ipp_context *ctx,
struct drm_exynos_ipp_cmd_node *c_node)
{
@@ -599,90 +702,6 @@ static int ipp_set_mem_node(struct exynos_drm_ippdrv
*ippdrv,
return ret;
}
-static int ipp_put_mem_node(struct drm_device *drm_dev,
- struct drm_exynos_ipp_cmd_node *c_node,
- struct drm_exynos_ipp_mem_node *m_node)
-{
- int i;
-
- DRM_DEBUG_KMS(node[0x%x]\n, (int)m_node);
-
- if (!m_node) {
- DRM_ERROR(invalid dequeue node.\n);
- return -EFAULT;
- }
-
- DRM_DEBUG_KMS(ops_id[%d]\n, m_node-ops_id);
-
- /* put gem buffer */
- for_each_ipp_planar(i) {
- unsigned long handle = m_node-buf_info.handles[i];
- if (handle)
- exynos_drm_gem_put_dma_addr(drm_dev, handle,
- c_node-filp);
-
[PATCH 06/15] drm/exynos/ipp: free partially allocated resources on error
In case of allocation errors some already allocated buffers
were not freed. The patch fixes it.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 68 -
1 file changed, 33 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
index 060a198..728f3b9 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
@@ -599,6 +599,37 @@ static int ipp_set_mem_node(struct exynos_drm_ippdrv
*ippdrv,
return ret;
}
+static int ipp_put_mem_node(struct drm_device *drm_dev,
+ struct drm_exynos_ipp_cmd_node *c_node,
+ struct drm_exynos_ipp_mem_node *m_node)
+{
+ int i;
+
+ DRM_DEBUG_KMS(node[0x%x]\n, (int)m_node);
+
+ if (!m_node) {
+ DRM_ERROR(invalid dequeue node.\n);
+ return -EFAULT;
+ }
+
+ DRM_DEBUG_KMS(ops_id[%d]\n, m_node-ops_id);
+
+ /* put gem buffer */
+ for_each_ipp_planar(i) {
+ unsigned long handle = m_node-buf_info.handles[i];
+ if (handle)
+ exynos_drm_gem_put_dma_addr(drm_dev, handle,
+ c_node-filp);
+ }
+
+ /* conditionally remove from queue */
+ if (m_node-list.next)
+ list_del(m_node-list);
+ kfree(m_node);
+
+ return 0;
+}
+
static struct drm_exynos_ipp_mem_node
*ipp_get_mem_node(struct drm_device *drm_dev,
struct drm_file *file,
@@ -634,7 +665,8 @@ static struct drm_exynos_ipp_mem_node
qbuf-handle[i], file);
if (IS_ERR(addr)) {
DRM_ERROR(failed to get addr.\n);
- goto err_clear;
+ ipp_put_mem_node(drm_dev, c_node, m_node);
+ return ERR_PTR(-EFAULT);
}
buf_info-handles[i] = qbuf-handle[i];
@@ -649,40 +681,6 @@ static struct drm_exynos_ipp_mem_node
mutex_unlock(c_node-mem_lock);
return m_node;
-
-err_clear:
- kfree(m_node);
- return ERR_PTR(-EFAULT);
-}
-
-static int ipp_put_mem_node(struct drm_device *drm_dev,
- struct drm_exynos_ipp_cmd_node *c_node,
- struct drm_exynos_ipp_mem_node *m_node)
-{
- int i;
-
- DRM_DEBUG_KMS(node[0x%x]\n, (int)m_node);
-
- if (!m_node) {
- DRM_ERROR(invalid dequeue node.\n);
- return -EFAULT;
- }
-
- DRM_DEBUG_KMS(ops_id[%d]\n, m_node-ops_id);
-
- /* put gem buffer */
- for_each_ipp_planar(i) {
- unsigned long handle = m_node-buf_info.handles[i];
- if (handle)
- exynos_drm_gem_put_dma_addr(drm_dev, handle,
- c_node-filp);
- }
-
- /* delete list in queue */
- list_del(m_node-list);
- kfree(m_node);
-
- return 0;
}
static void ipp_free_event(struct drm_pending_event *event)
--
1.9.1
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[PATCH 04/15] drm/exynos/ipp: remove only related commands on file close
On file close driver should remove only command nodes created
via this file.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
index bbe9968..81f780e 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
@@ -1681,14 +1681,11 @@ static int ipp_subdrv_open(struct drm_device *drm_dev,
struct device *dev,
static void ipp_subdrv_close(struct drm_device *drm_dev, struct device *dev,
struct drm_file *file)
{
- struct drm_exynos_file_private *file_priv = file-driver_priv;
struct exynos_drm_ippdrv *ippdrv = NULL;
struct ipp_context *ctx = get_ipp_context(dev);
struct drm_exynos_ipp_cmd_node *c_node, *tc_node;
int count = 0;
- DRM_DEBUG_KMS(for priv[0x%x]\n, (int)file_priv-ipp_dev);
-
list_for_each_entry(ippdrv, exynos_drm_ippdrv_list, drv_list) {
mutex_lock(ippdrv-cmd_lock);
list_for_each_entry_safe(c_node, tc_node,
@@ -1696,7 +1693,7 @@ static void ipp_subdrv_close(struct drm_device *drm_dev,
struct device *dev,
DRM_DEBUG_KMS(count[%d]ippdrv[0x%x]\n,
count++, (int)ippdrv);
- if (c_node-dev == file_priv-ipp_dev) {
+ if (c_node-filp == file) {
/*
* userland goto unnormal state. process killed.
* and close the file.
--
1.9.1
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[PATCH 03/15] drm/exynos/ipp: move file reference from memory to command node
Command node should contain file reference to distinguish commands
created by different processes.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 5 ++---
drivers/gpu/drm/exynos/exynos_drm_ipp.h | 2 ++
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
index 9770966..bbe9968 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
@@ -75,7 +75,6 @@ struct drm_exynos_ipp_mem_node {
u32 prop_id;
u32 buf_id;
struct drm_exynos_ipp_buf_info buf_info;
- struct drm_file *filp;
};
/*
@@ -448,6 +447,7 @@ int exynos_drm_ipp_set_property(struct drm_device *drm_dev,
void *data,
c_node-dev = dev;
c_node-property = *property;
c_node-state = IPP_STATE_IDLE;
+ c_node-filp = file;
c_node-start_work = ipp_create_cmd_work();
if (IS_ERR(c_node-start_work)) {
@@ -645,7 +645,6 @@ static struct drm_exynos_ipp_mem_node
}
}
- m_node-filp = file;
mutex_lock(c_node-mem_lock);
list_add_tail(m_node-list, c_node-mem_list[qbuf-ops_id]);
mutex_unlock(c_node-mem_lock);
@@ -677,7 +676,7 @@ static int ipp_put_mem_node(struct drm_device *drm_dev,
unsigned long handle = m_node-buf_info.handles[i];
if (handle)
exynos_drm_gem_put_dma_addr(drm_dev, handle,
- m_node-filp);
+ c_node-filp);
}
/* delete list in queue */
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.h
b/drivers/gpu/drm/exynos/exynos_drm_ipp.h
index 6f48d62..0311035 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_ipp.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_ipp.h
@@ -62,6 +62,7 @@ struct drm_exynos_ipp_cmd_work {
* @stop_work: stop command work structure.
* @event_work: event work structure.
* @state: state of command node.
+ * @filp: associated file pointer.
*/
struct drm_exynos_ipp_cmd_node {
struct device *dev;
@@ -78,6 +79,7 @@ struct drm_exynos_ipp_cmd_node {
struct drm_exynos_ipp_cmd_work *stop_work;
struct drm_exynos_ipp_event_work *event_work;
enum drm_exynos_ipp_state state;
+ struct drm_file *filp;
};
/*
--
1.9.1
--
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[PATCH 01/15] drm/exynos/ipp: remove fake pm callbacks
PM callbacks in ipp core do nothing, so the patch removes it.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 51 -
1 file changed, 51 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
index c411399..da917ca 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
@@ -1808,63 +1808,12 @@ static int ipp_remove(struct platform_device *pdev)
return 0;
}
-static int ipp_power_ctrl(struct ipp_context *ctx, bool enable)
-{
- DRM_DEBUG_KMS(enable[%d]\n, enable);
-
- return 0;
-}
-
-#ifdef CONFIG_PM_SLEEP
-static int ipp_suspend(struct device *dev)
-{
- struct ipp_context *ctx = get_ipp_context(dev);
-
- if (pm_runtime_suspended(dev))
- return 0;
-
- return ipp_power_ctrl(ctx, false);
-}
-
-static int ipp_resume(struct device *dev)
-{
- struct ipp_context *ctx = get_ipp_context(dev);
-
- if (!pm_runtime_suspended(dev))
- return ipp_power_ctrl(ctx, true);
-
- return 0;
-}
-#endif
-
-#ifdef CONFIG_PM_RUNTIME
-static int ipp_runtime_suspend(struct device *dev)
-{
- struct ipp_context *ctx = get_ipp_context(dev);
-
- return ipp_power_ctrl(ctx, false);
-}
-
-static int ipp_runtime_resume(struct device *dev)
-{
- struct ipp_context *ctx = get_ipp_context(dev);
-
- return ipp_power_ctrl(ctx, true);
-}
-#endif
-
-static const struct dev_pm_ops ipp_pm_ops = {
- SET_SYSTEM_SLEEP_PM_OPS(ipp_suspend, ipp_resume)
- SET_RUNTIME_PM_OPS(ipp_runtime_suspend, ipp_runtime_resume, NULL)
-};
-
struct platform_driver ipp_driver = {
.probe = ipp_probe,
.remove = ipp_remove,
.driver = {
.name = exynos-drm-ipp,
.owner = THIS_MODULE,
- .pm = ipp_pm_ops,
},
};
--
1.9.1
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[PATCH] mfd: syscon: Decouple syscon interface from syscon devices
From: Tomasz Figa t.f...@samsung.com
Currently a syscon entity can be only registered directly through a
platform device that binds to a dedicated driver. However in certain use
cases it is desirable to make a device used with another driver a syscon
interface provider. For example, certain SoCs (e.g. Exynos) contain
system controller blocks which perform various functions such as power
domain control, CPU power management, low power mode control, but in
addition contain certain IP integration glue, such as various signal
masks, coprocessor power control, etc. In such case, there is a need to
have a dedicated driver for such system controller but also share
registers with other drivers. The latter is where the syscon interface
is helpful.
This patch decouples syscon object from syscon driver, so that it can be
registered from any driver in addition to the original syscon platform
driver.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
---
RFC patch [1] was posted by Tomasz Figa. This patch addresses some of
comments given by Arnd to RFC patch, and further decouples syscon from
device model. It also gives flexibility of registering with syscon at
early stage using device_node object.
[1]: https://lkml.org/lkml/2014/6/17/331
drivers/mfd/syscon.c | 112
include/linux/mfd/syscon.h | 14 ++
2 files changed, 86 insertions(+), 40 deletions(-)
diff --git a/drivers/mfd/syscon.c b/drivers/mfd/syscon.c
index ca15878..a91db30 100644
--- a/drivers/mfd/syscon.c
+++ b/drivers/mfd/syscon.c
@@ -14,6 +14,7 @@
#include linux/err.h
#include linux/io.h
+#include linux/list.h
#include linux/module.h
#include linux/of.h
#include linux/of_address.h
@@ -22,33 +23,32 @@
#include linux/platform_device.h
#include linux/regmap.h
#include linux/mfd/syscon.h
+#include linux/slab.h
-static struct platform_driver syscon_driver;
+static DEFINE_SPINLOCK(syscon_list_slock);
+static LIST_HEAD(syscon_list);
struct syscon {
+ struct device_node *np;
struct regmap *regmap;
+ struct list_head list;
};
-static int syscon_match_node(struct device *dev, void *data)
-{
- struct device_node *dn = data;
-
- return (dev-of_node == dn) ? 1 : 0;
-}
-
struct regmap *syscon_node_to_regmap(struct device_node *np)
{
- struct syscon *syscon;
- struct device *dev;
+ struct syscon *entry, *syscon = NULL;
- dev = driver_find_device(syscon_driver.driver, NULL, np,
-syscon_match_node);
- if (!dev)
- return ERR_PTR(-EPROBE_DEFER);
+ spin_lock(syscon_list_slock);
- syscon = dev_get_drvdata(dev);
+ list_for_each_entry(entry, syscon_list, list)
+ if (entry-np == np) {
+ syscon = entry;
+ break;
+ }
- return syscon-regmap;
+ spin_unlock(syscon_list_slock);
+
+ return syscon ? syscon-regmap : ERR_PTR(-EPROBE_DEFER);
}
EXPORT_SYMBOL_GPL(syscon_node_to_regmap);
@@ -68,24 +68,22 @@ struct regmap *syscon_regmap_lookup_by_compatible(const
char *s)
}
EXPORT_SYMBOL_GPL(syscon_regmap_lookup_by_compatible);
-static int syscon_match_pdevname(struct device *dev, void *data)
-{
- return !strcmp(dev_name(dev), (const char *)data);
-}
-
struct regmap *syscon_regmap_lookup_by_pdevname(const char *s)
{
- struct device *dev;
- struct syscon *syscon;
-
- dev = driver_find_device(syscon_driver.driver, NULL, (void *)s,
-syscon_match_pdevname);
- if (!dev)
- return ERR_PTR(-EPROBE_DEFER);
-
- syscon = dev_get_drvdata(dev);
+ struct syscon *entry, *syscon = NULL;
+ struct platform_device *pdev = NULL;
+
+ spin_lock(syscon_list_slock);
+ list_for_each_entry(entry, syscon_list, list) {
+pdev = of_find_device_by_node(entry-np);
+ if (pdev !strcmp(dev_name(pdev-dev), s)) {
+ syscon = entry;
+ break;
+ }
+ }
+ spin_unlock(syscon_list_slock);
- return syscon-regmap;
+ return syscon ? syscon-regmap : ERR_PTR(-EPROBE_DEFER);
}
EXPORT_SYMBOL_GPL(syscon_regmap_lookup_by_pdevname);
@@ -121,17 +119,49 @@ static struct regmap_config syscon_regmap_config = {
.reg_stride = 4,
};
+void of_syscon_unregister(struct device_node *np)
+{
+ struct syscon *entry;
+
+ spin_lock(syscon_list_slock);
+
+ list_for_each_entry(entry, syscon_list, list)
+ if (entry-np == np) {
+ list_del(entry-list);
+ break;
+ }
+
+ spin_unlock(syscon_list_slock);
+}
+EXPORT_SYMBOL_GPL(of_syscon_unregister);
+
+int of_syscon_register(struct device_node *np, struct regmap *regmap)
+{
+ struct syscon *syscon;
+
+ syscon =
[RESEND PATCHv2 0/5] rtc: s3c: Refactoring s3c-rtc driver and support Exynos3250 RTC
This patchset clean up codes to improve readability as following and support the RTC of Exynos3250 SoC. - Remove global variables and then use new s3c_rtc structure - Remove warn message with checking checkpatch script - Use variant structure according to SoC type instead of legacy enum variable(s3c_cpu_type) Changes from v1: - Fix NULL pointer panic of s3c_rtc_settime() - Check info-base value to protect NULL pointer panic Chanwoo Choi (5): rtc: s3c: Define s3c_rtc structure to remove global variables. rtc: s3c: Remove warning message when checking coding style with checkpatch script rtc: s3c: Add s3c_rtc_data structure to use variant data instead of s3c_cpu_type rtc: s3c: Add support for RTC of Exynos3250 SoC ARM: dts: Fix wrong compatible string of Exynos3250 RTC dt node Documentation/devicetree/bindings/rtc/s3c-rtc.txt | 3 + arch/arm/boot/dts/exynos3250.dtsi | 2 +- drivers/rtc/rtc-s3c.c | 869 ++ 3 files changed, 553 insertions(+), 321 deletions(-) -- 1.8.0 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RESEND PATCHv2 3/5] rtc: s3c: Add s3c_rtc_data structure to use variant data instead of s3c_cpu_type
This patch add s3c_rtc_data structure to variant data according to SoC type.
The s3c_rtc_data structure includes some functions to control RTC operation
and specific data dependent on SoC type.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Alessandro Zummo a.zu...@towertech.it
Cc: Kukjin Kim kgene@samsung.com
---
drivers/rtc/rtc-s3c.c | 464 +++---
1 file changed, 289 insertions(+), 175 deletions(-)
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index d8f25bd..26a88f9 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -32,17 +32,6 @@
#include asm/irq.h
#include rtc-s3c.h
-enum s3c_cpu_type {
- TYPE_S3C2410,
- TYPE_S3C2416,
- TYPE_S3C2443,
- TYPE_S3C64XX,
-};
-
-struct s3c_rtc_drv_data {
- int cpu_type;
-};
-
struct s3c_rtc {
struct device *dev;
struct rtc_device *rtc;
@@ -51,7 +40,7 @@ struct s3c_rtc {
struct clk *rtc_clk;
bool enabled;
- enum s3c_cpu_type cpu_type;
+ struct s3c_rtc_data *data;
int irq_alarm;
int irq_tick;
@@ -63,6 +52,19 @@ struct s3c_rtc {
bool wake_en;
};
+struct s3c_rtc_data {
+ int max_user_freq;
+
+ void (*irq_handler) (struct s3c_rtc *info, int mask);
+ void (*set_freq) (struct s3c_rtc *info, int freq);
+ void (*enable_tick) (struct s3c_rtc *info, struct seq_file *seq);
+ void (*select_tick_clk) (struct s3c_rtc *info);
+ void (*save_tick_cnt) (struct s3c_rtc *info);
+ void (*restore_tick_cnt) (struct s3c_rtc *info);
+ void (*enable) (struct s3c_rtc *info);
+ void (*disable) (struct s3c_rtc *info);
+};
+
static void s3c_rtc_alarm_clk_enable(struct s3c_rtc *info, bool enable)
{
unsigned long irq_flags;
@@ -83,34 +85,22 @@ static void s3c_rtc_alarm_clk_enable(struct s3c_rtc *info,
bool enable)
}
/* IRQ Handlers */
-static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
+static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
{
struct s3c_rtc *info = (struct s3c_rtc *)id;
- clk_enable(info-rtc_clk);
- rtc_update_irq(info-rtc, 1, RTC_AF | RTC_IRQF);
-
- if (info-cpu_type == TYPE_S3C64XX)
- writeb(S3C2410_INTP_ALM, info-base + S3C2410_INTP);
-
- clk_disable(info-rtc_clk);
-
- s3c_rtc_alarm_clk_enable(info, false);
+ if (info-data-irq_handler)
+ info-data-irq_handler(info, S3C2410_INTP_TIC);
return IRQ_HANDLED;
}
-static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
+static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
{
struct s3c_rtc *info = (struct s3c_rtc *)id;
- clk_enable(info-rtc_clk);
- rtc_update_irq(info-rtc, 1, RTC_PF | RTC_IRQF);
-
- if (info-cpu_type == TYPE_S3C64XX)
- writeb(S3C2410_INTP_TIC, info-base + S3C2410_INTP);
-
- clk_disable(info-rtc_clk);
+ if (info-data-irq_handler)
+ info-data-irq_handler(info, S3C2410_INTP_ALM);
return IRQ_HANDLED;
}
@@ -140,36 +130,18 @@ static int s3c_rtc_setaie(struct device *dev, unsigned
int enabled)
return 0;
}
+/* Set RTC frequency */
static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq)
{
- unsigned int tmp = 0;
- int val;
-
if (!is_power_of_2(freq))
return -EINVAL;
clk_enable(info-rtc_clk);
spin_lock_irq(info-pie_lock);
- if (info-cpu_type != TYPE_S3C64XX) {
- tmp = readb(info-base + S3C2410_TICNT);
- tmp = S3C2410_TICNT_ENABLE;
- }
-
- val = (info-rtc-max_user_freq / freq) - 1;
-
- if (info-cpu_type == TYPE_S3C2416 || info-cpu_type == TYPE_S3C2443) {
- tmp |= S3C2443_TICNT_PART(val);
- writel(S3C2443_TICNT1_PART(val), info-base + S3C2443_TICNT1);
+ if (info-data-set_freq)
+ info-data-set_freq(info, freq);
- if (info-cpu_type == TYPE_S3C2416)
- writel(S3C2416_TICNT2_PART(val),
- info-base + S3C2416_TICNT2);
- } else {
- tmp |= val;
- }
-
- writel(tmp, info-base + S3C2410_TICNT);
spin_unlock_irq(info-pie_lock);
clk_disable(info-rtc_clk);
@@ -177,7 +149,6 @@ static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq)
}
/* Time read/write */
-
static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
{
struct s3c_rtc *info = dev_get_drvdata(dev);
@@ -370,22 +341,17 @@ static int s3c_rtc_setalarm(struct device *dev, struct
rtc_wkalrm *alrm)
static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
{
struct s3c_rtc *info = dev_get_drvdata(dev);
- unsigned int ticnt;
if (!info-base)
return -EINVAL;
clk_enable(info-rtc_clk);
- if (info-cpu_type == TYPE_S3C64XX) {
- ticnt =
[RESEND PATCHv2 4/5] rtc: s3c: Add support for RTC of Exynos3250 SoC
This patch add support for RTC of Exynos3250 SoC. The Exynos3250 needs source
clock(32.768KHz) for RTC block. If source clock of RTC is registerd on clock
list of common clk framework, Exynos RTC drvier have to control this clock.
Clock list for s3c-rtc device:
- rtc : CLK_RTC of CLK_GATE_IP_PERIR is gate clock for RTC.
- rtc_src : XrtcXTI is 32.768.kHz source clock for RTC.
(XRTCXTI: Specifies a clock from 32.768 kHz crystal pad with XRTCXTI and
XRTCXTO pins. RTC uses this clock as the source of a real-time clock.)
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Alessandro Zummo a.zu...@towertech.it
Cc: Kukjin Kim kgene@samsung.com
---
Documentation/devicetree/bindings/rtc/s3c-rtc.txt | 1 +
drivers/rtc/rtc-s3c.c | 93 ++-
2 files changed, 93 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
index 06db446..ab757b84 100644
--- a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
+++ b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
@@ -6,6 +6,7 @@ Required properties:
* samsung,s3c2416-rtc - for controllers compatible with s3c2416 rtc.
* samsung,s3c2443-rtc - for controllers compatible with s3c2443 rtc.
* samsung,s3c6410-rtc - for controllers compatible with s3c6410 rtc.
+* samsung,exynos3250-rtc - for controllers compatible with exynos3250
rtc.
- reg: physical base address of the controller and length of memory mapped
region.
- interrupts: Two interrupt numbers to the cpu should be specified. First
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index 26a88f9..90dcf51 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -38,6 +38,7 @@ struct s3c_rtc {
void __iomem *base;
struct clk *rtc_clk;
+ struct clk *rtc_src_clk;
bool enabled;
struct s3c_rtc_data *data;
@@ -54,6 +55,7 @@ struct s3c_rtc {
struct s3c_rtc_data {
int max_user_freq;
+ bool needs_src_clk;
void (*irq_handler) (struct s3c_rtc *info, int mask);
void (*set_freq) (struct s3c_rtc *info, int freq);
@@ -73,10 +75,14 @@ static void s3c_rtc_alarm_clk_enable(struct s3c_rtc *info,
bool enable)
if (enable) {
if (!info-enabled) {
clk_enable(info-rtc_clk);
+ if (info-data-needs_src_clk)
+ clk_enable(info-rtc_src_clk);
info-enabled = true;
}
} else {
if (info-enabled) {
+ if (info-data-needs_src_clk)
+ clk_disable(info-rtc_src_clk);
clk_disable(info-rtc_clk);
info-enabled = false;
}
@@ -117,12 +123,16 @@ static int s3c_rtc_setaie(struct device *dev, unsigned
int enabled)
dev_dbg(info-dev, %s: aie=%d\n, __func__, enabled);
clk_enable(info-rtc_clk);
+ if (info-data-needs_src_clk)
+ clk_enable(info-rtc_src_clk);
tmp = readb(info-base + S3C2410_RTCALM) ~S3C2410_RTCALM_ALMEN;
if (enabled)
tmp |= S3C2410_RTCALM_ALMEN;
writeb(tmp, info-base + S3C2410_RTCALM);
+ if (info-data-needs_src_clk)
+ clk_disable(info-rtc_src_clk);
clk_disable(info-rtc_clk);
s3c_rtc_alarm_clk_enable(info, enabled);
@@ -137,12 +147,16 @@ static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq)
return -EINVAL;
clk_enable(info-rtc_clk);
+ if (info-data-needs_src_clk)
+ clk_enable(info-rtc_src_clk);
spin_lock_irq(info-pie_lock);
if (info-data-set_freq)
info-data-set_freq(info, freq);
spin_unlock_irq(info-pie_lock);
+ if (info-data-needs_src_clk)
+ clk_disable(info-rtc_src_clk);
clk_disable(info-rtc_clk);
return 0;
@@ -158,6 +172,9 @@ static int s3c_rtc_gettime(struct device *dev, struct
rtc_time *rtc_tm)
return -EINVAL;
clk_enable(info-rtc_clk);
+ if (info-data-needs_src_clk)
+ clk_enable(info-rtc_src_clk);
+
retry_get_time:
rtc_tm-tm_min = readb(info-base + S3C2410_RTCMIN);
rtc_tm-tm_hour = readb(info-base + S3C2410_RTCHOUR);
@@ -191,6 +208,8 @@ static int s3c_rtc_gettime(struct device *dev, struct
rtc_time *rtc_tm)
rtc_tm-tm_mon -= 1;
+ if (info-data-needs_src_clk)
+ clk_disable(info-rtc_src_clk);
clk_disable(info-rtc_clk);
return rtc_valid_tm(rtc_tm);
@@ -216,6 +235,8 @@ static int s3c_rtc_settime(struct device *dev, struct
rtc_time *tm)
}
clk_enable(info-rtc_clk);
+ if (info-data-needs_src_clk)
+ clk_enable(info-rtc_src_clk);
writeb(bin2bcd(tm-tm_sec), info-base +
[RESEND PATCHv2 5/5] ARM: dts: Fix wrong compatible string of Exynos3250 RTC dt node
This patch fix wrong compatible string of Exynos3250 RTC (Real-Time Clock) dt
node. The RTC of Exynos3250 must need additional source clock (XrtcXTI).
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Alessandro Zummo a.zu...@towertech.it
Cc: Kukjin Kim kgene@samsung.com
---
arch/arm/boot/dts/exynos3250.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi
b/arch/arm/boot/dts/exynos3250.dtsi
index cd6a69a..1be5ef8 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -192,7 +192,7 @@
};
rtc: rtc@1007 {
- compatible = samsung,s3c6410-rtc;
+ compatible = samsung,exynos3250-rtc;
reg = 0x1007 0x100;
interrupts = 0 73 0, 0 74 0;
status = disabled;
--
1.8.0
--
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[RESEND PATCHv2 2/5] rtc: s3c: Remove warning message when checking coding style with checkpatch script
This patch remove warning message when checking codeing style with checkpatch
script and reduce un-necessary i2c read operation on s3c_rtc_enable.
WARNING: line over 80 characters
#406: FILE: drivers/rtc/rtc-s3c.c:406:
+ if ((readw(info-base + S3C2410_RTCCON)
S3C2410_RTCCON_RTCEN) == 0) {
WARNING: line over 80 characters
#414: FILE: drivers/rtc/rtc-s3c.c:414:
+ if ((readw(info-base + S3C2410_RTCCON)
S3C2410_RTCCON_CNTSEL)) {
WARNING: line over 80 characters
#422: FILE: drivers/rtc/rtc-s3c.c:422:
+ if ((readw(info-base + S3C2410_RTCCON)
S3C2410_RTCCON_CLKRST)) {
WARNING: Missing a blank line after declarations
#451: FILE: drivers/rtc/rtc-s3c.c:451:
+ struct s3c_rtc_drv_data *data;
+ if (pdev-dev.of_node) {
WARNING: Missing a blank line after declarations
#453: FILE: drivers/rtc/rtc-s3c.c:453:
+ const struct of_device_id *match;
+ match = of_match_node(s3c_rtc_dt_match,
pdev-dev.of_node);
WARNING: DT compatible string samsung,s3c2416-rtc appears
un-documented -- check ./Documentation/devicetree/bindings/
#650: FILE: drivers/rtc/rtc-s3c.c:650:
+ .compatible = samsung,s3c2416-rtc,
WARNING: DT compatible string samsung,s3c2443-rtc appears
un-documented -- check ./Documentation/devicetree/bindings/
#653: FILE: drivers/rtc/rtc-s3c.c:653:
+ .compatible = samsung,s3c2443-rtc,
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Alessandro Zummo a.zu...@towertech.it
Cc: Kukjin Kim kgene@samsung.com
---
Documentation/devicetree/bindings/rtc/s3c-rtc.txt | 2 ++
drivers/rtc/rtc-s3c.c | 26 ---
2 files changed, 16 insertions(+), 12 deletions(-)
diff --git a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
index 7ac7259..06db446 100644
--- a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
+++ b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
@@ -3,6 +3,8 @@
Required properties:
- compatible: should be one of the following.
* samsung,s3c2410-rtc - for controllers compatible with s3c2410 rtc.
+* samsung,s3c2416-rtc - for controllers compatible with s3c2416 rtc.
+* samsung,s3c2443-rtc - for controllers compatible with s3c2443 rtc.
* samsung,s3c6410-rtc - for controllers compatible with s3c6410 rtc.
- reg: physical base address of the controller and length of memory mapped
region.
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index 1d9e158..d8f25bd 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -400,28 +400,28 @@ static const struct rtc_class_ops s3c_rtcops = {
static void s3c_rtc_enable(struct s3c_rtc *info, int en)
{
- unsigned int tmp;
+ unsigned int con, tmp;
if (!info-base)
return;
clk_enable(info-rtc_clk);
+
+ con = readw(info-base + S3C2410_RTCCON);
if (!en) {
- tmp = readw(info-base + S3C2410_RTCCON);
if (info-cpu_type == TYPE_S3C64XX)
- tmp = ~S3C64XX_RTCCON_TICEN;
- tmp = ~S3C2410_RTCCON_RTCEN;
- writew(tmp, info-base + S3C2410_RTCCON);
+ con = ~S3C64XX_RTCCON_TICEN;
+ con = ~S3C2410_RTCCON_RTCEN;
+ writew(con, info-base + S3C2410_RTCCON);
if (info-cpu_type != TYPE_S3C64XX) {
- tmp = readb(info-base + S3C2410_TICNT);
- tmp = ~S3C2410_TICNT_ENABLE;
- writeb(tmp, info-base + S3C2410_TICNT);
+ con = readb(info-base + S3C2410_TICNT);
+ con = ~S3C2410_TICNT_ENABLE;
+ writeb(con, info-base + S3C2410_TICNT);
}
} else {
/* re-enable the device, and check it is ok */
-
- if ((readw(info-base + S3C2410_RTCCON) S3C2410_RTCCON_RTCEN)
== 0) {
+ if ((con S3C2410_RTCCON_RTCEN) == 0) {
dev_info(info-dev, rtc disabled, re-enabling\n);
tmp = readw(info-base + S3C2410_RTCCON);
@@ -429,7 +429,7 @@ static void s3c_rtc_enable(struct s3c_rtc *info, int en)
info-base + S3C2410_RTCCON);
}
- if ((readw(info-base + S3C2410_RTCCON)
S3C2410_RTCCON_CNTSEL)) {
+ if (con S3C2410_RTCCON_CNTSEL) {
dev_info(info-dev, removing RTCCON_CNTSEL\n);
tmp = readw(info-base + S3C2410_RTCCON);
@@ -437,7 +437,7 @@ static void s3c_rtc_enable(struct s3c_rtc *info, int en)
info-base + S3C2410_RTCCON);
}
-
[RESEND PATCHv2 1/5] rtc: s3c: Define s3c_rtc structure to remove global variables.
This patch define s3c_rtc structure including necessary variables for S3C RTC
device instead of global variables. This patch improves the readability by
removing global variables.
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Alessandro Zummo a.zu...@towertech.it
Cc: Kukjin Kim kgene@samsung.com
---
drivers/rtc/rtc-s3c.c | 448 ++
1 file changed, 235 insertions(+), 213 deletions(-)
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index 4958a36..1d9e158 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -43,125 +43,135 @@ struct s3c_rtc_drv_data {
int cpu_type;
};
-/* I have yet to find an S3C implementation with more than one
- * of these rtc blocks in */
+struct s3c_rtc {
+ struct device *dev;
+ struct rtc_device *rtc;
+
+ void __iomem *base;
+ struct clk *rtc_clk;
+ bool enabled;
-static struct clk *rtc_clk;
-static void __iomem *s3c_rtc_base;
-static int s3c_rtc_alarmno;
-static int s3c_rtc_tickno;
-static enum s3c_cpu_type s3c_rtc_cpu_type;
+ enum s3c_cpu_type cpu_type;
-static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
+ int irq_alarm;
+ int irq_tick;
-static void s3c_rtc_alarm_clk_enable(bool enable)
+ spinlock_t pie_lock;
+ spinlock_t alarm_clk_lock;
+
+ int ticnt_save, ticnt_en_save;
+ bool wake_en;
+};
+
+static void s3c_rtc_alarm_clk_enable(struct s3c_rtc *info, bool enable)
{
- static DEFINE_SPINLOCK(s3c_rtc_alarm_clk_lock);
- static bool alarm_clk_enabled;
unsigned long irq_flags;
- spin_lock_irqsave(s3c_rtc_alarm_clk_lock, irq_flags);
+ spin_lock_irqsave(info-alarm_clk_lock, irq_flags);
if (enable) {
- if (!alarm_clk_enabled) {
- clk_enable(rtc_clk);
- alarm_clk_enabled = true;
+ if (!info-enabled) {
+ clk_enable(info-rtc_clk);
+ info-enabled = true;
}
} else {
- if (alarm_clk_enabled) {
- clk_disable(rtc_clk);
- alarm_clk_enabled = false;
+ if (info-enabled) {
+ clk_disable(info-rtc_clk);
+ info-enabled = false;
}
}
- spin_unlock_irqrestore(s3c_rtc_alarm_clk_lock, irq_flags);
+ spin_unlock_irqrestore(info-alarm_clk_lock, irq_flags);
}
/* IRQ Handlers */
-
static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
{
- struct rtc_device *rdev = id;
+ struct s3c_rtc *info = (struct s3c_rtc *)id;
- clk_enable(rtc_clk);
- rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
+ clk_enable(info-rtc_clk);
+ rtc_update_irq(info-rtc, 1, RTC_AF | RTC_IRQF);
- if (s3c_rtc_cpu_type == TYPE_S3C64XX)
- writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);
+ if (info-cpu_type == TYPE_S3C64XX)
+ writeb(S3C2410_INTP_ALM, info-base + S3C2410_INTP);
- clk_disable(rtc_clk);
+ clk_disable(info-rtc_clk);
- s3c_rtc_alarm_clk_enable(false);
+ s3c_rtc_alarm_clk_enable(info, false);
return IRQ_HANDLED;
}
static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
{
- struct rtc_device *rdev = id;
+ struct s3c_rtc *info = (struct s3c_rtc *)id;
+
+ clk_enable(info-rtc_clk);
+ rtc_update_irq(info-rtc, 1, RTC_PF | RTC_IRQF);
- clk_enable(rtc_clk);
- rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);
+ if (info-cpu_type == TYPE_S3C64XX)
+ writeb(S3C2410_INTP_TIC, info-base + S3C2410_INTP);
- if (s3c_rtc_cpu_type == TYPE_S3C64XX)
- writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);
+ clk_disable(info-rtc_clk);
- clk_disable(rtc_clk);
return IRQ_HANDLED;
}
/* Update control registers */
static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
{
+ struct s3c_rtc *info = dev_get_drvdata(dev);
unsigned int tmp;
- dev_dbg(dev, %s: aie=%d\n, __func__, enabled);
+ if (!info-base)
+ return -EINVAL;
+
+ dev_dbg(info-dev, %s: aie=%d\n, __func__, enabled);
- clk_enable(rtc_clk);
- tmp = readb(s3c_rtc_base + S3C2410_RTCALM) ~S3C2410_RTCALM_ALMEN;
+ clk_enable(info-rtc_clk);
+ tmp = readb(info-base + S3C2410_RTCALM) ~S3C2410_RTCALM_ALMEN;
if (enabled)
tmp |= S3C2410_RTCALM_ALMEN;
- writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
- clk_disable(rtc_clk);
+ writeb(tmp, info-base + S3C2410_RTCALM);
+ clk_disable(info-rtc_clk);
- s3c_rtc_alarm_clk_enable(enabled);
+ s3c_rtc_alarm_clk_enable(info, enabled);
return 0;
}
-static int s3c_rtc_setfreq(struct device *dev, int freq)
+static int s3c_rtc_setfreq(struct s3c_rtc *info, int
RE: [PATCH 1/2] ARM: dts: Enable PMIC interrupts on ODROID
Olof Johansson wrote: On Tue, Aug 19, 2014 at 12:15:41PM +0200, Javier Martinez Canillas wrote: Hello, On Tue, Aug 19, 2014 at 11:57 AM, Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com wrote: IMHO they should go to upstream ASAP as they fix the boot for ODROID boards and they cannot break anything as they are limited to ODROID dts files. Agreed, this is definitely -rc material IMHO. Yes. Definitely. OK, agreed. Will apply into fixes. Thanks, Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v5 3/4] usb: hcd: Caibrate PHY post hcd reset
Hi, s/Caibrate/Calibrate/ Cheers, Andreas -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v7] ARM: dts: Prepare node labels for exynos5250
Andreas Färber wrote:
Allows them to be extended by reference.
Reviewed-by: Doug Anderson diand...@chromium.org
Signed-off-by: Andreas Färber afaer...@suse.de
---
v6 - v7:
* Dropped uart* labels (Tomasz Figa)
v6: Split off from Snow/SMDK cleanups (Doug Anderson)
arch/arm/boot/dts/exynos5250.dtsi | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 492e1eff37bd..42eafd19cfb2 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -218,7 +218,7 @@
clock-names = fimg2d;
};
- codec@1100 {
+ mfc: codec@1100 {
compatible = samsung,mfc-v6;
reg = 0x1100 0x1;
interrupts = 0 96 0;
@@ -227,7 +227,7 @@
clock-names = mfc;
};
- rtc@101E {
+ rtc: rtc@101E {
clocks = clock CLK_RTC;
clock-names = rtc;
status = disabled;
@@ -261,7 +261,7 @@
clock-names = uart, clk_uart_baud0;
};
- sata@122F {
+ sata: sata@122F {
compatible = snps,dwc-ahci;
samsung,sata-freq = 66;
reg = 0x122F 0x1ff;
@@ -573,7 +573,7 @@
#phy-cells = 1;
};
- usb@1211 {
+ ehci: usb@1211 {
I'm not sure which one is recommended between above and ehci: ehci@1211 {
compatible = samsung,exynos4210-ehci;
reg = 0x1211 0x100;
interrupts = 0 71 0;
@@ -588,7 +588,7 @@
};
};
- usb@1212 {
+ ohci: usb@1212 {
Same as above...
compatible = samsung,exynos4210-ohci;
reg = 0x1212 0x100;
interrupts = 0 71 0;
@@ -725,7 +725,7 @@
clock-names = gscl;
};
- hdmi {
+ hdmi: hdmi {
Should be
+ hdmi: hdmi@1453 { ?
compatible = samsung,exynos4212-hdmi;
reg = 0x1453 0x7;
interrupts = 0 95 0;
@@ -751,14 +751,14 @@
#phy-cells = 0;
};
- dp-controller@145B {
+ dp: dp-controller@145B {
clocks = clock CLK_DP;
clock-names = dp;
phys = dp_phy;
phy-names = dp;
};
- fimd@1440 {
+ fimd: fimd@1440 {
clocks = clock CLK_SCLK_FIMD1, clock CLK_FIMD1;
clock-names = sclk_fimd, fimd;
};
--
2.0.4
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Re: [RESEND PATCH 5/7] mfd: cros_ec: wait for completion of commands that return IN_PROGRESS
Hello Lee,
Thanks a lot for your feedback.
On 08/21/2014 04:21 PM, Lee Jones wrote:
On Wed, 20 Aug 2014, Javier Martinez Canillas wrote:
From: Andrew Bresticker abres...@chromium.org
When an EC command returns EC_RES_IN_PROGRESS, we need to query
the state of the EC until it indicates that it is no longer busy.
Do this in cros_ec_cmd_xfer() under the EC's mutex so that other
commands (e.g. keyboard, I2C passtru) aren't issued to the EC while
it is working on the in-progress command.
Signed-off-by: Andrew Bresticker abres...@chromium.org
Reviewed-by: Simon Glass s...@chromium.org
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/mfd/cros_ec.c | 35 ++-
1 file changed, 34 insertions(+), 1 deletion(-)
diff --git a/drivers/mfd/cros_ec.c b/drivers/mfd/cros_ec.c
index c53804a..634c434 100644
--- a/drivers/mfd/cros_ec.c
+++ b/drivers/mfd/cros_ec.c
@@ -23,6 +23,10 @@
#include linux/mfd/core.h
#include linux/mfd/cros_ec.h
#include linux/mfd/cros_ec_commands.h
+#include linux/delay.h
+
+#define EC_COMMAND_RETRIES 50
+#define EC_RETRY_DELAY_MS 10
int cros_ec_prepare_tx(struct cros_ec_device *ec_dev,
struct cros_ec_command *msg)
@@ -65,10 +69,39 @@ EXPORT_SYMBOL(cros_ec_check_result);
int cros_ec_cmd_xfer(struct cros_ec_device *ec_dev,
struct cros_ec_command *msg)
{
-int ret;
+int ret, i;
mutex_lock(ec_dev-lock);
ret = ec_dev-cmd_xfer(ec_dev, msg);
+if (ret == -EAGAIN msg-result == EC_RES_IN_PROGRESS) {
+/*
+ * Query the EC's status until it's no longer busy or
+ * we encounter an error.
+ */
+for (i = 0; i EC_COMMAND_RETRIES; i++) {
+struct cros_ec_command status_msg;
+struct ec_response_get_comms_status status;
+
+msleep(EC_RETRY_DELAY_MS);
+
+status_msg.version = 0;
+status_msg.command = EC_CMD_GET_COMMS_STATUS;
+status_msg.outdata = NULL;
+status_msg.outsize = 0;
+status_msg.indata = (uint8_t *)status;
+status_msg.insize = sizeof(status);
+
+ret = ec_dev-cmd_xfer(ec_dev, status_msg);
+if (ret 0)
+break;
+
+msg-result = status_msg.result;
+if (status_msg.result != EC_RES_SUCCESS)
+break;
+if (!(status.flags EC_COMMS_STATUS_PROCESSING))
+break;
+}
+}
Wow! Things just got ugly real fast.
Do the *xfer() calls fiddle with msg passed into cros_ec_cmd_xfer()?
If not, why is it necessary to keep populating it?
Not really, I see that only struct cros_ec_command .result and .indata
fields are modified by the cmd_xfer() function handlers so I agree with
you that these variables can be defined outside of the for loop and
reused. I think that even zero'ing indata is not needed between calls
since on success the full sizeof(status) is copied and on failure it
doesn't matter what is there.
Will change this when doing the re-spin.
If all this stuff is necessary (and I really hope that it's not) I
think it would be better to have the for() loop as the outer layer.
Then we only have one instance of cmd_xfer() invocation and we save a
layer of tabbing.
Most of this doesn't need to be inside the for loop as you said but there
is a need for two struct cros_ec_command *msg though, one for the actual
command made by the caller and other to query the EC if it already
finished processing the first command.
mutex_unlock(ec_dev-lock);
return ret;
Best regards,
Javier
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Re: [RESEND PATCH 6/7] mfd: cros_ec: Instantiate sub-devices from device tree
Hello Lee,
On 08/21/2014 04:25 PM, Lee Jones wrote:
static const struct mfd_cell cros_devs[] = {
-{
-.name = cros-ec-keyb,
-.id = 1,
-.of_compatible = google,cros-ec-keyb,
-},
-{
-.name = cros-ec-i2c-tunnel,
-.id = 2,
-.of_compatible = google,cros-ec-i2c-tunnel,
-},
};
Why are you keeping this round if it's empty?
Right, I'll just remove it.
}
+#ifdef CONFIG_OF
+/*
+ * Add sub-devices declared in the device tree. NOTE they should NOT be
+ * declared in cros_devs
+ */
+for_each_child_of_node(dev-of_node, node) {
+char name[128];
+struct mfd_cell cell = {
+.id = 0,
+.name = name,
+};
+
+if (of_modalias_node(node, name, sizeof(name)) 0) {
+dev_err(dev, modalias failure on %s\n,
+node-full_name);
+continue;
+}
+dev_dbg(dev, adding MFD sub-device %s\n, node-name);
+cell.of_compatible = of_get_property(node, compatible, NULL);
+err = mfd_add_devices(dev, ++id, cell, 1, NULL, ec_dev-irq,
+ NULL);
+if (err)
+dev_err(dev, fail to add %s\n, node-full_name);
+}
+#endif
This is grim!
Why don't you use of_platform_populate()?
Indeed, I think it may just work and all these is not needed.
Thanks for your feedback and best regards,
Javier
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Re: [PATCH v7] ARM: dts: Prepare node labels for exynos5250
Am 22.08.2014 12:49, schrieb Kukjin Kim:
Andreas Färber wrote:
Allows them to be extended by reference.
Reviewed-by: Doug Anderson diand...@chromium.org
Signed-off-by: Andreas Färber afaer...@suse.de
---
v6 - v7:
* Dropped uart* labels (Tomasz Figa)
v6: Split off from Snow/SMDK cleanups (Doug Anderson)
arch/arm/boot/dts/exynos5250.dtsi | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 492e1eff37bd..42eafd19cfb2 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -218,7 +218,7 @@
clock-names = fimg2d;
};
-codec@1100 {
+mfc: codec@1100 {
compatible = samsung,mfc-v6;
reg = 0x1100 0x1;
interrupts = 0 96 0;
@@ -227,7 +227,7 @@
clock-names = mfc;
};
-rtc@101E {
+rtc: rtc@101E {
clocks = clock CLK_RTC;
clock-names = rtc;
status = disabled;
@@ -261,7 +261,7 @@
clock-names = uart, clk_uart_baud0;
};
-sata@122F {
+sata: sata@122F {
compatible = snps,dwc-ahci;
samsung,sata-freq = 66;
reg = 0x122F 0x1ff;
@@ -573,7 +573,7 @@
#phy-cells = 1;
};
-usb@1211 {
+ehci: usb@1211 {
I'm not sure which one is recommended between above and ehci: ehci@1211
{
compatible = samsung,exynos4210-ehci;
reg = 0x1211 0x100;
interrupts = 0 71 0;
@@ -588,7 +588,7 @@
};
};
-usb@1212 {
+ohci: usb@1212 {
Same as above...
A quick git-grep in v3.16.1 shows both ways used in arch/arm/boot/dts/:
usb@: 232
xhci@: 0
ehci@: 41
ohci@: 60
uhci@: 7
compatible = samsung,exynos4210-ohci;
reg = 0x1212 0x100;
interrupts = 0 71 0;
@@ -725,7 +725,7 @@
clock-names = gscl;
};
-hdmi {
+hdmi: hdmi {
Should be
+ hdmi: hdmi@1453 { ?
Actually, without applying this patch and my follow-up cleanups strictly
using these new labels, we can't rename any of the nodes here, since it
would break the derived .dts files. It was specifically requested in v5
to make this patch here separate from subsequent uses of the new labels
for the benefit of cherry-picking.
So since you don't seem to disagree with the label names that I add
here, I consider renaming nodes outside the scope of this patch.
+1 for reflecting the reg address in the unit address of the hdmi node
as a follow-up to the refactorings, if that does not break any driver
assumptions.
Regards,
Andreas
compatible = samsung,exynos4212-hdmi;
reg = 0x1453 0x7;
interrupts = 0 95 0;
@@ -751,14 +751,14 @@
#phy-cells = 0;
};
-dp-controller@145B {
+dp: dp-controller@145B {
clocks = clock CLK_DP;
clock-names = dp;
phys = dp_phy;
phy-names = dp;
};
-fimd@1440 {
+fimd: fimd@1440 {
clocks = clock CLK_SCLK_FIMD1, clock CLK_FIMD1;
clock-names = sclk_fimd, fimd;
};
--
2.0.4
--
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GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
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[PATCH 2/2] drivers/gpu/drm/vmwgfx/vmwgfx_fence.h: Add missing #define
The name of the macro suggests that the include guard idiom was meant, but the #define was missing. Signed-off-by: Rasmus Villemoes li...@rasmusvillemoes.dk --- drivers/gpu/drm/vmwgfx/vmwgfx_fence.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.h b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.h index faf2e78..1b48a22 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.h +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.h @@ -26,6 +26,7 @@ **/ #ifndef _VMWGFX_FENCE_H_ +#define _VMWGFX_FENCE_H_ #define VMW_FENCE_WAIT_TIMEOUT (5*HZ) -- 1.9.2 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] drivers/gpu/drm/exynos/exynos_drm_fb.h: Fix typo in include guard
Signed-off-by: Rasmus Villemoes li...@rasmusvillemoes.dk --- drivers/gpu/drm/exynos/exynos_drm_fb.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_fb.h b/drivers/gpu/drm/exynos/exynos_drm_fb.h index 517471b..09ce2bc 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fb.h +++ b/drivers/gpu/drm/exynos/exynos_drm_fb.h @@ -12,7 +12,7 @@ */ #ifndef _EXYNOS_DRM_FB_H_ -#define _EXYNOS_DRM_FB_H +#define _EXYNOS_DRM_FB_H_ struct drm_framebuffer * exynos_drm_framebuffer_init(struct drm_device *dev, -- 1.9.2 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v9 1/2] regulator: Add driver for max77802 PMIC PMIC regulators
Hello Yuvaraj,
On 08/22/2014 08:01 AM, Yuvaraj Cd wrote:
+
+static int max77802_pmic_probe(struct platform_device *pdev)
+{
+ struct max77686_dev *iodev = dev_get_drvdata(pdev-dev.parent);
+ struct max77686_platform_data *pdata = dev_get_platdata(iodev-dev);
+ struct max77802_regulator_prv *max77802;
+ int i, ret = 0, val;
+ struct regulator_config config = { };
+
+ /* This is allocated by the MFD driver */
+ if (!pdata) {
+ dev_err(pdev-dev, no platform data found for
regulator\n);
+ return -ENODEV;
+ }
+
+ max77802 = devm_kzalloc(pdev-dev,
+ sizeof(struct max77802_regulator_prv),
+ GFP_KERNEL);
+ if (!max77802)
+ return -ENOMEM;
+
+ if (iodev-dev-of_node) {
+ ret = max77802_pmic_dt_parse_pdata(pdev, pdata);
+ if (ret)
+ return ret;
+ }
+
+ config.dev = iodev-dev;
+ config.regmap = iodev-regmap;
+ config.driver_data = max77802;
+ platform_set_drvdata(pdev, max77802);
+
+ for (i = 0; i MAX77802_REG_MAX; i++) {
+ struct regulator_dev *rdev;
+ int id = pdata-regulators[i].id;
+ int shift = max77802_get_opmode_shift(id);
+
+ config.init_data = pdata-regulators[i].initdata;
+ config.of_node = pdata-regulators[i].of_node;
+
+ ret = regmap_read(iodev-regmap, regulators[i].enable_reg,
val);
+ max77802-opmode[id] = val shift MAX77802_OPMODE_MASK;
I have been using this patch series for adding UHS support for dw_mmc
driver. During reboot testing I came across an issue where card
detection fails due to vqmmc regulator not getting enabled. On
debugging further, I found that PMIC driver is reading the operating
mode during probe and reusing it in the enable function. With the UHS
patches vqmmc regulator gets disabled during POWER_OFF and if we do
warm reboot, an incorrect operating mode(OFF) is read. This leads to
the vqmmc regulator staying disabled. I have referred to 77686 driver
and observed that they are handling this a little differently. With
the following change in the driver above issue is resolved:
- ret = regmap_read(iodev-regmap,
regulators[i].enable_reg, val);
- max77802-opmode[id] = val shift MAX77802_OPMODE_MASK;
+ max77802-opmode[i] = regulators[i].enable_mask shift;
I don't think this change is correct it its current form since
.enable_mask is initialized to MAX77802_OPMODE_MASK shift so this is
actually setting the opmode to MAX77802_OPMODE_MASK.
Now, MAX77802_OPMODE_MASK has the same value than MAX77802_OPMODE_NORMAL
so what you are really doing here is initializing the opmode to
MAX77802_OPMODE_NORMAL.
Please have a look and let me know, if there is any better way of handling
this.
The first versions of this driver did in fact set the opmode to
MAX77802_OPMODE_NORMAL on probe but Mark asked me to read it from the
hardware instead [0]. I was indeed worried at the time that something like
this could happen on a warm reset [1].
Mark, any opinions on how this should be solved will be highly appreciated.
Best regards,
Javier
[0]: https://lkml.org/lkml/2014/6/16/576
[1]: https://lkml.org/lkml/2014/6/17/174
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[PATCH V2 2/3] mmc: dw_mmc: Support voltage changes
From: Doug Anderson diand...@chromium.org
For UHS cards we need the ability to switch voltages from 3.3V to
1.8V. Add support to the dw_mmc driver to handle this. Note that
dw_mmc needs a little bit of extra code since the interface needs a
special bit programmed to the CMD register while CMD11 is progressing.
This means adding a few extra states to the state machine to track.
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Yuvaraj Kumar C D yuvaraj...@samsung.com
---
changes since v1:
1. Added error message and return error in case of
regulator_set_voltage() fail.
2. changed dw_mci_cmd_interrupt(host,pending | SDMMC_INT_CMD_DONE)
to dw_mci_cmd_interrupt(host,pending).
3. Removed unnecessary comments.
drivers/mmc/host/dw_mmc.c | 134 +---
drivers/mmc/host/dw_mmc.h |5 +-
include/linux/mmc/dw_mmc.h |2 +
3 files changed, 131 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index aadb0d6..f20b4b8 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -29,6 +29,7 @@
#include linux/irq.h
#include linux/mmc/host.h
#include linux/mmc/mmc.h
+#include linux/mmc/sd.h
#include linux/mmc/sdio.h
#include linux/mmc/dw_mmc.h
#include linux/bitops.h
@@ -234,10 +235,13 @@ err:
}
#endif /* defined(CONFIG_DEBUG_FS) */
+static void mci_send_cmd(struct dw_mci_slot *slot, u32 cmd, u32 arg);
+
static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command
*cmd)
{
struct mmc_data *data;
struct dw_mci_slot *slot = mmc_priv(mmc);
+ struct dw_mci *host = slot-host;
const struct dw_mci_drv_data *drv_data = slot-host-drv_data;
u32 cmdr;
cmd-error = -EINPROGRESS;
@@ -253,6 +257,31 @@ static u32 dw_mci_prepare_command(struct mmc_host *mmc,
struct mmc_command *cmd)
else if (cmd-opcode != MMC_SEND_STATUS cmd-data)
cmdr |= SDMMC_CMD_PRV_DAT_WAIT;
+ if (cmd-opcode == SD_SWITCH_VOLTAGE) {
+ u32 clk_en_a;
+
+ /* Special bit makes CMD11 not die */
+ cmdr |= SDMMC_CMD_VOLT_SWITCH;
+
+ /* Change state to continue to handle CMD11 weirdness */
+ WARN_ON(slot-host-state != STATE_SENDING_CMD);
+ slot-host-state = STATE_SENDING_CMD11;
+
+ /*
+* We need to disable clock stop while doing voltage switch
+* according to Voltage Switch Normal Scenario.
+* It's assumed that by the next time the CLKENA is updated
+* (when we set the clock next) that the voltage change will
+* be over, so we don't bother setting any bits to synchronize
+* with dw_mci_setup_bus().
+*/
+ clk_en_a = mci_readl(host, CLKENA);
+ clk_en_a = ~(SDMMC_CLKEN_LOW_PWR slot-id);
+ mci_writel(host, CLKENA, clk_en_a);
+ mci_send_cmd(slot, SDMMC_CMD_UPD_CLK |
+SDMMC_CMD_PRV_DAT_WAIT, 0);
+ }
+
if (cmd-flags MMC_RSP_PRESENT) {
/* We expect a response, so set this bit */
cmdr |= SDMMC_CMD_RESP_EXP;
@@ -775,11 +804,15 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot,
bool force_clkinit)
unsigned int clock = slot-clock;
u32 div;
u32 clk_en_a;
+ u32 sdmmc_cmd_bits = SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT;
+
+ /* We must continue to set bit 28 in CMD until the change is complete */
+ if (host-state == STATE_WAITING_CMD11_DONE)
+ sdmmc_cmd_bits |= SDMMC_CMD_VOLT_SWITCH;
if (!clock) {
mci_writel(host, CLKENA, 0);
- mci_send_cmd(slot,
-SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0);
+ mci_send_cmd(slot, sdmmc_cmd_bits, 0);
} else if (clock != host-current_speed || force_clkinit) {
div = host-bus_hz / clock;
if (host-bus_hz % clock host-bus_hz clock)
@@ -803,15 +836,13 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot,
bool force_clkinit)
mci_writel(host, CLKSRC, 0);
/* inform CIU */
- mci_send_cmd(slot,
-SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0);
+ mci_send_cmd(slot, sdmmc_cmd_bits, 0);
/* set clock to desired speed */
mci_writel(host, CLKDIV, div);
/* inform CIU */
- mci_send_cmd(slot,
-SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0);
+ mci_send_cmd(slot, sdmmc_cmd_bits, 0);
/* enable clock; only low power if no SDIO */
clk_en_a = SDMMC_CLKEN_ENABLE slot-id;
@@ -820,8 +851,7 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot, bool
force_clkinit)
[PATCH V2 0/3] Adding UHS support for dw_mmc driver
This series adds UHS support for dw_mmc driver. Patch[1] reworks the handling of vmmc and vqmmc regulators by mmc core regulator API's. Patch[2] was taken from chrome tree originally developed by Doug Anderson. Comments recieved for this patch to remove extra state machine for CMD11 handling is dropped since it's very much required to set the SDMMC_CMD_VOLT_SWITCH bit(28) for the proper working of clock update after the first VOLT_SWITCH interrupt occurs during the voltage switch scenario. Though its not mentioned in Synopsys data book, its essential to complete the voltage switchingi sequence. Patch[3] handles the case where in some boards uses built-in CD line for card detection and connected to a same voltage domain as of the IO rails. This version adds the changes for the concerned expressed by Doug Anderson in prevoius version. Doug Anderson (1): [2].mmc: dw_mmc: Support voltage changes Yuvaraj Kumar C D (2): [1]. mmc: dw_mmc: use mmc_regulator_get_supply to handle regulators [3]. mmc: dw_mmc: Dont cut off vqmmc and vmmc drivers/mmc/core/core.c | 16 ++- drivers/mmc/core/debugfs.c |3 + drivers/mmc/host/dw_mmc-exynos.c | 12 ++ drivers/mmc/host/dw_mmc.c| 231 ++ drivers/mmc/host/dw_mmc.h|7 +- include/linux/mmc/dw_mmc.h |4 +- include/linux/mmc/host.h |2 + 7 files changed, 225 insertions(+), 50 deletions(-) -- 1.7.10.4 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V2 1/3] mmc: dw_mmc: use mmc_regulator_get_supply to handle regulators
This patch makes use of mmc_regulator_get_supply() to handle
the vmmc and vqmmc regulators.Also it moves the code handling
the these regulators to dw_mci_set_ios().It turned on the vmmc
and vqmmc during MMC_POWER_UP and MMC_POWER_ON,and turned off
during MMC_POWER_OFF.
Signed-off-by: Yuvaraj Kumar C D yuvaraj...@samsung.com
---
changes from v1:
1.Used mmc_regulator_set_ocr() instead of regulator_enable() for vmmc.
2.Turned on vmmc and vqmmc during MMC_POWER_UP.
3. Removed the flags DW_MMC_CARD_POWERED and DW_MMC_IO_POWERED which
added during the initial version of this patch.
4. Added error message, if it failed to turn on regulator's.
drivers/mmc/host/dw_mmc.c | 72 +---
include/linux/mmc/dw_mmc.h |2 +-
2 files changed, 36 insertions(+), 38 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 7f227e9..aadb0d6 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -936,6 +936,7 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct
mmc_ios *ios)
struct dw_mci_slot *slot = mmc_priv(mmc);
const struct dw_mci_drv_data *drv_data = slot-host-drv_data;
u32 regs;
+ int ret;
switch (ios-bus_width) {
case MMC_BUS_WIDTH_4:
@@ -974,12 +975,38 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct
mmc_ios *ios)
switch (ios-power_mode) {
case MMC_POWER_UP:
+ if (!IS_ERR(mmc-supply.vmmc)) {
+ ret = mmc_regulator_set_ocr(mmc, mmc-supply.vmmc,
+ ios-vdd);
+ if (ret) {
+ dev_err(slot-host-dev,
+ failed to enable vmmc regulator\n);
+ /*return, if failed turn on vmmc*/
+ return;
+ }
+ }
+ if (!IS_ERR(mmc-supply.vqmmc) !slot-host-vqmmc_enabled) {
+ ret = regulator_enable(mmc-supply.vqmmc);
+ if (ret 0)
+ dev_err(slot-host-dev,
+ failed to enable vqmmc regulator\n);
+ else
+ slot-host-vqmmc_enabled = true;
+ }
set_bit(DW_MMC_CARD_NEED_INIT, slot-flags);
regs = mci_readl(slot-host, PWREN);
regs |= (1 slot-id);
mci_writel(slot-host, PWREN, regs);
break;
case MMC_POWER_OFF:
+ if (!IS_ERR(mmc-supply.vmmc))
+ mmc_regulator_set_ocr(mmc, mmc-supply.vmmc, 0);
+
+ if (!IS_ERR(mmc-supply.vqmmc) slot-host-vqmmc_enabled) {
+ regulator_disable(mmc-supply.vqmmc);
+ slot-host-vqmmc_enabled = false;
+ }
+
regs = mci_readl(slot-host, PWREN);
regs = ~(1 slot-id);
mci_writel(slot-host, PWREN, regs);
@@ -2110,7 +2137,13 @@ static int dw_mci_init_slot(struct dw_mci *host,
unsigned int id)
mmc-f_max = freq[1];
}
- mmc-ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
+ /*if there are external regulators, get them*/
+ ret = mmc_regulator_get_supply(mmc);
+ if (ret == -EPROBE_DEFER)
+ goto err_setup_bus;
+
+ if (!mmc-ocr_avail)
+ mmc-ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
if (host-pdata-caps)
mmc-caps = host-pdata-caps;
@@ -2176,7 +2209,7 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned
int id)
err_setup_bus:
mmc_free_host(mmc);
- return -EINVAL;
+ return ret;
}
static void dw_mci_cleanup_slot(struct dw_mci_slot *slot, unsigned int id)
@@ -2469,24 +2502,6 @@ int dw_mci_probe(struct dw_mci *host)
}
}
- host-vmmc = devm_regulator_get_optional(host-dev, vmmc);
- if (IS_ERR(host-vmmc)) {
- ret = PTR_ERR(host-vmmc);
- if (ret == -EPROBE_DEFER)
- goto err_clk_ciu;
-
- dev_info(host-dev, no vmmc regulator found: %d\n, ret);
- host-vmmc = NULL;
- } else {
- ret = regulator_enable(host-vmmc);
- if (ret) {
- if (ret != -EPROBE_DEFER)
- dev_err(host-dev,
- regulator_enable fail: %d\n, ret);
- goto err_clk_ciu;
- }
- }
-
host-quirks = host-pdata-quirks;
spin_lock_init(host-lock);
@@ -2630,8 +2645,6 @@ err_workqueue:
err_dmaunmap:
if (host-use_dma host-dma_ops-exit)
host-dma_ops-exit(host);
- if (host-vmmc)
- regulator_disable(host-vmmc);
err_clk_ciu:
if
[PATCH V2 3/3] mmc: dw_mmc: Dont cut off vqmmc and vmmc
Exynos 5250 and 5420 based boards uses built-in CD# line for card
detection.But unfortunately CD# line is on the same voltage rails
as of I/O voltage rails. When we cut off vqmmc,the consequent card
detection will break in these boards.
These hosts (obviously) need to keep vqmmc (and thus vmmc) on all the
time, even when the mmc core tells them to power off. However, one
problem is that these cards won't properly handle mmc_power_cycle().
That's needed to handle error cases when trying to switch voltages
(see 0797e5f mmc:core: Fixup signal voltage switch).
This patch adds a new MMC_POWER_OFF_HARD mode when it's doing a power
cycle. This mode differs from the normal MMC_POWER_OFF mode in that
the mmc core will promise to power the slot back on before it expects
the host to detect card insertion or removal.
Also if we let alone the vqmmc turned on when vmmc turned off, the
card could have half way powered and this can damage the card. So
this patch adds a check so that, if the board used the built-in
card detection mechanism i.e through CDETECT, it will not turned
down vqmmc and vmmc both.
Signed-off-by: Yuvaraj Kumar C D yuvaraj...@samsung.com
Signed-off-by: Doug Anderson diand...@chromium.org
---
changes from v1:
1.added a new MMC_POWER_OFF_HARD mode as per Doug Anderson's suggestion.
2.added dw_mci_exynos_post_init() to perform the host specific post
initialisation.
3.added a new flag MMC_CAP2_CD_NEEDS_POWER for host-caps2.
drivers/mmc/core/core.c | 16 ++--
drivers/mmc/core/debugfs.c |3 +++
drivers/mmc/host/dw_mmc-exynos.c | 12
drivers/mmc/host/dw_mmc.c| 25 +
drivers/mmc/host/dw_mmc.h|2 ++
include/linux/mmc/host.h |2 ++
6 files changed, 58 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 68f5f4b..79ced36 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1564,9 +1564,9 @@ void mmc_power_up(struct mmc_host *host, u32 ocr)
mmc_host_clk_release(host);
}
-void mmc_power_off(struct mmc_host *host)
+void _mmc_power_off(struct mmc_host *host, unsigned char power_mode)
{
- if (host-ios.power_mode == MMC_POWER_OFF)
+ if (host-ios.power_mode == power_mode)
return;
mmc_host_clk_hold(host);
@@ -1579,6 +1579,7 @@ void mmc_power_off(struct mmc_host *host)
host-ios.chip_select = MMC_CS_DONTCARE;
}
host-ios.power_mode = MMC_POWER_OFF;
+ host-ios.power_mode = power_mode;
host-ios.bus_width = MMC_BUS_WIDTH_1;
host-ios.timing = MMC_TIMING_LEGACY;
mmc_set_ios(host);
@@ -1593,9 +1594,20 @@ void mmc_power_off(struct mmc_host *host)
mmc_host_clk_release(host);
}
+void mmc_power_off(struct mmc_host *host)
+{
+ _mmc_power_off(host, MMC_POWER_OFF);
+}
+
void mmc_power_cycle(struct mmc_host *host, u32 ocr)
{
mmc_power_off(host);
+ /* If host normally ignores MMC_POWER_OFF, tell it to pay attention */
+ if (host-caps2 MMC_CAP2_CD_NEEDS_POWER)
+ _mmc_power_off(host, MMC_POWER_OFF_HARD);
+ else
+ _mmc_power_off(host, MMC_POWER_OFF);
+
/* Wait at least 1 ms according to SD spec */
mmc_delay(1);
mmc_power_up(host, ocr);
diff --git a/drivers/mmc/core/debugfs.c b/drivers/mmc/core/debugfs.c
index 91eb162..3d9c5a3 100644
--- a/drivers/mmc/core/debugfs.c
+++ b/drivers/mmc/core/debugfs.c
@@ -108,6 +108,9 @@ static int mmc_ios_show(struct seq_file *s, void *data)
case MMC_POWER_ON:
str = on;
break;
+ case MMC_POWER_OFF_HARD:
+ str = hard off;
+ break;
default:
str = invalid;
break;
diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c
index 0fbc53a..4e26049 100644
--- a/drivers/mmc/host/dw_mmc-exynos.c
+++ b/drivers/mmc/host/dw_mmc-exynos.c
@@ -17,6 +17,7 @@
#include linux/mmc/mmc.h
#include linux/of.h
#include linux/of_gpio.h
+#include linux/mmc/slot-gpio.h
#include linux/slab.h
#include dw_mmc.h
@@ -217,6 +218,16 @@ static void dw_mci_exynos_set_ios(struct dw_mci *host,
struct mmc_ios *ios)
}
}
+static void dw_mci_exynos_post_init(struct dw_mci_slot *slot)
+{
+ struct dw_mci_board *brd = slot-host-pdata;
+ struct mmc_host *mmc = slot-mmc;
+
+ if (!(brd-quirks DW_MCI_QUIRK_BROKEN_CARD_DETECTION)
+ IS_ERR_VALUE(mmc_gpio_get_cd(mmc)))
+ mmc-caps2 |= MMC_CAP2_CD_NEEDS_POWER;
+}
+
static int dw_mci_exynos_parse_dt(struct dw_mci *host)
{
struct dw_mci_exynos_priv_data *priv;
@@ -399,6 +410,7 @@ static const struct dw_mci_drv_data exynos_drv_data = {
.prepare_command= dw_mci_exynos_prepare_command,
.set_ios= dw_mci_exynos_set_ios,
.parse_dt
[PATCH] phy: exynos5-usbdrd: Add MODULE_DEVICE_TABLE entry
Add a MODULE_DEVICE_TABLE call for OF match tables. This allows the
module to be autoloaded based on devicetree information.
Signed-off-by: Sjoerd Simons sjoerd.sim...@collabora.co.uk
---
drivers/phy/phy-exynos5-usbdrd.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/phy/phy-exynos5-usbdrd.c b/drivers/phy/phy-exynos5-usbdrd.c
index b05302b..e9a0f54 100644
--- a/drivers/phy/phy-exynos5-usbdrd.c
+++ b/drivers/phy/phy-exynos5-usbdrd.c
@@ -542,6 +542,7 @@ static const struct of_device_id
exynos5_usbdrd_phy_of_match[] = {
},
{ },
};
+MODULE_DEVICE_TABLE (of, exynos5_usbdrd_phy_of_match);
static int exynos5_usbdrd_phy_probe(struct platform_device *pdev)
{
--
2.1.0
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Re: [PATCH v9 1/2] regulator: Add driver for max77802 PMIC PMIC regulators
On Fri, Aug 22, 2014 at 02:15:46PM +0200, Javier Martinez Canillas wrote: Mark, any opinions on how this should be solved will be highly appreciated. If someone could tell me what this is that'd help... signature.asc Description: Digital signature
Re: [PATCH V2 3/3] mmc: dw_mmc: Dont cut off vqmmc and vmmc
On 22 August 2014 15:47, Yuvaraj Kumar C D yuvaraj...@gmail.com wrote:
Exynos 5250 and 5420 based boards uses built-in CD# line for card
detection.But unfortunately CD# line is on the same voltage rails
as of I/O voltage rails. When we cut off vqmmc,the consequent card
detection will break in these boards.
I am not sure I follow here.
Is the card detect mechanism handled internally by the dw_mmc controller?
I thought HW engineers long time ago realized that this should be done
separately on a GPIO line to be able to save power while waiting for a
card to be inserted. But that's not case then?
These hosts (obviously) need to keep vqmmc (and thus vmmc) on all the
time, even when the mmc core tells them to power off. However, one
problem is that these cards won't properly handle mmc_power_cycle().
That's needed to handle error cases when trying to switch voltages
(see 0797e5f mmc:core: Fixup signal voltage switch).
This patch adds a new MMC_POWER_OFF_HARD mode when it's doing a power
cycle. This mode differs from the normal MMC_POWER_OFF mode in that
the mmc core will promise to power the slot back on before it expects
the host to detect card insertion or removal.
Also if we let alone the vqmmc turned on when vmmc turned off, the
card could have half way powered and this can damage the card. So
this patch adds a check so that, if the board used the built-in
card detection mechanism i.e through CDETECT, it will not turned
down vqmmc and vmmc both.
Why does vmmc needs to be enabled when there are no card inserted?
That can't be right?
Kind regards
Uffe
Signed-off-by: Yuvaraj Kumar C D yuvaraj...@samsung.com
Signed-off-by: Doug Anderson diand...@chromium.org
---
changes from v1:
1.added a new MMC_POWER_OFF_HARD mode as per Doug Anderson's
suggestion.
2.added dw_mci_exynos_post_init() to perform the host specific post
initialisation.
3.added a new flag MMC_CAP2_CD_NEEDS_POWER for host-caps2.
drivers/mmc/core/core.c | 16 ++--
drivers/mmc/core/debugfs.c |3 +++
drivers/mmc/host/dw_mmc-exynos.c | 12
drivers/mmc/host/dw_mmc.c| 25 +
drivers/mmc/host/dw_mmc.h|2 ++
include/linux/mmc/host.h |2 ++
6 files changed, 58 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 68f5f4b..79ced36 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1564,9 +1564,9 @@ void mmc_power_up(struct mmc_host *host, u32 ocr)
mmc_host_clk_release(host);
}
-void mmc_power_off(struct mmc_host *host)
+void _mmc_power_off(struct mmc_host *host, unsigned char power_mode)
{
- if (host-ios.power_mode == MMC_POWER_OFF)
+ if (host-ios.power_mode == power_mode)
return;
mmc_host_clk_hold(host);
@@ -1579,6 +1579,7 @@ void mmc_power_off(struct mmc_host *host)
host-ios.chip_select = MMC_CS_DONTCARE;
}
host-ios.power_mode = MMC_POWER_OFF;
+ host-ios.power_mode = power_mode;
host-ios.bus_width = MMC_BUS_WIDTH_1;
host-ios.timing = MMC_TIMING_LEGACY;
mmc_set_ios(host);
@@ -1593,9 +1594,20 @@ void mmc_power_off(struct mmc_host *host)
mmc_host_clk_release(host);
}
+void mmc_power_off(struct mmc_host *host)
+{
+ _mmc_power_off(host, MMC_POWER_OFF);
+}
+
void mmc_power_cycle(struct mmc_host *host, u32 ocr)
{
mmc_power_off(host);
+ /* If host normally ignores MMC_POWER_OFF, tell it to pay attention */
+ if (host-caps2 MMC_CAP2_CD_NEEDS_POWER)
+ _mmc_power_off(host, MMC_POWER_OFF_HARD);
+ else
+ _mmc_power_off(host, MMC_POWER_OFF);
+
/* Wait at least 1 ms according to SD spec */
mmc_delay(1);
mmc_power_up(host, ocr);
diff --git a/drivers/mmc/core/debugfs.c b/drivers/mmc/core/debugfs.c
index 91eb162..3d9c5a3 100644
--- a/drivers/mmc/core/debugfs.c
+++ b/drivers/mmc/core/debugfs.c
@@ -108,6 +108,9 @@ static int mmc_ios_show(struct seq_file *s, void *data)
case MMC_POWER_ON:
str = on;
break;
+ case MMC_POWER_OFF_HARD:
+ str = hard off;
+ break;
default:
str = invalid;
break;
diff --git a/drivers/mmc/host/dw_mmc-exynos.c
b/drivers/mmc/host/dw_mmc-exynos.c
index 0fbc53a..4e26049 100644
--- a/drivers/mmc/host/dw_mmc-exynos.c
+++ b/drivers/mmc/host/dw_mmc-exynos.c
@@ -17,6 +17,7 @@
#include linux/mmc/mmc.h
#include linux/of.h
#include linux/of_gpio.h
+#include linux/mmc/slot-gpio.h
#include linux/slab.h
#include dw_mmc.h
@@ -217,6 +218,16 @@ static void dw_mci_exynos_set_ios(struct dw_mci *host,
struct mmc_ios *ios)
}
}
+static void dw_mci_exynos_post_init(struct dw_mci_slot *slot)
+{
+ struct dw_mci_board
Re: [PATCH V2 2/3] mmc: dw_mmc: Support voltage changes
On 22 August 2014 15:47, Yuvaraj Kumar C D yuvaraj...@gmail.com wrote:
From: Doug Anderson diand...@chromium.org
For UHS cards we need the ability to switch voltages from 3.3V to
1.8V. Add support to the dw_mmc driver to handle this. Note that
dw_mmc needs a little bit of extra code since the interface needs a
special bit programmed to the CMD register while CMD11 is progressing.
This means adding a few extra states to the state machine to track.
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Yuvaraj Kumar C D yuvaraj...@samsung.com
---
changes since v1:
1. Added error message and return error in case of
regulator_set_voltage() fail.
2. changed dw_mci_cmd_interrupt(host,pending | SDMMC_INT_CMD_DONE)
to dw_mci_cmd_interrupt(host,pending).
3. Removed unnecessary comments.
drivers/mmc/host/dw_mmc.c | 134
+---
drivers/mmc/host/dw_mmc.h |5 +-
include/linux/mmc/dw_mmc.h |2 +
3 files changed, 131 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index aadb0d6..f20b4b8 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -29,6 +29,7 @@
#include linux/irq.h
#include linux/mmc/host.h
#include linux/mmc/mmc.h
+#include linux/mmc/sd.h
#include linux/mmc/sdio.h
#include linux/mmc/dw_mmc.h
#include linux/bitops.h
@@ -234,10 +235,13 @@ err:
}
#endif /* defined(CONFIG_DEBUG_FS) */
+static void mci_send_cmd(struct dw_mci_slot *slot, u32 cmd, u32 arg);
+
static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command
*cmd)
{
struct mmc_data *data;
struct dw_mci_slot *slot = mmc_priv(mmc);
+ struct dw_mci *host = slot-host;
const struct dw_mci_drv_data *drv_data = slot-host-drv_data;
u32 cmdr;
cmd-error = -EINPROGRESS;
@@ -253,6 +257,31 @@ static u32 dw_mci_prepare_command(struct mmc_host *mmc,
struct mmc_command *cmd)
else if (cmd-opcode != MMC_SEND_STATUS cmd-data)
cmdr |= SDMMC_CMD_PRV_DAT_WAIT;
+ if (cmd-opcode == SD_SWITCH_VOLTAGE) {
+ u32 clk_en_a;
+
+ /* Special bit makes CMD11 not die */
+ cmdr |= SDMMC_CMD_VOLT_SWITCH;
+
+ /* Change state to continue to handle CMD11 weirdness */
+ WARN_ON(slot-host-state != STATE_SENDING_CMD);
+ slot-host-state = STATE_SENDING_CMD11;
+
+ /*
+* We need to disable clock stop while doing voltage switch
+* according to Voltage Switch Normal Scenario.
+* It's assumed that by the next time the CLKENA is updated
+* (when we set the clock next) that the voltage change will
+* be over, so we don't bother setting any bits to synchronize
+* with dw_mci_setup_bus().
+*/
I don't know the details about the dw_mmc controller, but normally a
host driver is expected to gate the clock from it's -set_ios
callback, when the clk frequency are set to 0.
Could you elaborate on why dw_mmc can't do that, but need to handle
this from here?
Kind regards
Uffe
+ clk_en_a = mci_readl(host, CLKENA);
+ clk_en_a = ~(SDMMC_CLKEN_LOW_PWR slot-id);
+ mci_writel(host, CLKENA, clk_en_a);
+ mci_send_cmd(slot, SDMMC_CMD_UPD_CLK |
+SDMMC_CMD_PRV_DAT_WAIT, 0);
+ }
+
if (cmd-flags MMC_RSP_PRESENT) {
/* We expect a response, so set this bit */
cmdr |= SDMMC_CMD_RESP_EXP;
@@ -775,11 +804,15 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot,
bool force_clkinit)
unsigned int clock = slot-clock;
u32 div;
u32 clk_en_a;
+ u32 sdmmc_cmd_bits = SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT;
+
+ /* We must continue to set bit 28 in CMD until the change is complete
*/
+ if (host-state == STATE_WAITING_CMD11_DONE)
+ sdmmc_cmd_bits |= SDMMC_CMD_VOLT_SWITCH;
if (!clock) {
mci_writel(host, CLKENA, 0);
- mci_send_cmd(slot,
-SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0);
+ mci_send_cmd(slot, sdmmc_cmd_bits, 0);
} else if (clock != host-current_speed || force_clkinit) {
div = host-bus_hz / clock;
if (host-bus_hz % clock host-bus_hz clock)
@@ -803,15 +836,13 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot,
bool force_clkinit)
mci_writel(host, CLKSRC, 0);
/* inform CIU */
- mci_send_cmd(slot,
-SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0);
+ mci_send_cmd(slot, sdmmc_cmd_bits, 0);
/* set clock to desired speed */
Re: [PATCH v7] ARM: dts: Prepare node labels for exynos5250
Kukjin,
On Fri, Aug 22, 2014 at 3:49 AM, Kukjin Kim kgene@samsung.com wrote:
Andreas Färber wrote:
Allows them to be extended by reference.
Reviewed-by: Doug Anderson diand...@chromium.org
Signed-off-by: Andreas Färber afaer...@suse.de
---
v6 - v7:
* Dropped uart* labels (Tomasz Figa)
v6: Split off from Snow/SMDK cleanups (Doug Anderson)
arch/arm/boot/dts/exynos5250.dtsi | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 492e1eff37bd..42eafd19cfb2 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -218,7 +218,7 @@
clock-names = fimg2d;
};
- codec@1100 {
+ mfc: codec@1100 {
compatible = samsung,mfc-v6;
reg = 0x1100 0x1;
interrupts = 0 96 0;
@@ -227,7 +227,7 @@
clock-names = mfc;
};
- rtc@101E {
+ rtc: rtc@101E {
clocks = clock CLK_RTC;
clock-names = rtc;
status = disabled;
@@ -261,7 +261,7 @@
clock-names = uart, clk_uart_baud0;
};
- sata@122F {
+ sata: sata@122F {
compatible = snps,dwc-ahci;
samsung,sata-freq = 66;
reg = 0x122F 0x1ff;
@@ -573,7 +573,7 @@
#phy-cells = 1;
};
- usb@1211 {
+ ehci: usb@1211 {
I'm not sure which one is recommended between above and ehci: ehci@1211
{
My understanding is that more generic names should be used for node
names. AKA: usb and not ehci. mmc and not dwmmc.
In another thread I was pointed at ePAPR
http://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.0.pdf:
The name of a node should be somewhat generic, reflecting the function
of the device and not its precise programming model.
- hdmi {
+ hdmi: hdmi {
Should be
+ hdmi: hdmi@1453 { ?
Seems like that should be a followon patch.
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[PATCH v2 1/5] ARM: dts: remove old USB2 PHY node hook for Arndale
drivers/usb/phy/phy-samsung-usb2 driver got replaced by
drivers/phy/phy-samsung-usb2 one. Remove the leftover hook
from Arndale dts file.
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Reviewed-by: Vivek Gautam gautam.vi...@samsung.com
Reviewed-by: Jingoo Han jg1@samsung.com
Acked-by: Kishon Vijay Abraham I kis...@ti.com
Cc: Mark Brown broo...@linaro.org
Cc: Kamil Debski k.deb...@samsung.com
---
arch/arm/boot/dts/exynos5250-arndale.dts | 4
1 file changed, 4 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
b/arch/arm/boot/dts/exynos5250-arndale.dts
index d0de1f5..dad8f9b 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -570,8 +570,4 @@
connect-gpios = gpd1 7 1;
};
};
-
- usb@1211 {
- usb-phy = usb2_phy;
- };
};
--
1.8.2.3
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[PATCH v2 5/5] usb: phy: samsung: remove old common USB PHY code
drivers/usb/phy/phy-samsung-usb[2,3] drivers got replaced by
drivers/phy/phy-samsung-usb[2,3] ones and the old common Samsung
USB PHY code is no longer used.
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Reviewed-by: Vivek Gautam gautam.vi...@samsung.com
Reviewed-by: Jingoo Han jg1@samsung.com
Acked-by: Kishon Vijay Abraham I kis...@ti.com
Cc: Kamil Debski k.deb...@samsung.com
---
drivers/usb/phy/Kconfig | 7 -
drivers/usb/phy/Makefile | 1 -
drivers/usb/phy/phy-samsung-usb.c| 241 --
drivers/usb/phy/phy-samsung-usb.h| 349 ---
include/linux/platform_data/samsung-usbphy.h | 27 ---
5 files changed, 625 deletions(-)
delete mode 100644 drivers/usb/phy/phy-samsung-usb.c
delete mode 100644 drivers/usb/phy/phy-samsung-usb.h
delete mode 100644 include/linux/platform_data/samsung-usbphy.h
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 0cd1f44..7012a82 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -71,13 +71,6 @@ config AM335X_PHY_USB
This driver provides PHY support for that phy which part for the
AM335x SoC.
-config SAMSUNG_USBPHY
- tristate
- help
- Enable this to support Samsung USB phy helper driver for Samsung SoCs.
- This driver provides common interface to interact, for Samsung USB
2.0 PHY
- driver and later for Samsung USB 3.0 PHY driver.
-
config TWL6030_USB
tristate TWL6030 USB Transceiver Driver
depends on TWL4030_CORE OMAP_USB2 USB_MUSB_OMAP2PLUS
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index 75f2bba..1e38a6f 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -14,7 +14,6 @@ obj-$(CONFIG_TAHVO_USB) += phy-tahvo.o
obj-$(CONFIG_AM335X_CONTROL_USB) += phy-am335x-control.o
obj-$(CONFIG_AM335X_PHY_USB) += phy-am335x.o
obj-$(CONFIG_OMAP_OTG) += phy-omap-otg.o
-obj-$(CONFIG_SAMSUNG_USBPHY) += phy-samsung-usb.o
obj-$(CONFIG_TWL6030_USB) += phy-twl6030-usb.o
obj-$(CONFIG_USB_EHCI_TEGRA) += phy-tegra-usb.o
obj-$(CONFIG_USB_GPIO_VBUS)+= phy-gpio-vbus-usb.o
diff --git a/drivers/usb/phy/phy-samsung-usb.c
b/drivers/usb/phy/phy-samsung-usb.c
deleted file mode 100644
index ac025ca..000
--- a/drivers/usb/phy/phy-samsung-usb.c
+++ /dev/null
@@ -1,241 +0,0 @@
-/* linux/drivers/usb/phy/phy-samsung-usb.c
- *
- * Copyright (c) 2012 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * Author: Praveen Paneri p.pan...@samsung.com
- *
- * Samsung USB-PHY helper driver with common function calls;
- * interacts with Samsung USB 2.0 PHY controller driver and later
- * with Samsung USB 3.0 PHY driver.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include linux/module.h
-#include linux/platform_device.h
-#include linux/clk.h
-#include linux/device.h
-#include linux/err.h
-#include linux/io.h
-#include linux/of.h
-#include linux/of_address.h
-#include linux/usb/samsung_usb_phy.h
-
-#include phy-samsung-usb.h
-
-int samsung_usbphy_parse_dt(struct samsung_usbphy *sphy)
-{
- struct device_node *usbphy_sys;
-
- /* Getting node for system controller interface for usb-phy */
- usbphy_sys = of_get_child_by_name(sphy-dev-of_node, usbphy-sys);
- if (!usbphy_sys) {
- dev_err(sphy-dev, No sys-controller interface for usb-phy\n);
- return -ENODEV;
- }
-
- sphy-pmuregs = of_iomap(usbphy_sys, 0);
-
- if (sphy-pmuregs == NULL) {
- dev_err(sphy-dev, Can't get usb-phy pmu control register\n);
- goto err0;
- }
-
- sphy-sysreg = of_iomap(usbphy_sys, 1);
-
- /*
-* Not returning error code here, since this situation is not fatal.
-* Few SoCs may not have this switch available
-*/
- if (sphy-sysreg == NULL)
- dev_warn(sphy-dev, Can't get usb-phy sysreg cfg register\n);
-
- of_node_put(usbphy_sys);
-
- return 0;
-
-err0:
- of_node_put(usbphy_sys);
- return -ENXIO;
-}
-EXPORT_SYMBOL_GPL(samsung_usbphy_parse_dt);
-
-/*
- * Set isolation here for phy.
- * Here 'on = true' would mean USB PHY block is isolated, hence
- * de-activated and vice-versa.
- */
-void samsung_usbphy_set_isolation_4210(struct samsung_usbphy *sphy, bool on)
-{
- void __iomem *reg = NULL;
- u32 reg_val;
-
[PATCH v2 3/5] usb: phy: samsung: remove old USB 2.0 PHY driver
drivers/usb/phy/phy-samsung-usb2 driver got replaced by
drivers/phy/phy-samsung-usb2 one and is no longer used.
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Reviewed-by: Vivek Gautam gautam.vi...@samsung.com
Reviewed-by: Jingoo Han jg1@samsung.com
Acked-by: Kishon Vijay Abraham I kis...@ti.com
Cc: Kamil Debski k.deb...@samsung.com
---
drivers/usb/phy/Kconfig| 8 -
drivers/usb/phy/Makefile | 1 -
drivers/usb/phy/phy-samsung-usb2.c | 541 -
3 files changed, 550 deletions(-)
delete mode 100644 drivers/usb/phy/phy-samsung-usb2.c
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index e253fa0..452e252 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -78,14 +78,6 @@ config SAMSUNG_USBPHY
This driver provides common interface to interact, for Samsung USB
2.0 PHY
driver and later for Samsung USB 3.0 PHY driver.
-config SAMSUNG_USB2PHY
- tristate Samsung USB 2.0 PHY controller Driver
- select SAMSUNG_USBPHY
- select USB_PHY
- help
- Enable this to support Samsung USB 2.0 (High Speed) PHY controller
- driver for Samsung SoCs.
-
config SAMSUNG_USB3PHY
tristate Samsung USB 3.0 PHY controller Driver
select SAMSUNG_USBPHY
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index 24a9133..c651005 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -15,7 +15,6 @@ obj-$(CONFIG_AM335X_CONTROL_USB) += phy-am335x-control.o
obj-$(CONFIG_AM335X_PHY_USB) += phy-am335x.o
obj-$(CONFIG_OMAP_OTG) += phy-omap-otg.o
obj-$(CONFIG_SAMSUNG_USBPHY) += phy-samsung-usb.o
-obj-$(CONFIG_SAMSUNG_USB2PHY) += phy-samsung-usb2.o
obj-$(CONFIG_SAMSUNG_USB3PHY) += phy-samsung-usb3.o
obj-$(CONFIG_TWL6030_USB) += phy-twl6030-usb.o
obj-$(CONFIG_USB_EHCI_TEGRA) += phy-tegra-usb.o
diff --git a/drivers/usb/phy/phy-samsung-usb2.c
b/drivers/usb/phy/phy-samsung-usb2.c
deleted file mode 100644
index b3ba866..000
--- a/drivers/usb/phy/phy-samsung-usb2.c
+++ /dev/null
@@ -1,541 +0,0 @@
-/* linux/drivers/usb/phy/phy-samsung-usb2.c
- *
- * Copyright (c) 2012 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * Author: Praveen Paneri p.pan...@samsung.com
- *
- * Samsung USB2.0 PHY transceiver; talks to S3C HS OTG controller, EHCI-S5P and
- * OHCI-EXYNOS controllers.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include linux/module.h
-#include linux/platform_device.h
-#include linux/clk.h
-#include linux/delay.h
-#include linux/device.h
-#include linux/err.h
-#include linux/io.h
-#include linux/of.h
-#include linux/usb/otg.h
-#include linux/usb/samsung_usb_phy.h
-#include linux/platform_data/samsung-usbphy.h
-
-#include phy-samsung-usb.h
-
-static int samsung_usbphy_set_host(struct usb_otg *otg, struct usb_bus *host)
-{
- if (!otg)
- return -ENODEV;
-
- if (!otg-host)
- otg-host = host;
-
- return 0;
-}
-
-static bool exynos5_phyhost_is_on(void __iomem *regs)
-{
- u32 reg;
-
- reg = readl(regs + EXYNOS5_PHY_HOST_CTRL0);
-
- return !(reg HOST_CTRL0_SIDDQ);
-}
-
-static void samsung_exynos5_usb2phy_enable(struct samsung_usbphy *sphy)
-{
- void __iomem *regs = sphy-regs;
- u32 phyclk = sphy-ref_clk_freq;
- u32 phyhost;
- u32 phyotg;
- u32 phyhsic;
- u32 ehcictrl;
- u32 ohcictrl;
-
- /*
-* phy_usage helps in keeping usage count for phy
-* so that the first consumer enabling the phy is also
-* the last consumer to disable it.
-*/
-
- atomic_inc(sphy-phy_usage);
-
- if (exynos5_phyhost_is_on(regs)) {
- dev_info(sphy-dev, Already power on PHY\n);
- return;
- }
-
- /* Host configuration */
- phyhost = readl(regs + EXYNOS5_PHY_HOST_CTRL0);
-
- /* phy reference clock configuration */
- phyhost = ~HOST_CTRL0_FSEL_MASK;
- phyhost |= HOST_CTRL0_FSEL(phyclk);
-
- /* host phy reset */
- phyhost = ~(HOST_CTRL0_PHYSWRST |
- HOST_CTRL0_PHYSWRSTALL |
- HOST_CTRL0_SIDDQ |
- /* Enable normal mode of operation */
- HOST_CTRL0_FORCESUSPEND |
- HOST_CTRL0_FORCESLEEP);
-
- /* Link reset */
- phyhost |= (HOST_CTRL0_LINKSWRST |
-
[PATCH v2 2/5] ARM: dts: remove old USB2 PHY node for Exynos5250
drivers/usb/phy/phy-samsung-usb2 driver got replaced by
drivers/phy/phy-samsung-usb2 one. Remove the leftover
USB2 PHY node (EHCI/OHCI USB nodes are using the new one
already) from Exynos5250 dtsi file.
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Reviewed-by: Vivek Gautam gautam.vi...@samsung.com
Reviewed-by: Jingoo Han jg1@samsung.com
Acked-by: Kishon Vijay Abraham I kis...@ti.com
Cc: Mark Brown broo...@linaro.org
Cc: Kamil Debski k.deb...@samsung.com
---
arch/arm/boot/dts/exynos5250.dtsi | 15 ---
1 file changed, 15 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 492e1ef..f21b9aa 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -603,21 +603,6 @@
};
};
- usb2_phy: usbphy@1213 {
- compatible = samsung,exynos5250-usb2phy;
- reg = 0x1213 0x100;
- clocks = clock CLK_FIN_PLL, clock CLK_USB2;
- clock-names = ext_xtal, usbhost;
- #address-cells = 1;
- #size-cells = 1;
- ranges;
-
- usbphy-sys {
- reg = 0x10040704 0x8,
- 0x10050230 0x4;
- };
- };
-
usb2_phy_gen: phy@1213 {
compatible = samsung,exynos5250-usb2-phy;
reg = 0x1213 0x100;
--
1.8.2.3
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[PATCH v2 4/5] usb: phy: samsung: remove old USB 3.0 PHY driver
drivers/usb/phy/phy-samsung-usb3 driver got replaced by
drivers/phy/phy-samsung-usb3 one and is no longer used.
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Reviewed-by: Vivek Gautam gautam.vi...@samsung.com
Reviewed-by: Jingoo Han jg1@samsung.com
Acked-by: Kishon Vijay Abraham I kis...@ti.com
Cc: Kamil Debski k.deb...@samsung.com
---
drivers/usb/phy/Kconfig| 8 -
drivers/usb/phy/Makefile | 1 -
drivers/usb/phy/phy-samsung-usb3.c | 350 -
3 files changed, 359 deletions(-)
delete mode 100644 drivers/usb/phy/phy-samsung-usb3.c
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 452e252..0cd1f44 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -78,14 +78,6 @@ config SAMSUNG_USBPHY
This driver provides common interface to interact, for Samsung USB
2.0 PHY
driver and later for Samsung USB 3.0 PHY driver.
-config SAMSUNG_USB3PHY
- tristate Samsung USB 3.0 PHY controller Driver
- select SAMSUNG_USBPHY
- select USB_PHY
- help
- Enable this to support Samsung USB 3.0 (Super Speed) phy controller
- for samsung SoCs.
-
config TWL6030_USB
tristate TWL6030 USB Transceiver Driver
depends on TWL4030_CORE OMAP_USB2 USB_MUSB_OMAP2PLUS
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index c651005..75f2bba 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -15,7 +15,6 @@ obj-$(CONFIG_AM335X_CONTROL_USB) += phy-am335x-control.o
obj-$(CONFIG_AM335X_PHY_USB) += phy-am335x.o
obj-$(CONFIG_OMAP_OTG) += phy-omap-otg.o
obj-$(CONFIG_SAMSUNG_USBPHY) += phy-samsung-usb.o
-obj-$(CONFIG_SAMSUNG_USB3PHY) += phy-samsung-usb3.o
obj-$(CONFIG_TWL6030_USB) += phy-twl6030-usb.o
obj-$(CONFIG_USB_EHCI_TEGRA) += phy-tegra-usb.o
obj-$(CONFIG_USB_GPIO_VBUS)+= phy-gpio-vbus-usb.o
diff --git a/drivers/usb/phy/phy-samsung-usb3.c
b/drivers/usb/phy/phy-samsung-usb3.c
deleted file mode 100644
index cc08192..000
--- a/drivers/usb/phy/phy-samsung-usb3.c
+++ /dev/null
@@ -1,350 +0,0 @@
-/* linux/drivers/usb/phy/phy-samsung-usb3.c
- *
- * Copyright (c) 2013 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * Author: Vivek Gautam gautam.vi...@samsung.com
- *
- * Samsung USB 3.0 PHY transceiver; talks to DWC3 controller.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include linux/module.h
-#include linux/platform_device.h
-#include linux/clk.h
-#include linux/delay.h
-#include linux/err.h
-#include linux/io.h
-#include linux/of.h
-#include linux/usb/samsung_usb_phy.h
-#include linux/platform_data/samsung-usbphy.h
-
-#include phy-samsung-usb.h
-
-/*
- * Sets the phy clk as EXTREFCLK (XXTI) which is internal clock from clock
core.
- */
-static u32 samsung_usb3phy_set_refclk(struct samsung_usbphy *sphy)
-{
- u32 reg;
- u32 refclk;
-
- refclk = sphy-ref_clk_freq;
-
- reg = PHYCLKRST_REFCLKSEL_EXT_REFCLK |
- PHYCLKRST_FSEL(refclk);
-
- switch (refclk) {
- case FSEL_CLKSEL_50M:
- reg |= (PHYCLKRST_MPLL_MULTIPLIER_50M_REF |
- PHYCLKRST_SSC_REFCLKSEL(0x00));
- break;
- case FSEL_CLKSEL_20M:
- reg |= (PHYCLKRST_MPLL_MULTIPLIER_20MHZ_REF |
- PHYCLKRST_SSC_REFCLKSEL(0x00));
- break;
- case FSEL_CLKSEL_19200K:
- reg |= (PHYCLKRST_MPLL_MULTIPLIER_19200KHZ_REF |
- PHYCLKRST_SSC_REFCLKSEL(0x88));
- break;
- case FSEL_CLKSEL_24M:
- default:
- reg |= (PHYCLKRST_MPLL_MULTIPLIER_24MHZ_REF |
- PHYCLKRST_SSC_REFCLKSEL(0x88));
- break;
- }
-
- return reg;
-}
-
-static void samsung_exynos5_usb3phy_enable(struct samsung_usbphy *sphy)
-{
- void __iomem *regs = sphy-regs;
- u32 phyparam0;
- u32 phyparam1;
- u32 linksystem;
- u32 phybatchg;
- u32 phytest;
- u32 phyclkrst;
-
- /* Reset USB 3.0 PHY */
- writel(0x0, regs + EXYNOS5_DRD_PHYREG0);
-
- phyparam0 = readl(regs + EXYNOS5_DRD_PHYPARAM0);
- /* Select PHY CLK source */
- phyparam0 = ~PHYPARAM0_REF_USE_PAD;
- /* Set Loss-of-Signal Detector sensitivity */
- phyparam0 = ~PHYPARAM0_REF_LOSLEVEL_MASK;
- phyparam0 |= PHYPARAM0_REF_LOSLEVEL;
-
[PATCH v2 0/5] usb: phy: samsung: remove old USB PHY code
Hi, This patch series removes the old Samsung USB PHY drivers that got replaced by the new ones using the generic PHY layer. Depends on: - v3.17-rc1 branch of Linus' kernel Changes since v1 (https://lkml.org/lkml/2014/8/14/241): - rebased on v3.17-rc1 kernel - added Acked-by-s from Kishon Vijay Abraham I - added Reviewed-by-s from Vivek Gautam and Jingoo Han Best regards, -- Bartlomiej Zolnierkiewicz Samsung RD Institute Poland Samsung Electronics Bartlomiej Zolnierkiewicz (5): ARM: dts: remove old USB2 PHY node hook for Arndale ARM: dts: remove old USB2 PHY node for Exynos5250 usb: phy: samsung: remove old USB 2.0 PHY driver usb: phy: samsung: remove old USB 3.0 PHY driver usb: phy: samsung: remove old common USB PHY code arch/arm/boot/dts/exynos5250-arndale.dts | 4 - arch/arm/boot/dts/exynos5250.dtsi| 15 - drivers/usb/phy/Kconfig | 23 -- drivers/usb/phy/Makefile | 3 - drivers/usb/phy/phy-samsung-usb.c| 241 drivers/usb/phy/phy-samsung-usb.h| 349 - drivers/usb/phy/phy-samsung-usb2.c | 541 --- drivers/usb/phy/phy-samsung-usb3.c | 350 - include/linux/platform_data/samsung-usbphy.h | 27 -- 9 files changed, 1553 deletions(-) delete mode 100644 drivers/usb/phy/phy-samsung-usb.c delete mode 100644 drivers/usb/phy/phy-samsung-usb.h delete mode 100644 drivers/usb/phy/phy-samsung-usb2.c delete mode 100644 drivers/usb/phy/phy-samsung-usb3.c delete mode 100644 include/linux/platform_data/samsung-usbphy.h -- 1.8.2.3 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/5] usb: phy: samsung: remove old USB PHY code
Hi, On Wednesday, August 20, 2014 01:12:44 PM Felipe Balbi wrote: Hi, On Thu, Aug 14, 2014 at 04:25:22PM +0200, Bartlomiej Zolnierkiewicz wrote: Hi, This patch series removes the old Samsung USB PHY drivers that got replaced by the new ones using the generic PHY layer. Depends on: - next-20140813 branch of linux-next kernel this thread seems to have died, what do I need to do with these patches? Please apply them (patches #3, #4 and #5). Patches #1 and #2 should be applied (or Acked-by) by Kukjin Kim. Are we deleting the phy drivers or not ? Yes, we are deleting them. It has been agreed on by Kishon and Vivek. Please rebase on v3.17-rc1 and resend with all Acks in place. Done: https://lkml.org/lkml/2014/8/22/446 Please note that if you want to apply it to current -next kernel (next-20140822) then you need to resolve conflict between patch #5/5 (usb: phy: samsung: remove old common USB PHY code) and commit bbc66e140bab (usb: phy: samsung: Fix wrong bit mask for PHYPARAM1_PCS_TXDEEMPH) by simply removing the new version of drivers/usb/phy/phy-samsung-usb.h file. Best regards, -- Bartlomiej Zolnierkiewicz Samsung RD Institute Poland Samsung Electronics -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 1/5] ARM: dts: remove old USB2 PHY node hook for Arndale
Am 22.08.2014 18:59, schrieb Bartlomiej Zolnierkiewicz:
drivers/usb/phy/phy-samsung-usb2 driver got replaced by
drivers/phy/phy-samsung-usb2 one. Remove the leftover hook
from Arndale dts file.
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Reviewed-by: Vivek Gautam gautam.vi...@samsung.com
Reviewed-by: Jingoo Han jg1@samsung.com
Acked-by: Kishon Vijay Abraham I kis...@ti.com
Cc: Mark Brown broo...@linaro.org
Cc: Kamil Debski k.deb...@samsung.com
---
arch/arm/boot/dts/exynos5250-arndale.dts | 4
1 file changed, 4 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
b/arch/arm/boot/dts/exynos5250-arndale.dts
index d0de1f5..dad8f9b 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -570,8 +570,4 @@
connect-gpios = gpd1 7 1;
};
};
-
- usb@1211 {
- usb-phy = usb2_phy;
- };
};
This will trivially conflict with my exynos5250 cleanups in the Spring
series: ehci {...} there.
https://patchwork.kernel.org/patch/4664751/
Regards,
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
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Re: [PATCH v9 1/2] regulator: Add driver for max77802 PMIC PMIC regulators
Hello Mark, On 08/22/2014 04:45 PM, Mark Brown wrote: On Fri, Aug 22, 2014 at 02:15:46PM +0200, Javier Martinez Canillas wrote: Mark, any opinions on how this should be solved will be highly appreciated. If someone could tell me what this is that'd help... Sorry for not being clear on that regard. By this I meant the problem reported by Yuvaraj. The regulators operating mode is read from the hardware registers on probe as you suggested but that means that if the regulator is disabled and the machine rebooted (warm reset) the opmode reported by the hardware is MAX77802_OPMODE_OFF. The problem is that one of these regulators is used as the vqmmc-supply (VCCQ/VDD_IO) so the mmc host controller driver disables it on MMC_POWER_OFF. Now AFAIK (Yuvaraj can correct me what I got wrong) this shouldn't be an issue since on card detection, the vqmmc supply should be enabled again but on Exynos the built-in card detect line is on the same power rail as vqmmc. That means that disabling the regulator prevents card insertions to be detected. This does not happen on the downstream Chrome OS kernel because the max77802 regulator driver has some ad-hoc DT bindings were you can define the operating mode to be set on probe. For this particular regulator is MAX77802_OPMODE_STANDBY. Yuvaraj solution was to set the operating mode to MAX77802_OPMODE_NORMAL on probe() which was what I did on a previous version of the driver but you explained to me that it was not safe to do that. That's why I'm asking for suggestions. Thanks a lot and best regards, Javier -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V2 3/3] mmc: dw_mmc: Dont cut off vqmmc and vmmc
On Fri, Aug 22, 2014 at 8:31 AM, Ulf Hansson ulf.hans...@linaro.org wrote:
On 22 August 2014 15:47, Yuvaraj Kumar C D yuvaraj...@gmail.com wrote:
Exynos 5250 and 5420 based boards uses built-in CD# line for card
detection.But unfortunately CD# line is on the same voltage rails
as of I/O voltage rails. When we cut off vqmmc,the consequent card
detection will break in these boards.
I am not sure I follow here.
Is the card detect mechanism handled internally by the dw_mmc controller?
Yes
I thought HW engineers long time ago realized that this should be done
separately on a GPIO line to be able to save power while waiting for a
card to be inserted. But that's not case then?
At least in my limited experience, this seems to be common among SoC
vendors who are using dw_mmc, as we've seen this elsewhere as well and
after seeing it here we know that we need to ignore the CD pin that's
routed to dw_mmc and use a separately powered GPIO on the board, but
still there are probably many SoCs/boards which are doing it this way.
These hosts (obviously) need to keep vqmmc (and thus vmmc) on all the
time, even when the mmc core tells them to power off. However, one
problem is that these cards won't properly handle mmc_power_cycle().
That's needed to handle error cases when trying to switch voltages
(see 0797e5f mmc:core: Fixup signal voltage switch).
This patch adds a new MMC_POWER_OFF_HARD mode when it's doing a power
cycle. This mode differs from the normal MMC_POWER_OFF mode in that
the mmc core will promise to power the slot back on before it expects
the host to detect card insertion or removal.
This patch is based off of one that Doug wrote (sent privately to
Yuvaraj) which just modifies the MMC core, and should be split into
two patches.
One that modifies the mmc core and one that implements this in dw_mmc.
Also if we let alone the vqmmc turned on when vmmc turned off, the
card could have half way powered and this can damage the card. So
this patch adds a check so that, if the board used the built-in
card detection mechanism i.e through CDETECT, it will not turned
down vqmmc and vmmc both.
Why does vmmc needs to be enabled when there are no card inserted?
That can't be right?
I think this is because we don't want to send power to a card over the
I/O pins but not the vcc pin, even for a little while. We also asked
some SD card manufacturers about whether it was okay to leave vqmmc on
and they recommended not doing this, because there's a risk of damage
to the card.
So, in this (broken) environment, we basically just keep both vmmc and
vqmmc on all the time unless mmc core is asking the driver to power
cycle the card through MMC_POWER_OFF and MMC_POWER_ON modes.
Does that help?
Kind regards
Uffe
Signed-off-by: Yuvaraj Kumar C D yuvaraj...@samsung.com
Signed-off-by: Doug Anderson diand...@chromium.org
---
changes from v1:
1.added a new MMC_POWER_OFF_HARD mode as per Doug Anderson's
suggestion.
2.added dw_mci_exynos_post_init() to perform the host specific post
initialisation.
3.added a new flag MMC_CAP2_CD_NEEDS_POWER for host-caps2.
drivers/mmc/core/core.c | 16 ++--
drivers/mmc/core/debugfs.c |3 +++
drivers/mmc/host/dw_mmc-exynos.c | 12
drivers/mmc/host/dw_mmc.c| 25 +
drivers/mmc/host/dw_mmc.h|2 ++
include/linux/mmc/host.h |2 ++
6 files changed, 58 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 68f5f4b..79ced36 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1564,9 +1564,9 @@ void mmc_power_up(struct mmc_host *host, u32 ocr)
mmc_host_clk_release(host);
}
-void mmc_power_off(struct mmc_host *host)
+void _mmc_power_off(struct mmc_host *host, unsigned char power_mode)
{
- if (host-ios.power_mode == MMC_POWER_OFF)
+ if (host-ios.power_mode == power_mode)
return;
mmc_host_clk_hold(host);
@@ -1579,6 +1579,7 @@ void mmc_power_off(struct mmc_host *host)
host-ios.chip_select = MMC_CS_DONTCARE;
}
host-ios.power_mode = MMC_POWER_OFF;
+ host-ios.power_mode = power_mode;
host-ios.bus_width = MMC_BUS_WIDTH_1;
host-ios.timing = MMC_TIMING_LEGACY;
mmc_set_ios(host);
@@ -1593,9 +1594,20 @@ void mmc_power_off(struct mmc_host *host)
mmc_host_clk_release(host);
}
+void mmc_power_off(struct mmc_host *host)
+{
+ _mmc_power_off(host, MMC_POWER_OFF);
+}
+
void mmc_power_cycle(struct mmc_host *host, u32 ocr)
{
mmc_power_off(host);
+ /* If host normally ignores MMC_POWER_OFF, tell it to pay attention
*/
+ if (host-caps2 MMC_CAP2_CD_NEEDS_POWER)
+ _mmc_power_off(host, MMC_POWER_OFF_HARD);
+ else
+ _mmc_power_off(host, MMC_POWER_OFF);
+
Re: [PATCH v9 1/2] regulator: Add driver for max77802 PMIC PMIC regulators
On Fri, Aug 22, 2014 at 07:53:19PM +0200, Javier Martinez Canillas wrote: On 08/22/2014 04:45 PM, Mark Brown wrote: On Fri, Aug 22, 2014 at 02:15:46PM +0200, Javier Martinez Canillas wrote: Mark, any opinions on how this should be solved will be highly appreciated. If someone could tell me what this is that'd help... Sorry for not being clear on that regard. By this I meant the problem reported by Yuvaraj. That mail was rather lengthy and seemed to be discussing several issues. The problem is that one of these regulators is used as the vqmmc-supply (VCCQ/VDD_IO) so the mmc host controller driver disables it on MMC_POWER_OFF. Now AFAIK (Yuvaraj can correct me what I got wrong) this shouldn't be an issue since on card detection, the vqmmc supply should be enabled again but on Exynos the built-in card detect line is on the same power rail as vqmmc. That means that disabling the regulator prevents card insertions to be detected. If the MMC host controller needs a supply enabling in order to do card detection and it's supposed to be doing card detection I'd expect it to be enabling that supply. Why is it not doing that? signature.asc Description: Digital signature
Re: [PATCH V2 2/3] mmc: dw_mmc: Support voltage changes
Ulf,
On Fri, Aug 22, 2014 at 8:35 AM, Ulf Hansson ulf.hans...@linaro.org wrote:
On 22 August 2014 15:47, Yuvaraj Kumar C D yuvaraj...@gmail.com wrote:
From: Doug Anderson diand...@chromium.org
For UHS cards we need the ability to switch voltages from 3.3V to
1.8V. Add support to the dw_mmc driver to handle this. Note that
dw_mmc needs a little bit of extra code since the interface needs a
special bit programmed to the CMD register while CMD11 is progressing.
This means adding a few extra states to the state machine to track.
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Yuvaraj Kumar C D yuvaraj...@samsung.com
---
changes since v1:
1. Added error message and return error in case of
regulator_set_voltage() fail.
2. changed dw_mci_cmd_interrupt(host,pending | SDMMC_INT_CMD_DONE)
to dw_mci_cmd_interrupt(host,pending).
3. Removed unnecessary comments.
drivers/mmc/host/dw_mmc.c | 134
+---
drivers/mmc/host/dw_mmc.h |5 +-
include/linux/mmc/dw_mmc.h |2 +
3 files changed, 131 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index aadb0d6..f20b4b8 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -29,6 +29,7 @@
#include linux/irq.h
#include linux/mmc/host.h
#include linux/mmc/mmc.h
+#include linux/mmc/sd.h
#include linux/mmc/sdio.h
#include linux/mmc/dw_mmc.h
#include linux/bitops.h
@@ -234,10 +235,13 @@ err:
}
#endif /* defined(CONFIG_DEBUG_FS) */
+static void mci_send_cmd(struct dw_mci_slot *slot, u32 cmd, u32 arg);
+
static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command
*cmd)
{
struct mmc_data *data;
struct dw_mci_slot *slot = mmc_priv(mmc);
+ struct dw_mci *host = slot-host;
const struct dw_mci_drv_data *drv_data = slot-host-drv_data;
u32 cmdr;
cmd-error = -EINPROGRESS;
@@ -253,6 +257,31 @@ static u32 dw_mci_prepare_command(struct mmc_host *mmc,
struct mmc_command *cmd)
else if (cmd-opcode != MMC_SEND_STATUS cmd-data)
cmdr |= SDMMC_CMD_PRV_DAT_WAIT;
+ if (cmd-opcode == SD_SWITCH_VOLTAGE) {
+ u32 clk_en_a;
+
+ /* Special bit makes CMD11 not die */
+ cmdr |= SDMMC_CMD_VOLT_SWITCH;
+
+ /* Change state to continue to handle CMD11 weirdness */
+ WARN_ON(slot-host-state != STATE_SENDING_CMD);
+ slot-host-state = STATE_SENDING_CMD11;
+
+ /*
+* We need to disable clock stop while doing voltage switch
+* according to Voltage Switch Normal Scenario.
+* It's assumed that by the next time the CLKENA is updated
+* (when we set the clock next) that the voltage change will
+* be over, so we don't bother setting any bits to
synchronize
+* with dw_mci_setup_bus().
+*/
I don't know the details about the dw_mmc controller, but normally a
host driver is expected to gate the clock from it's -set_ios
callback, when the clk frequency are set to 0.
Could you elaborate on why dw_mmc can't do that, but need to handle
this from here?
Let's see, it's been a while since I wrote this...
So dw_mmc has a special feature where the controller itself will
automatically stop the MMC Card clock when nothing is going on. This
is called low power mode. I'm not super familiar with other MMC
drivers, I get the impression that this is a special dw_mmc feature
and not common to other controllers. I think other drivers have
aggressive runtime PM to get similar power savings.
The dw_mmc auto clock gating can wreck total havoc on the voltage
change procedure, since part of the way that the host and card
communicate is that the host is supposed to stop its clock when it
gets to a certain phase of the voltage switch sequence. If the
controller is stopping the clock for us then it can confuse the card.
The dw_mmc manual says that before starting a voltage change you must
turn off low power mode. That's what we're doing here.
The comment above refers to the fact dw_mci_setup_bus() will
unconditionally turn low power mode back on for us when called with a
non-zero clock. If dw_mci_setup_bus() might be called with a non-zero
clock during the voltage change then this would be disaster (low power
mode would be back on!). ...but the clock will always be zero during
the voltage change and when it's finally non-zero then it's the last
stage of the voltage change and we can go back to low power mode.
Possibly the above was not super clear from the comment (even for
those familiar with the oddities of dw_mmc). If you want me to try to
rewrite the comment, let me know.
-Doug
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Re: [PATCHv2 1/5] rtc: s3c: Define s3c_rtc structure to remove global variables.
On Tue, 12 Aug 2014 11:01:07 +0900 y...@samsung.com wrote:
This patch define s3c_rtc structure including necessary variables for S3C RTC
device instead of global variables. This patch improves the readability by
removing global variables.
Below is the v1-v2 delta.
Why were all those tests of info-base added? Can it really be zero?
I don't see how.
---
a/drivers/rtc/rtc-s3c.c~rtc-s3c-define-s3c_rtc-structure-to-remove-global-variables-v2
+++ a/drivers/rtc/rtc-s3c.c
@@ -121,6 +121,9 @@ static int s3c_rtc_setaie(struct device
struct s3c_rtc *info = dev_get_drvdata(dev);
unsigned int tmp;
+ if (!info-base)
+ return -EINVAL;
+
dev_dbg(info-dev, %s: aie=%d\n, __func__, enabled);
clk_enable(info-rtc_clk);
@@ -180,6 +183,9 @@ static int s3c_rtc_gettime(struct device
struct s3c_rtc *info = dev_get_drvdata(dev);
unsigned int have_retried = 0;
+ if (!info-base)
+ return -EINVAL;
+
clk_enable(info-rtc_clk);
retry_get_time:
rtc_tm-tm_min = readb(info-base + S3C2410_RTCMIN);
@@ -224,6 +230,9 @@ static int s3c_rtc_settime(struct device
struct s3c_rtc *info = dev_get_drvdata(dev);
int year = tm-tm_year - 100;
+ if (!info-base)
+ return -EINVAL;
+
dev_dbg(dev, set time %04d.%02d.%02d %02d:%02d:%02d\n,
1900 + tm-tm_year, tm-tm_mon, tm-tm_mday,
tm-tm_hour, tm-tm_min, tm-tm_sec);
@@ -255,6 +264,9 @@ static int s3c_rtc_getalarm(struct devic
struct rtc_time *alm_tm = alrm-time;
unsigned int alm_en;
+ if (!info-base)
+ return -EINVAL;
+
clk_enable(info-rtc_clk);
alm_tm-tm_sec = readb(info-base + S3C2410_ALMSEC);
alm_tm-tm_min = readb(info-base + S3C2410_ALMMIN);
@@ -317,6 +329,9 @@ static int s3c_rtc_setalarm(struct devic
struct rtc_time *tm = alrm-time;
unsigned int alrm_en;
+ if (!info-base)
+ return -EINVAL;
+
clk_enable(info-rtc_clk);
dev_dbg(dev, s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n,
alrm-enabled,
@@ -357,6 +372,9 @@ static int s3c_rtc_proc(struct device *d
struct s3c_rtc *info = dev_get_drvdata(dev);
unsigned int ticnt;
+ if (!info-base)
+ return -EINVAL;
+
clk_enable(info-rtc_clk);
if (info-cpu_type == TYPE_S3C64XX) {
ticnt = readw(info-base + S3C2410_RTCCON);
@@ -548,7 +566,7 @@ static int s3c_rtc_probe(struct platform
rtc_tm.tm_min = 0;
rtc_tm.tm_sec = 0;
- s3c_rtc_settime(NULL, rtc_tm);
+ s3c_rtc_settime(pdev-dev, rtc_tm);
dev_warn(pdev-dev, warning: invalid RTC value so
initializing it\n);
}
_
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[PATCH 1/2] ARM: dts: exynos: Explicitly set dr_mode on peach-pit and peach-pi
In case the optional dr_mode property isn't set in the dwc3 nodes the
the controller will go into OTG mode iff both USB host and USB gadget
functionality are enabled in the kernel configuration. Unfortunately this
results in USB not working on exynos5420-peach-pit and
exynos5800-peach-pi with such a kernel configuration unless manually
change the mode. To resolve that explicitely configure the dual role
mode as host
Signed-off-by: Sjoerd Simons sjoerd.sim...@collabora.co.uk
---
arch/arm/boot/dts/exynos5420-peach-pit.dts | 8
arch/arm/boot/dts/exynos5420.dtsi | 4 ++--
arch/arm/boot/dts/exynos5800-peach-pi.dts | 8
3 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 228a6b1..6c22610 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -427,10 +427,18 @@
status = okay;
};
+usbdrd_dwc3_0 {
+ dr_mode = host;
+};
+
usbdrd_phy0 {
vbus-supply = usb300_vbus_reg;
};
+usbdrd_dwc3_1 {
+ dr_mode = host;
+};
+
usbdrd_phy1 {
vbus-supply = usb301_vbus_reg;
};
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm/boot/dts/exynos5420.dtsi
index bfe056d..8617a03 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -815,7 +815,7 @@
#size-cells = 1;
ranges;
- dwc3 {
+ usbdrd_dwc3_0: dwc3 {
compatible = snps,dwc3;
reg = 0x1200 0x1;
interrupts = 0 72 0;
@@ -841,7 +841,7 @@
#size-cells = 1;
ranges;
- dwc3 {
+ usbdrd_dwc3_1: dwc3 {
compatible = snps,dwc3;
reg = 0x1240 0x1;
interrupts = 0 73 0;
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts
b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index f3ee48b..166b352 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -425,10 +425,18 @@
status = okay;
};
+usbdrd_dwc3_0 {
+ dr_mode = host;
+};
+
usbdrd_phy0 {
vbus-supply = usb300_vbus_reg;
};
+usbdrd_dwc3_1 {
+ dr_mode = host;
+};
+
usbdrd_phy1 {
vbus-supply = usb301_vbus_reg;
};
--
2.1.0
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[PATCH 0/2] Fix Exynos peach USB on kernels with USB Gadget support
When building a kernel with support for both USB host and USB Gadget support on the dwc3 controller on the Exynos5 soc will go into USB OTG mode unless otherwise specified in the dtb, which is unhelpful for boards hooked up to run as USB host. First patch in this set explicitely set the dual-role mode for the dwc3 controller on Peach pi and Peach pit boards to host mode. Second patch enables gadget mode in the default exynos config to more easily catch/trigger issues like these. I suspect other boards base using exynos5420/5800 might need the similar fixes (Arndale Octa and Samsung SMDK5420) to their dts files, so would be great if folks with those board could verify this. Sjoerd Simons (2): ARM: dts: exynos: Explicitly set dr_mode on peach-pit and peach-pi ARM: exynos_defconfig: enable USB gadget support arch/arm/boot/dts/exynos5420-peach-pit.dts | 8 arch/arm/boot/dts/exynos5420.dtsi | 4 ++-- arch/arm/boot/dts/exynos5800-peach-pi.dts | 8 arch/arm/configs/exynos_defconfig | 1 + 4 files changed, 19 insertions(+), 2 deletions(-) -- 2.1.0 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/2] ARM: exynos_defconfig: enable USB gadget support
Enable USB gadget support without support for any specific gadgets to more easily catch cases where a devices dts doesn't specify the usb controllers dr_mode while it should. Signed-off-by: Sjoerd Simons sjoerd.sim...@collabora.co.uk --- arch/arm/configs/exynos_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig index fc7d168..3664120 100644 --- a/arch/arm/configs/exynos_defconfig +++ b/arch/arm/configs/exynos_defconfig @@ -54,6 +54,7 @@ CONFIG_SMSC911X=y CONFIG_USB_USBNET=y CONFIG_USB_NET_SMSC75XX=y CONFIG_USB_NET_SMSC95XX=y +CONFIG_USB_GADGET=y CONFIG_INPUT_EVDEV=y CONFIG_KEYBOARD_GPIO=y CONFIG_KEYBOARD_CROS_EC=y -- 2.1.0 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/2] ARM: dts: exynos: Explicitly set dr_mode on peach-pit and peach-pi
Hi,
Am 22.08.2014 22:57, schrieb Sjoerd Simons:
In case the optional dr_mode property isn't set in the dwc3 nodes the
the controller will go into OTG mode iff both USB host and USB gadget
functionality are enabled in the kernel configuration. Unfortunately this
results in USB not working on exynos5420-peach-pit and
exynos5800-peach-pi with such a kernel configuration unless manually
change the mode. To resolve that explicitely configure the dual role
mode as host
Signed-off-by: Sjoerd Simons sjoerd.sim...@collabora.co.uk
---
arch/arm/boot/dts/exynos5420-peach-pit.dts | 8
arch/arm/boot/dts/exynos5420.dtsi | 4 ++--
arch/arm/boot/dts/exynos5800-peach-pi.dts | 8
3 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 228a6b1..6c22610 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -427,10 +427,18 @@
status = okay;
};
+usbdrd_dwc3_0 {
+ dr_mode = host;
+};
+
usbdrd_phy0 {
vbus-supply = usb300_vbus_reg;
};
+usbdrd_dwc3_1 {
+ dr_mode = host;
+};
The sort order should be alphabetical here, which means dwc before phy.
+
usbdrd_phy1 {
vbus-supply = usb301_vbus_reg;
};
[...]
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts
b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index f3ee48b..166b352 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -425,10 +425,18 @@
status = okay;
};
+usbdrd_dwc3_0 {
+ dr_mode = host;
+};
+
usbdrd_phy0 {
vbus-supply = usb300_vbus_reg;
};
+usbdrd_dwc3_1 {
+ dr_mode = host;
+};
Dito.
+
usbdrd_phy1 {
vbus-supply = usb301_vbus_reg;
};
Cheers,
Andreas
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Re: [PATCH v9 1/2] regulator: Add driver for max77802 PMIC PMIC regulators
Hello Mark, On 08/22/2014 08:30 PM, Mark Brown wrote: The problem is that one of these regulators is used as the vqmmc-supply (VCCQ/VDD_IO) so the mmc host controller driver disables it on MMC_POWER_OFF. Now AFAIK (Yuvaraj can correct me what I got wrong) this shouldn't be an issue since on card detection, the vqmmc supply should be enabled again but on Exynos the built-in card detect line is on the same power rail as vqmmc. That means that disabling the regulator prevents card insertions to be detected. If the MMC host controller needs a supply enabling in order to do card detection and it's supposed to be doing card detection I'd expect it to be enabling that supply. Why is it not doing that? Good question. I'm not that familiar with the dw_mmc host controller nor its driver implementation so I'll let Yuvaraj or Doug to answer that. Best regards, Javier -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v9 1/2] regulator: Add driver for max77802 PMIC PMIC regulators
Hi, On Fri, Aug 22, 2014 at 3:02 PM, Javier Martinez Canillas javier.marti...@collabora.co.uk wrote: Hello Mark, On 08/22/2014 08:30 PM, Mark Brown wrote: The problem is that one of these regulators is used as the vqmmc-supply (VCCQ/VDD_IO) so the mmc host controller driver disables it on MMC_POWER_OFF. Now AFAIK (Yuvaraj can correct me what I got wrong) this shouldn't be an issue since on card detection, the vqmmc supply should be enabled again but on Exynos the built-in card detect line is on the same power rail as vqmmc. That means that disabling the regulator prevents card insertions to be detected. If the MMC host controller needs a supply enabling in order to do card detection and it's supposed to be doing card detection I'd expect it to be enabling that supply. Why is it not doing that? Good question. I'm not that familiar with the dw_mmc host controller nor its driver implementation so I'll let Yuvaraj or Doug to answer that. I haven't seen the issue that Yuvaraj is reporting (but I also haven't picked up all of the relevant patches and tried to reproduce), so I'm going to have to leave it to Yuvaraj to answer. As far as I know the dw_mmc driver ought to be enabling vqmmc when it needs it. Perhaps there's a bug in your patch series that adds vqmmc support to dw_mmc? -Doug -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/2] Add of match tables for the ChromeOs EC subdevices
The ChromeOS EC MFD driver registers its sub-devices with both a (platform) name and an of compatibility string. As a result of this the modalias passed on to user-space will be based on the of compatibility string. Thus to be able to rely on autoloading in case the subdevices are build as modules they need to export the necessary module aliases based to match the of information. The two patches in these series add the requird of match information to the EC subdevices Sjoerd Simons (2): i2c: cros-ec-tunnel: Add of match table input: cros_ec_keyb: Add of match table drivers/i2c/busses/i2c-cros-ec-tunnel.c | 9 + drivers/input/keyboard/cros_ec_keyb.c | 10 ++ 2 files changed, 19 insertions(+) -- 2.1.0 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] i2c: cros-ec-tunnel: Add of match table
To enable the cros-ec-tunnel driver to be auto-loaded when build as a
module add an of match table (and export it) to match the modalias
information passed on to userspace as the Cros EC MFD driver registers
the MFD subdevices with an of_compatibility string.
Signed-off-by: Sjoerd Simons sjoerd.sim...@collabora.co.uk
---
drivers/i2c/busses/i2c-cros-ec-tunnel.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/i2c/busses/i2c-cros-ec-tunnel.c
b/drivers/i2c/busses/i2c-cros-ec-tunnel.c
index 05e033c..3c15dcc 100644
--- a/drivers/i2c/busses/i2c-cros-ec-tunnel.c
+++ b/drivers/i2c/busses/i2c-cros-ec-tunnel.c
@@ -310,11 +310,20 @@ static int ec_i2c_remove(struct platform_device *dev)
return 0;
}
+#ifdef CONFIG_OF
+static const struct of_device_id cros_ec_i2c_of_match[] = {
+ { .compatible = google,cros-ec-i2c-tunnel },
+ {},
+};
+MODULE_DEVICE_TABLE(of, cros_ec_i2c_of_match);
+#endif
+
static struct platform_driver ec_i2c_tunnel_driver = {
.probe = ec_i2c_probe,
.remove = ec_i2c_remove,
.driver = {
.name = cros-ec-i2c-tunnel,
+ .of_match_table = of_match_ptr (cros_ec_i2c_of_match),
},
};
--
2.1.0
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[PATCH 2/2] input: cros_ec_keyb: Add of match table
To enable the cros_ec_keyb driver to be auto-loaded when build as
module add an of match table (and export it) to match the modalias
information passed on to userspace as the Cros EC MFD driver registers
the MFD subdevices with an of_compatibility string.
Signed-off-by: Sjoerd Simons sjoerd.sim...@collabora.co.uk
---
drivers/input/keyboard/cros_ec_keyb.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/input/keyboard/cros_ec_keyb.c
b/drivers/input/keyboard/cros_ec_keyb.c
index 791781a..0bdbf2d 100644
--- a/drivers/input/keyboard/cros_ec_keyb.c
+++ b/drivers/input/keyboard/cros_ec_keyb.c
@@ -342,10 +342,20 @@ static int cros_ec_keyb_resume(struct device *dev)
static SIMPLE_DEV_PM_OPS(cros_ec_keyb_pm_ops, NULL, cros_ec_keyb_resume);
+#ifdef CONFIG_OF
+static const struct of_device_id cros_ec_keyb_of_match[] = {
+ { .compatible = google,cros-ec-keyb },
+ {},
+};
+MODULE_DEVICE_TABLE(of, cros_ec_keyb_of_match);
+#endif
+
+
static struct platform_driver cros_ec_keyb_driver = {
.probe = cros_ec_keyb_probe,
.driver = {
.name = cros-ec-keyb,
+ .of_match_table = of_match_ptr (cros_ec_keyb_of_match),
.pm = cros_ec_keyb_pm_ops,
},
};
--
2.1.0
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[PATCH 1/1] ARM: exynos_defconfig: Enable options for display panel support
Many Exynos devices have a display panel, most of them just have a simple panel while others have more complex configurations that requires an embedded DisplayPort (eDP) to LVDS display bridge. This patch enables the following features to support both setups: - Direct Rendering Manager (DRM) - DRM bridge registration and lookup framework - Parade ps8622/ps8625 eDP/LVDS bridge - NXP ptn3460 eDP/LVDS bridge - Exynos Fully Interactive Mobile Display controller (FIMD) - Panel registration and lookup framework - Simple panels - Backlight and LCD device support Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk --- Some of the options enabled here (e.g: the eDP/LVDS bridges) are still not merged in mainline so this patch depends on the following posted patches that were still not merged: drm/bridge: Modify drm_bridge core to support driver model [0] drm/bridge: Add i2c based driver for ptn3460 bridge [1] drm/bridge: Add i2c based driver for ps8622/ps8625 bridge [2] But I wanted to post anyways to make easier for others to figure out what are the needed options to have the display working on their Exynos machines. In order to test the display panel on the Peach machines, the following patches are also needed: ARM: dts: Add DT changes for display on peach_pit [3] ARM: dts: Add DT changes for display on peach_pi [4] Best regards, Javier [0]: http://patchwork.ozlabs.org/patch/373792/ [1]: http://patchwork.ozlabs.org/patch/373793/ [2]: http://patchwork.ozlabs.org/patch/373794/ [3]: http://www.spinics.net/lists/arm-kernel/msg350568.html [4]: http://www.spinics.net/lists/arm-kernel/msg350569.html arch/arm/configs/exynos_defconfig | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig index 676c744..f69d57e 100644 --- a/arch/arm/configs/exynos_defconfig +++ b/arch/arm/configs/exynos_defconfig @@ -101,11 +101,25 @@ CONFIG_REGULATOR_S2MPA01=y CONFIG_REGULATOR_S2MPS11=y CONFIG_REGULATOR_S5M8767=y CONFIG_REGULATOR_TPS65090=y +CONFIG_DRM=y +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_PS8622=y +CONFIG_DRM_EXYNOS=y +CONFIG_DRM_EXYNOS_FIMD=y +CONFIG_DRM_EXYNOS_DP=y +CONFIG_DRM_PANEL=y +CONFIG_DRM_PANEL_SIMPLE=y CONFIG_FB=y CONFIG_FB_MODE_HELPERS=y CONFIG_FB_SIMPLE=y CONFIG_EXYNOS_VIDEO=y CONFIG_EXYNOS_MIPI_DSI=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_LCD_PLATFORM=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=y +CONFIG_BACKLIGHT_PWM=y CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FONTS=y CONFIG_FONT_7x14=y -- 2.0.1 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/3] ARM: dts: Add DT changes for display on peach_pit
Hello Ajay, On Fri, Jul 25, 2014 at 9:44 PM, Ajay Kumar ajaykumar...@samsung.com wrote: Add DT nodes for ps8622 bridge chip and panel-simple panel. Add backlight power supply for pwm-backlight. Also add bridge phandle needed by dp to enable display on peach_pit. Note that, peach_pit doesn't support chunghwa,claa101wb01 panel, but still we choose to reuse the binding since chunghwa,claa101wb01 has similar LCD timings. Signed-off-by: Ajay Kumar ajaykumar...@samsung.com --- Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk Best regards, Javier -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/3] ARM: dts: Add DT changes for display on peach_pi
Hello Ajay, On Fri, Jul 25, 2014 at 9:44 PM, Ajay Kumar ajaykumar...@samsung.com wrote: Add DT nodes for panel-simple auo,b133htn01 panel. Add backlight enable pin and backlight power supply for pwm-backlight. Also add panel phandle needed by dp to enable display on peach_pi. Signed-off-by: Ajay Kumar ajaykumar...@samsung.com --- Looks good to me. Reviewed-by: Javier Martinez Canillas javier.marti...@collabora.co.uk Best regards, Javier -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V6 6/8] drm/bridge: Modify drm_bridge core to support driver model
Hello Ajay, On Thu, Jul 31, 2014 at 12:58 PM, Thierry Reding thierry.red...@gmail.com wrote: On Wed, Jul 30, 2014 at 09:33:28PM +0530, Ajay kumar wrote: On Wed, Jul 30, 2014 at 8:38 PM, Thierry Reding thierry.red...@gmail.com wrote: [...] I think it should even be possible to do this in more separate steps. For example you could add the new bridge infrastructure without touching any of the existing drivers (so that they are completely unaffected by the changes) and then start converting one by one. For some of the changes this may be difficult (such as the dev - drm_dev rename to make room for the new struct device *dev). But that could for example be done in a preparatory patch that first renames the field, so that the infrastructure patch can add the new field without renaming any fields and therefore needing changes to drivers directly. The goal of that whole exercise is to allow display drivers to keep working with the existing API (ptn3460_init()) while we convert the bridge drivers to register with the new framework. Then we can more safely convert each display driver individually to make use of the new framework and once all drivers have been converted the old API can simply be removed. That way there should be no impact on existing functionality at any point. As of now only exynos_dp uses ptn3460_init. And, also only 2 drivers use drm_bridge_init. It should be really easy to bisect if something goes wrong. Still, I will try to divide it so that each patch contains minimal change. Thanks. Do you plan to address Thierry's concerns and re-spin this patch? Same question for patches: drm/bridge: Add i2c based driver for ptn3460 bridge drm/bridge: Add i2c based driver for ps8622/ps8625 bridge Thanks a lot and best regards, Javier -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v9 4/6] ARM: Exynos: switch to using generic cpufreq driver for Exynos4210/5250/5420
Tomasz Figa tomasz.f...@gmail.com writes:
Kukjin,
On 31.07.2014 20:32, Kukjin Kim wrote:
On 07/30/14 17:07, Thomas Abraham wrote:
The new CPU clock type allows the use of generic CPUfreq drivers. So for
Exynos4210/5250, switch to using generic cpufreq driver. For Exynos5420,
which did not have CPUfreq driver support, enable the use of generic
CPUfreq driver.
Suggested-by: Tomasz Figat.f...@samsung.com
Cc: Kukjin Kimkgene@samsung.com
Looks good to me,
Acked-by: Kukjin Kim kgene@samsung.com
BTW, who will handle this series? I hope see this series in 3.17.
This series consists mostly of clock changes and it likely depends on
patches already in my for-next, so I would be inclined toward taking it
through samsung-clk tree.
So has this series been picked up anywhere? I don't see it in your
samsung-clk tree, nor in Kukjin's for-next.
Also, I'm curious whether or how this is has been tested on big.LITTLE
SoCs.
I'm trying it on the 5800/Chromebook2 and it's not terribly stable. I'm
testing along with CPUidle, so there may be some untested interactions
there as it seems a bit more stable without CPUidle enabled.
I'd love to hear from anyone else that's testing CPUidle and CPUfreq
together big.LITTLE 5420/5800, with or without the switcher.
Also, the patch below[2] is needed for 5800.
FWIW, I have a temporary branch[1] based on the v3.17-rc branch of the
exynos-reference tree where I've added the DT patch needed for CPUidle,
this series (and it's dependencies) which is what I'm using for testing.
Kevin
[1] git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux.git
wip/exynos/integ
[2]
From 72ee00246c0fbdcf5dbb0bf910b8a427da4ac002 Mon Sep 17 00:00:00 2001
From: Kevin Hilman khil...@linaro.org
Date: Fri, 22 Aug 2014 16:04:11 -0700
Subject: [PATCH] ARM: Exynos: use generic cpufreq driver for Exynos5800
As a derivative of the 5420, the 5800 SoC should use the generic
big.LITTLE driver for Exynos5800 as well.
Signed-off-by: Kevin Hilman khil...@linaro.org
---
arch/arm/mach-exynos/exynos.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 8923d37c3e85..debe50bf736a 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -283,6 +283,7 @@ static void __init exynos_init_irq(void)
static const struct of_device_id exynos_cpufreq_matches[] = {
{ .compatible = samsung,exynos5420, .data = arm-bL-cpufreq-dt },
+ { .compatible = samsung,exynos5800, .data = arm-bL-cpufreq-dt },
{ .compatible = samsung,exynos5250, .data = cpufreq-cpu0 },
{ .compatible = samsung,exynos4210, .data = cpufreq-cpu0 },
{ .compatible = samsung,exynos5440, .data = exynos5440-cpufreq },
--
1.9.2
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Re: [PATCH v9 4/6] ARM: Exynos: switch to using generic cpufreq driver for Exynos4210/5250/5420
Hi Kevin, Thanks for taking a look at this. On 23.08.2014 01:54, Kevin Hilman wrote: Tomasz Figa tomasz.f...@gmail.com writes: Kukjin, On 31.07.2014 20:32, Kukjin Kim wrote: On 07/30/14 17:07, Thomas Abraham wrote: The new CPU clock type allows the use of generic CPUfreq drivers. So for Exynos4210/5250, switch to using generic cpufreq driver. For Exynos5420, which did not have CPUfreq driver support, enable the use of generic CPUfreq driver. Suggested-by: Tomasz Figat.f...@samsung.com Cc: Kukjin Kimkgene@samsung.com Looks good to me, Acked-by: Kukjin Kim kgene@samsung.com BTW, who will handle this series? I hope see this series in 3.17. This series consists mostly of clock changes and it likely depends on patches already in my for-next, so I would be inclined toward taking it through samsung-clk tree. So has this series been picked up anywhere? I don't see it in your samsung-clk tree, nor in Kukjin's for-next. No, it has not. In general it was already too late in the release cycle when the last version was posted. I had a plan to take it through clock tree with Kukjin's and Viresh's cooperation, but now as you say it... Also, I'm curious whether or how this is has been tested on big.LITTLE SoCs. I'm trying it on the 5800/Chromebook2 and it's not terribly stable. I'm testing along with CPUidle, so there may be some untested interactions there as it seems a bit more stable without CPUidle enabled. I'd love to hear from anyone else that's testing CPUidle and CPUfreq together big.LITTLE 5420/5800, with or without the switcher. I'd definitely like to see a clarification on this issues, before this series hits mainline or at least its parts related to affected SoCs. Also I'd like to hear some confirmation from Samsung Poland RD Center guys (on CC), whether this code works stable on their target boards (Universal C210, Trats, Trats2). Also, the patch below[2] is needed for 5800. FWIW, I have a temporary branch[1] based on the v3.17-rc branch of the exynos-reference tree where I've added the DT patch needed for CPUidle, this series (and it's dependencies) which is what I'm using for testing. The patch looks fine to me (well, it's trivial :)), thanks. Best regards, Tomasz -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/1] ARM: exynos_defconfig: Enable options for display panel support
Javier Martinez Canillas javier.marti...@collabora.co.uk writes: Many Exynos devices have a display panel, most of them just have a simple panel while others have more complex configurations that requires an embedded DisplayPort (eDP) to LVDS display bridge. This patch enables the following features to support both setups: - Direct Rendering Manager (DRM) - DRM bridge registration and lookup framework - Parade ps8622/ps8625 eDP/LVDS bridge - NXP ptn3460 eDP/LVDS bridge - Exynos Fully Interactive Mobile Display controller (FIMD) - Panel registration and lookup framework - Simple panels - Backlight and LCD device support Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk --- Some of the options enabled here (e.g: the eDP/LVDS bridges) are still not merged in mainline so this patch depends on the following posted patches that were still not merged: drm/bridge: Modify drm_bridge core to support driver model [0] drm/bridge: Add i2c based driver for ptn3460 bridge [1] drm/bridge: Add i2c based driver for ps8622/ps8625 bridge [2] But I wanted to post anyways to make easier for others to figure out what are the needed options to have the display working on their Exynos machines. Great, thanks for this! I spent/wasted quite a bit of time trying to figure out which options I needed to enable to get basic display support working. In order to test the display panel on the Peach machines, the following patches are also needed: ARM: dts: Add DT changes for display on peach_pit [3] ARM: dts: Add DT changes for display on peach_pi [4] Tested-by: Kevin Hilman khil...@linaro.org On v3.17-rc1 along with these DT patches abvoe on exynos5800/chromebook2 (peach-pi). Thanks, Kevin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
