[PATCH 0/4] Add initial support for pinctrl on Exynos7
The following patches are tested based on Kgene's for-next tree. https://git.kernel.org/cgit/linux/kernel/git/kgene/linux-samsung.git/log/?h=for-next Following patches are required for this series: 1- tty/serial: fix config dependencies for samsung serial https://www.mail-archive.com/linux-samsung-soc at vger.kernel.org/msg36208.html 2- dts, kbuild: Implement support for dtb vendor subdirs patchset http://comments.gmane.org/gmane.linux.kbuild.devel/12131 3- arch: arm64: enable support for Samsung Exynos7 SoC patchset http://www.spinics.net/lists/linux-samsung-soc/msg36728.html Abhilash Kesavan (2): pinctrl: exynos: Generalize the eint16_31 demux code pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts Naveen Krishna Chatradhi (2): pinctrl: exynos: Add initial driver data for Exynos7 arm64: dts: Add initial pinctrl support to EXYNOS7 .../bindings/pinctrl/samsung-pinctrl.txt |3 + arch/arm64/Kconfig |2 + arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi| 560 arch/arm64/boot/dts/exynos/exynos7.dtsi| 66 +++ drivers/pinctrl/samsung/pinctrl-exynos.c | 161 +- drivers/pinctrl/samsung/pinctrl-exynos.h |4 + drivers/pinctrl/samsung/pinctrl-samsung.c |2 + drivers/pinctrl/samsung/pinctrl-samsung.h |1 + 8 files changed, 788 insertions(+), 11 deletions(-) create mode 100644 arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/4] pinctrl: exynos: Generalize the eint16_31 demux code
The function exynos_irq_demux_eint16_31 uses pre-defined offsets for external
interrupt pending status and mask registers. So this function is not extensible
for Exynos7 SoC which have these registers at different offsets. So generalize
the exynos_irq_demux_eint16_31 function by using the pending/mask register
offset values from the exynos_irq_chip structure.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Cc: Thomas Abraham thomas...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Cc: Linus Walleij linus.wall...@linaro.org
---
drivers/pinctrl/samsung/pinctrl-exynos.c |6 --
drivers/pinctrl/samsung/pinctrl-exynos.h |1 +
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c
b/drivers/pinctrl/samsung/pinctrl-exynos.c
index 003bfd8..3133a1e 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -387,10 +387,11 @@ static void exynos_irq_demux_eint16_31(unsigned int irq,
struct irq_desc *desc)
chained_irq_enter(chip, desc);
for (i = 0; i eintd-nr_banks; ++i) {
+ struct exynos_irq_chip *our_chip = eintd-chip;
struct samsung_pin_bank *b = eintd-banks[i];
- pend = readl(d-virt_base + EXYNOS_WKUP_EPEND_OFFSET
+ pend = readl(d-virt_base + our_chip-eint_pend
+ b-eint_offset);
- mask = readl(d-virt_base + EXYNOS_WKUP_EMASK_OFFSET
+ mask = readl(d-virt_base + our_chip-eint_mask
+ b-eint_offset);
exynos_irq_demux_eint(pend ~mask, b-irq_domain);
}
@@ -508,6 +509,7 @@ static int exynos_eint_wkup_init(struct
samsung_pinctrl_drv_data *d)
muxed_data-banks[idx++] = bank;
}
muxed_data-nr_banks = muxed_banks;
+ muxed_data-chip = exynos_wkup_irq_chip;
return 0;
}
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.h
b/drivers/pinctrl/samsung/pinctrl-exynos.h
index 3c91c35..e060722 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.h
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.h
@@ -94,6 +94,7 @@ struct exynos_weint_data {
* @banks: array of banks being part of the mux
*/
struct exynos_muxed_weint_data {
+ struct exynos_irq_chip *chip;
unsigned int nr_banks;
struct samsung_pin_bank *banks[];
};
--
1.7.9.5
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/4] pinctrl: exynos: Add initial driver data for Exynos7
From: Naveen Krishna Chatradhi ch.nav...@samsung.com
This patch adds initial driver data for Exynos7 pinctrl support.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Cc: Thomas Abraham thomas...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Cc: Linus Walleij linus.wall...@linaro.org
---
.../bindings/pinctrl/samsung-pinctrl.txt |1 +
drivers/pinctrl/samsung/pinctrl-exynos.c | 113
drivers/pinctrl/samsung/pinctrl-samsung.c |2 +
drivers/pinctrl/samsung/pinctrl-samsung.h |1 +
4 files changed, 117 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
index f80519a..8425838 100644
--- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
@@ -18,6 +18,7 @@ Required Properties:
- samsung,exynos5250-pinctrl: for Exynos5250 compatible pin-controller.
- samsung,exynos5260-pinctrl: for Exynos5260 compatible pin-controller.
- samsung,exynos5420-pinctrl: for Exynos5420 compatible pin-controller.
+ - samsung,exynos7-pinctrl: for Exynos7 compatible pin-controller.
- reg: Base address of the pin controller hardware module and length of
the address space it occupies.
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c
b/drivers/pinctrl/samsung/pinctrl-exynos.c
index fe15ab8..1ebd080 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -1147,3 +1147,116 @@ struct samsung_pin_ctrl exynos5420_pin_ctrl[] = {
.label = exynos5420-gpio-ctrl4,
},
};
+
+/* pin banks of exynos7 pin-controller - ALIVE */
+static struct samsung_pin_bank exynos7_pin_banks0[] = {
+ EXYNOS_PIN_BANK_EINTW(8, 0x000, gpa0, 0x00),
+ EXYNOS_PIN_BANK_EINTW(8, 0x020, gpa1, 0x04),
+ EXYNOS_PIN_BANK_EINTW(8, 0x040, gpa2, 0x08),
+ EXYNOS_PIN_BANK_EINTW(8, 0x060, gpa3, 0x0c),
+};
+
+/* pin banks of exynos7 pin-controller - BUS0 */
+static struct samsung_pin_bank exynos7_pin_banks1[] = {
+ EXYNOS_PIN_BANK_EINTG(5, 0x000, gpb0, 0x00),
+ EXYNOS_PIN_BANK_EINTG(8, 0x020, gpc0, 0x04),
+ EXYNOS_PIN_BANK_EINTG(2, 0x040, gpc1, 0x08),
+ EXYNOS_PIN_BANK_EINTG(6, 0x060, gpc2, 0x0c),
+ EXYNOS_PIN_BANK_EINTG(8, 0x080, gpc3, 0x10),
+ EXYNOS_PIN_BANK_EINTG(4, 0x0a0, gpd0, 0x14),
+ EXYNOS_PIN_BANK_EINTG(6, 0x0c0, gpd1, 0x18),
+ EXYNOS_PIN_BANK_EINTG(8, 0x0e0, gpd2, 0x1c),
+ EXYNOS_PIN_BANK_EINTG(5, 0x100, gpd4, 0x20),
+ EXYNOS_PIN_BANK_EINTG(4, 0x120, gpd5, 0x24),
+ EXYNOS_PIN_BANK_EINTG(6, 0x140, gpd6, 0x28),
+ EXYNOS_PIN_BANK_EINTG(3, 0x160, gpd7, 0x2c),
+ EXYNOS_PIN_BANK_EINTG(2, 0x180, gpd8, 0x30),
+ EXYNOS_PIN_BANK_EINTG(2, 0x1a0, gpg0, 0x34),
+ EXYNOS_PIN_BANK_EINTG(4, 0x1c0, gpg3, 0x38),
+};
+
+/* pin banks of exynos7 pin-controller - NFC */
+static struct samsung_pin_bank exynos7_pin_banks2[] = {
+ EXYNOS_PIN_BANK_EINTG(3, 0x000, gpj0, 0x00),
+};
+
+/* pin banks of exynos7 pin-controller - TOUCH */
+static struct samsung_pin_bank exynos7_pin_banks3[] = {
+ EXYNOS_PIN_BANK_EINTG(3, 0x000, gpj1, 0x00),
+};
+
+/* pin banks of exynos7 pin-controller - FF */
+static struct samsung_pin_bank exynos7_pin_banks4[] = {
+ EXYNOS_PIN_BANK_EINTG(4, 0x000, gpg4, 0x00),
+};
+
+/* pin banks of exynos7 pin-controller - ESE */
+static struct samsung_pin_bank exynos7_pin_banks5[] = {
+ EXYNOS_PIN_BANK_EINTG(5, 0x000, gpv7, 0x00),
+};
+
+/* pin banks of exynos7 pin-controller - FSYS0 */
+static struct samsung_pin_bank exynos7_pin_banks6[] = {
+ EXYNOS_PIN_BANK_EINTG(7, 0x000, gpr4, 0x00),
+};
+
+/* pin banks of exynos7 pin-controller - FSYS1 */
+static struct samsung_pin_bank exynos7_pin_banks7[] = {
+ EXYNOS_PIN_BANK_EINTG(4, 0x000, gpr0, 0x00),
+ EXYNOS_PIN_BANK_EINTG(8, 0x020, gpr1, 0x04),
+ EXYNOS_PIN_BANK_EINTG(5, 0x040, gpr2, 0x08),
+ EXYNOS_PIN_BANK_EINTG(8, 0x060, gpr3, 0x0c),
+};
+
+struct samsung_pin_ctrl exynos7_pin_ctrl[] = {
+ {
+ /* pin-controller instance 0 Alive data */
+ .pin_banks = exynos7_pin_banks0,
+ .nr_banks = ARRAY_SIZE(exynos7_pin_banks0),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ .eint_wkup_init = exynos_eint_wkup_init,
+ .label = exynos7-gpio-ctrl0,
+ }, {
+ /* pin-controller instance 1 BUS0 data */
+ .pin_banks = exynos7_pin_banks1,
+ .nr_banks = ARRAY_SIZE(exynos7_pin_banks1),
+ .eint_gpio_init = exynos_eint_gpio_init,
+ .label = exynos7-gpio-ctrl1,
+ }, {
+ /* pin-controller instance 2 NFC data */
+ .pin_banks = exynos7_pin_banks2,
[PATCH 0/4] Add initial support for pinctrl on Exynos7
The following patches are tested based on Kgene's for-next tree. https://git.kernel.org/cgit/linux/kernel/git/kgene/linux-samsung.git/log/?h=for-next Following patches are required for this series: 1- tty/serial: fix config dependencies for samsung serial https://www.mail-archive.com/linux-samsung-soc at vger.kernel.org/msg36208.html 2- dts, kbuild: Implement support for dtb vendor subdirs patchset http://comments.gmane.org/gmane.linux.kbuild.devel/12131 3- arch: arm64: enable support for Samsung Exynos7 SoC patchset http://www.spinics.net/lists/linux-samsung-soc/msg36728.html Abhilash Kesavan (2): pinctrl: exynos: Generalize the eint16_31 demux code pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts Naveen Krishna Chatradhi (2): pinctrl: exynos: Add initial driver data for Exynos7 arm64: dts: Add initial pinctrl support to EXYNOS7 .../bindings/pinctrl/samsung-pinctrl.txt |3 + arch/arm64/Kconfig |2 + arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi| 560 arch/arm64/boot/dts/exynos/exynos7.dtsi| 66 +++ drivers/pinctrl/samsung/pinctrl-exynos.c | 161 +- drivers/pinctrl/samsung/pinctrl-exynos.h |4 + drivers/pinctrl/samsung/pinctrl-samsung.c |2 + drivers/pinctrl/samsung/pinctrl-samsung.h |1 + 8 files changed, 788 insertions(+), 11 deletions(-) create mode 100644 arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 4/4] arm64: dts: Add initial pinctrl support to EXYNOS7
From: Naveen Krishna Chatradhi ch.nav...@samsung.com
Add intial pin configuration nodes for EXYNOS7.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Cc: Rob Herring r...@kernel.org
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Cc: Linus Walleij linus.wall...@linaro.org
Cc: Thomas Abraham thomas...@samsung.com
---
arch/arm64/Kconfig |2 +
arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi | 560 +++
arch/arm64/boot/dts/exynos/exynos7.dtsi | 66 +++
3 files changed, 628 insertions(+)
create mode 100644 arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index b4d1dc2..0dcf6f5 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -143,6 +143,8 @@ config ARCH_EXYNOS7
bool ARMv8 based Samsung Exynos7
select ARCH_EXYNOS
select COMMON_CLK_SAMSUNG
+ select PINCTRL
+ select PINCTRL_EXYNOS
help
This enables support for Samsung Exynos7 SoC family
diff --git a/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
new file mode 100644
index 000..d858805
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
@@ -0,0 +1,560 @@
+/*
+ * Samsung's Exynos7 SoC pin-mux and pin-config device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Samsung's Exynos7 SoC pin-mux and pin-config options are listed as
+ * device tree nodes in this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+pinctrl_alive {
+ gpa0: gpa0 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ interrupt-parent = gic;
+ #interrupt-cells = 2;
+ interrupts = 0 0 0, 0 1 0, 0 2 0, 0 3 0,
+0 4 0, 0 5 0, 0 6 0, 0 7 0;
+ };
+
+ gpa1: gpa1 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ interrupt-parent = gic;
+ #interrupt-cells = 2;
+ interrupts = 0 8 0, 0 9 0, 0 10 0, 0 11 0,
+0 12 0, 0 13 0, 0 14 0, 0 15 0;
+ };
+
+ gpa2: gpa2 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpa3: gpa3 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+};
+
+pinctrl_bus0 {
+ gpb0: gpb0 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpc0: gpc0 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpc1: gpc1 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpc2: gpc2 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpc3: gpc3 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpd0: gpd0 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpd1: gpd1 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpd2: gpd2 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpd4: gpd4 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpd5: gpd5 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpd6: gpd6 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpd7: gpd7 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
[PATCH 2/4] pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts
Exynos7 uses different offsets for wakeup interrupt configuration registers.
So a new irq_chip instance for Exynos7 wakeup interrupts is added. The irq_chip
selection is now based on the wakeup interrupt controller compatible string.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Cc: Thomas Abraham thomas...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Cc: Linus Walleij linus.wall...@linaro.org
---
.../bindings/pinctrl/samsung-pinctrl.txt |2 +
drivers/pinctrl/samsung/pinctrl-exynos.c | 42 +++-
drivers/pinctrl/samsung/pinctrl-exynos.h |3 ++
3 files changed, 38 insertions(+), 9 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
index e82aaf4..f80519a 100644
--- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
@@ -136,6 +136,8 @@ B. External Wakeup Interrupts: For supporting external
wakeup interrupts, a
found on Samsung S3C64xx SoCs,
- samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller
found on Samsung Exynos4210 and S5PC110/S5PV210 SoCs.
+ - samsung,exynos7-wakeup-eint: represents wakeup interrupt controller
+ found on Samsung Exynos7 SoC.
- interrupt-parent: phandle of the interrupt parent to which the external
wakeup interrupts are forwarded to.
- interrupts: interrupt used by multiplexed wakeup interrupts.
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c
b/drivers/pinctrl/samsung/pinctrl-exynos.c
index 3133a1e..fe15ab8 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -56,12 +56,6 @@ static struct samsung_pin_bank_type bank_type_alive = {
.reg_offset = { 0x00, 0x04, 0x08, 0x0c, },
};
-/* list of external wakeup controllers supported */
-static const struct of_device_id exynos_wkup_irq_ids[] = {
- { .compatible = samsung,exynos4210-wakeup-eint, },
- { }
-};
-
static void exynos_irq_mask(struct irq_data *irqd)
{
struct irq_chip *chip = irq_data_get_irq_chip(irqd);
@@ -328,9 +322,11 @@ static int exynos_wkup_irq_set_wake(struct irq_data *irqd,
unsigned int on)
/*
* irq_chip for wakeup interrupts
*/
-static struct exynos_irq_chip exynos_wkup_irq_chip = {
+static struct exynos_irq_chip exynos_wkup_irq_chip;
+
+static struct exynos_irq_chip exynos4210_wkup_irq_chip = {
.chip = {
- .name = exynos_wkup_irq_chip,
+ .name = exynos4210_wkup_irq_chip,
.irq_unmask = exynos_irq_unmask,
.irq_mask = exynos_irq_mask,
.irq_ack = exynos_irq_ack,
@@ -342,6 +338,29 @@ static struct exynos_irq_chip exynos_wkup_irq_chip = {
.eint_pend = EXYNOS_WKUP_EPEND_OFFSET,
};
+static struct exynos_irq_chip exynos7_wkup_irq_chip = {
+ .chip = {
+ .name = exynos7_wkup_irq_chip,
+ .irq_unmask = exynos_irq_unmask,
+ .irq_mask = exynos_irq_mask,
+ .irq_ack = exynos_irq_ack,
+ .irq_set_type = exynos_irq_set_type,
+ .irq_set_wake = exynos_wkup_irq_set_wake,
+ },
+ .eint_con = EXYNOS7_WKUP_ECON_OFFSET,
+ .eint_mask = EXYNOS7_WKUP_EMASK_OFFSET,
+ .eint_pend = EXYNOS7_WKUP_EPEND_OFFSET,
+};
+
+/* list of external wakeup controllers supported */
+static const struct of_device_id exynos_wkup_irq_ids[] = {
+ { .compatible = samsung,exynos4210-wakeup-eint,
+ .data = exynos4210_wkup_irq_chip },
+ { .compatible = samsung,exynos7-wakeup-eint,
+ .data = exynos7_wkup_irq_chip },
+ { }
+};
+
/* interrupt handler for wakeup interrupts 0..15 */
static void exynos_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
{
@@ -434,7 +453,12 @@ static int exynos_eint_wkup_init(struct
samsung_pinctrl_drv_data *d)
int idx, irq;
for_each_child_of_node(dev-of_node, np) {
- if (of_match_node(exynos_wkup_irq_ids, np)) {
+ const struct of_device_id *match;
+
+ match = of_match_node(exynos_wkup_irq_ids, np);
+ if (match) {
+ memcpy(exynos_wkup_irq_chip, match-data,
+ sizeof(struct exynos_irq_chip));
wkup_np = np;
break;
}
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.h
b/drivers/pinctrl/samsung/pinctrl-exynos.h
index e060722..0db1e52 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.h
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.h
@@ -25,6 +25,9 @@
#define EXYNOS_WKUP_ECON_OFFSET0xE00
#define EXYNOS_WKUP_EMASK_OFFSET 0xF00
#define EXYNOS_WKUP_EPEND_OFFSET 0xF40
+#define EXYNOS7_WKUP_ECON_OFFSET 0x700
+#define EXYNOS7_WKUP_EMASK_OFFSET 0x900
+#define
Re: [PATCH 2/4] pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts
Hi Abhilash,
On Sat, Sep 13, 2014 at 2:20 PM, Abhilash Kesavan a.kesa...@samsung.com wrote:
Exynos7 uses different offsets for wakeup interrupt configuration registers.
So a new irq_chip instance for Exynos7 wakeup interrupts is added. The
irq_chip
selection is now based on the wakeup interrupt controller compatible string.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Cc: Thomas Abraham thomas...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Cc: Linus Walleij linus.wall...@linaro.org
---
.../bindings/pinctrl/samsung-pinctrl.txt |2 +
drivers/pinctrl/samsung/pinctrl-exynos.c | 42
+++-
drivers/pinctrl/samsung/pinctrl-exynos.h |3 ++
3 files changed, 38 insertions(+), 9 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
index e82aaf4..f80519a 100644
--- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
@@ -136,6 +136,8 @@ B. External Wakeup Interrupts: For supporting external
wakeup interrupts, a
found on Samsung S3C64xx SoCs,
- samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller
found on Samsung Exynos4210 and S5PC110/S5PV210 SoCs.
+ - samsung,exynos7-wakeup-eint: represents wakeup interrupt controller
+ found on Samsung Exynos7 SoC.
- interrupt-parent: phandle of the interrupt parent to which the external
wakeup interrupts are forwarded to.
- interrupts: interrupt used by multiplexed wakeup interrupts.
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c
b/drivers/pinctrl/samsung/pinctrl-exynos.c
index 3133a1e..fe15ab8 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -56,12 +56,6 @@ static struct samsung_pin_bank_type bank_type_alive = {
.reg_offset = { 0x00, 0x04, 0x08, 0x0c, },
};
-/* list of external wakeup controllers supported */
-static const struct of_device_id exynos_wkup_irq_ids[] = {
- { .compatible = samsung,exynos4210-wakeup-eint, },
- { }
-};
-
static void exynos_irq_mask(struct irq_data *irqd)
{
struct irq_chip *chip = irq_data_get_irq_chip(irqd);
@@ -328,9 +322,11 @@ static int exynos_wkup_irq_set_wake(struct irq_data
*irqd, unsigned int on)
/*
* irq_chip for wakeup interrupts
*/
-static struct exynos_irq_chip exynos_wkup_irq_chip = {
+static struct exynos_irq_chip exynos_wkup_irq_chip;
+
+static struct exynos_irq_chip exynos4210_wkup_irq_chip = {
This should be marked as initdata.
.chip = {
- .name = exynos_wkup_irq_chip,
+ .name = exynos4210_wkup_irq_chip,
.irq_unmask = exynos_irq_unmask,
.irq_mask = exynos_irq_mask,
.irq_ack = exynos_irq_ack,
@@ -342,6 +338,29 @@ static struct exynos_irq_chip exynos_wkup_irq_chip = {
.eint_pend = EXYNOS_WKUP_EPEND_OFFSET,
};
+static struct exynos_irq_chip exynos7_wkup_irq_chip = {
this as well.
+ .chip = {
+ .name = exynos7_wkup_irq_chip,
+ .irq_unmask = exynos_irq_unmask,
+ .irq_mask = exynos_irq_mask,
+ .irq_ack = exynos_irq_ack,
+ .irq_set_type = exynos_irq_set_type,
+ .irq_set_wake = exynos_wkup_irq_set_wake,
+ },
+ .eint_con = EXYNOS7_WKUP_ECON_OFFSET,
+ .eint_mask = EXYNOS7_WKUP_EMASK_OFFSET,
+ .eint_pend = EXYNOS7_WKUP_EPEND_OFFSET,
+};
+
+/* list of external wakeup controllers supported */
+static const struct of_device_id exynos_wkup_irq_ids[] = {
+ { .compatible = samsung,exynos4210-wakeup-eint,
+ .data = exynos4210_wkup_irq_chip },
+ { .compatible = samsung,exynos7-wakeup-eint,
+ .data = exynos7_wkup_irq_chip },
+ { }
+};
+
/* interrupt handler for wakeup interrupts 0..15 */
static void exynos_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
{
@@ -434,7 +453,12 @@ static int exynos_eint_wkup_init(struct
samsung_pinctrl_drv_data *d)
int idx, irq;
for_each_child_of_node(dev-of_node, np) {
- if (of_match_node(exynos_wkup_irq_ids, np)) {
+ const struct of_device_id *match;
+
+ match = of_match_node(exynos_wkup_irq_ids, np);
+ if (match) {
+ memcpy(exynos_wkup_irq_chip, match-data,
+ sizeof(struct exynos_irq_chip));
wkup_np = np;
break;
}
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.h
b/drivers/pinctrl/samsung/pinctrl-exynos.h
index e060722..0db1e52 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.h
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.h
@@ -25,6
Re: [PATCH 4/4] arm64: dts: Add initial pinctrl support to EXYNOS7
Hi Abhilash,
On Sat, Sep 13, 2014 at 2:20 PM, Abhilash Kesavan a.kesa...@samsung.com wrote:
From: Naveen Krishna Chatradhi ch.nav...@samsung.com
Add intial pin configuration nodes for EXYNOS7.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Cc: Rob Herring r...@kernel.org
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Cc: Linus Walleij linus.wall...@linaro.org
Cc: Thomas Abraham thomas...@samsung.com
---
arch/arm64/Kconfig |2 +
arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi | 560
+++
arch/arm64/boot/dts/exynos/exynos7.dtsi | 66 +++
3 files changed, 628 insertions(+)
create mode 100644 arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index b4d1dc2..0dcf6f5 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -143,6 +143,8 @@ config ARCH_EXYNOS7
bool ARMv8 based Samsung Exynos7
select ARCH_EXYNOS
select COMMON_CLK_SAMSUNG
+ select PINCTRL
+ select PINCTRL_EXYNOS
It would be good if the this change is moved to a different patch and
keep this only for dts updates. Rest of the patch looks fine.
Regards,
Thomas.
help
This enables support for Samsung Exynos7 SoC family
diff --git a/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
new file mode 100644
index 000..d858805
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
@@ -0,0 +1,560 @@
+/*
+ * Samsung's Exynos7 SoC pin-mux and pin-config device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Samsung's Exynos7 SoC pin-mux and pin-config options are listed as
+ * device tree nodes in this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+pinctrl_alive {
+ gpa0: gpa0 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ interrupt-parent = gic;
+ #interrupt-cells = 2;
+ interrupts = 0 0 0, 0 1 0, 0 2 0, 0 3 0,
+0 4 0, 0 5 0, 0 6 0, 0 7 0;
+ };
+
+ gpa1: gpa1 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ interrupt-parent = gic;
+ #interrupt-cells = 2;
+ interrupts = 0 8 0, 0 9 0, 0 10 0, 0 11 0,
+0 12 0, 0 13 0, 0 14 0, 0 15 0;
+ };
+
+ gpa2: gpa2 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpa3: gpa3 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+};
+
+pinctrl_bus0 {
+ gpb0: gpb0 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpc0: gpc0 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpc1: gpc1 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpc2: gpc2 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpc3: gpc3 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpd0: gpd0 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpd1: gpd1 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpd2: gpd2 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpd4: gpd4 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpd5: gpd5 {
+ gpio-controller;
+
Re: [PATCH 00/14] Support 64bit Cortex A57 based Exynos7 SoC
On 27.08.2014 13:34, Tomasz Figa wrote: Hi Naveen, On 27.08.2014 11:44, Naveen Krishna Chatradhi wrote: This patchset supports new Exynos7 Samsung SoC based on Cortex-A57. Exynos7 is a System-On-Chip (SoC) that is based on 64-bit ARMv8 RISC processor. A general issue with this series is that it introduces a very generic name for a very specific single SoC. We remember exactly the same cases for Exynos4 (original name used for Exynos5250) and Exynos5 (Exynos5250) and we should have learned that it is better to use a specific name first and only then try to make things common if it turns out to be appropriate. Any comments on this? -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/4] Add initial support for pinctrl on Exynos7
On Sat, Sep 13, 2014 at 2:20 PM, Abhilash Kesavan a.kesa...@samsung.com wrote: The following patches are tested based on Kgene's for-next tree. https://git.kernel.org/cgit/linux/kernel/git/kgene/linux-samsung.git/log/?h=for-next Following patches are required for this series: 1- tty/serial: fix config dependencies for samsung serial https://www.mail-archive.com/linux-samsung-soc at vger.kernel.org/msg36208.html 2- dts, kbuild: Implement support for dtb vendor subdirs patchset http://comments.gmane.org/gmane.linux.kbuild.devel/12131 3- arch: arm64: enable support for Samsung Exynos7 SoC patchset http://www.spinics.net/lists/linux-samsung-soc/msg36728.html Abhilash Kesavan (2): pinctrl: exynos: Generalize the eint16_31 demux code pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts Naveen Krishna Chatradhi (2): pinctrl: exynos: Add initial driver data for Exynos7 arm64: dts: Add initial pinctrl support to EXYNOS7 .../bindings/pinctrl/samsung-pinctrl.txt |3 + arch/arm64/Kconfig |2 + arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi| 560 arch/arm64/boot/dts/exynos/exynos7.dtsi| 66 +++ drivers/pinctrl/samsung/pinctrl-exynos.c | 161 +- drivers/pinctrl/samsung/pinctrl-exynos.h |4 + drivers/pinctrl/samsung/pinctrl-samsung.c |2 + drivers/pinctrl/samsung/pinctrl-samsung.h |1 + 8 files changed, 788 insertions(+), 11 deletions(-) create mode 100644 arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi Tested GPIO and Wakeup interrupts. After fixing comments for patches in this series, this series Reviewed-by: Thomas Abraham thomas...@samsung.com Tested-by: Thomas Abraham thomas...@samsung.com -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe devicetree in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v4 4/8] clk: samsung: add initial clock support for Exynos7 SoC
Hi Naveen,
Please see my comments inline.
On 12.09.2014 17:26, Naveen Krishna Chatradhi wrote:
Add initial clock support for Exynos7 SoC which is required
to bring up platforms based on Exynos7.
[snip]
+External clocks:
+
+There are several clocks that are generated outside the SoC. It
+is expected that they are defined using standard clock bindings
+with following clock-output-names:
+
+ - fin_pll - PLL input clock from XXTI
In addition to just relying on clock names (which I hope to finally go
away from common clock framework some day) the binding should be defined
to take all input clocks using generic clock bindings (i.e. clocks and
clock-names). Even if the driver wouldn't use that yet, this would help
with determining initialization order of clock providers.
+
+Required Properties for Clock Controller:
+
+ - compatible: clock controllers will use one of the following
+ compatible strings to indicate the clock controller
+ functionality.
+
+ - samsung,exynos7-clock-topc
+ - samsung,exynos7-clock-top0
+ - samsung,exynos7-clock-peric0
+ - samsung,exynos7-clock-peric1
+ - samsung,exynos7-clock-peris
+
+ - reg: physical base address of the controller and the length of
+ memory mapped region.
+
+ - #clock-cells: should be 1.
diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile
index 6fb4bc6..5da0ba9 100644
--- a/drivers/clk/samsung/Makefile
+++ b/drivers/clk/samsung/Makefile
@@ -18,3 +18,4 @@ obj-$(CONFIG_S3C2412_COMMON_CLK)+= clk-s3c2412.o
obj-$(CONFIG_S3C2443_COMMON_CLK)+= clk-s3c2443.o
obj-$(CONFIG_ARCH_S3C64XX) += clk-s3c64xx.o
obj-$(CONFIG_ARCH_S5PV210) += clk-s5pv210.o clk-s5pv210-audss.o
+obj-$(CONFIG_ARCH_EXYNOS7) += clk-exynos7.o
Please keep the entries sorted alphabetically.
diff --git a/drivers/clk/samsung/clk-exynos7.c
b/drivers/clk/samsung/clk-exynos7.c
new file mode 100644
index 000..3ea8d0e
--- /dev/null
+++ b/drivers/clk/samsung/clk-exynos7.c
[snip]
+static struct samsung_fixed_factor_clock topc_fixed_factor_clks[] __initdata
= {
+ FFACTOR(0, ffac_topc_bus0_pll_div2, mout_bus0_pll_ctrl, 1, 2, 0),
+ FFACTOR(0, ffac_topc_bus0_pll_div4,
+ ffac_topc_bus0_pll_div2, 1, 2, 0),
Please use a consistent way of breaking long lines. Here you have 3
tabs, but further in the driver I can see 1 tab or 2 tabs. I'd recommend
making them all 1 tab.
+ FFACTOR(0, ffac_topc_bus1_pll_div2, mout_bus1_pll_ctrl, 1, 2, 0),
+ FFACTOR(0, ffac_topc_cc_pll_div2, mout_cc_pll_ctrl, 1, 2, 0),
+ FFACTOR(0, ffac_topc_mfc_pll_div2, mout_mfc_pll_ctrl, 1, 2, 0),
+};
[snip]
+static void __init exynos7_clk_topc_init(struct device_node *np)
+{
+ struct exynos_cmu_info cmu = {0};
+
+ cmu.pll_clks = topc_pll_clks;
+ cmu.nr_pll_clks = ARRAY_SIZE(topc_pll_clks);
+ cmu.mux_clks = topc_mux_clks;
+ cmu.nr_mux_clks = ARRAY_SIZE(topc_mux_clks);
+ cmu.div_clks = topc_div_clks;
+ cmu.nr_div_clks = ARRAY_SIZE(topc_div_clks);
+ cmu.fixed_factor_clks = topc_fixed_factor_clks;
+ cmu.nr_fixed_factor_clks = ARRAY_SIZE(topc_fixed_factor_clks);
+ cmu.clk_regs = topc_clk_regs;
+ cmu.nr_clk_regs = ARRAY_SIZE(topc_clk_regs);
I wonder if you couldn't simply make this struct statically initialized
and marked as __initdata.
Otherwise looks good.
Best regards,
Tomasz
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v4 2/8] clk: samsung: Factor out the common code to clk.c
Hi Naveen,
Please see my comments inline.
On 12.09.2014 17:26, Naveen Krishna Chatradhi wrote:
While adding clock support for Exynos5260, the infrastructure to
register multiple clock controllers was introduced. Factor out the
support for registering multiple clock controller from Exynos5260
clock code to common samsung clock code so that it can be used by
other Exynos SoC which have multiple clock controllers.
[snip]
@@ -268,7 +135,7 @@ struct samsung_gate_clock aud_gate_clks[] __initdata = {
static void __init exynos5260_clk_aud_init(struct device_node *np)
{
- struct exynos5260_cmu_info cmu = {0};
+ struct exynos_cmu_info cmu = {0};
cmu.mux_clks = aud_mux_clks;
cmu.nr_mux_clks = ARRAY_SIZE(aud_mux_clks);
@@ -280,7 +147,7 @@ static void __init exynos5260_clk_aud_init(struct
device_node *np)
cmu.clk_regs = aud_clk_regs;
cmu.nr_clk_regs = ARRAY_SIZE(aud_clk_regs);
- exynos5260_cmu_register_one(np, cmu);
+ exynos_cmu_register_one(np, cmu);
I'd suggest changing the namespace prefix from exynos to just samsung to
be consistent with other helpers. Otherwise looks good.
Best regards,
Tomasz
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/4] pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts
Hi Abhilash,
Please see my comments inline.
On 13.09.2014 10:50, Abhilash Kesavan wrote:
Exynos7 uses different offsets for wakeup interrupt configuration registers.
So a new irq_chip instance for Exynos7 wakeup interrupts is added. The
irq_chip
selection is now based on the wakeup interrupt controller compatible string.
[snip]
@@ -328,9 +322,11 @@ static int exynos_wkup_irq_set_wake(struct irq_data
*irqd, unsigned int on)
/*
* irq_chip for wakeup interrupts
*/
-static struct exynos_irq_chip exynos_wkup_irq_chip = {
+static struct exynos_irq_chip exynos_wkup_irq_chip;
+
Why do you still need this, if you have both variants below?
+static struct exynos_irq_chip exynos4210_wkup_irq_chip = {
.chip = {
- .name = exynos_wkup_irq_chip,
+ .name = exynos4210_wkup_irq_chip,
.irq_unmask = exynos_irq_unmask,
.irq_mask = exynos_irq_mask,
.irq_ack = exynos_irq_ack,
@@ -342,6 +338,29 @@ static struct exynos_irq_chip exynos_wkup_irq_chip = {
.eint_pend = EXYNOS_WKUP_EPEND_OFFSET,
};
+static struct exynos_irq_chip exynos7_wkup_irq_chip = {
+ .chip = {
+ .name = exynos7_wkup_irq_chip,
+ .irq_unmask = exynos_irq_unmask,
+ .irq_mask = exynos_irq_mask,
+ .irq_ack = exynos_irq_ack,
+ .irq_set_type = exynos_irq_set_type,
+ .irq_set_wake = exynos_wkup_irq_set_wake,
+ },
+ .eint_con = EXYNOS7_WKUP_ECON_OFFSET,
+ .eint_mask = EXYNOS7_WKUP_EMASK_OFFSET,
+ .eint_pend = EXYNOS7_WKUP_EPEND_OFFSET,
+};
+
+/* list of external wakeup controllers supported */
+static const struct of_device_id exynos_wkup_irq_ids[] = {
+ { .compatible = samsung,exynos4210-wakeup-eint,
+ .data = exynos4210_wkup_irq_chip },
+ { .compatible = samsung,exynos7-wakeup-eint,
+ .data = exynos7_wkup_irq_chip },
+ { }
+};
+
/* interrupt handler for wakeup interrupts 0..15 */
static void exynos_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
{
@@ -434,7 +453,12 @@ static int exynos_eint_wkup_init(struct
samsung_pinctrl_drv_data *d)
int idx, irq;
for_each_child_of_node(dev-of_node, np) {
- if (of_match_node(exynos_wkup_irq_ids, np)) {
+ const struct of_device_id *match;
+
+ match = of_match_node(exynos_wkup_irq_ids, np);
+ if (match) {
+ memcpy(exynos_wkup_irq_chip, match-data,
+ sizeof(struct exynos_irq_chip));
Hmm, this doesn't look correct to me. You are modifying a static struct
here. Why couldn't you simply use the exynos irq chip pointed by
match-data in further registration code?
wkup_np = np;
break;
}
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.h
b/drivers/pinctrl/samsung/pinctrl-exynos.h
index e060722..0db1e52 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.h
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.h
@@ -25,6 +25,9 @@
#define EXYNOS_WKUP_ECON_OFFSET 0xE00
#define EXYNOS_WKUP_EMASK_OFFSET 0xF00
#define EXYNOS_WKUP_EPEND_OFFSET 0xF40
+#define EXYNOS7_WKUP_ECON_OFFSET 0x700
+#define EXYNOS7_WKUP_EMASK_OFFSET0x900
+#define EXYNOS7_WKUP_EPEND_OFFSET0xA00
Interestingly enough, the offsets look just like the normal GPIO
interrupt controller of previous Exynos SoCs. Are you sure those are
correct? Also if somehow the controller now resembles the normal one,
doesn't it have the SVC register making it possible to reuse the non
wake-up code instead?
Best regards,
Tomasz
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/4] Add initial support for pinctrl on Exynos7
Hi Abhilash, On 13.09.2014 10:50, Abhilash Kesavan wrote: The following patches are tested based on Kgene's for-next tree. https://git.kernel.org/cgit/linux/kernel/git/kgene/linux-samsung.git/log/?h=for-next Following patches are required for this series: 1- tty/serial: fix config dependencies for samsung serial https://www.mail-archive.com/linux-samsung-soc at vger.kernel.org/msg36208.html 2- dts, kbuild: Implement support for dtb vendor subdirs patchset http://comments.gmane.org/gmane.linux.kbuild.devel/12131 3- arch: arm64: enable support for Samsung Exynos7 SoC patchset http://www.spinics.net/lists/linux-samsung-soc/msg36728.html Other than few of my and Thomas's comments, my further actions (i.e. an ACK) will depend on reply to [1]. [1] http://thread.gmane.org/gmane.linux.kernel.samsung-soc/36823/focus=37456 Best regards, Tomasz -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: exynos5420/arndale-octa: imprecise external aborts on exynos_defconfig
On Thu, Sep 11, 2014 at 12:16 AM, Kevin Hilman khil...@kernel.org wrote: Tyler Baker tyler.ba...@linaro.org writes: Exynos5420-based Arndale octa boards have recently started failing boot tests due to imprecise external aborts. This only appears to happen when using exynos_defconfig and boots fine with multi_v7_defconfig. The issue seems to be intermittent, so is not reliably reproducable and difficult to bisect. Here are a few boot logs from recent mainline/linux-next kernels that are failing: FYI, I'm seeing the same periodic aborts. For example, here's my boot of next-20140910: http://images.armcloud.us/kernel-ci/next/next-20140910/arm-exynos_defconfig/boot-exynos5420-arndale-octa.html However, my userspace is much simpler and doesn't seem to cause a panic, so my boot tests report passing. (I should fixup my scripts so these imprecise aborts are reported as a FAIL.) I'm glad you pointed out that it happens only with exynos_defconfig and not multi_v7_defconfig because I noticed that too. I haven't had the time to track it any further than that, so maybe the exynos folks can help track it down from here. Thanks for reporting this, Kevin Hi Tyler, Kevin, From the bootlog you have shared, [1.060016] CPU4: failed to come online [2.070031] CPU5: failed to come online [3.080049] CPU6: failed to come online [4.090066] CPU7: failed to come online [4.090099] Brought up 4 CPUs [4.090109] SMP: Total of 4 processors activated. [4.090119] CPU: WARNING: CPU(s) started in wrong/inconsistent modes (primary CPU mode 0x13) [4.090128] CPU: This may indicate a broken bootloader or firmware. Would it be possible to set max cpus to 1, disable switcher and try again. I don't have a arndale octa board but I have tested mainline kernel with smdk5420 board. It boots all eight CPUs, switcher works fine and there are no imprecise aborts seen. Thanks, Thomas. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v4 1/3] ARM: dts: Add Peach Pit dts entry for Atmel touchpad
On 09/11/14 18:44, Javier Martinez Canillas wrote:
Hello Dmitry,
Hi,
On 09/11/2014 12:25 AM, Dmitry Torokhov wrote:
+hsi2c_8 {
+ status = okay;
+ clock-frequency =333000;
+
+ /* Atmel mXT336S */
+ trackpad@4b {
+ compatible = atmel,maxtouch;
+ reg =0x4b;
+ interrupt-parent =gpx1;
+ interrupts =1 IRQ_TYPE_EDGE_FALLING;
+ wakeup-source;
+ pinctrl-names = default;
+ pinctrl-0 =trackpad_irq;
+ linux,gpio-keymap =KEY_RESERVED
+KEY_RESERVED
+KEY_RESERVED /* GPIO0 */
+KEY_RESERVED /* GPIO1 */
+KEY_RESERVED /* GPIO2 */
+BTN_LEFT; /* GPIO3 */
Seems like a single space sneaked between the semicolon and the tab.
Maybe whoever applies could squash it.
Right, I set c-default-style to linux on Emacs but seems it gets confused
sometimes when editing Device Tree source files. Sorry about that.
Applied this whole series with fixing a white space Dmitry commented.
Note, I will handle all of exynos_defconfig changes separately.
Thanks,
Kukjin
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v4] ARM: dts: exynos3250: add MFC codec device node
On 09/09/14 22:09, Jacek Anaszewski wrote:
Signed-off-by: Jacek Anaszewskij.anaszew...@samsung.com
Signed-off-by: Kyungmin Parkkyungmin.p...@samsung.com
Cc: Kukjin Kimkgene@samsung.com
---
arch/arm/boot/dts/exynos3250.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi
b/arch/arm/boot/dts/exynos3250.dtsi
index bbc1e4c..95cc5a1 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -294,6 +294,18 @@
status = disabled;
};
+ mfc-codec@1340 {
mfc: codec@1340 {
+ compatible = samsung,mfc-v7;
+ reg =0x1340 0x1;
+ interrupts =0 102 0;
+ clock-names = mfc, sclk_mfc;
+ clocks =cmu CLK_MFC,cmu CLK_SCLK_MFC;
+ #address-cells =1;
+ #size-cells =0;
are the address-cells and size-cells required here?
+ samsung,power-domain =pd_mfc;
+ status = disabled;
+ };
+
serial_0: serial@1380 {
compatible = samsung,exynos4210-uart;
reg =0x1380 0x100;
- Kukjin
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V3 1/2] ARM: dts: Add DT changes for display on snow
On 09/01/14 19:36, Ajay Kumar wrote: Add DT nodes for ptn3460 bridge chip and panel. Add backlight enable pin and backlight power supply for pwm-backlight. Also add bridge phandle needed by dp to enable display on snow. Signed-off-by: Ajay Kumarajaykumar...@samsung.com --- Changes since V1: -- Remove simple-panel compatible string. -- Use GPIO_ACTIVE_HIGH instead of 0. -- Change panel node naming from panel-simple to panel. Changes since V2: -- Use proper compatible string: auo,b116xw03 arch/arm/boot/dts/exynos5250-snow.dts | 41 ++--- 1 file changed, 22 insertions(+), 19 deletions(-) Applied this and 2nd one. BTW, I resolved conflict when I applied. Please check my tree and then if any problems, please let me know. Thanks, Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: S3C24XX: remove separate restart code
On 09/09/14 00:30, Heiko Stübner wrote: The restart-handler series from Guenter Roeck got accepted recently and implements among other things also the restart handler in the samsung watchdog driver and where applicable in the clock drivers. So there is no need for having the restart callbacks in s3c24xx boards anymore. Signed-off-by: Heiko Stuebnerhe...@sntech.de --- arch/arm/mach-s3c24xx/Kconfig | 2 -- arch/arm/mach-s3c24xx/common.c | 4 arch/arm/mach-s3c24xx/common.h | 5 - .../mach-s3c24xx/include/mach/regs-s3c2443-clock.h | 2 -- arch/arm/mach-s3c24xx/mach-amlm5900.c | 1 - arch/arm/mach-s3c24xx/mach-anubis.c| 1 - arch/arm/mach-s3c24xx/mach-at2440evb.c | 1 - arch/arm/mach-s3c24xx/mach-bast.c | 1 - arch/arm/mach-s3c24xx/mach-gta02.c | 1 - arch/arm/mach-s3c24xx/mach-h1940.c | 1 - arch/arm/mach-s3c24xx/mach-jive.c | 1 - arch/arm/mach-s3c24xx/mach-mini2440.c | 1 - arch/arm/mach-s3c24xx/mach-n30.c | 2 -- arch/arm/mach-s3c24xx/mach-nexcoder.c | 1 - arch/arm/mach-s3c24xx/mach-osiris.c| 1 - arch/arm/mach-s3c24xx/mach-otom.c | 1 - arch/arm/mach-s3c24xx/mach-qt2410.c| 1 - arch/arm/mach-s3c24xx/mach-rx1950.c| 1 - arch/arm/mach-s3c24xx/mach-rx3715.c| 1 - arch/arm/mach-s3c24xx/mach-s3c2416-dt.c| 1 - arch/arm/mach-s3c24xx/mach-smdk2410.c | 1 - arch/arm/mach-s3c24xx/mach-smdk2413.c | 3 --- arch/arm/mach-s3c24xx/mach-smdk2416.c | 1 - arch/arm/mach-s3c24xx/mach-smdk2440.c | 1 - arch/arm/mach-s3c24xx/mach-smdk2443.c | 1 - arch/arm/mach-s3c24xx/mach-tct_hammer.c| 1 - arch/arm/mach-s3c24xx/mach-vr1000.c| 1 - arch/arm/mach-s3c24xx/mach-vstms.c | 1 - arch/arm/mach-s3c24xx/s3c2410.c| 13 arch/arm/mach-s3c24xx/s3c2412.c| 23 -- arch/arm/mach-s3c24xx/s3c2416.c| 8 arch/arm/mach-s3c24xx/s3c2443.c| 8 arch/arm/mach-s3c24xx/s3c244x.c| 12 --- 33 files changed, 104 deletions(-) Looks good to me, applied. Thanks, Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V3 1/2] ARM: dts: Add DT changes for display on snow
Hi Kukjin, On Sat, Sep 13, 2014 at 10:52 PM, Kukjin Kim kgene@samsung.com wrote: On 09/01/14 19:36, Ajay Kumar wrote: Add DT nodes for ptn3460 bridge chip and panel. Add backlight enable pin and backlight power supply for pwm-backlight. Also add bridge phandle needed by dp to enable display on snow. Signed-off-by: Ajay Kumarajaykumar...@samsung.com --- Changes since V1: -- Remove simple-panel compatible string. -- Use GPIO_ACTIVE_HIGH instead of 0. -- Change panel node naming from panel-simple to panel. Changes since V2: -- Use proper compatible string: auo,b116xw03 arch/arm/boot/dts/exynos5250-snow.dts | 41 ++--- 1 file changed, 22 insertions(+), 19 deletions(-) Applied this and 2nd one. BTW, I resolved conflict when I applied. Please check my tree and then if any problems, please let me know. This patchset has dependency on driver patches. But, no harm merging it since DT bindings are almost agreed. The below patch should be merged ASAP. Because, driver changes are already in for this patch: https://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg35182.html Ajay -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V3] ARM: dts: Add DT changes for display on peach_pi
On 08/25/14 15:13, Ajay kumar wrote: On Mon, Aug 4, 2014 at 3:17 PM, Ajay Kumarajaykumar...@samsung.com wrote: Add DT nodes for panel-simple auo,b133htn01 panel. Add backlight enable pin and backlight power supply for pwm-backlight. Also, add panel phandle needed by dp to enable display on peach_pi. Signed-off-by: Ajay Kumarajaykumar...@samsung.com --- Changes since V1: Remove simple-panel compatible string and use only auo,b133htn01. Changes since V2: As suggested by Andreas, Use GPIO_ACTIVE_HIGH for backlight enable-gpios instead of using 0. Change panel node naming from panel-simple to panel. arch/arm/boot/dts/exynos5800-peach-pi.dts | 27 ++- 1 file changed, 10 insertions(+), 17 deletions(-) Applied, thanks. - Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/5] usb: phy: samsung: remove old USB PHY code
On 08/23/14 02:14, Bartlomiej Zolnierkiewicz wrote: Hi, On Wednesday, August 20, 2014 01:12:44 PM Felipe Balbi wrote: Hi, On Thu, Aug 14, 2014 at 04:25:22PM +0200, Bartlomiej Zolnierkiewicz wrote: Hi, This patch series removes the old Samsung USB PHY drivers that got replaced by the new ones using the generic PHY layer. Depends on: - next-20140813 branch of linux-next kernel this thread seems to have died, what do I need to do with these patches? Please apply them (patches #3, #4 and #5). Patches #1 and #2 should be applied (or Acked-by) by Kukjin Kim. I've applied #1 and #2, sorry for late taking. Thanks, Kukjin Are we deleting the phy drivers or not ? Yes, we are deleting them. It has been agreed on by Kishon and Vivek. Please rebase on v3.17-rc1 and resend with all Acks in place. Done: https://lkml.org/lkml/2014/8/22/446 Please note that if you want to apply it to current -next kernel (next-20140822) then you need to resolve conflict between patch #5/5 (usb: phy: samsung: remove old common USB PHY code) and commit bbc66e140bab (usb: phy: samsung: Fix wrong bit mask for PHYPARAM1_PCS_TXDEEMPH) by simply removing the new version of drivers/usb/phy/phy-samsung-usb.h file. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
