Samsung pinctrl patches for v3.19
Hi Linus, Please consider the following pull request containing queued changes for pinctrl-samsung driver. I'm sorry for all the delays in handling this. Things should get better from now on, though. Best regards, Tomasz - The following changes since commit 6e08d6bbebebcf70f982d7190c4b6dc456cedd57: pinctrl: Add Intel Cherryview/Braswell pin controller support (2014-11-04 11:21:02 +0100) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tfiga/samsung-pinctrl.git tags/for_3.19/samsung-pinctrl for you to fetch changes up to 2891ba2906b6d2fd453042f410a11e6fc3edc37d: pinctrl: exynos: Add support for Exynos4415 (2014-11-09 22:28:07 +0900) Samsung pinctrl patches for v3.19 1) pinctrl-samsung data structure clean-up 8100cf4 pinctrl: samsung: Separate per-bank init and runtime data 1bf00d7 pinctrl: samsung: Constify samsung_pin_ctrl struct 94ce944 pinctrl: samsung: Constify samsung_pin_bank_type struct e06deff pinctrl: samsung: Drop unused label field in samsung_pin_ctrl struct 8799327 pinctrl: samsung: Make samsung_pinctrl_get_soc_data use ERR_PTR() 2) pinctrl-samsung Exynos7 support 50cea0c pinctrl: exynos: Add initial driver data for Exynos7 14c255d pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts 6f5e41b pinctrl: exynos: Consolidate irq domain callbacks 0d3d30d pinctrl: exynos: Generalize the eint16_31 demux code 3) pinctrl-samsung Exynos4415 support 2891ba2 pinctrl: exynos: Add support for Exynos4415 Abhilash Kesavan (3): pinctrl: exynos: Generalize the eint16_31 demux code pinctrl: exynos: Consolidate irq domain callbacks pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts Naveen Krishna Ch (1): pinctrl: exynos: Add initial driver data for Exynos7 Tomasz Figa (6): pinctrl: samsung: Make samsung_pinctrl_get_soc_data use ERR_PTR() pinctrl: samsung: Drop unused label field in samsung_pin_ctrl struct pinctrl: samsung: Constify samsung_pin_bank_type struct pinctrl: samsung: Constify samsung_pin_ctrl struct pinctrl: samsung: Separate per-bank init and runtime data pinctrl: exynos: Add support for Exynos4415 .../bindings/pinctrl/samsung-pinctrl.txt | 3 + drivers/pinctrl/samsung/pinctrl-exynos.c | 376 +++-- drivers/pinctrl/samsung/pinctrl-exynos.h | 3 + drivers/pinctrl/samsung/pinctrl-s3c24xx.c | 30 +- drivers/pinctrl/samsung/pinctrl-s3c64xx.c | 31 +- drivers/pinctrl/samsung/pinctrl-samsung.c | 131 +++ drivers/pinctrl/samsung/pinctrl-samsung.h | 82 +++-- 7 files changed, 435 insertions(+), 221 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/2] cpuidle: exynos: add coupled cpuidle support for Exynos4210
On 11/07/2014 07:00 PM, Bartlomiej Zolnierkiewicz wrote:
The following patch adds coupled cpuidle support for Exynos4210 to
an existing cpuidle-exynos driver. As a result it enables AFTR mode
to be used by default on Exynos4210 without the need to hot unplug
CPU1 first.
The patch is heavily based on earlier cpuidle-exynos4210 driver from
Daniel Lezcano:
http://www.spinics.net/lists/linux-samsung-soc/msg28134.html
Changes from Daniel's code include:
- porting code to current kernels
- fixing it to work on my setup (by using S5P_INFORM register
instead of S5P_VA_SYSRAM one on Revison 1.1 and retrying poking
CPU1 out of the BOOT ROM if necessary)
- fixing rare lockup caused by waiting for CPU1 to get stuck in
the BOOT ROM (CPU hotplug code in arch/arm/mach-exynos/platsmp.c
doesn't require this and works fine)
- moving Exynos specific code to arch/arm/mach-exynos/pm.c
- using cpu_boot_reg_base() helper instead of BOOT_VECTOR macro
- using exynos_cpu_*() helpers instead of accessing registers
directly
- using arch_send_wakeup_ipi_mask() instead of dsb_sev()
(this matches CPU hotplug code in arch/arm/mach-exynos/platsmp.c)
I am curious. You experienced very rare hangs after running the tests a
few hours, right ? Is the SEV replaced by the IPI solving the issue ? If
yes, how did you catch it ?
- integrating separate exynos4210-cpuidle driver into existing
exynos-cpuidle one
Cc: Daniel Lezcano daniel.lezc...@linaro.org
Cc: Colin Cross ccr...@google.com
Cc: Kukjin Kim kgene@samsung.com
Cc: Krzysztof Kozlowski k.kozlow...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Signed-off-by: Daniel Lezcano daniel.lezc...@linaro.org
A few comments below:
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/common.h| 4 +
arch/arm/mach-exynos/exynos.c| 4 +
arch/arm/mach-exynos/platsmp.c | 2 +-
arch/arm/mach-exynos/pm.c| 122 +++
drivers/cpuidle/Kconfig.arm | 1 +
drivers/cpuidle/cpuidle-exynos.c | 62 --
include/linux/platform_data/cpuidle-exynos.h | 20 +
7 files changed, 209 insertions(+), 6 deletions(-)
create mode 100644 include/linux/platform_data/cpuidle-exynos.h
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index d4d09bc..f208a60 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -14,6 +14,7 @@
#include linux/reboot.h
#include linux/of.h
+#include linux/platform_data/cpuidle-exynos.h
#define EXYNOS3250_SOC_ID 0xE3472000
#define EXYNOS3_SOC_MASK 0xF000
@@ -168,8 +169,11 @@ extern void exynos_pm_central_suspend(void);
extern int exynos_pm_central_resume(void);
extern void exynos_enter_aftr(void);
+extern struct cpuidle_exynos_data cpuidle_coupled_exynos_data;
+
extern void s5p_init_cpu(void __iomem *cpuid_addr);
extern unsigned int samsung_rev(void);
+extern void __iomem *cpu_boot_reg_base(void);
static inline void pmu_raw_writel(u32 val, u32 offset)
{
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index a487e59..4f4eb9e 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -317,6 +317,10 @@ static void __init exynos_dt_machine_init(void)
if (!IS_ENABLED(CONFIG_SMP))
exynos_sysram_init();
+#ifdef CONFIG_ARM_EXYNOS_CPUIDLE
+ if (of_machine_is_compatible(samsung,exynos4210))
+ exynos_cpuidle.dev.platform_data = cpuidle_coupled_exynos_data;
+#endif
You should not add those #ifdef.
if (of_machine_is_compatible(samsung,exynos4210) ||
of_machine_is_compatible(samsung,exynos4212) ||
(of_machine_is_compatible(samsung,exynos4412)
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index adb36a8..0e3ffc9 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -182,7 +182,7 @@ int exynos_cluster_power_state(int cluster)
S5P_CORE_LOCAL_PWR_EN);
}
-static inline void __iomem *cpu_boot_reg_base(void)
+void __iomem *cpu_boot_reg_base(void)
{
if (soc_is_exynos4210() samsung_rev() == EXYNOS4210_REV_1_1)
return pmu_base_addr + S5P_INFORM5;
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 4b36ab5..44cc08a 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -178,3 +178,125 @@ void exynos_enter_aftr(void)
cpu_pm_exit();
}
+
+static atomic_t cpu1_wakeup = ATOMIC_INIT(0);
+
+static int exynos_cpu0_enter_aftr(void)
+{
+ int ret = -1;
+
+ /*
+* If the other cpu is powered on, we have to power it off, because
+* the AFTR state won't work otherwise
+*/
+ if (cpu_online(1)) {
+ /*
+* We reach a sync point
RE: [BUG 3.18-rc3] kernel BUG at drivers/iommu/exynos-iommu.c:481!
Hi. Thank you for reporting. We will solve that problem as soon as possible! Regards, KyongHo -Original Message- From: Gustavo Padovan [mailto:gust...@padovan.org] Sent: Thursday, November 06, 2014 6:09 AM To: linux-samsung-soc@vger.kernel.org Cc: Cho KyongHo; Shaik Ameer Basha Subject: [BUG 3.18-rc3] kernel BUG at drivers/iommu/exynos-iommu.c:481! Hi, I'm seeing the following bug running the current linus tree of today, it seems this was introduced by the following commit: commit 6b21a5db36427d54a94091fc26b5890c3d6a8af3 Author: Cho KyongHo pullip@samsung.com Date: Mon May 12 11:45:02 2014 +0530 iommu/exynos: Support for device tree This commit adds device tree support for System MMU. Also, system mmu handling is improved. Previously, an IOMMU domain is bound to a System MMU which is not correct. This patch binds an IOMMU domain with the master device of a System MMU. Signed-off-by: Cho KyongHo pullip@samsung.com Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com Signed-off-by: Joerg Roedel jroe...@suse.de It is failing on a BUG_ON(!has_sysmmu(dev)); Gustavo [3.188618] [ cut here ] [3.188622] kernel BUG at drivers/iommu/exynos-iommu.c:481! [3.188626] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM [3.188633] Modules linked in: [3.188639] CPU: 0 PID: 18 Comm: kworker/u4:1 Not tainted 3.18.0-rc3-00061-ga1cff6e #3 [3.188650] Workqueue: deferwq deferred_probe_work_func [3.188654] task: ee09bc00 ti: ee11 task.ti: ee11 [3.188661] PC is at __exynos_sysmmu_enable+0x174/0x180 [3.188665] LR is at exynos_iommu_attach_device+0x44/0xb0 [3.188670] pc : [c0380024]lr : [c0380074]psr: 6193 [3.188670] sp : ee111d00 ip : fp : 6d444000 [3.188674] r10: ed488080 r9 : a113 r8 : ed4880d0 [3.188678] r7 : ee194e10 r6 : ee194e10 r5 : ed488080 r4 : [3.188683] r3 : 6d444000 r2 : ed488080 r1 : 6d444000 r0 : ee194e10 [3.188687] Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel [3.188691] Control: 10c5387d Table: 4000406a DAC: 0015 [3.188695] Process kworker/u4:1 (pid: 18, stack limit = 0xee110240) [3.188699] Stack: (0xee111d00 to 0xee112000) [3.188705] 1d00: 6d444000 ed4880c0 ed488080 ee194e10 ed4880d0 a113 0001 [3.188710] 1d20: c0380074 ed81d410 6d444000 ed488000 ee194e10 ed81d410 eda54400 [3.188715] 1d40: c0668444 ed81d410 0001 c037e28c ed4885d0 c0016624 ed4885d0 ee194e10 [3.188719] 1d60: ee24a010 ed81d410 eda54400 c026c310 0001 0005 ed81d410 c026e0d0 [3.188724] 1d80: c026dfc0 ed8dc840 ee3fe480 ed48cf80 eda54400 0001 c0692738 0003 [3.188729] 1da0: ee00fc00 c0285678 eda54400 eda54400 eda54400 ed48cf80 ed8dcbd0 [3.188733] 1dc0: ed48c500 c0268908 eda54400 c02551e8 ee24a000 eda54400 [3.188738] 1de0: c0691a30 c0256e68 ed48c580 c028c408 ed8dc840 ed8dcbf0 ed8dcbf0 0004 [3.188743] 1e00: ed8dc840 c0285960 ed8dc840 c06930e0 ed48c500 c048c964 c06922a0 c0285b48 [3.188748] 1e20: ee217a10 ee01f810 ee217a00 c0277cfc 2003 c05aecf4 [3.188753] 1e40: ee01f810 ed9828c0 000c fffe ee217a10 fdfb c06926d4 [3.188757] 1e60: 0001 c028ac84 c028ac3c ee217a10 c06e5774 [3.188762] 1e80: c06926d4 c0289838 ee217a10 c02899e8 ee11 ed93a900 c0287fdc [3.188767] 1ea0: ee005298 ee176ec4 ee217a10 ee217a44 c06932c0 c02896f4 ee217a10 ee217a10 [3.188772] 1ec0: c06932c0 c0288e4c ee217a10 c0693240 c0693218 c0289220 ee0f2880 c0693268 [3.188776] 1ee0: ee00fc00 c0032c38 ee00fc00 c065f5c0 c065f5c0 c065f5c0 0001 ee00fc20 [3.188781] 1f00: ee11 ee11 ee0f2898 ee0f2880 ee00fc00 0088 ee00fc00 c0032e90 [3.188786] 1f20: ee11 ee00fc54 ee051b80 ee0f2880 c0032e54 [3.188791] 1f40: c0037630 ee0f2880 [3.188795] 1f60: dead4ead ee111f74 ee111f74 [3.188800] 1f80: dead4ead ee111f90 ee111f90 ee111fac ee051b80 [3.188805] 1fa0: c0037564 c000e878 [3.188809] 1fc0: [3.188814] 1fe0: 0013 [3.188824] [c0380024] (__exynos_sysmmu_enable) from [c0380074] (exynos_iommu_attach_device+0x44/0xb0) [3.188830] [c0380074] (exynos_iommu_attach_device) from [c037e28c] (iommu_attach_device+0x18/0x24) [3.188839] [c037e28c] (iommu_attach_device) from [c0016624] (arm_iommu_attach_device+0x18/0xa0) [3.188849] [c0016624] (arm_iommu_attach_device) from [c026c310] (drm_iommu_attach_device+0x4c/0xc8) [3.188857] [c026c310]
Re: [PATCH] ARM: dts: Fix booting on Rinato market device
Dear Kukjin,
On 11/08/2014 07:16 PM, Kukjin Kim wrote:
Krzysztof Kozlowski wrote:
On pią, 2014-11-07 at 20:50 +0900, Chanwoo Choi wrote:
Hi Krzysztof,
On 11/07/2014 08:44 PM, Krzysztof Kozlowski wrote:
The bootloader on market Rinato (Gear 2) device checks for revision in
compatible field of DTB. If it is not present or lower than required
then booting fails with: Could not do normal boot. (no DTB found).
Log of bootloader in case of failure:
h/w: revision = 0x06
h/w: schematic = SM-R380_Rev0.5_Final_0205
date = 2000/01/01 12:00:21 (UTC)
cmu_div:4, div:5, src_clk:8, pixel_clk:31860720
load_kernel: loading boot image from 57344.. (BOOT)
load_kernel: found zImage, size: 0x3267e8
0xbc Error!
Verify_Binary_Signature: failed.
pit_check_signature (BOOT) invalid.
load_kernel: found custom kernel (ret:-2147483647)
No need to update kernel type.
Detected board: samsung,rinato-rev06
Could not do normal boot. (no DTB found)
: Entering usb mode for SM-R380_EUR_XX (65535)..
Add a rev06 suffix to compatible to satisfy the bootloader.
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
arch/arm/boot/dts/exynos3250-rinato.dts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts
b/arch/arm/boot/dts/exynos3250-rinato.dts
index 84380fa13e37..f72ba0a1d915 100644
--- a/arch/arm/boot/dts/exynos3250-rinato.dts
+++ b/arch/arm/boot/dts/exynos3250-rinato.dts
@@ -18,7 +18,8 @@
/ {
model = Samsung Rinato board;
- compatible = samsung,rinato, samsung,exynos3250, samsung,exynos3;
+ compatible = samsung,rinato, samsung,rinato-rev06,
+ samsung,exynos3250, samsung,exynos3;
I think it is wrong. The released bootloader from Samsung is not u-boot.
Instead, you have to update u-boot to support Exynos3250-basd Rinato board.
The bootloader on device also was not a u-boot. So the fix is for native
bootloader delivered on device.
I do not insist that this is proper fix. It was just needed to boot the
device with custom kernel.
Anyway, thanks for comments!
Hi Krzysztof and Chanwoo,
So, we don’t need this to fix the problem Krzysztof said? OK.
Yes.
The released bootloader from Samsung is not general and not opened.
We have to support Exynos3250-based Rinato on general bootloader.
Beset Regards,
Chanwoo Choi
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v6 35/48] arm: Register with kernel power-off handler
Register with kernel power-off handler instead of setting pm_power_off
directly. Always use register_power_off_handler_simple as there is no
indication that more than one power-off handler is registered.
If the power-off handler only resets the system or puts the CPU in sleep mode,
select the fallback priority to indicate that the power-off handler is one
of last resort. If the power-off handler powers off the system, select the
default priority.
Cc: Russell King li...@arm.linux.org.uk
Signed-off-by: Guenter Roeck li...@roeck-us.net
---
v6:
- This patch: No change.
Global: Replaced priority defines with enum.
v5:
- Rebase to v3.18-rc3
v4:
- No change
v3:
- Replace poweroff in all newly introduced variables and in text
with power_off or power-off as appropriate
- Replace POWEROFF_PRIORITY_xxx with POWER_OFF_PRIORITY_xxx
v2:
- Use defines to specify poweroff handler priorities
- Drop changes in arch/arm/mach-at91/setup.c (file removed upstream)
arch/arm/kernel/psci.c | 3 ++-
arch/arm/mach-at91/board-gsia18s.c | 3 ++-
arch/arm/mach-bcm/board_bcm2835.c | 3 ++-
arch/arm/mach-cns3xxx/cns3420vb.c | 3 ++-
arch/arm/mach-cns3xxx/core.c | 3 ++-
arch/arm/mach-highbank/highbank.c | 3 ++-
arch/arm/mach-imx/mach-mx31moboard.c | 3 ++-
arch/arm/mach-iop32x/em7210.c | 3 ++-
arch/arm/mach-iop32x/glantank.c| 3 ++-
arch/arm/mach-iop32x/iq31244.c | 3 ++-
arch/arm/mach-iop32x/n2100.c | 3 ++-
arch/arm/mach-ixp4xx/dsmg600-setup.c | 3 ++-
arch/arm/mach-ixp4xx/nas100d-setup.c | 3 ++-
arch/arm/mach-ixp4xx/nslu2-setup.c | 3 ++-
arch/arm/mach-omap2/board-omap3touchbook.c | 3 ++-
arch/arm/mach-orion5x/board-mss2.c | 3 ++-
arch/arm/mach-orion5x/dns323-setup.c | 9 ++---
arch/arm/mach-orion5x/kurobox_pro-setup.c | 3 ++-
arch/arm/mach-orion5x/ls-chl-setup.c | 3 ++-
arch/arm/mach-orion5x/ls_hgl-setup.c | 3 ++-
arch/arm/mach-orion5x/lsmini-setup.c | 3 ++-
arch/arm/mach-orion5x/mv2120-setup.c | 3 ++-
arch/arm/mach-orion5x/net2big-setup.c | 3 ++-
arch/arm/mach-orion5x/terastation_pro2-setup.c | 3 ++-
arch/arm/mach-orion5x/ts209-setup.c| 3 ++-
arch/arm/mach-orion5x/ts409-setup.c| 3 ++-
arch/arm/mach-pxa/corgi.c | 3 ++-
arch/arm/mach-pxa/mioa701.c| 3 ++-
arch/arm/mach-pxa/poodle.c | 3 ++-
arch/arm/mach-pxa/spitz.c | 3 ++-
arch/arm/mach-pxa/tosa.c | 3 ++-
arch/arm/mach-pxa/viper.c | 3 ++-
arch/arm/mach-pxa/z2.c | 7 ---
arch/arm/mach-pxa/zeus.c | 7 ---
arch/arm/mach-s3c24xx/mach-gta02.c | 3 ++-
arch/arm/mach-s3c24xx/mach-jive.c | 3 ++-
arch/arm/mach-s3c24xx/mach-vr1000.c| 3 ++-
arch/arm/mach-s3c64xx/mach-smartq.c| 3 ++-
arch/arm/mach-sa1100/generic.c | 3 ++-
arch/arm/mach-sa1100/simpad.c | 3 ++-
arch/arm/mach-u300/regulator.c | 3 ++-
arch/arm/mach-vt8500/vt8500.c | 3 ++-
arch/arm/xen/enlighten.c | 3 ++-
43 files changed, 94 insertions(+), 49 deletions(-)
diff --git a/arch/arm/kernel/psci.c b/arch/arm/kernel/psci.c
index f73891b..a7a2b4a 100644
--- a/arch/arm/kernel/psci.c
+++ b/arch/arm/kernel/psci.c
@@ -264,7 +264,8 @@ static int psci_0_2_init(struct device_node *np)
arm_pm_restart = psci_sys_reset;
- pm_power_off = psci_sys_poweroff;
+ register_power_off_handler_simple(psci_sys_poweroff,
+ POWER_OFF_PRIORITY_DEFAULT);
out_put_node:
of_node_put(np);
diff --git a/arch/arm/mach-at91/board-gsia18s.c
b/arch/arm/mach-at91/board-gsia18s.c
index bf5cc55..e628c4a 100644
--- a/arch/arm/mach-at91/board-gsia18s.c
+++ b/arch/arm/mach-at91/board-gsia18s.c
@@ -521,7 +521,8 @@ static void gsia18s_power_off(void)
static int __init gsia18s_power_off_init(void)
{
- pm_power_off = gsia18s_power_off;
+ register_power_off_handler_simple(gsia18s_power_off,
+ POWER_OFF_PRIORITY_DEFAULT);
return 0;
}
diff --git a/arch/arm/mach-bcm/board_bcm2835.c
b/arch/arm/mach-bcm/board_bcm2835.c
index 70f2f39..1d75c76 100644
--- a/arch/arm/mach-bcm/board_bcm2835.c
+++ b/arch/arm/mach-bcm/board_bcm2835.c
@@ -111,7 +111,8 @@ static void __init bcm2835_init(void)
bcm2835_setup_restart();
if (wdt_regs)
- pm_power_off = bcm2835_power_off;
+ register_power_off_handler_simple(bcm2835_power_off,
+ POWER_OFF_PRIORITY_FALLBACK);
bcm2835_init_clocks();
diff --git
Re: [PATCH] spi: s3c64xx: add support for exynos7 SPI controller
Hi Mark, On 11/7/14, Mark Brown broo...@kernel.org wrote: On Fri, Nov 07, 2014 at 02:01:57PM +0530, Padma Venkat wrote: CS can also be controlled automatically by setting AUTO_N_MANUAL to 1 in CS_CFG. When it is auto CS automatically toggles between packet to packet. NCS_TIME_COUNT in CS_CFG controls the inactive period. The driver by default uses manual mode. But on exynos7 the manual mode is removed. OK, but what's a packet here? Packet is either 1 byte or 4 bytes size depends on width of the SPI channel. I tested the driver with wm5110 codec. Did you try firmware downloads or something else that generates multiple transfers in a message? Normal register writes will use a single transfer so I'd expect them to just work. OK. I don't have provision to test on this board. I will try to test on older boards by disabling manual mode. Thanks padma -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 3/6] drivers: soc: samsung: Fix a spelling mistake
On Sat, Nov 8, 2014 at 9:26 PM, Pankaj Dubey dubepankaj1...@gmail.com wrote:
Hi Amit,
On 8 November 2014 18:46, Amit Daniel Kachhap amit.dan...@samsung.com wrote:
This patches changes the name of exynos5_list_diable_wfi_wfe to
exynos5_list_disable_wfi_wfe.
Same change I have posted earlier [1] and Kukjin has taken same in his
for-next.
1: http://www.spinics.net/lists/arm-kernel/msg372742.html
ok but this patch is still not visible in linux-next. I will rebase my
v3 patch series against Kukjin for-next
Thanks,
Pankaj Dubey
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
drivers/soc/samsung/exynos-pmu.c |8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/soc/samsung/exynos-pmu.c
b/drivers/soc/samsung/exynos-pmu.c
index 35774e8..3832cda 100644
--- a/drivers/soc/samsung/exynos-pmu.c
+++ b/drivers/soc/samsung/exynos-pmu.c
@@ -361,7 +361,7 @@ static unsigned int const exynos5_list_both_cnt_feed[] =
{
EXYNOS5_TOP_PWR_SYSMEM_OPTION,
};
-static unsigned int const exynos5_list_diable_wfi_wfe[] = {
+static unsigned int const exynos5_list_disable_wfi_wfe[] = {
EXYNOS5_ARM_CORE1_OPTION,
EXYNOS5_FSYS_ARM_OPTION,
EXYNOS5_ISP_ARM_OPTION,
@@ -392,11 +392,11 @@ static void exynos5_powerdown_conf(enum sys_powerdown
mode)
/*
* Disable WFI/WFE on XXX_OPTION
*/
- for (i = 0; i ARRAY_SIZE(exynos5_list_diable_wfi_wfe); i++) {
- tmp = pmu_raw_readl(exynos5_list_diable_wfi_wfe[i]);
+ for (i = 0; i ARRAY_SIZE(exynos5_list_disable_wfi_wfe); i++) {
+ tmp = pmu_raw_readl(exynos5_list_disable_wfi_wfe[i]);
tmp = ~(EXYNOS5_OPTION_USE_STANDBYWFE |
EXYNOS5_OPTION_USE_STANDBYWFI);
- pmu_raw_writel(tmp, exynos5_list_diable_wfi_wfe[i]);
+ pmu_raw_writel(tmp, exynos5_list_disable_wfi_wfe[i]);
}
}
--
1.7.9.5
___
linux-arm-kernel mailing list
linux-arm-ker...@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc
in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 2/6] drivers: soc: Add support for Exynos PMU driver
On Sat, Nov 8, 2014 at 10:45 PM, Pankaj Dubey pankaj.du...@samsung.com wrote: Hi Amit, On 8 November 2014 18:46, Amit Daniel Kachhap amit.dan...@samsung.com wrote: This patch moves Exynos PMU driver implementation from arm/mach-exynos to drivers/soc/samsung. This driver is mainly used for setting misc bits of register from PMU IP of Exynos SoC which will be required to configure before Suspend/Resume. Currently all these settings are done in arch/arm/mach-exynos/pmu.c but moving ahead for ARM64 based SoC support,there is a need of DT based implementation of PMU driver. This driver uses already existing DT binding information. Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com --- arch/arm/mach-exynos/Makefile |2 +- drivers/soc/Kconfig|1 + drivers/soc/Makefile |1 + drivers/soc/samsung/Kconfig| 19 +++ drivers/soc/samsung/Makefile |1 + .../pmu.c = drivers/soc/samsung/exynos-pmu.c |0 6 files changed, 23 insertions(+), 1 deletion(-) create mode 100644 drivers/soc/samsung/Kconfig create mode 100644 drivers/soc/samsung/Makefile rename arch/arm/mach-exynos/pmu.c = drivers/soc/samsung/exynos-pmu.c (100%) diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index bcefb54..b91b382 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile @@ -9,7 +9,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/$(src)/include -I$(srctree) # Core -obj-$(CONFIG_ARCH_EXYNOS) += exynos.o pmu.o exynos-smc.o firmware.o +obj-$(CONFIG_ARCH_EXYNOS) += exynos.o exynos-smc.o firmware.o obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o obj-$(CONFIG_PM_SLEEP) += suspend.o diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig index 76d6bd4..90f33b9 100644 --- a/drivers/soc/Kconfig +++ b/drivers/soc/Kconfig @@ -3,5 +3,6 @@ menu SOC (System On Chip) specific Drivers source drivers/soc/qcom/Kconfig source drivers/soc/ti/Kconfig source drivers/soc/versatile/Kconfig +source drivers/soc/samsung/Kconfig endmenu diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile index 063113d..44d220d 100644 --- a/drivers/soc/Makefile +++ b/drivers/soc/Makefile @@ -6,3 +6,4 @@ obj-$(CONFIG_ARCH_QCOM) += qcom/ obj-$(CONFIG_ARCH_TEGRA) += tegra/ obj-$(CONFIG_SOC_TI) += ti/ obj-$(CONFIG_PLAT_VERSATILE) += versatile/ +obj-$(CONFIG_ARCH_EXYNOS) += samsung/ diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig new file mode 100644 index 000..beb6dfc --- /dev/null +++ b/drivers/soc/samsung/Kconfig @@ -0,0 +1,19 @@ +# +# SAMSUNG SOC drivers +# +menuconfig SOC_SAMSUNG + bool Samsung SOC drivers support + +if SOC_SAMSUNG + +config MFD_EXYNOS_PMU MFD_EXYNOS_PMU? I think it should be only EXYNOS_PMU, as we are moving here in drivers/soc giving reason as it does not fit into MFD. + tristate Support Exynos Power Management Unit I think this config should not be user visible config option, as I remember same was pointed out by Tomasz some times back. I agree to some extent so set its property to default yes. But as this is now a platform driver so I let it visible. + depends on ARM || ARM64 How about only making depends on ARCH_EXYNOS? Right makes sense. Will post v3 with this change. Regards, Amit + default y + help + Exynos SoC have Power Management Unit (PMU) which controls power and + operation state of Exynos SoC in two different ways. This driver + provides implementation of PMU driver and provides basic functionality + required during these operation state. + +endif #SOC_SAMSUNG diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile new file mode 100644 index 000..9d30f61 --- /dev/null +++ b/drivers/soc/samsung/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_MFD_EXYNOS_PMU) += exynos-pmu.o diff --git a/arch/arm/mach-exynos/pmu.c b/drivers/soc/samsung/exynos-pmu.c similarity index 100% rename from arch/arm/mach-exynos/pmu.c rename to drivers/soc/samsung/exynos-pmu.c -- 1.7.9.5 ___ linux-arm-kernel mailing list linux-arm-ker...@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 6/6] drivers: soc: samsung: Add support for Exynos7 pmu
On Sat, Nov 8, 2014 at 11:05 PM, Pankaj Dubey dubepankaj1...@gmail.com wrote:
Hi Amit,
On 8 November 2014 18:46, Amit Daniel Kachhap amit.dan...@samsung.com wrote:
Add PMU settings for exynos7. This is required for future suspend-to-ram,
cpuidle and power domain support.
Note: In this patch some static declarations lines are over 80
characters per line for easy redability.
Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Eunseok Choi es10.c...@samsung.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
.../devicetree/bindings/arm/samsung/pmu.txt|1 +
drivers/soc/samsung/exynos-pmu.c | 425
include/linux/soc/samsung/exynos-regs-pmu.h| 273 +
3 files changed, 699 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.txt
b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
index 1e1979b..67b2113 100644
--- a/Documentation/devicetree/bindings/arm/samsung/pmu.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
@@ -10,6 +10,7 @@ Properties:
- samsung,exynos5260-pmu - for Exynos5260 SoC.
- samsung,exynos5410-pmu - for Exynos5410 SoC,
- samsung,exynos5420-pmu - for Exynos5420 SoC.
+ - samsung,exynos7-pmu - for Exynos7 SoC.
second value must be always syscon.
- reg : offset and length of the register set.
diff --git a/drivers/soc/samsung/exynos-pmu.c
b/drivers/soc/samsung/exynos-pmu.c
index a73c1ea..9416cfd 100644
--- a/drivers/soc/samsung/exynos-pmu.c
+++ b/drivers/soc/samsung/exynos-pmu.c
@@ -11,6 +11,7 @@
#include linux/io.h
#include linux/of.h
+#include linux/of_address.h
#include linux/platform_device.h
#include linux/mfd/core.h
#include linux/soc/samsung/exynos-regs-pmu.h
@@ -46,6 +47,7 @@ struct exynos_pmu_context {
static void __iomem *pmu_base_addr;
static struct exynos_pmu_context *pmu_context;
+extern u32 exynos_get_eint_wake_mask(void);
static inline void pmu_raw_writel(u32 val, u32 offset)
{
@@ -356,6 +358,211 @@ static const struct exynos_pmu_conf
exynos5250_pmu_config[] = {
{ PMU_TABLE_END,},
};
+static const struct exynos_pmu_conf exynos7_pmu_config[] = {
+ /* { .offset = address offset, .val = { AFTR, LPA, SLEEP } } */
Nit: address offset - offset
+ { EXYNOS7_ATLAS_CPU0_SYS_PWR_REG, { 0x0, 0x0,
0x0 } },
+ { EXYNOS7_DIS_IRQ_ATLAS_CPU0_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0 } },
+ { EXYNOS7_DIS_IRQ_ATLAS_CPU0_CENTRAL_SYS_PWR_REG, { 0x0, 0x0,
0x0 } },
+ { EXYNOS7_DIS_IRQ_ATLAS_CPU0_CPUSEQUENCER_SYS_PWR_REG, { 0x0, 0x0,
0x0 } },
+ { EXYNOS7_ATLAS_CPU1_SYS_PWR_REG, { 0x0, 0x0,
0x0 } },
+ { EXYNOS7_DIS_IRQ_ATLAS_CPU1_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0 } },
+ { EXYNOS7_DIS_IRQ_ATLAS_CPU1_CENTRAL_SYS_PWR_REG, { 0x0, 0x0,
0x0 } },
+ { EXYNOS7_DIS_IRQ_ATLAS_CPU1_CPUSEQUENCER_SYS_PWR_REG, { 0x0, 0x0,
0x0 } },
+ { EXYNOS7_ATLAS_CPU2_SYS_PWR_REG, { 0x0, 0x0,
0x0 } },
+ { EXYNOS7_DIS_IRQ_ATLAS_CPU2_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0 } },
+ { EXYNOS7_DIS_IRQ_ATLAS_CPU2_CENTRAL_SYS_PWR_REG, { 0x0, 0x0,
0x0 } },
+ { EXYNOS7_DIS_IRQ_ATLAS_CPU2_CPUSEQUENCER_SYS_PWR_REG, { 0x0, 0x0,
0x0 } },
+ { EXYNOS7_ATLAS_CPU3_SYS_PWR_REG, { 0x0, 0x0,
0x8 } },
+ { EXYNOS7_DIS_IRQ_ATLAS_CPU3_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0 } },
+ { EXYNOS7_DIS_IRQ_ATLAS_CPU3_CENTRAL_SYS_PWR_REG, { 0x0, 0x0,
0x0 } },
+ { EXYNOS7_DIS_IRQ_ATLAS_CPU3_CPUSEQUENCER_SYS_PWR_REG, { 0x0, 0x0,
0x0 } },
+ { EXYNOS7_ATLAS_NONCPU_SYS_PWR_REG, { 0x0, 0x0,
0x0 } },
+ { EXYNOS7_ATLAS_DBG_SYS_PWR_REG,{ 0x0, 0x0,
0x0 } },
+ { EXYNOS7_ATLAS_L2_SYS_PWR_REG, { 0x0, 0x0,
0x0 } },
+ { EXYNOS7_CLKSTOP_CMU_TOP_SYS_PWR_REG, { 0x1, 0x0,
0x0 } },
+ { EXYNOS7_CLKRUN_CMU_TOP_SYS_PWR_REG, { 0x1, 0x0,
0x0 } },
+ { EXYNOS7_RESET_CMU_TOP_SYS_PWR_REG,{ 0x1, 0x0,
0x0 } },
+ { EXYNOS7_RESET_CPUCLKSTOP_SYS_PWR_REG, { 0x1, 0x0,
0x0 } },
+ { EXYNOS7_CLKSTOP_CMU_MIF_SYS_PWR_REG, { 0x1, 0x0,
0x0 } },
+ { EXYNOS7_CLKRUN_CMU_MIF_SYS_PWR_REG, { 0x1, 0x0,
0x0 } },
+ { EXYNOS7_RESET_CMU_MIF_SYS_PWR_REG,{ 0x1, 0x1,
0x0 } },
+ { EXYNOS7_DDRPHY_DLLLOCK_SYS_PWR_REG, { 0x1, 0x1,
0x1 } },
+ { EXYNOS7_DISABLE_PLL_CMU_TOP_SYS_PWR_REG, { 0x1, 0x0,
0x0 } },
+ { EXYNOS7_DISABLE_PLL_CMU_MIF_SYS_PWR_REG,
