Re: [RFC PATCH v3 1/4] drm/exynos: make kms drivers to be independent drivers
On 11/20/2014 03:37 PM, Inki Dae wrote:
On 2014년 11월 20일 23:23, Andrzej Hajda wrote:
On 11/20/2014 02:56 PM, Inki Dae wrote:
On 2014년 11월 20일 22:19, Andrzej Hajda wrote:
On 11/20/2014 11:24 AM, Inki Dae wrote:
This patch makes kms drivers to be independent drivers.
For this, it removes all register codes to kms drivers
from exynos_drm_drv module and adds module_init/exit
for each kms driver so that each kms driver can be
called independently.
Changelog v3:
- Use module_platform_driver macro instead module_init/exit.
- Configure all kms drivers to be built in kernel image.
Changelog v2:
- none
Signed-off-by: Inki Dae inki@samsung.com
---
drivers/gpu/drm/exynos/exynos_dp_core.c |2 ++
drivers/gpu/drm/exynos/exynos_drm_drv.c | 43
+++---
drivers/gpu/drm/exynos/exynos_drm_drv.h |5
drivers/gpu/drm/exynos/exynos_drm_dsi.c |2 ++
drivers/gpu/drm/exynos/exynos_drm_fimd.c |2 ++
drivers/gpu/drm/exynos/exynos_hdmi.c |2 ++
drivers/gpu/drm/exynos/exynos_mixer.c|2 ++
7 files changed, 13 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c
b/drivers/gpu/drm/exynos/exynos_dp_core.c
index ed818b9..30ebf5d 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_core.c
+++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
@@ -1408,6 +1408,8 @@ struct platform_driver dp_driver = {
},
};
+module_platform_driver(dp_driver);
If you try to build exynosdrm as module you will receive errors due to
multiple definitions of init_module, ie module_init/module_*_driver
macros can be used once per module.
Ah, right. we had ever tried same way before but failed in same problem.
I didn't realize that. Anyway, I will try to find out a better way. I'd
really like to remove all register codes of sub drivers from
exynos_drm_drv somehow.
I have proposed once solution with sparse arrays, using linker scripts
[1]. Something similar is used with clock controllers as I remember.
I do not see other possibilities to fully separate components of
exynos_drm_drv.
[1]: http://permalink.gmane.org/gmane.comp.video.dri.devel/103816
I know this patch. I wasn't sure that the use of the private linker
section is reasonable and overuse it. Actually, Mr. Park opposed this
way. It might be a good idea if no problem for device drivers use the
private linker section. Is there any device driver using the private
linker section?
No, there are no dev drivers using it, but it is hardly used anyway.
Quick look at include/asm-generic/vmlinux.lds.h shows following sparse
arrays:
#define CLKSRC_OF_TABLES() OF_TABLE(CONFIG_CLKSRC_OF, clksrc)
#define IRQCHIP_OF_MATCH_TABLE() OF_TABLE(CONFIG_IRQCHIP, irqchip)
#define CLK_OF_TABLES() OF_TABLE(CONFIG_COMMON_CLK, clk)
#define RESERVEDMEM_OF_TABLES() OF_TABLE(CONFIG_OF_RESERVED_MEM,
reservedmem)
#define CPU_METHOD_OF_TABLES() OF_TABLE(CONFIG_SMP, cpu_method)
#define EARLYCON_OF_TABLES()OF_TABLE(CONFIG_SERIAL_EARLYCON, earlycon)
The number of arrays slowly grows over time, so some day they can start
appear in drivers as well :)
Such array in driver doesn't look like much different to me, it is just
a workaround for language limitations,
but it would be good to have an opinion of people more involved in
linker scripts.
On the other side having list of component drivers in exynos_drm_drv and
registering them
in module init maybe is not pretty, but it does the same thing and is
quite clear and standard.
Regards
Andrzej
Thanks,
Inki Dae
Regards
Andrzej
Anyway I am afraid exynosdrm seems to be still fragile to order of
successful probes of their components.
It can be easily observed on the system with two display pipelines with
one of them probe deferring. For example universal with fimd/dpi + vidi:
1. fimd defers probe because panel is not yet probed.
2. vidi probes ok.
3. drmdev is initialized.
4. fimd probes ok, but it is too late!!!
So you can reproduce the scenario on any target when one of the
components defers and vidi is present (vidi never defers I suppose).
Thanks for checking,
Inki Dae
Regards
Andrzej
+
MODULE_AUTHOR(Jingoo Han jg1@samsung.com);
MODULE_DESCRIPTION(Samsung SoC DP Driver);
MODULE_LICENSE(GPL v2);
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c
b/drivers/gpu/drm/exynos/exynos_drm_drv.c
index eab12f0..02d4772 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
@@ -484,12 +484,6 @@ static struct component_match
*exynos_drm_match_add(struct device *dev)
mutex_lock(drm_component_lock);
- /* Do not retry to probe if there is no any kms driver regitered. */
- if (list_empty(drm_component_list)) {
- mutex_unlock(drm_component_lock);
- return ERR_PTR(-ENODEV);
- }
-
list_for_each_entry(cdev, drm_component_list, list) {
/*
* Add components to master only in case that crtc and
@@ -545,22
[PATCH 1/1] thermal: Exynos: Deletion of unnecessary checks before two function calls
From: Markus Elfring elfr...@users.sourceforge.net
Date: Fri, 21 Nov 2014 11:06:33 +0100
The functions cpufreq_cooling_unregister() and thermal_zone_device_unregister()
test whether their argument is NULL and then return immediately.
Thus the test around the call is not needed.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring elfr...@users.sourceforge.net
---
drivers/thermal/samsung/exynos_thermal_common.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_thermal_common.c
b/drivers/thermal/samsung/exynos_thermal_common.c
index 3f5ad25..1cbb9d0 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.c
+++ b/drivers/thermal/samsung/exynos_thermal_common.c
@@ -417,12 +417,10 @@ void exynos_unregister_thermal(struct thermal_sensor_conf
*sensor_conf)
th_zone = sensor_conf-pzone_data;
- if (th_zone-therm_dev)
- thermal_zone_device_unregister(th_zone-therm_dev);
+ thermal_zone_device_unregister(th_zone-therm_dev);
for (i = 0; i th_zone-cool_dev_size; i++) {
- if (th_zone-cool_dev[i])
- cpufreq_cooling_unregister(th_zone-cool_dev[i]);
+ cpufreq_cooling_unregister(th_zone-cool_dev[i]);
}
dev_info(sensor_conf-dev,
--
2.1.3
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Re: [PATCH 1/1] thermal: Exynos: Deletion of unnecessary checks before two function calls
On Fri, 21 Nov 2014, SF Markus Elfring wrote:
From: Markus Elfring elfr...@users.sourceforge.net
Date: Fri, 21 Nov 2014 11:06:33 +0100
The functions cpufreq_cooling_unregister() and
thermal_zone_device_unregister()
test whether their argument is NULL and then return immediately.
Thus the test around the call is not needed.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring elfr...@users.sourceforge.net
---
drivers/thermal/samsung/exynos_thermal_common.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_thermal_common.c
b/drivers/thermal/samsung/exynos_thermal_common.c
index 3f5ad25..1cbb9d0 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.c
+++ b/drivers/thermal/samsung/exynos_thermal_common.c
@@ -417,12 +417,10 @@ void exynos_unregister_thermal(struct
thermal_sensor_conf *sensor_conf)
th_zone = sensor_conf-pzone_data;
- if (th_zone-therm_dev)
- thermal_zone_device_unregister(th_zone-therm_dev);
+ thermal_zone_device_unregister(th_zone-therm_dev);
for (i = 0; i th_zone-cool_dev_size; i++) {
- if (th_zone-cool_dev[i])
- cpufreq_cooling_unregister(th_zone-cool_dev[i]);
+ cpufreq_cooling_unregister(th_zone-cool_dev[i]);
}
Now you have unnecessary {}
julia
dev_info(sensor_conf-dev,
--
2.1.3
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Re: [PATCH v4 1/2] i2c: s3c2410: Handle i2c sys_cfg register in i2c driver
On Friday 21 November 2014 12:55 PM, Wolfram Sang wrote:
On Thu, Oct 30, 2014 at 01:34:29PM +0530, Pankaj Dubey wrote:
Let's handle i2c interrupt re-configuration in i2c driver. This will
help us in removing some soc specific checks from machine files and
will help in removing static iomapping of SYS register in exynos.c
Since only Exynos5250, and Exynos5420 has i2c nodes in DT, added syscon
based phandle to i2c device nodes of respective SoC DT files.
Also handle saving and restoring of SYS_I2C_CFG register during
suspend and resume of i2c driver.
CC: Rob Herring robh...@kernel.org
CC: Randy Dunlap rdun...@infradead.org
CC: Wolfram Sang w...@the-dreams.de
CC: Russell King li...@arm.linux.org.uk
CC: devicet...@vger.kernel.org
CC: linux-...@vger.kernel.org
CC: linux-...@vger.kernel.org
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
---
.../devicetree/bindings/i2c/i2c-s3c2410.txt|1 +
arch/arm/boot/dts/exynos5250.dtsi |4 +++
arch/arm/boot/dts/exynos5420.dtsi |4 +++
I usually don't take DTS patches. They should go via arm-soc. Please say
so if there are reasons I should take them.
I CC'ed to you because same patch contains changes in i2c driver.
I am not very sure via which tree this should go. May be I can ask
samsung SoC maintainer Kukjin to look into this, as patch 2/2 has
changes in mach-exynos which should go via Kukjin's tree.
@@ -1084,6 +1092,23 @@ s3c24xx_i2c_parse_dt(struct device_node *np, struct
s3c24xx_i2c *i2c)
of_property_read_u32(np, samsung,i2c-slave-addr, pdata-slave_addr);
of_property_read_u32(np, samsung,i2c-max-bus-freq,
(u32 *)pdata-frequency);
+ /*
+* Exynos5's legacy i2c controller and new high speed i2c
+* controller have muxed interrupt sources. By default the
+* interrupts for 4-channel HS-I2C controller are enabled.
+* If node for first four channels of legacy i2c controller
s/node/nodes/
OK.
+* are available then re-configure the interrupts via the
+* system register.
+*/
+ id = of_alias_get_id(np, i2c);
+ i2c-sysreg = syscon_regmap_lookup_by_phandle(np,
+ samsung,sysreg-phandle);
+ if (IS_ERR(i2c-sysreg)) {
+ /* As this is not compulsory do not return error */
+ pr_info(i2c-%d skipping re-configuration of interrutps\n, id);
I'd say drop this message. If you want to keep it, it should be dev_dbg.
OK.
+ return;
+ }
+ regmap_update_bits(i2c-sysreg, EXYNOS5_SYS_I2C_CFG, BIT(id), 0);
}
Rest looks good, thanks!
Thanks for review.
Pankaj Dubey
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[PATCH v5 0/2] Move i2c sys_cfg register configuration to i2c driver
This patch series is moving i2c sys_cfg register configuration settings from mach-exynos to i2c driver. It will help in removing soc_is_exynos kind of macro usage from mach-exynos also it will help in removing static mapping of SYS registers. This series is based on latest kgene/for-next. Revision V4 of these patches can related discussion can be found here. http://www.spinics.net/lists/linux-samsung-soc/msg38342.html Changes since v4: - Rebased on latest kgene/for-next (SHA-ID: 7552917ad948acad6c689d49604f93f725145173) - Addressed Wolfram Sang's review comments. Change since v3: - Rebased on latest kgene/for-next (SHA-ID: 2b5fa1d5dabb9af8f2da4f380bea8684f9b96f59) - This series consist of only two patches from v3 [1] (v3[1/6] and v3[2/6]). - Addressed Tomasz Figa and Wolfram Sang's comments. - Updated i2c DT binding information. Changes since v2: - Reorganized patches as suggested by Tomasz Figa. - Addressed review comments of Tomasz Figa in i2c-s3c2410.c file. Changes since v1: - Added patch to move i2c interrupt re-configuration code from exynos.c to i2c driver, as suggested by Arnd. - After above patch only user of SYS_I2C_CFG register is pm.c so moving save/restore of this register also into i2c driver. - Spiltted up exynos4 and exynos5 machine descriptors to get rid from soc_is_exynos4/exynos5 kind of macros, as suggested by Arnd. - Changed location of chipid driver to drivers/soc. - Added drivers/base/soc.c provided infrastructure to make SoC specific information avaible to user space via sysfs entry, as suggested by Arnd. Pankaj Dubey (2): i2c: s3c2410: Handle i2c sys_cfg register in i2c driver ARM: EXYNOS: Remove i2c sys configuration related code .../devicetree/bindings/i2c/i2c-s3c2410.txt|1 + arch/arm/boot/dts/exynos5250.dtsi |4 ++ arch/arm/boot/dts/exynos5420.dtsi |4 ++ arch/arm/mach-exynos/exynos.c | 39 +--- arch/arm/mach-exynos/include/mach/map.h|3 -- arch/arm/mach-exynos/pm.c |3 +- arch/arm/mach-exynos/regs-sys.h| 22 --- arch/arm/mach-exynos/suspend.c |7 drivers/i2c/busses/i2c-s3c2410.c | 29 +++ 9 files changed, 42 insertions(+), 70 deletions(-) delete mode 100644 arch/arm/mach-exynos/regs-sys.h -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v5 1/2] i2c: s3c2410: Handle i2c sys_cfg register in i2c driver
Let's handle i2c interrupt re-configuration in i2c driver. This will
help us in removing some soc specific checks from machine files and
will help in removing static iomapping of SYS register in exynos.c
Since only Exynos5250, and Exynos5420 has i2c nodes in DT, added syscon
based phandle to i2c device nodes of respective SoC DT files.
Also handle saving and restoring of SYS_I2C_CFG register during
suspend and resume of i2c driver.
CC: Rob Herring robh...@kernel.org
CC: Randy Dunlap rdun...@infradead.org
CC: Wolfram Sang w...@the-dreams.de
CC: Russell King li...@arm.linux.org.uk
CC: devicet...@vger.kernel.org
CC: linux-...@vger.kernel.org
CC: linux-...@vger.kernel.org
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
---
.../devicetree/bindings/i2c/i2c-s3c2410.txt|1 +
arch/arm/boot/dts/exynos5250.dtsi |4 +++
arch/arm/boot/dts/exynos5420.dtsi |4 +++
drivers/i2c/busses/i2c-s3c2410.c | 29
4 files changed, 38 insertions(+)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-s3c2410.txt
b/Documentation/devicetree/bindings/i2c/i2c-s3c2410.txt
index 278de8e..89b3250 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-s3c2410.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-s3c2410.txt
@@ -32,6 +32,7 @@ Optional properties:
specified, default value is 0.
- samsung,i2c-max-bus-freq: Desired frequency in Hz of the bus. If not
specified, the default value in Hz is 10.
+ - samsung,sysreg-phandle - handle to syscon used to control the system
registers
Example:
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 0a588b4..d45a07e 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -293,6 +293,7 @@
clock-names = i2c;
pinctrl-names = default;
pinctrl-0 = i2c0_bus;
+ samsung,sysreg-phandle = sysreg_system_controller;
status = disabled;
};
@@ -306,6 +307,7 @@
clock-names = i2c;
pinctrl-names = default;
pinctrl-0 = i2c1_bus;
+ samsung,sysreg-phandle = sysreg_system_controller;
status = disabled;
};
@@ -319,6 +321,7 @@
clock-names = i2c;
pinctrl-names = default;
pinctrl-0 = i2c2_bus;
+ samsung,sysreg-phandle = sysreg_system_controller;
status = disabled;
};
@@ -332,6 +335,7 @@
clock-names = i2c;
pinctrl-names = default;
pinctrl-0 = i2c3_bus;
+ samsung,sysreg-phandle = sysreg_system_controller;
status = disabled;
};
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm/boot/dts/exynos5420.dtsi
index 8617a03..90bf401 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -560,6 +560,7 @@
clock-names = i2c;
pinctrl-names = default;
pinctrl-0 = i2c0_bus;
+ samsung,sysreg-phandle = sysreg_system_controller;
status = disabled;
};
@@ -573,6 +574,7 @@
clock-names = i2c;
pinctrl-names = default;
pinctrl-0 = i2c1_bus;
+ samsung,sysreg-phandle = sysreg_system_controller;
status = disabled;
};
@@ -586,6 +588,7 @@
clock-names = i2c;
pinctrl-names = default;
pinctrl-0 = i2c2_bus;
+ samsung,sysreg-phandle = sysreg_system_controller;
status = disabled;
};
@@ -599,6 +602,7 @@
clock-names = i2c;
pinctrl-names = default;
pinctrl-0 = i2c3_bus;
+ samsung,sysreg-phandle = sysreg_system_controller;
status = disabled;
};
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 6524477..09a6bac 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -35,6 +35,8 @@
#include linux/of.h
#include linux/of_gpio.h
#include linux/pinctrl/consumer.h
+#include linux/mfd/syscon.h
+#include linux/regmap.h
#include asm/irq.h
@@ -87,6 +89,9 @@
/* Max time to wait for bus to become idle after a xfer (in us) */
#define S3C2410_IDLE_TIMEOUT 5000
+/* Exynos5 Sysreg offset */
+#define EXYNOS5_SYS_I2C_CFG0x0234
+
/* i2c controller state */
enum s3c24xx_i2c_state {
STATE_IDLE,
@@ -123,6 +128,8 @@ struct s3c24xx_i2c {
#if defined(CONFIG_ARM_S3C24XX_CPUFREQ)
struct notifier_block freq_transition;
#endif
+ struct regmap *sysreg;
+ unsigned intsys_i2c_cfg;
};
static struct platform_device_id s3c24xx_driver_ids[] = {
@@ -1071,6 +1078,7 @@ static void
s3c24xx_i2c_parse_dt(struct device_node *np,
[PATCH v5 2/2] ARM: EXYNOS: Remove i2c sys configuration related code
As all these code has been moved into i2c driver, now we can
safely remove them from machine files.
CC: Russell King li...@arm.linux.org.uk
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
---
arch/arm/mach-exynos/exynos.c | 39 ++-
arch/arm/mach-exynos/include/mach/map.h |3 ---
arch/arm/mach-exynos/pm.c |3 ++-
arch/arm/mach-exynos/regs-sys.h | 22 -
arch/arm/mach-exynos/suspend.c |7 --
5 files changed, 4 insertions(+), 70 deletions(-)
delete mode 100644 arch/arm/mach-exynos/regs-sys.h
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 8f638ad..69b3887 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -27,20 +27,16 @@
#include asm/mach/map.h
#include asm/memory.h
+#include mach/map.h
+
#include common.h
#include mfc.h
#include regs-pmu.h
-#include regs-sys.h
void __iomem *pmu_base_addr;
static struct map_desc exynos4_iodesc[] __initdata = {
{
- .virtual= (unsigned long)S3C_VA_SYS,
- .pfn= __phys_to_pfn(EXYNOS4_PA_SYSCON),
- .length = SZ_64K,
- .type = MT_DEVICE,
- }, {
.virtual= (unsigned long)S5P_VA_SROMC,
.pfn= __phys_to_pfn(EXYNOS4_PA_SROMC),
.length = SZ_4K,
@@ -70,11 +66,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
static struct map_desc exynos5_iodesc[] __initdata = {
{
- .virtual= (unsigned long)S3C_VA_SYS,
- .pfn= __phys_to_pfn(EXYNOS5_PA_SYSCON),
- .length = SZ_64K,
- .type = MT_DEVICE,
- }, {
.virtual= (unsigned long)S5P_VA_SROMC,
.pfn= __phys_to_pfn(EXYNOS5_PA_SROMC),
.length = SZ_4K,
@@ -235,32 +226,6 @@ static void __init exynos_init_irq(void)
static void __init exynos_dt_machine_init(void)
{
- struct device_node *i2c_np;
- const char *i2c_compat = samsung,s3c2440-i2c;
- unsigned int tmp;
- int id;
-
- /*
-* Exynos5's legacy i2c controller and new high speed i2c
-* controller have muxed interrupt sources. By default the
-* interrupts for 4-channel HS-I2C controller are enabled.
-* If node for first four channels of legacy i2c controller
-* are available then re-configure the interrupts via the
-* system register.
-*/
- if (soc_is_exynos5()) {
- for_each_compatible_node(i2c_np, NULL, i2c_compat) {
- if (of_device_is_available(i2c_np)) {
- id = of_alias_get_id(i2c_np, i2c);
- if (id 4) {
- tmp = readl(EXYNOS5_SYS_I2C_CFG);
- writel(tmp ~(0x1 id),
- EXYNOS5_SYS_I2C_CFG);
- }
- }
- }
- }
-
/*
* This is called from smp_prepare_cpus if we've built for SMP, but
* we still need to set it up for PM and firmware ops if not.
diff --git a/arch/arm/mach-exynos/include/mach/map.h
b/arch/arm/mach-exynos/include/mach/map.h
index 1ad3f49..de3ae59 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -24,9 +24,6 @@
#define EXYNOS_PA_CHIPID 0x1000
-#define EXYNOS4_PA_SYSCON 0x1001
-#define EXYNOS5_PA_SYSCON 0x10050100
-
#define EXYNOS4_PA_CMU 0x1003
#define EXYNOS5_PA_CMU 0x1001
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 86f3ecd..dfc8594 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -23,12 +23,13 @@
#include asm/smp_scu.h
#include asm/suspend.h
+#include mach/map.h
+
#include plat/pm-common.h
#include common.h
#include exynos-pmu.h
#include regs-pmu.h
-#include regs-sys.h
static inline void __iomem *exynos_boot_vector_addr(void)
{
diff --git a/arch/arm/mach-exynos/regs-sys.h b/arch/arm/mach-exynos/regs-sys.h
deleted file mode 100644
index 84332b0..000
--- a/arch/arm/mach-exynos/regs-sys.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * Copyright (c) 2014 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * EXYNOS - system register definition
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_REGS_SYS_H
-#define __ASM_ARCH_REGS_SYS_H __FILE__
-
-#include mach/map.h
-
-#define S5P_SYSREG(x) (S3C_VA_SYS + (x))
Re: [PATCH v5 1/2] clk: samsung: exynos5440: move restart code into clock driver
Hi Kukjin,
On Thursday 20 November 2014 11:18 PM, Sylwester Nawrocki wrote:
On 19/11/14 04:37, Pankaj Dubey wrote:
+static int exynos5440_clk_restart_notify(struct notifier_block *this,
+ unsigned long code, void *unused)
+{
+ u32 val, status;
+
+ status = readl_relaxed(reg_base + 0xbc);
+ val = readl_relaxed(reg_base + 0xcc);
+ val = (val 0x) | (status 0x);
+ writel_relaxed(val, reg_base + 0xcc);
Can we have macro definitions for these 0xcc, 0xbc address offsets ?
I must say I couldn't find them documented in any Exynos datasheet I've
got though.
I also wished this, but I could not find them documented.
So I tried to keep logic of original code as it is, just changed location.
I would also like to mention that I have not tested this on exynos5440 as I
do not have
one with me. I believe if it was working at its original place in
exynos_restart it should work
here also. Other patch (2/2) I have verified on Exynos3250 board and its
working well.
I think it's best to merge both patches in that series through
the arm-soc tree, since applying them not in order may cause some
breakage. Thus I'd let Kukjin take this patch set into his tree.
For both patches:
Acked-by: Sylwester Nawrocki s.nawro...@samsung.com
Will you please take this series into your tree.
Thanks,
Pankaj Dubey
--
Thanks,
Sylwester
--
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Re: [RFC PATCH 1/1] drm/exynos: Move platform drivers registration to module init
Hello Inki, On 11/20/2014 06:01 PM, Inki Dae wrote: Ah, sorry. There was my misunderstanding. drm-next already is merged to linux-next so I think we can do the integration test if exynos-drm-next is merged to drm-next earlier. Anyway, I will try to consider your opinion. Cool, having exynos-drm-next in linux-next will be very useful indeed. BTW, I didn't have time to forward port $subject yesterday but Gustavo did and posted a series [0] that supersedes $subjects and also solves other issues. It would be great if you can take a loot to those patches. Best regards, Javier [0]: http://www.spinics.net/lists/linux-samsung-soc/msg39306.html -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 1/1] drm/exynos: Move platform drivers registration to module init
Am 21.11.2014 um 00:49 schrieb Paolo Pisati: vanilla kgene/for-next as of today: 7552917 Revert ARM: exynos_defconfig: Enable options for display panel support ff0391a Merge branch 'v3.19-samsung-defconfig' into for-next 26c6283 Merge branch 'v3.18-samsung-fixes' into for-next cf864fd Merge branch 'v3.18-samsung-defconfig' into for-next 98b6380 ARM: exynos_defconfig: Enable max77802 rtc and clock drivers 839275c ARM: exynos_defconfig: Use 16 minors per MMC block device 0526f27 ARM: dts: Explicitly set dr_mode on exynos5250-snow fc14f9c Linux 3.18-rc5 ... plus 5e1e068 arm: dts: Exynos5: Use pmu_system_controller phandle for dp phy 36d908e drm/exynos: dp: Remove support for unused dptx-phy 624bff2 POSTED: mfd: syscon: Decouple syscon interface from syscon devices 68944e3 Revert Revert ARM: exynos_defconfig: Enable options for display panel support vanilla exynos_defconfig with SND_SOC_SNOW disabled. I should probably try linux-next at this point, but i wonder if people who reported kgene/for-next working were testing with a vanilla exynos_defconfig on a peach pi. On Spring, I am able to boot my kgene/for-next based queue with just: mfd: syscon: Decouple syscon interface from platform devices arm: dts: Exynos5: Use pmu_system_controller phandle for dp phy with DRM_EXYNOS*=y (except IOMMU) and SND_SOC_SNOW=m enabled in the config, while using simplefb rather than the Exynos DRM and thus clk_ignore_unused. Regarding SND_SOC_SNOW: Note that I recently submitted a patch to enable module-loading, which is missing in kgene/for-next and -rc5 but is in linux-next.git - it might uncover problems that previously went unnoticed: https://patchwork.kernel.org/patch/5235951/ exynos_defconfig has SND_SOC_SNOW=y, whereas multi_v7_defconfig doesn't have it. Regards, Andreas -- SUSE LINUX GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 21284 AG Nürnberg -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Peach Pi/Pit boot failures in linux-next (was Re: [RFC PATCH 1/1] drm/exynos: Move platform drivers registration to module init)
[adding Kukjin as cc and dropping dri-devel] Hello Kevin, On 11/20/2014 07:22 PM, Kevin Hilman wrote: My kernel command line is almost the same with the difference that I'm using clk_ignore_unused and I just checked that not passing that parameter, makes linux-next to hang showing the same output log that Kevin reported. Ah! Good find. I confirm that adding clk_ignore_unused is getting me booting again, but of course that is just masking a problem, so I hope someone can shed light on which clock isn't being correctly managed. True, I'm renaming the thread subject to track these issues separately of the original Exynos DRM bug since these are unrelated. So, I see two different boot failures on the Peach Pi[t] Chromebooks: 1) next20141121 boot fails due snd-soc-snow Disabling CONFIG_SND_SOC_SNOW makes the boot to got a little further but still fails with the second issue: 2) next20141121 boot hangs if unused clocks are disabled. I tried to root cause these two issues but didn't see anything evident so I'll find a last known good commit and bisect. If anyone has an idea of the possible causes for these issues that would be appreciated. Might I also suggest that folks have their default command-line to *not* use clk_ignore_unused, since it's primary job is to workaround clock bugs. Agreed, I disabled now as well to catch regressions early. I carried those parameters from Snow since I needed clk_ignore_unused to have simplefb working on that machine. Kevin Best regards, Javier -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v12 0/6] cpufreq: use generic cpufreq drivers for exynos platforms
Changes since v11: - Rebased on top of git://linuxtv.org/snawrocki/samsung.git for-v3.19-exynos-clk This patch series removes the use of Exynos4210 and Exynos5250 specific cpufreq drivers and enables the use of cpufreq-dt driver for these platforms. This series also enables cpufreq support for Exynos5420 using arm_big_little cpufreq driver. This series is based on the following branch. git://linuxtv.org/snawrocki/samsung.git for-v3.19-exynos-clk This series depends on the following patch which can be picked from git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git samsung/dt e540920cf21c (ARM: dts: add CPU nodes for Exynos4 SoCs). This patch series has been tested on Exynos4210/5250/5420 based boards. Tomasz Figa had plans to take this in the Samsung clock tree for v3.19 (http://www.spinics.net/lists/linux-samsung-soc/msg37933.html). Sylwester, could you consider to merge this in your tree? Thomas Abraham (6): clk: samsung: add infrastructure to register cpu clocks clk: samsung: add cpu clock configuration data and instantiate cpu clock ARM: dts: Exynos: add CPU OPP and regulator supply property ARM: Exynos: switch to using generic cpufreq driver for Exynos4210/5250/5420 cpufreq: exynos: remove exynos4210/5250 specific cpufreq driver support clk: samsung: remove unused clock aliases and update clock flags arch/arm/boot/dts/exynos4210-origen.dts |4 + arch/arm/boot/dts/exynos4210-trats.dts |4 + arch/arm/boot/dts/exynos4210-universal_c210.dts |4 + arch/arm/boot/dts/exynos4210.dtsi | 14 ++- arch/arm/boot/dts/exynos5250-arndale.dts|4 + arch/arm/boot/dts/exynos5250-smdk5250.dts |4 + arch/arm/boot/dts/exynos5250-snow.dts |4 + arch/arm/boot/dts/exynos5250.dtsi | 25 +++- arch/arm/boot/dts/exynos5420.dtsi | 38 arch/arm/mach-exynos/exynos.c | 26 +++- drivers/clk/samsung/Makefile|2 +- drivers/clk/samsung/clk-exynos4.c | 63 +--- drivers/clk/samsung/clk-exynos5250.c| 44 - drivers/clk/samsung/clk-exynos5420.c| 72 +++- drivers/cpufreq/Kconfig.arm | 22 --- drivers/cpufreq/Makefile|2 - drivers/cpufreq/exynos4210-cpufreq.c| 184 drivers/cpufreq/exynos5250-cpufreq.c| 210 --- include/dt-bindings/clock/exynos5250.h |1 + include/dt-bindings/clock/exynos5420.h |2 + 20 files changed, 266 insertions(+), 463 deletions(-) delete mode 100644 drivers/cpufreq/exynos4210-cpufreq.c delete mode 100644 drivers/cpufreq/exynos5250-cpufreq.c -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v12 1/6] clk: samsung: add infrastructure to register cpu clocks
The CPU clock provider supplies the clock to the CPU clock domain. The
composition and organization of the CPU clock provider could vary among
Exynos SoCs. A CPU clock provider can be composed of clock mux, dividers
and gates. This patch defines a new clock type for CPU clock provider and
adds infrastructure to register the CPU clock providers for Samsung
platforms.
Signed-off-by: Thomas Abraham thomas...@samsung.com
Reviewed-by: Tomasz Figa tomasz.f...@gmail.com
Acked-by: Mike Turquette mturque...@linaro.org
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Chander Kashyap k.chan...@samsung.com
---
drivers/clk/samsung/Makefile |2 +-
drivers/clk/samsung/clk-cpu.c | 335 +
drivers/clk/samsung/clk-cpu.h | 91 +++
3 files changed, 427 insertions(+), 1 deletions(-)
create mode 100644 drivers/clk/samsung/clk-cpu.c
create mode 100644 drivers/clk/samsung/clk-cpu.h
diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile
index 006c6f2..04acd70 100644
--- a/drivers/clk/samsung/Makefile
+++ b/drivers/clk/samsung/Makefile
@@ -2,7 +2,7 @@
# Samsung Clock specific Makefile
#
-obj-$(CONFIG_COMMON_CLK) += clk.o clk-pll.o
+obj-$(CONFIG_COMMON_CLK) += clk.o clk-pll.o clk-cpu.o
obj-$(CONFIG_SOC_EXYNOS3250) += clk-exynos3250.o
obj-$(CONFIG_ARCH_EXYNOS4) += clk-exynos4.o
obj-$(CONFIG_SOC_EXYNOS4415) += clk-exynos4415.o
diff --git a/drivers/clk/samsung/clk-cpu.c b/drivers/clk/samsung/clk-cpu.c
new file mode 100644
index 000..009a21b
--- /dev/null
+++ b/drivers/clk/samsung/clk-cpu.c
@@ -0,0 +1,335 @@
+/*
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * Author: Thomas Abraham thomas...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This file contains the utility function to register CPU clock for Samsung
+ * Exynos platforms. A CPU clock is defined as a clock supplied to a CPU or a
+ * group of CPUs. The CPU clock is typically derived from a hierarchy of clock
+ * blocks which includes mux and divider blocks. There are a number of other
+ * auxiliary clocks supplied to the CPU domain such as the debug blocks and AXI
+ * clock for CPU domain. The rates of these auxiliary clocks are related to the
+ * CPU clock rate and this relation is usually specified in the hardware manual
+ * of the SoC or supplied after the SoC characterization.
+ *
+ * The below implementation of the CPU clock allows the rate changes of the CPU
+ * clock and the corresponding rate changes of the auxillary clocks of the CPU
+ * domain. The platform clock driver provides a clock register configuration
+ * for each configurable rate which is then used to program the clock hardware
+ * registers to acheive a fast co-oridinated rate change for all the CPU domain
+ * clocks.
+ *
+ * On a rate change request for the CPU clock, the rate change is propagated
+ * upto the PLL supplying the clock to the CPU domain clock blocks. While the
+ * CPU domain PLL is reconfigured, the CPU domain clocks are driven using an
+ * alternate clock source. If required, the alternate clock source is divided
+ * down in order to keep the output clock rate within the previous OPP limits.
+*/
+
+#include linux/errno.h
+#include clk-cpu.h
+
+#define E4210_SRC_CPU 0x0
+#define E4210_STAT_CPU 0x200
+#define E4210_DIV_CPU0 0x300
+#define E4210_DIV_CPU1 0x304
+#define E4210_DIV_STAT_CPU00x400
+#define E4210_DIV_STAT_CPU10x404
+
+#define E4210_DIV0_RATIO0_MASK 0x7
+#define E4210_DIV1_HPM_MASK(0x7 4)
+#define E4210_DIV1_COPY_MASK (0x7 0)
+#define E4210_MUX_HPM_MASK (1 20)
+#define E4210_DIV0_ATB_SHIFT 16
+#define E4210_DIV0_ATB_MASK(DIV_MASK E4210_DIV0_ATB_SHIFT)
+
+#define MAX_DIV8
+#define DIV_MASK 7
+#define DIV_MASK_ALL 0x
+#define MUX_MASK 7
+
+/*
+ * Helper function to wait until divider(s) have stabilized after the divider
+ * value has changed.
+ */
+static void wait_until_divider_stable(void __iomem *div_reg, unsigned long
mask)
+{
+ unsigned long timeout = jiffies + msecs_to_jiffies(10);
+
+ do {
+ if (!(readl(div_reg) mask))
+ return;
+ } while (time_before(jiffies, timeout));
+
+ pr_err(%s: timeout in divider stablization\n, __func__);
+}
+
+/*
+ * Helper function to wait until mux has stabilized after the mux selection
+ * value was changed.
+ */
+static void wait_until_mux_stable(void __iomem *mux_reg, u32 mux_pos,
+ unsigned long mux_value)
+{
+ unsigned long timeout = jiffies + msecs_to_jiffies(10);
+
+ do {
+ if (((readl(mux_reg) mux_pos) MUX_MASK) == mux_value)
+ return;
+ } while
[PATCH v12 2/6] clk: samsung: add cpu clock configuration data and instantiate cpu clock
With the addition of the new Samsung specific cpu-clock type, the
arm clock can be represented as a cpu-clock type. Add the CPU clock
configuration data and instantiate the CPU clock type for Exynos4210,
Exynos5250 and Exynos5420.
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Thomas Abraham thomas...@samsung.com
Acked-by: Mike Turquette mturque...@linaro.org
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Chander Kashyap k.chan...@samsung.com
---
drivers/clk/samsung/clk-exynos4.c | 15 ++
drivers/clk/samsung/clk-exynos5250.c | 25 +
drivers/clk/samsung/clk-exynos5420.c | 45
include/dt-bindings/clock/exynos5250.h |1 +
include/dt-bindings/clock/exynos5420.h |2 +
5 files changed, 88 insertions(+), 0 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos4.c
b/drivers/clk/samsung/clk-exynos4.c
index 940f028..9af5767 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -19,6 +19,7 @@
#include linux/syscore_ops.h
#include clk.h
+#include clk-cpu.h
/* Exynos4 clock controller register offsets */
#define SRC_LEFTBUS0x4200
@@ -1354,6 +1355,16 @@ static struct samsung_pll_clock exynos4x12_plls[nr_plls]
__initdata = {
VPLL_LOCK, VPLL_CON0, NULL),
};
+static const struct exynos_cpuclk_cfg_data e4210_armclk_d[] __initconst = {
+ { 120, E4210_CPU_DIV0(7, 1, 4, 3, 7, 3), E4210_CPU_DIV1(0, 5), },
+ { 100, E4210_CPU_DIV0(7, 1, 4, 3, 7, 3), E4210_CPU_DIV1(0, 4), },
+ { 80, E4210_CPU_DIV0(7, 1, 3, 3, 7, 3), E4210_CPU_DIV1(0, 3), },
+ { 50, E4210_CPU_DIV0(7, 1, 3, 3, 7, 3), E4210_CPU_DIV1(0, 3), },
+ { 40, E4210_CPU_DIV0(7, 1, 3, 3, 7, 3), E4210_CPU_DIV1(0, 3), },
+ { 20, E4210_CPU_DIV0(0, 1, 1, 1, 3, 1), E4210_CPU_DIV1(0, 3), },
+ { 0 },
+};
+
static void __init exynos4_core_down_clock(enum exynos4_soc soc)
{
unsigned int tmp;
@@ -1457,6 +1468,10 @@ static void __init exynos4_clk_init(struct device_node
*np,
samsung_clk_register_fixed_factor(ctx,
exynos4210_fixed_factor_clks,
ARRAY_SIZE(exynos4210_fixed_factor_clks));
+ exynos_register_cpu_clock(ctx, CLK_ARM_CLK, armclk,
+ mout_core_p4210[0], mout_core_p4210[1], 0x14200,
+ e4210_armclk_d, ARRAY_SIZE(e4210_armclk_d),
+ CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1);
} else {
samsung_clk_register_mux(ctx, exynos4x12_mux_clks,
ARRAY_SIZE(exynos4x12_mux_clks));
diff --git a/drivers/clk/samsung/clk-exynos5250.c
b/drivers/clk/samsung/clk-exynos5250.c
index 70ec3d2..e19e365 100644
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c
@@ -19,6 +19,7 @@
#include linux/syscore_ops.h
#include clk.h
+#include clk-cpu.h
#define APLL_LOCK 0x0
#define APLL_CON0 0x100
@@ -748,6 +749,26 @@ static struct samsung_pll_clock exynos5250_plls[nr_plls]
__initdata = {
VPLL_LOCK, VPLL_CON0, NULL),
};
+static const struct exynos_cpuclk_cfg_data exynos5250_armclk_d[] __initconst =
{
+ { 170, E5250_CPU_DIV0(5, 3, 7, 7, 7, 3), E5250_CPU_DIV1(2, 0), },
+ { 160, E5250_CPU_DIV0(4, 1, 7, 7, 7, 3), E5250_CPU_DIV1(2, 0), },
+ { 150, E5250_CPU_DIV0(4, 1, 7, 7, 7, 2), E5250_CPU_DIV1(2, 0), },
+ { 140, E5250_CPU_DIV0(4, 1, 6, 7, 7, 2), E5250_CPU_DIV1(2, 0), },
+ { 130, E5250_CPU_DIV0(3, 1, 6, 7, 7, 2), E5250_CPU_DIV1(2, 0), },
+ { 120, E5250_CPU_DIV0(3, 1, 5, 7, 7, 2), E5250_CPU_DIV1(2, 0), },
+ { 110, E5250_CPU_DIV0(3, 1, 5, 7, 7, 3), E5250_CPU_DIV1(2, 0), },
+ { 100, E5250_CPU_DIV0(2, 1, 4, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+ { 90, E5250_CPU_DIV0(2, 1, 4, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+ { 80, E5250_CPU_DIV0(2, 1, 4, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+ { 70, E5250_CPU_DIV0(1, 1, 3, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+ { 60, E5250_CPU_DIV0(1, 1, 3, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+ { 50, E5250_CPU_DIV0(1, 1, 2, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+ { 40, E5250_CPU_DIV0(1, 1, 2, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+ { 30, E5250_CPU_DIV0(1, 1, 1, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+ { 20, E5250_CPU_DIV0(1, 1, 1, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+ { 0 },
+};
+
static const struct of_device_id ext_clk_match[] __initconst = {
{ .compatible = samsung,clock-xxti, .data = (void *)0, },
{ },
@@ -797,6 +818,10 @@ static void __init exynos5250_clk_init(struct device_node
*np)
ARRAY_SIZE(exynos5250_div_clks));
samsung_clk_register_gate(ctx, exynos5250_gate_clks,
ARRAY_SIZE(exynos5250_gate_clks));
+
[PATCH v12 3/6] ARM: dts: Exynos: add CPU OPP and regulator supply property
For Exynos 4210/5250/5420 based platforms, add CPU operating points and CPU
regulator supply properties for migrating from Exynos specific cpufreq driver
to using generic cpufreq drivers.
Cc: Kukjin Kim kgene@samsung.com
Cc: Doug Anderson diand...@chromium.org
Cc: Javier Martinez Canillas javier.marti...@collabora.co.uk
Cc: Andreas Faerber afaer...@suse.de
Cc: Sachin Kamat sachin.ka...@linaro.org
Signed-off-by: Thomas Abraham thomas...@samsung.com
Reviewed-by: Andreas Farber afaer...@suse.de
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Chander Kashyap k.chan...@samsung.com
---
arch/arm/boot/dts/exynos4210-origen.dts |4 ++
arch/arm/boot/dts/exynos4210-trats.dts |4 ++
arch/arm/boot/dts/exynos4210-universal_c210.dts |4 ++
arch/arm/boot/dts/exynos4210.dtsi | 14 -
arch/arm/boot/dts/exynos5250-arndale.dts|4 ++
arch/arm/boot/dts/exynos5250-smdk5250.dts |4 ++
arch/arm/boot/dts/exynos5250-snow.dts |4 ++
arch/arm/boot/dts/exynos5250.dtsi | 25 ++-
arch/arm/boot/dts/exynos5420.dtsi | 38 +++
9 files changed, 99 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts
b/arch/arm/boot/dts/exynos4210-origen.dts
index f767c42..887dded 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -334,3 +334,7 @@
};
};
};
+
+cpu0 {
+ cpu0-supply = buck1_reg;
+};
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts
b/arch/arm/boot/dts/exynos4210-trats.dts
index f516da9..66119dd 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -446,3 +446,7 @@
};
};
};
+
+cpu0 {
+ cpu0-supply = varm_breg;
+};
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts
b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index d50eb3a..bf0a39c 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -492,3 +492,7 @@
mdma1 {
reg = 0x1284 0x1000;
};
+
+cpu0 {
+ cpu0-supply = vdd_arm_reg;
+};
diff --git a/arch/arm/boot/dts/exynos4210.dtsi
b/arch/arm/boot/dts/exynos4210.dtsi
index bcc9e63..69bac07 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -35,10 +35,22 @@
#address-cells = 1;
#size-cells = 0;
- cpu@900 {
+ cpu0: cpu@900 {
device_type = cpu;
compatible = arm,cortex-a9;
reg = 0x900;
+ clocks = clock CLK_ARM_CLK;
+ clock-names = cpu;
+ clock-latency = 16;
+
+ operating-points =
+ 120 125
+ 100 115
+ 80 1075000
+ 50 975000
+ 40 975000
+ 20 95
+ ;
};
cpu@901 {
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
b/arch/arm/boot/dts/exynos5250-arndale.dts
index 3acd97e..da2b3e1 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -563,3 +563,7 @@
};
};
};
+
+cpu0 {
+ cpu0-supply = buck2_reg;
+};
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts
b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 6a0f4c0..0eedb88 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -406,3 +406,7 @@
};
};
};
+
+cpu0 {
+ cpu0-supply = buck2_reg;
+};
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts
b/arch/arm/boot/dts/exynos5250-snow.dts
index e51fcef..865f68a 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -345,6 +345,10 @@
};
};
+cpu0 {
+ cpu0-supply = buck2_reg;
+};
+
i2c_0 {
status = okay;
samsung,i2c-sda-delay = 100;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index f21b9aa..d4b418e 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -58,11 +58,34 @@
#address-cells = 1;
#size-cells = 0;
- cpu@0 {
+ cpu0: cpu@0 {
device_type = cpu;
compatible = arm,cortex-a15;
reg = 0;
clock-frequency = 17;
+
+ clocks = clock CLK_ARM_CLK;
+ clock-names = cpu;
+ clock-latency = 14;
+
+ operating-points =
+
[PATCH v12 4/6] ARM: Exynos: switch to using generic cpufreq driver for Exynos4210/5250/5420
The new CPU clock type allows the use of generic CPUfreq drivers. So for
Exynos4210/5250, switch to using generic cpufreq driver. For Exynos5420,
which did not have CPUfreq driver support, enable the use of generic
CPUfreq driver.
Suggested-by: Tomasz Figa tomasz.f...@gmail.com
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Thomas Abraham thomas...@samsung.com
Reviewed-by: Tomasz Figa tomasz.f...@gmail.com
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Chander Kashyap k.chan...@samsung.com
---
arch/arm/mach-exynos/exynos.c | 26 +-
1 files changed, 25 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 6b283eb..402a2ae 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -282,6 +282,30 @@ static void __init exynos_init_irq(void)
exynos_map_pmu();
}
+static const struct of_device_id exynos_cpufreq_matches[] = {
+ { .compatible = samsung,exynos5420, .data = arm-bL-cpufreq-dt },
+ { .compatible = samsung,exynos5422, .data = arm-bL-cpufreq-dt },
+ { .compatible = samsung,exynos5800, .data = arm-bL-cpufreq-dt },
+ { .compatible = samsung,exynos5250, .data = cpufreq-dt },
+ { .compatible = samsung,exynos4210, .data = cpufreq-dt },
+ { .compatible = samsung,exynos5440, .data = exynos5440-cpufreq },
+ { /* sentinel */ }
+};
+
+static void __init exynos_cpufreq_init(void)
+{
+ struct device_node *root = of_find_node_by_path(/);
+ const struct of_device_id *match;
+
+ match = of_match_node(exynos_cpufreq_matches, root);
+ if (!match) {
+ platform_device_register_simple(exynos-cpufreq, -1, NULL, 0);
+ return;
+ }
+
+ platform_device_register_simple(match-data, -1, NULL, 0);
+}
+
static void __init exynos_dt_machine_init(void)
{
struct device_node *i2c_np;
@@ -321,7 +345,7 @@ static void __init exynos_dt_machine_init(void)
of_machine_is_compatible(samsung,exynos5250))
platform_device_register(exynos_cpuidle);
- platform_device_register_simple(exynos-cpufreq, -1, NULL, 0);
+ exynos_cpufreq_init();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
--
1.6.6.rc2
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[GIT PULL 1/2] Samsung fixes for v3.18
The following changes since commit fc14f9c1272f62c3e8d01300f52467c0d9af50f9: Linux 3.18-rc5 (2014-11-16 16:36:20 -0800) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-fixes-v3.18 for you to fetch changes up to 0526f276f94758245ac5886604fe8c805c1b6d2c: ARM: dts: Explicitly set dr_mode on exynos5250-snow (2014-11-19 16:52:15 +0900) Samsung fixes for v3.18 - explicitly set dr_mode on exynos5250-snow this is required when kernel is built with USB gadget support. Sjoerd Simons (1): ARM: dts: Explicitly set dr_mode on exynos5250-snow arch/arm/boot/dts/exynos5250-snow.dts | 4 arch/arm/boot/dts/exynos5250.dtsi | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[GIT PULL 2/2] Samsung defconfig update for v3.18
The following changes since commit 0df1f2487d2f0d04703f142813d53615d62a1da4: Linux 3.18-rc3 (2014-11-02 15:01:51 -0800) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-defconfig-v3.18 for you to fetch changes up to 0788148935c3a0fae3cca6af72943b9628bf8a54: ARM: exynos_defconfig: Enable max77802 rtc and clock drivers (2014-11-21 21:46:21 +0900) Samsung defconfig update for v3.18 - enable max77802 rtc and clock drivers for exynos_defconfig : enable the kernel config options to have the drivers for max77802 including rtc and 2-ch 32kHz clock outputs Javier Martinez Canillas (1): ARM: exynos_defconfig: Enable max77802 rtc and clock drivers arch/arm/configs/exynos_defconfig | 2 ++ 1 file changed, 2 insertions(+) -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v12 5/6] cpufreq: exynos: remove exynos4210/5250 specific cpufreq driver support
Exynos4210 and Exynos5250 based platforms have switched over to use generic
cpufreq drivers for cpufreq functionality. So the Exynos specific cpufreq
drivers for these platforms can be removed.
Cc: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Signed-off-by: Thomas Abraham thomas...@samsung.com
Acked-by: Viresh Kumar viresh.ku...@linaro.org
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Chander Kashyap k.chan...@samsung.com
---
drivers/cpufreq/Kconfig.arm | 22
drivers/cpufreq/Makefile |2 -
drivers/cpufreq/exynos4210-cpufreq.c | 184 -
drivers/cpufreq/exynos5250-cpufreq.c | 210 --
4 files changed, 0 insertions(+), 418 deletions(-)
delete mode 100644 drivers/cpufreq/exynos4210-cpufreq.c
delete mode 100644 drivers/cpufreq/exynos5250-cpufreq.c
diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 83a75dc..701f5ca 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -28,17 +28,6 @@ config ARM_VEXPRESS_SPC_CPUFREQ
config ARM_EXYNOS_CPUFREQ
bool
-config ARM_EXYNOS4210_CPUFREQ
- bool SAMSUNG EXYNOS4210
- depends on CPU_EXYNOS4210
- default y
- select ARM_EXYNOS_CPUFREQ
- help
- This adds the CPUFreq driver for Samsung EXYNOS4210
- SoC (S5PV310 or S5PC210).
-
- If in doubt, say N.
-
config ARM_EXYNOS4X12_CPUFREQ
bool SAMSUNG EXYNOS4x12
depends on SOC_EXYNOS4212 || SOC_EXYNOS4412
@@ -50,17 +39,6 @@ config ARM_EXYNOS4X12_CPUFREQ
If in doubt, say N.
-config ARM_EXYNOS5250_CPUFREQ
- bool SAMSUNG EXYNOS5250
- depends on SOC_EXYNOS5250
- default y
- select ARM_EXYNOS_CPUFREQ
- help
- This adds the CPUFreq driver for Samsung EXYNOS5250
- SoC.
-
- If in doubt, say N.
-
config ARM_EXYNOS5440_CPUFREQ
bool SAMSUNG EXYNOS5440
depends on SOC_EXYNOS5440
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index 40c53dc..74e55f9 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -52,9 +52,7 @@ obj-$(CONFIG_ARM_DT_BL_CPUFREQ) +=
arm_big_little_dt.o
obj-$(CONFIG_ARCH_DAVINCI) += davinci-cpufreq.o
obj-$(CONFIG_UX500_SOC_DB8500) += dbx500-cpufreq.o
obj-$(CONFIG_ARM_EXYNOS_CPUFREQ) += exynos-cpufreq.o
-obj-$(CONFIG_ARM_EXYNOS4210_CPUFREQ) += exynos4210-cpufreq.o
obj-$(CONFIG_ARM_EXYNOS4X12_CPUFREQ) += exynos4x12-cpufreq.o
-obj-$(CONFIG_ARM_EXYNOS5250_CPUFREQ) += exynos5250-cpufreq.o
obj-$(CONFIG_ARM_EXYNOS5440_CPUFREQ) += exynos5440-cpufreq.o
obj-$(CONFIG_ARM_HIGHBANK_CPUFREQ) += highbank-cpufreq.o
obj-$(CONFIG_ARM_IMX6Q_CPUFREQ)+= imx6q-cpufreq.o
diff --git a/drivers/cpufreq/exynos4210-cpufreq.c
b/drivers/cpufreq/exynos4210-cpufreq.c
deleted file mode 100644
index 843ec82..000
--- a/drivers/cpufreq/exynos4210-cpufreq.c
+++ /dev/null
@@ -1,184 +0,0 @@
-/*
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * EXYNOS4210 - CPU frequency scaling support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include linux/module.h
-#include linux/kernel.h
-#include linux/err.h
-#include linux/clk.h
-#include linux/io.h
-#include linux/slab.h
-#include linux/cpufreq.h
-#include linux/of.h
-#include linux/of_address.h
-
-#include exynos-cpufreq.h
-
-static struct clk *cpu_clk;
-static struct clk *moutcore;
-static struct clk *mout_mpll;
-static struct clk *mout_apll;
-static struct exynos_dvfs_info *cpufreq;
-
-static unsigned int exynos4210_volt_table[] = {
- 125, 115, 105, 975000, 95,
-};
-
-static struct cpufreq_frequency_table exynos4210_freq_table[] = {
- {0, L0, 1200 * 1000},
- {0, L1, 1000 * 1000},
- {0, L2, 800 * 1000},
- {0, L3, 500 * 1000},
- {0, L4, 200 * 1000},
- {0, 0, CPUFREQ_TABLE_END},
-};
-
-static struct apll_freq apll_freq_4210[] = {
- /*
-* values:
-* freq
-* clock divider for CORE, COREM0, COREM1, PERIPH, ATB, PCLK_DBG, APLL,
RESERVED
-* clock divider for COPY, HPM, RESERVED
-* PLL M, P, S
-*/
- APLL_FREQ(1200, 0, 3, 7, 3, 4, 1, 7, 0, 5, 0, 0, 150, 3, 1),
- APLL_FREQ(1000, 0, 3, 7, 3, 4, 1, 7, 0, 4, 0, 0, 250, 6, 1),
- APLL_FREQ(800, 0, 3, 7, 3, 3, 1, 7, 0, 3, 0, 0, 200, 6, 1),
- APLL_FREQ(500, 0, 3, 7, 3, 3, 1, 7, 0, 3, 0, 0, 250, 6, 2),
- APLL_FREQ(200, 0, 1, 3, 1, 3, 1, 0, 0, 3, 0, 0, 200, 6, 3),
-};
-
-static void exynos4210_set_clkdiv(unsigned int div_index)
-{
- unsigned int tmp;
-
- /* Change Divider - CPU0 */
-
- tmp = apll_freq_4210[div_index].clk_div_cpu0;
-
- __raw_writel(tmp,
[PATCH v12 6/6] clk: samsung: remove unused clock aliases and update clock flags
With some of the Exynos SoCs switched over to use the generic CPUfreq drivers,
the unused clock aliases can be removed. In addition to this, the individual
clock blocks which are now encapsulated with the consolidate CPU clock type
can now be marked with read-only flags.
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Thomas Abraham thomas...@samsung.com
Acked-by: Viresh Kumar viresh.ku...@linaro.org
Acked-by: Mike Turquette mturque...@linaro.org
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Chander Kashyap k.chan...@samsung.com
---
drivers/clk/samsung/clk-exynos4.c| 48 +-
drivers/clk/samsung/clk-exynos5250.c | 19 -
drivers/clk/samsung/clk-exynos5420.c | 27 --
3 files changed, 53 insertions(+), 41 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos4.c
b/drivers/clk/samsung/clk-exynos4.c
index 9af5767..3731fc7 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -578,7 +578,8 @@ static struct samsung_mux_clock exynos4210_mux_clks[]
__initdata = {
MUX(0, mout_fimd1, group1_p4210, E4210_SRC_LCD1, 0, 4),
MUX(0, mout_mipi1, group1_p4210, E4210_SRC_LCD1, 12, 4),
MUX(CLK_SCLK_MPLL, sclk_mpll, mout_mpll_p, SRC_CPU, 8, 1),
- MUX(CLK_MOUT_CORE, mout_core, mout_core_p4210, SRC_CPU, 16, 1),
+ MUX_F(CLK_MOUT_CORE, mout_core, mout_core_p4210, SRC_CPU, 16, 1, 0,
+ CLK_MUX_READ_ONLY),
MUX(0, mout_hpm, mout_core_p4210, SRC_CPU, 20, 1),
MUX(CLK_SCLK_VPLL, sclk_vpll, sclk_vpll_p4210, SRC_TOP0, 8, 1),
MUX(CLK_MOUT_FIMC0, mout_fimc0, group1_p4210, SRC_CAM, 0, 4),
@@ -714,15 +715,24 @@ static struct samsung_div_clock exynos4_div_clks[]
__initdata = {
DIV(0, div_clkout_rightbus, mout_clkout_rightbus,
CLKOUT_CMU_RIGHTBUS, 8, 6),
- DIV(0, div_core, mout_core, DIV_CPU0, 0, 3),
- DIV(0, div_corem0, div_core2, DIV_CPU0, 4, 3),
- DIV(0, div_corem1, div_core2, DIV_CPU0, 8, 3),
- DIV(0, div_periph, div_core2, DIV_CPU0, 12, 3),
- DIV(0, div_atb, mout_core, DIV_CPU0, 16, 3),
- DIV(0, div_pclk_dbg, div_atb, DIV_CPU0, 20, 3),
- DIV(CLK_ARM_CLK, div_core2, div_core, DIV_CPU0, 28, 3),
- DIV(0, div_copy, mout_hpm, DIV_CPU1, 0, 3),
- DIV(0, div_hpm, div_copy, DIV_CPU1, 4, 3),
+ DIV_F(0, div_core, mout_core, DIV_CPU0, 0, 3,
+ CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+ DIV_F(0, div_corem0, div_core2, DIV_CPU0, 4, 3,
+ CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+ DIV_F(0, div_corem1, div_core2, DIV_CPU0, 8, 3,
+ CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+ DIV_F(0, div_periph, div_core2, DIV_CPU0, 12, 3,
+ CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+ DIV_F(0, div_atb, mout_core, DIV_CPU0, 16, 3,
+ CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+ DIV_F(0, div_pclk_dbg, div_atb, DIV_CPU0, 20, 3,
+ CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+ DIV_F(CLK_ARM_CLK, div_core2, div_core, DIV_CPU0, 28, 3,
+ CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+ DIV_F(0, div_copy, mout_hpm, DIV_CPU1, 0, 3,
+ CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
+ DIV_F(0, div_hpm, div_copy, DIV_CPU1, 4, 3,
+ CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
DIV(0, div_clkout_cpu, mout_clkout_cpu, CLKOUT_CMU_CPU, 8, 6),
DIV(0, div_fimc0, mout_fimc0, DIV_CAM, 0, 4),
@@ -769,7 +779,8 @@ static struct samsung_div_clock exynos4_div_clks[]
__initdata = {
DIV(0, div_spi_pre2, div_spi2, DIV_PERIL2, 8, 8),
DIV(0, div_audio1, mout_audio1, DIV_PERIL4, 0, 4),
DIV(0, div_audio2, mout_audio2, DIV_PERIL4, 16, 4),
- DIV(CLK_SCLK_APLL, sclk_apll, mout_apll, DIV_CPU0, 24, 3),
+ DIV_F(CLK_SCLK_APLL, sclk_apll, mout_apll, DIV_CPU0, 24, 3,
+ CLK_GET_RATE_NOCACHE, CLK_DIVIDER_READ_ONLY),
DIV_F(0, div_mipi_pre0, div_mipi0, DIV_LCD0, 20, 4,
CLK_SET_RATE_PARENT, 0),
DIV_F(0, div_mmc_pre0, div_mmc0, DIV_FSYS1, 8, 8,
@@ -1186,17 +1197,10 @@ static struct samsung_gate_clock exynos4x12_gate_clks[]
__initdata = {
0),
};
-static struct samsung_clock_alias exynos4_aliases[] __initdata = {
+static struct samsung_clock_alias exynos4x12_aliases[] __initdata = {
ALIAS(CLK_MOUT_CORE, NULL, moutcore),
ALIAS(CLK_ARM_CLK, NULL, armclk),
ALIAS(CLK_SCLK_APLL, NULL, mout_apll),
-};
-
-static struct samsung_clock_alias exynos4210_aliases[] __initdata = {
- ALIAS(CLK_SCLK_MPLL, NULL, mout_mpll),
-};
-
-static struct samsung_clock_alias exynos4x12_aliases[] __initdata = {
ALIAS(CLK_MOUT_MPLL_USER_C, NULL, mout_mpll),
};
@@ -1463,8 +1467,6 @@ static void __init
Re: thermal: Exynos: Deletion of unnecessary checks before two function calls
for (i = 0; i th_zone-cool_dev_size; i++) {
-if (th_zone-cool_dev[i])
-cpufreq_cooling_unregister(th_zone-cool_dev[i]);
+cpufreq_cooling_unregister(th_zone-cool_dev[i]);
}
Now you have unnecessary {}
How are the chances that your source code transformation tool
can also consider the deletion of curly brackets in such an use case?
Can any more pretty-printing rules be integrated from a specific
coding style configuration?
Regards,
Markus
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[PATCH 00/11] Exynos7: Adding USB 3.0 support
The series has dependency on a) [PATCH v7 0/7] Enable support for Samsung Exynos7 SoC http://www.spinics.net/lists/linux-samsung-soc/msg38734.html b) [GIT PULL] Samsung clock changes for 3.19 - specifically the clock dt bindings header. http://comments.gmane.org/gmane.linux.kernel.samsung-soc/39142 c) tty: serial: samsung: Clean-up selection of number of available UARTs http://www.spinics.net/lists/linux-samsung-soc/msg37418.html d) dts, kbuild: Implement support for dtb vendor subdirs(merged in linux-next) https://lkml.org/lkml/2014/10/21/654 e) Samsung pinctrl patches for v3.19 http://www.spinics.net/lists/linux-samsung-soc/msg38744.html Tested on Exynos7-espresso board with 3.18-rc5 and above dependencies. Clubbing the pinctrl, clk, and usb driver changes alongwith the dt changes together in this series only so as to avoid having 'n' number of dependencies. The USB driver patches in this series were part of [1] sent earlier. [1] [PATCH v2 0/4] usb: dwc3/phy-exynos5-usbdrd: Extend support to Exynos7 https://lkml.org/lkml/2014/10/7/191 Vivek Gautam (11): pinctrl: exynos: Add BUS1 pin controller for exynos7 dwc3: exynos: Remove local variable for clock from probe dwc3: exynos: Add provision for suspend clock dwc3: exynos: Add provision for AXI UpScaler clock on exynos7 phy: exynos5-usbdrd: Add pipe-clk, utmi-clk and itp-clk support phy: exynos5-usbdrd: Add facility for VBUS-BOOST-5V supply phy: exynos7-usbdrd: Update dependency for ARCH_EXYNOS clk: exynos7: Add required clock tree for USB arm64: exynos: Add bus1 pinctrl node on exynos7 arm64: dts: Enable USB 3.0 controller on exynos7 arm64: dts: exynos7-espresso: Add regulators for Vbus and Vbus-Boost .../devicetree/bindings/phy/samsung-phy.txt|6 + .../devicetree/bindings/usb/exynos-usb.txt |6 +- arch/arm64/boot/dts/exynos/exynos7-espresso.dts| 43 +++ arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi| 26 arch/arm64/boot/dts/exynos/exynos7.dtsi| 42 ++ drivers/clk/samsung/clk-exynos7.c | 64 + drivers/phy/Kconfig|2 +- drivers/phy/phy-exynos5-usbdrd.c | 136 +--- drivers/pinctrl/samsung/pinctrl-exynos.c | 12 ++ drivers/usb/dwc3/dwc3-exynos.c | 39 +- include/dt-bindings/clock/exynos7-clk.h|9 +- 11 files changed, 354 insertions(+), 31 deletions(-) -- 1.7.10.4 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 01/11] pinctrl: exynos: Add BUS1 pin controller for exynos7
USB and Power regulator on Exynos7 require gpios available
in BUS1 pin controller block.
So adding the BUS1 pinctrl support.
Signed-off-by: Naveen Krishna Ch naveenkrishna...@gmail.com
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Cc: Linus Walleij linus.wall...@linaro.org
---
drivers/pinctrl/samsung/pinctrl-exynos.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c
b/drivers/pinctrl/samsung/pinctrl-exynos.c
index d5d4cfc..caca5b5 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -1300,6 +1300,13 @@ static const struct samsung_pin_bank_data
exynos7_pin_banks7[] __initconst = {
EXYNOS_PIN_BANK_EINTG(8, 0x060, gpr3, 0x0c),
};
+/* pin banks of exynos7 pin-controller - BUS1 */
+static const struct samsung_pin_bank_data exynos7_pin_banks8[] __initconst = {
+ EXYNOS_PIN_BANK_EINTG(8, 0x020, gpf0, 0x00),
+ EXYNOS_PIN_BANK_EINTG(8, 0x0a0, gpf4, 0x10),
+ EXYNOS_PIN_BANK_EINTG(6, 0x120, gph1, 0x20),
+};
+
const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
{
/* pin-controller instance 0 Alive data */
@@ -1342,5 +1349,10 @@ const struct samsung_pin_ctrl exynos7_pin_ctrl[]
__initconst = {
.pin_banks = exynos7_pin_banks7,
.nr_banks = ARRAY_SIZE(exynos7_pin_banks7),
.eint_gpio_init = exynos_eint_gpio_init,
+ }, {
+ /* pin-controller instance 8 BUS1 data */
+ .pin_banks = exynos7_pin_banks8,
+ .nr_banks = ARRAY_SIZE(exynos7_pin_banks8),
+ .eint_gpio_init = exynos_eint_gpio_init,
},
};
--
1.7.10.4
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[PATCH 02/11] dwc3: exynos: Remove local variable for clock from probe
There's no need to keep one local variable for clock, and
then assign the same to 'clk' member of dwc3_exynos.
Just cleaning it up.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
drivers/usb/dwc3/dwc3-exynos.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c
index 3951a65..7109de7 100644
--- a/drivers/usb/dwc3/dwc3-exynos.c
+++ b/drivers/usb/dwc3/dwc3-exynos.c
@@ -106,7 +106,6 @@ static int dwc3_exynos_remove_child(struct device *dev,
void *unused)
static int dwc3_exynos_probe(struct platform_device *pdev)
{
struct dwc3_exynos *exynos;
- struct clk *clk;
struct device *dev = pdev-dev;
struct device_node *node = dev-of_node;
@@ -133,15 +132,13 @@ static int dwc3_exynos_probe(struct platform_device *pdev)
return ret;
}
- clk = devm_clk_get(dev, usbdrd30);
- if (IS_ERR(clk)) {
+ exynos-dev = dev;
+
+ exynos-clk = devm_clk_get(dev, usbdrd30);
+ if (IS_ERR(exynos-clk)) {
dev_err(dev, couldn't get clock\n);
return -EINVAL;
}
-
- exynos-dev = dev;
- exynos-clk = clk;
-
clk_prepare_enable(exynos-clk);
exynos-vdd33 = devm_regulator_get(dev, vdd33);
@@ -185,7 +182,7 @@ err4:
err3:
regulator_disable(exynos-vdd33);
err2:
- clk_disable_unprepare(clk);
+ clk_disable_unprepare(exynos-clk);
return ret;
}
--
1.7.10.4
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[PATCH 03/11] dwc3: exynos: Add provision for suspend clock
DWC3 controller on Exynos SoC series have separate control for
suspend clock which replaces pipe3_rx_pclk as clock source to
a small part of DWC3 core that operates when SS PHY is in its
lowest power state (P3) in states SS.disabled and U3.
Suggested-by: Anton Tikhomirov av.tikhomi...@samsung.com
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
drivers/usb/dwc3/dwc3-exynos.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c
index 7109de7..af15ab3 100644
--- a/drivers/usb/dwc3/dwc3-exynos.c
+++ b/drivers/usb/dwc3/dwc3-exynos.c
@@ -35,6 +35,8 @@ struct dwc3_exynos {
struct device *dev;
struct clk *clk;
+ struct clk *susp_clk;
+
struct regulator*vdd33;
struct regulator*vdd10;
};
@@ -141,6 +143,13 @@ static int dwc3_exynos_probe(struct platform_device *pdev)
}
clk_prepare_enable(exynos-clk);
+ exynos-susp_clk = devm_clk_get(dev, usbdrd30_susp_clk);
+ if (IS_ERR(exynos-susp_clk)) {
+ dev_dbg(dev, no suspend clk specified\n);
+ exynos-susp_clk = NULL;
+ }
+ clk_prepare_enable(exynos-susp_clk);
+
exynos-vdd33 = devm_regulator_get(dev, vdd33);
if (IS_ERR(exynos-vdd33)) {
ret = PTR_ERR(exynos-vdd33);
@@ -182,6 +191,7 @@ err4:
err3:
regulator_disable(exynos-vdd33);
err2:
+ clk_disable_unprepare(exynos-susp_clk);
clk_disable_unprepare(exynos-clk);
return ret;
}
@@ -194,6 +204,7 @@ static int dwc3_exynos_remove(struct platform_device *pdev)
platform_device_unregister(exynos-usb2_phy);
platform_device_unregister(exynos-usb3_phy);
+ clk_disable_unprepare(exynos-susp_clk);
clk_disable_unprepare(exynos-clk);
regulator_disable(exynos-vdd33);
--
1.7.10.4
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[PATCH 04/11] dwc3: exynos: Add provision for AXI UpScaler clock on exynos7
DWC3 controller on Exynos7 SoC has separate control for
AXI UpScaler which connects DWC3 DRD controller to AXI bus.
Get the gate clock for the same to control it across power
cycles.
Suggested-by: Anton Tikhomirov av.tikhomi...@samsung.com
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
Documentation/devicetree/bindings/usb/exynos-usb.txt |6 --
drivers/usb/dwc3/dwc3-exynos.c | 17 +
2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/exynos-usb.txt
b/Documentation/devicetree/bindings/usb/exynos-usb.txt
index a3b5990..9b4dbe3 100644
--- a/Documentation/devicetree/bindings/usb/exynos-usb.txt
+++ b/Documentation/devicetree/bindings/usb/exynos-usb.txt
@@ -82,8 +82,10 @@ Example:
DWC3
Required properties:
- - compatible: should be samsung,exynos5250-dwusb3 for USB 3.0 DWC3
- controller.
+ - compatible: should be one of the following -
+ samsung,exynos5250-dwusb3: for USB 3.0 DWC3 controller on
+ Exynos5250/5420.
+ samsung,exynos7-dwusb3: for USB 3.0 DWC3 controller on Exynos7.
- #address-cells, #size-cells : should be '1' if the device has sub-nodes
with 'reg' property.
- ranges: allows valid 1:1 translation between child's address space and
diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c
index af15ab3..6ae8fe5 100644
--- a/drivers/usb/dwc3/dwc3-exynos.c
+++ b/drivers/usb/dwc3/dwc3-exynos.c
@@ -36,6 +36,7 @@ struct dwc3_exynos {
struct clk *clk;
struct clk *susp_clk;
+ struct clk *axius_clk;
struct regulator*vdd33;
struct regulator*vdd10;
@@ -150,6 +151,17 @@ static int dwc3_exynos_probe(struct platform_device *pdev)
}
clk_prepare_enable(exynos-susp_clk);
+ if (of_device_is_compatible(node, samsung,exynos7-dwusb3)) {
+ exynos-axius_clk = devm_clk_get(dev, usbdrd30_axius_clk);
+ if (IS_ERR(exynos-axius_clk)) {
+ dev_err(dev, no AXI UpScaler clk specified\n);
+ return -ENODEV;
+ }
+ clk_prepare_enable(exynos-axius_clk);
+ } else {
+ exynos-axius_clk = NULL;
+ }
+
exynos-vdd33 = devm_regulator_get(dev, vdd33);
if (IS_ERR(exynos-vdd33)) {
ret = PTR_ERR(exynos-vdd33);
@@ -191,6 +203,7 @@ err4:
err3:
regulator_disable(exynos-vdd33);
err2:
+ clk_disable_unprepare(exynos-axius_clk);
clk_disable_unprepare(exynos-susp_clk);
clk_disable_unprepare(exynos-clk);
return ret;
@@ -204,6 +217,7 @@ static int dwc3_exynos_remove(struct platform_device *pdev)
platform_device_unregister(exynos-usb2_phy);
platform_device_unregister(exynos-usb3_phy);
+ clk_disable_unprepare(exynos-axius_clk);
clk_disable_unprepare(exynos-susp_clk);
clk_disable_unprepare(exynos-clk);
@@ -216,6 +230,7 @@ static int dwc3_exynos_remove(struct platform_device *pdev)
#ifdef CONFIG_OF
static const struct of_device_id exynos_dwc3_match[] = {
{ .compatible = samsung,exynos5250-dwusb3 },
+ { .compatible = samsung,exynos7-dwusb3 },
{},
};
MODULE_DEVICE_TABLE(of, exynos_dwc3_match);
@@ -226,6 +241,7 @@ static int dwc3_exynos_suspend(struct device *dev)
{
struct dwc3_exynos *exynos = dev_get_drvdata(dev);
+ clk_disable(exynos-axius_clk);
clk_disable(exynos-clk);
regulator_disable(exynos-vdd33);
@@ -251,6 +267,7 @@ static int dwc3_exynos_resume(struct device *dev)
}
clk_enable(exynos-clk);
+ clk_enable(exynos-axius_clk);
/* runtime set active to reflect active state. */
pm_runtime_disable(dev);
--
1.7.10.4
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[PATCH 05/11] phy: exynos5-usbdrd: Add pipe-clk, utmi-clk and itp-clk support
Exynos7 SoC has now separate gate control for 125MHz pipe3 phy
clock, as well as 60MHz utmi phy clock.
Additionally, separate gate control is available for the clock
used for ITP (Isochronous Transfer Packet) generation.
So get the same and control in the phy-exynos5-usbdrd driver.
Suggested-by: Anton Tikhomirov av.tikhomi...@samsung.com
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
.../devicetree/bindings/phy/samsung-phy.txt|6 ++
drivers/phy/phy-exynos5-usbdrd.c | 104
2 files changed, 92 insertions(+), 18 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt
b/Documentation/devicetree/bindings/phy/samsung-phy.txt
index 15e0f2c..d5bad92 100644
--- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
+++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
@@ -128,6 +128,7 @@ Required properties:
- compatible : Should be set to one of the following supported values:
- samsung,exynos5250-usbdrd-phy - for exynos5250 SoC,
- samsung,exynos5420-usbdrd-phy - for exynos5420 SoC.
+ - samsung,exynos7-usbdrd-phy - for exynos7 SoC.
- reg : Register offset and length of USB DRD PHY register set;
- clocks: Clock IDs array as required by the controller
- clock-names: names of clocks correseponding to IDs in the clock property;
@@ -138,6 +139,11 @@ Required properties:
PHY operations, associated by phy name. It is used to
determine bit values for clock settings register.
For Exynos5420 this is given as 'sclk_usbphy30' in CMU.
+ - optional clocks: Exynos7 SoC has now following additional
+ gate clocks available:
+ - phy_pipe: for PIPE3 phy
+ - phy_utmi: for UTMI+ phy
+ - itp: for ITP generation
- samsung,pmu-syscon: phandle for PMU system controller interface, used to
control pmu registers for power isolation.
- #phy-cells : from the generic PHY bindings, must be 1;
diff --git a/drivers/phy/phy-exynos5-usbdrd.c b/drivers/phy/phy-exynos5-usbdrd.c
index f756aca..3654712 100644
--- a/drivers/phy/phy-exynos5-usbdrd.c
+++ b/drivers/phy/phy-exynos5-usbdrd.c
@@ -141,6 +141,7 @@ struct exynos5_usbdrd_phy_drvdata {
const struct exynos5_usbdrd_phy_config *phy_cfg;
u32 pmu_offset_usbdrd0_phy;
u32 pmu_offset_usbdrd1_phy;
+ bool has_common_clk_gate;
};
/**
@@ -148,6 +149,9 @@ struct exynos5_usbdrd_phy_drvdata {
* @dev: pointer to device instance of this platform device
* @reg_phy: usb phy controller register memory base
* @clk: phy clock for register access
+ * @pipeclk: clock for pipe3 phy
+ * @utmiclk: clock for utmi+ phy
+ * @itpclk: clock for ITP generation
* @drv_data: pointer to SoC level driver data structure
* @phys[]: array for 'EXYNOS5_DRDPHYS_NUM' number of PHY
* instances each with its 'phy' and 'phy_cfg'.
@@ -155,12 +159,14 @@ struct exynos5_usbdrd_phy_drvdata {
*reference clocks' for SS and HS operations
* @ref_clk: reference clock to PHY block from which PHY's
* operational clocks are derived
- * @ref_rate: rate of above reference clock
*/
struct exynos5_usbdrd_phy {
struct device *dev;
void __iomem *reg_phy;
struct clk *clk;
+ struct clk *pipeclk;
+ struct clk *utmiclk;
+ struct clk *itpclk;
const struct exynos5_usbdrd_phy_drvdata *drv_data;
struct phy_usb_instance {
struct phy *phy;
@@ -447,6 +453,11 @@ static int exynos5_usbdrd_phy_power_on(struct phy *phy)
dev_dbg(phy_drd-dev, Request to power_on usbdrd_phy phy\n);
clk_prepare_enable(phy_drd-ref_clk);
+ if (!phy_drd-drv_data-has_common_clk_gate) {
+ clk_prepare_enable(phy_drd-pipeclk);
+ clk_prepare_enable(phy_drd-utmiclk);
+ clk_prepare_enable(phy_drd-itpclk);
+ }
/* Enable VBUS supply */
if (phy_drd-vbus) {
@@ -464,6 +475,11 @@ static int exynos5_usbdrd_phy_power_on(struct phy *phy)
fail_vbus:
clk_disable_unprepare(phy_drd-ref_clk);
+ if (!phy_drd-drv_data-has_common_clk_gate) {
+ clk_disable_unprepare(phy_drd-itpclk);
+ clk_disable_unprepare(phy_drd-utmiclk);
+ clk_disable_unprepare(phy_drd-pipeclk);
+ }
return ret;
}
@@ -483,6 +499,11 @@ static int exynos5_usbdrd_phy_power_off(struct phy *phy)
regulator_disable(phy_drd-vbus);
clk_disable_unprepare(phy_drd-ref_clk);
+ if (!phy_drd-drv_data-has_common_clk_gate) {
+ clk_disable_unprepare(phy_drd-itpclk);
+ clk_disable_unprepare(phy_drd-pipeclk);
+ clk_disable_unprepare(phy_drd-utmiclk);
+ }
return 0;
}
@@ -506,6 +527,57 @@ static struct phy_ops exynos5_usbdrd_phy_ops = {
.owner = THIS_MODULE,
[PATCH 06/11] phy: exynos5-usbdrd: Add facility for VBUS-BOOST-5V supply
Some Exynos boards have a separate regulator controlling a
Boost 5V supply which goes as input for VBUS regulator.
So adding a control for the same in driver, to enable
vbus supply on the port.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
drivers/phy/phy-exynos5-usbdrd.c | 32 ++--
1 file changed, 30 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/phy-exynos5-usbdrd.c b/drivers/phy/phy-exynos5-usbdrd.c
index 3654712..1f54639 100644
--- a/drivers/phy/phy-exynos5-usbdrd.c
+++ b/drivers/phy/phy-exynos5-usbdrd.c
@@ -159,6 +159,8 @@ struct exynos5_usbdrd_phy_drvdata {
*reference clocks' for SS and HS operations
* @ref_clk: reference clock to PHY block from which PHY's
* operational clocks are derived
+ * vbus: VBUS regulator for phy
+ * vbus_boost: Boost regulator for VBUS present on few Exynos boards
*/
struct exynos5_usbdrd_phy {
struct device *dev;
@@ -178,6 +180,7 @@ struct exynos5_usbdrd_phy {
u32 extrefclk;
struct clk *ref_clk;
struct regulator *vbus;
+ struct regulator *vbus_boost;
};
static inline
@@ -460,11 +463,20 @@ static int exynos5_usbdrd_phy_power_on(struct phy *phy)
}
/* Enable VBUS supply */
+ if (phy_drd-vbus_boost) {
+ ret = regulator_enable(phy_drd-vbus_boost);
+ if (ret) {
+ dev_err(phy_drd-dev,
+ Failed to enable VBUS boost supply\n);
+ goto fail_vbus;
+ }
+ }
+
if (phy_drd-vbus) {
ret = regulator_enable(phy_drd-vbus);
if (ret) {
dev_err(phy_drd-dev, Failed to enable VBUS supply\n);
- goto fail_vbus;
+ goto fail_vbus_boost;
}
}
@@ -473,6 +485,10 @@ static int exynos5_usbdrd_phy_power_on(struct phy *phy)
return 0;
+fail_vbus_boost:
+ if (phy_drd-vbus_boost)
+ regulator_disable(phy_drd-vbus_boost);
+
fail_vbus:
clk_disable_unprepare(phy_drd-ref_clk);
if (!phy_drd-drv_data-has_common_clk_gate) {
@@ -497,6 +513,8 @@ static int exynos5_usbdrd_phy_power_off(struct phy *phy)
/* Disable VBUS supply */
if (phy_drd-vbus)
regulator_disable(phy_drd-vbus);
+ if (phy_drd-vbus_boost)
+ regulator_disable(phy_drd-vbus_boost);
clk_disable_unprepare(phy_drd-ref_clk);
if (!phy_drd-drv_data-has_common_clk_gate) {
@@ -690,7 +708,7 @@ static int exynos5_usbdrd_phy_probe(struct platform_device
*pdev)
break;
}
- /* Get Vbus regulator */
+ /* Get Vbus regulators */
phy_drd-vbus = devm_regulator_get(dev, vbus);
if (IS_ERR(phy_drd-vbus)) {
ret = PTR_ERR(phy_drd-vbus);
@@ -701,6 +719,16 @@ static int exynos5_usbdrd_phy_probe(struct platform_device
*pdev)
phy_drd-vbus = NULL;
}
+ phy_drd-vbus_boost = devm_regulator_get(dev, vbus-boost);
+ if (IS_ERR(phy_drd-vbus_boost)) {
+ ret = PTR_ERR(phy_drd-vbus_boost);
+ if (ret == -EPROBE_DEFER)
+ return ret;
+
+ dev_warn(dev, Failed to get VBUS boost supply regulator\n);
+ phy_drd-vbus_boost = NULL;
+ }
+
dev_vdbg(dev, Creating usbdrd_phy phy\n);
for (i = 0; i EXYNOS5_DRDPHYS_NUM; i++) {
--
1.7.10.4
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[PATCH 07/11] phy: exynos7-usbdrd: Update dependency for ARCH_EXYNOS
This PHY controller is also present on Exynos7 platform in arch-exynos family. So PHY_EXYNOS5_USBDRD should now depend on ARCH_EXYNOS. Signed-off-by: Vivek Gautam gautam.vi...@samsung.com --- drivers/phy/Kconfig |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 2a436e6..1514e40 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -193,7 +193,7 @@ config PHY_EXYNOS5250_USB2 config PHY_EXYNOS5_USBDRD tristate Exynos5 SoC series USB DRD PHY driver - depends on ARCH_EXYNOS5 OF + depends on ARCH_EXYNOS OF depends on HAS_IOMEM depends on USB_DWC3_EXYNOS select GENERIC_PHY -- 1.7.10.4 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 08/11] clk: exynos7: Add required clock tree for USB
Adding required gate clocks for USB3.0 DRD controller
present on Exynos7.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
drivers/clk/samsung/clk-exynos7.c | 64 +++
include/dt-bindings/clock/exynos7-clk.h |9 -
2 files changed, 72 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/samsung/clk-exynos7.c
b/drivers/clk/samsung/clk-exynos7.c
index ea4483b..3128593 100644
--- a/drivers/clk/samsung/clk-exynos7.c
+++ b/drivers/clk/samsung/clk-exynos7.c
@@ -343,6 +343,8 @@ static struct samsung_mux_clock top1_mux_clks[] __initdata
= {
MUX(0, mout_aclk_fsys0_200, mout_top1_group1, MUX_SEL_TOP13, 28, 2),
MUX(0, mout_sclk_mmc2, mout_top1_group1, MUX_SEL_TOP1_FSYS0, 24, 2),
+ MUX(0, mout_sclk_usbdrd300, mout_top1_group1,
+ MUX_SEL_TOP1_FSYS0, 28, 2),
MUX(0, mout_sclk_mmc1, mout_top1_group1, MUX_SEL_TOP1_FSYS1, 24, 2),
MUX(0, mout_sclk_mmc0, mout_top1_group1, MUX_SEL_TOP1_FSYS1, 28, 2),
@@ -356,6 +358,8 @@ static struct samsung_div_clock top1_div_clks[] __initdata
= {
DIV(DOUT_SCLK_MMC2, dout_sclk_mmc2, mout_sclk_mmc2,
DIV_TOP1_FSYS0, 24, 4),
+ DIV(0, dout_sclk_usbdrd300, mout_sclk_usbdrd300,
+ DIV_TOP1_FSYS0, 28, 4),
DIV(DOUT_SCLK_MMC1, dout_sclk_mmc1, mout_sclk_mmc1,
DIV_TOP1_FSYS1, 24, 4),
@@ -366,6 +370,8 @@ static struct samsung_div_clock top1_div_clks[] __initdata
= {
static struct samsung_gate_clock top1_gate_clks[] __initdata = {
GATE(CLK_SCLK_MMC2, sclk_mmc2, dout_sclk_mmc2,
ENABLE_SCLK_TOP1_FSYS0, 24, CLK_SET_RATE_PARENT, 0),
+ GATE(0, sclk_usbdrd300, dout_sclk_usbdrd300,
+ ENABLE_SCLK_TOP1_FSYS0, 28, 0, 0),
GATE(CLK_SCLK_MMC1, sclk_mmc1, dout_sclk_mmc1,
ENABLE_SCLK_TOP1_FSYS1, 24, CLK_SET_RATE_PARENT, 0),
@@ -647,7 +653,12 @@ CLK_OF_DECLARE(exynos7_clk_peris,
samsung,exynos7-clock-peris,
/* Register Offset definitions for CMU_FSYS0 (0x10E9) */
#define MUX_SEL_FSYS00 0x0200
#define MUX_SEL_FSYS01 0x0204
+#define MUX_SEL_FSYS02 0x0208
+#define ENABLE_ACLK_FSYS00 0x0800
#define ENABLE_ACLK_FSYS01 0x0804
+#define ENABLE_SCLK_FSYS01 0x0A04
+#define ENABLE_SCLK_FSYS02 0x0A08
+#define ENABLE_SCLK_FSYS04 0x0A10
/*
* List of parent clocks for Muxes in CMU_FSYS0
@@ -655,10 +666,29 @@ CLK_OF_DECLARE(exynos7_clk_peris,
samsung,exynos7-clock-peris,
PNAME(mout_aclk_fsys0_200_p) = { fin_pll, dout_aclk_fsys0_200 };
PNAME(mout_sclk_mmc2_p)= { fin_pll, sclk_mmc2 };
+PNAME(mout_sclk_usbdrd300_p) = { fin_pll, sclk_usbdrd300 };
+PNAME(mout_phyclk_usbdrd300_udrd30_phyclk_p) = { fin_pll,
+ phyclk_usbdrd300_udrd30_phyclock };
+PNAME(mout_phyclk_usbdrd300_udrd30_pipe_pclk_p)= { fin_pll,
+ phyclk_usbdrd300_udrd30_pipe_pclk };
+
+/* fixed rate clocks used in the FSYS0 block */
+struct samsung_fixed_rate_clock fixed_rate_clks_fsys0[] __initdata = {
+ FRATE(0, phyclk_usbdrd300_udrd30_phyclock, NULL,
+ CLK_IS_ROOT, 6000),
+ FRATE(0, phyclk_usbdrd300_udrd30_pipe_pclk, NULL,
+ CLK_IS_ROOT, 12500),
+};
+
static unsigned long fsys0_clk_regs[] __initdata = {
MUX_SEL_FSYS00,
MUX_SEL_FSYS01,
+ MUX_SEL_FSYS02,
+ ENABLE_ACLK_FSYS00,
ENABLE_ACLK_FSYS01,
+ ENABLE_SCLK_FSYS01,
+ ENABLE_SCLK_FSYS02,
+ ENABLE_SCLK_FSYS04,
};
static struct samsung_mux_clock fsys0_mux_clks[] __initdata = {
@@ -666,11 +696,45 @@ static struct samsung_mux_clock fsys0_mux_clks[]
__initdata = {
MUX_SEL_FSYS00, 24, 1),
MUX(0, mout_sclk_mmc2_user, mout_sclk_mmc2_p, MUX_SEL_FSYS01, 24, 1),
+ MUX(0, mout_sclk_usbdrd300_user, mout_sclk_usbdrd300_p,
+ MUX_SEL_FSYS01, 28, 1),
+
+ MUX(0, mout_phyclk_usbdrd300_udrd30_pipe_pclk_user,
+ mout_phyclk_usbdrd300_udrd30_pipe_pclk_p,
+ MUX_SEL_FSYS02, 24, 1),
+ MUX(0, mout_phyclk_usbdrd300_udrd30_phyclk_user,
+ mout_phyclk_usbdrd300_udrd30_phyclk_p,
+ MUX_SEL_FSYS02, 28, 1),
};
static struct samsung_gate_clock fsys0_gate_clks[] __initdata = {
+ GATE(ACLK_AXIUS_USBDRD30X_FSYS0X, aclk_axius_usbdrd30x_fsys0x,
+ mout_aclk_fsys0_200_user,
+ ENABLE_ACLK_FSYS00, 19, 0, 0),
+
+ GATE(ACLK_USBDRD300, aclk_usbdrd300, mout_aclk_fsys0_200_user,
+ ENABLE_ACLK_FSYS01, 29, 0, 0),
GATE(ACLK_MMC2, aclk_mmc2, mout_aclk_fsys0_200_user,
ENABLE_ACLK_FSYS01, 31, 0, 0),
+
+ GATE(SCLK_USBDRD300_SUSPENDCLK, sclk_usbdrd300_suspendclk,
+ mout_sclk_usbdrd300_user,
+ ENABLE_SCLK_FSYS01, 4, 0, 0),
+ GATE(SCLK_USBDRD300_REFCLK, sclk_usbdrd300_refclk, fin_pll,
+
[PATCH 09/11] arm64: exynos: Add bus1 pinctrl node on exynos7
BUS1 pinctrl provides gpios for usb and power regulator
available on exynos7-espresso board. So add relevant device
node for pinctrl-bus1.
Signed-off-by: Naveen Krishna Ch naveenkrishna...@gmail.com
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi | 26 +++
arch/arm64/boot/dts/exynos/exynos7.dtsi |7 ++
2 files changed, 33 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
index 2eef4a2..9648e03 100644
--- a/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
@@ -335,6 +335,32 @@
};
};
+pinctrl_bus1 {
+ gpf0: gpf0 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gpf4: gpf4 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+
+ gph1: gph1 {
+ gpio-controller;
+ #gpio-cells = 2;
+
+ interrupt-controller;
+ #interrupt-cells = 2;
+ };
+};
+
pinctrl_nfc {
gpj0: gpj0 {
gpio-controller;
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi
b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index d7a37c3..90048b2 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -26,6 +26,7 @@
pinctrl5 = pinctrl_ese;
pinctrl6 = pinctrl_fsys0;
pinctrl7 = pinctrl_fsys1;
+ pinctrl8 = pinctrl_bus1;
};
cpus {
@@ -242,6 +243,12 @@
interrupts = 0 383 0;
};
+ pinctrl_bus1: pinctrl@1487 {
+ compatible = samsung,exynos7-pinctrl;
+ reg = 0x1487 0x1000;
+ interrupts = 0 384 0;
+ };
+
pinctrl_nfc: pinctrl@14cd {
compatible = samsung,exynos7-pinctrl;
reg = 0x14cd 0x1000;
--
1.7.10.4
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[PATCH 10/11] arm64: dts: Enable USB 3.0 controller on exynos7
Adding USB 3.0 DRD controller device node, with its clock
and phy information to enable using the same on Exynos7.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
arch/arm64/boot/dts/exynos/exynos7.dtsi | 35 +++
1 file changed, 35 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi
b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index 90048b2..e633b02 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -531,6 +531,41 @@
clocks = clock_peric0 PCLK_PWM;
clock-names = timers;
};
+
+ usbdrd3: usb@1540 {
+ compatible = samsung,exynos7-dwusb3;
+ clocks = clock_fsys0 ACLK_USBDRD300,
+clock_fsys0 SCLK_USBDRD300_SUSPENDCLK,
+clock_fsys0 ACLK_AXIUS_USBDRD30X_FSYS0X;
+ clock-names = usbdrd30, usbdrd30_susp_clk,
+ usbdrd30_axius_clk;
+ #address-cells = 1;
+ #size-cells = 1;
+ ranges;
+
+ dwc3 {
+ compatible = snps,dwc3;
+ reg = 0x1540 0x1;
+ interrupts = 0 223 0;
+ phys = usbdrd_phy 0, usbdrd_phy 1;
+ phy-names = usb2-phy, usb3-phy;
+ };
+ };
+
+ usbdrd_phy: phy@1550 {
+ compatible = samsung,exynos7-usbdrd-phy;
+ reg = 0x1550 0x100;
+ clocks =
+ clock_fsys0 ACLK_USBDRD300,
+ clock_fsys0 OSCCLK_PHY_CLKOUT_USB30_PHY,
+ clock_fsys0 PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER,
+ clock_fsys0 PHYCLK_USBDRD300_UDRD30_PHYCLK_USER,
+ clock_fsys0 SCLK_USBDRD300_REFCLK;
+ clock-names = phy, ref, phy_pipe, phy_utmi,
+ itp;
+ samsung,pmu-syscon = pmu_system_controller;
+ #phy-cells = 1;
+ };
};
};
--
1.7.10.4
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[PATCH 11/11] arm64: dts: exynos7-espresso: Add regulators for Vbus and Vbus-Boost
Adding fixed voltage regulators for Vbus and Vbus-boost required
by USB 3.0 DRD controller on Exynos7-espresso board.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
arch/arm64/boot/dts/exynos/exynos7-espresso.dts | 43 +++
1 file changed, 43 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
index 5424cc4..2dedd5e 100644
--- a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
+++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
@@ -30,6 +30,28 @@
device_type = memory;
reg = 0x0 0x4000 0x0 0xC000;
};
+
+ usb30_vbus_reg: regulator-usb30 {
+ compatible = regulator-fixed;
+ regulator-name = VBUS_5V;
+ regulator-min-microvolt = 500;
+ regulator-max-microvolt = 500;
+ gpio = gph1 1 0;
+ pinctrl-names = default;
+ pinctrl-0 = usb30_vbus_en;
+ enable-active-high;
+ };
+
+ usb3drd_vboost_5v: regulator-usb3drd-vboost {
+ compatible = regulator-fixed;
+ regulator-name = VUSB_VBUS_5V;
+ regulator-min-microvolt = 500;
+ regulator-max-microvolt = 500;
+ gpio = gpf4 1 0;
+ pinctrl-names = default;
+ pinctrl-0 = usb3drd_vboost_en;
+ enable-active-high;
+ };
};
fin_pll {
@@ -40,6 +62,22 @@
status = okay;
};
+pinctrl_bus1 {
+ usb30_vbus_en: usb30-vbus-en {
+ samsung,pins = gph1-1;
+ samsung,pin-function = 1;
+ samsung,pin-pud = 0;
+ samsung,pin-drv = 0;
+ };
+
+ usb3drd_vboost_en: usb3drd-vboost-en {
+ samsung,pins = gpf4-1;
+ samsung,pin-function = 1;
+ samsung,pin-pud = 0;
+ samsung,pin-drv = 0;
+ };
+};
+
rtc {
status = okay;
};
@@ -82,3 +120,8 @@
bus-width = 4;
disable-wp;
};
+
+usbdrd_phy {
+ vbus-supply = usb30_vbus_reg;
+ vbus-boost-supply = usb3drd_vboost_5v;
+};
--
1.7.10.4
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Re: [PATCH v12 3/6] ARM: dts: Exynos: add CPU OPP and regulator supply property
Javier, Doug,
Am 21.11.2014 um 14:31 schrieb Thomas Abraham:
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
b/arch/arm/boot/dts/exynos5250-arndale.dts
index 3acd97e..da2b3e1 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -563,3 +563,7 @@
};
};
};
+
+cpu0 {
+ cpu0-supply = buck2_reg;
+};
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts
b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 6a0f4c0..0eedb88 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -406,3 +406,7 @@
};
};
};
+
+cpu0 {
+ cpu0-supply = buck2_reg;
+};
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts
b/arch/arm/boot/dts/exynos5250-snow.dts
index e51fcef..865f68a 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -345,6 +345,10 @@
};
};
+cpu0 {
+ cpu0-supply = buck2_reg;
+};
+
i2c_0 {
status = okay;
samsung,i2c-sda-delay = 100;
Not sure whether I've asked before... Do you know what needs to be
specified for exynos5250-spring.dts, which has in the meantime landed in
kgene/for-next?
Regards,
Andreas
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index f21b9aa..d4b418e 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -58,11 +58,34 @@
#address-cells = 1;
#size-cells = 0;
- cpu@0 {
+ cpu0: cpu@0 {
device_type = cpu;
compatible = arm,cortex-a15;
reg = 0;
clock-frequency = 17;
+
+ clocks = clock CLK_ARM_CLK;
+ clock-names = cpu;
+ clock-latency = 14;
+
+ operating-points =
+ 170 130
+ 160 125
+ 150 1225000
+ 140 120
+ 130 115
+ 120 1125000
+ 110 110
+ 100 1075000
+ 90 105
+ 80 1025000
+ 70 1012500
+ 60 100
+ 50 975000
+ 40 95
+ 30 937500
+ 20 925000
+ ;
};
cpu@1 {
device_type = cpu;
[snip]
--
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GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 21284 AG Nürnberg
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[PATCH v6 2/3] usb: dwc2/gadget: add mutex to serialize init/deinit calls
This patch adds mutex, which protects initialization and
deinitialization procedures against suspend/resume methods. This mutex
will be needed by the updated suspend/resume calls, which tracks gadget
state.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
Acked-by: Paul Zimmerman pa...@synopsys.com
---
drivers/usb/dwc2/core.h | 1 +
drivers/usb/dwc2/gadget.c | 19 +++
drivers/usb/dwc2/platform.c | 2 ++
3 files changed, 22 insertions(+)
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 2cb0ac31ae86..6b197550c133 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -576,6 +576,7 @@ struct dwc2_hsotg {
struct regulator_bulk_data supplies[ARRAY_SIZE(s3c_hsotg_supply_names)];
spinlock_t lock;
+ struct mutex init_mutex;
void *priv;
int irq;
struct clk *clk;
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index c0673ad4c4ad..baba8a862826 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -21,6 +21,7 @@
#include linux/platform_device.h
#include linux/dma-mapping.h
#include linux/debugfs.h
+#include linux/mutex.h
#include linux/seq_file.h
#include linux/delay.h
#include linux/io.h
@@ -2866,6 +2867,7 @@ static int s3c_hsotg_udc_start(struct usb_gadget *gadget,
return -EINVAL;
}
+ mutex_lock(hsotg-init_mutex);
WARN_ON(hsotg-driver);
driver-driver.bus = NULL;
@@ -2891,9 +2893,12 @@ static int s3c_hsotg_udc_start(struct usb_gadget *gadget,
dev_info(hsotg-dev, bound driver %s\n, driver-driver.name);
+ mutex_unlock(hsotg-init_mutex);
+
return 0;
err:
+ mutex_unlock(hsotg-init_mutex);
hsotg-driver = NULL;
return ret;
}
@@ -2914,6 +2919,8 @@ static int s3c_hsotg_udc_stop(struct usb_gadget *gadget)
if (!hsotg)
return -ENODEV;
+ mutex_lock(hsotg-init_mutex);
+
/* all endpoints should be shutdown */
for (ep = 1; ep hsotg-num_of_eps; ep++)
s3c_hsotg_ep_disable(hsotg-eps[ep].ep);
@@ -2931,6 +2938,8 @@ static int s3c_hsotg_udc_stop(struct usb_gadget *gadget)
clk_disable(hsotg-clk);
+ mutex_unlock(hsotg-init_mutex);
+
return 0;
}
@@ -2959,6 +2968,7 @@ static int s3c_hsotg_pullup(struct usb_gadget *gadget,
int is_on)
dev_dbg(hsotg-dev, %s: is_on: %d\n, __func__, is_on);
+ mutex_lock(hsotg-init_mutex);
spin_lock_irqsave(hsotg-lock, flags);
if (is_on) {
clk_enable(hsotg-clk);
@@ -2970,6 +2980,7 @@ static int s3c_hsotg_pullup(struct usb_gadget *gadget,
int is_on)
hsotg-gadget.speed = USB_SPEED_UNKNOWN;
spin_unlock_irqrestore(hsotg-lock, flags);
+ mutex_unlock(hsotg-init_mutex);
return 0;
}
@@ -3572,6 +3583,8 @@ int s3c_hsotg_suspend(struct dwc2_hsotg *hsotg)
unsigned long flags;
int ret = 0;
+ mutex_lock(hsotg-init_mutex);
+
if (hsotg-driver)
dev_info(hsotg-dev, suspending usb gadget %s\n,
hsotg-driver-driver.name);
@@ -3594,6 +3607,8 @@ int s3c_hsotg_suspend(struct dwc2_hsotg *hsotg)
clk_disable(hsotg-clk);
}
+ mutex_unlock(hsotg-init_mutex);
+
return ret;
}
EXPORT_SYMBOL_GPL(s3c_hsotg_suspend);
@@ -3603,6 +3618,8 @@ int s3c_hsotg_resume(struct dwc2_hsotg *hsotg)
unsigned long flags;
int ret = 0;
+ mutex_lock(hsotg-init_mutex);
+
if (hsotg-driver) {
dev_info(hsotg-dev, resuming usb gadget %s\n,
hsotg-driver-driver.name);
@@ -3619,6 +3636,8 @@ int s3c_hsotg_resume(struct dwc2_hsotg *hsotg)
s3c_hsotg_core_connect(hsotg);
spin_unlock_irqrestore(hsotg-lock, flags);
+ mutex_unlock(hsotg-init_mutex);
+
return ret;
}
EXPORT_SYMBOL_GPL(s3c_hsotg_resume);
diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
index 57eb8a3e022b..ec5658ac52ba 100644
--- a/drivers/usb/dwc2/platform.c
+++ b/drivers/usb/dwc2/platform.c
@@ -40,6 +40,7 @@
#include linux/device.h
#include linux/dma-mapping.h
#include linux/of_device.h
+#include linux/mutex.h
#include linux/platform_device.h
#include linux/usb/of.h
@@ -212,6 +213,7 @@ static int dwc2_driver_probe(struct platform_device *dev)
hsotg-dr_mode = of_usb_get_dr_mode(dev-dev.of_node);
spin_lock_init(hsotg-lock);
+ mutex_init(hsotg-init_mutex);
retval = dwc2_gadget_init(hsotg, irq);
if (retval)
return retval;
--
1.9.2
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[PATCH v6 1/3] usb: dwc2/gadget: rework disconnect event handling
This patch adds a call to s3c_hsotg_disconnect() from 'end session'
interrupt (GOTGINT_SES_END_DET) to correctly notify gadget subsystem
about unplugged usb cable. DISCONNINT interrupt cannot be used for this
purpose, because it is asserted only in host mode.
To avoid reporting disconnect event more than once, a disconnect call has
been moved from USB_REQ_SET_ADDRESS handling function to SESSREQINT
interrupt. This way driver ensures that disconnect event is reported
either when usb cable is unplugged or every time the host starts a new
session. To handle devices which has been synthesized without
SRP support, connected state is set in ENUMDONE interrupt.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
Acked-by: Paul Zimmerman pa...@synopsys.com
---
drivers/usb/dwc2/core.h | 3 +++
drivers/usb/dwc2/core_intr.c | 9 +
drivers/usb/dwc2/gadget.c| 10 +++---
3 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 4710935fbad3..2cb0ac31ae86 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -687,6 +687,7 @@ struct dwc2_hsotg {
u8 ctrl_buff[8];
struct usb_gadget gadget;
+ unsigned int connected:1;
unsigned int setup;
unsigned long last_rst;
struct s3c_hsotg_ep *eps;
@@ -968,6 +969,7 @@ extern int s3c_hsotg_resume(struct dwc2_hsotg *dwc2);
extern int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq);
extern void s3c_hsotg_core_init_disconnected(struct dwc2_hsotg *dwc2);
extern void s3c_hsotg_core_connect(struct dwc2_hsotg *hsotg);
+extern void s3c_hsotg_disconnect(struct dwc2_hsotg *dwc2);
#else
static inline int s3c_hsotg_remove(struct dwc2_hsotg *dwc2)
{ return 0; }
@@ -979,6 +981,7 @@ static inline int dwc2_gadget_init(struct dwc2_hsotg
*hsotg, int irq)
{ return 0; }
static inline void s3c_hsotg_core_init_disconnected(struct dwc2_hsotg *dwc2) {}
static inline void s3c_hsotg_core_connect(struct dwc2_hsotg *hsotg) {}
+static inline void s3c_hsotg_disconnect(struct dwc2_hsotg *dwc2) {}
#endif
#if IS_ENABLED(CONFIG_USB_DWC2_HOST) || IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
index b176c2fc34e5..ad43c5bc1ef1 100644
--- a/drivers/usb/dwc2/core_intr.c
+++ b/drivers/usb/dwc2/core_intr.c
@@ -128,6 +128,9 @@ static void dwc2_handle_otg_intr(struct dwc2_hsotg *hsotg)
dwc2_op_state_str(hsotg));
gotgctl = readl(hsotg-regs + GOTGCTL);
+ if (dwc2_is_device_mode(hsotg))
+ s3c_hsotg_disconnect(hsotg);
+
if (hsotg-op_state == OTG_STATE_B_HOST) {
hsotg-op_state = OTG_STATE_B_PERIPHERAL;
} else {
@@ -314,6 +317,12 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg
*hsotg)
/* Clear interrupt */
writel(GINTSTS_SESSREQINT, hsotg-regs + GINTSTS);
+
+ /*
+* Report disconnect if there is any previous session established
+*/
+ if (dwc2_is_device_mode(hsotg))
+ s3c_hsotg_disconnect(hsotg);
}
/*
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index 685527b58bde..c0673ad4c4ad 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -1030,7 +1030,6 @@ static int s3c_hsotg_process_req_feature(struct
dwc2_hsotg *hsotg,
}
static void s3c_hsotg_enqueue_setup(struct dwc2_hsotg *hsotg);
-static void s3c_hsotg_disconnect(struct dwc2_hsotg *hsotg);
/**
* s3c_hsotg_stall_ep0 - stall ep0
@@ -1108,7 +1107,6 @@ static void s3c_hsotg_process_control(struct dwc2_hsotg
*hsotg,
if ((ctrl-bRequestType USB_TYPE_MASK) == USB_TYPE_STANDARD) {
switch (ctrl-bRequest) {
case USB_REQ_SET_ADDRESS:
- s3c_hsotg_disconnect(hsotg);
dcfg = readl(hsotg-regs + DCFG);
dcfg = ~DCFG_DEVADDR_MASK;
dcfg |= (le16_to_cpu(ctrl-wValue)
@@ -2028,15 +2026,20 @@ static void kill_all_requests(struct dwc2_hsotg *hsotg,
* transactions and signal the gadget driver that this
* has happened.
*/
-static void s3c_hsotg_disconnect(struct dwc2_hsotg *hsotg)
+void s3c_hsotg_disconnect(struct dwc2_hsotg *hsotg)
{
unsigned ep;
+ if (!hsotg-connected)
+ return;
+
+ hsotg-connected = 0;
for (ep = 0; ep hsotg-num_of_eps; ep++)
kill_all_requests(hsotg, hsotg-eps[ep], -ESHUTDOWN, true);
call_gadget(hsotg, disconnect);
}
+EXPORT_SYMBOL_GPL(s3c_hsotg_disconnect);
/**
* s3c_hsotg_irq_fifoempty - TX FIFO empty interrupt handler
@@ -2289,6 +2292,7 @@ irq_retry:
writel(GINTSTS_ENUMDONE, hsotg-regs + GINTSTS);
s3c_hsotg_irq_enumdone(hsotg);
+ hsotg-connected = 1;
}
if (gintsts (GINTSTS_OEPINT | GINTSTS_IEPINT)) {
--
1.9.2
--
To
[PATCH v6 3/3] usb: dwc2/gadget: rework suspend/resume code to correctly restore gadget state
Suspend/resume code assumed that the gadget was always started and
enabled to connect to usb bus. This means that the actual state of the
gadget (started/stopped or connected/disconnected) was not correctly
preserved on suspend/resume cycle. This patch fixes this issue.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
Since hsotg-driver is always set in udc_start and cleared in udc_stop,
it has been also used to track if gadget has been start (in previous
version a 'enabled' bool entry was used for this purpose). Because
'connected' bool entry has been used to track usb cable connection
state, to aboid confusion, I reused 'enable' bool entry to track
soft-disconnect mode.
---
drivers/usb/dwc2/core.h | 3 ++-
drivers/usb/dwc2/gadget.c | 39 ++-
2 files changed, 24 insertions(+), 18 deletions(-)
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 6b197550c133..7a70a1349334 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -688,8 +688,9 @@ struct dwc2_hsotg {
u8 ctrl_buff[8];
struct usb_gadget gadget;
+ unsigned int enabled:1;
unsigned int connected:1;
- unsigned int setup;
+ unsigned int setup:1;
unsigned long last_rst;
struct s3c_hsotg_ep *eps;
#endif /* CONFIG_USB_DWC2_PERIPHERAL || CONFIG_USB_DWC2_DUAL_ROLE */
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index baba8a862826..1ecc5ac16244 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -2889,6 +2889,7 @@ static int s3c_hsotg_udc_start(struct usb_gadget *gadget,
spin_lock_irqsave(hsotg-lock, flags);
s3c_hsotg_init(hsotg);
s3c_hsotg_core_init_disconnected(hsotg);
+ hsotg-enabled = 0;
spin_unlock_irqrestore(hsotg-lock, flags);
dev_info(hsotg-dev, bound driver %s\n, driver-driver.name);
@@ -2929,6 +2930,7 @@ static int s3c_hsotg_udc_stop(struct usb_gadget *gadget)
hsotg-driver = NULL;
hsotg-gadget.speed = USB_SPEED_UNKNOWN;
+ hsotg-enabled = 0;
spin_unlock_irqrestore(hsotg-lock, flags);
@@ -2972,9 +2974,11 @@ static int s3c_hsotg_pullup(struct usb_gadget *gadget,
int is_on)
spin_lock_irqsave(hsotg-lock, flags);
if (is_on) {
clk_enable(hsotg-clk);
+ hsotg-enabled = 1;
s3c_hsotg_core_connect(hsotg);
} else {
s3c_hsotg_core_disconnect(hsotg);
+ hsotg-enabled = 0;
clk_disable(hsotg-clk);
}
@@ -3585,20 +3589,21 @@ int s3c_hsotg_suspend(struct dwc2_hsotg *hsotg)
mutex_lock(hsotg-init_mutex);
- if (hsotg-driver)
+ if (hsotg-driver) {
+ int ep;
+
dev_info(hsotg-dev, suspending usb gadget %s\n,
hsotg-driver-driver.name);
- spin_lock_irqsave(hsotg-lock, flags);
- s3c_hsotg_core_disconnect(hsotg);
- s3c_hsotg_disconnect(hsotg);
- hsotg-gadget.speed = USB_SPEED_UNKNOWN;
- spin_unlock_irqrestore(hsotg-lock, flags);
+ spin_lock_irqsave(hsotg-lock, flags);
+ if (hsotg-enabled)
+ s3c_hsotg_core_disconnect(hsotg);
+ s3c_hsotg_disconnect(hsotg);
+ hsotg-gadget.speed = USB_SPEED_UNKNOWN;
+ spin_unlock_irqrestore(hsotg-lock, flags);
- s3c_hsotg_phy_disable(hsotg);
+ s3c_hsotg_phy_disable(hsotg);
- if (hsotg-driver) {
- int ep;
for (ep = 0; ep hsotg-num_of_eps; ep++)
s3c_hsotg_ep_disable(hsotg-eps[ep].ep);
@@ -3626,16 +3631,16 @@ int s3c_hsotg_resume(struct dwc2_hsotg *hsotg)
clk_enable(hsotg-clk);
ret = regulator_bulk_enable(ARRAY_SIZE(hsotg-supplies),
- hsotg-supplies);
- }
-
- s3c_hsotg_phy_enable(hsotg);
+ hsotg-supplies);
- spin_lock_irqsave(hsotg-lock, flags);
- s3c_hsotg_core_init_disconnected(hsotg);
- s3c_hsotg_core_connect(hsotg);
- spin_unlock_irqrestore(hsotg-lock, flags);
+ s3c_hsotg_phy_enable(hsotg);
+ spin_lock_irqsave(hsotg-lock, flags);
+ s3c_hsotg_core_init_disconnected(hsotg);
+ if (hsotg-enabled)
+ s3c_hsotg_core_connect(hsotg);
+ spin_unlock_irqrestore(hsotg-lock, flags);
+ }
mutex_unlock(hsotg-init_mutex);
return ret;
--
1.9.2
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[GIT PULL 2/5] Samsung 2nd round of cleanup for v3.19
The following changes since commit 13cfa6c4f7facfc690ba9e99ec382c151fddaced: ARM: EXYNOS: Fix CPU idle clock down after CPU off (2014-10-21 00:06:22 +0900) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-cleanup-2 for you to fetch changes up to 9c50b2a98cf0ca70480b70a4490a87177519094c: ARM: EXYNOS: Remove unused static iomapping (2014-11-13 11:42:59 +0900) Samsung 2nd cleanup for v3.19 - remove unused static iomapping for exynos SoCs : remove unused static iomapping from exynos4/5_iodesc table, and related macros from mach/map.h and plat/map-s5p.h. Pankaj Dubey (1): ARM: EXYNOS: Remove unused static iomapping arch/arm/mach-exynos/exynos.c| 50 arch/arm/mach-exynos/include/mach/map.h | 23 - arch/arm/plat-samsung/include/plat/map-s5p.h | 21 3 files changed, 94 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[GIT PULL 3/5] Samsung defconfig update for v3.19
The following changes since commit 0df1f2487d2f0d04703f142813d53615d62a1da4: Linux 3.18-rc3 (2014-11-02 15:01:51 -0800) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-defconfig-v3.19 for you to fetch changes up to 26048def56ac2f901d4245d2935c797984e96d68: ARM: exynos_defconfig: Use 16 minors per MMC block device (2014-11-21 22:04:05 +0900) Samsung defconfig update for v3.19 - Use 16 minors per MMC block device for exynos_defconfig : 16 minors per MMC block device are required for Rinato (Gear 2) Krzysztof Kozlowski (1): ARM: exynos_defconfig: Use 16 minors per MMC block device arch/arm/configs/exynos_defconfig | 1 + 1 file changed, 1 insertion(+) -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[GIT PULL 1/5] Samsung non-critical fixes for v3.19
The following changes since commit f114040e3ea6e07372334ade75d1ee0775c355e1: Linux 3.18-rc1 (2014-10-19 18:08:38 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-fixes-v3.19 for you to fetch changes up to d4c6c6cf8b42d3e516703c8dc48714fed31859b8: ARM: EXYNOS: fix typo in static struct name exynos5_list_diable_wfi_wfe (2014-11-07 08:30:33 +0900) Samsung non-critical-fixes for v3.19 - fix typo in static struct name exynos5_list_diable_wfi_wfe : it should be exynos5_list_disable_wfi_wfe Pankaj Dubey (1): ARM: EXYNOS: fix typo in static struct name exynos5_list_diable_wfi_wfe arch/arm/mach-exynos/pmu.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[GIT PULL 4/5] Samsung 2nd round of DT updates for v3.19
The following changes since commit e540920cf21c2764047b8a6ddaeaa0683624e46e: ARM: dts: add CPU nodes for Exynos4 SoCs (2014-10-21 00:12:42 +0900) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-dt-2 for you to fetch changes up to a427d15062ac46a00a22d2f0b9d05093c18ff2f1: ARM: dts: Add micro SD card SDHCI node for exynos4412-trats (2014-11-07 08:28:24 +0900) Samsung 2nd DT updates for v3.19 - add micro SD card SDHCI node for exynos4412-trats - add exynos4415 DT - add exynos3250-rinato DT and sleep mode support Note: based on previous tags/samsung-dt for v3.19 Chanwoo Choi (4): ARM: dts: Add board dts file for exynos3250-rinato ARM: dts: Add sleep mode pin configuration for exynos3250-rinato ARM: dts: Add sleep mode of regulator for exynos3250-rinato ARM: dts: Add dts files for exynos4415 SoC Krzysztof Kozlowski (1): ARM: dts: Add micro SD card SDHCI node for exynos4412-trats arch/arm/boot/dts/Makefile| 3 +- arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 16 + arch/arm/boot/dts/exynos3250-rinato.dts | 686 ++ arch/arm/boot/dts/exynos4412-trats2.dts | 10 + arch/arm/boot/dts/exynos4415-pinctrl.dtsi | 573 + arch/arm/boot/dts/exynos4415.dtsi | 604 ++ 6 files changed, 1891 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/exynos3250-rinato.dts create mode 100644 arch/arm/boot/dts/exynos4415-pinctrl.dtsi create mode 100644 arch/arm/boot/dts/exynos4415.dtsi -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[GIT PULL 5/5] Samsung exynos updates for v3.19
The following changes since commit b5d841a2bfce65881d518e3c27437c530460f1c4: Merge branch 'v3.19-next/non-critical-fixes' into v3.19-next/mach-exynos (2014-11-21 22:49:27 +0900) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-exynos-v3.19 for you to fetch changes up to c645a598f99768e6cc82129081458dfdd0c273b7: ARM: EXYNOS: Call regulator core suspend prepare and finish functions (2014-11-21 22:49:47 +0900) Samsung exynos updates in arch/arm/mach-exynos/ for v3.19 - add SOC_EXYNOS4415 config to be used in audio driver - add support platform driver for exynos PMU - move PMU specific definitions from common.h to exynos-pmu.h - for exynos5420, add support PMU and Suspend-to-RAM use MCPM call backs and call regulator core suspend prepare and finish functions NOTE: including v3.19-next/non-critical-fixes, v3.19-next/cleanup-samsung and v3.19-next/pm-samsung-2 branches Abhilash Kesavan (2): ARM: EXYNOS: Add PMU support for exynos5420 ARM: EXYNOS: Use MCPM call-backs to support S2R on exynos5420 Chanwoo Choi (1): ARM: EXYNOS: Add support for exynos4415 SoC Javier Martinez Canillas (1): ARM: EXYNOS: Call regulator core suspend prepare and finish functions Pankaj Dubey (2): ARM: EXYNOS: Add platform driver support for Exynos PMU ARM: EXYNOS: Move PMU specific definitions from common.h Vikas Sajjan (1): ARM: EXYNOS: Add Suspend-to-RAM support for exynos5420 arch/arm/mach-exynos/Kconfig | 6 + arch/arm/mach-exynos/common.h | 17 -- arch/arm/mach-exynos/exynos-pmu.h | 24 ++ arch/arm/mach-exynos/exynos.c | 2 + arch/arm/mach-exynos/mcpm-exynos.c | 32 ++- arch/arm/mach-exynos/platsmp.c | 12 + arch/arm/mach-exynos/pm.c | 1 + arch/arm/mach-exynos/pmu.c | 478 + arch/arm/mach-exynos/regs-pmu.h| 227 ++ arch/arm/mach-exynos/suspend.c | 220 - 10 files changed, 944 insertions(+), 75 deletions(-) create mode 100644 arch/arm/mach-exynos/exynos-pmu.h -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v11 4/6] ARM: Exynos: switch to using generic cpufreq driver for Exynos4210/5250/5420
Hi Kevin, On Thu, Nov 20, 2014 at 2:30 AM, Kevin Hilman khil...@kernel.org wrote: Hi Thomas, On Mon, Oct 20, 2014 at 4:41 AM, Thomas Abraham thomas...@samsung.com wrote: The new CPU clock type allows the use of generic CPUfreq drivers. So for Exynos4210/5250, switch to using generic cpufreq driver. For Exynos5420, which did not have CPUfreq driver support, enable the use of generic CPUfreq driver. Suggested-by: Tomasz Figa tomasz.f...@gmail.com Cc: Kukjin Kim kgene@samsung.com Signed-off-by: Thomas Abraham thomas...@samsung.com Reviewed-by: Tomasz Figa tomasz.f...@gmail.com Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk Tested-by: Chander Kashyap k.chan...@samsung.com What's the status of the exynos5 CPUfreq support for upstream? This was pretty broadly reviewed and tested, but I still don't see this either in linux-next or Kukjin's for-next. The rebased version of the patches have been posted [1]. My apologies for the delay in following up on this patch series. Thanks, Thomas. [1] http://www.spinics.net/lists/arm-kernel/msg380011.html Kevin ___ linux-arm-kernel mailing list linux-arm-ker...@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v11 4/6] ARM: Exynos: switch to using generic cpufreq driver for Exynos4210/5250/5420
Hi Amit,
On Wed, Nov 12, 2014 at 3:03 PM, Amit Kucheria amit.kuche...@linaro.org wrote:
Hi Thomas,
On Mon, Oct 20, 2014 at 5:11 PM, Thomas Abraham thomas...@samsung.com wrote:
The new CPU clock type allows the use of generic CPUfreq drivers. So for
Exynos4210/5250, switch to using generic cpufreq driver. For Exynos5420,
which did not have CPUfreq driver support, enable the use of generic
CPUfreq driver.
Suggested-by: Tomasz Figa tomasz.f...@gmail.com
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Thomas Abraham thomas...@samsung.com
Reviewed-by: Tomasz Figa tomasz.f...@gmail.com
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Chander Kashyap k.chan...@samsung.com
---
arch/arm/mach-exynos/exynos.c | 24 +++-
1 files changed, 23 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 6b283eb..a1be294 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -282,6 +282,28 @@ static void __init exynos_init_irq(void)
exynos_map_pmu();
}
+static const struct of_device_id exynos_cpufreq_matches[] = {
+ { .compatible = samsung,exynos5420, .data = arm-bL-cpufreq-dt },
While you're at it, can you add this to so we don't have to patch
kernels for the Chromebook2 and Odroid-XU3?
{ .compatible = samsung,exynos5422, .data = arm-bL-cpufreq-dt },
{ .compatible = samsung,exynos5800, .data = arm-bL-cpufreq-dt },
Okay, I this has been included in the updated patches [1]
[1] http://www.spinics.net/lists/arm-kernel/msg380011.html
Thanks,
Thomas.
+ { .compatible = samsung,exynos5250, .data = cpufreq-dt },
+ { .compatible = samsung,exynos4210, .data = cpufreq-dt },
+ { .compatible = samsung,exynos5440, .data = exynos5440-cpufreq },
+ { /* sentinel */ }
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Re: [PATCH 1/2] drm/exynos: fix null pointer dereference issue
2014-11-21 Inki Dae inki@samsung.com: On 2014년 11월 21일 08:12, Gustavo Padovan wrote: 2014-11-13 Inki Dae inki@samsung.com: This patch fixes null pointer dereference issue incurred when ipp driver is enabled and Exynos drm driver is closed. Non kms driver should register its own sub driver to setup necessary resources, which is done by load(). So null pointer dereference occurs when ipp driver is enabled and Exynos drm driver is closed because ipp core device is registered after component_master_add_with_match call. This patch makes exynos_drm_device_subdrv_probe() to be called after all non kms drivers are registered. This patch is breaking exynos initialization, exynos_drm_device_subdrv_probe() needs the drvdata but it is still NULL at this point which make the whole exynos init fails. The drvdata is only set in exynos_drm_load() so we need call exynos_drm_device_subdrv_probe() after that. There might be my missing point but with this patch, exynos_drm_device_subdrv_probe() will be called after exynos_drm_load() call because all kms drivers are probed before component_master_add_with_match call so exynos_drm_load() must be called by component_master_add_with_match function before exynos_drm_device_subdrv_probe call. So could you show me the error messages you faced with? There might be a corner case I missed. I've added some debug output to it. It fails on exynos_drm_device_subdrv_probe() because the drvdata is NULL. I've added debug output to exynos_drm_load() and as you can see it doesn't get called before subdrv_probe(). I'm testing this on snow. [1.767835] [drm] Initialized drm 1.1.0 20060810 [1.771120] [drm:exynos_drm_init] [1.774774] [drm:exynos_drm_platform_probe] [1.778760] platform exynos-drm: Driver exynos-drm requests probe deferral [1.786178] platform 145b.dp-controller: Driver exynos-dp requests probe deferral [1.794374] exynos-drm-ipp exynos-drm-ipp: drm ipp registered successfully. [1.800372] [drm:exynos_drm_device_subdrv_probe] dev (null) Gustavo -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2] serial: samsung: Fix serial config dependencies for exynos7
On 11/19/14 16:56, Abhilash Kesavan wrote: From: Pankaj Dubey pankaj.du...@samsung.com Exynos7 has a similar serial controller to that present in older Samsung SoCs. To re-use the existing serial driver on Exynos7 we need to have SERIAL_SAMSUNG_UARTS_4 and SERIAL_SAMSUNG_UARTS selected. This is not possible because these symbols are dependent on PLAT_SAMSUNG which is not present for the ARMv8 based exynos7. Change the dependency of these symbols from PLAT_SAMSUNG to the serial driver thus making it available on exynos7. As the existing platform specific code making use of these symbols is related to uart driver this change in dependency should not cause any issues. Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com Cc: Greg Kroah-Hartman gre...@linuxfoundation.org Acked-by: Greg Kroah-Hartman gre...@linuxfoundation.org --- Changes in v2: - Added Greg's ack and Kukjin Kim as a recepient Applied, thanks. - Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 00/11] Exynos7: Adding USB 3.0 support
On Fri, Nov 21, 2014 at 07:05:43PM +0530, Vivek Gautam wrote: The series has dependency on a) [PATCH v7 0/7] Enable support for Samsung Exynos7 SoC http://www.spinics.net/lists/linux-samsung-soc/msg38734.html b) [GIT PULL] Samsung clock changes for 3.19 - specifically the clock dt bindings header. http://comments.gmane.org/gmane.linux.kernel.samsung-soc/39142 c) tty: serial: samsung: Clean-up selection of number of available UARTs http://www.spinics.net/lists/linux-samsung-soc/msg37418.html d) dts, kbuild: Implement support for dtb vendor subdirs(merged in linux-next) https://lkml.org/lkml/2014/10/21/654 e) Samsung pinctrl patches for v3.19 http://www.spinics.net/lists/linux-samsung-soc/msg38744.html Tested on Exynos7-espresso board with 3.18-rc5 and above dependencies. Clubbing the pinctrl, clk, and usb driver changes alongwith the dt changes together in this series only so as to avoid having 'n' number of dependencies. The USB driver patches in this series were part of [1] sent earlier. [1] [PATCH v2 0/4] usb: dwc3/phy-exynos5-usbdrd: Extend support to Exynos7 https://lkml.org/lkml/2014/10/7/191 I took dwc3 driver patches. -- balbi signature.asc Description: Digital signature
Re: [GIT PULL] Samsung clock changes for 3.19
On 11/20/14 04:27, Mike Turquette wrote: Quoting Kukjin Kim (2014-11-18 23:23:40) On 11/01/14 02:36, Sylwester Nawrocki wrote: Hi Mike, Hi Mike, I've collected Exynos clk patches in this pull request, as Tomasz has been busy recently. This includes addition of clock controller drivers for Exynos4415 and Exynos7 SoCs and related refactoring of the Samsung common clk API. As I mentioned in my other e-mail, it might be sensible to put these patches into a separate topic branch, so Kukjin can pull it as a dependency for the related dts changes. As Sylwester suggested, can you please provide a topic branch for samsung tree so that I can apply regarding DT changes such as exynos 4415 and exynos7... A topic branch already exists: git://linuxtv.org/snawrocki/samsung.git for-v3.19/exynos-clk ;-) I've pulled that into clk-next towards 3.19. Please pull the same branch into the samsung tree as a dependency. Thanks, I've merged the branch into samsung tree. Please make sure the branch will not be rebased :) - Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2] thermal: Exynos: Deletion of unnecessary checks before two function calls
From: Markus Elfring elfr...@users.sourceforge.net
Date: Fri, 21 Nov 2014 17:11:49 +0100
The functions cpufreq_cooling_unregister() and thermal_zone_device_unregister()
test whether their argument is NULL and then return immediately.
Thus the test around the call is not needed.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring elfr...@users.sourceforge.net
---
drivers/thermal/samsung/exynos_thermal_common.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_thermal_common.c
b/drivers/thermal/samsung/exynos_thermal_common.c
index 3f5ad25..b6be572 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.c
+++ b/drivers/thermal/samsung/exynos_thermal_common.c
@@ -417,13 +417,10 @@ void exynos_unregister_thermal(struct thermal_sensor_conf
*sensor_conf)
th_zone = sensor_conf-pzone_data;
- if (th_zone-therm_dev)
- thermal_zone_device_unregister(th_zone-therm_dev);
+ thermal_zone_device_unregister(th_zone-therm_dev);
- for (i = 0; i th_zone-cool_dev_size; i++) {
- if (th_zone-cool_dev[i])
- cpufreq_cooling_unregister(th_zone-cool_dev[i]);
- }
+ for (i = 0; i th_zone-cool_dev_size; ++i)
+ cpufreq_cooling_unregister(th_zone-cool_dev[i]);
dev_info(sensor_conf-dev,
Exynos: Kernel Thermal management unregistered\n);
--
2.1.3
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Re: Peach Pi/Pit boot failures in linux-next (was Re: [RFC PATCH 1/1] drm/exynos: Move platform drivers registration to module init)
Javier Martinez Canillas javier.marti...@collabora.co.uk writes: [adding Kukjin as cc and dropping dri-devel] Hello Kevin, On 11/20/2014 07:22 PM, Kevin Hilman wrote: My kernel command line is almost the same with the difference that I'm using clk_ignore_unused and I just checked that not passing that parameter, makes linux-next to hang showing the same output log that Kevin reported. Ah! Good find. I confirm that adding clk_ignore_unused is getting me booting again, but of course that is just masking a problem, so I hope someone can shed light on which clock isn't being correctly managed. True, I'm renaming the thread subject to track these issues separately of the original Exynos DRM bug since these are unrelated. So, I see two different boot failures on the Peach Pi[t] Chromebooks: 1) next20141121 boot fails due snd-soc-snow Disabling CONFIG_SND_SOC_SNOW makes the boot to got a little further but still fails with the second issue: 2) next20141121 boot hangs if unused clocks are disabled. I tried to root cause these two issues but didn't see anything evident so I'll find a last known good commit and bisect. If anyone has an idea of the possible causes for these issues that would be appreciated. FWIW, in addition to the failures on 5800/peach-pi, I'm also seeing boot failures in next-20141121 on the exynos5420-arndale-octa[1]. Adding clk_ignore_unused gets things booting there as well. What's interesting is that my exynos5422-odroid-xu3 is booting fine as well as the exynos5420-arndale and the exynos5410-odroid-xu (shown as exynos5410-smdk5410) Whatever the issue, it definietly seems like a problem that was came through a driver/subsystem tree because that these boards are all booting fine with Kukjin's for-next, arm-soc/for-next and mainline/v3.18-rc5 (all with just plain exynos_defconfig, and without clk_ignore_unused.) For example, just looking at peach-pi across all these trees[2], you can see that it's only failing in linux-next. Kevin [1] http://status.armcloud.us/boot/?next-2014112?exynos [2] http://status.armcloud.us/boot/?exynos5800-peach-pi NOTE: the exynos5422-odroid-xu3 is shown as exynos5420-smdk5420 since that's the DTS being used, and exynos5410-odroid-xu is shown as exynos5410-smdk5410, again due to the DTS being used. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v4 1/2] i2c: s3c2410: Handle i2c sys_cfg register in i2c driver
I usually don't take DTS patches. They should go via arm-soc. Please say so if there are reasons I should take them. I CC'ed to you because same patch contains changes in i2c driver. Yes, those should absolutely go via my I2C tree. You need to make a seperate patch out of the dts changes which then also should go via samsung-soc, unless Kukjin says he really wants to go the via I2C. But I guess the latter will just create merge conflicts. signature.asc Description: Digital signature
Re: [RFC PATCH 1/1] drm/exynos: Move platform drivers registration to module init
Hi, I have rebased my bridge series on top of linux-next. This is my git log: 4b38a6f Revert Revert ARM: exynos_defconfig: Enable options for display panel support 6fb39a7 ARM: dts: peach-pit: represent the connection between bridge and panel using videoport and endpoints aee649c ARM: dts: snow: represent the connection between bridge and panel using videoport and endpoints 5b76d8d drm/bridge: Add i2c based driver for ps8622/ps8625 bridge 581257f Documentation: bridge: Add documentation for ps8622 DT properties 178e8b9 Documentation: devicetree: Add vendor prefix for parade 0ceea75 Documentation: drm: bridge: move to video/bridge f143e2e drm/bridge: ptn3460: use gpiod interface 2d5cb9d drm/bridge: ptn3460: probe connector at the end of bridge attach 32ac563 drm/bridge: ptn3460: support drm_panel 91c6c30 drm/exynos: dp: support drm_bridge 7eea7eb drm/bridge: ptn3460: Convert to i2c driver model 602f343 drm/bridge: make bridge registration independent of drm flow 14c7143 drm/bridge: do not pass drm_bridge_funcs to drm_bridge_init 2c01ac4 drm/bridge: ptn3460: Few trivial cleanups 7415f6c arm: dts: Exynos5: Use pmu_system_controller phandle for dp phy 28655d1 drm/exynos: Move platform drivers registration to module init ed6778a Add linux-next specific files for 20141121 I have attached the rebased patches as well. I tested it on snow, peach_pit and peach_pi without *clk_ignore_unused*. Display is totally fine with exynos_defconfig (booting is fine even with CONFIG_SND_SOC_SNOW=y) Regards, Ajay Kumar On Fri, Nov 21, 2014 at 5:03 PM, Andreas Färber afaer...@suse.de wrote: Am 21.11.2014 um 00:49 schrieb Paolo Pisati: vanilla kgene/for-next as of today: 7552917 Revert ARM: exynos_defconfig: Enable options for display panel support ff0391a Merge branch 'v3.19-samsung-defconfig' into for-next 26c6283 Merge branch 'v3.18-samsung-fixes' into for-next cf864fd Merge branch 'v3.18-samsung-defconfig' into for-next 98b6380 ARM: exynos_defconfig: Enable max77802 rtc and clock drivers 839275c ARM: exynos_defconfig: Use 16 minors per MMC block device 0526f27 ARM: dts: Explicitly set dr_mode on exynos5250-snow fc14f9c Linux 3.18-rc5 ... plus 5e1e068 arm: dts: Exynos5: Use pmu_system_controller phandle for dp phy 36d908e drm/exynos: dp: Remove support for unused dptx-phy 624bff2 POSTED: mfd: syscon: Decouple syscon interface from syscon devices 68944e3 Revert Revert ARM: exynos_defconfig: Enable options for display panel support vanilla exynos_defconfig with SND_SOC_SNOW disabled. I should probably try linux-next at this point, but i wonder if people who reported kgene/for-next working were testing with a vanilla exynos_defconfig on a peach pi. On Spring, I am able to boot my kgene/for-next based queue with just: mfd: syscon: Decouple syscon interface from platform devices arm: dts: Exynos5: Use pmu_system_controller phandle for dp phy with DRM_EXYNOS*=y (except IOMMU) and SND_SOC_SNOW=m enabled in the config, while using simplefb rather than the Exynos DRM and thus clk_ignore_unused. Regarding SND_SOC_SNOW: Note that I recently submitted a patch to enable module-loading, which is missing in kgene/for-next and -rc5 but is in linux-next.git - it might uncover problems that previously went unnoticed: https://patchwork.kernel.org/patch/5235951/ exynos_defconfig has SND_SOC_SNOW=y, whereas multi_v7_defconfig doesn't have it. Regards, Andreas -- SUSE LINUX GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 21284 AG Nürnberg -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Tot.tar.bz2 Description: BZip2 compressed data
Re: [PATCH 1/3] drm/exynos: free DP if probe fails to find a panel or bridge
Hi Gustavo,
On Fri, Nov 21, 2014 at 5:24 AM, Gustavo Padovan gust...@padovan.org wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
DP was leaked everytime function returns EPROBE_DEFER, free it before
returning.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_dp_core.c | 21 +++--
1 file changed, 15 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c
b/drivers/gpu/drm/exynos/exynos_dp_core.c
index 85762cf..6fd4a46 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_core.c
+++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
@@ -1336,8 +1336,10 @@ static int exynos_dp_probe(struct platform_device
*pdev)
if (panel_node) {
dp-panel = of_drm_find_panel(panel_node);
of_node_put(panel_node);
- if (!dp-panel)
- return -EPROBE_DEFER;
+ if (!dp-panel) {
+ ret = -EPROBE_DEFER;
+ goto free_dp;
+ }
}
endpoint = of_graph_get_next_endpoint(dev-of_node, NULL);
@@ -1346,10 +1348,14 @@ static int exynos_dp_probe(struct platform_device
*pdev)
if (bridge_node) {
dp-bridge = of_drm_find_bridge(bridge_node);
of_node_put(bridge_node);
- if (!dp-bridge)
- return -EPROBE_DEFER;
- } else
- return -EPROBE_DEFER;
+ if (!dp-bridge) {
+ ret = -EPROBE_DEFER;
+ goto free_dp;
+ }
+ } else {
+ ret = -EPROBE_DEFER;
+ goto free_dp;
+ }
}
exynos_dp_display.ctx = dp;
@@ -1359,6 +1365,9 @@ static int exynos_dp_probe(struct platform_device *pdev)
exynos_drm_component_del(pdev-dev,
EXYNOS_DEVICE_TYPE_CONNECTOR);
+free_dp:
+ devm_kfree(dev, dp);
I guess the driver core takes care of freeing the devm memory when the
probe fails?
Will it not happen during PROBE_DEFER?
Inki/Jingoo - Is this change really necessary?
Ajay
return ret;
}
--
1.9.3
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Re: [PATCH] ASoC: samsung: ASoC: samsung: Fix IISMOD setting in i2s_set_sysclk()
On Thu, Nov 20, 2014 at 03:33:17PM +0530, Padmavathi Venna wrote: In the i2s_set_sysclk() callback we are currently clearing all bits of the IISMOD register in i2s_set_sysclk. It's due to an incorrect mask used for the AND operation which is introduced in commit a5a56871f804edac93a53b5e871c0e9818fb9033 (ASoC: samsung: add support for exynos7 I2S controller) and also adds the missing break statement. Applied, thanks. signature.asc Description: Digital signature
Re: screen blank causing lockup in exynos-reference/exynos5-v3.18-rc2
Hi Ajay, AJAY KUMAR RAMAKRISHNA SHYMALAMMA ajaykumar...@samsung.com writes: I tried to reproduce the issue which you reported, but I am sorry I am not able to reproduce it. I tried with my patches for DRM on top of Linux-next. I don't see the issue on linux-next either. As I mentioned in the original post, I only see it on the v3.18 branch in the exynos-reference tree. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Peach Pi/Pit boot failures in linux-next (was Re: [RFC PATCH 1/1] drm/exynos: Move platform drivers registration to module init)
Hello Kevin, On 11/21/2014 05:38 PM, Kevin Hilman wrote: So, I see two different boot failures on the Peach Pi[t] Chromebooks: 1) next20141121 boot fails due snd-soc-snow Disabling CONFIG_SND_SOC_SNOW makes the boot to got a little further but still fails with the second issue: 2) next20141121 boot hangs if unused clocks are disabled. I tried to root cause these two issues but didn't see anything evident so I'll find a last known good commit and bisect. If anyone has an idea of the possible causes for these issues that would be appreciated. FWIW, in addition to the failures on 5800/peach-pi, I'm also seeing boot failures in next-20141121 on the exynos5420-arndale-octa[1]. Adding clk_ignore_unused gets things booting there as well. What's interesting is that my exynos5422-odroid-xu3 is booting fine as well as the exynos5420-arndale and the exynos5410-odroid-xu (shown as exynos5410-smdk5410) Whatever the issue, it definietly seems like a problem that was came through a driver/subsystem tree because that these boards are all booting fine with Kukjin's for-next, arm-soc/for-next and mainline/v3.18-rc5 (all with just plain exynos_defconfig, and without clk_ignore_unused.) For example, just looking at peach-pi across all these trees[2], you can see that it's only failing in linux-next. By bisecting I found that the commit introducing both regressions is: ae43b32 (ARM: 8202/1: dmaengine: pl330: Add runtime Power Management support v12) By reverting ae43b32, next-20141121 boots with both CONFIG_SND_SOC_SNOW=y and *without* clk_ignore_unused. Krzysztof, I see you are the author of the patch, maybe you can take a look why this is causing regressions in some Exynos boards? Thanks a lot and best regards, Javier -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 1/1] drm/exynos: Move platform drivers registration to module init
Hello Ajay, On 11/21/2014 06:32 PM, Ajay kumar wrote: Hi, I have rebased my bridge series on top of linux-next. This is my git log: 4b38a6f Revert Revert ARM: exynos_defconfig: Enable options for display panel support 6fb39a7 ARM: dts: peach-pit: represent the connection between bridge and panel using videoport and endpoints aee649c ARM: dts: snow: represent the connection between bridge and panel using videoport and endpoints 5b76d8d drm/bridge: Add i2c based driver for ps8622/ps8625 bridge 581257f Documentation: bridge: Add documentation for ps8622 DT properties 178e8b9 Documentation: devicetree: Add vendor prefix for parade 0ceea75 Documentation: drm: bridge: move to video/bridge f143e2e drm/bridge: ptn3460: use gpiod interface 2d5cb9d drm/bridge: ptn3460: probe connector at the end of bridge attach 32ac563 drm/bridge: ptn3460: support drm_panel 91c6c30 drm/exynos: dp: support drm_bridge 7eea7eb drm/bridge: ptn3460: Convert to i2c driver model 602f343 drm/bridge: make bridge registration independent of drm flow 14c7143 drm/bridge: do not pass drm_bridge_funcs to drm_bridge_init 2c01ac4 drm/bridge: ptn3460: Few trivial cleanups 7415f6c arm: dts: Exynos5: Use pmu_system_controller phandle for dp phy 28655d1 drm/exynos: Move platform drivers registration to module init ed6778a Add linux-next specific files for 20141121 I have attached the rebased patches as well. I tested it on snow, peach_pit and peach_pi without *clk_ignore_unused*. Display is totally fine with exynos_defconfig (booting is fine even with CONFIG_SND_SOC_SNOW=y) Thanks for forward porting your patches to linux-next. Unfortunately I won't have time to test them until Monday but I wonder why you didn't have the boot issues that we have with next-20141121. I found that the commit ae43b32 (ARM: 8202/1: dmaengine: pl330: Add runtime Power Management support v12) had to be reverted in order to boot linux-next. Best regards, Javier -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v4 1/2] i2c: s3c2410: Handle i2c sys_cfg register in i2c driver
Pankaj Dubey wrote: On Friday 21 November 2014 12:55 PM, Wolfram Sang wrote: On Thu, Oct 30, 2014 at 01:34:29PM +0530, Pankaj Dubey wrote: Let's handle i2c interrupt re-configuration in i2c driver. This will help us in removing some soc specific checks from machine files and will help in removing static iomapping of SYS register in exynos.c Since only Exynos5250, and Exynos5420 has i2c nodes in DT, added syscon based phandle to i2c device nodes of respective SoC DT files. Well...actually there are 4ch i2c in exynos5410 and exynos5800 as well, i2c nodes are not added in dt files though. Also handle saving and restoring of SYS_I2C_CFG register during suspend and resume of i2c driver. CC: Rob Herring robh...@kernel.org CC: Randy Dunlap rdun...@infradead.org CC: Wolfram Sang w...@the-dreams.de CC: Russell King li...@arm.linux.org.uk CC: devicet...@vger.kernel.org CC: linux-...@vger.kernel.org CC: linux-...@vger.kernel.org Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com --- .../devicetree/bindings/i2c/i2c-s3c2410.txt|1 + arch/arm/boot/dts/exynos5250.dtsi |4 +++ arch/arm/boot/dts/exynos5420.dtsi |4 +++ I usually don't take DTS patches. They should go via arm-soc. Please say so if there are reasons I should take them. I CC'ed to you because same patch contains changes in i2c driver. I am not very sure via which tree this should go. May be I can ask samsung SoC maintainer Kukjin to look into this, as patch 2/2 has changes in mach-exynos which should go via Kukjin's tree. I'll reply on other email. Thanks, Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v4 1/2] i2c: s3c2410: Handle i2c sys_cfg register in i2c driver
Wolfram Sang wrote: Hi Wolfram, I usually don't take DTS patches. They should go via arm-soc. Please say so if there are reasons I should take them. I CC'ed to you because same patch contains changes in i2c driver. Yes, those should absolutely go via my I2C tree. You need to make a seperate patch out of the dts changes which then also should go via samsung-soc, unless Kukjin says he really wants to go the via I2C. But I guess the latter will just create merge conflicts. Hmm...I think, Pankaj needs to submit separated patches 1) driver change, 2) dt change and then 3) remove change. And 2nd and 3rd changes should be handed in Samsung tree together after landing 1) change in -next. Of course, 1) change should be handled in i2c tree ;) Thanks, Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v5 1/2] clk: samsung: exynos5440: move restart code into clock driver
Pankaj Dubey wrote:
Hi Kukjin,
Hi,
On Thursday 20 November 2014 11:18 PM, Sylwester Nawrocki wrote:
On 19/11/14 04:37, Pankaj Dubey wrote:
+static int exynos5440_clk_restart_notify(struct notifier_block *this,
+ unsigned long code, void *unused)
+{
+ u32 val, status;
+
+ status = readl_relaxed(reg_base + 0xbc);
+ val = readl_relaxed(reg_base + 0xcc);
+ val = (val 0x) | (status 0x);
+ writel_relaxed(val, reg_base + 0xcc);
Can we have macro definitions for these 0xcc, 0xbc address offsets ?
I must say I couldn't find them documented in any Exynos datasheet I've
got though.
I also wished this, but I could not find them documented.
So I tried to keep logic of original code as it is, just changed location.
I would also like to mention that I have not tested this on exynos5440 as I
do not have
one with me. I believe if it was working at its original place in
exynos_restart it should work
here also. Other patch (2/2) I have verified on Exynos3250 board and its
working well.
I think it's best to merge both patches in that series through
the arm-soc tree, since applying them not in order may cause some
breakage. Thus I'd let Kukjin take this patch set into his tree.
For both patches:
Acked-by: Sylwester Nawrocki s.nawro...@samsung.com
Sylwester, thanks for your ack.
Will you please take this series into your tree.
+ Amit Daniel
Yeah, this series looks good to me and I'm looking at this series with Amit's
moving pmu.c into drivers/. Maybe I need to ask Amit to respin the series on
top of this? If required, I'll reply.
Thanks,
Kukjin
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RE: [PATCH v5] ARM: EXYNOS: add Exynos3250 PMU support
Bartlomiej Zolnierkiewicz wrote: This patch prepares the PMU code for the future: - suspend/resume (S2R) support - cpuidle AFTR/W-AFTR modes support on Exynos3250. Cc: Vikas Sajjan vikas.saj...@samsung.com Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com Acked-by: Kyungmin Park kyungmin.p...@samsung.com Signed-off-by: Chanwoo Choi cw00.c...@samsung.com Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com --- v5: - added Reviewed-by tag from Pankaj Dubey - fixed form - from typo v4: - rebased on top of next-20141114 branch of linux-next kernel tree (it also applies fine to for-next branch of linux-samsung.git) - removed writing to undocumented CORE2 and CORE3 related registers - fixed values used for EXYNOS3_[G3D,LCD]_SYS_PWR_REG registers - added defines for values used for EXYNOS3_*_DURATION registers - removed redundat pr_info(EXYNOS3250 PMU Initialize\n) v3: - rebased on top of for-next branch of linux-samsung.git and [PATCH v7] mfd: syscon: Decouple syscon interface from platform devices (https://lkml.org/lkml/2014/9/30/156) [PATCH v9 0/2] ARM: Exynos: Convert PMU implementation into a platform driver (https://lkml.org/lkml/2014/10/6/89) [PATCH v9 0/2] Adds PMU and S2R support for exynos5420 (http://www.spinics.net/lists/arm-kernel/msg368207.html) v2: - rebased on top of next-20140708 and http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg32410.html http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg33660.html http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg33675.html this patch also applies fine after/before Exynos5800 PMU support: http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg33835.html arch/arm/mach-exynos/pmu.c | 167 arch/arm/mach-exynos/regs-pmu.h | 128 ++ 2 files changed, 295 insertions(+) Looks good to me, I think each SoC specific pm features would be handled in each file like cpufreq though...maybe next time? :-) BTW, I need to sort out pmu related changes from Pankaj, Amit and you. If anything is required, I'll let you know. Thanks, Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [RESEND PATCH 1/2] ARM: dts: exynos4x12: Device tree node definition for TMU on Exynos4x12
Lukasz Majewski wrote:
+ Bart, Tomasz and MLs
Hi Lukasz,
Please post including MLs, even resending.
Will apply for v3.19, and just note that you asked me to apply this for 3.18
in personal talk but I couldn't see any requirements for fixes-3.18. If I'm
missing something, please let me know.
Thanks,
Kukjin
The TMU device tree node definition for Exynos4x12 family of SoCs.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Reviewed-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Reviewed-by: Tomasz Figa tomasz.f...@gmail.com
---
arch/arm/boot/dts/exynos4x12.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi
b/arch/arm/boot/dts/exynos4x12.dtsi
index 861bb91..2e9f1f7 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -271,4 +271,14 @@
compatible = samsung,exynos4x12-usb2-phy;
samsung,sysreg-phandle = sys_reg;
};
+
+ tmu@100C {
+ compatible = samsung,exynos4412-tmu;
+ interrupt-parent = combiner;
+ interrupts = 2 4;
+ reg = 0x100C 0x100;
+ clocks = clock 383;
+ clock-names = tmu_apbif;
+ status = disabled;
+ };
};
--
2.0.0.rc2
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RE: [RESEND PATCH 2/2] ARM: dts: exynos4412-trats2: Enable TMU support at Trats2
Lukasz Majewski wrote:
+ Bart, Tomasz and MLs
Will apply.
Thanks
Kukjin
This patch enables support for TMU at Exynos4412 based Trats2 board.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Reviewed-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Reviewed-by: Tomasz Figa tomasz.f...@gmail.com
---
arch/arm/boot/dts/exynos4412-trats2.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts
b/arch/arm/boot/dts/exynos4412-trats2.dts
index 5e066cd..121430d 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -551,6 +551,11 @@
status = okay;
};
+ tmu@100C {
+ vtmu-supply = ldo10_reg;
+ status = okay;
+ };
+
i2c_ak8975: i2c-gpio-0 {
compatible = i2c-gpio;
gpios = gpy2 4 0, gpy2 5 0;
--
2.0.0.rc2
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RE: [1/2] ARM: dts: Fix bootup issue on smdk5250
Pankaj Dubey wrote:
Hi,
Hi,
Yadwinder, please don't miss [PATCH 1/2] in subject, so that my e-mail client
can't filter wrong ;)
On Tuesday 18 November 2014 05:38 PM, Yadwinder Singh Brar wrote:
With default config on smdk5250 latest tree throws below message :
[2.226049] thermal thermal_zone0: critical temperature reached(224
C),shutting down
[2.227840] reboot: Failed to start orderly shutdown: forcing the issue
and hangs randomly because it reads wrong temperature value.
I can't figure out any direct relation between LDO10 and TMU from board
schematics which I have. So making LDO10 always-on to fix issue for now.
Hmm...strange, I also can't see any relations now...but I need to contact to
hardware guy before applying this, this fixes the problem though.
Thanks,
Kukjin
Signed-off-by: Yadwinder Singh Brar yadi.b...@samsung.com
Tested this on SMDK5250 board, system boot is fine now, hence
Tested-by: Pankaj Dubey pankaj.du...@samsung.com
---
arch/arm/boot/dts/exynos5250-smdk5250.dts |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts
b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index bc27cc2..95b5b51 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -190,6 +190,7 @@
regulator-name = P1.8V_LDO_OUT10;
regulator-min-microvolt = 180;
regulator-max-microvolt = 180;
+ regulator-always-on;
};
ldo11_reg: LDO11 {
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