Re: Enable runtime PM automatically?

2014-12-19 Thread Geert Uytterhoeven
Hi Kevin,

Thanks for your comments!

On Thu, Dec 18, 2014 at 10:29 PM, Kevin Hilman khil...@kernel.org wrote:
 However, if PM domains are active, drivers must be runtime PM-aware for the
 gpd_dev_ops.start() method to be called in the first place (perhaps this is 
 just
 one bug that's easy to fix --- the device is assumed suspended, but can be
 used). They must
   1. call pm_runtime_enable() to enable runtime PM for the device,
   2. call pm_runtime_get_sync() to prevent the device from being put in a
 low-power state at any time. This second call has the
 side-effect of calling
 gpd_dev_ops.start().

 Hence, if PM domains are enabled, wouldn't it make sense to
   1. enable runtime PM by default, for all devices (bound and unbound),
   2. call pm_runtime_get_sync(), for all devices bound to a driver.
 Of course we have to keep track if drivers call any of the pm_runtime_*()
 methods theirselves, as that would have to move them from automatic to
 manual mode.

 Would this be feasible?

 We have to be careful about where the PM core's _get_sync() call goes.

 Because you're talking about bound devices, I guess you mean after the
 driver probes?  Otherwise, it gets tricky if the _get_sync() is before
 the driver probes, because the device driver may have work it wants to
 do in its runtime PM callbacks, which are not initialized/available
 before the driver probes.  Doing this before probe also makes it rather
 difficult to know for sure the actual physical state of the device, and
 make sure it matches the runtime PM state of the device.  Rafael
 mentioned this also, and I'm not sure how we can be sure of the physical
 state.

Yes, it's complicated by the fact that there are multiple sets of callbacks
(PM domain, device type, class type, bus type, driver).
However, the PM domain one has the highest priority, and is always
(also for devices not bound to a driver) available.

 Some thoughts: devices without drivers would be runtime resumed by the
 core, but will never be suspended, so the PM domain will never shut
 down.  I guess the core will have to keep track of the devices it
 automatically runtime resumed and decide to runtime suspend them too?
 Hmm, where would that go?

No, devices without a driver just need to become runtime PM enabled.
They will only be resumed when a dependent device (e.g. a child) is resumed,
and are suspended again after all dependents are suspended. That's how
simple-pm-bus behaves.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say programmer or something like that.
-- Linus Torvalds
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Re: [PATCH 4/4] PM: Eliminate CONFIG_PM_RUNTIME

2014-12-19 Thread Geert Uytterhoeven
On Fri, Dec 19, 2014 at 3:03 AM, Rafael J. Wysocki r...@rjwysocki.net wrote:
 --- linux-pm.orig/arch/mips/configs/lemote2f_defconfig
 +++ linux-pm/arch/mips/configs/lemote2f_defconfig
 @@ -37,7 +37,7 @@ CONFIG_MIPS32_N32=y
  CONFIG_PM=y
  ^^^
  CONFIG_HIBERNATION=y
  CONFIG_PM_STD_PARTITION=/dev/hda3
 -CONFIG_PM_RUNTIME=y
 +CONFIG_PM=y
   ^^^
Now we have two of them

  CONFIG_CPU_FREQ=y
  CONFIG_CPU_FREQ_DEBUG=y
  CONFIG_CPU_FREQ_STAT=m

Other defconfig files may be affected, too.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say programmer or something like that.
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[PATCH 2/2] ARM: dts: exynos3250: replace number by macro in gpio keys

2014-12-19 Thread Beomho Seo
This patch replace number by macro in gpio keys for exynos 3250 boards.

Cc: Youngjun Cho yj44@samsung.com
Cc: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Beomho Seo beomho@samsung.com
---
 arch/arm/boot/dts/exynos3250-monk.dts   |3 ++-
 arch/arm/boot/dts/exynos3250-rinato.dts |3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos3250-monk.dts 
b/arch/arm/boot/dts/exynos3250-monk.dts
index 2129ab98..792a2c7 100644
--- a/arch/arm/boot/dts/exynos3250-monk.dts
+++ b/arch/arm/boot/dts/exynos3250-monk.dts
@@ -15,6 +15,7 @@
 /dts-v1/;
 #include exynos3250.dtsi
 #include dt-bindings/input/input.h
+#include dt-bindings/gpio/gpio.h
 
 / {
model = Samsung Monk board;
@@ -37,7 +38,7 @@
compatible = gpio-keys;
 
power_key {
-   gpios = gpx2 7 1;
+   gpios = gpx2 7 GPIO_ACTIVE_LOW;
linux,code = KEY_POWER;
label = power key;
debounce-interval = 10;
diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts 
b/arch/arm/boot/dts/exynos3250-rinato.dts
index c186ac6..3493bca 100644
--- a/arch/arm/boot/dts/exynos3250-rinato.dts
+++ b/arch/arm/boot/dts/exynos3250-rinato.dts
@@ -15,6 +15,7 @@
 /dts-v1/;
 #include exynos3250.dtsi
 #include dt-bindings/input/input.h
+#include dt-bindings/gpio/gpio.h
 
 / {
model = Samsung Rinato board;
@@ -37,7 +38,7 @@
compatible = gpio-keys;
 
power_key {
-   gpios = gpx2 7 1;
+   gpios = gpx2 7 GPIO_ACTIVE_LOW;
linux,code = KEY_POWER;
label = power key;
debounce-interval = 10;
-- 
1.7.9.5

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[PATCH 1/2] ARM: dts: exynos3250: remove unecessary property of gpio-keys node

2014-12-19 Thread Beomho Seo
This patch remove unecessary property of gpio-keys node.
gpio-keys driver do not uses interrupts and interrupt-parent.

Cc: Youngjun Cho yj44@samsung.com
Cc: Chanwoo Choi cw00.c...@samsung.com
Signed-off-by: Beomho Seo beomho@samsung.com
---
 arch/arm/boot/dts/exynos3250-monk.dts   |2 --
 arch/arm/boot/dts/exynos3250-rinato.dts |2 --
 2 files changed, 4 deletions(-)

diff --git a/arch/arm/boot/dts/exynos3250-monk.dts 
b/arch/arm/boot/dts/exynos3250-monk.dts
index 24822aa..2129ab98 100644
--- a/arch/arm/boot/dts/exynos3250-monk.dts
+++ b/arch/arm/boot/dts/exynos3250-monk.dts
@@ -37,8 +37,6 @@
compatible = gpio-keys;
 
power_key {
-   interrupt-parent = gpx2;
-   interrupts = 7 0;
gpios = gpx2 7 1;
linux,code = KEY_POWER;
label = power key;
diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts 
b/arch/arm/boot/dts/exynos3250-rinato.dts
index 80aa8b4..c186ac6 100644
--- a/arch/arm/boot/dts/exynos3250-rinato.dts
+++ b/arch/arm/boot/dts/exynos3250-rinato.dts
@@ -37,8 +37,6 @@
compatible = gpio-keys;
 
power_key {
-   interrupt-parent = gpx2;
-   interrupts = 7 0;
gpios = gpx2 7 1;
linux,code = KEY_POWER;
label = power key;
-- 
1.7.9.5

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Re: [PATCH 2/2] ARM: dts: exynos3250: replace number by macro in gpio keys

2014-12-19 Thread Chanwoo Choi
Hi Beomho,

On 12/19/2014 05:39 PM, Beomho Seo wrote:
 This patch replace number by macro in gpio keys for exynos 3250 boards.
 
 Cc: Youngjun Cho yj44@samsung.com
 Cc: Chanwoo Choi cw00.c...@samsung.com
 Signed-off-by: Beomho Seo beomho@samsung.com

Reviewed-by: Chanwoo Choi cw00.c...@samsung.com

Thanks,
Chanwoo CHoi

 ---
  arch/arm/boot/dts/exynos3250-monk.dts   |3 ++-
  arch/arm/boot/dts/exynos3250-rinato.dts |3 ++-
  2 files changed, 4 insertions(+), 2 deletions(-)
 
 diff --git a/arch/arm/boot/dts/exynos3250-monk.dts 
 b/arch/arm/boot/dts/exynos3250-monk.dts
 index 2129ab98..792a2c7 100644
 --- a/arch/arm/boot/dts/exynos3250-monk.dts
 +++ b/arch/arm/boot/dts/exynos3250-monk.dts
 @@ -15,6 +15,7 @@
  /dts-v1/;
  #include exynos3250.dtsi
  #include dt-bindings/input/input.h
 +#include dt-bindings/gpio/gpio.h
  
  / {
   model = Samsung Monk board;
 @@ -37,7 +38,7 @@
   compatible = gpio-keys;
  
   power_key {
 - gpios = gpx2 7 1;
 + gpios = gpx2 7 GPIO_ACTIVE_LOW;
   linux,code = KEY_POWER;
   label = power key;
   debounce-interval = 10;
 diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts 
 b/arch/arm/boot/dts/exynos3250-rinato.dts
 index c186ac6..3493bca 100644
 --- a/arch/arm/boot/dts/exynos3250-rinato.dts
 +++ b/arch/arm/boot/dts/exynos3250-rinato.dts
 @@ -15,6 +15,7 @@
  /dts-v1/;
  #include exynos3250.dtsi
  #include dt-bindings/input/input.h
 +#include dt-bindings/gpio/gpio.h
  
  / {
   model = Samsung Rinato board;
 @@ -37,7 +38,7 @@
   compatible = gpio-keys;
  
   power_key {
 - gpios = gpx2 7 1;
 + gpios = gpx2 7 GPIO_ACTIVE_LOW;
   linux,code = KEY_POWER;
   label = power key;
   debounce-interval = 10;
 

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Re: [PATCH 1/2] ARM: dts: exynos3250: remove unecessary property of gpio-keys node

2014-12-19 Thread Chanwoo Choi
Hi Beomho,

On 12/19/2014 05:39 PM, Beomho Seo wrote:
 This patch remove unecessary property of gpio-keys node.
 gpio-keys driver do not uses interrupts and interrupt-parent.
 
 Cc: Youngjun Cho yj44@samsung.com
 Cc: Chanwoo Choi cw00.c...@samsung.com
 Signed-off-by: Beomho Seo beomho@samsung.com

Reviewed-by: Chanwoo Choi cw00.c...@samsung.com

Thanks,
Chanwoo CHoi

 ---
  arch/arm/boot/dts/exynos3250-monk.dts   |2 --
  arch/arm/boot/dts/exynos3250-rinato.dts |2 --
  2 files changed, 4 deletions(-)
 
 diff --git a/arch/arm/boot/dts/exynos3250-monk.dts 
 b/arch/arm/boot/dts/exynos3250-monk.dts
 index 24822aa..2129ab98 100644
 --- a/arch/arm/boot/dts/exynos3250-monk.dts
 +++ b/arch/arm/boot/dts/exynos3250-monk.dts
 @@ -37,8 +37,6 @@
   compatible = gpio-keys;
  
   power_key {
 - interrupt-parent = gpx2;
 - interrupts = 7 0;
   gpios = gpx2 7 1;
   linux,code = KEY_POWER;
   label = power key;
 diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts 
 b/arch/arm/boot/dts/exynos3250-rinato.dts
 index 80aa8b4..c186ac6 100644
 --- a/arch/arm/boot/dts/exynos3250-rinato.dts
 +++ b/arch/arm/boot/dts/exynos3250-rinato.dts
 @@ -37,8 +37,6 @@
   compatible = gpio-keys;
  
   power_key {
 - interrupt-parent = gpx2;
 - interrupts = 7 0;
   gpios = gpx2 7 1;
   linux,code = KEY_POWER;
   label = power key;
 

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[PATCH 0/2] Add pinctrl support for audio IPs on exynos7

2014-12-19 Thread Padmavathi Venna
Audio interface IPs I2S, PCM and SPDIF on Exynos7 requires GPIOs
available on AUD and BUS0 pin controller blocks. So add support
for all. 

This patchset is dependent on BUS1 pin control support from Vivek
in the below link
https://patchwork.kernel.org/patch/5467321/

Padmavathi Venna (2):
  pinctrl: exynos: Add AUDIO pin controller for exynos7
  arm64: dts: Add pinctrl support for audio IPs on exynos7

 .../bindings/pinctrl/samsung-pinctrl.txt   |1 +
 arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi|   56 
 arch/arm64/boot/dts/exynos/exynos7.dtsi|7 +++
 drivers/pinctrl/samsung/pinctrl-exynos.c   |   10 
 4 files changed, 74 insertions(+), 0 deletions(-)

-- 
1.7.4.4

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[PATCH 2/2] arm64: dts: Add pinctrl support for audio IPs on exynos7

2014-12-19 Thread Padmavathi Venna
Add pinctrl support for I2S,PCM,SPDIF

Signed-off-by: Padmavathi Venna padm...@samsung.com
---
 arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi |   56 +++
 arch/arm64/boot/dts/exynos/exynos7.dtsi |7 +++
 2 files changed, 63 insertions(+), 0 deletions(-)

diff --git a/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi 
b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
index c367f0a..a5aeb07 100644
--- a/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
@@ -333,6 +333,29 @@
samsung,pin-pud = 3;
samsung,pin-drv = 0;
};
+
+   i2s1_bus: i2s1-bus {
+   samsung,pins = gpd4-0, gpd4-1, gpd4-2,
+   gpd4-3, gpd4-4;
+   samsung,pin-function = 2;
+   samsung,pin-pud = 1;
+   samsung,pin-drv = 0;
+   };
+
+   pcm1_bus: pcm1-bus {
+   samsung,pins = gpd4-0, gpd4-2,
+   gpd4-3, gpd4-4;
+   samsung,pin-function = 3;
+   samsung,pin-pud = 1;
+   samsung,pin-drv = 0;
+   };
+
+   spdif_bus: spdif-bus {
+   samsung,pins = gpd4-3, gpd4-4;
+   samsung,pin-function = 4;
+   samsung,pin-pud = 1;
+   samsung,pin-drv = 0;
+   };
 };
 
 pinctrl_bus1 {
@@ -668,3 +691,36 @@
samsung,pin-drv = 2;
};
 };
+
+pinctrl_aud {
+   gpz0: gpz0 {
+   gpio-controller;
+   #gpio-cells = 2;
+
+   interrupt-controller;
+   #interrupt-cells = 2;
+   };
+
+   gpz1: gpz1 {
+   gpio-controller;
+   #gpio-cells = 2;
+
+   interrupt-controller;
+   #interrupt-cells = 2;
+   };
+
+   i2s0_bus: i2s0-bus {
+   samsung,pins = gpz0-0, gpz0-1, gpz0-2, gpz0-3,
+   gpz0-4;
+   samsung,pin-function = 2;
+   samsung,pin-pud = 1;
+   samsung,pin-drv = 0;
+   };
+
+   pcm0_bus: pcm0-bus {
+   samsung,pins = gpz1-0, gpz1-1, gpz1-2, gpz1-3;
+   samsung,pin-function = 5;
+   samsung,pin-pud = 1;
+   samsung,pin-drv = 0;
+   };
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi 
b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index e633b02..eeaa9b8d 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -27,6 +27,7 @@
pinctrl6 = pinctrl_fsys0;
pinctrl7 = pinctrl_fsys1;
pinctrl8 = pinctrl_bus1;
+   pinctrl9 = pinctrl_aud;
};
 
cpus {
@@ -285,6 +286,12 @@
interrupts = 0 203 0;
};
 
+   pinctrl_aud: pinctrl@114b {
+   compatible = samsung,exynos7-pinctrl;
+   reg = 0x114b 0x1000;
+   interrupts = 0 92 0;
+   };
+
hsi2c_0: hsi2c@1364 {
compatible = samsung,exynos7-hsi2c;
reg = 0x1364 0x1000;
-- 
1.7.4.4

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[PATCH 1/2] pinctrl: exynos: Add AUDIO pin controller for exynos7

2014-12-19 Thread Padmavathi Venna
Audio IPs on Exynos7 require gpios available in AUDIO
pin controller block. So adding the AUDIO pinctrl support.

Signed-off-by: Padmavathi Venna padm...@samsung.com
---
 .../bindings/pinctrl/samsung-pinctrl.txt   |1 +
 drivers/pinctrl/samsung/pinctrl-exynos.c   |   10 ++
 2 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt 
b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
index c88ba35..9d2a995 100644
--- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
@@ -181,6 +181,7 @@ Aliases for controllers compatible with 
samsung,exynos7-pinctrl:
 - pinctrl6: pin controller of FSYS0 block,
 - pinctrl7: pin controller of FSYS1 block,
 - pinctrl8: pin controller of BUS1 block,
+- pinctrl9: pin controller of AUDIO block,
 
 Example: A pin-controller node with pin banks:
 
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c 
b/drivers/pinctrl/samsung/pinctrl-exynos.c
index 2a85cb4..c8f83f9 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -1314,6 +1314,11 @@ static const struct samsung_pin_bank_data 
exynos7_pin_banks8[] __initconst = {
EXYNOS_PIN_BANK_EINTG(3, 0x140, gpv6, 0x24),
 };
 
+static const struct samsung_pin_bank_data exynos7_pin_banks9[] __initconst = {
+   EXYNOS_PIN_BANK_EINTG(7, 0x000, gpz0, 0x00),
+   EXYNOS_PIN_BANK_EINTG(4, 0x020, gpz1, 0x04),
+};
+
 const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
{
/* pin-controller instance 0 Alive data */
@@ -1361,5 +1366,10 @@ const struct samsung_pin_ctrl exynos7_pin_ctrl[] 
__initconst = {
.pin_banks  = exynos7_pin_banks8,
.nr_banks   = ARRAY_SIZE(exynos7_pin_banks8),
.eint_gpio_init = exynos_eint_gpio_init,
+   }, {
+   /* pin-controller instance 9 AUD data */
+   .pin_banks  = exynos7_pin_banks9,
+   .nr_banks   = ARRAY_SIZE(exynos7_pin_banks9),
+   .eint_gpio_init = exynos_eint_gpio_init,
},
 };
-- 
1.7.4.4

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[PATCH 0/4] Add clk and dt support for PDMA and SPI on Exynos7

2014-12-19 Thread Padmavathi Venna
Add PDMA0,PDMA1 gate clock and required clks for 5 SPI channels.
Also enable the support for PDMA and 5 SPI channels in DT.

This patchset is dependent on usb clk support from Vivek in below link.
http://www.spinics.net/lists/linux-samsung-soc/msg39342.html

Padmavathi Venna (4):
  clk: samsung: exynos7: add gate clock for DMA block
  clk: samsung: exynos7: add clocks for SPI block
  clk: samsung: exynos7: add clocks for audio block
  arm64: dts: Add PDMA and SPI device tree node for exynos7

 .../devicetree/bindings/clock/exynos7-clock.txt|6 +
 arch/arm64/boot/dts/exynos/exynos7.dtsi|  113 ++
 drivers/clk/samsung/clk-exynos7.c  |  221 +++-
 include/dt-bindings/clock/exynos7-clk.h|   46 -
 4 files changed, 380 insertions(+), 6 deletions(-)

-- 
1.7.4.4

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[PATCH 2/4] clk: samsung: exynos7: add clocks for SPI block

2014-12-19 Thread Padmavathi Venna
Add clock support for 5 SPI channels.

Signed-off-by: Padmavathi Venna padm...@samsung.com
---
 drivers/clk/samsung/clk-exynos7.c   |   73 +++
 include/dt-bindings/clock/exynos7-clk.h |   22 -
 2 files changed, 93 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos7.c 
b/drivers/clk/samsung/clk-exynos7.c
index 954f9a0..cf5e50e 100644
--- a/drivers/clk/samsung/clk-exynos7.c
+++ b/drivers/clk/samsung/clk-exynos7.c
@@ -166,9 +166,15 @@ CLK_OF_DECLARE(exynos7_clk_topc, 
samsung,exynos7-clock-topc,
 #define MUX_SEL_TOP00  0x0200
 #define MUX_SEL_TOP01  0x0204
 #define MUX_SEL_TOP03  0x020C
+#define MUX_SEL_TOP0_PERIC10x0234
+#define MUX_SEL_TOP0_PERIC20x0238
 #define MUX_SEL_TOP0_PERIC30x023C
 #define DIV_TOP03  0x060C
+#define DIV_TOP0_PERIC10x0634
+#define DIV_TOP0_PERIC20x0638
 #define DIV_TOP0_PERIC30x063C
+#define ENABLE_SCLK_TOP0_PERIC10x0A34
+#define ENABLE_SCLK_TOP0_PERIC20x0A38
 #define ENABLE_SCLK_TOP0_PERIC30x0A3C
 
 /* List of parent clocks for Muxes in CMU_TOP0 */
@@ -194,9 +200,15 @@ static unsigned long top0_clk_regs[] __initdata = {
MUX_SEL_TOP00,
MUX_SEL_TOP01,
MUX_SEL_TOP03,
+   MUX_SEL_TOP0_PERIC1,
+   MUX_SEL_TOP0_PERIC2,
MUX_SEL_TOP0_PERIC3,
DIV_TOP03,
+   DIV_TOP0_PERIC1,
+   DIV_TOP0_PERIC2,
DIV_TOP0_PERIC3,
+   ENABLE_SCLK_TOP0_PERIC1,
+   ENABLE_SCLK_TOP0_PERIC2,
ENABLE_SCLK_TOP0_PERIC3,
 };
 
@@ -218,10 +230,16 @@ static struct samsung_mux_clock top0_mux_clks[] 
__initdata = {
MUX(0, mout_aclk_peric1_66, mout_top0_group1, MUX_SEL_TOP03, 12, 2),
MUX(0, mout_aclk_peric0_66, mout_top0_group1, MUX_SEL_TOP03, 20, 2),
 
+   MUX(0, mout_sclk_spi1, mout_top0_group1, MUX_SEL_TOP0_PERIC1, 8, 2),
+   MUX(0, mout_sclk_spi0, mout_top0_group1, MUX_SEL_TOP0_PERIC1, 20, 2),
+
+   MUX(0, mout_sclk_spi3, mout_top0_group1, MUX_SEL_TOP0_PERIC2, 8, 2),
+   MUX(0, mout_sclk_spi2, mout_top0_group1, MUX_SEL_TOP0_PERIC2, 20, 2),
MUX(0, mout_sclk_uart3, mout_top0_group1, MUX_SEL_TOP0_PERIC3, 4, 2),
MUX(0, mout_sclk_uart2, mout_top0_group1, MUX_SEL_TOP0_PERIC3, 8, 2),
MUX(0, mout_sclk_uart1, mout_top0_group1, MUX_SEL_TOP0_PERIC3, 12, 2),
MUX(0, mout_sclk_uart0, mout_top0_group1, MUX_SEL_TOP0_PERIC3, 16, 2),
+   MUX(0, mout_sclk_spi4, mout_top0_group1, MUX_SEL_TOP0_PERIC3, 20, 2),
 };
 
 static struct samsung_div_clock top0_div_clks[] __initdata = {
@@ -230,13 +248,29 @@ static struct samsung_div_clock top0_div_clks[] 
__initdata = {
DIV(DOUT_ACLK_PERIC0, dout_aclk_peric0_66, mout_aclk_peric0_66,
DIV_TOP03, 20, 6),
 
+   DIV(0, dout_sclk_spi1, mout_sclk_spi1, DIV_TOP0_PERIC1, 8, 12),
+   DIV(0, dout_sclk_spi0, mout_sclk_spi0, DIV_TOP0_PERIC1, 20, 12),
+
+   DIV(0, dout_sclk_spi3, mout_sclk_spi3, DIV_TOP0_PERIC2, 8, 12),
+   DIV(0, dout_sclk_spi2, mout_sclk_spi2, DIV_TOP0_PERIC2, 20, 12),
+
DIV(0, dout_sclk_uart3, mout_sclk_uart3, DIV_TOP0_PERIC3, 4, 4),
DIV(0, dout_sclk_uart2, mout_sclk_uart2, DIV_TOP0_PERIC3, 8, 4),
DIV(0, dout_sclk_uart1, mout_sclk_uart1, DIV_TOP0_PERIC3, 12, 4),
DIV(0, dout_sclk_uart0, mout_sclk_uart0, DIV_TOP0_PERIC3, 16, 4),
+   DIV(0, dout_sclk_spi4, mout_sclk_spi4, DIV_TOP0_PERIC3, 20, 12),
 };
 
 static struct samsung_gate_clock top0_gate_clks[] __initdata = {
+   GATE(CLK_SCLK_SPI1, sclk_spi1, dout_sclk_spi1,
+   ENABLE_SCLK_TOP0_PERIC1, 8, CLK_SET_RATE_PARENT, 0),
+   GATE(CLK_SCLK_SPI0, sclk_spi0, dout_sclk_spi0,
+   ENABLE_SCLK_TOP0_PERIC1, 20, CLK_SET_RATE_PARENT, 0),
+
+   GATE(CLK_SCLK_SPI3, sclk_spi3, dout_sclk_spi3,
+   ENABLE_SCLK_TOP0_PERIC2, 8, CLK_SET_RATE_PARENT, 0),
+   GATE(CLK_SCLK_SPI2, sclk_spi2, dout_sclk_spi2,
+   ENABLE_SCLK_TOP0_PERIC2, 20, CLK_SET_RATE_PARENT, 0),
GATE(CLK_SCLK_UART3, sclk_uart3, dout_sclk_uart3,
ENABLE_SCLK_TOP0_PERIC3, 4, 0, 0),
GATE(CLK_SCLK_UART2, sclk_uart2, dout_sclk_uart2,
@@ -245,6 +279,8 @@ static struct samsung_gate_clock top0_gate_clks[] 
__initdata = {
ENABLE_SCLK_TOP0_PERIC3, 12, 0, 0),
GATE(CLK_SCLK_UART0, sclk_uart0, dout_sclk_uart0,
ENABLE_SCLK_TOP0_PERIC3, 16, 0, 0),
+   GATE(CLK_SCLK_SPI4, sclk_spi4, dout_sclk_spi4,
+   ENABLE_SCLK_TOP0_PERIC3, 20, CLK_SET_RATE_PARENT, 0),
 };
 
 static struct samsung_fixed_factor_clock top0_fixed_factor_clks[] __initdata = 
{
@@ -520,6 +556,7 @@ static void __init exynos7_clk_peric0_init(struct 
device_node *np)
 /* Register Offset definitions for CMU_PERIC1 (0x14C8) */
 #define MUX_SEL_PERIC100x0200
 #define 

[PATCH 3/4] clk: samsung: exynos7: add clocks for audio block

2014-12-19 Thread Padmavathi Venna
Add required clk support for I2S,PCM amd SPDIF

Signed-off-by: Padmavathi Venna padm...@samsung.com
---
 .../devicetree/bindings/clock/exynos7-clock.txt|6 +
 drivers/clk/samsung/clk-exynos7.c  |  144 +++-
 include/dt-bindings/clock/exynos7-clk.h|   24 +++-
 3 files changed, 169 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/exynos7-clock.txt 
b/Documentation/devicetree/bindings/clock/exynos7-clock.txt
index 6d3d5f8..3b439ed 100644
--- a/Documentation/devicetree/bindings/clock/exynos7-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos7-clock.txt
@@ -34,6 +34,7 @@ Required Properties for Clock Controller:
- samsung,exynos7-clock-peris
- samsung,exynos7-clock-fsys0
- samsung,exynos7-clock-fsys1
+   - samsung,exynos7-clock-aud
 
  - reg: physical base address of the controller and the length of
memory mapped region.
@@ -53,6 +54,7 @@ Input clocks for top0 clock controller:
- dout_sclk_bus1_pll
- dout_sclk_cc_pll
- dout_sclk_mfc_pll
+   - dout_sclk_aud_pll
 
 Input clocks for top1 clock controller:
- fin_pll
@@ -91,3 +93,7 @@ Input clocks for fsys1 clock controller:
- dout_aclk_fsys1_200
- dout_sclk_mmc0
- dout_sclk_mmc1
+
+Input clocks for aud clock controller:
+   - fin_pll
+   - fout_aud_pll
diff --git a/drivers/clk/samsung/clk-exynos7.c 
b/drivers/clk/samsung/clk-exynos7.c
index cf5e50e..e4bc241 100644
--- a/drivers/clk/samsung/clk-exynos7.c
+++ b/drivers/clk/samsung/clk-exynos7.c
@@ -45,6 +45,7 @@ static struct samsung_fixed_factor_clock 
topc_fixed_factor_clks[] __initdata = {
 };
 
 /* List of parent clocks for Muxes in CMU_TOPC */
+PNAME(mout_aud_pll_ctrl_p) = { fin_pll, fout_aud_pll };
 PNAME(mout_bus0_pll_ctrl_p)= { fin_pll, fout_bus0_pll };
 PNAME(mout_bus1_pll_ctrl_p)= { fin_pll, fout_bus1_pll };
 PNAME(mout_cc_pll_ctrl_p)  = { fin_pll, fout_cc_pll };
@@ -104,6 +105,7 @@ static struct samsung_mux_clock topc_mux_clks[] __initdata 
= {
 
MUX(0, mout_sclk_bus0_pll_out, mout_sclk_bus0_pll_out_p,
MUX_SEL_TOPC1, 16, 1),
+   MUX(0, mout_aud_pll_ctrl, mout_aud_pll_ctrl_p, MUX_SEL_TOPC1, 0, 1),
 
MUX(0, mout_aclk_ccore_133, mout_topc_group2, MUX_SEL_TOPC2, 4, 2),
 
@@ -125,6 +127,13 @@ static struct samsung_div_clock topc_div_clks[] __initdata 
= {
DIV_TOPC3, 12, 3),
DIV(DOUT_SCLK_MFC_PLL, dout_sclk_mfc_pll, mout_mfc_pll_ctrl,
DIV_TOPC3, 16, 3),
+   DIV(DOUT_SCLK_AUD_PLL, dout_sclk_aud_pll, mout_aud_pll_ctrl,
+   DIV_TOPC3, 28, 3),
+};
+
+static struct samsung_pll_rate_table pll1460x_24mhz_tbl[] __initdata = {
+   PLL_36XX_RATE(49152, 20, 1, 0, 31457),
+   {},
 };
 
 static struct samsung_pll_clock topc_pll_clks[] __initdata = {
@@ -136,8 +145,8 @@ static struct samsung_pll_clock topc_pll_clks[] __initdata 
= {
BUS1_DPLL_CON0, NULL),
PLL(pll_1452x, 0, fout_mfc_pll, fin_pll, MFC_PLL_LOCK,
MFC_PLL_CON0, NULL),
-   PLL(pll_1460x, 0, fout_aud_pll, fin_pll, AUD_PLL_LOCK,
-   AUD_PLL_CON0, NULL),
+   PLL(pll_1460x, FOUT_AUD_PLL, fout_aud_pll, fin_pll, AUD_PLL_LOCK,
+   AUD_PLL_CON0, pll1460x_24mhz_tbl),
 };
 
 static struct samsung_cmu_info topc_cmu_info __initdata = {
@@ -166,13 +175,16 @@ CLK_OF_DECLARE(exynos7_clk_topc, 
samsung,exynos7-clock-topc,
 #define MUX_SEL_TOP00  0x0200
 #define MUX_SEL_TOP01  0x0204
 #define MUX_SEL_TOP03  0x020C
+#define MUX_SEL_TOP0_PERIC00x0230
 #define MUX_SEL_TOP0_PERIC10x0234
 #define MUX_SEL_TOP0_PERIC20x0238
 #define MUX_SEL_TOP0_PERIC30x023C
 #define DIV_TOP03  0x060C
+#define DIV_TOP0_PERIC00x0630
 #define DIV_TOP0_PERIC10x0634
 #define DIV_TOP0_PERIC20x0638
 #define DIV_TOP0_PERIC30x063C
+#define ENABLE_SCLK_TOP0_PERIC00x0A30
 #define ENABLE_SCLK_TOP0_PERIC10x0A34
 #define ENABLE_SCLK_TOP0_PERIC20x0A38
 #define ENABLE_SCLK_TOP0_PERIC30x0A3C
@@ -182,6 +194,8 @@ PNAME(mout_bus0_pll_p)  = { fin_pll, 
dout_sclk_bus0_pll };
 PNAME(mout_bus1_pll_p) = { fin_pll, dout_sclk_bus1_pll };
 PNAME(mout_cc_pll_p)   = { fin_pll, dout_sclk_cc_pll };
 PNAME(mout_mfc_pll_p)  = { fin_pll, dout_sclk_mfc_pll };
+PNAME(mout_aud_pll_p)  = { fin_pll, dout_sclk_aud_pll };
+
 
 PNAME(mout_top0_half_bus0_pll_p) = {mout_top0_bus0_pll,
ffac_top0_bus0_pll_div2};
@@ -195,24 +209,34 @@ PNAME(mout_top0_half_mfc_pll_p) = {mout_top0_mfc_pll,
 PNAME(mout_top0_group1) = {mout_top0_half_bus0_pll,
mout_top0_half_bus1_pll, mout_top0_half_cc_pll,
mout_top0_half_mfc_pll};
+PNAME(mout_top0_group3) = {ioclk_audiocdclk0,
+   

[PATCH 4/4] arm64: dts: Add PDMA and SPI device tree node for exynos7

2014-12-19 Thread Padmavathi Venna
Add PDMA0,PDMA1 and 5 SPI dt nodes for Exynos7.

Signed-off-by: Padmavathi Venna padm...@samsung.com
---
 arch/arm64/boot/dts/exynos/exynos7.dtsi |  113 +++
 1 files changed, 113 insertions(+), 0 deletions(-)

diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi 
b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index eeaa9b8d..db7058a 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -28,6 +28,9 @@
pinctrl7 = pinctrl_fsys1;
pinctrl8 = pinctrl_bus1;
pinctrl9 = pinctrl_aud;
+   spi0 = spi_0;
+   spi1 = spi_1;
+   spi2 = spi_2;
};
 
cpus {
@@ -573,6 +576,116 @@
samsung,pmu-syscon = pmu_system_controller;
#phy-cells = 1;
};
+
+   amba {
+   #address-cells = 1;
+   #size-cells = 1;
+   compatible = arm,amba-bus;
+   interrupt-parent = gic;
+   ranges;
+
+   pdma1: pdma1@10EB {
+   compatible = arm,pl330, arm,primecell;
+   reg = 0x10EB 0x1000;
+   interrupts = 0 226 0;
+   clocks = clock_fsys0 ACLK_PDMA1;
+   clock-names = apb_pclk;
+   #dma-cells = 1;
+   #dma-channels = 8;
+   #dma-requests = 32;
+   };
+
+   pdma0: pdma0@10E1 {
+   compatible = arm,pl330, arm,primecell;
+   reg = 0x10E1 0x1000;
+   interrupts = 0 225 0;
+   clocks = clock_fsys0 ACLK_PDMA0;
+   clock-names = apb_pclk;
+   #dma-cells = 1;
+   #dma-channels = 8;
+   #dma-requests = 32;
+   };
+   };
+
+   spi_0: spi@14d2 {
+   compatible = samsung,exynos7-spi;
+   reg = 0x14d2 0x100;
+   interrupts = 0 464 0;
+   dmas = pdma0 7
+   pdma0 6;
+   dma-names = tx, rx;
+   #address-cells = 1;
+   #size-cells = 0;
+   clocks = clock_peric1 PCLK_SPI0, clock_peric1 
SCLK_SPI0;
+   clock-names = spi, spi_busclk0;
+   pinctrl-names = default;
+   pinctrl-0 = spi0_bus;
+   status = disabled;
+   };
+
+   spi_1: spi@14d3 {
+   compatible = samsung,exynos7-spi;
+   reg = 0x14d3 0x100;
+   interrupts = 0 465 0;
+   dmas = pdma0 9
+   pdma0 8;
+   dma-names = tx, rx;
+   #address-cells = 1;
+   #size-cells = 0;
+   clocks = clock_peric1 PCLK_SPI1, clock_peric1 
SCLK_SPI1;
+   clock-names = spi, spi_busclk0;
+   pinctrl-names = default;
+   pinctrl-0 = spi1_bus;
+   status = disabled;
+   };
+
+   spi_2: spi@14d4 {
+   compatible = samsung,exynos7-spi;
+   reg = 0x14d4 0x100;
+   interrupts = 0 466 0;
+   dmas = pdma0 11
+   pdma0 10;
+   dma-names = tx, rx;
+   #address-cells = 1;
+   #size-cells = 0;
+   clocks = clock_peric1 PCLK_SPI2, clock_peric1 
SCLK_SPI2;
+   clock-names = spi, spi_busclk0;
+   pinctrl-names = default;
+   pinctrl-0 = spi2_bus;
+   status = disabled;
+   };
+
+   spi_3: spi@14d5 {
+   compatible = samsung,exynos7-spi;
+   reg = 0x14d5 0x100;
+   interrupts = 0 467 0;
+   dmas = pdma0 13
+   pdma0 12;
+   dma-names = tx, rx;
+   #address-cells = 1;
+   #size-cells = 0;
+   clocks = clock_peric1 PCLK_SPI3, clock_peric1 
SCLK_SPI3;
+   clock-names = spi, spi_busclk0;
+   pinctrl-names = default;
+   pinctrl-0 = spi3_bus;
+   status = disabled;
+   };
+
+   

[PATCH] clk: samsung: exynos7: Fix fsys NR_CLK

2014-12-19 Thread Padmavathi Venna
Fix typo in fsys0 and fsys1 NR_CLK assignment

Signed-off-by: Padmavathi Venna padm...@samsung.com
---
 drivers/clk/samsung/clk-exynos7.c |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos7.c 
b/drivers/clk/samsung/clk-exynos7.c
index 3128593..3a56875 100644
--- a/drivers/clk/samsung/clk-exynos7.c
+++ b/drivers/clk/samsung/clk-exynos7.c
@@ -742,7 +742,7 @@ static struct samsung_cmu_info fsys0_cmu_info __initdata = {
.nr_mux_clks= ARRAY_SIZE(fsys0_mux_clks),
.gate_clks  = fsys0_gate_clks,
.nr_gate_clks   = ARRAY_SIZE(fsys0_gate_clks),
-   .nr_clk_ids = TOP1_NR_CLK,
+   .nr_clk_ids = FSYS0_NR_CLK,
.clk_regs   = fsys0_clk_regs,
.nr_clk_regs= ARRAY_SIZE(fsys0_clk_regs),
 };
@@ -793,7 +793,7 @@ static struct samsung_cmu_info fsys1_cmu_info __initdata = {
.nr_mux_clks= ARRAY_SIZE(fsys1_mux_clks),
.gate_clks  = fsys1_gate_clks,
.nr_gate_clks   = ARRAY_SIZE(fsys1_gate_clks),
-   .nr_clk_ids = TOP1_NR_CLK,
+   .nr_clk_ids = FSYS1_NR_CLK,
.clk_regs   = fsys1_clk_regs,
.nr_clk_regs= ARRAY_SIZE(fsys1_clk_regs),
 };
-- 
1.7.4.4

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[PATCH] arm64: dts: exynos7: Fix wrong base address of i2c7 bus

2014-12-19 Thread Padmavathi Venna
I2C7 base address corrected.

Signed-off-by: Padmavathi Venna padm...@samsung.com
---
 arch/arm64/boot/dts/exynos/exynos7.dtsi |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi 
b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index db7058a..84a57c8 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -386,9 +386,9 @@
status = disabled;
};
 
-   hsi2c_7: hsi2c@13e1 {
+   hsi2c_7: hsi2c@14e1 {
compatible = samsung,exynos7-hsi2c;
-   reg = 0x13e1 0x1000;
+   reg = 0x14e1 0x1000;
interrupts = 0 462 0;
#address-cells = 1;
#size-cells = 0;
-- 
1.7.4.4

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Re: [alsa-devel] [PATCH/RFC 00/14] ASoC: samsung: Add clk provider for I2S internal clocks

2014-12-19 Thread Sylwester Nawrocki
Hi Padma,

On 16/12/14 04:16, Padma Venkat wrote:
 Hi Sylwester,
 
 I need some more thought about interaction between the clk API calls on the
 clocks being exposed and the ASoC calls into sound/soc/samsung/i2s.c.
 I'm sending teh patches for review though to avoid any waste of time should
 it turn out the direction taken is wrong.

 This whole series definitely needs more testing, so far I only tested it
 on Odroid X2, with the I2S working in slave mode.
 
 your patches looks good to me. I did basic playback and capture test
 of your patches with i2s in master mode on exynos7.  I also added
 secondary dai for testing and verified playback. But I think some more
 testing required to check the serialization of registers. Tried aplay
 with front dai in background and with secondary dai in the foreground.
 But due to one issue on my system backend playback not working.

Thanks a lot for testing! I also tested concurrent playback with the
primary and the secondary DAI (on Exynos4412), enabling the secondary DAI
with a bit hackish patch as in this branch:
git://linuxtv.org/snawrocki/samsung.git sound/odroidx2-simple-card-v2
I'm planning to do necessary changes to enable the secondary DAI properly
with simple-card, once we're done with this series.

-- 
Regards,
Sylwester
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[PATCH v2 00/16] ASoC: samsung: Add clk provider for I2S internal clocks

2014-12-19 Thread Sylwester Nawrocki
This series is an attempt to resolve the CDCLK clock gating issue on Odroid
X2/U3 as reported by Daniel Drake [1], by exposing the CDCLK gate clock 
(and the two other clocks) through clk API. 

Changes since previous version:
 - removed check for the i2s_opclk1 mux input clock while creating the mux
   and div clocks,
 - the DT binding documentation changes reworked (addressing review comments),
 - added include/dt-bindings/sound/samsung-i2s.h header file defining
   the clk indices, it's been put into a separate patch together with the I2S 
   DT binding documentation updates to make merging of the ASoC and the dts
   patches separately easier,
 - a patch fixing compatible strings of I2S1, I2S2 in exynos4.dtsi is included
   in this series.

This whole series may need more testing on other SoCs, so far I only tested 
it on Odroid Exynos4412 X2, with the I2S working in slave mode.

[1] 
http://mailman.alsa-project.org/pipermail/alsa-devel/2014-September/081753.html

Sylwester Nawrocki (16):
  ASoC: samsung: i2s: Remove unused gpios field from struct i2s
  ASoC: samsung: i2s: samsung_i2s_get_driver_data() cleanup
  ASoC: samsung: i2s: Add return value checks in probe()
  ASoC: samsung: i2s: Request memory region in driver probe()
  ASoC: samsung: i2s: Move clk_get() to platform driver probe()
  ASoC: samsung: i2s: Move clk enable to the platform driver probe()
  ASoC: samsung: i2s: Add get_other_dai helper function
  ASoC: samsung: i2s: Remove an unneeded goto usage
  ASoC: samsung: i2s: Add spinlock in place of local_irq_* calls
  ASoC: samsung: i2s: Protect more registers with a spinlock
  ASoC: samsung: odroidx2: Handle I2S CDCLK clock conditionally
  ASoC: samsung: i2s: Add clk provider DT binding documentation
  ASoC: samsung: i2s: Add clock provider for the I2S internal clocks
  ARM: dts: Exynos4 and Odroid X2/U3 sound device nodes update
  ARM: dts: Switch Odroid X2/U2 to simple-audio-card
  ARM: dts: Fix I2S1, I2S2 compatible for exynos4 SoCs

 .../devicetree/bindings/sound/samsung-i2s.txt  |   22 ++
 arch/arm/boot/dts/exynos4.dtsi |   13 +-
 arch/arm/boot/dts/exynos4412-odroid-common.dtsi|   27 +-
 arch/arm/boot/dts/exynos4412-odroidu3.dts  |8 +-
 arch/arm/boot/dts/exynos4412-odroidx2.dts  |8 +-
 include/dt-bindings/sound/samsung-i2s.h|8 +
 sound/soc/samsung/i2s.c|  362 
 sound/soc/samsung/odroidx2_max98090.c  |6 +-
 8 files changed, 295 insertions(+), 159 deletions(-)
 create mode 100644 include/dt-bindings/sound/samsung-i2s.h

-- 
1.7.9.5

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[PATCH v2 02/16] ASoC: samsung: i2s: samsung_i2s_get_driver_data() cleanup

2014-12-19 Thread Sylwester Nawrocki
Tidy up the samsung_i2s_get_driver_data() function by using
IS_ENABLE() instead of #ifdef and add missing braces for
the 'else' part. Also ensure we are not dereferencing NULL
'match' pointer.

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
 sound/soc/samsung/i2s.c |9 -
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 827e4b4..430298c 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -1123,15 +1123,14 @@ static const struct of_device_id exynos_i2s_match[];
 static inline const struct samsung_i2s_dai_data *samsung_i2s_get_driver_data(
struct platform_device *pdev)
 {
-#ifdef CONFIG_OF
-   if (pdev-dev.of_node) {
+   if (IS_ENABLED(CONFIG_OF)  pdev-dev.of_node) {
const struct of_device_id *match;
match = of_match_node(exynos_i2s_match, pdev-dev.of_node);
-   return match-data;
-   } else
-#endif
+   return match ? match-data : NULL;
+   } else {
return (struct samsung_i2s_dai_data *)
platform_get_device_id(pdev)-driver_data;
+   }
 }
 
 #ifdef CONFIG_PM_RUNTIME
-- 
1.7.9.5

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[PATCH v2 03/16] ASoC: samsung: i2s: Add return value checks in probe()

2014-12-19 Thread Sylwester Nawrocki
These functions may fail so let's properly report any errors.

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
 sound/soc/samsung/i2s.c |   12 
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 430298c..8ab6734 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -1173,11 +1173,13 @@ static int samsung_i2s_probe(struct platform_device 
*pdev)
dev_err(pdev-dev, Unable to get drvdata\n);
return -EFAULT;
}
-   devm_snd_soc_register_component(sec_dai-pdev-dev,
+   ret = devm_snd_soc_register_component(sec_dai-pdev-dev,
samsung_i2s_component,
sec_dai-i2s_dai_drv, 1);
-   samsung_asoc_dma_platform_register(pdev-dev);
-   return 0;
+   if (ret != 0)
+   return ret;
+
+   return samsung_asoc_dma_platform_register(pdev-dev);
}
 
pri_dai = i2s_alloc_dai(pdev, false);
@@ -1290,7 +1292,9 @@ static int samsung_i2s_probe(struct platform_device *pdev)
 
pm_runtime_enable(pdev-dev);
 
-   samsung_asoc_dma_platform_register(pdev-dev);
+   ret = samsung_asoc_dma_platform_register(pdev-dev);
+   if (ret != 0)
+   return ret;
 
return 0;
 err:
-- 
1.7.9.5

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[PATCH v2 04/16] ASoC: samsung: i2s: Request memory region in driver probe()

2014-12-19 Thread Sylwester Nawrocki
The memory mapped registers region is common for both DAIs so request
it in the I2S platform device driver's probe for the platform device
corresponding to the primary DAI, rather than in the ASoC DAI's probe
callback. While at it switch to devm_ioremap_resource(). This also
drops the hard coded (0x100) register region size in the driver.

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
 sound/soc/samsung/i2s.c |   45 +++--
 1 file changed, 7 insertions(+), 38 deletions(-)

diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 8ab6734..6c7f956 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -59,10 +59,8 @@ struct samsung_i2s_dai_data {
 struct i2s_dai {
/* Platform device for this DAI */
struct platform_device *pdev;
-   /* IOREMAP'd SFRs */
+   /* Memory mapped SFR region */
void __iomem*addr;
-   /* Physical base address of SFRs */
-   u32 base;
/* Rate of RCLK source clock */
unsigned long rclk_srcrate;
/* Frame Clock */
@@ -979,16 +977,9 @@ static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
goto probe_exit;
}
 
-   i2s-addr = ioremap(i2s-base, 0x100);
-   if (i2s-addr == NULL) {
-   dev_err(i2s-pdev-dev, cannot ioremap registers\n);
-   return -ENXIO;
-   }
-
i2s-clk = clk_get(i2s-pdev-dev, iis);
if (IS_ERR(i2s-clk)) {
dev_err(i2s-pdev-dev, failed to get i2s_clock\n);
-   iounmap(i2s-addr);
return PTR_ERR(i2s-clk);
}
 
@@ -1001,7 +992,6 @@ static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
samsung_asoc_init_dma_data(dai, i2s-dma_playback, i2s-dma_capture);
 
if (other) {
-   other-addr = i2s-addr;
other-clk = i2s-clk;
}
 
@@ -1043,8 +1033,6 @@ static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
 
clk_disable_unprepare(i2s-clk);
clk_put(i2s-clk);
-
-   iounmap(i2s-addr);
}
 
i2s-clk = NULL;
@@ -1162,7 +1150,6 @@ static int samsung_i2s_probe(struct platform_device *pdev)
u32 regs_base, quirks = 0, idma_addr = 0;
struct device_node *np = pdev-dev.of_node;
const struct samsung_i2s_dai_data *i2s_dai_data;
-   int ret = 0;
 
/* Call during Seconday interface registration */
i2s_dai_data = samsung_i2s_get_driver_data(pdev);
@@ -1229,16 +1216,10 @@ static int samsung_i2s_probe(struct platform_device 
*pdev)
}
 
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-   if (!res) {
-   dev_err(pdev-dev, Unable to get I2S SFR address\n);
-   return -ENXIO;
-   }
+   pri_dai-addr = devm_ioremap_resource(pdev-dev, res);
+   if (IS_ERR(pri_dai-addr))
+   return PTR_ERR(pri_dai-addr);
 
-   if (!request_mem_region(res-start, resource_size(res),
-   samsung-i2s)) {
-   dev_err(pdev-dev, Unable to request SFR region\n);
-   return -EBUSY;
-   }
regs_base = res-start;
 
pri_dai-dma_playback.dma_addr = regs_base + I2STXD;
@@ -1247,7 +1228,6 @@ static int samsung_i2s_probe(struct platform_device *pdev)
pri_dai-dma_capture.ch_name = rx;
pri_dai-dma_playback.dma_size = 4;
pri_dai-dma_capture.dma_size = 4;
-   pri_dai-base = regs_base;
pri_dai-quirks = quirks;
pri_dai-variant_regs = i2s_dai_data-i2s_variant_regs;
 
@@ -1258,8 +1238,7 @@ static int samsung_i2s_probe(struct platform_device *pdev)
sec_dai = i2s_alloc_dai(pdev, true);
if (!sec_dai) {
dev_err(pdev-dev, Unable to alloc I2S_sec\n);
-   ret = -ENOMEM;
-   goto err;
+   return -ENOMEM;
}
 
sec_dai-variant_regs = pri_dai-variant_regs;
@@ -1273,7 +1252,7 @@ static int samsung_i2s_probe(struct platform_device *pdev)
}
 
sec_dai-dma_playback.dma_size = 4;
-   sec_dai-base = regs_base;
+   sec_dai-addr = pri_dai-addr;
sec_dai-quirks = quirks;
sec_dai-idma_playback.dma_addr = idma_addr;
sec_dai-pri_dai = pri_dai;
@@ -1282,8 +1261,7 @@ static int samsung_i2s_probe(struct platform_device *pdev)
 
if (i2s_pdata  i2s_pdata-cfg_gpio  i2s_pdata-cfg_gpio(pdev)) {
dev_err(pdev-dev, Unable to configure gpio\n);
-   ret = -EINVAL;
-   goto err;
+   return -EINVAL;
}
 
devm_snd_soc_register_component(pri_dai-pdev-dev,
@@ -1297,17 +1275,11 @@ static int samsung_i2s_probe(struct platform_device 
*pdev)
return ret;
 
return 0;
-err:
-   if (res)
-   

[PATCH v2 01/16] ASoC: samsung: i2s: Remove unused gpios field from struct i2s

2014-12-19 Thread Sylwester Nawrocki
The 'gpios' field in 'struct i2s' is now unused, this change
seems to be missing in commit 0429ffeff460c4302bd1520e6
(ASoC: samsung: Remove obsolete GPIO based DT pinmuxing).

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
 sound/soc/samsung/i2s.c |1 -
 1 file changed, 1 deletion(-)

diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index eca17dc..827e4b4 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -95,7 +95,6 @@ struct i2s_dai {
u32 suspend_i2smod;
u32 suspend_i2scon;
u32 suspend_i2spsr;
-   unsigned long gpios[7]; /* i2s gpio line numbers */
const struct samsung_i2s_variant_regs *variant_regs;
 };
 
-- 
1.7.9.5

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[PATCH v2 05/16] ASoC: samsung: i2s: Move clk_get() to platform driver probe()

2014-12-19 Thread Sylwester Nawrocki
Acquire the I2S interface clock in driver probe() callback
as it's a per-device not a per-DAI clock. While at it switch
to the resource managed clk_get().

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
 sound/soc/samsung/i2s.c |   19 +++
 1 file changed, 7 insertions(+), 12 deletions(-)

diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 6c7f956..7f967b2 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -971,18 +971,12 @@ static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
struct i2s_dai *other = i2s-pri_dai ? : i2s-sec_dai;
int ret;
 
-   if (other  other-clk) { /* If this is probe on secondary */
+   if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
samsung_asoc_init_dma_data(dai, other-sec_dai-dma_playback,
   NULL);
goto probe_exit;
}
 
-   i2s-clk = clk_get(i2s-pdev-dev, iis);
-   if (IS_ERR(i2s-clk)) {
-   dev_err(i2s-pdev-dev, failed to get i2s_clock\n);
-   return PTR_ERR(i2s-clk);
-   }
-
ret = clk_prepare_enable(i2s-clk);
if (ret != 0) {
dev_err(i2s-pdev-dev, failed to enable clock: %d\n, ret);
@@ -991,10 +985,6 @@ static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
 
samsung_asoc_init_dma_data(dai, i2s-dma_playback, i2s-dma_capture);
 
-   if (other) {
-   other-clk = i2s-clk;
-   }
-
if (i2s-quirks  QUIRK_NEED_RSTCLR)
writel(CON_RSTCLR, i2s-addr + I2SCON);
 
@@ -1032,7 +1022,6 @@ static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
writel(0, i2s-addr + I2SCON);
 
clk_disable_unprepare(i2s-clk);
-   clk_put(i2s-clk);
}
 
i2s-clk = NULL;
@@ -1222,6 +1211,11 @@ static int samsung_i2s_probe(struct platform_device 
*pdev)
 
regs_base = res-start;
 
+   pri_dai-clk = devm_clk_get(pdev-dev, iis);
+   if (IS_ERR(pri_dai-clk)) {
+   dev_err(pdev-dev, Failed to get iis clock\n);
+   return PTR_ERR(pri_dai-clk);
+   }
pri_dai-dma_playback.dma_addr = regs_base + I2STXD;
pri_dai-dma_capture.dma_addr = regs_base + I2SRXD;
pri_dai-dma_playback.ch_name = tx;
@@ -1253,6 +1247,7 @@ static int samsung_i2s_probe(struct platform_device *pdev)
 
sec_dai-dma_playback.dma_size = 4;
sec_dai-addr = pri_dai-addr;
+   sec_dai-clk = pri_dai-clk;
sec_dai-quirks = quirks;
sec_dai-idma_playback.dma_addr = idma_addr;
sec_dai-pri_dai = pri_dai;
-- 
1.7.9.5

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[PATCH v2 06/16] ASoC: samsung: i2s: Move clk enable to the platform driver probe()

2014-12-19 Thread Sylwester Nawrocki
Gating the I2S bus clock in the driver's runtime PM callbacks has
currently really no effect since the clock is being enabled
in the DAI's probe() and thus is permanently turned on. Now we just
move the enable to the platform driver's probe(), which doesn't
change the situation much. It will allow us to register a clock
provider already in samsung_i2s_probe() function.

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
 sound/soc/samsung/i2s.c |   25 +++--
 1 file changed, 11 insertions(+), 14 deletions(-)

diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 7f967b2..80b5362 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -969,7 +969,6 @@ static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
 {
struct i2s_dai *i2s = to_info(dai);
struct i2s_dai *other = i2s-pri_dai ? : i2s-sec_dai;
-   int ret;
 
if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
samsung_asoc_init_dma_data(dai, other-sec_dai-dma_playback,
@@ -977,12 +976,6 @@ static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
goto probe_exit;
}
 
-   ret = clk_prepare_enable(i2s-clk);
-   if (ret != 0) {
-   dev_err(i2s-pdev-dev, failed to enable clock: %d\n, ret);
-   return ret;
-   }
-
samsung_asoc_init_dma_data(dai, i2s-dma_playback, i2s-dma_capture);
 
if (i2s-quirks  QUIRK_NEED_RSTCLR)
@@ -1014,18 +1007,12 @@ probe_exit:
 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
 {
struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
-   struct i2s_dai *other = i2s-pri_dai ? : i2s-sec_dai;
-
-   if (!other || !other-clk) {
 
+   if (!is_secondary(i2s)) {
if (i2s-quirks  QUIRK_NEED_RSTCLR)
writel(0, i2s-addr + I2SCON);
-
-   clk_disable_unprepare(i2s-clk);
}
 
-   i2s-clk = NULL;
-
return 0;
 }
 
@@ -1139,6 +1126,7 @@ static int samsung_i2s_probe(struct platform_device *pdev)
u32 regs_base, quirks = 0, idma_addr = 0;
struct device_node *np = pdev-dev.of_node;
const struct samsung_i2s_dai_data *i2s_dai_data;
+   int ret;
 
/* Call during Seconday interface registration */
i2s_dai_data = samsung_i2s_get_driver_data(pdev);
@@ -1216,6 +1204,12 @@ static int samsung_i2s_probe(struct platform_device 
*pdev)
dev_err(pdev-dev, Failed to get iis clock\n);
return PTR_ERR(pri_dai-clk);
}
+
+   ret = clk_prepare_enable(pri_dai-clk);
+   if (ret != 0) {
+   dev_err(pdev-dev, failed to enable clock: %d\n, ret);
+   return ret;
+   }
pri_dai-dma_playback.dma_addr = regs_base + I2STXD;
pri_dai-dma_capture.dma_addr = regs_base + I2SRXD;
pri_dai-dma_playback.ch_name = tx;
@@ -1286,6 +1280,9 @@ static int samsung_i2s_remove(struct platform_device 
*pdev)
pm_runtime_disable(pdev-dev);
}
 
+   if (!is_secondary(i2s))
+   clk_disable_unprepare(i2s-clk);
+
i2s-pri_dai = NULL;
i2s-sec_dai = NULL;
 
-- 
1.7.9.5

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[PATCH v2 07/16] ASoC: samsung: i2s: Add get_other_dai helper function

2014-12-19 Thread Sylwester Nawrocki
The code to get pointer to the other DAI is repeated multiple
times. Add a helper function and use it instead.

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
 sound/soc/samsung/i2s.c |   24 +++-
 1 file changed, 15 insertions(+), 9 deletions(-)

diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 80b5362..c4d4ccc 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -130,10 +130,16 @@ static inline bool tx_active(struct i2s_dai *i2s)
return active ? true : false;
 }
 
+/* Return pointer to the other DAI */
+static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
+{
+   return i2s-pri_dai ? : i2s-sec_dai;
+}
+
 /* If the other interface of the controller is transmitting data */
 static inline bool other_tx_active(struct i2s_dai *i2s)
 {
-   struct i2s_dai *other = i2s-pri_dai ? : i2s-sec_dai;
+   struct i2s_dai *other = get_other_dai(i2s);
 
return tx_active(other);
 }
@@ -160,7 +166,7 @@ static inline bool rx_active(struct i2s_dai *i2s)
 /* If the other interface of the controller is receiving data */
 static inline bool other_rx_active(struct i2s_dai *i2s)
 {
-   struct i2s_dai *other = i2s-pri_dai ? : i2s-sec_dai;
+   struct i2s_dai *other = get_other_dai(i2s);
 
return rx_active(other);
 }
@@ -461,7 +467,7 @@ static int i2s_set_sysclk(struct snd_soc_dai *dai,
  int clk_id, unsigned int rfs, int dir)
 {
struct i2s_dai *i2s = to_info(dai);
-   struct i2s_dai *other = i2s-pri_dai ? : i2s-sec_dai;
+   struct i2s_dai *other = get_other_dai(i2s);
u32 mod = readl(i2s-addr + I2SMOD);
const struct samsung_i2s_variant_regs *i2s_regs = i2s-variant_regs;
unsigned int cdcon_mask = 1  i2s_regs-cdclkcon_off;
@@ -733,7 +739,7 @@ static int i2s_startup(struct snd_pcm_substream *substream,
  struct snd_soc_dai *dai)
 {
struct i2s_dai *i2s = to_info(dai);
-   struct i2s_dai *other = i2s-pri_dai ? : i2s-sec_dai;
+   struct i2s_dai *other = get_other_dai(i2s);
unsigned long flags;
 
spin_lock_irqsave(lock, flags);
@@ -760,7 +766,7 @@ static void i2s_shutdown(struct snd_pcm_substream 
*substream,
struct snd_soc_dai *dai)
 {
struct i2s_dai *i2s = to_info(dai);
-   struct i2s_dai *other = i2s-pri_dai ? : i2s-sec_dai;
+   struct i2s_dai *other = get_other_dai(i2s);
unsigned long flags;
const struct samsung_i2s_variant_regs *i2s_regs = i2s-variant_regs;
 
@@ -791,7 +797,7 @@ static void i2s_shutdown(struct snd_pcm_substream 
*substream,
 
 static int config_setup(struct i2s_dai *i2s)
 {
-   struct i2s_dai *other = i2s-pri_dai ? : i2s-sec_dai;
+   struct i2s_dai *other = get_other_dai(i2s);
unsigned rfs, bfs, blc;
u32 psr;
 
@@ -899,7 +905,7 @@ static int i2s_set_clkdiv(struct snd_soc_dai *dai,
int div_id, int div)
 {
struct i2s_dai *i2s = to_info(dai);
-   struct i2s_dai *other = i2s-pri_dai ? : i2s-sec_dai;
+   struct i2s_dai *other = get_other_dai(i2s);
 
switch (div_id) {
case SAMSUNG_I2S_DIV_BCLK:
@@ -968,7 +974,7 @@ static int i2s_resume(struct snd_soc_dai *dai)
 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
 {
struct i2s_dai *i2s = to_info(dai);
-   struct i2s_dai *other = i2s-pri_dai ? : i2s-sec_dai;
+   struct i2s_dai *other = get_other_dai(i2s);
 
if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
samsung_asoc_init_dma_data(dai, other-sec_dai-dma_playback,
@@ -1271,7 +1277,7 @@ static int samsung_i2s_remove(struct platform_device 
*pdev)
struct i2s_dai *i2s, *other;
 
i2s = dev_get_drvdata(pdev-dev);
-   other = i2s-pri_dai ? : i2s-sec_dai;
+   other = get_other_dai(i2s);
 
if (other) {
other-pri_dai = NULL;
-- 
1.7.9.5

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[PATCH v2 08/16] ASoC: samsung: i2s: Remove an unneeded goto usage

2014-12-19 Thread Sylwester Nawrocki
The usage of this goto seems unjustified, use if/else statement instead.

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
 sound/soc/samsung/i2s.c |   17 -
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index c4d4ccc..cd66e58 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -979,19 +979,18 @@ static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
samsung_asoc_init_dma_data(dai, other-sec_dai-dma_playback,
   NULL);
-   goto probe_exit;
-   }
-
-   samsung_asoc_init_dma_data(dai, i2s-dma_playback, i2s-dma_capture);
+   } else {
+   samsung_asoc_init_dma_data(dai, i2s-dma_playback,
+  i2s-dma_capture);
 
-   if (i2s-quirks  QUIRK_NEED_RSTCLR)
-   writel(CON_RSTCLR, i2s-addr + I2SCON);
+   if (i2s-quirks  QUIRK_NEED_RSTCLR)
+   writel(CON_RSTCLR, i2s-addr + I2SCON);
 
-   if (i2s-quirks  QUIRK_SUPPORTS_IDMA)
-   idma_reg_addr_init(i2s-addr,
+   if (i2s-quirks  QUIRK_SUPPORTS_IDMA)
+   idma_reg_addr_init(i2s-addr,
i2s-sec_dai-idma_playback.dma_addr);
+   }
 
-probe_exit:
/* Reset any constraint on RFS and BFS */
i2s-rfs = 0;
i2s-bfs = 0;
-- 
1.7.9.5

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[PATCH v2 10/16] ASoC: samsung: i2s: Protect more registers with a spinlock

2014-12-19 Thread Sylwester Nawrocki
Ensure the I2SMOD, I2SPSR registers, which are also exposed through
clk API are only accessed with the i2s-spinlock spinlock held.

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
 sound/soc/samsung/i2s.c |   81 +--
 1 file changed, 51 insertions(+), 30 deletions(-)

diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index b5b6b1e..49ba623 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -472,17 +472,22 @@ static int i2s_set_sysclk(struct snd_soc_dai *dai,
 {
struct i2s_dai *i2s = to_info(dai);
struct i2s_dai *other = get_other_dai(i2s);
-   u32 mod = readl(i2s-addr + I2SMOD);
const struct samsung_i2s_variant_regs *i2s_regs = i2s-variant_regs;
unsigned int cdcon_mask = 1  i2s_regs-cdclkcon_off;
unsigned int rsrc_mask = 1  i2s_regs-rclksrc_off;
+   u32 mod, mask, val = 0;
+
+   spin_lock(i2s-lock);
+   mod = readl(i2s-addr + I2SMOD);
+   spin_unlock(i2s-lock);
 
switch (clk_id) {
case SAMSUNG_I2S_OPCLK:
-   mod = ~MOD_OPCLK_MASK;
-   mod |= dir;
+   mask = MOD_OPCLK_MASK;
+   val = dir;
break;
case SAMSUNG_I2S_CDCLK:
+   mask = 1  i2s_regs-cdclkcon_off;
/* Shouldn't matter in GATING(CLOCK_IN) mode */
if (dir == SND_SOC_CLOCK_IN)
rfs = 0;
@@ -499,15 +504,15 @@ static int i2s_set_sysclk(struct snd_soc_dai *dai,
}
 
if (dir == SND_SOC_CLOCK_IN)
-   mod |= 1  i2s_regs-cdclkcon_off;
-   else
-   mod = ~(1  i2s_regs-cdclkcon_off);
+   val = 1  i2s_regs-cdclkcon_off;
 
i2s-rfs = rfs;
break;
 
case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
+   mask = 1  i2s_regs-rclksrc_off;
+
if ((i2s-quirks  QUIRK_NO_MUXPSR)
|| (clk_id == SAMSUNG_I2S_RCLKSRC_0))
clk_id = 0;
@@ -557,18 +562,19 @@ static int i2s_set_sysclk(struct snd_soc_dai *dai,
return 0;
}
 
-   if (clk_id == 0)
-   mod = ~(1  i2s_regs-rclksrc_off);
-   else
-   mod |= 1  i2s_regs-rclksrc_off;
-
+   if (clk_id == 1)
+   val = 1  i2s_regs-rclksrc_off;
break;
default:
dev_err(i2s-pdev-dev, We don't serve that!\n);
return -EINVAL;
}
 
+   spin_lock(i2s-lock);
+   mod = readl(i2s-addr + I2SMOD);
+   mod = (mod  ~mask) | val;
writel(mod, i2s-addr + I2SMOD);
+   spin_unlock(i2s-lock);
 
return 0;
 }
@@ -577,9 +583,8 @@ static int i2s_set_fmt(struct snd_soc_dai *dai,
unsigned int fmt)
 {
struct i2s_dai *i2s = to_info(dai);
-   u32 mod = readl(i2s-addr + I2SMOD);
int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
-   u32 tmp = 0;
+   u32 mod, tmp = 0;
 
lrp_shift = i2s-variant_regs-lrp_off;
sdf_shift = i2s-variant_regs-sdf_off;
@@ -639,12 +644,15 @@ static int i2s_set_fmt(struct snd_soc_dai *dai,
return -EINVAL;
}
 
+   spin_lock(i2s-lock);
+   mod = readl(i2s-addr + I2SMOD);
/*
 * Don't change the I2S mode if any controller is active on this
 * channel.
 */
if (any_active(i2s) 
((mod  (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
+   spin_unlock(i2s-lock);
dev_err(i2s-pdev-dev,
%s:%d Other DAI busy\n, __func__, __LINE__);
return -EAGAIN;
@@ -653,6 +661,7 @@ static int i2s_set_fmt(struct snd_soc_dai *dai,
mod = ~(sdf_mask | lrp_rlow | mod_slave);
mod |= tmp;
writel(mod, i2s-addr + I2SMOD);
+   spin_unlock(i2s-lock);
 
return 0;
 }
@@ -661,16 +670,16 @@ static int i2s_hw_params(struct snd_pcm_substream 
*substream,
struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 {
struct i2s_dai *i2s = to_info(dai);
-   u32 mod = readl(i2s-addr + I2SMOD);
+   u32 mod, mask = 0, val = 0;
 
if (!is_secondary(i2s))
-   mod = ~(MOD_DC2_EN | MOD_DC1_EN);
+   mask |= (MOD_DC2_EN | MOD_DC1_EN);
 
switch (params_channels(params)) {
case 6:
-   mod |= MOD_DC2_EN;
+   val |= MOD_DC2_EN;
case 4:
-   mod |= MOD_DC1_EN;
+   val |= MOD_DC1_EN;
break;
case 2:
if (substream-stream == SNDRV_PCM_STREAM_PLAYBACK)
@@ -692,44 +701,49 @@ static int i2s_hw_params(struct snd_pcm_substream 
*substream,
}
 
if 

[PATCH v2 12/16] ASoC: samsung: i2s: Add clk provider DT binding documentation

2014-12-19 Thread Sylwester Nawrocki
The new DT properties required for the I2S device node to be referred
as a clock provider and corresponding clock indices definition is added.

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
 .../devicetree/bindings/sound/samsung-i2s.txt  |   22 
 include/dt-bindings/sound/samsung-i2s.h|8 +++
 2 files changed, 30 insertions(+)
 create mode 100644 include/dt-bindings/sound/samsung-i2s.h

diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.txt 
b/Documentation/devicetree/bindings/sound/samsung-i2s.txt
index d188296..09e0e18 100644
--- a/Documentation/devicetree/bindings/sound/samsung-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/samsung-i2s.txt
@@ -33,6 +33,25 @@ Required SoC Specific Properties:
   iis is the i2s bus clock and i2s_opclk0, i2s_opclk1 are sources of the root
   clk. i2s0 has internal mux to select the source of root clk and i2s1 and i2s2
   doesn't have any such mux.
+- #clock-cells: should be 1, this property must be present if the I2S device
+  is a clock provider in terms of the common clock bindings, described in
+  ../clock/clock-bindings.txt.
+- clock-output-names: from the common clock bindings, names of the CDCLK
+  I2S output clocks, suggested values are i2s_cdclk0, i2s_cdclk1,
+  i2s_cdclk3 for the I2S0, I2S1, I2S2 devices recpectively.
+
+There are following clocks available at the I2S device nodes:
+ CLK_I2S_CDCLK- the CDCLK (CODECLKO) gate clock,
+ CLK_I2S_RCLK_PSR - the RCLK prescaler divider clock (corresponding to the
+   IISPSR register),
+ CLK_I2S_RCLK_SRC - the RCLKSRC mux clock (corresponding to RCLKSRC bit in
+   IISMOD register).
+
+Refer to the SoC datasheet for availability of the above clocks.
+The CLK_I2S_RCLK_PSR and CLK_I2S_RCLK_SRC clocks are usually only available
+in the IIS Multi Audio Interface (I2S0).
+Note: Old DTs may not have the #clock-cells, clock-output-names properties
+and then not use the I2S node as a clock supplier.
 
 Optional SoC Specific Properties:
 
@@ -41,6 +60,7 @@ Optional SoC Specific Properties:
 - pinctrl-0: Should specify pin control groups used for this controller.
 - pinctrl-names: Should contain only one value - default.
 
+
 Example:
 
 i2s0: i2s@0383 {
@@ -54,6 +74,8 @@ i2s0: i2s@0383 {
clock_audss EXYNOS_I2S_BUS,
clock_audss EXYNOS_SCLK_I2S;
clock-names = iis, i2s_opclk0, i2s_opclk1;
+   #clock-cells;
+   clock-output-names = i2s_cdclk0;
samsung,idma-addr = 0x0300;
pinctrl-names = default;
pinctrl-0 = i2s0_bus;
diff --git a/include/dt-bindings/sound/samsung-i2s.h 
b/include/dt-bindings/sound/samsung-i2s.h
new file mode 100644
index 000..0c69818d
--- /dev/null
+++ b/include/dt-bindings/sound/samsung-i2s.h
@@ -0,0 +1,8 @@
+#ifndef _DT_BINDINGS_SAMSUNG_I2S_H
+#define _DT_BINDINGS_SAMSUNG_I2S_H
+
+#define CLK_I2S_CDCLK  0
+#define CLK_I2S_RCLK_SRC   1
+#define CLK_I2S_RCLK_PSR   2
+
+#endif /* _DT_BINDINGS_SAMSUNG_I2S_H */
-- 
1.7.9.5

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[PATCH v2 11/16] ASoC: samsung: odroidx2: Handle I2S CDCLK clock conditionally

2014-12-19 Thread Sylwester Nawrocki
In order to support old DTs we check the codec device node if it
contains clocks property and only if it doesn't (which indicates
an old DT) we proceed with enabling the CDCLK clock by means of
the set_sysclk() callback.  For new DTs which use the common clock
bindings for CDCLK that clock is supposed to be handled outside
the sound machine driver.

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
 sound/soc/samsung/odroidx2_max98090.c |6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/sound/soc/samsung/odroidx2_max98090.c 
b/sound/soc/samsung/odroidx2_max98090.c
index d7640e7..5a87794 100644
--- a/sound/soc/samsung/odroidx2_max98090.c
+++ b/sound/soc/samsung/odroidx2_max98090.c
@@ -21,6 +21,8 @@ struct odroidx2_drv_data {
 /* The I2S CDCLK output clock frequency for the MAX98090 codec */
 #define MAX98090_MCLK 1920
 
+static struct snd_soc_dai_link odroidx2_dai[];
+
 static int odroidx2_late_probe(struct snd_soc_card *card)
 {
struct snd_soc_dai *codec_dai = card-rtd[0].codec_dai;
@@ -29,7 +31,9 @@ static int odroidx2_late_probe(struct snd_soc_card *card)
 
ret = snd_soc_dai_set_sysclk(codec_dai, 0, MAX98090_MCLK,
SND_SOC_CLOCK_IN);
-   if (ret  0)
+
+   if (ret  0 || of_find_property(odroidx2_dai[0].codec_of_node,
+   clocks, NULL))
return ret;
 
/* Set the cpu DAI configuration in order to use CDCLK */
-- 
1.7.9.5

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[PATCH v2 09/16] ASoC: samsung: i2s: Add spinlock in place of local_irq_* calls

2014-12-19 Thread Sylwester Nawrocki
It seems this driver hasn't been updated for SMP, as local_irq_save/
local_irq_restore don't provide proper protection of read/modify/write
of the device's registers on such systems. Introduce a spinlock
serializing access to the register region, it will be helpful later
when I2SMOD, I2SPSR registers are made also accessible through the
clk API.

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
 sound/soc/samsung/i2s.c |   18 +-
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index cd66e58..b5b6b1e 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -94,6 +94,10 @@ struct i2s_dai {
u32 suspend_i2scon;
u32 suspend_i2spsr;
const struct samsung_i2s_variant_regs *variant_regs;
+
+   /* Spinlock protecting access to the device's registers */
+   spinlock_t spinlock;
+   spinlock_t *lock;
 };
 
 /* Lock for cross i/f checks */
@@ -867,10 +871,10 @@ static int i2s_trigger(struct snd_pcm_substream 
*substream,
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
-   local_irq_save(flags);
+   spin_lock_irqsave(i2s-lock, flags);
 
if (config_setup(i2s)) {
-   local_irq_restore(flags);
+   spin_unlock_irqrestore(i2s-lock, flags);
return -EINVAL;
}
 
@@ -879,12 +883,12 @@ static int i2s_trigger(struct snd_pcm_substream 
*substream,
else
i2s_txctrl(i2s, 1);
 
-   local_irq_restore(flags);
+   spin_unlock_irqrestore(i2s-lock, flags);
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
-   local_irq_save(flags);
+   spin_lock_irqsave(i2s-lock, flags);
 
if (capture) {
i2s_rxctrl(i2s, 0);
@@ -894,7 +898,7 @@ static int i2s_trigger(struct snd_pcm_substream *substream,
i2s_fifo(i2s, FIC_TXFLUSH);
}
 
-   local_irq_restore(flags);
+   spin_unlock_irqrestore(i2s-lock, flags);
break;
}
 
@@ -1157,6 +1161,9 @@ static int samsung_i2s_probe(struct platform_device *pdev)
return -ENOMEM;
}
 
+   spin_lock_init(pri_dai-spinlock);
+   pri_dai-lock = pri_dai-spinlock;
+
if (!np) {
res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
if (!res) {
@@ -1234,6 +1241,7 @@ static int samsung_i2s_probe(struct platform_device *pdev)
return -ENOMEM;
}
 
+   sec_dai-lock = pri_dai-spinlock;
sec_dai-variant_regs = pri_dai-variant_regs;
sec_dai-dma_playback.dma_addr = regs_base + I2STXDS;
sec_dai-dma_playback.ch_name = tx-sec;
-- 
1.7.9.5

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[PATCH v2 13/16] ASoC: samsung: i2s: Add clock provider for the I2S internal clocks

2014-12-19 Thread Sylwester Nawrocki
This patch adds a clock provider (currently only for DT platforms) for
the CODECLKO (CDCLK) gate, RCLKSRC mux and RCLK pre-scaler divider clock.
All these tree clocks are only available in the IIS Multi Audio Interface
(I2S0), the regular IIS Bus Interface has only CDCLK gate clock.

With that in place the simple-card can be used for the Odroid X2/U3,
and likely for more boards which now use a dedicated sound machine
drivers.

This also resolvesthe CDCLK gating issue reported by Daniel Drake:
http://mailman.alsa-project.org/pipermail/alsa-devel/2014-September/081753.html

This patch also reverts commit b97c60abf9a561f86ae71bd741add02673cc1
(ASoC: samsung-i2s: Maintain CDCLK settings across i2s_{shutdown/
startup}) The problem that commit attempted to solve only affects
the Odroid X2/U3, which doesn't configure the CDCLK clock in
struct snd_soc_dai_ops hw_params callback and the issue should be
now resolved by using clk API, i.e. having the codec enabling/
disabling the CDCLK clock as required.

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
 sound/soc/samsung/i2s.c |  113 ++-
 1 file changed, 93 insertions(+), 20 deletions(-)

diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 49ba623..8846906 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -10,9 +10,11 @@
  * published by the Free Software Foundation.
  */

+#include dt-bindings/sound/samsung-i2s.h
 #include linux/delay.h
 #include linux/slab.h
 #include linux/clk.h
+#include linux/clk-provider.h
 #include linux/io.h
 #include linux/module.h
 #include linux/of.h
@@ -81,8 +83,6 @@ struct i2s_dai {
 #define DAI_OPENED (1  0) /* Dai is opened */
 #define DAI_MANAGER(1  1) /* Dai is the manager */
unsigned mode;
-   /* CDCLK pin direction: 0  - input, 1 - output */
-   unsigned int cdclk_out:1;
/* Driver for this DAI */
struct snd_soc_dai_driver i2s_dai_drv;
/* DMA parameters */
@@ -98,6 +98,10 @@ struct i2s_dai {
/* Spinlock protecting access to the device's registers */
spinlock_t spinlock;
spinlock_t *lock;
+
+   /* Below fields are only valid if this is the primary FIFO */
+   struct clk *clk_table[3];
+   struct clk_onecell_data clk_data;
 };

 /* Lock for cross i/f checks */
@@ -774,9 +778,6 @@ static int i2s_startup(struct snd_pcm_substream *substream,

spin_unlock_irqrestore(lock, flags);

-   if (!is_opened(other)  i2s-cdclk_out)
-   i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
-   0, SND_SOC_CLOCK_OUT);
return 0;
 }

@@ -786,31 +787,20 @@ static void i2s_shutdown(struct snd_pcm_substream 
*substream,
struct i2s_dai *i2s = to_info(dai);
struct i2s_dai *other = get_other_dai(i2s);
unsigned long flags;
-   const struct samsung_i2s_variant_regs *i2s_regs = i2s-variant_regs;

spin_lock_irqsave(lock, flags);

i2s-mode = ~DAI_OPENED;
i2s-mode = ~DAI_MANAGER;

-   if (is_opened(other)) {
+   if (is_opened(other))
other-mode |= DAI_MANAGER;
-   } else {
-   u32 mod = readl(i2s-addr + I2SMOD);
-   i2s-cdclk_out = !(mod  (1  i2s_regs-cdclkcon_off));
-   if (other)
-   other-cdclk_out = i2s-cdclk_out;
-   }
+
/* Reset any constraint on RFS and BFS */
i2s-rfs = 0;
i2s-bfs = 0;

spin_unlock_irqrestore(lock, flags);
-
-   /* Gate CDCLK by default */
-   if (!is_opened(other))
-   i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
-   0, SND_SOC_CLOCK_IN);
 }

 static int config_setup(struct i2s_dai *i2s)
@@ -1147,6 +1137,87 @@ static int i2s_runtime_resume(struct device *dev)
 }
 #endif /* CONFIG_PM_RUNTIME */

+static void i2s_unregister_clocks(struct i2s_dai *i2s)
+{
+   int i;
+
+   for (i = 0; i  i2s-clk_data.clk_num; i++) {
+   if (!IS_ERR(i2s-clk_table[i]))
+   clk_unregister(i2s-clk_table[i]);
+   }
+}
+
+static void i2s_unregister_clock_provider(struct platform_device *pdev)
+{
+   struct i2s_dai *i2s = dev_get_drvdata(pdev-dev);
+
+   of_clk_del_provider(pdev-dev.of_node);
+   i2s_unregister_clocks(i2s);
+}
+
+static int i2s_register_clock_provider(struct platform_device *pdev)
+{
+   struct device *dev = pdev-dev;
+   struct i2s_dai *i2s = dev_get_drvdata(dev);
+   const char *clk_name[2] = { i2s_opclk0, i2s_opclk1 };
+   const char *p_names[2] = { NULL };
+   const struct samsung_i2s_variant_regs *reg_info = i2s-variant_regs;
+   struct clk *rclksrc;
+   int ret, i;
+
+   /* Register the clock provider only if it's expected in the DTB */
+   if (!of_find_property(dev-of_node, #clock-cells, NULL))
+   return 0;
+
+   /* Get the RCLKSRC mux clock parent clock names */
+   for (i = 0; i  ARRAY_SIZE(p_names); 

[PATCH v2 14/16] ARM: dts: Exynos4 and Odroid X2/U3 sound device nodes update

2014-12-19 Thread Sylwester Nawrocki
Clock related properties are added to the Exynos4 I2S device nodes
so they can be referred to as clock providers. Missing i2s_opclk1
clock is added to the I2S0 node and clock properties are added
to the MAX98090 codec node to allow it to control/read frequency
of the MCLK clock directly.

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
 arch/arm/boot/dts/exynos4.dtsi  |6 ++
 arch/arm/boot/dts/exynos4412-odroid-common.dtsi |8 ++--
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index e0278ec..e1ce457 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -61,6 +61,8 @@
reg = 0x0383 0x100;
clocks = clock_audss EXYNOS_I2S_BUS;
clock-names = iis;
+   #clock-cells = 1;
+   clock-output-names = i2s_cdclk0;
dmas = pdma0 12, pdma0 11, pdma0 10;
dma-names = tx, rx, tx-sec;
samsung,idma-addr = 0x0300;
@@ -372,6 +374,8 @@
reg = 0x1396 0x100;
clocks = clock CLK_I2S1;
clock-names = iis;
+   #clock-cells = 1;
+   clock-output-names = i2s_cdclk1;
dmas = pdma1 12, pdma1 11;
dma-names = tx, rx;
status = disabled;
@@ -382,6 +386,8 @@
reg = 0x1397 0x100;
clocks = clock CLK_I2S2;
clock-names = iis;
+   #clock-cells = 1;
+   clock-output-names = i2s_cdclk2;
dmas = pdma0 14, pdma0 13;
dma-names = tx, rx;
status = disabled;
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi 
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index b41950f..9ccdc1f 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -7,6 +7,7 @@
  * published by the Free Software Foundation.
 */
 
+#include dt-bindings/sound/samsung-i2s.h
 #include dt-bindings/input/input.h
 #include exynos4412.dtsi
 
@@ -37,8 +38,9 @@
pinctrl-names = default;
status = okay;
clocks = clock_audss EXYNOS_I2S_BUS,
-clock_audss EXYNOS_DOUT_AUD_BUS;
-   clock-names = iis, i2s_opclk0;
+clock_audss EXYNOS_DOUT_AUD_BUS,
+clock_audss EXYNOS_SCLK_I2S;
+   clock-names = iis, i2s_opclk0, i2s_opclk1;
};
 
sound: sound {
@@ -357,6 +359,8 @@
reg = 0x10;
interrupt-parent = gpx0;
interrupts = 0 0;
+   clocks = i2s0 CLK_I2S_CDCLK;
+   clock-names = mclk;
};
};
 
-- 
1.7.9.5

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[PATCH v2 15/16] ARM: dts: Switch Odroid X2/U2 to simple-audio-card

2014-12-19 Thread Sylwester Nawrocki
Now when the CDCLK I2S output clock can be handled through the clock
API the Odroid X2/U3 can be switched to the simple-audio-card DT binding.

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
 arch/arm/boot/dts/exynos4.dtsi  |3 +++
 arch/arm/boot/dts/exynos4412-odroid-common.dtsi |   19 ---
 arch/arm/boot/dts/exynos4412-odroidu3.dts   |8 +---
 arch/arm/boot/dts/exynos4412-odroidx2.dts   |8 ++--
 4 files changed, 30 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index e1ce457..5f9e72f 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -66,6 +66,7 @@
dmas = pdma0 12, pdma0 11, pdma0 10;
dma-names = tx, rx, tx-sec;
samsung,idma-addr = 0x0300;
+   #sound-dai-cells = 1;
status = disabled;
};
 
@@ -378,6 +379,7 @@
clock-output-names = i2s_cdclk1;
dmas = pdma1 12, pdma1 11;
dma-names = tx, rx;
+   #sound-dai-cells = 1;
status = disabled;
};
 
@@ -390,6 +392,7 @@
clock-output-names = i2s_cdclk2;
dmas = pdma0 14, pdma0 13;
dma-names = tx, rx;
+   #sound-dai-cells = 1;
status = disabled;
};
 
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi 
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index 9ccdc1f..051343e 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -44,9 +44,7 @@
};
 
sound: sound {
-   compatible = samsung,odroidx2-audio;
-   samsung,i2s-controller = i2s0;
-   samsung,audio-codec = max98090;
+   compatible = simple-audio-card;
assigned-clocks = clock_audss EXYNOS_MOUT_AUDSS,
clock_audss EXYNOS_MOUT_I2S,
clock_audss EXYNOS_DOUT_SRP,
@@ -57,6 +55,20 @@
0,
19200,
1920;
+
+   simple-audio-card,format = i2s;
+   simple-audio-card,bitclock-master = link0_codec;
+   simple-audio-card,frame-master = link0_codec;
+
+   simple-audio-card,cpu {
+   sound-dai = i2s0 0;
+   system-clock-frequency = 1920;
+   };
+
+   link0_codec: simple-audio-card,codec {
+   sound-dai = max98090;
+   clocks = i2s0 CLK_I2S_CDCLK;
+   };
};
 
mmc@1255 {
@@ -361,6 +373,7 @@
interrupts = 0 0;
clocks = i2s0 CLK_I2S_CDCLK;
clock-names = mclk;
+   #sound-dai-cells = 0;
};
};
 
diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts 
b/arch/arm/boot/dts/exynos4412-odroidu3.dts
index c8a64be..44684e5 100644
--- a/arch/arm/boot/dts/exynos4412-odroidu3.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts
@@ -49,9 +49,11 @@
 };
 
 sound {
-   compatible = samsung,odroidu3-audio;
-   samsung,model = Odroid-U3;
-   samsung,audio-routing =
+   simple-audio-card,name = Odroid-U3;
+   simple-audio-card,widgets =
+   Headphone, Headphone Jack,
+   Speakers, Speakers;
+   simple-audio-card,routing =
Headphone Jack, HPL,
Headphone Jack, HPR,
Headphone Jack, MICBIAS,
diff --git a/arch/arm/boot/dts/exynos4412-odroidx2.dts 
b/arch/arm/boot/dts/exynos4412-odroidx2.dts
index 96b43f4..6e33678 100644
--- a/arch/arm/boot/dts/exynos4412-odroidx2.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx2.dts
@@ -23,8 +23,12 @@
 };
 
 sound {
-   samsung,model = Odroid-X2;
-   samsung,audio-routing =
+   simple-audio-card,name = Odroid-X2;
+   simple-audio-card,widgets =
+   Headphone, Headphone Jack,
+   Microphone, Mic Jack,
+   Microphone, DMIC;
+   simple-audio-card,routing =
Headphone Jack, HPL,
Headphone Jack, HPR,
IN1, Mic Jack,
-- 
1.7.9.5

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[PATCH v2 16/16] ARM: dts: Fix I2S1, I2S2 compatible for exynos4 SoCs

2014-12-19 Thread Sylwester Nawrocki
I2S1, I2S2 on Exynos4 SoC series have limited functionality compared
to I2S0, samsung,s3c6410-i2s compatible should be used for them.

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
 arch/arm/boot/dts/exynos4.dtsi |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 5f9e72f..71dc876 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -371,7 +371,7 @@
};
 
i2s1: i2s@1396 {
-   compatible = samsung,s5pv210-i2s;
+   compatible = samsung,s3c6410-i2s;
reg = 0x1396 0x100;
clocks = clock CLK_I2S1;
clock-names = iis;
@@ -384,7 +384,7 @@
};
 
i2s2: i2s@1397 {
-   compatible = samsung,s5pv210-i2s;
+   compatible = samsung,s3c6410-i2s;
reg = 0x1397 0x100;
clocks = clock CLK_I2S2;
clock-names = iis;
-- 
1.7.9.5

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Re: [PATCH] ARM: SAMSUNG: remove dead #elif CONFIG_S3C24XX_DMAC

2014-12-19 Thread Stefan Hengelein
From what i can see, the block was already dead when it was introduced.
d2193ce2 changed the if ARCH_S3C64XX into the Kconfig file itself,
before it was around the source statement in arch/arm/Kconfig

if there are really just downstream users that explicitly have to add
a statement to select S3C64XX_DEV_SPI0 and therefore add the
possibility to enable the block i want to remove, i'd argue that these
downstream users could also add the block itself. I'm not sure how
intuitive it might be for downstream users to add a select in Kconfig
to enable their machine to communicate with a device, but i'm also not
familiar with the hardware we're talking about.

However, i'd prefer to have a consistent upstream state and leave
these problems to downstream users, but that's for the Maintainer to
decide :)



2014-12-18 20:03 GMT+01:00 Heiko Stübner he...@sntech.de:
 Hi Stefan,

 Am Donnerstag, 18. Dezember 2014, 14:43:01 schrieb Stefan Hengelein:
 So you actually tested the code I removed in the patch? can you
 provide a configuration that compiles that piece of code?

 Yep, one of my boards (Asus eeeReader DR-900) was actually able to transmit
 stuff via the libertas spi wifi driver using the s3c64xx-spi driver.

 The smdk2416 is currently the only board for the s3c2416 in the kernel. I 
 don't
 know if it had actual spi devices connected, but if it had, a suitable diff 
 would
 look something like the diff below. Of course hooking up spi devices would
 work the same in any out-of-tree board for the supported socs.


 For people reading along, the s3c24xx spi distribution is as follows:
 s3c2410, s3c2412, s3c2440: (I think) two s3c24xx-spi
 s3c2443: one s3c64xx-spi and one s3c24xx-spi
 s3c2416: one s3c64xx-spi
 s3c2450: two s3c64xx-spi


 Heiko


  8 
 diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
 index 9eb2229..5210e5d 100644
 --- a/arch/arm/mach-s3c24xx/Kconfig
 +++ b/arch/arm/mach-s3c24xx/Kconfig
 @@ -419,6 +419,8 @@ config MACH_SMDK2416
 select S3C_DEV_HSMMC1
 select S3C_DEV_NAND
 select S3C_DEV_USB_HOST
 +   select S3C64XX_DEV_SPI0
 +   select S3C2443_SETUP_SPI
 help
   Say Y here if you are using an SMDK2416

 diff --git a/arch/arm/mach-s3c24xx/mach-smdk2416.c 
 b/arch/arm/mach-s3c24xx/mach-smdk2416.c
 index 86394f7..b6c6ff4 100644
 --- a/arch/arm/mach-s3c24xx/mach-smdk2416.c
 +++ b/arch/arm/mach-s3c24xx/mach-smdk2416.c
 @@ -52,6 +52,9 @@
  #include linux/platform_data/s3c-hsudc.h
  #include plat/samsung-time.h

 +#include linux/spi/spi.h
 +#include linux/platform_data/spi-s3c64xx.h
 +
  #include plat/fb.h

  #include common.h
 @@ -207,6 +210,26 @@ static struct s3c_sdhci_platdata smdk2416_hsmmc1_pdata 
 __initdata = {
 .cd_type= S3C_SDHCI_CD_NONE,
  };

 +struct s3c64xx_spi_csinfo libertas_cs_info = {
 +   .fb_delay = 0,
 +   .line = 128, /* gpio cs line */
 +};
 +
 +
 +static struct spi_board_info spi_board_info[] = {
 +{
 +   .modalias   = libertas_spi,
 +   .max_speed_hz   = 120,
 +   .bus_num= 0,
 +   .irq= 12, /* some interrupt number */
 +   .chip_select= 0,
 +   .mode   = SPI_MODE_3,
 +   .controller_data= libertas_cs_info,
 +/* .platform_data  = foo1_pdata, */
 +},
 +};
 +
 +
  static struct platform_device *smdk2416_devices[] __initdata = {
 s3c_device_fb,
 s3c_device_wdt,
 @@ -216,6 +239,7 @@ static struct platform_device *smdk2416_devices[] 
 __initdata = {
 s3c_device_hsmmc1,
 s3c_device_usb_hsudc,
 s3c2443_device_dma,
 +   s3c64xx_device_spi0,
  };

  static void __init smdk2416_init_time(void)
 @@ -250,6 +274,9 @@ static void __init smdk2416_machine_init(void)
 gpio_request(S3C2410_GPB(1), Display Reset);
 gpio_direction_output(S3C2410_GPB(1), 1);

 +   s3c64xx_spi0_set_platdata(NULL, 0, ARRAY_SIZE(spi_board_info));
 +   spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
 +
 platform_add_devices(smdk2416_devices, ARRAY_SIZE(smdk2416_devices));
 smdk_machine_init();
  }
 diff --git a/arch/arm/mach-s3c24xx/setup-spi.c 
 b/arch/arm/mach-s3c24xx/setup-spi.c
 index 3d47e02..d66c4e0 100644
 --- a/arch/arm/mach-s3c24xx/setup-spi.c
 +++ b/arch/arm/mach-s3c24xx/setup-spi.c
 @@ -16,6 +16,7 @@

  #include mach/hardware.h
  #include mach/regs-gpio.h
 +#include mach/gpio-samsung.h

  #ifdef CONFIG_S3C64XX_DEV_SPI0
  int s3c64xx_spi0_cfg_gpio(void)

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Re: [PATCH 2/9] hwmon: dts: Doc: Add DTS doc to explain how to use PWM FAN as a cooling device

2014-12-19 Thread Lukasz Majewski
Hi Sjoerd,

Thanks for your feedback and sorry for a late reply.

 On Thu, 2014-12-18 at 11:13 +0100, Lukasz Majewski wrote:
  Several new properties to allow PWM fan working as a cooling device
  have been combined into this single commit.
  
  Signed-off-by: Lukasz Majewski l.majew...@samsung.com
  ---
   .../devicetree/bindings/hwmon/pwm-fan.txt  | 28
  ++ 1 file changed, 28 insertions(+)
  
  diff --git a/Documentation/devicetree/bindings/hwmon/pwm-fan.txt
  b/Documentation/devicetree/bindings/hwmon/pwm-fan.txt index
  610757c..3877810 100644 ---
  a/Documentation/devicetree/bindings/hwmon/pwm-fan.txt +++
  b/Documentation/devicetree/bindings/hwmon/pwm-fan.txt @@ -3,10
  +3,38 @@ Bindings for a fan connected to the PWM lines Required
  properties:
   - compatible   : pwm-fan
   - pwms : the PWM that is used to control the PWM fan
  +- cooling-pwm-values  : PWM duty cycle values relative to
  +   cooling-max-pwm-value correspondig to
  +   proper cooling states
  +- default-pulse-width : Property specifying default pulse
  width for FAN
  +   at system boot (zero to disable FAN on
  boot).
  +   Allowed range is 0 to 255
 
 The 0..255 range seems somewhat random. Would be nicer to either use
 the approach of pwm-backlight (iotw, have the range go from the first
 to the last entry of cooling-pwm-values) 

I'm OK to change the default-pulse-width to be similar to
default-brightness-level (as it is in
Documentation/devicetree/bindings/video/backlight/pwm-backlight.txt)

 or simply have be the duty
 lenght in NS as entries instead of the current indirection.

I'd prefer to keep the indirection - as it is utilized in the current
pwm-fan.c driver.

 
 I assumed your cooling-pwm-values are a [0..255] range as well instead
 of nanoseconds (would be good to make that more clear)?

Your assumption is correct. cooling-pwm-values are indeed in the
[0..255] range. I will add this information in v2.

 
 Also having more consistent names would be nice.. To take
 pwm-backlight as inspiration, cooling-levels and
 default-cooling-level would make it more clear the second property
 picks a default setting from the first one.

I agree.

 
 One thing i do wonder, is having an explicit default setting useful?
 Should it not default to maximum cooling unless otherwise configured
 by either the thermal framework or sysfs ?

Enabling pan to full RPM was the default behaviour in the current
pwm-fan.c file.

To be honest, there is no need to enable fan to full RPM speed in this
board for following reasons:
1. In Odroid the FAN is optional (stacked on top of a heat sink) - very
often it is just enough to only have the heat sink.

2. Odroid has thermal enabled by default and IMHO it would be more
feasible to allow thermal to control fan from the very beginning.

However, I can also understand if the policy for hwmon implies a rule
to enable by default all fans to full RPM speed.

 
 
  +Thorough description of the following bindings:
  +   cooling-min-state = 0;
  +   cooling-max-state = 3;
  +   #cooling-cells = 2;
  +   thermal-zone {
  +   cpu_thermal: cpu-thermal {
  +   cooling-maps {
  +   map0 {
  +trip = cpu_alert1;
  +cooling-device = fan0 0 1;
  +   };
  +   };
  +   };
  +
  +for PWM FAN used as cooling device can be found at:
  +./Documentation/devicetree/bindings/thermal/thermal.txt
   
   Example:
  pwm-fan {
  compatible = pwm-fan;
  status = okay;
  pwms = pwm 0 1 0;
  +   cooling-min-state = 0;
  +   cooling-max-state = 3;
  +   #cooling-cells = 2;
  +   cooling-pwm-values = 0 102 170 255;
  +   default-pulse-width = 0;
  };
 
 



-- 
Best regards,

Lukasz Majewski

Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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Re: [PATCH 2/9] hwmon: dts: Doc: Add DTS doc to explain how to use PWM FAN as a cooling device

2014-12-19 Thread Guenter Roeck
On Fri, Dec 19, 2014 at 04:32:24PM +0100, Lukasz Majewski wrote:
 Hi Sjoerd,
 
 Thanks for your feedback and sorry for a late reply.
 
  On Thu, 2014-12-18 at 11:13 +0100, Lukasz Majewski wrote:
   Several new properties to allow PWM fan working as a cooling device
   have been combined into this single commit.
   
   Signed-off-by: Lukasz Majewski l.majew...@samsung.com
   ---
.../devicetree/bindings/hwmon/pwm-fan.txt  | 28
   ++ 1 file changed, 28 insertions(+)
   
   diff --git a/Documentation/devicetree/bindings/hwmon/pwm-fan.txt
   b/Documentation/devicetree/bindings/hwmon/pwm-fan.txt index
   610757c..3877810 100644 ---
   a/Documentation/devicetree/bindings/hwmon/pwm-fan.txt +++
   b/Documentation/devicetree/bindings/hwmon/pwm-fan.txt @@ -3,10
   +3,38 @@ Bindings for a fan connected to the PWM lines Required
   properties:
- compatible : pwm-fan
- pwms   : the PWM that is used to control the PWM fan
   +- cooling-pwm-values  : PWM duty cycle values relative to
   + cooling-max-pwm-value correspondig to
   + proper cooling states
   +- default-pulse-width : Property specifying default pulse
   width for FAN
   + at system boot (zero to disable FAN on
   boot).
   + Allowed range is 0 to 255
  
  The 0..255 range seems somewhat random. Would be nicer to either use
  the approach of pwm-backlight (iotw, have the range go from the first
  to the last entry of cooling-pwm-values) 
 
 I'm OK to change the default-pulse-width to be similar to
 default-brightness-level (as it is in
 Documentation/devicetree/bindings/video/backlight/pwm-backlight.txt)
 
  or simply have be the duty
  lenght in NS as entries instead of the current indirection.
 
 I'd prefer to keep the indirection - as it is utilized in the current
 pwm-fan.c driver.
 
FWIW, devicetree information is supposed to be implementation independent.
So this is a poor argument.

 
 Enabling pan to full RPM was the default behaviour in the current
 pwm-fan.c file.
 
 To be honest, there is no need to enable fan to full RPM speed in this
 board for following reasons:
 1. In Odroid the FAN is optional (stacked on top of a heat sink) - very
 often it is just enough to only have the heat sink.
 
 2. Odroid has thermal enabled by default and IMHO it would be more
 feasible to allow thermal to control fan from the very beginning.
 
 However, I can also understand if the policy for hwmon implies a rule
 to enable by default all fans to full RPM speed.
 
Why and how does that all suggest that the current default behavior
should be changed ?

Guenter
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Re: [PATCH 2/9] hwmon: dts: Doc: Add DTS doc to explain how to use PWM FAN as a cooling device

2014-12-19 Thread Lukasz Majewski
Hi Guenter,

 On Fri, Dec 19, 2014 at 04:32:24PM +0100, Lukasz Majewski wrote:
  Hi Sjoerd,
  
  Thanks for your feedback and sorry for a late reply.
  
   On Thu, 2014-12-18 at 11:13 +0100, Lukasz Majewski wrote:
Several new properties to allow PWM fan working as a cooling
device have been combined into this single commit.

Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
 .../devicetree/bindings/hwmon/pwm-fan.txt  | 28
++ 1 file changed, 28 insertions(+)

diff --git a/Documentation/devicetree/bindings/hwmon/pwm-fan.txt
b/Documentation/devicetree/bindings/hwmon/pwm-fan.txt index
610757c..3877810 100644 ---
a/Documentation/devicetree/bindings/hwmon/pwm-fan.txt +++
b/Documentation/devicetree/bindings/hwmon/pwm-fan.txt @@ -3,10
+3,38 @@ Bindings for a fan connected to the PWM lines Required
properties:
 - compatible   : pwm-fan
 - pwms : the PWM that is used to control the
PWM fan +- cooling-pwm-values  : PWM duty cycle values
relative to
+   cooling-max-pwm-value correspondig
to
+   proper cooling states
+- default-pulse-width : Property specifying default pulse
width for FAN
+   at system boot (zero to disable
FAN on boot).
+   Allowed range is 0 to 255
   
   The 0..255 range seems somewhat random. Would be nicer to either
   use the approach of pwm-backlight (iotw, have the range go from
   the first to the last entry of cooling-pwm-values) 
  
  I'm OK to change the default-pulse-width to be similar to
  default-brightness-level (as it is in
  Documentation/devicetree/bindings/video/backlight/pwm-backlight.txt)
  
   or simply have be the duty
   lenght in NS as entries instead of the current indirection.
  
  I'd prefer to keep the indirection - as it is utilized in the
  current pwm-fan.c driver.
  
 FWIW, devicetree information is supposed to be implementation
 independent. So this is a poor argument.

Many other pwm drivers use the indirection - e.g. mentioned
pwm-backlight.


 
  
  Enabling pan to full RPM was the default behaviour in the current
  pwm-fan.c file.
  
  To be honest, there is no need to enable fan to full RPM speed in
  this board for following reasons:
  1. In Odroid the FAN is optional (stacked on top of a heat sink) -
  very often it is just enough to only have the heat sink.
  
  2. Odroid has thermal enabled by default and IMHO it would be more
  feasible to allow thermal to control fan from the very beginning.
  
  However, I can also understand if the policy for hwmon implies a
  rule to enable by default all fans to full RPM speed.
  
 Why and how does that all suggest that the current default behavior
 should be changed ?

I wanted to avoid the unpleasant sound for full speed fan when thermal
is not enabled by default.

But as I said, I fully understand the policy and I would be happy to
comply with it as thermal should reduce the fan speed anyway at boot
time.

 
 Guenter



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Re: [PATCH] clk: samsung: exynos7: Add clocks for MSCL block

2014-12-19 Thread Sylwester Nawrocki
Hi,

On 17/12/14 08:33, Tony K Nadackal wrote:
 Add clock support for the MSCL block for Exynos7.
 
 Signed-off-by: Tony K Nadackal tony...@samsung.com
 ---
  .../devicetree/bindings/clock/exynos7-clock.txt|   1 +
  drivers/clk/samsung/clk-exynos7.c  | 124 
 +
  include/dt-bindings/clock/exynos7-clk.h|  40 ++-
  3 files changed, 164 insertions(+), 1 deletion(-)
 
 diff --git a/Documentation/devicetree/bindings/clock/exynos7-clock.txt 
 b/Documentation/devicetree/bindings/clock/exynos7-clock.txt
 index 6d3d5f8..d0e048c 100644
 --- a/Documentation/devicetree/bindings/clock/exynos7-clock.txt
 +++ b/Documentation/devicetree/bindings/clock/exynos7-clock.txt
 @@ -34,6 +34,7 @@ Required Properties for Clock Controller:
   - samsung,exynos7-clock-peris
   - samsung,exynos7-clock-fsys0
   - samsung,exynos7-clock-fsys1
 + - samsung,exynos7-clock-mscl

I can't see anything controversial in the patch, but I've got some doubts
regarding the compatible string. Is there a SoC named just Exynos7?
If not, what are exact SoC names the samsung,exynos7-clock-mscl compatible
is supposed to cover ?
It would be good to list in this file the exact SoCs names this binding applies
to, unless there is indeed Exynos7 SoC.

--
Thanks,
Sylwester
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Re: [PATCH 2/9] hwmon: dts: Doc: Add DTS doc to explain how to use PWM FAN as a cooling device

2014-12-19 Thread Lukasz Majewski
Hi Guenter,

 On 12/18/2014 02:13 AM, Lukasz Majewski wrote:
  Several new properties to allow PWM fan working as a cooling device
  have been combined into this single commit.
 
  Signed-off-by: Lukasz Majewski l.majew...@samsung.com
  ---
.../devicetree/bindings/hwmon/pwm-fan.txt  | 28
  ++ 1 file changed, 28 insertions(+)
 
  diff --git a/Documentation/devicetree/bindings/hwmon/pwm-fan.txt
  b/Documentation/devicetree/bindings/hwmon/pwm-fan.txt index
  610757c..3877810 100644 ---
  a/Documentation/devicetree/bindings/hwmon/pwm-fan.txt +++
  b/Documentation/devicetree/bindings/hwmon/pwm-fan.txt @@ -3,10
  +3,38 @@ Bindings for a fan connected to the PWM lines Required
  properties:
- compatible  : pwm-fan
- pwms: the PWM that is used to control the PWM
  fan +- cooling-pwm-values  : PWM duty cycle values relative to
  +   cooling-max-pwm-value correspondig to
  +   proper cooling states
 
 I don't understand what you mean with relative to. Please elaborate.
 Do you mean associated with ?

I meant that cooling-pwm-values is no greater than
cooling-max-pwm-value (which was present in some earlier version of
this patch and had value of 255).

This description is wrong and will be reworded.

 
 Where is cooling-max-pwm-value defined, 

It was present in some early version of this patch.

 and how is this all expected
 to relate to the maximum duty cycle value provided by the pwm device ?
 
  +- default-pulse-width : Property specifying default pulse
  width for FAN
  +   at system boot (zero to disable FAN on
  boot).
  +   Allowed range is 0 to 255
 
 You'll need dt maintainer approval for the new properties.

I'm wondering how this patch series will get merged. It touches three
different subsystems (thermal, hwmon and device tree for Exynos). 

For me it would be best to use thermal tree (hence Odroid U3 fan is
supposed to work as a cooling device) with ACKs from other subsystems
maintainers.

 
 One thing I wonder about though is why you use default-pulse-width
 and not default-pwm. Seems to be arbitrary. I don't see
 pulse-width used anywhere in the upstream kernel.

Believe or not I've also considered the default-pwm name.

 
 I am somewhat concerned that you define the new properties as
 mandatory. That means existing configurations will fail, which does
 not seem to be a good idea. It would be more appropriate to not
 configure the thermal device if the new properties are not provided.

Very good point. I will do that for v2.

 
 The newly introduced semantics also conflicts with the current
 semantics, which sets the initial duty cycle initially to the maximum
 allowed duty cycle as reported by the pwm device itself.

Ok. I will stick to above policy and then the default-pulse-width
property can be removed.

 
 Guenter
 
  +
  +Thorough description of the following bindings:
  +   cooling-min-state = 0;
  +   cooling-max-state = 3;
  +   #cooling-cells = 2;
  +   thermal-zone {
  +   cpu_thermal: cpu-thermal {
  +   cooling-maps {
  +   map0 {
  +trip = cpu_alert1;
  +cooling-device = fan0 0 1;
  +   };
  +   };
  +   };
  +
  +for PWM FAN used as cooling device can be found at:
  +./Documentation/devicetree/bindings/thermal/thermal.txt
 
Example:
  pwm-fan {
  compatible = pwm-fan;
  status = okay;
  pwms = pwm 0 1 0;
  +   cooling-min-state = 0;
  +   cooling-max-state = 3;
  +   #cooling-cells = 2;
  +   cooling-pwm-values = 0 102 170 255;
  +   default-pulse-width = 0;
  };
 
 



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Lukasz Majewski

Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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Re: [PATCH 4/4] PM: Eliminate CONFIG_PM_RUNTIME

2014-12-19 Thread Rafael J. Wysocki
On Friday, December 19, 2014 09:13:29 AM Geert Uytterhoeven wrote:
 On Fri, Dec 19, 2014 at 3:03 AM, Rafael J. Wysocki r...@rjwysocki.net wrote:
  --- linux-pm.orig/arch/mips/configs/lemote2f_defconfig
  +++ linux-pm/arch/mips/configs/lemote2f_defconfig
  @@ -37,7 +37,7 @@ CONFIG_MIPS32_N32=y
   CONFIG_PM=y
   ^^^
   CONFIG_HIBERNATION=y
   CONFIG_PM_STD_PARTITION=/dev/hda3
  -CONFIG_PM_RUNTIME=y
  +CONFIG_PM=y
^^^
 Now we have two of them
 
   CONFIG_CPU_FREQ=y
   CONFIG_CPU_FREQ_DEBUG=y
   CONFIG_CPU_FREQ_STAT=m
 
 Other defconfig files may be affected, too.

Good catch, I felt I might have forgotten about something ...

Fixed up patch is appended, thanks!


---
From: Rafael J. Wysocki rafael.j.wyso...@intel.com
Subject: PM: Eliminate CONFIG_PM_RUNTIME

Having switched over all of the users of CONFIG_PM_RUNTIME to use
CONFIG_PM directly, turn the latter into a user-selectable option
and drop the former entirely from the tree.

Signed-off-by: Rafael J. Wysocki rafael.j.wyso...@intel.com
Reviewed-by: Ulf Hansson ulf.hans...@linaro.org
---
 arch/arm/configs/ape6evm_defconfig |2 +-
 arch/arm/configs/armadillo800eva_defconfig |2 +-
 arch/arm/configs/bcm_defconfig |2 +-
 arch/arm/configs/bockw_defconfig   |2 +-
 arch/arm/configs/davinci_all_defconfig |2 +-
 arch/arm/configs/exynos_defconfig  |2 +-
 arch/arm/configs/ezx_defconfig |1 -
 arch/arm/configs/hisi_defconfig|2 +-
 arch/arm/configs/imote2_defconfig  |1 -
 arch/arm/configs/imx_v6_v7_defconfig   |2 +-
 arch/arm/configs/keystone_defconfig|2 +-
 arch/arm/configs/kzm9g_defconfig   |2 +-
 arch/arm/configs/lager_defconfig   |2 +-
 arch/arm/configs/mackerel_defconfig|1 -
 arch/arm/configs/marzen_defconfig  |2 +-
 arch/arm/configs/omap1_defconfig   |1 -
 arch/arm/configs/prima2_defconfig  |2 +-
 arch/arm/configs/sama5_defconfig   |2 +-
 arch/arm/configs/shmobile_defconfig|2 +-
 arch/arm/configs/sunxi_defconfig   |2 +-
 arch/arm/configs/tegra_defconfig   |2 +-
 arch/arm/configs/u8500_defconfig   |2 +-
 arch/arm/configs/vt8500_v6_v7_defconfig|2 +-
 arch/arm/mach-omap2/Kconfig|6 +++---
 arch/mips/configs/db1xxx_defconfig |2 +-
 arch/mips/configs/lemote2f_defconfig   |1 -
 arch/mips/configs/loongson3_defconfig  |2 +-
 arch/mips/configs/nlm_xlp_defconfig|2 +-
 arch/mips/configs/nlm_xlr_defconfig|2 +-
 arch/powerpc/configs/ps3_defconfig |2 +-
 arch/sh/Kconfig|2 +-
 arch/sh/configs/apsh4ad0a_defconfig|2 +-
 arch/sh/configs/sdk7786_defconfig  |2 +-
 drivers/usb/host/isp1760-hcd.c |2 +-
 drivers/usb/host/oxu210hp-hcd.c|2 +-
 include/linux/devfreq.h|2 +-
 kernel/power/Kconfig   |   16 ++--
 37 files changed, 39 insertions(+), 48 deletions(-)

Index: linux-pm/arch/arm/configs/ape6evm_defconfig
===
--- linux-pm.orig/arch/arm/configs/ape6evm_defconfig
+++ linux-pm/arch/arm/configs/ape6evm_defconfig
@@ -33,7 +33,7 @@ CONFIG_ARM_APPENDED_DTB=y
 CONFIG_VFP=y
 CONFIG_NEON=y
 CONFIG_BINFMT_MISC=y
-CONFIG_PM_RUNTIME=y
+CONFIG_PM=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
Index: linux-pm/arch/arm/configs/armadillo800eva_defconfig
===
--- linux-pm.orig/arch/arm/configs/armadillo800eva_defconfig
+++ linux-pm/arch/arm/configs/armadillo800eva_defconfig
@@ -43,7 +43,7 @@ CONFIG_KEXEC=y
 CONFIG_VFP=y
 CONFIG_NEON=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_PM_RUNTIME=y
+CONFIG_PM=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
Index: linux-pm/arch/arm/configs/bcm_defconfig
===
--- linux-pm.orig/arch/arm/configs/bcm_defconfig
+++ linux-pm/arch/arm/configs/bcm_defconfig
@@ -39,7 +39,7 @@ CONFIG_CPU_IDLE=y
 CONFIG_VFP=y
 CONFIG_NEON=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_PM_RUNTIME=y
+CONFIG_PM=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_PACKET_DIAG=y
Index: linux-pm/arch/arm/configs/bockw_defconfig
===
--- linux-pm.orig/arch/arm/configs/bockw_defconfig
+++ linux-pm/arch/arm/configs/bockw_defconfig
@@ -29,7 +29,7 @@ CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_ARM_APPENDED_DTB=y
 CONFIG_VFP=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_PM_RUNTIME=y
+CONFIG_PM=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
Index: linux-pm/arch/arm/configs/davinci_all_defconfig
===
--- linux-pm.orig/arch/arm/configs/davinci_all_defconfig
+++ 

Re: [PATCH 4/4] PM: Eliminate CONFIG_PM_RUNTIME

2014-12-19 Thread Kevin Hilman
Rafael J. Wysocki r...@rjwysocki.net writes:

[...]

 Fixed up patch is appended, thanks!


 ---
 From: Rafael J. Wysocki rafael.j.wyso...@intel.com
 Subject: PM: Eliminate CONFIG_PM_RUNTIME

 Having switched over all of the users of CONFIG_PM_RUNTIME to use
 CONFIG_PM directly, turn the latter into a user-selectable option
 and drop the former entirely from the tree.

 Signed-off-by: Rafael J. Wysocki rafael.j.wyso...@intel.com
 Reviewed-by: Ulf Hansson ulf.hans...@linaro.org

Acked-by: Kevin Hilman khil...@linaro.org

I assume you're planning to get this in early in the v3.19-rc cycle,
correct?  That way we can hopefully avoid conflicts with the various
defconfig changes we're taking through the arm-soc tree.

Also, thanks for taking care of all the tree-wide changes.  This is a
great change.

Kevin
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Re: Enable runtime PM automatically?

2014-12-19 Thread Kevin Hilman
Geert Uytterhoeven ge...@linux-m68k.org writes:

[...]

 On Thu, Dec 18, 2014 at 10:29 PM, Kevin Hilman khil...@kernel.org wrote:
 However, if PM domains are active, drivers must be runtime PM-aware for the
 gpd_dev_ops.start() method to be called in the first place (perhaps this is 
 just
 one bug that's easy to fix --- the device is assumed suspended, but can be
 used). They must
   1. call pm_runtime_enable() to enable runtime PM for the device,
   2. call pm_runtime_get_sync() to prevent the device from being put in a
 low-power state at any time. This second call has the
 side-effect of calling
 gpd_dev_ops.start().

 Hence, if PM domains are enabled, wouldn't it make sense to
   1. enable runtime PM by default, for all devices (bound and unbound),
   2. call pm_runtime_get_sync(), for all devices bound to a driver.
 Of course we have to keep track if drivers call any of the pm_runtime_*()
 methods theirselves, as that would have to move them from automatic to
 manual mode.

 Would this be feasible?

 We have to be careful about where the PM core's _get_sync() call goes.

 Because you're talking about bound devices, I guess you mean after the
 driver probes?  Otherwise, it gets tricky if the _get_sync() is before
 the driver probes, because the device driver may have work it wants to
 do in its runtime PM callbacks, which are not initialized/available
 before the driver probes.  Doing this before probe also makes it rather
 difficult to know for sure the actual physical state of the device, and
 make sure it matches the runtime PM state of the device.  Rafael
 mentioned this also, and I'm not sure how we can be sure of the physical
 state.

 Yes, it's complicated by the fact that there are multiple sets of callbacks
 (PM domain, device type, class type, bus type, driver).
 However, the PM domain one has the highest priority, and is always
 (also for devices not bound to a driver) available.

Yes, but if a _get_sync() is called on a device which has not yet setup
its callbacks (e.g. before it has been probed), then the device may not
be properly initialized, and we may not be able to know its physical state.

 Some thoughts: devices without drivers would be runtime resumed by the
 core, but will never be suspended, so the PM domain will never shut
 down.  I guess the core will have to keep track of the devices it
 automatically runtime resumed and decide to runtime suspend them too?
 Hmm, where would that go?

 No, devices without a driver just need to become runtime PM enabled.
 They will only be resumed when a dependent device (e.g. a child) is resumed,
 and are suspended again after all dependents are suspended. That's how
 simple-pm-bus behaves.

Ah, OK.  I thought you were proposing to _enable() and _get_sync() those
devices.

Thanks for the clarification,

Kevin


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Re: [PATCH 4/4] PM: Eliminate CONFIG_PM_RUNTIME

2014-12-19 Thread Rafael J. Wysocki
On Friday, December 19, 2014 01:49:34 PM Kevin Hilman wrote:
 Rafael J. Wysocki r...@rjwysocki.net writes:
 
 [...]
 
  Fixed up patch is appended, thanks!
 
 
  ---
  From: Rafael J. Wysocki rafael.j.wyso...@intel.com
  Subject: PM: Eliminate CONFIG_PM_RUNTIME
 
  Having switched over all of the users of CONFIG_PM_RUNTIME to use
  CONFIG_PM directly, turn the latter into a user-selectable option
  and drop the former entirely from the tree.
 
  Signed-off-by: Rafael J. Wysocki rafael.j.wyso...@intel.com
  Reviewed-by: Ulf Hansson ulf.hans...@linaro.org
 
 Acked-by: Kevin Hilman khil...@linaro.org
 
 I assume you're planning to get this in early in the v3.19-rc cycle,
 correct?  That way we can hopefully avoid conflicts with the various
 defconfig changes we're taking through the arm-soc tree.

I'm going to send a pull request with these changes tomorrow.

 Also, thanks for taking care of all the tree-wide changes.  This is a
 great change.

Thanks!


-- 
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Rafael J. Wysocki, Intel Open Source Technology Center.
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