Re: [PATCH 1/1] ARM: dts: Use more descriptive names for Exynos5420 PDs
Hello Sergei, Thanks a lot for your feedback. On 02/06/2015 08:09 PM, Sergei Shtylyov wrote: Hello. On 02/06/2015 08:37 PM, Javier Martinez Canillas wrote: All the device nodes for the Exynos5420 power-domains have a quite generic power-domain name. And this is in conformance to the ePAPR standard. True, I forgot that the ePAPR recommends that the node names should be somewhat generic but OTOH this is the only Exynos DTSI file that follows the standard for the power domain device nodes. All other Exynos DTSI use a prefix to differentiate between each power domain. So in case of an error, the Exynos PD driver shows the following (not very useful) message: Power domain power-domain disable failed Why not fix the message instead to use the full device name? Well, the full node name is also not very useful IMHO since you have to check the DTSI or SoC manual to map the device node unit-address to the corresponding power domain. I used $subject when debugging an HDMI issue and instead of dropping it, I just posted it in case someone considered useful. I don't really mind if the patch is nacked / not picked. Best regards, Javier -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/1] ARM: dts: Use more descriptive names for Exynos5420 PDs
Hello. On 02/06/2015 08:37 PM, Javier Martinez Canillas wrote: All the device nodes for the Exynos5420 power-domains have a quite generic power-domain name. And this is in conformance to the ePAPR standard. So in case of an error, the Exynos PD driver shows the following (not very useful) message: Power domain power-domain disable failed Why not fix the message instead to use the full device name? Use descriptive names to know on which PD enable or disable failed. Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk WBR, Sergei -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH -v2 04/14] drm/exynos: make zpos property immutable
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
We already set each plane zpos at init, after that changes to zpos are
not expected. This patch turns zpos into a read-only property so now it is
impossible to set zpos.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_plane.c | 21 ++---
1 file changed, 2 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c
b/drivers/gpu/drm/exynos/exynos_drm_plane.c
index 8292819..3847545 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c
@@ -185,27 +185,10 @@ static void exynos_plane_destroy(struct drm_plane *plane)
drm_plane_cleanup(plane);
}
-static int exynos_plane_set_property(struct drm_plane *plane,
-struct drm_property *property,
-uint64_t val)
-{
- struct drm_device *dev = plane-dev;
- struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
- struct exynos_drm_private *dev_priv = dev-dev_private;
-
- if (property == dev_priv-plane_zpos_property) {
- exynos_plane-zpos = val;
- return 0;
- }
-
- return -EINVAL;
-}
-
static struct drm_plane_funcs exynos_plane_funcs = {
.update_plane = exynos_update_plane,
.disable_plane = exynos_disable_plane,
.destroy= exynos_plane_destroy,
- .set_property = exynos_plane_set_property,
};
static void exynos_plane_attach_zpos_property(struct drm_plane *plane,
@@ -217,8 +200,8 @@ static void exynos_plane_attach_zpos_property(struct
drm_plane *plane,
prop = dev_priv-plane_zpos_property;
if (!prop) {
- prop = drm_property_create_range(dev, 0, zpos, 0,
-MAX_PLANE - 1);
+ prop = drm_property_create_range(dev, DRM_MODE_PROP_IMMUTABLE,
+zpos, 0, MAX_PLANE - 1);
if (!prop)
return;
--
1.9.3
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[PATCH -v2 10/14] drm/exynos: atomic phase 1: add atomic_begin()/atomic_flush()
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Add CRTC callbacks .atomic_begin() .atomic_flush(). On exynos they
unprotect the windows before the commit and protects it after based on
a plane mask tha store which plane will be updated.
For that we create two new exynos_crtc callbacks: .win_protect() and
.win_unprotect(). The only driver that implement those now is FIMD.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_crtc.c | 34 +
drivers/gpu/drm/exynos/exynos_drm_drv.h | 6
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 49 ---
drivers/gpu/drm/exynos/exynos_drm_plane.c | 4 +++
4 files changed, 76 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
index 1c0d936..5e7c13e 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
@@ -153,6 +153,38 @@ static void exynos_drm_crtc_disable(struct drm_crtc *crtc)
}
}
+static void exynos_crtc_atomic_begin(struct drm_crtc *crtc)
+{
+ struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
+ struct drm_plane *plane;
+ int index = 0;
+
+ list_for_each_entry(plane, crtc-dev-mode_config.plane_list, head) {
+ if (exynos_crtc-ops-win_protect
+ exynos_crtc-plane_mask (0x01 index))
+ exynos_crtc-ops-win_protect(exynos_crtc, index);
+
+ index++;
+ }
+}
+
+static void exynos_crtc_atomic_flush(struct drm_crtc *crtc)
+{
+ struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
+ struct drm_plane *plane;
+ int index = 0;
+
+ list_for_each_entry(plane, crtc-dev-mode_config.plane_list, head) {
+ if (exynos_crtc-ops-win_unprotect
+ exynos_crtc-plane_mask (0x01 index))
+ exynos_crtc-ops-win_unprotect(exynos_crtc, index);
+
+ index++;
+ }
+
+ exynos_crtc-plane_mask = 0;
+}
+
static struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = {
.dpms = exynos_drm_crtc_dpms,
.prepare= exynos_drm_crtc_prepare,
@@ -161,6 +193,8 @@ static struct drm_crtc_helper_funcs
exynos_crtc_helper_funcs = {
.mode_set = exynos_drm_crtc_mode_set,
.mode_set_base = exynos_drm_crtc_mode_set_base,
.disable= exynos_drm_crtc_disable,
+ .atomic_begin = exynos_crtc_atomic_begin,
+ .atomic_flush = exynos_crtc_atomic_flush,
};
static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h
b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index ab82772..f025a54 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -175,6 +175,8 @@ struct exynos_drm_display {
* hardware overlay is updated.
* @win_commit: apply hardware specific overlay data to registers.
* @win_disable: disable hardware specific overlay.
+ * @win_protect: protect hardware specific window.
+ * @win_unprotect: unprotect hardware specific window.
* @te_handler: trigger to transfer video image at the tearing effect
* synchronization signal if there is a page flip request.
*/
@@ -190,6 +192,8 @@ struct exynos_drm_crtc_ops {
void (*wait_for_vblank)(struct exynos_drm_crtc *crtc);
void (*win_commit)(struct exynos_drm_crtc *crtc, unsigned int zpos);
void (*win_disable)(struct exynos_drm_crtc *crtc, unsigned int zpos);
+ void (*win_protect)(struct exynos_drm_crtc *crtc, unsigned int zpos);
+ void (*win_unprotect)(struct exynos_drm_crtc *crtc, unsigned int zpos);
void (*te_handler)(struct exynos_drm_crtc *crtc);
};
@@ -206,6 +210,7 @@ struct exynos_drm_crtc_ops {
* we can refer to the crtc to current hardware interrupt occurred through
* this pipe value.
* @dpms: store the crtc dpms value
+ * @plane_mask: store planes to be updated on atomic modesetting
* @event: vblank event that is currently queued for flip
* @ops: pointer to callbacks for exynos drm specific functionality
* @ctx: A pointer to the crtc's implementation specific context
@@ -215,6 +220,7 @@ struct exynos_drm_crtc {
enum exynos_drm_output_type type;
unsigned intpipe;
unsigned intdpms;
+ unsigned intplane_mask;
wait_queue_head_t pending_flip_queue;
struct drm_pending_vblank_event *event;
struct exynos_drm_crtc_ops *ops;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 990ead434..bea70f6 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -590,6 +590,16 @@ static void fimd_shadow_protect_win(struct fimd_context
*ctx,
{
[PATCH -v2 03/14] drm/exynos: preset zpos value for overlay planes
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Usually userspace don't want to have two overlay planes on the same zpos
so this change assign a different zpos for each plane. Before this change
a zpos of value zero was created for all planes so the userspace had to
set up the zpos of every plane it wanted to use.
Also all places that were storing zpos positions are now unsigned int.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_drv.h | 7 +++
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 24 +++-
drivers/gpu/drm/exynos/exynos_drm_plane.c | 16 +---
drivers/gpu/drm/exynos/exynos_drm_plane.h | 3 ++-
drivers/gpu/drm/exynos/exynos_drm_vidi.c | 17 +
drivers/gpu/drm/exynos/exynos_mixer.c | 11 +--
6 files changed, 35 insertions(+), 43 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h
b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index 7ea7648..a3a2d63 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -21,7 +21,6 @@
#define MAX_CRTC 3
#define MAX_PLANE 5
#define MAX_FB_BUFFER 4
-#define DEFAULT_ZPOS -1
#define to_exynos_crtc(x) container_of(x, struct exynos_drm_crtc, base)
#define to_exynos_plane(x) container_of(x, struct exynos_drm_plane, base)
@@ -104,7 +103,7 @@ struct exynos_drm_plane {
unsigned int pitch;
uint32_t pixel_format;
dma_addr_t dma_addr[MAX_FB_BUFFER];
- int zpos;
+ unsigned int zpos;
unsigned int index_color;
bool default_win:1;
@@ -189,8 +188,8 @@ struct exynos_drm_crtc_ops {
int (*enable_vblank)(struct exynos_drm_crtc *crtc);
void (*disable_vblank)(struct exynos_drm_crtc *crtc);
void (*wait_for_vblank)(struct exynos_drm_crtc *crtc);
- void (*win_commit)(struct exynos_drm_crtc *crtc, int zpos);
- void (*win_disable)(struct exynos_drm_crtc *crtc, int zpos);
+ void (*win_commit)(struct exynos_drm_crtc *crtc, unsigned int zpos);
+ void (*win_disable)(struct exynos_drm_crtc *crtc, unsigned int zpos);
void (*te_handler)(struct exynos_drm_crtc *crtc);
};
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 489ce90..990ead434 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -195,7 +195,12 @@ static inline struct fimd_driver_data
*drm_fimd_get_driver_data(
static void fimd_wait_for_vblank(struct exynos_drm_crtc *crtc)
{
- struct fimd_context *ctx = crtc-ctx;
+ struct fimd_context *ctx;
+
+ if (!crtc)
+ return;
+
+ ctx = crtc-ctx;
if (ctx-suspended)
return;
@@ -601,11 +606,10 @@ static void fimd_shadow_protect_win(struct fimd_context
*ctx,
writel(val, ctx-regs + reg);
}
-static void fimd_win_commit(struct exynos_drm_crtc *crtc, int zpos)
+static void fimd_win_commit(struct exynos_drm_crtc *crtc, unsigned int win)
{
struct fimd_context *ctx = crtc-ctx;
struct exynos_drm_plane *plane;
- int win = zpos;
dma_addr_t dma_addr;
unsigned long val, alpha, size, offset;
unsigned int last_x, last_y, buf_offsize, line_size;
@@ -613,9 +617,6 @@ static void fimd_win_commit(struct exynos_drm_crtc *crtc,
int zpos)
if (ctx-suspended)
return;
- if (win == DEFAULT_ZPOS)
- win = ctx-default_win;
-
if (win 0 || win = WINDOWS_NR)
return;
@@ -731,14 +732,10 @@ static void fimd_win_commit(struct exynos_drm_crtc *crtc,
int zpos)
atomic_set(ctx-win_updated, 1);
}
-static void fimd_win_disable(struct exynos_drm_crtc *crtc, int zpos)
+static void fimd_win_disable(struct exynos_drm_crtc *crtc, unsigned int win)
{
struct fimd_context *ctx = crtc-ctx;
struct exynos_drm_plane *plane;
- int win = zpos;
-
- if (win == DEFAULT_ZPOS)
- win = ctx-default_win;
if (win 0 || win = WINDOWS_NR)
return;
@@ -1000,13 +997,14 @@ static int fimd_bind(struct device *dev, struct device
*master, void *data)
struct drm_device *drm_dev = data;
struct exynos_drm_plane *exynos_plane;
enum drm_plane_type type;
- int zpos, ret;
+ unsigned int zpos;
+ int ret;
for (zpos = 0; zpos WINDOWS_NR; zpos++) {
type = (zpos == ctx-default_win) ? DRM_PLANE_TYPE_PRIMARY :
DRM_PLANE_TYPE_OVERLAY;
exynos_plane_init(drm_dev, ctx-planes[zpos], 1 ctx-pipe,
- type);
+ type, zpos);
}
ret = fimd_ctx_initialize(ctx, drm_dev);
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c
b/drivers/gpu/drm/exynos/exynos_drm_plane.c
index
[PATCH -v2 06/14] drm/exynos: remove leftover functions declarations
From: Gustavo Padovan gustavo.pado...@collabora.co.uk These functions were already removed by previous cleanup work, but these ones were left behind. Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk Acked-by: Joonyoung Shim jy0922.s...@samsung.com --- drivers/gpu/drm/exynos/exynos_drm_crtc.h | 6 -- 1 file changed, 6 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.h b/drivers/gpu/drm/exynos/exynos_drm_crtc.h index e1fd2ef..0ecd8fc 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_crtc.h +++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.h @@ -28,12 +28,6 @@ void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int pipe); void exynos_drm_crtc_finish_pageflip(struct drm_device *dev, int pipe); void exynos_drm_crtc_complete_scanout(struct drm_framebuffer *fb); -void exynos_drm_crtc_plane_mode_set(struct drm_crtc *crtc, - struct exynos_drm_plane *plane); -void exynos_drm_crtc_plane_commit(struct drm_crtc *crtc, int zpos); -void exynos_drm_crtc_plane_enable(struct drm_crtc *crtc, int zpos); -void exynos_drm_crtc_plane_disable(struct drm_crtc *crtc, int zpos); - /* This function gets pipe value to crtc device matched with out_type. */ int exynos_drm_crtc_get_pipe_from_type(struct drm_device *drm_dev, unsigned int out_type); -- 1.9.3 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH -v2 01/14] drm/exynos: remove unused exynos_crtc-win_enable() callback
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
None of the exynos crtc drivers implements win_enable() so remove it for
better clarity of the code.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_drv.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h
b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index 1aceafc..66f4a06 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -174,7 +174,6 @@ struct exynos_drm_display {
* hardware overlay is updated.
* @win_mode_set: copy drm overlay info to hw specific overlay info.
* @win_commit: apply hardware specific overlay data to registers.
- * @win_enable: enable hardware specific overlay.
* @win_disable: disable hardware specific overlay.
* @te_handler: trigger to transfer video image at the tearing effect
* synchronization signal if there is a page flip request.
@@ -192,7 +191,6 @@ struct exynos_drm_crtc_ops {
void (*win_mode_set)(struct exynos_drm_crtc *crtc,
struct exynos_drm_plane *plane);
void (*win_commit)(struct exynos_drm_crtc *crtc, int zpos);
- void (*win_enable)(struct exynos_drm_crtc *crtc, int zpos);
void (*win_disable)(struct exynos_drm_crtc *crtc, int zpos);
void (*te_handler)(struct exynos_drm_crtc *crtc);
};
--
1.9.3
--
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[PATCH -v2 02/14] drm/exynos: remove struct *_win_data abstraction on planes
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
struct {fimd,mixer,vidi}_win_data was just keeping the same data
as struct exynos_drm_plane thus get ride of it and use exynos_drm_plane
directly.
It changes how planes are created and remove .win_mode_set() callback
that was only filling all *_win_data structs.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_crtc.c | 9 +-
drivers/gpu/drm/exynos/exynos_drm_crtc.h | 1 +
drivers/gpu/drm/exynos/exynos_drm_drv.c | 14 --
drivers/gpu/drm/exynos/exynos_drm_drv.h | 5 +-
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 182 ++---
drivers/gpu/drm/exynos/exynos_drm_plane.c | 23 +---
drivers/gpu/drm/exynos/exynos_drm_plane.h | 6 +-
drivers/gpu/drm/exynos/exynos_drm_vidi.c | 123 +
drivers/gpu/drm/exynos/exynos_mixer.c | 212 +++---
9 files changed, 183 insertions(+), 392 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
index 48ccab7..47dd2b0 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
@@ -239,13 +239,13 @@ static struct drm_crtc_funcs exynos_crtc_funcs = {
};
struct exynos_drm_crtc *exynos_drm_crtc_create(struct drm_device *drm_dev,
+ struct drm_plane *plane,
int pipe,
enum exynos_drm_output_type type,
struct exynos_drm_crtc_ops *ops,
void *ctx)
{
struct exynos_drm_crtc *exynos_crtc;
- struct drm_plane *plane;
struct exynos_drm_private *private = drm_dev-dev_private;
struct drm_crtc *crtc;
int ret;
@@ -262,12 +262,6 @@ struct exynos_drm_crtc *exynos_drm_crtc_create(struct
drm_device *drm_dev,
exynos_crtc-type = type;
exynos_crtc-ops = ops;
exynos_crtc-ctx = ctx;
- plane = exynos_plane_init(drm_dev, 1 pipe,
- DRM_PLANE_TYPE_PRIMARY);
- if (IS_ERR(plane)) {
- ret = PTR_ERR(plane);
- goto err_plane;
- }
crtc = exynos_crtc-base;
@@ -284,7 +278,6 @@ struct exynos_drm_crtc *exynos_drm_crtc_create(struct
drm_device *drm_dev,
err_crtc:
plane-funcs-destroy(plane);
-err_plane:
kfree(exynos_crtc);
return ERR_PTR(ret);
}
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.h
b/drivers/gpu/drm/exynos/exynos_drm_crtc.h
index 6258b80..e1fd2ef 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.h
@@ -18,6 +18,7 @@
#include exynos_drm_drv.h
struct exynos_drm_crtc *exynos_drm_crtc_create(struct drm_device *drm_dev,
+ struct drm_plane *plane,
int pipe,
enum exynos_drm_output_type type,
struct exynos_drm_crtc_ops *ops,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c
b/drivers/gpu/drm/exynos/exynos_drm_drv.c
index 1bcbe07..c598197 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
@@ -55,7 +55,6 @@ static int exynos_drm_load(struct drm_device *dev, unsigned
long flags)
{
struct exynos_drm_private *private;
int ret;
- int nr;
private = kzalloc(sizeof(struct exynos_drm_private), GFP_KERNEL);
if (!private)
@@ -81,19 +80,6 @@ static int exynos_drm_load(struct drm_device *dev, unsigned
long flags)
exynos_drm_mode_config_init(dev);
- for (nr = 0; nr MAX_PLANE; nr++) {
- struct drm_plane *plane;
- unsigned long possible_crtcs = (1 MAX_CRTC) - 1;
-
- plane = exynos_plane_init(dev, possible_crtcs,
- DRM_PLANE_TYPE_OVERLAY);
- if (!IS_ERR(plane))
- continue;
-
- ret = PTR_ERR(plane);
- goto err_mode_config_cleanup;
- }
-
/* setup possible_clones. */
exynos_drm_encoder_setup(dev);
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h
b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index 66f4a06..7ea7648 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -78,6 +78,7 @@ enum exynos_drm_output_type {
* @transparency: transparency on or off.
* @activated: activated or not.
* @enabled: enabled or not.
+ * @resume: to resume or not.
*
* this structure is common to exynos SoC and its contents would be copied
* to hardware specific overlay info.
@@ -112,6 +113,7 @@ struct exynos_drm_plane {
bool transparency:1;
bool activated:1;
bool
[PATCH -v2 05/14] drm/exynos: remove exynos_plane_destroy()
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
The .destroy() callback for exynos can be replaced by drm_plane_cleanup().
The only extra operation on exynos_plane_destroy() was a call to
exynos_plane_disable() but the plane is already disabled by a earlier call
to drm_framebuffer_remove().
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_plane.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c
b/drivers/gpu/drm/exynos/exynos_drm_plane.c
index 3847545..4367379 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c
@@ -179,16 +179,10 @@ static int exynos_disable_plane(struct drm_plane *plane)
return 0;
}
-static void exynos_plane_destroy(struct drm_plane *plane)
-{
- exynos_disable_plane(plane);
- drm_plane_cleanup(plane);
-}
-
static struct drm_plane_funcs exynos_plane_funcs = {
.update_plane = exynos_update_plane,
.disable_plane = exynos_disable_plane,
- .destroy= exynos_plane_destroy,
+ .destroy= drm_plane_cleanup,
};
static void exynos_plane_attach_zpos_property(struct drm_plane *plane,
--
1.9.3
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[PATCH -v2 09/14] drm/exynos: atomic phase 1: use drm_plane_helper_disable()
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
The atomic helper to disable planes also uses the optional
.atomic_disable() helper. The unique operation it does is calling
.win_disable()
exynos_drm_fb_get_buf_cnt() needs a fb check too to avoid a null pointer.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_fb.c| 2 +-
drivers/gpu/drm/exynos/exynos_drm_plane.c | 26 +-
2 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fb.c
b/drivers/gpu/drm/exynos/exynos_drm_fb.c
index d346d1e..470456d 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fb.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fb.c
@@ -136,7 +136,7 @@ unsigned int exynos_drm_fb_get_buf_cnt(struct
drm_framebuffer *fb)
exynos_fb = to_exynos_fb(fb);
- return exynos_fb-buf_cnt;
+ return exynos_fb ? exynos_fb-buf_cnt : 0;
}
struct drm_framebuffer *
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c
b/drivers/gpu/drm/exynos/exynos_drm_plane.c
index 3d7c749..5d3243e 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c
@@ -159,21 +159,9 @@ exynos_update_plane(struct drm_plane *plane, struct
drm_crtc *crtc,
exynos_crtc-ops-win_commit(exynos_crtc, exynos_plane-zpos);
}
-static int exynos_disable_plane(struct drm_plane *plane)
-{
- struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
- struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(plane-crtc);
-
- if (exynos_crtc-ops-win_disable)
- exynos_crtc-ops-win_disable(exynos_crtc,
- exynos_plane-zpos);
-
- return 0;
-}
-
static struct drm_plane_funcs exynos_plane_funcs = {
.update_plane = drm_plane_helper_update,
- .disable_plane = exynos_disable_plane,
+ .disable_plane = drm_plane_helper_disable,
.destroy= drm_plane_cleanup,
};
@@ -195,9 +183,21 @@ static void exynos_plane_atomic_update(struct drm_plane
*plane,
state-src_w 16, state-src_h 16);
}
+static void exynos_plane_atomic_disable(struct drm_plane *plane,
+ struct drm_plane_state *old_state)
+{
+ struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
+ struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(old_state-crtc);
+
+ if (exynos_crtc-ops-win_disable)
+ exynos_crtc-ops-win_disable(exynos_crtc,
+ exynos_plane-zpos);
+}
+
static const struct drm_plane_helper_funcs plane_helper_funcs = {
.atomic_check = exynos_plane_atomic_check,
.atomic_update = exynos_plane_atomic_update,
+ .atomic_disable = exynos_plane_atomic_disable,
};
static void exynos_plane_attach_zpos_property(struct drm_plane *plane,
--
1.9.3
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[PATCH -v2 14/14] drm/exynos: make exynos_plane_mode_set() static
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
It is not used outside of the plane scope anymore.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_plane.c | 11 ++-
drivers/gpu/drm/exynos/exynos_drm_plane.h | 5 -
2 files changed, 6 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c
b/drivers/gpu/drm/exynos/exynos_drm_plane.c
index 840e618..31c8b13 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c
@@ -91,11 +91,12 @@ int exynos_check_plane(struct drm_plane *plane, struct
drm_framebuffer *fb)
return 0;
}
-void exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc,
- struct drm_framebuffer *fb, int crtc_x, int crtc_y,
- unsigned int crtc_w, unsigned int crtc_h,
- uint32_t src_x, uint32_t src_y,
- uint32_t src_w, uint32_t src_h)
+static void exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc
*crtc,
+ struct drm_framebuffer *fb,
+ int crtc_x, int crtc_y,
+ unsigned int crtc_w, unsigned int crtc_h,
+ uint32_t src_x, uint32_t src_y,
+ uint32_t src_w, uint32_t src_h)
{
struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
unsigned int actual_w;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.h
b/drivers/gpu/drm/exynos/exynos_drm_plane.h
index 560ca71..a7b1a21 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane.h
@@ -10,11 +10,6 @@
*/
int exynos_check_plane(struct drm_plane *plane, struct drm_framebuffer *fb);
-void exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc,
- struct drm_framebuffer *fb, int crtc_x, int crtc_y,
- unsigned int crtc_w, unsigned int crtc_h,
- uint32_t src_x, uint32_t src_y,
- uint32_t src_w, uint32_t src_h);
void exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
struct drm_framebuffer *fb, int crtc_x, int crtc_y,
unsigned int crtc_w, unsigned int crtc_h,
--
1.9.3
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[PATCH -v2 07/14] drm/exynos: track vblank events on a per crtc basis
From: Mandeep Singh Baines m...@chromium.org
The goal of the change is to make sure we send the vblank event on the
current vblank. My hope is to fix any races that might be causing flicker.
After this change I only see a flicker in the transition plymouth and
X11.
Simplified the code by tracking vblank events on a per-crtc basis. This
allowed me to remove all error paths from the callback. It also allowed
me to remove the vblank wait from the callback.
Signed-off-by: Mandeep Singh Baines m...@chromium.org
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_crtc.c | 92 +++-
drivers/gpu/drm/exynos/exynos_drm_drv.c | 13 -
drivers/gpu/drm/exynos/exynos_drm_drv.h | 6 +--
3 files changed, 44 insertions(+), 67 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
index 47dd2b0..eb49195 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
@@ -34,9 +34,8 @@ static void exynos_drm_crtc_dpms(struct drm_crtc *crtc, int
mode)
if (mode DRM_MODE_DPMS_ON) {
/* wait for the completion of page flip. */
if (!wait_event_timeout(exynos_crtc-pending_flip_queue,
- !atomic_read(exynos_crtc-pending_flip),
- HZ/20))
- atomic_set(exynos_crtc-pending_flip, 0);
+ (exynos_crtc-event == NULL), HZ/20))
+ exynos_crtc-event = NULL;
drm_crtc_vblank_off(crtc);
}
@@ -164,11 +163,10 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc
*crtc,
uint32_t page_flip_flags)
{
struct drm_device *dev = crtc-dev;
- struct exynos_drm_private *dev_priv = dev-dev_private;
struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
struct drm_framebuffer *old_fb = crtc-primary-fb;
unsigned int crtc_w, crtc_h;
- int ret = -EINVAL;
+ int ret;
/* when the page flip is requested, crtc's dpms should be on */
if (exynos_crtc-dpms DRM_MODE_DPMS_ON) {
@@ -176,48 +174,49 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc
*crtc,
return -EINVAL;
}
- mutex_lock(dev-struct_mutex);
+ if (!event)
+ return -EINVAL;
- if (event) {
- /*
-* the pipe from user always is 0 so we can set pipe number
-* of current owner to event.
-*/
- event-pipe = exynos_crtc-pipe;
+ spin_lock_irq(dev-event_lock);
+ if (exynos_crtc-event) {
+ ret = -EBUSY;
+ goto out;
+ }
- ret = drm_vblank_get(dev, exynos_crtc-pipe);
- if (ret) {
- DRM_DEBUG(failed to acquire vblank counter\n);
+ ret = drm_vblank_get(dev, exynos_crtc-pipe);
+ if (ret) {
+ DRM_DEBUG(failed to acquire vblank counter\n);
+ goto out;
+ }
- goto out;
- }
+ exynos_crtc-event = event;
+ spin_unlock_irq(dev-event_lock);
+ /*
+* the pipe from user always is 0 so we can set pipe number
+* of current owner to event.
+*/
+ event-pipe = exynos_crtc-pipe;
+
+ crtc-primary-fb = fb;
+ crtc_w = fb-width - crtc-x;
+ crtc_h = fb-height - crtc-y;
+ ret = exynos_update_plane(crtc-primary, crtc, fb, 0, 0,
+ crtc_w, crtc_h, crtc-x, crtc-y,
+ crtc_w, crtc_h);
+ if (ret) {
+ crtc-primary-fb = old_fb;
spin_lock_irq(dev-event_lock);
- list_add_tail(event-base.link,
- dev_priv-pageflip_event_list);
- atomic_set(exynos_crtc-pending_flip, 1);
+ exynos_crtc-event = NULL;
+ drm_vblank_put(dev, exynos_crtc-pipe);
spin_unlock_irq(dev-event_lock);
-
- crtc-primary-fb = fb;
- crtc_w = fb-width - crtc-x;
- crtc_h = fb-height - crtc-y;
- ret = exynos_update_plane(crtc-primary, crtc, fb, 0, 0,
- crtc_w, crtc_h, crtc-x, crtc-y,
- crtc_w, crtc_h);
- if (ret) {
- crtc-primary-fb = old_fb;
-
- spin_lock_irq(dev-event_lock);
- drm_vblank_put(dev, exynos_crtc-pipe);
- list_del(event-base.link);
- atomic_set(exynos_crtc-pending_flip, 0);
- spin_unlock_irq(dev-event_lock);
-
- goto out;
- }
+ return ret;
}
+
+ return 0;
+
out:
-
[PATCH -v2 11/14] drm/exynos: atomic phase 1: add .mode_set_nofb() callback
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
The new atomic infrastructure needs the .mode_set_nofb() callback to
update CRTC timings before setting any plane.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_crtc.c | 60 +---
1 file changed, 9 insertions(+), 51 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
index 5e7c13e..7fbea8e 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
@@ -81,59 +81,16 @@ exynos_drm_crtc_mode_fixup(struct drm_crtc *crtc,
return true;
}
-static int
-exynos_drm_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
- struct drm_display_mode *adjusted_mode, int x, int y,
- struct drm_framebuffer *old_fb)
-{
- struct drm_framebuffer *fb = crtc-primary-fb;
- unsigned int crtc_w;
- unsigned int crtc_h;
- int ret;
-
- /*
-* copy the mode data adjusted by mode_fixup() into crtc-mode
-* so that hardware can be seet to proper mode.
-*/
- memcpy(crtc-mode, adjusted_mode, sizeof(*adjusted_mode));
-
- ret = exynos_check_plane(crtc-primary, fb);
- if (ret 0)
- return ret;
-
- crtc_w = fb-width - x;
- crtc_h = fb-height - y;
- exynos_plane_mode_set(crtc-primary, crtc, fb, 0, 0,
- crtc_w, crtc_h, x, y, crtc_w, crtc_h);
-
- return 0;
-}
-
-static int exynos_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
- struct drm_framebuffer *old_fb)
+static void
+exynos_drm_crtc_mode_set_nofb(struct drm_crtc *crtc)
{
struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
- struct drm_framebuffer *fb = crtc-primary-fb;
- unsigned int crtc_w;
- unsigned int crtc_h;
- int ret;
- /* when framebuffer changing is requested, crtc's dpms should be on */
- if (exynos_crtc-dpms DRM_MODE_DPMS_ON) {
- DRM_ERROR(failed framebuffer changing request.\n);
- return -EPERM;
- }
-
- ret = exynos_check_plane(crtc-primary, fb);
- if (ret)
- return ret;
-
- crtc_w = fb-width - x;
- crtc_h = fb-height - y;
- exynos_update_plane(crtc-primary, crtc, fb, 0, 0,
- crtc_w, crtc_h, x, y, crtc_w, crtc_h);
+ if (WARN_ON(!crtc-state))
+ return;
- return 0;
+ if (exynos_crtc-ops-commit)
+ exynos_crtc-ops-commit(exynos_crtc);
}
static void exynos_drm_crtc_disable(struct drm_crtc *crtc)
@@ -190,8 +147,9 @@ static struct drm_crtc_helper_funcs
exynos_crtc_helper_funcs = {
.prepare= exynos_drm_crtc_prepare,
.commit = exynos_drm_crtc_commit,
.mode_fixup = exynos_drm_crtc_mode_fixup,
- .mode_set = exynos_drm_crtc_mode_set,
- .mode_set_base = exynos_drm_crtc_mode_set_base,
+ .mode_set = drm_helper_crtc_mode_set,
+ .mode_set_nofb = exynos_drm_crtc_mode_set_nofb,
+ .mode_set_base = drm_helper_crtc_mode_set_base,
.disable= exynos_drm_crtc_disable,
.atomic_begin = exynos_crtc_atomic_begin,
.atomic_flush = exynos_crtc_atomic_flush,
--
1.9.3
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[PATCH -v2 13/14] drm/exynos: atomic phase 2: keep track of framebuffer pointer
From: Gustavo Padovan gustavo.pado...@collabora.co.uk Use drm_atomic_set_fb_for_plane() in the legacy page_flip path to keep track of the framebuffer pointer and reference. Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk --- drivers/gpu/drm/exynos/exynos_drm_crtc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c b/drivers/gpu/drm/exynos/exynos_drm_crtc.c index adb56656..1739212 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c +++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c @@ -208,6 +208,9 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc, crtc_w, crtc_h, crtc-x, crtc-y, crtc_w, crtc_h); + if (crtc-primary-state) + drm_atomic_set_fb_for_plane(crtc-primary-state, fb); + return 0; out: -- 1.9.3 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH -v2 00/14] drm/exynos: clean up + atomic phase 1 and 2
From: Gustavo Padovan gustavo.pado...@collabora.co.uk Hi, This is the v2 of this patchset. The only difference here is that I added the zpos refactor to this series after the review of v1 today. No changes were made to atomic patches besides solving conflicts after the new zpos changes. This series clean ups a few more paths from exynos-drm with the most important being the removal of the global page flip queue, the zpos refactor, and the removal in driver internal data (struct *_win_data) that was replicating plane data. Following these patches comes the first step torwards atomic modesetting support on exynos. These patches are applied on top of the dpms clean patches from Joonyoung and rebased on exynos-drm-next. Gustavo Padovan (13): drm/exynos: remove unused exynos_crtc-win_enable() callback drm/exynos: remove struct *_win_data abstraction on planes drm/exynos: preset zpos value for overlay planes drm/exynos: make zpos property immutable drm/exynos: remove exynos_plane_destroy() drm/exynos: remove leftover functions declarations drm/exynos: atomic phase 1: use drm_plane_helper_update() drm/exynos: atomic phase 1: use drm_plane_helper_disable() drm/exynos: atomic phase 1: add atomic_begin()/atomic_flush() drm/exynos: atomic phase 1: add .mode_set_nofb() callback drm/exynos: atomic phase 2: wire up state reset(), duplicate() and destroy() drm/exynos: atomic phase 2: keep track of framebuffer pointer drm/exynos: make exynos_plane_mode_set() static Mandeep Singh Baines (1): drm/exynos: track vblank events on a per crtc basis drivers/gpu/drm/bridge/ptn3460.c | 4 + drivers/gpu/drm/exynos/exynos_dp_core.c | 4 + drivers/gpu/drm/exynos/exynos_drm_connector.c | 4 + drivers/gpu/drm/exynos/exynos_drm_crtc.c | 205 ++--- drivers/gpu/drm/exynos/exynos_drm_crtc.h | 7 +- drivers/gpu/drm/exynos/exynos_drm_dpi.c | 4 + drivers/gpu/drm/exynos/exynos_drm_drv.c | 29 +-- drivers/gpu/drm/exynos/exynos_drm_drv.h | 26 +-- drivers/gpu/drm/exynos/exynos_drm_dsi.c | 4 + drivers/gpu/drm/exynos/exynos_drm_fb.c| 2 +- drivers/gpu/drm/exynos/exynos_drm_fimd.c | 245 +++--- drivers/gpu/drm/exynos/exynos_drm_plane.c | 126 +++-- drivers/gpu/drm/exynos/exynos_drm_plane.h | 14 +- drivers/gpu/drm/exynos/exynos_drm_vidi.c | 138 --- drivers/gpu/drm/exynos/exynos_hdmi.c | 4 + drivers/gpu/drm/exynos/exynos_mixer.c | 217 --- 16 files changed, 418 insertions(+), 615 deletions(-) -- 1.9.3 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH -v2 12/14] drm/exynos: atomic phase 2: wire up state reset(), duplicate() and destroy()
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Set CRTC, planes and connectors to use the default implementations from
the atomic helper library. The helpers will work to keep track of state
for each DRM object.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/bridge/ptn3460.c | 4
drivers/gpu/drm/exynos/exynos_dp_core.c | 4
drivers/gpu/drm/exynos/exynos_drm_connector.c | 4
drivers/gpu/drm/exynos/exynos_drm_crtc.c | 6 ++
drivers/gpu/drm/exynos/exynos_drm_dpi.c | 4
drivers/gpu/drm/exynos/exynos_drm_drv.c | 2 ++
drivers/gpu/drm/exynos/exynos_drm_dsi.c | 4
drivers/gpu/drm/exynos/exynos_drm_plane.c | 4
drivers/gpu/drm/exynos/exynos_drm_vidi.c | 4
drivers/gpu/drm/exynos/exynos_hdmi.c | 4
10 files changed, 40 insertions(+)
diff --git a/drivers/gpu/drm/bridge/ptn3460.c b/drivers/gpu/drm/bridge/ptn3460.c
index 826833e..30da10c 100644
--- a/drivers/gpu/drm/bridge/ptn3460.c
+++ b/drivers/gpu/drm/bridge/ptn3460.c
@@ -27,6 +27,7 @@
#include drm_crtc.h
#include drm_crtc_helper.h
+#include drm_atomic_helper.h
#include drm_edid.h
#include drmP.h
@@ -263,6 +264,9 @@ static struct drm_connector_funcs ptn3460_connector_funcs =
{
.fill_modes = drm_helper_probe_single_connector_modes,
.detect = ptn3460_detect,
.destroy = ptn3460_connector_destroy,
+ .reset = drm_atomic_helper_connector_reset,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
};
int ptn3460_bridge_attach(struct drm_bridge *bridge)
diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c
b/drivers/gpu/drm/exynos/exynos_dp_core.c
index bf17a60..6704d5c 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_core.c
+++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
@@ -28,6 +28,7 @@
#include drm/drmP.h
#include drm/drm_crtc.h
#include drm/drm_crtc_helper.h
+#include drm/drm_atomic_helper.h
#include drm/drm_panel.h
#include drm/bridge/ptn3460.h
@@ -952,6 +953,9 @@ static struct drm_connector_funcs exynos_dp_connector_funcs
= {
.fill_modes = drm_helper_probe_single_connector_modes,
.detect = exynos_dp_detect,
.destroy = exynos_dp_connector_destroy,
+ .reset = drm_atomic_helper_connector_reset,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
};
static int exynos_dp_get_modes(struct drm_connector *connector)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_connector.c
b/drivers/gpu/drm/exynos/exynos_drm_connector.c
index ba9b3d5..980b085 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_connector.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_connector.c
@@ -13,6 +13,7 @@
#include drm/drmP.h
#include drm/drm_crtc_helper.h
+#include drm/drm_atomic_helper.h
#include drm/exynos_drm.h
#include exynos_drm_drv.h
@@ -182,6 +183,9 @@ static struct drm_connector_funcs exynos_connector_funcs = {
.fill_modes = exynos_drm_connector_fill_modes,
.detect = exynos_drm_connector_detect,
.destroy= exynos_drm_connector_destroy,
+ .reset = drm_atomic_helper_connector_reset,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
};
struct drm_connector *exynos_drm_connector_create(struct drm_device *dev,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
index 7fbea8e..adb56656 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
@@ -14,6 +14,8 @@
#include drm/drmP.h
#include drm/drm_crtc_helper.h
+#include drm/drm_atomic.h
+#include drm/drm_atomic_helper.h
#include exynos_drm_crtc.h
#include exynos_drm_drv.h
@@ -228,8 +230,12 @@ static struct drm_crtc_funcs exynos_crtc_funcs = {
.set_config = drm_crtc_helper_set_config,
.page_flip = exynos_drm_crtc_page_flip,
.destroy= exynos_drm_crtc_destroy,
+ .reset = drm_atomic_helper_crtc_reset,
+ .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
+ .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
};
+
struct exynos_drm_crtc *exynos_drm_crtc_create(struct drm_device *drm_dev,
struct drm_plane *plane,
int pipe,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dpi.c
b/drivers/gpu/drm/exynos/exynos_drm_dpi.c
index 37678cf..ced5c23 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dpi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dpi.c
@@ -13,6 +13,7 @@
#include drm/drmP.h
#include drm/drm_crtc_helper.h
#include drm/drm_panel.h
+#include drm/drm_atomic_helper.h
#include
[PATCH -v2 08/14] drm/exynos: atomic phase 1: use drm_plane_helper_update()
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Rip out the check from exynos_update_plane() and create
exynos_check_plane() for the check phase enabling use to use
the atomic helpers to call our check and update phases when updating
planes.
Update all users of exynos_update_plane() accordingly to call
exynos_check_plane() before.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_crtc.c | 29
drivers/gpu/drm/exynos/exynos_drm_plane.c | 37 ++-
drivers/gpu/drm/exynos/exynos_drm_plane.h | 2 +-
3 files changed, 43 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
index eb49195..1c0d936 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
@@ -116,6 +116,7 @@ static int exynos_drm_crtc_mode_set_base(struct drm_crtc
*crtc, int x, int y,
struct drm_framebuffer *fb = crtc-primary-fb;
unsigned int crtc_w;
unsigned int crtc_h;
+ int ret;
/* when framebuffer changing is requested, crtc's dpms should be on */
if (exynos_crtc-dpms DRM_MODE_DPMS_ON) {
@@ -123,11 +124,16 @@ static int exynos_drm_crtc_mode_set_base(struct drm_crtc
*crtc, int x, int y,
return -EPERM;
}
+ ret = exynos_check_plane(crtc-primary, fb);
+ if (ret)
+ return ret;
+
crtc_w = fb-width - x;
crtc_h = fb-height - y;
+ exynos_update_plane(crtc-primary, crtc, fb, 0, 0,
+ crtc_w, crtc_h, x, y, crtc_w, crtc_h);
- return exynos_update_plane(crtc-primary, crtc, fb, 0, 0,
- crtc_w, crtc_h, x, y, crtc_w, crtc_h);
+ return 0;
}
static void exynos_drm_crtc_disable(struct drm_crtc *crtc)
@@ -164,7 +170,6 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
{
struct drm_device *dev = crtc-dev;
struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
- struct drm_framebuffer *old_fb = crtc-primary-fb;
unsigned int crtc_w, crtc_h;
int ret;
@@ -183,6 +188,10 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
goto out;
}
+ ret = exynos_check_plane(crtc-primary, fb);
+ if (ret)
+ goto out;
+
ret = drm_vblank_get(dev, exynos_crtc-pipe);
if (ret) {
DRM_DEBUG(failed to acquire vblank counter\n);
@@ -201,17 +210,9 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
crtc-primary-fb = fb;
crtc_w = fb-width - crtc-x;
crtc_h = fb-height - crtc-y;
- ret = exynos_update_plane(crtc-primary, crtc, fb, 0, 0,
- crtc_w, crtc_h, crtc-x, crtc-y,
- crtc_w, crtc_h);
- if (ret) {
- crtc-primary-fb = old_fb;
- spin_lock_irq(dev-event_lock);
- exynos_crtc-event = NULL;
- drm_vblank_put(dev, exynos_crtc-pipe);
- spin_unlock_irq(dev-event_lock);
- return ret;
- }
+ exynos_update_plane(crtc-primary, crtc, fb, 0, 0,
+ crtc_w, crtc_h, crtc-x, crtc-y,
+ crtc_w, crtc_h);
return 0;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c
b/drivers/gpu/drm/exynos/exynos_drm_plane.c
index 4367379..3d7c749 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c
@@ -141,21 +141,15 @@ void exynos_plane_mode_set(struct drm_plane *plane,
struct drm_crtc *crtc,
plane-crtc = crtc;
}
-int
+void
exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
struct drm_framebuffer *fb, int crtc_x, int crtc_y,
unsigned int crtc_w, unsigned int crtc_h,
uint32_t src_x, uint32_t src_y,
uint32_t src_w, uint32_t src_h)
{
-
struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
- int ret;
-
- ret = exynos_check_plane(plane, fb);
- if (ret 0)
- return ret;
exynos_plane_mode_set(plane, crtc, fb, crtc_x, crtc_y,
crtc_w, crtc_h, src_x 16, src_y 16,
@@ -163,8 +157,6 @@ exynos_update_plane(struct drm_plane *plane, struct
drm_crtc *crtc,
if (exynos_crtc-ops-win_commit)
exynos_crtc-ops-win_commit(exynos_crtc, exynos_plane-zpos);
-
- return 0;
}
static int exynos_disable_plane(struct drm_plane *plane)
@@ -180,11 +172,34 @@ static int exynos_disable_plane(struct drm_plane *plane)
}
static struct drm_plane_funcs exynos_plane_funcs = {
- .update_plane = exynos_update_plane,
+ .update_plane = drm_plane_helper_update,
Re: [PATCH 1/20] mtd: s3c2410: fix misspelling of current function in string
On Mon, Dec 08, 2014 at 10:16:37AM +0100, Richard Weinberger wrote:
Am 08.12.2014 um 08:11 schrieb Julia Lawall:
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 35aef5e..0a9c41f 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -948,7 +948,7 @@ static int s3c24xx_nand_probe(struct platform_device
*pdev)
cpu_type = platform_get_device_id(pdev)-driver_data;
- pr_debug(s3c2410_nand_probe(%p)\n, pdev);
+ pr_debug(%s(%p)\n, __func__, pdev);
I think we can drop the line completely.
We have ftrace to trace function calls...
Should the initialised ok at the end of the function be remove as well?
Will it be confusing if this cleanup is done in this function, but not in
others where it may be useful? Perhaps s3c2410_nand_update_chip, for
example?
Hmm, this driver seems to have a lot of debugging printks().
IMHO we can remove them.
Let's see what Brain says.
I'm a little late for this one, but I can apply this instead:
From: Brian Norris computersforpe...@gmail.com
Date: Fri, 6 Feb 2015 03:25:28 -0800
Subject: [PATCH] mtd: s3c2410: drop useless / misspelled debug prints
s3c2410_nand_probe is not the name of the function.
These prints have little utility, so let's just kill them.
Reported-by: Julia Lawall julia.law...@lip6.fr
Signed-off-by: Brian Norris computersforpe...@gmail.com
---
drivers/mtd/nand/s3c2410.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 35aef5edb588..0e02be47ce1d 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -948,8 +948,6 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
cpu_type = platform_get_device_id(pdev)-driver_data;
- pr_debug(s3c2410_nand_probe(%p)\n, pdev);
-
info = devm_kzalloc(pdev-dev, sizeof(*info), GFP_KERNEL);
if (info == NULL) {
err = -ENOMEM;
@@ -1045,7 +1043,6 @@ static int s3c24xx_nand_probe(struct platform_device
*pdev)
s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND);
}
- pr_debug(initialised ok\n);
return 0;
exit_error:
--
2.3.0
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Re: [RFC PATCH v2 3/3] ARM: dts: exynos5420: add async-bridge clocks to disp1 power domain
Hello Andrzej, On 02/06/2015 11:55 AM, Andrzej Hajda wrote: FIMD and MIXER IPs in disp1 power domain have async-bridges (to GSCALER), therefore their clocks should be enabled during power domain switch. Signed-off-by: Andrzej Hajda a.ha...@samsung.com --- Hi, This is 2nd version of the patch. After decrypting manual and discussion with Marek I guess this set of clocks is more apropriate - async-bridges are present in MIXER and FIMD, so their clocks should be enabled. I just tested this version on my Exynos5420 Peach Pit and the power domain failed error does not happen anymore even after enabling and disabling the HDMI display several times. Thanks a lot for fixing this since the dependency was not clear to me from reading the manual. The 1st version worked for me due to fact I have forgot to remove clk_ignore_unused kernel boot option during tests ;) Yes, that has bitten me too many times as well :) Regards Andrzej --- Best regards, Javier -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL 3/3] Samsung CPUIdle updates for v3.20
On Wed, Feb 04, 2015 at 11:31:42PM +0900, Kukjin Kim wrote: Hi, This is cpuidle update for v3.20. Please pull. Thanks, Kukjin The following changes since commit 97bf6af1f928216fd6c5a66e8a57bfa95a659672: Linux 3.19-rc1 (2014-12-20 17:08:50 -0800) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-cpuidle for you to fetch changes up to 712eddf70225ab5ae65e946e22d2dfe6b93e8dd1: cpuidle: exynos: add coupled cpuidle support for exynos4210 (2015-01-30 08:39:15 +0900) Samsung CPUIdle updates for v3.20 - adds coupled cpuidle support for exynos4210 : fix for Exynos platform PM code preparing it for the coupled cpuidle support and adds coupled cpuidle AFTR mode on exynos4210 Note this is mostrly based on earlier cpuidle-exynos4210 driver from Daniel Lezcano and Bart updated. Merged, thanks. -Olof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RESEND PATCH V3 15/15] ARM: dts: Fix I2S1, I2S2 compatible for exynos4 SoCs
On 05/02/15 20:41, Mark Brown wrote: On Tue, Feb 03, 2015 at 03:06:22PM +0100, Sylwester Nawrocki wrote: I2S1, I2S2 on Exynos4 SoC series have limited functionality compared to I2S0, samsung,s3c6410-i2s compatible should be used for them. I've applied this even though I really shouldn't in order to get it in. Since it's a bug fix for stable it should've been near the head of any series it's part of not the very last patch in the series, and since it's not really related to the rest of the series except in that it relates to the same driver it should probably have been sent by itself rather than mixed in with everything else. Indeed I could sent this one separately to Kukjin, the issue it fixes was just found in the course of creating remaining part of the series and I wanted to keep somewhat related changes together. Thank you for merging it. I hope you picked up the previous 2 as well, I couldn't see them in your tree. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH v2 3/3] ARM: dts: exynos5420: add async-bridge clocks to disp1 power domain
FIMD and MIXER IPs in disp1 power domain have async-bridges (to GSCALER),
therefore their clocks should be enabled during power domain switch.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
Hi,
This is 2nd version of the patch. After decrypting manual and discussion
with Marek I guess this set of clocks is more apropriate - async-bridges
are present in MIXER and FIMD, so their clocks should be enabled.
The 1st version worked for me due to fact I have forgot to remove
clk_ignore_unused kernel boot option during tests ;)
Regards
Andrzej
---
arch/arm/boot/dts/exynos5420.dtsi | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm/boot/dts/exynos5420.dtsi
index e1fa800..58579f5 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -293,9 +293,11 @@
clock CLK_MOUT_SW_ACLK300,
clock CLK_MOUT_USER_ACLK300_DISP1,
clock CLK_MOUT_SW_ACLK400,
-clock CLK_MOUT_USER_ACLK400_DISP1;
+clock CLK_MOUT_USER_ACLK400_DISP1,
+clock CLK_FIMD1, clock CLK_MIXER;
clock-names = oscclk, pclk0, clk0,
- pclk1, clk1, pclk2, clk2;
+ pclk1, clk1, pclk2, clk2,
+ asb0, asb1;
};
pinctrl_0: pinctrl@1340 {
--
1.9.1
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Re: [GIT PULL 1/3] Samsung exynos_defconfig updates for v3.20
On Wed, Feb 04, 2015 at 11:31:23PM +0900, Kukjin Kim wrote: Hi Arnd, Olof, Kevin Here is late pull request for exynos_defconfig updates for v3.20 and if you're OK please pull. Note this is based on previous exynos_defconfig pull-request during v3.19-rc. Thanks, Kukjin The following changes since commit 842ebf60bbad6d6e5ebaa063409fefdd2a7eb992: ARM: exynos_defconfig: Enable LM90 driver (2014-12-23 00:20:44 +0900) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-defconfig for you to fetch changes up to 39ecb024e9727c9c29765ca233bdca91c8589d01: ARM: exynos_defconfig: Enable CONFIG_FHANDLE (2015-01-24 13:50:01 +0900) Merged, thanks. -Olof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RESEND PATCH V3 15/15] ARM: dts: Fix I2S1, I2S2 compatible for exynos4 SoCs
On Fri, Feb 06, 2015 at 12:30:45PM +0100, Sylwester Nawrocki wrote: Thank you for merging it. I hope you picked up the previous 2 as well, I couldn't see them in your tree. I probably will if I don't hear anything but since they don't need to go as a bug fix I can leave Kukjin a bit longer to say if he's OK with that. signature.asc Description: Digital signature
Re: [RFC PATCH 0/3] Fix power domains handling on exynos542x
Hello Joonyoung, On 02/06/2015 06:27 AM, Joonyoung Shim wrote: On 02/05/2015 11:45 PM, Javier Martinez Canillas wrote: I also tested on an Exynos5420 Peach Pit Chromebook and both the Power domain power-domain disable failed message and the system crash are gone. Really gone out Power domain power-domain disable failed message? Still i get the message from second try, # modetest -M exynos -s 23@21:1920x1080 setting mode 1920x1080@XR24 on connectors 23, crtc 21 # modetest -M exynos -s 23@21:1920x1080 setting mode 1920x1080@XR24 on connectors 23, crtc 21 [ 39.608881] Power domain power-domain disable failed # modetest -M exynos -s 23@21:1920x1080 setting mode 1920x1080@XR24 on connectors 23, crtc 21 [ 42.827637] Power domain power-domain disable failed ... You are right, I tested that if I execute: # for val in 1 0; do echo $val /sys/class/drm/card0/device/graphics/fb0/blank; done many times I see the Power domain power-domain disable failed message again and there is no output in the HDMI display when dpms on. But even in that case, the imprecise external abort does not happen when the exynos_mixer driver tries to access the mixer registers and the system does not crash anymore. So I think that Andrzej's patches are at least a step in the right direction. Best regards, Javier -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL 2/3] Samsung 4th DT updates for v3.20
On Wed, Feb 04, 2015 at 11:31:33PM +0900, Kukjin Kim wrote: Hi, Here is 4th DT updates for v3.20. Please pull. Note there are several dt updates in my tree which has a dependency with driver side for v3.20 and I hope it can be sent to upstream via arm-soc during late merge window. If it is OK to you guys, I'll send a pull request soon. (example tmu, asoc and devfreq) Why do they have driver dependencies? Can't the dts contents be merged separately, such that the drivers just work once they land? Or are you redefining bindings in an incompatible manner? The following changes since commit ea08de16eb1ba2052ce2db4b58b62a2ec33357a3: ARM: dts: Add DISP1 power domain for exynos5420 (2015-01-29 08:52:23 +0900) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-dt-4 for you to fetch changes up to 7808cae3e97140781eb3f712084caf4e44c126c9: ARM: dts: Add PPMU node for exynos4412-trats2 (2015-02-04 08:11:52 +0900) Merged. -Olof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/4] drm/exynos: remove struct *_win_data abstraction on planes
Hi,
2015-02-06 Joonyoung Shim jy0922.s...@samsung.com:
Hi Gustavo,
On 02/06/2015 02:59 AM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
struct {fimd,mixer,vidi}_win_data was just keeping the same data
as struct exynos_drm_plane thus get ride of it and use exynos_drm_plane
directly.
It changes how planes are created and remove .win_mode_set() callback
that was only filling all *_win_data structs.
OK, let's go ahead this with next zpos problem fix.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_crtc.c | 9 +-
drivers/gpu/drm/exynos/exynos_drm_crtc.h | 1 +
drivers/gpu/drm/exynos/exynos_drm_drv.c | 14 --
drivers/gpu/drm/exynos/exynos_drm_drv.h | 5 +-
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 182 ++---
drivers/gpu/drm/exynos/exynos_drm_plane.c | 20 +--
drivers/gpu/drm/exynos/exynos_drm_plane.h | 6 +-
drivers/gpu/drm/exynos/exynos_drm_vidi.c | 123 +
drivers/gpu/drm/exynos/exynos_mixer.c | 212
+++---
9 files changed, 183 insertions(+), 389 deletions(-)
[snip]
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c
b/drivers/gpu/drm/exynos/exynos_mixer.c
index 736269a..6e7c0cc 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -37,34 +37,13 @@
#include exynos_drm_drv.h
#include exynos_drm_crtc.h
+#include exynos_drm_plane.h
#include exynos_drm_iommu.h
#include exynos_mixer.h
#define MIXER_WIN_NR 3
#define MIXER_DEFAULT_WIN 0
-struct hdmi_win_data {
- dma_addr_t dma_addr;
- dma_addr_t chroma_dma_addr;
- uint32_tpixel_format;
- unsigned intbpp;
- unsigned intcrtc_x;
- unsigned intcrtc_y;
- unsigned intcrtc_width;
- unsigned intcrtc_height;
- unsigned intfb_x;
- unsigned intfb_y;
- unsigned intfb_width;
- unsigned intfb_height;
- unsigned intsrc_width;
- unsigned intsrc_height;
- unsigned intmode_width;
- unsigned intmode_height;
- unsigned intscan_flags;
- boolenabled;
- boolresume;
-};
-
struct mixer_resources {
int irq;
void __iomem*mixer_regs;
@@ -88,6 +67,7 @@ struct mixer_context {
struct device *dev;
struct drm_device *drm_dev;
struct exynos_drm_crtc *crtc;
+ struct exynos_drm_plane planes[MIXER_WIN_NR];
int pipe;
boolinterlace;
boolpowered;
@@ -97,7 +77,6 @@ struct mixer_context {
struct mutexmixer_mutex;
struct mixer_resources mixer_res;
- struct hdmi_win_datawin_data[MIXER_WIN_NR];
enum mixer_version_id mxr_ver;
wait_queue_head_t wait_vsync_queue;
atomic_twait_vsync_event;
@@ -401,7 +380,7 @@ static void vp_video_buffer(struct mixer_context *ctx,
int win)
{
struct mixer_resources *res = ctx-mixer_res;
unsigned long flags;
- struct hdmi_win_data *win_data;
+ struct exynos_drm_plane *plane;
unsigned int x_ratio, y_ratio;
unsigned int buf_num = 1;
dma_addr_t luma_addr[2], chroma_addr[2];
@@ -409,9 +388,9 @@ static void vp_video_buffer(struct mixer_context *ctx,
int win)
bool crcb_mode = false;
u32 val;
- win_data = ctx-win_data[win];
+ plane = ctx-planes[win];
- switch (win_data-pixel_format) {
+ switch (plane-pixel_format) {
case DRM_FORMAT_NV12MT:
tiled_mode = true;
case DRM_FORMAT_NV12:
@@ -421,35 +400,35 @@ static void vp_video_buffer(struct mixer_context
*ctx, int win)
/* TODO: single buffer format NV12, NV21 */
default:
/* ignore pixel format at disable time */
- if (!win_data-dma_addr)
+ if (!plane-dma_addr[0])
break;
DRM_ERROR(pixel format for vp is wrong [%d].\n,
- win_data-pixel_format);
+ plane-pixel_format);
return;
}
/* scaling feature: (src 16) / dst */
- x_ratio = (win_data-src_width 16) / win_data-crtc_width;
- y_ratio = (win_data-src_height 16) / win_data-crtc_height;
+ x_ratio = (plane-src_width 16) / plane-crtc_width;
+ y_ratio = (plane-src_height 16) / plane-crtc_height;
if (buf_num == 2) {
- luma_addr[0] = win_data-dma_addr;
- chroma_addr[0] = win_data-chroma_dma_addr;
+ luma_addr[0] = plane-dma_addr[0];
+
[PATCH v2 3/3] clk: samsung: add cpu clock configuration data and instantiate cpu clock
Add the Atlas CPU clock configuration data and instantiate the CPU clock
type for Exynos7.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
---
drivers/clk/samsung/clk-cpu.h |5 +
drivers/clk/samsung/clk-exynos7.c | 33 ++-
include/dt-bindings/clock/exynos7-clk.h |3 ++-
3 files changed, 39 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/samsung/clk-cpu.h b/drivers/clk/samsung/clk-cpu.h
index 24e844e..1fd7f51 100644
--- a/drivers/clk/samsung/clk-cpu.h
+++ b/drivers/clk/samsung/clk-cpu.h
@@ -31,6 +31,11 @@
#define E5420_KFC_DIV(kpll, pclk, aclk)
\
kpll) 24) | ((pclk) 20) | ((aclk) 4)))
+#define EXYNOS7_ATL_DIV0(aclk, pclk, atclk, pclk_dbg) \
+ ((aclk 8) | (pclk 12) | (atclk 20) | (pclk_dbg 26))
+#define EXYNOS7_ATL_DIV1(pll, hpm, cntclk) \
+ ((pll 0) | (hpm 4) | (cntclk 8))
+
/**
* struct exynos_cpuclk_data: config data to setup cpu clocks.
* @prate: frequency of the primary parent clock (in KHz).
diff --git a/drivers/clk/samsung/clk-exynos7.c
b/drivers/clk/samsung/clk-exynos7.c
index cec026c..f2a9895 100644
--- a/drivers/clk/samsung/clk-exynos7.c
+++ b/drivers/clk/samsung/clk-exynos7.c
@@ -14,6 +14,7 @@
#include linux/of.h
#include clk.h
+#include clk-cpu.h
#include dt-bindings/clock/exynos7-clk.h
/* Register Offset definitions for CMU_TOPC (0x1057) */
@@ -64,6 +65,30 @@ static const struct samsung_pll_rate_table
pll1450x_24mhz_tbl[] = {
PLL_35XX_RATE(2, 200, 3, 3),
};
+static const struct exynos_cpuclk_cfg_data exynos7_atlclk_d[] __initconst = {
+ { 210, EXYNOS7_ATL_DIV0(2, 6, 6, 6), EXYNOS7_ATL_DIV1(1, 5, 6), },
+ { 200, EXYNOS7_ATL_DIV0(2, 6, 6, 6), EXYNOS7_ATL_DIV1(1, 5, 6), },
+ { 1896000, EXYNOS7_ATL_DIV0(2, 6, 6, 6), EXYNOS7_ATL_DIV1(1, 4, 6), },
+ { 180, EXYNOS7_ATL_DIV0(2, 6, 6, 6), EXYNOS7_ATL_DIV1(1, 4, 6), },
+ { 1704000, EXYNOS7_ATL_DIV0(2, 6, 6, 6), EXYNOS7_ATL_DIV1(1, 4, 6), },
+ { 160, EXYNOS7_ATL_DIV0(2, 6, 6, 6), EXYNOS7_ATL_DIV1(1, 4, 6), },
+ { 150, EXYNOS7_ATL_DIV0(2, 6, 6, 6), EXYNOS7_ATL_DIV1(1, 4, 6), },
+ { 140, EXYNOS7_ATL_DIV0(2, 6, 6, 6), EXYNOS7_ATL_DIV1(1, 4, 6), },
+ { 130, EXYNOS7_ATL_DIV0(2, 6, 6, 6), EXYNOS7_ATL_DIV1(1, 4, 6), },
+ { 120, EXYNOS7_ATL_DIV0(2, 6, 6, 6), EXYNOS7_ATL_DIV1(1, 3, 6), },
+ { 110, EXYNOS7_ATL_DIV0(2, 6, 6, 6), EXYNOS7_ATL_DIV1(1, 3, 6), },
+ { 100, EXYNOS7_ATL_DIV0(2, 6, 6, 6), EXYNOS7_ATL_DIV1(1, 3, 6), },
+ { 90, EXYNOS7_ATL_DIV0(2, 6, 6, 6), EXYNOS7_ATL_DIV1(1, 3, 6), },
+ { 80, EXYNOS7_ATL_DIV0(2, 5, 5, 5), EXYNOS7_ATL_DIV1(1, 3, 5), },
+ { 70, EXYNOS7_ATL_DIV0(2, 5, 5, 5), EXYNOS7_ATL_DIV1(1, 3, 5), },
+ { 60, EXYNOS7_ATL_DIV0(2, 4, 4, 4), EXYNOS7_ATL_DIV1(1, 3, 4), },
+ { 50, EXYNOS7_ATL_DIV0(2, 3, 3, 3), EXYNOS7_ATL_DIV1(1, 2, 3), },
+ { 40, EXYNOS7_ATL_DIV0(2, 3, 3, 3), EXYNOS7_ATL_DIV1(1, 2, 3), },
+ { 30, EXYNOS7_ATL_DIV0(2, 3, 3, 3), EXYNOS7_ATL_DIV1(1, 2, 3), },
+ { 20, EXYNOS7_ATL_DIV0(2, 3, 3, 3), EXYNOS7_ATL_DIV1(1, 1, 3), },
+ { 0 },
+};
+
static struct samsung_fixed_factor_clock topc_fixed_factor_clks[] __initdata =
{
FFACTOR(0, ffac_topc_bus0_pll_div2, mout_bus0_pll_ctrl, 1, 2, 0),
FFACTOR(0, ffac_topc_bus0_pll_div4,
@@ -620,7 +645,13 @@ static struct samsung_cmu_info atlas_cmu_info __initdata =
{
static void __init exynos7_clk_atlas_init(struct device_node *np)
{
- samsung_cmu_register_one(np, atlas_cmu_info);
+ struct samsung_clk_provider *ctx;
+
+ ctx = samsung_cmu_register_one(np, atlas_cmu_info);
+ exynos_register_cpu_clock(ctx, CLK_ATLAS_CLK, atlclk,
+ mout_atlas_p[0], mout_atlas_p[1], 0,
+ exynos7_atlclk_d, ARRAY_SIZE(exynos7_atlclk_d),
+ 0, np);
}
CLK_OF_DECLARE(exynos7_clk_atlas, samsung,exynos7-clock-atlas,
diff --git a/include/dt-bindings/clock/exynos7-clk.h
b/include/dt-bindings/clock/exynos7-clk.h
index 6b9465c..6df64ef 100644
--- a/include/dt-bindings/clock/exynos7-clk.h
+++ b/include/dt-bindings/clock/exynos7-clk.h
@@ -67,7 +67,8 @@
#define CLK_ATLAS 12
#define DOUT_SCLK_HPM_ATLAS13
#define DOUT_ATLAS_PLL 14
-#define ATLAS_NR_CLK 15
+#define CLK_ATLAS_CLK 15
+#define ATLAS_NR_CLK 16
/* CCORE */
#define PCLK_RTC 1
--
1.7.9.5
--
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[PATCH v2 0/3] Add CPU clock support for Exynos7
This patch set adds the atlas clock hierarchy on Exynos7. It also modifies the existing cpu clock infrastructure to handle exynos7 differences. These patches are a pre-requisite for enabling CPUFreq on Exynos7. This patch set has been tested on next-20150202 with samsung clk tree (for-v3.20/clk/next branch) merged. Following are the dependencies: 1) cpufreq: use generic cpufreq drivers for exynos platforms (v12) http://lists.infradead.org/pipermail/linux-arm-kernel/2014-November/304975.html For testing I have applied the following: 1) mfd: sec: add S2MPS15 PMIC support https://lkml.org/lkml/2014/10/14/50 2) regulator: s2mps11: add support for S2MPS15 regulators https://lkml.org/lkml/2014/10/14/52 3) Regulators dt nodes were added in the espresso dts file and I2C channel 4 which has the PMIC on it was tested. Abhilash Kesavan (3): clk: samsung: exynos7: add clocks for CPU block clk: samsung: add cpu clock support for Exynos7 clk: samsung: add cpu clock configuration data and instantiate cpu clock .../devicetree/bindings/clock/exynos7-clock.txt|6 + drivers/clk/samsung/clk-cpu.c | 147 ++- drivers/clk/samsung/clk-cpu.h | 38 - drivers/clk/samsung/clk-exynos4.c |2 +- drivers/clk/samsung/clk-exynos5250.c |2 +- drivers/clk/samsung/clk-exynos5420.c |4 +- drivers/clk/samsung/clk-exynos7.c | 152 include/dt-bindings/clock/exynos7-clk.h| 21 ++- 8 files changed, 363 insertions(+), 9 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/3] clk: samsung: exynos7: add clocks for CPU block
Add clock support for the Atlas CPU block in Exynos7.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
---
.../devicetree/bindings/clock/exynos7-clock.txt|6 +
drivers/clk/samsung/clk-exynos7.c | 121
include/dt-bindings/clock/exynos7-clk.h| 20 +++-
3 files changed, 146 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/clock/exynos7-clock.txt
b/Documentation/devicetree/bindings/clock/exynos7-clock.txt
index 6bf1e74..bcf274b5 100644
--- a/Documentation/devicetree/bindings/clock/exynos7-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos7-clock.txt
@@ -28,6 +28,7 @@ Required Properties for Clock Controller:
- samsung,exynos7-clock-topc
- samsung,exynos7-clock-top0
- samsung,exynos7-clock-top1
+ - samsung,exynos7-clock-atlas
- samsung,exynos7-clock-ccore
- samsung,exynos7-clock-peric0
- samsung,exynos7-clock-peric1
@@ -64,6 +65,11 @@ Input clocks for top1 clock controller:
- dout_sclk_cc_pll
- dout_sclk_mfc_pll
+Input clocks for atlas clock controller:
+ - fin_pll
+ - fout_atlas_pll
+ - mout_sclk_bus0_pll_atlas
+
Input clocks for ccore clock controller:
- fin_pll
- dout_aclk_ccore_133
diff --git a/drivers/clk/samsung/clk-exynos7.c
b/drivers/clk/samsung/clk-exynos7.c
index b61724b..cec026c 100644
--- a/drivers/clk/samsung/clk-exynos7.c
+++ b/drivers/clk/samsung/clk-exynos7.c
@@ -36,6 +36,34 @@
#define DIV_TOPC3 0x060C
#define ENABLE_ACLK_TOPC1 0x0804
+static const struct samsung_pll_rate_table pll1450x_24mhz_tbl[] = {
+ /* rate, m, p, s */
+ PLL_35XX_RATE(249600, 208, 2, 0),
+ PLL_35XX_RATE(24, 200, 2, 0),
+ PLL_35XX_RATE(230400, 192, 2, 0),
+ PLL_35XX_RATE(22, 275, 3, 0),
+ PLL_35XX_RATE(21, 175, 2, 0),
+ PLL_35XX_RATE(20, 250, 3, 0),
+ PLL_35XX_RATE(189600, 158, 2, 0),
+ PLL_35XX_RATE(18, 150, 2, 0),
+ PLL_35XX_RATE(170400, 142, 2, 0),
+ PLL_35XX_RATE(16, 200, 3, 0),
+ PLL_35XX_RATE(15, 250, 2, 1),
+ PLL_35XX_RATE(14, 350, 3, 1),
+ PLL_35XX_RATE(13, 325, 3, 1),
+ PLL_35XX_RATE(12, 200, 2, 1),
+ PLL_35XX_RATE(11, 275, 3, 1),
+ PLL_35XX_RATE(10, 250, 3, 1),
+ PLL_35XX_RATE(9, 150, 2, 1),
+ PLL_35XX_RATE(8, 200, 3, 1),
+ PLL_35XX_RATE(7, 350, 3, 2),
+ PLL_35XX_RATE(6, 200, 2, 2),
+ PLL_35XX_RATE(5, 250, 3, 2),
+ PLL_35XX_RATE(4, 200, 3, 2),
+ PLL_35XX_RATE(3, 200, 2, 3),
+ PLL_35XX_RATE(2, 200, 3, 3),
+};
+
static struct samsung_fixed_factor_clock topc_fixed_factor_clks[] __initdata =
{
FFACTOR(0, ffac_topc_bus0_pll_div2, mout_bus0_pll_ctrl, 1, 2, 0),
FFACTOR(0, ffac_topc_bus0_pll_div4,
@@ -57,6 +85,8 @@ PNAME(mout_bus1_pll_ctrl_p) = { fin_pll, fout_bus1_pll
};
PNAME(mout_cc_pll_ctrl_p) = { fin_pll, fout_cc_pll };
PNAME(mout_mfc_pll_ctrl_p) = { fin_pll, fout_mfc_pll };
+PNAME(mout_topc_group1)= { mout_bus0_pll_ctrl,
ffac_topc_bus0_pll_div2,
+mout_bus1_pll_ctrl, mout_cc_pll_ctrl };
PNAME(mout_topc_group2) = { mout_sclk_bus0_pll_cmuc,
mout_sclk_bus1_pll_cmuc, mout_sclk_cc_pll_cmuc,
mout_sclk_mfc_pll_cmuc };
@@ -111,6 +141,8 @@ static struct samsung_mux_clock topc_mux_clks[] __initdata
= {
MUX(0, mout_sclk_bus0_pll_out, mout_sclk_bus0_pll_out_p,
MUX_SEL_TOPC1, 16, 1),
+ MUX(MOUT_SCLK_BUS0_PLL_ATLAS, mout_sclk_bus0_pll_atlas,
+ mout_topc_group1, MUX_SEL_TOPC1, 4, 2),
MUX(0, mout_aud_pll_ctrl, mout_aud_pll_ctrl_p, MUX_SEL_TOPC1, 0, 1),
MUX(0, mout_aclk_ccore_133, mout_topc_group2, MUX_SEL_TOPC2, 4, 2),
@@ -504,6 +536,95 @@ static void __init exynos7_clk_top1_init(struct
device_node *np)
CLK_OF_DECLARE(exynos7_clk_top1, samsung,exynos7-clock-top1,
exynos7_clk_top1_init);
+/* Register Offset definitions for CMU_ATLAS (0x1180) */
+#defineATLAS_PLL_LOCK 0x
+#defineATLAS_PLL_CON0 0x0100
+#defineMUX_SEL_ATLAS0 0x0200
+#defineMUX_SEL_ATLAS1 0x0204
+#defineMUX_SEL_ATLAS2 0x0208
+#defineDIV_ATLAS0 0x0600
+#defineDIV_ATLAS1 0x0604
+#defineENABLE_SCLK_ATLAS 0x0A00
+
+/* List of parent clocks for Muxes in CMU_ATLAS */
+PNAME(mout_atlas_pll_ctrl_p) = { fin_pll, fout_atlas_pll };
+PNAME(mout_bus_pll_atlas_p) = { fin_pll, mout_sclk_bus0_pll_atlas };
+PNAME(mout_atlas_p) = { mout_atlas_pll_ctrl, mout_bus_pll_atlas };
+
+static unsigned long atlas_clk_regs[] __initdata = {
+ ATLAS_PLL_LOCK,
+ ATLAS_PLL_CON0,
+
[PATCH v2 2/3] clk: samsung: add cpu clock support for Exynos7
The divider and mux register offsets and bits are different on
Exynos7 from the older SoCs. Add new pre/post rate change callbacks
for Exynos7 to handle these differences. To do this:
- Add a new exynos_cpuclk_soc_data structure that will hold
the SoC-specific pre/post rate change call-backs
- Modify exynos_register_cpu_clock() prototype to include a
node pointer
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
---
drivers/clk/samsung/clk-cpu.c| 147 +-
drivers/clk/samsung/clk-cpu.h| 33 +++-
drivers/clk/samsung/clk-exynos4.c|2 +-
drivers/clk/samsung/clk-exynos5250.c |2 +-
drivers/clk/samsung/clk-exynos5420.c |4 +-
5 files changed, 180 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/samsung/clk-cpu.c b/drivers/clk/samsung/clk-cpu.c
index 009a21b..743 100644
--- a/drivers/clk/samsung/clk-cpu.c
+++ b/drivers/clk/samsung/clk-cpu.c
@@ -51,6 +51,13 @@
#define DIV_MASK_ALL 0x
#define MUX_MASK 7
+#define EXYNOS7_SRC_CPU0x208
+#define EXYNOS7_STAT_CPU 0x408
+#define EXYNOS7_DIV_CPU0 0x600
+#define EXYNOS7_DIV_CPU1 0x604
+#define EXYNOS7_DIV_STAT_CPU0 0x700
+#define EXYNOS7_DIV_STAT_CPU1 0x704
+
/*
* Helper function to wait until divider(s) have stabilized after the divider
* value has changed.
@@ -232,6 +239,105 @@ static int exynos_cpuclk_post_rate_change(struct
clk_notifier_data *ndata,
return 0;
}
+/* Exynos7 helper function to set the 'safe' dividers for the CPU clock. The
+ * parameters div and mask contain the divider value and the register bit mask
+ * of the dividers to be programmed.
+ */
+static void exynos7_set_safe_div(void __iomem *base, unsigned long div,
+ unsigned long mask)
+{
+ unsigned long div1;
+
+ div1 = readl(base + EXYNOS7_DIV_CPU1);
+ div1 = (div1 ~mask) | (div mask);
+ writel(div1, base + EXYNOS7_DIV_CPU1);
+ wait_until_divider_stable(base + EXYNOS7_DIV_STAT_CPU1, mask);
+}
+
+/* Exynos7 handler for pre-rate change notification from parent clock */
+static int exynos7_cpuclk_pre_rate_change(struct clk_notifier_data *ndata,
+ struct exynos_cpuclk *cpuclk, void __iomem *base)
+{
+ const struct exynos_cpuclk_cfg_data *cfg_data = cpuclk-cfg;
+ unsigned long alt_prate = clk_get_rate(cpuclk-alt_parent);
+ unsigned long alt_div = 0, alt_div_mask = DIV_MASK;
+ unsigned long div0, div1 = 0, mux_reg;
+
+ /* find out the divider values to use for clock data */
+ while ((cfg_data-prate * 1000) != ndata-new_rate) {
+ if (cfg_data-prate == 0)
+ return -EINVAL;
+ cfg_data++;
+ }
+
+ spin_lock(cpuclk-lock);
+
+ div0 = cfg_data-div0;
+ div1 = cfg_data-div1;
+
+ /*
+* If the new and old parent clock speed is less than the clock speed
+* of the alternate parent, then it should be ensured that at no point
+* the armclk speed is more than the old_prate until the dividers are
+* set.
+*/
+ if (alt_prate ndata-old_rate) {
+ alt_div = DIV_ROUND_UP(alt_prate, ndata-old_rate) - 1;
+ WARN_ON(alt_div = MAX_DIV);
+ alt_div |= E4210_DIV1_HPM_MASK;
+ alt_div_mask |= E4210_DIV1_HPM_MASK;
+
+ exynos7_set_safe_div(base, alt_div, alt_div_mask);
+ div1 |= alt_div;
+ }
+
+ /* select mout_bus0_pll_atlas as the alternate parent */
+ mux_reg = readl(base + EXYNOS7_SRC_CPU);
+ writel(mux_reg | (1 0), base + EXYNOS7_SRC_CPU);
+ wait_until_mux_stable(base + EXYNOS7_STAT_CPU, 0, 1);
+
+ /* alternate parent is active now. set the dividers */
+ writel(div0, base + EXYNOS7_DIV_CPU0);
+ wait_until_divider_stable(base + EXYNOS7_DIV_STAT_CPU0, DIV_MASK_ALL);
+
+ writel(div1, base + EXYNOS7_DIV_CPU1);
+ wait_until_divider_stable(base + EXYNOS7_DIV_STAT_CPU1,
+ DIV_MASK_ALL);
+
+ spin_unlock(cpuclk-lock);
+ return 0;
+}
+
+/* Exynos7 handler for post-rate change notification from parent clock */
+static int exynos7_cpuclk_post_rate_change(struct clk_notifier_data *ndata,
+ struct exynos_cpuclk *cpuclk, void __iomem *base)
+{
+ const struct exynos_cpuclk_cfg_data *cfg_data = cpuclk-cfg;
+ unsigned long div = 0, div_mask = DIV_MASK;
+ unsigned long mux_reg;
+
+ spin_lock(cpuclk-lock);
+
+ /* select mout_atlas_pll as the alternate parent */
+ mux_reg = readl(base + EXYNOS7_SRC_CPU);
+ writel(mux_reg ~(1 0), base + EXYNOS7_SRC_CPU);
+ wait_until_mux_stable(base + EXYNOS7_STAT_CPU, 0, 0);
+
+ /* find out the divider values to use for clock data */
+ while ((cfg_data-prate * 1000) != ndata-new_rate) {
+ if
Re: [PATCH v2 2/2] arm/dma-mapping: Respect NO_KERNEL_MAPPING when we don't have an IOMMU
Hello, On 2015-02-05 11:13, Carlo Caione wrote: On Wed, Feb 4, 2015 at 11:21 AM, Marek Szyprowski m.szyprow...@samsung.com wrote: On 2015-02-04 10:23, Carlo Caione wrote: From: Jasper St. Pierre jstpie...@mecheye.net Even without an iommu, NO_KERNEL_MAPPING is still convenient to save on kernel address space in places where we don't need a kernel mapping. Implement support for it in the two places where we're creating an expensive mapping. __alloc_from_pool uses an internal pool from which we already have virtual addresses, so it's not relevant, and __alloc_simple_buffer uses alloc_pages, which will always return a lowmem page, which is already mapped into kernel space, so we can't prevent a mapping for it in that case. Signed-off-by: Jasper St. Pierre jstpie...@mecheye.net Signed-off-by: Carlo Caione ca...@caione.org Reviewed-by: Rob Clark robdcl...@gmail.com Reviewed-by: Daniel Drake d...@endlessm.com Acked-by: Marek Szyprowski m.szyprow...@samsung.com Thanks. Who is supposed to take this patch? Russel? I think this will be the best way to get it merged. Please upload it to http://www.arm.linux.org.uk/developer/patches/ Best regards -- Marek Szyprowski, PhD Samsung RD Institute Poland -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] thermal: exynos: fix: Check if data-tmu_read callback is present before read
The exynos_tmu_data() function should on entrance test not only for valid
data pointer, but also for data-tmu_read one.
It is important, since afterwards it is dereferenced to get temperature code.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
drivers/thermal/samsung/exynos_tmu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index 3a19353..a86e0495e 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -717,7 +717,7 @@ static int exynos_get_temp(void *p, long *temp)
{
struct exynos_tmu_data *data = p;
- if (!data)
+ if (!data || !data-tmu_read)
return -EINVAL;
mutex_lock(data-lock);
--
2.0.0.rc2
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[PATCH 1/1] ARM: dts: Use more descriptive names for Exynos5420 PDs
All the device nodes for the Exynos5420 power-domains have a quite
generic power-domain name. So in case of an error, the Exynos PD
driver shows the following (not very useful) message:
Power domain power-domain disable failed
Use descriptive names to know on which PD enable or disable failed.
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
arch/arm/boot/dts/exynos5420.dtsi | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm/boot/dts/exynos5420.dtsi
index b63b569ca4b4..4642cec50c0d 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -247,19 +247,19 @@
};
};
- gsc_pd: power-domain@10044000 {
+ gsc_pd: gsc-power-domain@10044000 {
compatible = samsung,exynos4210-pd;
reg = 0x10044000 0x20;
#power-domain-cells = 0;
};
- isp_pd: power-domain@10044020 {
+ isp_pd: isp-power-domain@10044020 {
compatible = samsung,exynos4210-pd;
reg = 0x10044020 0x20;
#power-domain-cells = 0;
};
- mfc_pd: power-domain@10044060 {
+ mfc_pd: mfc-power-domain@10044060 {
compatible = samsung,exynos4210-pd;
reg = 0x10044060 0x20;
clocks = clock CLK_FIN_PLL, clock CLK_MOUT_SW_ACLK333,
@@ -268,13 +268,13 @@
#power-domain-cells = 0;
};
- msc_pd: power-domain@10044120 {
+ msc_pd: msc-power-domain@10044120 {
compatible = samsung,exynos4210-pd;
reg = 0x10044120 0x20;
#power-domain-cells = 0;
};
- disp_pd: power-domain@100440C0 {
+ disp_pd: disp-power-domain@100440C0 {
compatible = samsung,exynos4210-pd;
reg = 0x100440C0 0x20;
#power-domain-cells = 0;
--
2.1.3
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[PATCH 1/1] ARM: exynos_defconfig: Enable HDMI support
Many Exynos boards have an HDMI port so enable Exynos DRM HDMI support. Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk --- Exynos DRM HDMI has some issues that were fixed by Andrzej's [0] series. So now is safe to HDMI support for Exynos boards. [0]: https://lkml.org/lkml/2015/2/5/265 arch/arm/configs/exynos_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig index 70e5d0bdb4e4..e44da52e5223 100644 --- a/arch/arm/configs/exynos_defconfig +++ b/arch/arm/configs/exynos_defconfig @@ -120,6 +120,7 @@ CONFIG_REGULATOR_S2MPS11=y CONFIG_REGULATOR_S5M8767=y CONFIG_REGULATOR_TPS65090=y CONFIG_DRM=y +CONFIG_DRM_EXYNOS_HDMI=y CONFIG_DRM_BRIDGE=y CONFIG_DRM_PTN3460=y CONFIG_DRM_PS8622=y -- 2.1.3 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/1] ARM: dts: Add mclk entry for Snow and Peach Pit/Pi boards
From: Tushar Behera tusha...@samsung.com
On Snow, Peach Pit and Peach Pi boards, the Exynos SoC XCLKOUT output pin
provides the master clock (mclk) to codecs. So make them a clock consumer.
Signed-off-by: Tushar Behera tusha...@samsung.com
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
Changes since v1:
- Rebased on top of Kukjin's for-next branch since v1 made on top of
3.19-rc7 doesn't apply cleanly on that branch. Sorry for the noise.
arch/arm/boot/dts/exynos5250-snow.dts | 2 ++
arch/arm/boot/dts/exynos5420-peach-pit.dts | 2 ++
arch/arm/boot/dts/exynos5800-peach-pi.dts | 2 ++
3 files changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts
b/arch/arm/boot/dts/exynos5250-snow.dts
index 5be966df7603..6096d6b02dd8 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -206,6 +206,8 @@
samsung,model = Snow-I2S-MAX98095;
samsung,i2s-controller = i2s0;
samsung,audio-codec = max98095;
+ clocks = pmu_system_controller 0;
+ clock-names = mclk;
};
usb3_vbus_reg: regulator-usb3 {
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index ec86d9523935..1d4db3b0676e 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -594,6 +594,8 @@
interrupt-parent = gpx0;
pinctrl-names = default;
pinctrl-0 = max98090_irq;
+ clocks = pmu_system_controller 0;
+ clock-names = mclk;
};
light-sensor@44 {
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts
b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index 06737c60d333..6f2fc3445bd5 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -581,6 +581,8 @@
interrupt-parent = gpx0;
pinctrl-names = default;
pinctrl-0 = max98091_irq;
+ clocks = pmu_system_controller 0;
+ clock-names = mclk;
};
light-sensor@44 {
--
2.1.3
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[PATCH 1/1] ARM: dts: Add mclk entry for Snow and Peach Pit/Pi boards
From: Tushar Behera tusha...@samsung.com
On Snow, Peach Pit and Peach Pi boards, the Exynos SoC XCLKOUT output pin
provides the master clock (mclk) to codecs. So make them a clock consumer.
Signed-off-by: Tushar Behera tusha...@samsung.com
Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
arch/arm/boot/dts/exynos5250-snow.dts | 2 ++
arch/arm/boot/dts/exynos5420-peach-pit.dts | 2 ++
arch/arm/boot/dts/exynos5800-peach-pi.dts | 2 ++
3 files changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts
b/arch/arm/boot/dts/exynos5250-snow.dts
index fc64a0066325..ece8bdb40c0a 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -191,6 +191,8 @@
samsung,model = DAISYI2S;
samsung,i2s-controller = i2s0;
samsung,audio-codec = max98095;
+ clocks = pmu_system_controller 0;
+ clock-names = mclk;
};
usb3_vbus_reg: regulator-usb3 {
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index c9a0e170a0f0..30014e6c6799 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -491,6 +491,8 @@
interrupt-parent = gpx0;
pinctrl-names = default;
pinctrl-0 = max98090_irq;
+ clocks = pmu_system_controller 0;
+ clock-names = mclk;
};
light-sensor@44 {
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts
b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index a80ceeac4ec8..a415ad88bc0c 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -490,6 +490,8 @@
interrupt-parent = gpx0;
pinctrl-names = default;
pinctrl-0 = max98091_irq;
+ clocks = pmu_system_controller 0;
+ clock-names = mclk;
};
light-sensor@44 {
--
2.1.3
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[PATCH v3 7/8] hwmon: pwm-fan: Read PWM FAN configuration from device tree
This patch provides code for reading PWM FAN configuration data via
device tree. The pwm-fan can work with full speed when configuration
is not provided. However, errors are propagated when wrong DT bindings
are found.
Additionally the struct pwm_fan_ctx has been extended.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- Rename pwm_fan_max_states to pwm_fan_cooling_levels
- Moving pwm_fan_of_get_cooling_data() call after setting end enabling PWM FAN
- pwm_fan_of_get_cooling_data() now can fail - preserving old behaviour
- Remove unnecessary dev_err() call
Changes for v3:
- Patch's headline has been reedited
- pwm_fan_of_get_cooling_data() return code is now being checked.
- of_property_count_elems_of_size() is now used instead of_find_property()
- More verbose patch description added
---
drivers/hwmon/pwm-fan.c | 54 -
1 file changed, 53 insertions(+), 1 deletion(-)
diff --git a/drivers/hwmon/pwm-fan.c b/drivers/hwmon/pwm-fan.c
index 870e100..f3f5843 100644
--- a/drivers/hwmon/pwm-fan.c
+++ b/drivers/hwmon/pwm-fan.c
@@ -30,7 +30,10 @@
struct pwm_fan_ctx {
struct mutex lock;
struct pwm_device *pwm;
- unsigned char pwm_value;
+ unsigned int pwm_value;
+ unsigned int pwm_fan_state;
+ unsigned int pwm_fan_max_state;
+ unsigned int *pwm_fan_cooling_levels;
};
static int __set_pwm(struct pwm_fan_ctx *ctx, unsigned long pwm)
@@ -100,6 +103,50 @@ static struct attribute *pwm_fan_attrs[] = {
ATTRIBUTE_GROUPS(pwm_fan);
+int pwm_fan_of_get_cooling_data(struct device *dev, struct pwm_fan_ctx *ctx)
+{
+ struct device_node *np = dev-of_node;
+ int num, i, ret;
+
+ ret = of_property_count_elems_of_size(np, cooling-levels,
+ sizeof(u32));
+
+ if (ret == -EINVAL) {
+ dev_err(dev, Property 'cooling-levels' not found\n);
+ return 0;
+ }
+
+ if (ret = 0) {
+ dev_err(dev, Wrong data!\n);
+ return ret;
+ }
+
+ num = ret;
+ ctx-pwm_fan_cooling_levels = devm_kzalloc(dev, num * sizeof(u32),
+ GFP_KERNEL);
+ if (!ctx-pwm_fan_cooling_levels)
+ return -ENOMEM;
+
+ ret = of_property_read_u32_array(np, cooling-levels,
+ctx-pwm_fan_cooling_levels, num);
+ if (ret) {
+ dev_err(dev, Property 'cooling-levels' cannot be read!\n);
+ return ret;
+ }
+
+ for (i = 0; i num; i++) {
+ if (ctx-pwm_fan_cooling_levels[i] MAX_PWM) {
+ dev_err(dev, PWM fan state[%d]:%d %d\n, i,
+ ctx-pwm_fan_cooling_levels[i], MAX_PWM);
+ return -EINVAL;
+ }
+ }
+
+ ctx-pwm_fan_max_state = num - 1;
+
+ return 0;
+}
+
static int pwm_fan_probe(struct platform_device *pdev)
{
struct device *hwmon;
@@ -145,6 +192,11 @@ static int pwm_fan_probe(struct platform_device *pdev)
pwm_disable(ctx-pwm);
return PTR_ERR(hwmon);
}
+
+ ret = pwm_fan_of_get_cooling_data(pdev-dev, ctx);
+ if (ret)
+ return ret;
+
return 0;
}
--
2.0.0.rc2
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[PATCH v3 6/8] hwmon: pwm-fan: Extract __set_pwm() function to only modify PWM duty cycle
It was necessary to decouple code handling writing to sysfs from the one
responsible for setting PWM of the fan.
Due to that, new __set_pwm() method was extracted, which is responsible for
only setting new PWM duty cycle.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- None
Changes for v3:
- The commit headline has been reedited.
---
drivers/hwmon/pwm-fan.c | 35 ++-
1 file changed, 22 insertions(+), 13 deletions(-)
diff --git a/drivers/hwmon/pwm-fan.c b/drivers/hwmon/pwm-fan.c
index 1991d903..870e100 100644
--- a/drivers/hwmon/pwm-fan.c
+++ b/drivers/hwmon/pwm-fan.c
@@ -33,21 +33,15 @@ struct pwm_fan_ctx {
unsigned char pwm_value;
};
-static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
- const char *buf, size_t count)
+static int __set_pwm(struct pwm_fan_ctx *ctx, unsigned long pwm)
{
- struct pwm_fan_ctx *ctx = dev_get_drvdata(dev);
- unsigned long pwm, duty;
- ssize_t ret;
-
- if (kstrtoul(buf, 10, pwm) || pwm MAX_PWM)
- return -EINVAL;
-
- mutex_lock(ctx-lock);
+ unsigned long duty;
+ int ret;
if (ctx-pwm_value == pwm)
- goto exit_set_pwm_no_change;
+ return 0;
+ mutex_lock(ctx-lock);
if (pwm == 0) {
pwm_disable(ctx-pwm);
goto exit_set_pwm;
@@ -66,13 +60,28 @@ static ssize_t set_pwm(struct device *dev, struct
device_attribute *attr,
exit_set_pwm:
ctx-pwm_value = pwm;
-exit_set_pwm_no_change:
- ret = count;
exit_set_pwm_err:
mutex_unlock(ctx-lock);
return ret;
}
+static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct pwm_fan_ctx *ctx = dev_get_drvdata(dev);
+ unsigned long pwm;
+ int ret;
+
+ if (kstrtoul(buf, 10, pwm) || pwm MAX_PWM)
+ return -EINVAL;
+
+ ret = __set_pwm(ctx, pwm);
+ if (ret)
+ return ret;
+
+ return count;
+}
+
static ssize_t show_pwm(struct device *dev,
struct device_attribute *attr, char *buf)
{
--
2.0.0.rc2
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[PATCH v3 3/8] Documentation: dts: Documentation entry to explain how to use PWM FAN as a cooling device
Explanation of several properties, which allow PWM fan working as a cooling
device, have been embraced in this commit.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- Rename cooling-pwm-values to cooling-levels
- Remove default-pulse-width property and stick to default hwmon policy
Changes for v3:
- Changing commit title from hwmon: dts: Doc: to Documentation: dts
- Remove unnecessary properties
- Set maximal cooling level to 230 instead of 255
---
Documentation/devicetree/bindings/hwmon/pwm-fan.txt | 20
1 file changed, 20 insertions(+)
diff --git a/Documentation/devicetree/bindings/hwmon/pwm-fan.txt
b/Documentation/devicetree/bindings/hwmon/pwm-fan.txt
index 610757c..d53fe0c 100644
--- a/Documentation/devicetree/bindings/hwmon/pwm-fan.txt
+++ b/Documentation/devicetree/bindings/hwmon/pwm-fan.txt
@@ -3,10 +3,30 @@ Bindings for a fan connected to the PWM lines
Required properties:
- compatible : pwm-fan
- pwms : the PWM that is used to control the PWM fan
+- cooling-levels : PWM duty cycle values in a range from 0 to 255
+ which correspond to thermal cooling states
+
+Thorough description of the following bindings:
+ cooling-min-state = 0;
+ cooling-max-state = 3;
+ #cooling-cells = 2;
+ thermal-zone {
+ cpu_thermal: cpu-thermal {
+ cooling-maps {
+ map0 {
+trip = cpu_alert1;
+cooling-device = fan0 0 1;
+ };
+ };
+ };
+
+for PWM FAN used as cooling device can be found at:
+./Documentation/devicetree/bindings/thermal/thermal.txt
Example:
pwm-fan {
compatible = pwm-fan;
status = okay;
pwms = pwm 0 1 0;
+ cooling-levels = 0 102 170 230;
};
--
2.0.0.rc2
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[PATCH v3 4/8] ARM: dts: Add pwm-fan node to the Odroid-U3 board
From: Kamil Debski k.deb...@samsung.com
Add pwm-fan node to the Odroid-U3 board file to enable PWM control of the
cooling fan. In addition, add the pwm label to the pwm@139D node
in the exynos4412.dtsi.
Signed-off-by: Kamil Debski k.deb...@samsung.com
[Rebased on the newest mainline by l.majew...@samsung.com]
---
Changes since v1:
- added pwm label to the pwm@139D node in exynos4.dtsi
- use the pwm label in the exynos4412-odroidu3.dts
- change order or properties in the pwn-fan node, to be sorted
in alphabetical order
---
arch/arm/boot/dts/exynos4.dtsi| 2 +-
arch/arm/boot/dts/exynos4412-odroidu3.dts | 13 +
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index f18d746..75266e3 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -582,7 +582,7 @@
status = disabled;
};
- pwm@139D {
+ pwm: pwm@139D {
compatible = samsung,exynos4210-pwm;
reg = 0x139D 0x1000;
interrupts = 0 37 0, 0 38 0, 0 39 0, 0 40 0, 0 41 0;
diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts
b/arch/arm/boot/dts/exynos4412-odroidu3.dts
index c8a64be..60bd1e4 100644
--- a/arch/arm/boot/dts/exynos4412-odroidu3.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts
@@ -31,6 +31,19 @@
linux,default-trigger = heartbeat;
};
};
+
+ pwm-fan {
+ compatible = pwm-fan;
+ pwms = pwm 0 1 0;
+ status = okay;
+ };
+};
+
+pwm {
+ pinctrl-0 = pwm0_out;
+ pinctrl-names = default;
+ samsung,pwm-outputs = 0;
+ status = okay;
};
usb3503 {
--
2.0.0.rc2
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[PATCH v3 1/8] thermal: Provide stub for thermal_of_cooling_device_register() function
Odroid U3 fan can work without being registered as OF cooling device
(with CONFIG_THERMAL_OF disabled).
In this situation it can be controlled via PWM entry at
/sys/class/hwmon/hwmon0/pwm1.
Therefore, the thermal_of_cooling_device_register() function needs a stub
to allow clean compilation.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- None
Changes for v3:
- Provide stub declaration when CONFIG_THERMAL is not set
---
include/linux/thermal.h | 17 ++---
1 file changed, 14 insertions(+), 3 deletions(-)
diff --git a/include/linux/thermal.h b/include/linux/thermal.h
index fc52e30..eacf2de 100644
--- a/include/linux/thermal.h
+++ b/include/linux/thermal.h
@@ -293,6 +293,20 @@ struct thermal_trip {
};
/* Function declarations */
+#ifdef CONFIG_THERMAL
+struct thermal_cooling_device *
+thermal_of_cooling_device_register(struct device_node *np,
+ char *type, void *devdata,
+ const struct thermal_cooling_device_ops *);
+#else
+static inline struct thermal_cooling_device *
+thermal_of_cooling_device_register(struct device_node *np,
+ char *type, void *devdata,
+ const struct thermal_cooling_device_ops *ops)
+{
+ return NULL;
+}
+#endif
#ifdef CONFIG_THERMAL_OF
struct thermal_zone_device *
thermal_zone_of_sensor_register(struct device *dev, int id, void *data,
@@ -328,9 +342,6 @@ void thermal_zone_device_update(struct thermal_zone_device
*);
struct thermal_cooling_device *thermal_cooling_device_register(char *, void *,
const struct thermal_cooling_device_ops *);
-struct thermal_cooling_device *
-thermal_of_cooling_device_register(struct device_node *np, char *, void *,
- const struct thermal_cooling_device_ops *);
void thermal_cooling_device_unregister(struct thermal_cooling_device *);
struct thermal_zone_device *thermal_zone_get_zone_by_name(const char *name);
int thermal_zone_get_temp(struct thermal_zone_device *tz, unsigned long *temp);
--
2.0.0.rc2
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[PATCH v3 8/8] hwmon: pwm-fan: Code for using PWM FAN as a cooling device
The PWM FAN device can now be used as a thermal cooling device. Necessary
infrastructure has been added in this commit.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- Replace pwm_fan_cooling_states with pwm_fan_cooling_levels
- Update ctx-pwm_fan_state when correct data from device tree is available
- Using therma_cdev_update() when thermal is ready for controlling the fan
Changes for v3:
- Rename patch heading
- pwm_fan_of_get_cooling_data() now returns -EINVAL when no cooling-levels
property defined
- register of cooling device only when proper cooling data is present
---
drivers/hwmon/pwm-fan.c | 86 +++--
1 file changed, 83 insertions(+), 3 deletions(-)
diff --git a/drivers/hwmon/pwm-fan.c b/drivers/hwmon/pwm-fan.c
index f3f5843..79fe24e 100644
--- a/drivers/hwmon/pwm-fan.c
+++ b/drivers/hwmon/pwm-fan.c
@@ -24,6 +24,7 @@
#include linux/platform_device.h
#include linux/pwm.h
#include linux/sysfs.h
+#include linux/thermal.h
#define MAX_PWM 255
@@ -68,6 +69,17 @@ exit_set_pwm_err:
return ret;
}
+static void pwm_fan_update_state(struct pwm_fan_ctx *ctx, unsigned long pwm)
+{
+ int i;
+
+ for (i = 0; i ctx-pwm_fan_max_state; ++i)
+ if (pwm ctx-pwm_fan_cooling_levels[i + 1])
+ break;
+
+ ctx-pwm_fan_state = i;
+}
+
static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
@@ -82,6 +94,7 @@ static ssize_t set_pwm(struct device *dev, struct
device_attribute *attr,
if (ret)
return ret;
+ pwm_fan_update_state(ctx, pwm);
return count;
}
@@ -103,6 +116,59 @@ static struct attribute *pwm_fan_attrs[] = {
ATTRIBUTE_GROUPS(pwm_fan);
+/* thermal cooling device callbacks */
+static int pwm_fan_get_max_state(struct thermal_cooling_device *cdev,
+unsigned long *state)
+{
+ struct pwm_fan_ctx *ctx = cdev-devdata;
+
+ *state = ctx-pwm_fan_max_state;
+
+ return 0;
+}
+
+static int pwm_fan_get_cur_state(struct thermal_cooling_device *cdev,
+unsigned long *state)
+{
+ struct pwm_fan_ctx *ctx = cdev-devdata;
+
+ if (!ctx)
+ return -EINVAL;
+
+ *state = ctx-pwm_fan_state;
+
+ return 0;
+}
+
+static int
+pwm_fan_set_cur_state(struct thermal_cooling_device *cdev, unsigned long state)
+{
+ struct pwm_fan_ctx *ctx = cdev-devdata;
+ int ret;
+
+ if (!ctx || (state ctx-pwm_fan_max_state))
+ return -EINVAL;
+
+ if (state == ctx-pwm_fan_state)
+ return 0;
+
+ ret = __set_pwm(ctx, ctx-pwm_fan_cooling_levels[state]);
+ if (ret) {
+ dev_err(cdev-device, Cannot set pwm!\n);
+ return ret;
+ }
+
+ ctx-pwm_fan_state = state;
+
+ return ret;
+}
+
+static const struct thermal_cooling_device_ops pwm_fan_cooling_ops = {
+ .get_max_state = pwm_fan_get_max_state,
+ .get_cur_state = pwm_fan_get_cur_state,
+ .set_cur_state = pwm_fan_set_cur_state,
+};
+
int pwm_fan_of_get_cooling_data(struct device *dev, struct pwm_fan_ctx *ctx)
{
struct device_node *np = dev-of_node;
@@ -113,7 +179,7 @@ int pwm_fan_of_get_cooling_data(struct device *dev, struct
pwm_fan_ctx *ctx)
if (ret == -EINVAL) {
dev_err(dev, Property 'cooling-levels' not found\n);
- return 0;
+ return ret;
}
if (ret = 0) {
@@ -149,8 +215,9 @@ int pwm_fan_of_get_cooling_data(struct device *dev, struct
pwm_fan_ctx *ctx)
static int pwm_fan_probe(struct platform_device *pdev)
{
- struct device *hwmon;
+ struct thermal_cooling_device *cdev;
struct pwm_fan_ctx *ctx;
+ struct device *hwmon;
int duty_cycle;
int ret;
@@ -194,8 +261,21 @@ static int pwm_fan_probe(struct platform_device *pdev)
}
ret = pwm_fan_of_get_cooling_data(pdev-dev, ctx);
- if (ret)
+ if (!ret) {
+ ctx-pwm_fan_state = ctx-pwm_fan_max_state;
+ cdev = thermal_of_cooling_device_register(pdev-dev.of_node,
+ pwm-fan, ctx,
+ pwm_fan_cooling_ops);
+ if (IS_ERR(cdev)) {
+ dev_err(pdev-dev,
+ Failed to register pwm-fan as cooling device);
+ pwm_disable(ctx-pwm);
+ return PTR_ERR(cdev);
+ }
+ thermal_cdev_update(cdev);
+ } else if (ret != -EINVAL) {
return ret;
+ }
return 0;
}
--
2.0.0.rc2
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[PATCH v3 2/8] thermal: Provide stub for thermal_cdev_update() function
Odroid U3 fan can work without being registered as OF cooling device
(with CONFIG_THERMAL{_OF|} disabled).
In this situation it can be controlled via PWM entry at
/sys/class/hwmon/hwmon0/pwm1.
Therefore, the thermal_cdev_update() function needs a stub
to allow clean compilation.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- New patch
Changes for v3:
- thermal_cdev_update() now depends on CONFIG_THERMAL flag
---
include/linux/thermal.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/include/linux/thermal.h b/include/linux/thermal.h
index eacf2de..25382e6 100644
--- a/include/linux/thermal.h
+++ b/include/linux/thermal.h
@@ -298,6 +298,7 @@ struct thermal_cooling_device *
thermal_of_cooling_device_register(struct device_node *np,
char *type, void *devdata,
const struct thermal_cooling_device_ops *);
+void thermal_cdev_update(struct thermal_cooling_device *);
#else
static inline struct thermal_cooling_device *
thermal_of_cooling_device_register(struct device_node *np,
@@ -306,6 +307,9 @@ thermal_of_cooling_device_register(struct device_node *np,
{
return NULL;
}
+static inline void thermal_cdev_update(struct thermal_cooling_device *cdev)
+{
+}
#endif
#ifdef CONFIG_THERMAL_OF
struct thermal_zone_device *
@@ -349,7 +353,6 @@ int thermal_zone_get_temp(struct thermal_zone_device *tz,
unsigned long *temp);
int get_tz_trend(struct thermal_zone_device *, int);
struct thermal_instance *get_thermal_instance(struct thermal_zone_device *,
struct thermal_cooling_device *, int);
-void thermal_cdev_update(struct thermal_cooling_device *);
void thermal_notify_framework(struct thermal_zone_device *, int);
#ifdef CONFIG_NET
--
2.0.0.rc2
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[PATCH v3 5/8] ARM: dts: Add properties to use pwm-fan device as a cooling device in Odroid U3
With those bindings it is possible to use pwm-fan device available in
Odroid U3 as a cooling device.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- Rename cooling-pwm-values property to cooling-levels
Changes for v3:
- Change patch's topic to ARM dts
- Reduce maximal cooling-level to 230 from 255
---
arch/arm/boot/dts/exynos4412-odroidu3.dts | 33 ++-
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts
b/arch/arm/boot/dts/exynos4412-odroidu3.dts
index 60bd1e4..3e5df3e 100644
--- a/arch/arm/boot/dts/exynos4412-odroidu3.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts
@@ -32,11 +32,42 @@
};
};
- pwm-fan {
+ fan0: pwm-fan {
compatible = pwm-fan;
pwms = pwm 0 1 0;
+ cooling-min-state = 0;
+ cooling-max-state = 3;
+ #cooling-cells = 2;
+ cooling-levels = 0 102 170 230;
status = okay;
};
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ cooling-maps {
+ map0 {
+trip = cpu_alert1;
+cooling-device = cpu0 7 7;
+ };
+ map1 {
+trip = cpu_alert2;
+cooling-device = cpu0 13 13;
+ };
+ map2 {
+trip = cpu_alert0;
+cooling-device = fan0 0 1;
+ };
+ map3 {
+trip = cpu_alert1;
+cooling-device = fan0 1 2;
+ };
+ map4 {
+trip = cpu_alert2;
+cooling-device = fan0 2 3;
+ };
+ };
+ };
+ };
};
pwm {
--
2.0.0.rc2
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[PATCH v3 0/8] hwmon: thermal: Odroid U3: Provide support for Odroid U3 fan
Presented patches add support for Odroid's U3 optional CPU FAN, which uses PWM subsystem for low level control. After successful probe it registers itself as a cooling device for thermal subsystem. To preserve the ability to use this fan as a PWM device stubs for thermal_of_cooling_device_register() and thermal_cdev_update() have been added. Additionally, devices without support for DTS are still supported. To provide correct functionality, new properties to device tree description for Exynos4412 and in particular Odroid U3 have been added. Those patches were tested on Exynos4412 - Odroid U3 board. Patches were applied on: linux-soc-thermal/next branch (Linux 3.19-rc5) SHA1: 252454f5cbda2c6b40c5d36f58cac2938437b85d Kamil Debski (1): ARM: dts: Add pwm-fan node to the Odroid-U3 board Lukasz Majewski (7): thermal: Provide stub for thermal_of_cooling_device_register() function thermal: Provide stub for thermal_cdev_update() function Documentation: dts: Documentation entry to explain how to use PWM FAN as a cooling device ARM: dts: Add properties to use pwm-fan device as a cooling device in Odroid U3 hwmon: pwm-fan: Extract __set_pwm() function to only modify PWM duty cycle hwmon: pwm-fan: Read PWM FAN configuration from device tree hwmon: pwm-fan: Code for using PWM FAN as a cooling device .../devicetree/bindings/hwmon/pwm-fan.txt | 20 +++ arch/arm/boot/dts/exynos4.dtsi | 2 +- arch/arm/boot/dts/exynos4412-odroidu3.dts | 44 ++ drivers/hwmon/pwm-fan.c| 171 +++-- include/linux/thermal.h| 22 ++- 5 files changed, 239 insertions(+), 20 deletions(-) -- 2.0.0.rc2 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 6/8] hwmon: pwm-fan: Extract __set_pwm() function to only modify PWM duty cycle
On Fri, Feb 06, 2015 at 05:59:06PM +0100, Lukasz Majewski wrote:
It was necessary to decouple code handling writing to sysfs from the one
responsible for setting PWM of the fan.
Due to that, new __set_pwm() method was extracted, which is responsible for
only setting new PWM duty cycle.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- None
Changes for v3:
- The commit headline has been reedited.
---
drivers/hwmon/pwm-fan.c | 35 ++-
1 file changed, 22 insertions(+), 13 deletions(-)
diff --git a/drivers/hwmon/pwm-fan.c b/drivers/hwmon/pwm-fan.c
index 1991d903..870e100 100644
--- a/drivers/hwmon/pwm-fan.c
+++ b/drivers/hwmon/pwm-fan.c
@@ -33,21 +33,15 @@ struct pwm_fan_ctx {
unsigned char pwm_value;
};
-static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
-const char *buf, size_t count)
+static int __set_pwm(struct pwm_fan_ctx *ctx, unsigned long pwm)
{
- struct pwm_fan_ctx *ctx = dev_get_drvdata(dev);
- unsigned long pwm, duty;
- ssize_t ret;
-
- if (kstrtoul(buf, 10, pwm) || pwm MAX_PWM)
- return -EINVAL;
-
- mutex_lock(ctx-lock);
+ unsigned long duty;
+ int ret;
if (ctx-pwm_value == pwm)
- goto exit_set_pwm_no_change;
+ return 0;
Why did you move this check outside the lock ? With this change there
is no guarantee that pwm_value wasn't changed while waiting for the lock.
Guenter
+ mutex_lock(ctx-lock);
if (pwm == 0) {
pwm_disable(ctx-pwm);
goto exit_set_pwm;
@@ -66,13 +60,28 @@ static ssize_t set_pwm(struct device *dev, struct
device_attribute *attr,
exit_set_pwm:
ctx-pwm_value = pwm;
-exit_set_pwm_no_change:
- ret = count;
exit_set_pwm_err:
mutex_unlock(ctx-lock);
return ret;
}
+static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
+const char *buf, size_t count)
+{
+ struct pwm_fan_ctx *ctx = dev_get_drvdata(dev);
+ unsigned long pwm;
+ int ret;
+
+ if (kstrtoul(buf, 10, pwm) || pwm MAX_PWM)
+ return -EINVAL;
+
+ ret = __set_pwm(ctx, pwm);
+ if (ret)
+ return ret;
+
+ return count;
+}
+
static ssize_t show_pwm(struct device *dev,
struct device_attribute *attr, char *buf)
{
--
2.0.0.rc2
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Re: [PATCH v3 7/8] hwmon: pwm-fan: Read PWM FAN configuration from device tree
On Fri, Feb 06, 2015 at 05:59:07PM +0100, Lukasz Majewski wrote:
This patch provides code for reading PWM FAN configuration data via
device tree. The pwm-fan can work with full speed when configuration
is not provided. However, errors are propagated when wrong DT bindings
are found.
Additionally the struct pwm_fan_ctx has been extended.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
- Rename pwm_fan_max_states to pwm_fan_cooling_levels
- Moving pwm_fan_of_get_cooling_data() call after setting end enabling PWM FAN
- pwm_fan_of_get_cooling_data() now can fail - preserving old behaviour
- Remove unnecessary dev_err() call
Changes for v3:
- Patch's headline has been reedited
- pwm_fan_of_get_cooling_data() return code is now being checked.
- of_property_count_elems_of_size() is now used instead of_find_property()
- More verbose patch description added
---
drivers/hwmon/pwm-fan.c | 54
-
1 file changed, 53 insertions(+), 1 deletion(-)
diff --git a/drivers/hwmon/pwm-fan.c b/drivers/hwmon/pwm-fan.c
index 870e100..f3f5843 100644
--- a/drivers/hwmon/pwm-fan.c
+++ b/drivers/hwmon/pwm-fan.c
@@ -30,7 +30,10 @@
struct pwm_fan_ctx {
struct mutex lock;
struct pwm_device *pwm;
- unsigned char pwm_value;
+ unsigned int pwm_value;
+ unsigned int pwm_fan_state;
+ unsigned int pwm_fan_max_state;
+ unsigned int *pwm_fan_cooling_levels;
};
static int __set_pwm(struct pwm_fan_ctx *ctx, unsigned long pwm)
@@ -100,6 +103,50 @@ static struct attribute *pwm_fan_attrs[] = {
ATTRIBUTE_GROUPS(pwm_fan);
+int pwm_fan_of_get_cooling_data(struct device *dev, struct pwm_fan_ctx *ctx)
+{
+ struct device_node *np = dev-of_node;
+ int num, i, ret;
+
+ ret = of_property_count_elems_of_size(np, cooling-levels,
+ sizeof(u32));
+
+ if (ret == -EINVAL) {
+ dev_err(dev, Property 'cooling-levels' not found\n);
+ return 0;
Returning 0 is obviously not an error, otherwise you would not return 0 here.
So dev_err is wrong. Also, the message itself is wrong; the property may
well be there but have a wrong size.
+ }
+
+ if (ret = 0) {
+ dev_err(dev, Wrong data!\n);
+ return ret;
+ }
This will result in the driver failing to load if devicetree is not configured
(of_property_count_elems_of_size will return -ENOSYS). This is not acceptable.
Also, if the call returns 0 you don't return an error but display a Wrong
data!
error message. Either it is an error or it is not, but not both.
Guenter
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