Re: [PATCH v5 05/18] ARM: dts: exynos5420: add sysmmu nodes

2015-02-22 Thread Andreas Färber
Am 23.01.2015 um 16:51 schrieb Marek Szyprowski:
 Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
 ---
  arch/arm/boot/dts/exynos5420.dtsi | 181 
 ++
  1 file changed, 181 insertions(+)
 
 diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
 b/arch/arm/boot/dts/exynos5420.dtsi
 index 1b62410..b8f1c9f 100644
 --- a/arch/arm/boot/dts/exynos5420.dtsi
 +++ b/arch/arm/boot/dts/exynos5420.dtsi
[...]
 @@ -925,4 +932,178 @@
   samsung,sysreg-phandle = sysreg_system_controller;
   samsung,pmureg-phandle = pmu_system_controller;
   };
 +
 + sysmmu_g2dr: sysmmu@0x10A6 {
[snip]

Unit addresses are without 0x. Please also check the sort order.

Regards,
Andreas

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Re: [PATCH v5 04/18] ARM: dts: exynos5250: add sysmmu nodes

2015-02-22 Thread Andreas Färber
Am 23.01.2015 um 16:51 schrieb Marek Szyprowski:
 Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
 ---
  arch/arm/boot/dts/exynos5250.dtsi | 250 
 ++
  1 file changed, 250 insertions(+)
 
 diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
 b/arch/arm/boot/dts/exynos5250.dtsi
 index ae22bd9..8583b9e 100644
 --- a/arch/arm/boot/dts/exynos5250.dtsi
 +++ b/arch/arm/boot/dts/exynos5250.dtsi
 @@ -224,6 +224,7 @@
   interrupts = 0 91 0;
   clocks = clock CLK_G2D;
   clock-names = fimg2d;
 + iommus = sysmmu_g2d;
   };
  
   mfc: codec@1100 {
 @@ -233,6 +234,8 @@
   power-domains = pd_mfc;
   clocks = clock CLK_MFC;
   clock-names = mfc;
 + iommus = sysmmu_mfc_l, sysmmu_mfc_r;
 + iommu-names = left, right;
   };
  
   rtc: rtc@101E {
 @@ -693,6 +696,7 @@
   power-domains = pd_gsc;
   clocks = clock CLK_GSCL0;
   clock-names = gscl;
 + iommu = sysmmu_gsc1;
   };
  
   gsc_1:  gsc@13e1 {
 @@ -702,6 +706,7 @@
   power-domains = pd_gsc;
   clocks = clock CLK_GSCL1;
   clock-names = gscl;
 + iommu = sysmmu_gsc1;
   };
  
   gsc_2:  gsc@13e2 {
 @@ -711,6 +716,7 @@
   power-domains = pd_gsc;
   clocks = clock CLK_GSCL2;
   clock-names = gscl;
 + iommu = sysmmu_gsc2;
   };
  
   gsc_3:  gsc@13e3 {
 @@ -720,6 +726,7 @@
   power-domains = pd_gsc;
   clocks = clock CLK_GSCL3;
   clock-names = gscl;
 + iommu = sysmmu_gsc3;
   };
  
   hdmi: hdmi {
 @@ -743,6 +750,7 @@
   clocks = clock CLK_MIXER, clock CLK_HDMI,
clock CLK_SCLK_HDMI;
   clock-names = mixer, hdmi, sclk_hdmi;
 + iommus = sysmmu_tv;
   };
  
   dp_phy: video-phy@10040720 {
 @@ -763,6 +771,7 @@
   power-domains = pd_disp1;
   clocks = clock CLK_SCLK_FIMD1, clock CLK_FIMD1;
   clock-names = sclk_fimd, fimd;
 + iommus = sysmmu_fimd1;
   };
  
   adc: adc@12D1 {
 @@ -784,4 +793,245 @@
   clocks = clock CLK_SSS;
   clock-names = secss;
   };
 +
 + sysmmu_gsc0: sysmmu@13E8 {
 + compatible = samsung,exynos-sysmmu;
 + reg = 0x13E8 0x1000;
 + interrupt-parent = combiner;
 + interrupts = 2 0;
 + power-domains = pd_gsc;
 + clock-names = sysmmu, master;
 + clocks = clock CLK_SMMU_GSCL0, clock CLK_GSCL0;
 + #iommu-cells = 0;
 + };
 +
 + sysmmu_gsc1: sysmmu@13E9 {
 + compatible = samsung,exynos-sysmmu;
 + reg = 0x13E9 0x1000;
 + interrupt-parent = combiner;
 + interrupts = 2 2;
 + power-domains = pd_gsc;
 + clock-names = sysmmu, master;
 + clocks = clock CLK_SMMU_GSCL1, clock CLK_GSCL1;
 + #iommu-cells = 0;
 + };
 +
 + sysmmu_gsc2: sysmmu@13EA {
 + compatible = samsung,exynos-sysmmu;
 + reg = 0x13EA 0x1000;
 + interrupt-parent = combiner;
 + interrupts = 2 4;
 + power-domains = pd_gsc;
 + clock-names = sysmmu, master;
 + clocks = clock CLK_SMMU_GSCL2, clock CLK_GSCL2;
 + #iommu-cells = 0;
 + };
 +
 + sysmmu_gsc3: sysmmu@13EB {
 + compatible = samsung,exynos-sysmmu;
 + reg = 0x13EB 0x1000;
 + interrupt-parent = combiner;
 + interrupts = 2 6;
 + power-domains = pd_gsc;
 + clock-names = sysmmu, master;
 + clocks = clock CLK_SMMU_GSCL3, clock CLK_GSCL3;
 + #iommu-cells = 0;
 + };
 +
 + sysmmu_mfc_r: sysmmu@1120 {
 + compatible = samsung,exynos-sysmmu;
 + reg = 0x1120 0x1000;
 + interrupt-parent = combiner;
 + interrupts = 6 2;
 + power-domains = pd_mfc;
 + clock-names = sysmmu, master;
 + clocks = clock CLK_SMMU_MFCR, clock CLK_MFC;
 + #iommu-cells = 0;
 + };
 +
 + sysmmu_mfc_l: sysmmu@1121 {
 + compatible = samsung,exynos-sysmmu;
 + reg = 0x1121 0x1000;
 + interrupt-parent = combiner;
 + interrupts = 8 5;
 + power-domains = pd_mfc;
 + clock-names = sysmmu, master;
 + clocks = clock CLK_SMMU_MFCL, clock CLK_MFC;
 + #iommu-cells = 0;
 + };

These two nodes (and further ones below) seem sorted wrongly. Please
order by unit address.

Regards,
Andreas

 +
 + sysmmu_tv: sysmmu@1465 {
 + compatible = samsung,exynos-sysmmu;
 + reg = 

Re: [PATCHv3 0/8] devfreq: Add generic exynos memory-bus frequency driver

2015-02-22 Thread Chanwoo Choi
Hi Tobias,

First of all, thanks for your test.

On 02/19/2015 05:59 AM, Tobias Jakobi wrote:
 Hello again,
 
 Tobias Jakobi wrote
 I've tested the series on my Odroid-X2 (by adapting the TRATS2 changes),
 and so far I haven't seen any issues. With the system being idle one can
 see that the 'simple_ondemand' devfreq governor clocks down both memory
 busses to the lowest state.
 
 looks I was too hasty the last time. Actually this series breaks HDMI
 output for me (or at least with 'simple_ondemand' governor, haven't
 tried with performance yet).
 
 I tried to run some simple application, but it hangs in uninterruptible
 sleep immediately, probably before the first page flip. Going to check
 this more thoroughly.
 
 Maybe some parts of the hdmi subsystem don't like the lower clocks?

As you thought, when maintaining lower clock of memory bus frequency,
some issue related to multimedia feature will happen.

Separately, We have to check the miminum lower clock for working of multimedia 
feature.
and then multimedia or other IP have to request it to DVFS driver (memory 
busfreq driver).
But, latest mainline kernel currently has not some way to inform minimum clock 
to DVFS driver.

So, If you check the miminum clock for hdmi, I'll use this clock as minumu 
frequency of dvfs table.

Thanks,
Chanwoo Choi
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Re: [PATCH] cpufreq: exynos: allow build for !THERMAL or !CPU_THERMAL cases

2015-02-22 Thread Viresh Kumar
On 20 February 2015 at 21:50, Bartlomiej Zolnierkiewicz
b.zolnier...@samsung.com wrote:
 Allow driver build for !THERMAL or !CPU_THERMAL cases.

 The new dependency rule is the same as the one that CPUFREQ_DT
 option has (for cpufreq-dt driver which has the same issue with
 using of_cpufreq_cooling_register()).

 Cc: Kukjin Kim kg...@kernel.org
 Cc: Arnd Bergmann a...@arndb.de
 Cc: Eduardo Valentin edubez...@gmail.com
 Cc: Lukasz Majewski l.majew...@samsung.com
 Fixes: 8b2b4a4e5366 (cpufreq: exynos: allow modular build)
 Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
 ---
  drivers/cpufreq/Kconfig.arm | 3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)

 diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
 index 1b06fc4..f4df4af3 100644
 --- a/drivers/cpufreq/Kconfig.arm
 +++ b/drivers/cpufreq/Kconfig.arm
 @@ -28,7 +28,8 @@ config ARM_VEXPRESS_SPC_CPUFREQ
  config ARM_EXYNOS_CPUFREQ
 tristate SAMSUNG EXYNOS CPUfreq Driver
 depends on CPU_EXYNOS4210 || SOC_EXYNOS4212 || SOC_EXYNOS4412 || 
 SOC_EXYNOS5250
 -   depends on THERMAL
 +   # if CPU_THERMAL is on and THERMAL=m, ARM_EXYNOS_CPUFREQ cannot be =y:
 +   depends on !CPU_THERMAL || THERMAL
 help
   This adds the CPUFreq driver for Samsung EXYNOS platforms.
   Supported SoC versions are:

Acked-by: Viresh Kumar viresh.ku...@linaro.org
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