Re: [PATCH v4 3/8] ARM: dts: Exynos5420: add CPU OPP properties

2015-12-07 Thread Viresh Kumar
On 07-12-15, 19:18, Bartlomiej Zolnierkiewicz wrote:
> + cpu1_opp_table: opp_table1 {
> + compatible = "operating-points-v2";
> + opp-shared;
> + opp00@13 {

This should be just opp@13, you don't need 00/01/02... anymore
now. Same for the other patch as well..

Fix that in other patches in this series and you also need to fix it
for arch/arm/boot/dts/exynos4212.dtsi based on what I see in
linux-next.

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Re: [PATCH v4 1/8] ARM: dts: Exynos542x/5800: add cluster regulator supply properties

2015-12-07 Thread Krzysztof Kozlowski
On 08.12.2015 03:18, Bartlomiej Zolnierkiewicz wrote:
> Add cluster regulator supply properties as a preparation to
> adding generic cpufreq-dt driver support for Exynos542x and
> Exynos5800 based boards.
> 
> Cc: Kukjin Kim 
> Cc: Doug Anderson 
> Cc: Javier Martinez Canillas 

That's Javier's old email, not working any more. I think he same applies
to Mike's in CC-list.

> Cc: Andreas Faerber 
> Cc: Sachin Kamat 
> Cc: Thomas Abraham 
> Signed-off-by: Bartlomiej Zolnierkiewicz 
> ---
>  arch/arm/boot/dts/exynos5420-arndale-octa.dts   | 8 
>  arch/arm/boot/dts/exynos5420-peach-pit.dts  | 8 
>  arch/arm/boot/dts/exynos5420-smdk5420.dts   | 8 
>  arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts | 8 
>  arch/arm/boot/dts/exynos5422-odroidxu3.dts  | 8 
>  arch/arm/boot/dts/exynos5422-odroidxu4.dts  | 8 
>  arch/arm/boot/dts/exynos5800-peach-pi.dts   | 8 
>  7 files changed, 56 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts 
> b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
> index 4ecef69..4229641 100644
> --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
> +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
> @@ -52,6 +52,14 @@
>   };
>  };
>  
> + {
> + cpu-supply = <_reg>;
> +};
> +
> + {
> + cpu-supply = <_reg>;
> +};
> +
>  _dwc3_1 {
>   dr_mode = "host";
>  };
> diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts 
> b/arch/arm/boot/dts/exynos5420-peach-pit.dts
> index 35cfb07..30f146b 100644
> --- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
> +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
> @@ -676,6 +676,14 @@
>   };
>  };
>  
> + {
> + cpu-supply = <_reg>;
> +};
> +
> + {
> + cpu-supply = <_reg>;
> +};
> +
>  _2 {
>   status = "okay";
>   samsung,i2c-sda-delay = <100>;
> diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts 
> b/arch/arm/boot/dts/exynos5420-smdk5420.dts
> index ac35aef..fdfe4e6 100644
> --- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
> +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
> @@ -423,3 +423,11 @@
>  _phy1 {
>   vbus-supply = <_vbus_reg>;
>  };
> +
> + {
> + cpu-supply = <_reg>;
> +};
> +
> + {
> + cpu-supply = <_reg>;
> +};
> diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 
> b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
> index 2ae1cf4..0bfd981 100644
> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
> @@ -54,6 +54,14 @@
>   };
>  };
>  
> + {
> + cpu-supply = <_reg>;
> +};
> +
> + {
> + cpu-supply = <_reg>;
> +};
> +
>   {
>   /*
>* PWM 0 -- fan
> diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts 
> b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
> index 432406d..b19561c 100644
> --- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
> @@ -53,6 +53,14 @@
>   };
>  };
>  
> + {
> + cpu-supply = <_reg>;
> +};
> +
> + {
> + cpu-supply = <_reg>;
> +};
> +
>  _0 {
>   status = "okay";
>  
> diff --git a/arch/arm/boot/dts/exynos5422-odroidxu4.dts 
> b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
> index 2faf886..bdc7106 100644
> --- a/arch/arm/boot/dts/exynos5422-odroidxu4.dts
> +++ b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
> @@ -32,6 +32,14 @@
>   };
>  };
>  
> + {
> + cpu-supply = <_reg>;
> +};
> +
> + {
> + cpu-supply = <_reg>;
> +};
> +

How about putting these Odroid changes in exynos5422-odroidxu3-common.dtsi?

Best regards,
Krzysztof

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Re: [PATCH v4 4/8] ARM: Exynos: use generic cpufreq driver for Exynos5420

2015-12-07 Thread Krzysztof Kozlowski
On 08.12.2015 03:18, Bartlomiej Zolnierkiewicz wrote:
> From: Thomas Abraham 
> 
> The new CPU clock type allows the use of cpufreq-dt driver
> for Exynos5420.
> 
> Changes by Bartlomiej:
> - split Exynos5420 support from the original patch
> - disable cpufreq if big.LITTLE switcher support is enabled
> - switch to using cpufreq-dt driver
> 
> Cc: Tomasz Figa 
> Cc: Kukjin Kim 
> Cc: Javier Martinez Canillas 
> Signed-off-by: Thomas Abraham 
> Signed-off-by: Bartlomiej Zolnierkiewicz 
> ---
>  arch/arm/mach-exynos/exynos.c | 3 +++
>  1 file changed, 3 insertions(+)

I think this is actually now your patch, not Thomas any more. :)

> 
> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
> index 1c47aee..7a89c9d 100644
> --- a/arch/arm/mach-exynos/exynos.c
> +++ b/arch/arm/mach-exynos/exynos.c
> @@ -230,6 +230,9 @@ static const struct of_device_id exynos_cpufreq_matches[] 
> = {
>   { .compatible = "samsung,exynos4212", .data = "cpufreq-dt" },
>   { .compatible = "samsung,exynos4412", .data = "cpufreq-dt" },
>   { .compatible = "samsung,exynos5250", .data = "cpufreq-dt" },
> +#ifndef CONFIG_BL_SWITCHER
> + { .compatible = "samsung,exynos5420", .data = "cpufreq-dt" },
> +#endif

Why not on BL_SWITCHER? Shouldn't be enough to disable ARM_DT_BL_CPUFREQ?

Best regards,
Krzysztof

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Re: [linux-sunxi] [PATCH 01/23] mtd: kill the ecclayout->oobavail field

2015-12-07 Thread Priit Laes
On Mon, 2015-12-07 at 23:25 +0100, Boris Brezillon wrote:
> ecclayout->oobavail is just redundant with the mtd->oobavail field.
> Moreover, it prevents static const definition of ecc layouts since
> the
> NAND framework is calculating this value based on the ecclayout-
> >oobfree
> field.
> 
> Signed-off-by: Boris Brezillon 
> ---
>  drivers/mtd/devices/docg3.c   |  5 ++-
>  drivers/mtd/mtdswap.c | 16 -
>  drivers/mtd/nand/brcmnand/brcmnand.c  |  3 --
>  drivers/mtd/nand/docg4.c  |  1 -
>  drivers/mtd/nand/hisi504_nand.c   |  1 -
>  drivers/mtd/nand/nand_base.c  | 12 +++
>  drivers/mtd/onenand/onenand_base.c| 16 -
>  drivers/mtd/tests/oobtest.c   | 49 +--
> 
>  drivers/staging/mt29f_spinand/mt29f_spinand.c |  1 -
>  fs/jffs2/wbuf.c   |  6 ++--
>  include/linux/mtd/mtd.h   |  1 -
>  11 files changed, 48 insertions(+), 63 deletions(-)
> 
[..]
>  
> diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c
> b/drivers/mtd/nand/brcmnand/brcmnand.c
> index 35d78f7..a906ec2 100644
> --- a/drivers/mtd/nand/brcmnand/brcmnand.c
> +++ b/drivers/mtd/nand/brcmnand/brcmnand.c
> @@ -845,9 +845,6 @@ static struct nand_ecclayout *brcmnand_create_layout(int 
> ecc_level,
>   break;
>   }
>  out:
> - /* Sum available OOB */
> - for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES_LARGE; i++)
> - layout->oobavail += layout->oobfree[i].length;
>   return layout;
>  }

You can get rid of the 'out' label and replace the single goto in this
function with 'return layout'.

[...]
>  
> diff --git a/drivers/mtd/nand/nand_base.c
> b/drivers/mtd/nand/nand_base.c
> index 0748a13..1107f5c1 100644
> --- a/drivers/mtd/nand/nand_base.c
> +++ b/drivers/mtd/nand/nand_base.c
> @@ -2037,7 +2037,7 @@ static int nand_do_read_oob(struct mtd_info
> *mtd, loff_t from,
>   stats = mtd->ecc_stats;
>  
>   if (ops->mode == MTD_OPS_AUTO_OOB)
> - len = chip->ecc.layout->oobavail;
> + len = mtd->oobavail;
>   else
>   len = mtd->oobsize;
>  
> @@ -2728,7 +2728,7 @@ static int nand_do_write_oob(struct mtd_info
> *mtd, loff_t to,
>    __func__, (unsigned int)to, (int)ops-
> >ooblen);
>  
>   if (ops->mode == MTD_OPS_AUTO_OOB)
> - len = chip->ecc.layout->oobavail;
> + len = mtd->oobavail;
>   else
>   len = mtd->oobsize;
>  
[...]
> diff --git a/drivers/mtd/onenand/onenand_base.c
> b/drivers/mtd/onenand/onenand_base.c
> index 43b3392..d70bbfd 100644
> --- a/drivers/mtd/onenand/onenand_base.c
> +++ b/drivers/mtd/onenand/onenand_base.c
> @@ -1125,7 +1125,7 @@ static int onenand_mlc_read_ops_nolock(struct
> mtd_info *mtd, loff_t from,
>   (int)len);
>  
>   if (ops->mode == MTD_OPS_AUTO_OOB)
> - oobsize = this->ecclayout->oobavail;
> + oobsize = mtd->oobavail;
>   else
>   oobsize = mtd->oobsize;
>  
> @@ -1230,7 +1230,7 @@ static int onenand_read_ops_nolock(struct
> mtd_info *mtd, loff_t from,
>   (int)len);
>  
>   if (ops->mode == MTD_OPS_AUTO_OOB)
> - oobsize = this->ecclayout->oobavail;
> + oobsize = mtd->oobavail;
>   else
>   oobsize = mtd->oobsize;
>  
> @@ -1365,7 +1365,7 @@ static int onenand_read_oob_nolock(struct
> mtd_info *mtd, loff_t from,
>   ops->oobretlen = 0;
>  
>   if (mode == MTD_OPS_AUTO_OOB)
> - oobsize = this->ecclayout->oobavail;
> + oobsize = mtd->oobavail;
>   else
>   oobsize = mtd->oobsize;
>  
> @@ -1887,7 +1887,7 @@ static int onenand_write_ops_nolock(struct
> mtd_info *mtd, loff_t to,
>   return 0;
>  
>   if (ops->mode == MTD_OPS_AUTO_OOB)
> - oobsize = this->ecclayout->oobavail;
> + oobsize = mtd->oobavail;
>   else
>   oobsize = mtd->oobsize;
>  
> @@ -2063,7 +2063,7 @@ static int onenand_write_oob_nolock(struct
> mtd_info *mtd, loff_t to,
>   ops->oobretlen = 0;
>  
>   if (mode == MTD_OPS_AUTO_OOB)
> - oobsize = this->ecclayout->oobavail;
> + oobsize = mtd->oobavail;
>   else
>   oobsize = mtd->oobsize;

This identical construction seems to occur multiple times in multiple
files. Would it make sense to create a macro for it?


Päikest,
Priit Laes :)
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Re: [PATCH v4 0/8] cpufreq: add generic cpufreq driver support for Exynos542x/5800 platforms

2015-12-07 Thread Viresh Kumar
On 08-12-15, 11:47, Viresh Kumar wrote:
> On 07-12-15, 19:18, Bartlomiej Zolnierkiewicz wrote:
> > Hi,
> > 
> > This patch series adds generic cpufreq-dt driver support for
> > Exynos542x/5800 (using the new CPU clock type which allows it).
> > 
> > It has been tested on Exynos5422 based ODROID-XU3 Lite board.
> 
> Excellent work Bartlomiej. Thanks a lot for adapting cpufreq-dt for
> this. Really appreciate it :)

You fix the oppXX@ problem and add my

Acked-by: Viresh Kumar 

for the entire series. Good work.

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Re: [PATCH] PCI: designware: bail out if host_init failed

2015-12-07 Thread Jisheng Zhang
Dear Bjorn,

On Wed, 25 Nov 2015 14:01:03 -0600
Bjorn Helgaas wrote:

> Hi Jisheng,
> 
> On Thu, Nov 12, 2015 at 09:48:45PM +0800, Jisheng Zhang wrote:
> > There's no reason to continue the initialization such as configure
> > register, scan root bus etc. if customized host_init() failed. This
> > patch tries to check the host_init result, bail out if failed.  
> 
> This patch changes the (*host_init) return type and adds "return 0" to
> the host_init() implementations of ten different drivers, all to
> support a possible error in one driver.
> 
> Is there any way to detect and handle the error in
> ls1021_pcie_host_init() earlier, maybe by doing the syscon_regmap
> lookup in ls_pcie_probe() instead of in the host_init() function?
> 
> That would be even better because you wouldn't have to touch any of
> the other drivers, and you'd detect the error even earlier, before
> we've done any of the designware setup.

Sorry for being late. Got your point. The reason I made this patch is that:
I want to clk gate the pcie host to save power if the customized host_init()
report link training failure etc. For example: there's no pcie device in the
slot at all. But today, I have a different idea: the PCIE support hotplug,
so link training failure doesn't mean we should bail out, in fact we should
continue the initialization as current code does. So I think Jingoo made the
correct decision when implement the pcie designware interface. I want to drop
this patch.

Only one problem need your suggestions: how to save power when there's no device
, I.E clk gate the host, shutdown the pcie phy etc.

Any suggestions are appreciated!

Thanks in advance,
Jisheng


> 
> Bjorn
> 
> > Signed-off-by: Jisheng Zhang 
> > ---
> >  drivers/pci/host/pci-dra7xx.c  |  4 +++-
> >  drivers/pci/host/pci-exynos.c  |  4 +++-
> >  drivers/pci/host/pci-imx6.c|  4 +++-
> >  drivers/pci/host/pci-keystone.c|  4 +++-
> >  drivers/pci/host/pci-layerscape.c  | 25 -
> >  drivers/pci/host/pcie-designware.c |  7 +--
> >  drivers/pci/host/pcie-designware.h |  2 +-
> >  drivers/pci/host/pcie-spear13xx.c  |  4 +++-
> >  8 files changed, 37 insertions(+), 17 deletions(-)
> > 
> > diff --git a/drivers/pci/host/pci-dra7xx.c b/drivers/pci/host/pci-dra7xx.c
> > index 8c36880..b3160a1 100644
> > --- a/drivers/pci/host/pci-dra7xx.c
> > +++ b/drivers/pci/host/pci-dra7xx.c
> > @@ -149,7 +149,7 @@ static void dra7xx_pcie_enable_interrupts(struct 
> > pcie_port *pp)
> >LEG_EP_INTERRUPTS);
> >  }
> >  
> > -static void dra7xx_pcie_host_init(struct pcie_port *pp)
> > +static int dra7xx_pcie_host_init(struct pcie_port *pp)
> >  {
> > dw_pcie_setup_rc(pp);
> >  
> > @@ -162,6 +162,8 @@ static void dra7xx_pcie_host_init(struct pcie_port *pp)
> > if (IS_ENABLED(CONFIG_PCI_MSI))
> > dw_pcie_msi_init(pp);
> > dra7xx_pcie_enable_interrupts(pp);
> > +
> > +   return 0;
> >  }
> >  
> >  static struct pcie_host_ops dra7xx_pcie_host_ops = {
> > diff --git a/drivers/pci/host/pci-exynos.c b/drivers/pci/host/pci-exynos.c
> > index 01095e1..57f370b 100644
> > --- a/drivers/pci/host/pci-exynos.c
> > +++ b/drivers/pci/host/pci-exynos.c
> > @@ -481,10 +481,12 @@ static int exynos_pcie_link_up(struct pcie_port *pp)
> > return 0;
> >  }
> >  
> > -static void exynos_pcie_host_init(struct pcie_port *pp)
> > +static int exynos_pcie_host_init(struct pcie_port *pp)
> >  {
> > exynos_pcie_establish_link(pp);
> > exynos_pcie_enable_interrupts(pp);
> > +
> > +   return 0;
> >  }
> >  
> >  static struct pcie_host_ops exynos_pcie_host_ops = {
> > diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
> > index 22e8224..9a46680 100644
> > --- a/drivers/pci/host/pci-imx6.c
> > +++ b/drivers/pci/host/pci-imx6.c
> > @@ -425,7 +425,7 @@ static int imx6_pcie_establish_link(struct pcie_port 
> > *pp)
> > return 0;
> >  }
> >  
> > -static void imx6_pcie_host_init(struct pcie_port *pp)
> > +static int imx6_pcie_host_init(struct pcie_port *pp)
> >  {
> > imx6_pcie_assert_core_reset(pp);
> >  
> > @@ -439,6 +439,8 @@ static void imx6_pcie_host_init(struct pcie_port *pp)
> >  
> > if (IS_ENABLED(CONFIG_PCI_MSI))
> > dw_pcie_msi_init(pp);
> > +
> > +   return 0;
> >  }
> >  
> >  static void imx6_pcie_reset_phy(struct pcie_port *pp)
> > diff --git a/drivers/pci/host/pci-keystone.c 
> > b/drivers/pci/host/pci-keystone.c
> > index 0aa81bd..2604571 100644
> > --- a/drivers/pci/host/pci-keystone.c
> > +++ b/drivers/pci/host/pci-keystone.c
> > @@ -250,7 +250,7 @@ static int keystone_pcie_fault(unsigned long addr, 
> > unsigned int fsr,
> > return 0;
> >  }
> >  
> > -static void __init ks_pcie_host_init(struct pcie_port *pp)
> > +static int __init ks_pcie_host_init(struct pcie_port *pp)
> >  {
> > struct keystone_pcie *ks_pcie = to_keystone_pcie(pp);
> > u32 val;
> > @@ -277,6 +277,8 @@ static void __init 

Re: [PATCH v4 3/8] ARM: dts: Exynos5420: add CPU OPP properties

2015-12-07 Thread Krzysztof Kozlowski
On 08.12.2015 03:18, Bartlomiej Zolnierkiewicz wrote:
> From: Thomas Abraham 
> 
> For Exynos5420 platforms, add CPU operating points for
> migrating from Exynos specific cpufreq driver to using
> generic cpufreq driver.
> 
> Changes by Bartlomiej:
> - split Exynos5420 support from the original patch
> 
> Changes by Ben Gamari:
> - Port to operating-points-v2
> 
> Cc: Kukjin Kim 
> Cc: Doug Anderson 
> Cc: Javier Martinez Canillas 
> Cc: Andreas Faerber 
> Cc: Sachin Kamat 

Sachin's address does not work neither.

> Cc: Thomas Abraham 

Thomas' SoB disappeared.

I see that you directly re-used Thomas' values for voltages and
frequencies. For Exynos5420 we could go down to 200 MHz (for both cores)
but this can be fine-tuned per-board later.

Best regards,
Krzysztof


> Signed-off-by: Ben Gamari 
> Signed-off-by: Bartlomiej Zolnierkiewicz 
> ---
>  arch/arm/boot/dts/exynos5420.dtsi | 122 
> ++
>  1 file changed, 122 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
> b/arch/arm/boot/dts/exynos5420.dtsi
> index 48a0a55..f8f70a5 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -50,6 +50,116 @@
>   usbdrdphy1 = _phy1;
>   };
>  
> + cpu0_opp_table: opp_table0 {
> + compatible = "operating-points-v2";
> + opp-shared;
> + opp00@18 {
> + opp-hz = /bits/ 64 <18>;
> + opp-microvolt = <125>;
> + clock-latency-ns = <14>;
> + };
> + opp01@17 {
> + opp-hz = /bits/ 64 <17>;
> + opp-microvolt = <1212500>;
> + clock-latency-ns = <14>;
> + };
> + opp02@16 {
> + opp-hz = /bits/ 64 <16>;
> + opp-microvolt = <1175000>;
> + clock-latency-ns = <14>;
> + };
> + opp03@15 {
> + opp-hz = /bits/ 64 <15>;
> + opp-microvolt = <1137500>;
> + clock-latency-ns = <14>;
> + };
> + opp04@14 {
> + opp-hz = /bits/ 64 <14>;
> + opp-microvolt = <1112500>;
> + clock-latency-ns = <14>;
> + };
> + opp05@13 {
> + opp-hz = /bits/ 64 <13>;
> + opp-microvolt = <1062500>;
> + clock-latency-ns = <14>;
> + };
> + opp06@12 {
> + opp-hz = /bits/ 64 <12>;
> + opp-microvolt = <1037500>;
> + clock-latency-ns = <14>;
> + };
> + opp07@11 {
> + opp-hz = /bits/ 64 <11>;
> + opp-microvolt = <1012500>;
> + clock-latency-ns = <14>;
> + };
> + opp08@10 {
> + opp-hz = /bits/ 64 <10>;
> + opp-microvolt = < 987500>;
> + clock-latency-ns = <14>;
> + };
> + opp09@9 {
> + opp-hz = /bits/ 64 <9>;
> + opp-microvolt = < 962500>;
> + clock-latency-ns = <14>;
> + };
> + opp10@8 {
> + opp-hz = /bits/ 64 <8>;
> + opp-microvolt = < 937500>;
> + clock-latency-ns = <14>;
> + };
> + opp11@7 {
> + opp-hz = /bits/ 64 <7>;
> + opp-microvolt = < 912500>;
> + clock-latency-ns = <14>;
> + };
> + };
> +
> + cpu1_opp_table: opp_table1 {
> + compatible = "operating-points-v2";
> + opp-shared;
> + opp00@13 {
> + opp-hz = /bits/ 64 <13>;
> + opp-microvolt = <1275000>;
> + clock-latency-ns = <14>;
> + };
> + opp01@12 {
> + opp-hz = /bits/ 64 <12>;
> + opp-microvolt = <1212500>;
> + clock-latency-ns = <14>;
> + };
> + opp02@11 {
> + opp-hz = /bits/ 64 <11>;
> + opp-microvolt = <1162500>;
> + clock-latency-ns = <14>;
> + };
> + opp03@10 {
> + 

Re: [PATCH v4 0/8] cpufreq: add generic cpufreq driver support for Exynos542x/5800 platforms

2015-12-07 Thread Viresh Kumar
On 07-12-15, 19:18, Bartlomiej Zolnierkiewicz wrote:
> Hi,
> 
> This patch series adds generic cpufreq-dt driver support for
> Exynos542x/5800 (using the new CPU clock type which allows it).
> 
> It has been tested on Exynos5422 based ODROID-XU3 Lite board.

Excellent work Bartlomiej. Thanks a lot for adapting cpufreq-dt for
this. Really appreciate it :)

-- 
viresh
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Re: [PATCH v3 0/10] cpufreq: add generic cpufreq driver support for Exynos542x/5800 platforms

2015-12-07 Thread Markus Reichl
Hi,

I have tested this patch set on Odroid-XU4 and get:

[2.140821] cpu cpu0: Looking up cpu-cluster.1-supply from device tree
[2.142780] cpu cpu0: bL_cpufreq_init: CPU 0 initialized
[2.146858] cpufreq: ondemand governor failed, too long transition latency 
of HW, fallback to performance governor
[2.161574] cpu cpu4: Looking up cpu-cluster.0-supply from device tree
[2.163277] cpu cpu4: bL_cpufreq_init: CPU 4 initialized
[2.167263] cpufreq: ondemand governor failed, too long transition latency 
of HW, fallback to performance governor
[2.180092] arm_big_little: bL_cpufreq_register: Registered platform driver: 
dt-bl

cpufreq stays in performance mode and does not change down from highest 
frequency.

Had the same behaviour with Ben Gamari's patch.

Thanks,
--
Markus


Am 04.12.2015 um 18:30 schrieb Bartlomiej Zolnierkiewicz:
> Hi,
> 
> This patch series adds generic arm_big_little_dt cpufreq driver
> support for Exynos542x/5800 (using the new CPU clock type which
> allows it).  It also:
> - enhances arm_big_little[_dt] driver with CPU cluster regulator
>   support
> - adds CPU clock configuration data and CPU operating points
>   setup for Exynos542x/5800
> - adds CPU cluster regulator supplies for Exynos542x/5800 boards
> 
> This patch series has been tested on Exynos5422 based ODROID-XU3
> Lite board.
> 
> Please note that this is not a final version of the patchset.
> I just wanted to push out current work-in-progress patches that
> integrate changes from Anand, Ben and me.
> 
> TODO:
> - porting the Exynos542x/5800 support over cpufreq-dt
> 
> Depends on:
> - next-20151124 branch of linux-next kernel tree
> 
> Changes since v2:
> - ported over next-20151124 branch
> - integrated missing CLK_RECALC_NEW_RATES flags fix to patch #3
>   (from Anand Moon)
> - added regulator supply properties for ODROID-XU3 Lite and
>   ODROID-XU4 in patch #2
> - ported CPU OPPs to operating-points-v2 (from Ben Gamari)
> - added "ARM: dts: Exynos5422: fix OPP tables" patch (from Ben
>   Gamari)
> - added "cpufreq: arm-big-little: accept operating-points-v2
>   nodes" patch (from Ben Gamari)
> - renamed OPP nodes as opp@
> 
> Changes since v1:
> - added CPU cluster regulator supply properties to
>   exynos5420-arndale-octa.dts, exynos5420-peach-pit.dts,
>   exynos5420-smdk5420.dts and exynos5800-peach-pi.dts
> 
> Changes over Thomas' original v12 code:
> - split Exynos5420 and Exynos5800 support
> - moved E5420_[EGL,KFC]_DIV0() macros to clk-exynos5420.c
> - disabled cpufreq if big.LITTLE switcher support is enabled
> - enhanced arm_big_little[_dt] driver with CPU cluster regulator
>   support
> - fixed CPU clock configuration data for Exynos5800
> - fixed CPU operating points setup for Exynos5800
> - added CPU cluster regulator supplies for ODROID-XU3 board
> 
> Best regards,
> --
> Bartlomiej Zolnierkiewicz
> Samsung R Institute Poland
> Samsung Electronics
> 
> 
> Bartlomiej Zolnierkiewicz (4):
>   cpufreq: arm_big_little: add cluster regulator support
>   ARM: dts: Exynos5420/5800: add cluster regulator supply properties
>   clk: samsung: exynos5800: fix cpu clock configuration data
>   ARM: dts: Exynos5800: fix CPU OPP
> 
> Ben Gamari (2):
>   ARM: dts: Exynos5422: fix OPP tables
>   cpufreq: arm-big-little: accept operating-points-v2 nodes
> 
> Thomas Abraham (4):
>   clk: samsung: exynos5420: add cpu clock configuration data and
> instantiate cpu clock
>   ARM: dts: Exynos5420: add CPU OPP and regulator supply property
>   ARM: Exynos: use generic cpufreq driver for Exynos5420
>   ARM: Exynos: use generic cpufreq driver for Exynos5800
> 
>  .../bindings/cpufreq/arm_big_little_dt.txt |   4 +
>  arch/arm/boot/dts/exynos5420-arndale-octa.dts  |   8 +
>  arch/arm/boot/dts/exynos5420-peach-pit.dts |   8 +
>  arch/arm/boot/dts/exynos5420-smdk5420.dts  |   8 +
>  arch/arm/boot/dts/exynos5420.dtsi  | 122 ++
>  arch/arm/boot/dts/exynos5422-cpus.dtsi |  10 ++
>  arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts|   8 +
>  arch/arm/boot/dts/exynos5422-odroidxu3.dts |   8 +
>  arch/arm/boot/dts/exynos5422-odroidxu4.dts |   8 +
>  arch/arm/boot/dts/exynos5800-peach-pi.dts  |   8 +
>  arch/arm/boot/dts/exynos5800.dtsi  | 165 +++
>  arch/arm/mach-exynos/exynos.c  |   8 +
>  drivers/clk/samsung/clk-exynos5420.c   |  88 ++-
>  drivers/cpufreq/arm_big_little.c   | 175 
> +
>  drivers/cpufreq/arm_big_little_dt.c|  12 +-
>  include/dt-bindings/clock/exynos5420.h |   2 +
>  16 files changed, 608 insertions(+), 34 deletions(-)
> 


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Re: [PATCH v3 06/10] clk: samsung: exynos5800: fix cpu clock configuration data

2015-12-07 Thread Sylwester Nawrocki
On 04/12/15 18:30, Bartlomiej Zolnierkiewicz wrote:
> Fix cpu clock configuration data for Exynos5800 (it uses
> higher PCLK_DBG divider values than Exynos5420 and supports
> additional frequencies).
> 
> Based on Hardkernel's kernel for ODROID-XU3 board.
> 
> Cc: Tomasz Figa 
> Cc: Mike Turquette 
> Cc: Javier Martinez Canillas 
> Cc: Thomas Abraham 
> Signed-off-by: Bartlomiej Zolnierkiewicz 

Acked-by: Sylwester Nawrocki 

-- 
Regards,
Sylwester

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Re: [PATCH] drm/exynos: decon: remove unused variables

2015-12-07 Thread Javier Martinez Canillas
Hello Inki,

On 12/07/2015 09:55 AM, Inki Dae wrote:
> This patch just removes unused variables, i and ret.
> 
> Signed-off-by: Inki Dae 
> ---
>  drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c 
> b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
> index edfd6e3..2ac1d4d 100644
> --- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
> +++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
> @@ -377,8 +377,6 @@ static void decon_swreset(struct decon_context *ctx)
>  static void decon_enable(struct exynos_drm_crtc *crtc)
>  {
>   struct decon_context *ctx = crtc->ctx;
> - int ret;
> - int i;
>  
>   if (!test_and_clear_bit(BIT_SUSPENDED, >flags))
>   return;
> 

Reviewed-by: Javier Martinez Canillas 

Best regards,
-- 
Javier Martinez Canillas
Open Source Group
Samsung Research America
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Re: [PATCH 4/4] ARM: dts: Use OF graph for DP to panel connection in exynos5800-peach-pi

2015-12-07 Thread Inki Dae
Hi Javier,

2015-12-07 22:41 GMT+09:00 Javier Martinez Canillas :
> Hello Inki,
>
> On 12/07/2015 09:52 AM, Inki Dae wrote:
>> From: Javier Martinez Canillas 
>>
>
> Thanks a lot for posting this patch.
>
>> The DT binding for the Exynos DRM Display Port (DP) driver isn't consistent
>> since it uses a phandle to describe the connection between the DP port and
>> the display panel but uses the OF graph ports and endpoints to describe the
>> connection betwen the DP port, a bridge chip and the panel.
>>
>> The Exynos DP driver and the DT binding have been changed to allow also to
>> describe the DP port to panel connection using ports / endpoints (OF graph)
>> so this patch changes the Exynos5800 Peach Pi DT to make it consistent with
>> the Exynos5420 Peach Pit that has a eDP to LVDS chip and uses OF graph too.
>>
>> Signed-off-by: Javier Martinez Canillas 
>> Tested-by: Javier Martinez Canillas 
>
> This tag was not in my original patch, it's true that I tested
> it but will someone believe me? ;)

Oops. I confused you spread Reviewed-by and Tested-by here and there.
Don't worry about that. Will remove it if you don't give me Tested-by.
:)

Thanks,
Inki Dae

>
>> Reviewed-by: Inki Dae 
>
> Thanks for the review.
>
> Best regards,
> --
> Javier Martinez Canillas
> Open Source Group
> Samsung Research America
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
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Re: [PATCH v3 03/10] clk: samsung: exynos5420: add cpu clock configuration data and instantiate cpu clock

2015-12-07 Thread Sylwester Nawrocki
On 04/12/15 18:30, Bartlomiej Zolnierkiewicz wrote:
> From: Thomas Abraham 
> 
> With the addition of the new Samsung specific cpu-clock type, the
> arm clock can be represented as a cpu-clock type. Add the CPU clock
> configuration data and instantiate the CPU clock type for Exynos5420.
> 
> Changes by Bartlomiej:
> - split Exynos5420 support from the original patches
> - moved E5420_[EGL,KFC]_DIV0() macros to clk-exynos5420.c
> 
> Cc: Tomasz Figa 
> Cc: Mike Turquette 
> Cc: Javier Martinez Canillas 
> Signed-off-by: Thomas Abraham 
> Signed-off-by: Bartlomiej Zolnierkiewicz 

Acked-by: Sylwester Nawrocki 

-- 
Regards,
Sylwester
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Re: [PATCH 4/4] ARM: dts: Use OF graph for DP to panel connection in exynos5800-peach-pi

2015-12-07 Thread Javier Martinez Canillas
Hello Inki,

On 12/07/2015 09:52 AM, Inki Dae wrote:
> From: Javier Martinez Canillas 
>

Thanks a lot for posting this patch.
 
> The DT binding for the Exynos DRM Display Port (DP) driver isn't consistent
> since it uses a phandle to describe the connection between the DP port and
> the display panel but uses the OF graph ports and endpoints to describe the
> connection betwen the DP port, a bridge chip and the panel.
> 
> The Exynos DP driver and the DT binding have been changed to allow also to
> describe the DP port to panel connection using ports / endpoints (OF graph)
> so this patch changes the Exynos5800 Peach Pi DT to make it consistent with
> the Exynos5420 Peach Pit that has a eDP to LVDS chip and uses OF graph too.
> 
> Signed-off-by: Javier Martinez Canillas 
> Tested-by: Javier Martinez Canillas 

This tag was not in my original patch, it's true that I tested
it but will someone believe me? ;)

> Reviewed-by: Inki Dae 

Thanks for the review.

Best regards,
-- 
Javier Martinez Canillas
Open Source Group
Samsung Research America
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Re: [PATCH 1/3] Device tree binding documentation for gpio-switch

2015-12-07 Thread Rob Herring
+Linus W

On Fri, Dec 04, 2015 at 05:31:13PM +, Martyn Welch wrote:
> This patch adds documentation for the gpio-switch binding. This binding
> provides a mechanism to bind named links to gpio, with the primary
> purpose of enabling standardised access to switches that might be standard
> across a group of devices but implemented differently on each device.

This is good and what I suggested, but it now makes me wonder if switch 
is generic enough. This boils down to needing to expose single gpio 
lines to userspace with a defined function/use. IIRC, there's been some 
discussion about this before along with improving the userspace 
interface for GPIO in general. So I'd like to get Linus' thoughts on 
this.


> Signed-off-by: Martyn Welch 
> ---
>  .../devicetree/bindings/misc/gpio-switch.txt   | 47 
> ++
>  1 file changed, 47 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/misc/gpio-switch.txt
> 
> diff --git a/Documentation/devicetree/bindings/misc/gpio-switch.txt 
> b/Documentation/devicetree/bindings/misc/gpio-switch.txt
> new file mode 100644
> index 000..13528bd
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/misc/gpio-switch.txt
> @@ -0,0 +1,47 @@
> +Device-Tree bindings for gpio attached switches.
> +
> +This provides a mechanism to provide a named link to specified gpios. This 
> can
> +be useful in instances such as when theres a need to monitor a switch, which 
> is
> +common across a family of devices, but attached to different gpios and even
> +implemented in different ways on differnet devices.
> +
> +Required properties:
> + - compatible = "gpio-switch";
> +
> +Each signal is represented as a sub-node of "gpio-switch". The naming of
> +sub-nodes is arbitrary.
> +
> +Required sub-node properties:
> +
> + - label: Name to be given to gpio switch.
> + - gpios: OF device-tree gpio specification.
> +
> +Optional sub-node properties:
> +
> + - read-only: Boolean flag to mark the gpio as read-only, i.e. the line
> +   should not be driven by the host.

In terms a a switch use, allowing driving it would be an override of the 
switch. Is that the idea here?

> +
> +Example nodes:
> +
> +gpio-switch {
> +compatible = "gpio-switch";

Both from a binding and driver perspective, there is no point in 
grouping these. Each node can simply have this compatible string.

> +
> +write-protect {
> +label = "write-protect";
> +gpios = < 0 GPIO_ACTIVE_LOW>;
> +read-only;
> +};
> +
> +developer-switch {
> +label = "developer-switch";
> +gpios = < 3 GPIO_ACTIVE_HIGH>;
> +read-only;
> +};
> +
> +recovery-switch {
> +label = "recovery-switch";
> +gpios = < 7 GPIO_ACTIVE_LOW>;
> +read-only;
> +};
> +};
> +
> -- 
> 2.1.4
> 
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Re: [PATCH] ARM: multi_v7_defconfig: Enable fan, sensors and audio for Odroid XU3

2015-12-07 Thread Krzysztof Kozlowski
On 07.12.2015 18:14, Arnd Bergmann wrote:
> On Monday 07 December 2015 09:59:54 Krzysztof Kozlowski wrote:
>> For Odroid XU3-family enable the:
>>  - PWM fan (to control the CPU fan using thermal subsystem),
>>  - TI INA231 sensors (provide power measurements of big.LITTLE cores,
>>DRAM and GPU),
>>  - Samsung sound (for Odroid XU3 and Snow as well).
>>
>> Signed-off-by: Krzysztof Kozlowski 
>>
> 
> Looks good. Do you have a samsung/defconfig branch already that you
> can put this into, or should be pick it up into arm-soc directly?
> 
> My preference is the former, but it would be a bit silly if that
> is the only samsung defconfig change we need.

I had a couple of defconfig patches in my queue but I sent them last
week to Kukjin in pull request. He didn't pull it yet. Maybe he could
apply this patch after pulling?

Anyway we can wait for a few days to sort it out. If I don't have
another defconfig patches then I will remind myself with applying it to
arm-soc.

Best regards,
Krzysztof

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Re: [PATCH 1/3] dt-bindings: regulator/clock/mfd: Reorganize S2MPS-family bindings

2015-12-07 Thread Lee Jones
On Fri, 04 Dec 2015, Krzysztof Kozlowski wrote:

> Bindings for Samsung S2M and S5M family PMICs are in mess. They are
> spread over different files and subdirectories in a non-consistent way.
> The devices and respective drivers for them share a lot in common so
> everything could be organized in a more readable way.
> 
> Reorganize the S2MPS11/13/14/15 Device Tree bindings to match the
> drivers for this family of devices:
>  - move mfd/s2mps11.txt to mfd/samsung,sec-core.txt for the main MFD
>driver (common for entire family),
>  - split clock block to clock/samsung,s2mps11.txt,
>  - split regulator block to regulator/samsung,s2mps11.txt.
> 
> Signed-off-by: Krzysztof Kozlowski 
> ---
>  .../devicetree/bindings/clock/samsung,s2mps11.txt  |  49 +++
>  Documentation/devicetree/bindings/mfd/s2mps11.txt  | 153 
> -
>  .../devicetree/bindings/mfd/samsung,sec-core.txt   |  84 +++

Acked-by: Lee Jones 

>  .../bindings/regulator/samsung,s2mps11.txt | 102 ++
>  MAINTAINERS|   4 +-
>  5 files changed, 238 insertions(+), 154 deletions(-)
>  create mode 100644 
> Documentation/devicetree/bindings/clock/samsung,s2mps11.txt
>  delete mode 100644 Documentation/devicetree/bindings/mfd/s2mps11.txt
>  create mode 100644 Documentation/devicetree/bindings/mfd/samsung,sec-core.txt
>  create mode 100644 
> Documentation/devicetree/bindings/regulator/samsung,s2mps11.txt
> 
> diff --git a/Documentation/devicetree/bindings/clock/samsung,s2mps11.txt 
> b/Documentation/devicetree/bindings/clock/samsung,s2mps11.txt
> new file mode 100644
> index ..2726c1d58a79
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/samsung,s2mps11.txt
> @@ -0,0 +1,49 @@
> +Binding for Samsung S2M and S5M family clock generator block
> +
> +
> +This is a part of device tree bindings for S2M and S5M family multi-function
> +devices.
> +More information can be found in bindings/mfd/sec-core.txt file.
> +
> +The S2MPS11/13/15 and S5M8767 provide three(AP/CP/BT) buffered 32.768 kHz
> +outputs. The S2MPS14 provides two (AP/BT) buffered 32.768 KHz outputs.
> +
> +To register these as clocks with common clock framework instantiate under
> +main device node a sub-node named "clocks".
> +
> +It uses the common clock binding documented in:
> + - Documentation/devicetree/bindings/clock/clock-bindings.txt
> +
> +
> +Required properties of the "clocks" sub-node:
> + - #clock-cells: should be 1.
> + - compatible: Should be one of: "samsung,s2mps11-clk", 
> "samsung,s2mps13-clk",
> +   "samsung,s2mps14-clk", "samsung,s5m8767-clk"
> +   The S2MPS15 uses the same compatible as S2MPS13, as both provides similar
> +   clocks.
> +
> +
> +Each clock is assigned an identifier and client nodes use this identifier
> +to specify the clock which they consume.
> +Clock   ID   Devices
> +--
> +32KhzAP  0S2MPS11/13/14/15, S5M8767
> +32KhzCP  1S2MPS11/13/15, S5M8767
> +32KhzBT  2S2MPS11/13/14/15, S5M8767
> +
> +Include dt-bindings/clock/samsung,s2mps11.h file to use preprocessor defines
> +in device tree sources.
> +
> +
> +Example:
> +
> + s2mps11_pmic@66 {
> + compatible = "samsung,s2mps11-pmic";
> + reg = <0x66>;
> +
> + s2m_osc: clocks {
> + compatible = "samsung,s2mps11-clk";
> + #clock-cells = <1>;
> + clock-output-names = "xx", "yy", "zz";
> + };
> + };
> diff --git a/Documentation/devicetree/bindings/mfd/s2mps11.txt 
> b/Documentation/devicetree/bindings/mfd/s2mps11.txt
> deleted file mode 100644
> index 09b94c97faac..
> --- a/Documentation/devicetree/bindings/mfd/s2mps11.txt
> +++ /dev/null
> @@ -1,153 +0,0 @@
> -
> -* Samsung S2MPS11/13/14/15 and S2MPU02 Voltage and Current Regulator
> -
> -The Samsung S2MPS11 is a multi-function device which includes voltage and
> -current regulators, RTC, charger controller and other sub-blocks. It is
> -interfaced to the host controller using an I2C interface. Each sub-block is
> -addressed by the host system using different I2C slave addresses.
> -
> -Required properties:
> -- compatible: Should be one of the following
> - - "samsung,s2mps11-pmic"
> - - "samsung,s2mps13-pmic"
> - - "samsung,s2mps14-pmic"
> - - "samsung,s2mps15-pmic"
> - - "samsung,s2mpu02-pmic".
> -- reg: Specifies the I2C slave address of the pmic block. It should be 0x66.
> -
> -Optional properties:
> -- interrupt-parent: Specifies the phandle of the interrupt controller to 
> which
> -  the interrupts from s2mps11 are delivered to.
> -- interrupts: Interrupt specifiers for interrupt sources.
> -- samsung,s2mps11-wrstbi-ground: 

Re: [PATCH] ARM: multi_v7_defconfig: Enable fan, sensors and audio for Odroid XU3

2015-12-07 Thread Arnd Bergmann
On Monday 07 December 2015 09:59:54 Krzysztof Kozlowski wrote:
> For Odroid XU3-family enable the:
>  - PWM fan (to control the CPU fan using thermal subsystem),
>  - TI INA231 sensors (provide power measurements of big.LITTLE cores,
>DRAM and GPU),
>  - Samsung sound (for Odroid XU3 and Snow as well).
> 
> Signed-off-by: Krzysztof Kozlowski 
> 

Looks good. Do you have a samsung/defconfig branch already that you
can put this into, or should be pick it up into arm-soc directly?

My preference is the former, but it would be a bit silly if that
is the only samsung defconfig change we need.

Arnd
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Re: [PATCH 3/3] dt-bindings: regulator/mfd: Reorganize S2MPA01 bindings

2015-12-07 Thread Lee Jones
On Fri, 04 Dec 2015, Krzysztof Kozlowski wrote:

> The mfd/s2mpa01.txt duplicates some of the information about bindings
> with old mfd/s2mps11.txt. Now common part exists entirely in
> mfd/samsung,sec-core.txt so:
>  - add company prefix to file name (regulator/samsung,s2mpa01.txt),
>  - remove duplicated information,
>  - reorganize the contents to match style of
>regulator/samsung,s2mps11.txt.
> 
> Signed-off-by: Krzysztof Kozlowski 
> ---
>  Documentation/devicetree/bindings/mfd/s2mpa01.txt  | 90 
> --
>  .../devicetree/bindings/mfd/samsung,sec-core.txt   |  4 +-

Acked-by: Lee Jones 

>  .../bindings/regulator/samsung,s2mpa01.txt | 79 +++
>  3 files changed, 82 insertions(+), 91 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/mfd/s2mpa01.txt
>  create mode 100644 
> Documentation/devicetree/bindings/regulator/samsung,s2mpa01.txt
> 
> diff --git a/Documentation/devicetree/bindings/mfd/s2mpa01.txt 
> b/Documentation/devicetree/bindings/mfd/s2mpa01.txt
> deleted file mode 100644
> index c13d3d8c3947..
> --- a/Documentation/devicetree/bindings/mfd/s2mpa01.txt
> +++ /dev/null
> @@ -1,90 +0,0 @@
> -
> -* Samsung S2MPA01 Voltage and Current Regulator
> -
> -The Samsung S2MPA01 is a multi-function device which includes high
> -efficiency buck converters including Dual-Phase buck converter, various LDOs,
> -and an RTC. It is interfaced to the host controller using an I2C interface.
> -Each sub-block is addressed by the host system using different I2C slave
> -addresses.
> -
> -Required properties:
> -- compatible: Should be "samsung,s2mpa01-pmic".
> -- reg: Specifies the I2C slave address of the PMIC block. It should be 0x66.
> -
> -Optional properties:
> -- interrupt-parent: Specifies the phandle of the interrupt controller to 
> which
> -  the interrupts from s2mpa01 are delivered to.
> -- interrupts: An interrupt specifier for the sole interrupt generated by the
> -  device.
> -
> -Optional nodes:
> -- regulators: The regulators of s2mpa01 that have to be instantiated should 
> be
> -  included in a sub-node named 'regulators'. Regulator nodes and constraints
> -  included in this sub-node use the standard regulator bindings which are
> -  documented elsewhere.
> -
> -Properties for BUCK regulator nodes:
> -- regulator-ramp-delay: ramp delay in uV/us. May be 6250, 12500
> -  (default), 25000, or 5. May be 0 for disabling the ramp delay on
> -  BUCK{1,2,3,4}.
> -
> - In the absence of the regulator-ramp-delay property, the default ramp
> - delay will be used.
> -
> -  NOTE: Some BUCKs share the ramp rate setting i.e. same ramp value will be 
> set
> -  for a particular group of BUCKs. So provide same 
> regulator-ramp-delay=.
> -
> -  The following BUCKs share ramp settings:
> -  * 1 and 6
> -  * 2 and 4
> -  * 8, 9, and 10
> -
> -The following are the names of the regulators that the s2mpa01 PMIC block
> -supports. Note: The 'n' in LDOn and BUCKn represents the LDO or BUCK number
> -as per the datasheet of s2mpa01.
> -
> - - LDOn
> -   - valid values for n are 1 to 26
> -   - Example: LDO1, LD02, LDO26
> - - BUCKn
> -   - valid values for n are 1 to 10.
> -   - Example: BUCK1, BUCK2, BUCK9
> -
> -Example:
> -
> - s2mpa01_pmic@66 {
> - compatible = "samsung,s2mpa01-pmic";
> - reg = <0x66>;
> -
> - regulators {
> - ldo1_reg: LDO1 {
> - regulator-name = "VDD_ALIVE";
> - regulator-min-microvolt = <100>;
> - regulator-max-microvolt = <100>;
> - };
> -
> - ldo2_reg: LDO2 {
> - regulator-name = "VDDQ_MMC2";
> - regulator-min-microvolt = <280>;
> - regulator-max-microvolt = <280>;
> - regulator-always-on;
> - };
> -
> - buck1_reg: BUCK1 {
> - regulator-name = "vdd_mif";
> - regulator-min-microvolt = <95>;
> - regulator-max-microvolt = <135>;
> - regulator-always-on;
> - regulator-boot-on;
> - };
> -
> - buck2_reg: BUCK2 {
> - regulator-name = "vdd_arm";
> - regulator-min-microvolt = <95>;
> - regulator-max-microvolt = <135>;
> - regulator-always-on;
> - regulator-boot-on;
> - regulator-ramp-delay = <5>;
> - };
> - };
> - };
> diff --git 

Re: [PATCH 2/3] dt-bindings: regulator/mfd: Reorganize S5M8767 bindings

2015-12-07 Thread Lee Jones
On Fri, 04 Dec 2015, Krzysztof Kozlowski wrote:

> The regulator/s5m8767-regulator.txt duplicates some of the information
> about bindings with old mfd/s2mps11.txt. Now common part exists entirely
> in mfd/samsung,sec-core.txt so:
>  - add company prefix to file name (regulator/samsung,s5m8767.txt),
>  - remove duplicated information,
>  - reorganize the contents to match style of
>regulator/samsung,s2mps11.txt.
> 
> Signed-off-by: Krzysztof Kozlowski 
> ---
>  .../devicetree/bindings/mfd/samsung,sec-core.txt   |   4 +-

Acked-by: Lee Jones 

>  .../bindings/regulator/s5m8767-regulator.txt   | 163 
> -
>  .../bindings/regulator/samsung,s5m8767.txt | 145 ++
>  MAINTAINERS|   2 +-
>  4 files changed, 149 insertions(+), 165 deletions(-)
>  delete mode 100644 
> Documentation/devicetree/bindings/regulator/s5m8767-regulator.txt
>  create mode 100644 
> Documentation/devicetree/bindings/regulator/samsung,s5m8767.txt
> 
> diff --git a/Documentation/devicetree/bindings/mfd/samsung,sec-core.txt 
> b/Documentation/devicetree/bindings/mfd/samsung,sec-core.txt
> index ef0166d0f643..4aeb95c82304 100644
> --- a/Documentation/devicetree/bindings/mfd/samsung,sec-core.txt
> +++ b/Documentation/devicetree/bindings/mfd/samsung,sec-core.txt
> @@ -14,6 +14,7 @@ addressed by the host system using different I2C slave 
> addresses.
>  This document describes bindings for main device node. Optional sub-blocks
>  must be a sub-nodes to it. Bindings for them can be found in:
>   - bindings/regulator/samsung,s2mps11.txt
> + - bindings/regulator/samsung,s5m8767.txt
>   - bindings/clock/samsung,s2mps11.txt
>  
>  
> @@ -23,7 +24,8 @@ Required properties:
>   - "samsung,s2mps13-pmic",
>   - "samsung,s2mps14-pmic",
>   - "samsung,s2mps15-pmic",
> - - "samsung,s2mpu02-pmic".
> + - "samsung,s2mpu02-pmic",
> + - "samsung,s5m8767-pmic".
>   - reg: Specifies the I2C slave address of the pmic block. It should be 0x66.
>  
>  Optional properties:
> diff --git 
> a/Documentation/devicetree/bindings/regulator/s5m8767-regulator.txt 
> b/Documentation/devicetree/bindings/regulator/s5m8767-regulator.txt
> deleted file mode 100644
> index 20191315e444..
> --- a/Documentation/devicetree/bindings/regulator/s5m8767-regulator.txt
> +++ /dev/null
> @@ -1,163 +0,0 @@
> -* Samsung S5M8767 Voltage and Current Regulator
> -
> -The Samsung S5M8767 is a multi-function device which includes voltage and
> -current regulators, rtc, charger controller and other sub-blocks. It is
> -interfaced to the host controller using a i2c interface. Each sub-block is
> -addressed by the host system using different i2c slave address. This document
> -describes the bindings for 'pmic' sub-block of s5m8767.
> -
> -Required properties:
> -- compatible: Should be "samsung,s5m8767-pmic".
> -- reg: Specifies the i2c slave address of the pmic block. It should be 0x66.
> -
> -- s5m8767,pmic-buck2-dvs-voltage: A set of 8 voltage values in micro-volt 
> (uV)
> -  units for buck2 when changing voltage using gpio dvs. Refer to [1] below
> -  for additional information.
> -
> -- s5m8767,pmic-buck3-dvs-voltage: A set of 8 voltage values in micro-volt 
> (uV)
> -  units for buck3 when changing voltage using gpio dvs. Refer to [1] below
> -  for additional information.
> -
> -- s5m8767,pmic-buck4-dvs-voltage: A set of 8 voltage values in micro-volt 
> (uV)
> -  units for buck4 when changing voltage using gpio dvs. Refer to [1] below
> -  for additional information.
> -
> -- s5m8767,pmic-buck-ds-gpios: GPIO specifiers for three host gpio's used
> -  for selecting GPIO DVS lines. It is one-to-one mapped to dvs gpio lines.
> -
> -[1] If none of the 's5m8767,pmic-buck[2/3/4]-uses-gpio-dvs' optional
> -property is specified, the 's5m8767,pmic-buck[2/3/4]-dvs-voltage'
> -property should specify atleast one voltage level (which would be a
> -safe operating voltage).
> -
> -If either of the 's5m8767,pmic-buck[2/3/4]-uses-gpio-dvs' optional
> -property is specified, then all the eight voltage values for the
> -'s5m8767,pmic-buck[2/3/4]-dvs-voltage' should be specified.
> -
> -Optional properties:
> -- interrupt-parent: Specifies the phandle of the interrupt controller to 
> which
> -  the interrupts from s5m8767 are delivered to.
> -- interrupts: Interrupt specifiers for two interrupt sources.
> -  - First interrupt specifier is for 'irq1' interrupt.
> -  - Second interrupt specifier is for 'alert' interrupt.
> -- s5m8767,pmic-buck2-uses-gpio-dvs: 'buck2' can be controlled by gpio dvs.
> -- s5m8767,pmic-buck3-uses-gpio-dvs: 'buck3' can be controlled by gpio dvs.
> -- s5m8767,pmic-buck4-uses-gpio-dvs: 'buck4' can be controlled by gpio dvs.
> -
> -Additional properties required if either of the optional properties are used:
> -
> -- s5m8767,pmic-buck234-default-dvs-idx: Default voltage setting selected from

Re: [PATCH] ARM: multi_v7_defconfig: Enable fan, sensors and audio for Odroid XU3

2015-12-07 Thread Arnd Bergmann
On Monday 07 December 2015 18:38:44 Krzysztof Kozlowski wrote:
> On 07.12.2015 18:14, Arnd Bergmann wrote:
> > On Monday 07 December 2015 09:59:54 Krzysztof Kozlowski wrote:
> >> For Odroid XU3-family enable the:
> >>  - PWM fan (to control the CPU fan using thermal subsystem),
> >>  - TI INA231 sensors (provide power measurements of big.LITTLE cores,
> >>DRAM and GPU),
> >>  - Samsung sound (for Odroid XU3 and Snow as well).
> >>
> >> Signed-off-by: Krzysztof Kozlowski 
> >>
> > 
> > Looks good. Do you have a samsung/defconfig branch already that you
> > can put this into, or should be pick it up into arm-soc directly?
> > 
> > My preference is the former, but it would be a bit silly if that
> > is the only samsung defconfig change we need.
> 
> I had a couple of defconfig patches in my queue but I sent them last
> week to Kukjin in pull request. He didn't pull it yet. Maybe he could
> apply this patch after pulling?
> 
> Anyway we can wait for a few days to sort it out. If I don't have
> another defconfig patches then I will remind myself with applying it to
> arm-soc.
> 

Ok, sounds good.

Arnd
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Re: [PATCH v2 1/2] drm/exynos: dp: add of_graph dt binding support for panel

2015-12-07 Thread Javier Martinez Canillas
[adding Krzysztof and Kukjin to cc list]

Hello Inki,

On 12/06/2015 01:25 PM, Inki Dae wrote:
> Hi Javier,
> 
> 2015-12-03 22:05 GMT+09:00 Javier Martinez Canillas :
>>
>> Hello Inki,
>>
>> On 12/02/2015 11:11 PM, Inki Dae wrote:
>>> Hi Javier,
>>>
>>> 2015년 12월 03일 00:04에 Javier Martinez Canillas 이(가) 쓴 글:
 Hello Inki,

 On 12/02/2015 08:57 AM, Inki Dae wrote:
> This patch adds of_graph dt binding support for panel device
> and also keeps the backward compatibility.
>

 You have to also update the DT binding doc which seems to be
 outdated already:

 Documentation/devicetree/bindings/display/exynos/exynos_dp.txt
>>>
>>> Right. It should be updated.
>>>
>>
>> Great, I see you already posted that.
>>

> i.e.,
> The dts file for Exynos5800 based peach pi board
> has a panel property so we need to keep the backward compatibility.
>

 How did you test this patch?
>>>
>>> I thought you will test it and give me tested-by because you commented like 
>>> below,
>>> " Assuming you can make a distinction if the endpoint is a panel or a 
>>> bridge,
>>> then yes, I agree with the idea of the patch. Please feel free to cc me if
>>> you post such a patch and I'll gladly test it on my Exynos5800 Peach Pi."
>>>
>>> That is why I cced you. I really have no any Exynos5800 Peach Pi board.
>>>
>>
>> Yes, but if you didn't test a patch, then it should be marked with a RFT
>> prefix in the subject line or at least mention that needs testing since
>> you lack the HW to test. I've no way to know if you have another board
>> with a similar design :)
>>
>> But what I meant is how the patch is supposed to be tested since there
>> ins't a change in the Exynos5800 Peach Pi DTS? We can of course test
>> that doesn't break backward compatibility but we don't have a way to
>> test the actual change.
>>
>> So I tested with the patch following patch [0] and things are working
>> correctly. Please include that patch in your series.
> 
> Will pick it up. And  I commented on below your patch.
>

Ok, you need an ack from Krzysztof / Kukjin before picking the patch
though and cc them if you are planning to repost the whole series.

Another option is to wait until your Exynos DRM patches hit mainline
and then the DTS change can be posted separately.
 
>>
>> I've some comments on your patch though but I'll comment on your lastest
>> version.
>>
>>> Thanks,
>>> Inki Dae
>>>

 Best regards,

>>
>> Best regards,
>> --
>> Javier Martinez Canillas
>> Open Source Group
>> Samsung Research America
>>
>> [0]:
>> From 644bab7949ac17a8d42ca0cf36cd55d61bc88928 Mon Sep 17 00:00:00 2001
>> From: Javier Martinez Canillas 
>> Date: Thu, 3 Dec 2015 09:32:17 -0300
>> Subject: [PATCH 1/1] ARM: dts: Use OF graph for DP to panel connection in
>>  exynos5800-peach-pi
>>
>> The DT binding for the Exynos DRM Display Port (DP) driver isn't consistent
>> since it uses a phandle to describe the connection between the DP port and
>> the display panel but uses the OF graph ports and endpoints to describe the
>> connection betwen the DP port, a bridge chip and the panel.
>>
>> The Exynos DP driver and the DT binding have been changed to allow also to
>> describe the DP port to panel connection using ports / endpoints (OF graph)
>> so this patch changes the Exynos5800 Peach Pi DT to make it consistent with
>> the Exynos5420 Peach Pit that has a eDP to LVDS chip and uses OF graph too.
>>
>> Signed-off-by: Javier Martinez Canillas 
>> ---
>>  arch/arm/boot/dts/exynos5800-peach-pi.dts | 15 ++-
>>  1 file changed, 14 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts 
>> b/arch/arm/boot/dts/exynos5800-peach-pi.dts
>> index 7b018e451880..9c6fd7314ee0 100644
>> --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
>> +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
>> @@ -122,6 +122,12 @@
>> compatible = "auo,b133htn01";
>> power-supply = <_fet6>;
>> backlight = <>;
>> +
>> +   port {
>> +   panel_in: endpoint {
>> +   remote-endpoint = <_out>;
>> +   };
>> +   };
>> };
>>
>> mmc1_pwrseq: mmc1_pwrseq {
>> @@ -148,7 +154,14 @@
>> samsung,link-rate = <0x0a>;
>> samsung,lane-count = <2>;
>> samsung,hpd-gpio = < 6 GPIO_ACTIVE_HIGH>;
>> -   panel = <>;
>> +
>> +   ports {
>> +   port@0 {
> 
> As Rob commented before, I will pick it up removing @0 if you are ok.
>

Ok, it is true that there isn't an #address-cells, #size-cells and reg
properties since there is a single port so I guess the @0 is arbitrary
here so it doesn't represent a proper unit-address and can be removed.
 
> Thanks,
> Inki Dae
> 
>> +   dp_out: endpoint {
>> +   

Re: [PATCH] ARM: multi_v7_defconfig: Enable fan, sensors and audio for Odroid XU3

2015-12-07 Thread Javier Martinez Canillas
Hello Krzysztof,

On 12/06/2015 09:59 PM, Krzysztof Kozlowski wrote:
> For Odroid XU3-family enable the:
>  - PWM fan (to control the CPU fan using thermal subsystem),
>  - TI INA231 sensors (provide power measurements of big.LITTLE cores,
>DRAM and GPU),
>  - Samsung sound (for Odroid XU3 and Snow as well).
> 
> Signed-off-by: Krzysztof Kozlowski 
> ---
>  arch/arm/configs/multi_v7_defconfig | 8 ++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/configs/multi_v7_defconfig 
> b/arch/arm/configs/multi_v7_defconfig
> index f6a2557b55df..419f9413402c 100644
> --- a/arch/arm/configs/multi_v7_defconfig
> +++ b/arch/arm/configs/multi_v7_defconfig

Reviewed-by: Javier Martinez Canillas 

Best regards,
-- 
Javier Martinez Canillas
Open Source Group
Samsung Research America
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[PATCH 6/7] media: s5p-mfc: replace custom reserved memory init code with generic one

2015-12-07 Thread Marek Szyprowski
This patch removes custom code for initialization and handling of
reserved memory regions in s5p-mfc driver and replaces it with generic
named reserved memory regions specified in device tree.

s5p-mfc driver now handles two reserved memory regions: "left" and
"right", defined by generic reserved memory bindings. Support for non-dt
platform has been removed, because all supported platforms have been
converted to device tree.

Signed-off-by: Marek Szyprowski 
---
 drivers/media/platform/s5p-mfc/s5p_mfc.c | 129 +++
 1 file changed, 62 insertions(+), 67 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 8fcecf8a9a17..55c557f835f2 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -22,6 +22,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include "s5p_mfc_common.h"
 #include "s5p_mfc_ctrl.h"
@@ -1043,55 +1044,67 @@ static const struct v4l2_file_operations s5p_mfc_fops = 
{
.mmap = s5p_mfc_mmap,
 };
 
-static int match_child(struct device *dev, void *data)
+/* DMA memory related helper functions */
+static void s5p_mfc_memdev_release(struct device *dev)
 {
-   if (!dev_name(dev))
-   return 0;
-   return !strcmp(dev_name(dev), (char *)data);
+   of_reserved_mem_device_release(dev);
 }
 
-static void *mfc_get_drv_data(struct platform_device *pdev);
-
-static int s5p_mfc_alloc_memdevs(struct s5p_mfc_dev *dev)
+static struct device *s5p_mfc_alloc_memdev(struct device *dev, const char 
*name)
 {
-   unsigned int mem_info[2] = { };
+   struct device *child;
+   int ret;
 
-   dev->mem_dev_l = devm_kzalloc(>plat_dev->dev,
-   sizeof(struct device), GFP_KERNEL);
-   if (!dev->mem_dev_l) {
-   mfc_err("Not enough memory\n");
-   return -ENOMEM;
-   }
-   device_initialize(dev->mem_dev_l);
-   of_property_read_u32_array(dev->plat_dev->dev.of_node,
-   "samsung,mfc-l", mem_info, 2);
-   if (dma_declare_coherent_memory(dev->mem_dev_l, mem_info[0],
-   mem_info[0], mem_info[1],
-   DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE) == 0) {
-   mfc_err("Failed to declare coherent memory for\n"
-   "MFC device\n");
-   return -ENOMEM;
+   child = devm_kzalloc(dev, sizeof(struct device), GFP_KERNEL);
+   if (!child)
+   return NULL;
+
+   device_initialize(child);
+   dev_set_name(child, "%s:%s", dev_name(dev), name);
+   child->parent = dev;
+   child->bus = dev->bus;
+   child->coherent_dma_mask = dev->coherent_dma_mask;
+   child->dma_mask = dev->dma_mask;
+   child->release = s5p_mfc_memdev_release;
+
+   if (device_add(child) == 0) {
+   ret = of_reserved_mem_device_init(child, dev->of_node, name);
+   if (ret == 0)
+   return child;
}
 
-   dev->mem_dev_r = devm_kzalloc(>plat_dev->dev,
-   sizeof(struct device), GFP_KERNEL);
-   if (!dev->mem_dev_r) {
-   mfc_err("Not enough memory\n");
-   return -ENOMEM;
-   }
-   device_initialize(dev->mem_dev_r);
-   of_property_read_u32_array(dev->plat_dev->dev.of_node,
-   "samsung,mfc-r", mem_info, 2);
-   if (dma_declare_coherent_memory(dev->mem_dev_r, mem_info[0],
-   mem_info[0], mem_info[1],
-   DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE) == 0) {
-   pr_err("Failed to declare coherent memory for\n"
-   "MFC device\n");
-   return -ENOMEM;
+   put_device(child);
+   return NULL;
+}
+
+static int s5p_mfc_configure_dma_memory(struct s5p_mfc_dev *mfc_dev)
+{
+   struct device *dev = _dev->plat_dev->dev;
+
+   /*
+* Create and initialize virtual devices for accessing
+* reserved memory regions.
+*/
+   mfc_dev->mem_dev_l = s5p_mfc_alloc_memdev(dev, "left");
+   if (!mfc_dev->mem_dev_l)
+   return -ENODEV;
+   mfc_dev->mem_dev_r = s5p_mfc_alloc_memdev(dev, "right");
+   if (!mfc_dev->mem_dev_r) {
+   device_unregister(mfc_dev->mem_dev_l);
+   return -ENODEV;
}
+
return 0;
 }
 
+static void s5p_mfc_unconfigure_dma_memory(struct s5p_mfc_dev *mfc_dev)
+{
+   device_unregister(mfc_dev->mem_dev_l);
+   device_unregister(mfc_dev->mem_dev_r);
+}
+
+static void *mfc_get_drv_data(struct platform_device *pdev);
+
 /* MFC probe function */
 static int s5p_mfc_probe(struct platform_device *pdev)
 {
@@ -1117,12 +1130,6 @@ static int s5p_mfc_probe(struct platform_device *pdev)
 
dev->variant = mfc_get_drv_data(pdev);
 
-   ret = s5p_mfc_init_pm(dev);
-   if (ret < 0) {
-   dev_err(>dev, 

[PATCH 4/7] media: vb2-dma-contig: add helper for setting dma max seg size

2015-12-07 Thread Marek Szyprowski
Add a helper function for device drivers to set DMA's max_seg_size.
Setting it to largest possible value lets DMA-mapping API always create
contiguous mappings in DMA address space. This is essential for all
devices, which use dma-contig videobuf2 memory allocator and shared
buffers.

Signed-off-by: Marek Szyprowski 
---
Changelog:
v3:
- make this code a helper function instead of chaning max_seg_size
  unconditionally on vb2_dma_contig_init_ctx

v2:
- set max segment size only if a new dma params structure has been
  allocated, as suggested by Laurent Pinchart
---
 drivers/media/v4l2-core/videobuf2-dma-contig.c | 15 +++
 include/media/videobuf2-dma-contig.h   |  1 +
 2 files changed, 16 insertions(+)

diff --git a/drivers/media/v4l2-core/videobuf2-dma-contig.c 
b/drivers/media/v4l2-core/videobuf2-dma-contig.c
index c33127284cfe..628518dc3aad 100644
--- a/drivers/media/v4l2-core/videobuf2-dma-contig.c
+++ b/drivers/media/v4l2-core/videobuf2-dma-contig.c
@@ -742,6 +742,21 @@ void vb2_dma_contig_cleanup_ctx(void *alloc_ctx)
 }
 EXPORT_SYMBOL_GPL(vb2_dma_contig_cleanup_ctx);
 
+int vb2_dma_contig_set_max_seg_size(struct device *dev, unsigned int size)
+{
+   if (!dev->dma_parms) {
+   dev->dma_parms = devm_kzalloc(dev, sizeof(dev->dma_parms),
+ GFP_KERNEL);
+   if (!dev->dma_parms)
+   return -ENOMEM;
+   }
+   if (dma_get_max_seg_size(dev) < size)
+   return dma_set_max_seg_size(dev, size);
+
+   return 0;
+}
+EXPORT_SYMBOL_GPL(vb2_dma_contig_set_max_seg_size);
+
 MODULE_DESCRIPTION("DMA-contig memory handling routines for videobuf2");
 MODULE_AUTHOR("Pawel Osciak ");
 MODULE_LICENSE("GPL");
diff --git a/include/media/videobuf2-dma-contig.h 
b/include/media/videobuf2-dma-contig.h
index c33dfa69d7ab..0e6ba644939e 100644
--- a/include/media/videobuf2-dma-contig.h
+++ b/include/media/videobuf2-dma-contig.h
@@ -26,6 +26,7 @@ vb2_dma_contig_plane_dma_addr(struct vb2_buffer *vb, unsigned 
int plane_no)
 
 void *vb2_dma_contig_init_ctx(struct device *dev);
 void vb2_dma_contig_cleanup_ctx(void *alloc_ctx);
+int vb2_dma_contig_set_max_seg_size(struct device *dev, unsigned int size);
 
 extern const struct vb2_mem_ops vb2_dma_contig_memops;
 
-- 
1.9.2

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[PATCH 1/7] ARM: Exynos: convert MFC device to generic reserved memory bindings

2015-12-07 Thread Marek Szyprowski
This patch replaces custom properties for definining reserved memory
regions with generic reserved memory bindings. All custom code for
handling MFC-specific reserved memory can be now removed from Exynos-DT
generic board code.

Signed-off-by: Marek Szyprowski 
---
 .../devicetree/bindings/media/s5p-mfc.txt  | 16 ++--
 arch/arm/boot/dts/exynos4210-origen.dts| 22 -
 arch/arm/boot/dts/exynos4210-smdkv310.dts  | 22 -
 arch/arm/boot/dts/exynos4412-origen.dts| 22 -
 arch/arm/boot/dts/exynos4412-smdk4412.dts  | 22 -
 arch/arm/boot/dts/exynos5250-arndale.dts   | 22 -
 arch/arm/boot/dts/exynos5250-smdk5250.dts  | 22 -
 arch/arm/boot/dts/exynos5250-spring.dts| 22 -
 arch/arm/boot/dts/exynos5420-arndale-octa.dts  | 22 -
 arch/arm/boot/dts/exynos5420-smdk5420.dts  | 22 -
 arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 22 -
 arch/arm/mach-exynos/Makefile  |  2 -
 arch/arm/mach-exynos/exynos.c  | 19 -
 arch/arm/mach-exynos/mfc.h | 16 
 arch/arm/mach-exynos/s5p-dev-mfc.c | 94 --
 15 files changed, 208 insertions(+), 159 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/mfc.h
 delete mode 100644 arch/arm/mach-exynos/s5p-dev-mfc.c

diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt 
b/Documentation/devicetree/bindings/media/s5p-mfc.txt
index 2d5787eac91a..4603673c593b 100644
--- a/Documentation/devicetree/bindings/media/s5p-mfc.txt
+++ b/Documentation/devicetree/bindings/media/s5p-mfc.txt
@@ -21,16 +21,16 @@ Required properties:
   - clock-names : from common clock binding: must contain "mfc",
  corresponding to entry in the clocks property.
 
-  - samsung,mfc-r : Base address of the first memory bank used by MFC
-   for DMA contiguous memory allocation and its size.
-
-  - samsung,mfc-l : Base address of the second memory bank used by MFC
-   for DMA contiguous memory allocation and its size.
-
 Optional properties:
   - power-domains : power-domain property defined with a phandle
   to respective power domain.
 
+  - memory-region : from reserved memory binding: phandles to two reserved
+   memory regions: accessed by "left" and "right" mfc memory bus
+   interfaces, used when no SYSMMU support is available
+  - memory-region-names : from reserved memory binding: must be "left"
+   and "right"
+
 Example:
 SoC specific DT entry:
 
@@ -46,6 +46,6 @@ mfc: codec@1340 {
 Board specific DT entry:
 
 codec@1340 {
-   samsung,mfc-r = <0x4300 0x80>;
-   samsung,mfc-l = <0x5100 0x80>;
+   memory-region = <_left>, <_right>;
+   memory-region-names = "left", "right";
 };
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts 
b/arch/arm/boot/dts/exynos4210-origen.dts
index 5821ad87e32c..4b7637dfa392 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -30,6 +30,24 @@
   0x7000 0x1000>;
};
 
+   reserved-memory {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   mfc_left: region@5100 {
+   compatible = "shared-dma-pool";
+   no-map;
+   reg = <0x5100 0x80>;
+   };
+
+   mfc_right: region@4300 {
+   compatible = "shared-dma-pool";
+   no-map;
+   reg = <0x4300 0x80>;
+   };
+   };
+
chosen {
bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x4100,8M 
console=ttySAC2,115200 init=/linuxrc";
stdout-path = _2;
@@ -288,8 +306,8 @@
 };
 
  {
-   samsung,mfc-r = <0x4300 0x80>;
-   samsung,mfc-l = <0x5100 0x80>;
+   memory-region = <_left>, <_right>;
+   memory-region-names = "left", "right";
status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts 
b/arch/arm/boot/dts/exynos4210-smdkv310.dts
index 104cbb33d2bb..efafc5721817 100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -26,6 +26,24 @@
reg = <0x4000 0x8000>;
};
 
+   reserved-memory {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   mfc_left: region@5100 {
+   compatible = "shared-dma-pool";
+   no-map;
+   reg = <0x5100 0x80>;
+   };
+
+   mfc_right: region@4300 {
+   compatible = "shared-dma-pool";
+   no-map;
+   reg = <0x4300 

[PATCH 3/7] of: reserved_mem: add support for named reserved mem nodes

2015-12-07 Thread Marek Szyprowski
This patch allows device drivers to use more than one reserved memory
region assigned to given device. When NULL name is passed to
of_reserved_mem_device_init(), the default (first) region is used.

Signed-off-by: Marek Szyprowski 
---
 drivers/of/of_reserved_mem.c| 101 +++-
 include/linux/of_reserved_mem.h |   6 ++-
 2 files changed, 84 insertions(+), 23 deletions(-)

diff --git a/drivers/of/of_reserved_mem.c b/drivers/of/of_reserved_mem.c
index 1a3556a9e9ea..0a0b23b73004 100644
--- a/drivers/of/of_reserved_mem.c
+++ b/drivers/of/of_reserved_mem.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #define MAX_RESERVED_REGIONS   16
 static struct reserved_mem reserved_mem[MAX_RESERVED_REGIONS];
@@ -287,31 +288,84 @@ static inline struct reserved_mem *__find_rmem(struct 
device_node *node)
return NULL;
 }
 
+static struct reserved_mem *__node_to_rmem(struct device_node *node,
+  const char *name)
+{
+   struct reserved_mem *rmem;
+   struct device_node *target;
+   int idx = 0;
+
+   if (!node)
+   return NULL;
+
+   if (name) {
+   idx = of_property_match_string(node,
+  "memory-region-names", name);
+   if (idx < 0)
+   return NULL;
+   }
+
+   target = of_parse_phandle(node, "memory-region", idx);
+   if (!target)
+   return NULL;
+   rmem = __find_rmem(target);
+   of_node_put(target);
+
+   return rmem;
+}
+
+struct rmem_assigned_device {
+   struct device *dev;
+   struct reserved_mem *rmem;
+   struct list_head list;
+};
+
+static LIST_HEAD(of_rmem_assigned_device_list);
+static DEFINE_MUTEX(of_rmem_assigned_device_mutex);
+
 /**
  * of_reserved_mem_device_init() - assign reserved memory region to given 
device
+ * @dev:   Pointer to the device to configure
+ * @np:Pointer to the device_node with 'reserved-memory' 
property
+ * @name:  Optional name of the selected region (can be NULL)
+ *
+ * This function assigns respective DMA-mapping operations based on reserved
+ * memory regionspecified by 'memory-region' property in @np node, named @name
+ * to the @dev device. When NULL name is provided, the default (first) memory
+ * region is used. When driver needs to use more than one reserved memory
+ * region, it should allocate child devices and initialize regions by name for
+ * each of child device.
  *
- * This function assign memory region pointed by "memory-region" device tree
- * property to the given device.
+ * Returns error code or zero on success.
  */
-int of_reserved_mem_device_init(struct device *dev)
+int of_reserved_mem_device_init(struct device *dev, struct device_node *np,
+   const char *name)
 {
+   struct rmem_assigned_device *rd;
struct reserved_mem *rmem;
-   struct device_node *np;
int ret;
 
-   np = of_parse_phandle(dev->of_node, "memory-region", 0);
-   if (!np)
-   return -ENODEV;
-
-   rmem = __find_rmem(np);
-   of_node_put(np);
-
+   rmem = __node_to_rmem(np, name);
if (!rmem || !rmem->ops || !rmem->ops->device_init)
return -EINVAL;
 
+   rd = kmalloc(sizeof(struct rmem_assigned_device), GFP_KERNEL);
+   if (!rd)
+   return -ENOMEM;
+
ret = rmem->ops->device_init(rmem, dev);
-   if (ret == 0)
+   if (ret == 0) {
+   rd->dev = dev;
+   rd->rmem = rmem;
+
+   mutex_lock(_rmem_assigned_device_mutex);
+   list_add(>list, _rmem_assigned_device_list);
+   mutex_unlock(_rmem_assigned_device_mutex);
+
dev_info(dev, "assigned reserved memory node %s\n", rmem->name);
+   } else {
+   kfree(rd);
+   }
 
return ret;
 }
@@ -319,21 +373,26 @@ EXPORT_SYMBOL_GPL(of_reserved_mem_device_init);
 
 /**
  * of_reserved_mem_device_release() - release reserved memory device structures
+ * @dev:   Pointer to the device to deconfigure
  *
  * This function releases structures allocated for memory region handling for
  * the given device.
  */
 void of_reserved_mem_device_release(struct device *dev)
 {
-   struct reserved_mem *rmem;
-   struct device_node *np;
-
-   np = of_parse_phandle(dev->of_node, "memory-region", 0);
-   if (!np)
-   return;
-
-   rmem = __find_rmem(np);
-   of_node_put(np);
+   struct rmem_assigned_device *rd;
+   struct reserved_mem *rmem = NULL;
+
+   mutex_lock(_rmem_assigned_device_mutex);
+   list_for_each_entry(rd, _rmem_assigned_device_list, list) {
+   if (rd->dev == dev) {
+   rmem = rd->rmem;
+   list_del(>list);
+   kfree(rd);
+   break;
+   }
+  

[PATCH 7/7] media: s5p-mfc: add iommu support

2015-12-07 Thread Marek Szyprowski
This patch adds support for IOMMU to s5p-mfc device driver. MFC firmware
is limited and it cannot use the default configuration. If IOMMU is
available, the patch disables the default DMA address space
configuration and creates a new address space of size limited to 256M
and base address set to 0x2000.

For now the same address space is shared by both 'left' and 'right'
memory channels, because the DMA/IOMMU frameworks do not support
configuring them separately. This is not optimal, but besides limiting
total address space available has no other drawbacks (MFC firmware
supports 256M of address space per each channel).

Signed-off-by: Marek Szyprowski 
---
 drivers/media/platform/s5p-mfc/s5p_mfc.c   | 24 
 drivers/media/platform/s5p-mfc/s5p_mfc_iommu.h | 79 ++
 2 files changed, 103 insertions(+)
 create mode 100644 drivers/media/platform/s5p-mfc/s5p_mfc_iommu.h

diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 55c557f835f2..dfbaadd22a3d 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -30,6 +30,7 @@
 #include "s5p_mfc_dec.h"
 #include "s5p_mfc_enc.h"
 #include "s5p_mfc_intr.h"
+#include "s5p_mfc_iommu.h"
 #include "s5p_mfc_opr.h"
 #include "s5p_mfc_cmd.h"
 #include "s5p_mfc_pm.h"
@@ -1082,6 +1083,22 @@ static int s5p_mfc_configure_dma_memory(struct 
s5p_mfc_dev *mfc_dev)
struct device *dev = _dev->plat_dev->dev;
 
/*
+* When IOMMU is available, we cannot use the default configuration,
+* because of MFC firmware requirements: address space limited to
+* 256M and non-zero default start address.
+* This is still simplified, not optimal configuration, but for now
+* IOMMU core doesn't allow to configure device's IOMMUs channel
+* separately.
+*/
+   if (exynos_is_iommu_available(dev)) {
+   int ret = exynos_configure_iommu(dev, S5P_MFC_IOMMU_DMA_BASE,
+S5P_MFC_IOMMU_DMA_SIZE);
+   if (ret == 0)
+   mfc_dev->mem_dev_l = mfc_dev->mem_dev_r = dev;
+   return ret;
+   }
+
+   /*
 * Create and initialize virtual devices for accessing
 * reserved memory regions.
 */
@@ -1099,6 +1116,13 @@ static int s5p_mfc_configure_dma_memory(struct 
s5p_mfc_dev *mfc_dev)
 
 static void s5p_mfc_unconfigure_dma_memory(struct s5p_mfc_dev *mfc_dev)
 {
+   struct device *dev = _dev->plat_dev->dev;
+
+   if (exynos_is_iommu_available(dev)) {
+   exynos_unconfigure_iommu(dev);
+   return;
+   }
+
device_unregister(mfc_dev->mem_dev_l);
device_unregister(mfc_dev->mem_dev_r);
 }
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_iommu.h 
b/drivers/media/platform/s5p-mfc/s5p_mfc_iommu.h
new file mode 100644
index ..5d1d1c2922e8
--- /dev/null
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_iommu.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (C) 2015 Samsung Electronics Co.Ltd
+ * Authors: Marek Szyprowski 
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef S5P_MFC_IOMMU_H_
+#define S5P_MFC_IOMMU_H_
+
+#define S5P_MFC_IOMMU_DMA_BASE 0x2000lu
+#define S5P_MFC_IOMMU_DMA_SIZE SZ_256M
+
+#ifdef CONFIG_EXYNOS_IOMMU
+
+#include 
+
+static inline bool exynos_is_iommu_available(struct device *dev)
+{
+   return dev->archdata.iommu != NULL;
+}
+
+static inline void exynos_unconfigure_iommu(struct device *dev)
+{
+   struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
+
+   arm_iommu_detach_device(dev);
+   arm_iommu_release_mapping(mapping);
+}
+
+static inline int exynos_configure_iommu(struct device *dev,
+unsigned int base, unsigned int size)
+{
+   struct dma_iommu_mapping *mapping = NULL;
+   int ret;
+
+   /* Disable the default mapping created by device core */
+   if (to_dma_iommu_mapping(dev))
+   exynos_unconfigure_iommu(dev);
+
+   mapping = arm_iommu_create_mapping(dev->bus, base, size);
+   if (IS_ERR(mapping)) {
+   pr_warn("Failed to create IOMMU mapping for device %s\n",
+   dev_name(dev));
+   return PTR_ERR(mapping);
+   }
+
+   ret = arm_iommu_attach_device(dev, mapping);
+   if (ret) {
+   pr_warn("Failed to attached device %s to IOMMU_mapping\n",
+   dev_name(dev));
+   arm_iommu_release_mapping(mapping);
+   return ret;
+   }
+
+   return 0;
+}
+
+#else
+
+static inline bool exynos_is_iommu_available(struct device 

[PATCH 2/7] ARM: dts: exynos4412-odroid*: enable MFC device

2015-12-07 Thread Marek Szyprowski
Enable support for Multimedia Codec (MFC) device for all Exynos4412-based
Odroid boards.

Signed-off-by: Marek Szyprowski 
---
 arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 24 
 1 file changed, 24 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi 
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index 395c3ca9601e..90b952e29ebf 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -18,6 +18,24 @@
stdout-path = _1;
};
 
+   reserved-memory {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   mfc_left: region@7700 {
+   compatible = "shared-dma-pool";
+   reusable;
+   reg = <0x7700 0x100>;
+   };
+
+   mfc_right: region@7800 {
+   compatible = "shared-dma-pool";
+   reusable;
+   reg = <0x7800 0x100>;
+   };
+   };
+
firmware@0204F000 {
compatible = "samsung,secure-firmware";
reg = <0x0204F000 0x1000>;
@@ -447,6 +465,12 @@
clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
 };
 
+ {
+   memory-region = <_left>, <_right>;
+   memory-region-names = "left", "right";
+   status = "okay";
+};
+
  {
status = "okay";
 };
-- 
1.9.2

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[PATCH 0/7] Exynos: MFC driver: reserved memory cleanup and IOMMU support

2015-12-07 Thread Marek Szyprowski
Hello,

This patchset finally perform cleanup of custom code in s5p-mfc codec
driver. The first part is removal of custom, driver specific code for
intializing and handling of reserved memory. Instead, a generic code for
reserved memory regions is used. Then, once it is done, the proper setup
of DMA parameters (max segment size) is applied for all multimedia
devices found on Exynos SoCs to let them properly handle shared buffers
mapped into contiguous DMA address space. The last patch adds support
for IOMMU to MFC driver. Some additional code is needed because of
specific requirements of MFC device firmware (see patch 7 for more
details). When no IOMMU is available, the code fallbacks to generic
reserved memory regions.

After applying this patchset, MFC device works correctly when IOMMU is
either enabled or disabled.

Patches have been tested on top of linux-next from 20151207. I would
prefer to merge patches 1-2 via Samsung tree and patches 3-7 via media
tree (there are no compile-time dependencies between patches 1-2 and
3-7). Patches have been tested on Odroid U3 (Exynos 4412 based) and
Odroid XU3 (Exynos 5422 based) boards.

Best regards
Marek Szyprowski
Samsung R Institute Poland


Patch summary:

Marek Szyprowski (7):
  ARM: Exynos: convert MFC device to generic reserved memory bindings
  ARM: dts: exynos4412-odroid*: enable MFC device
  of: reserved_mem: add support for named reserved mem nodes
  media: vb2-dma-contig: add helper for setting dma max seg size
  media: set proper max seg size for devices on Exynos SoCs
  media: s5p-mfc: replace custom reserved memory init code with generic
one
  media: s5p-mfc: add iommu support

 .../devicetree/bindings/media/s5p-mfc.txt  |  16 +--
 arch/arm/boot/dts/exynos4210-origen.dts|  22 ++-
 arch/arm/boot/dts/exynos4210-smdkv310.dts  |  22 ++-
 arch/arm/boot/dts/exynos4412-odroid-common.dtsi|  24 
 arch/arm/boot/dts/exynos4412-origen.dts|  22 ++-
 arch/arm/boot/dts/exynos4412-smdk4412.dts  |  22 ++-
 arch/arm/boot/dts/exynos5250-arndale.dts   |  22 ++-
 arch/arm/boot/dts/exynos5250-smdk5250.dts  |  22 ++-
 arch/arm/boot/dts/exynos5250-spring.dts|  22 ++-
 arch/arm/boot/dts/exynos5420-arndale-octa.dts  |  22 ++-
 arch/arm/boot/dts/exynos5420-smdk5420.dts  |  22 ++-
 arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi |  22 ++-
 arch/arm/mach-exynos/Makefile  |   2 -
 arch/arm/mach-exynos/exynos.c  |  19 ---
 arch/arm/mach-exynos/mfc.h |  16 ---
 arch/arm/mach-exynos/s5p-dev-mfc.c |  94 -
 drivers/media/platform/exynos-gsc/gsc-core.c   |   1 +
 drivers/media/platform/exynos4-is/fimc-core.c  |   1 +
 drivers/media/platform/exynos4-is/fimc-is.c|   1 +
 drivers/media/platform/exynos4-is/fimc-lite.c  |   1 +
 drivers/media/platform/s5p-g2d/g2d.c   |   1 +
 drivers/media/platform/s5p-jpeg/jpeg-core.c|   1 +
 drivers/media/platform/s5p-mfc/s5p_mfc.c   | 153 -
 drivers/media/platform/s5p-mfc/s5p_mfc_iommu.h |  79 +++
 drivers/media/platform/s5p-tv/mixer_video.c|   1 +
 drivers/media/v4l2-core/videobuf2-dma-contig.c |  15 ++
 drivers/of/of_reserved_mem.c   | 101 +++---
 include/linux/of_reserved_mem.h|   6 +-
 include/media/videobuf2-dma-contig.h   |   1 +
 29 files changed, 505 insertions(+), 248 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/mfc.h
 delete mode 100644 arch/arm/mach-exynos/s5p-dev-mfc.c
 create mode 100644 drivers/media/platform/s5p-mfc/s5p_mfc_iommu.h

-- 
1.9.2

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[PATCH 5/7] media: set proper max seg size for devices on Exynos SoCs

2015-12-07 Thread Marek Szyprowski
All multimedia devices found on Exynos SoCs support only contiguous
buffers, so set DMA max segment size to DMA_BIT_MASK(32) to let memory
allocator to correctly create contiguous memory mappings.

Signed-off-by: Marek Szyprowski 
---
 drivers/media/platform/exynos-gsc/gsc-core.c  | 1 +
 drivers/media/platform/exynos4-is/fimc-core.c | 1 +
 drivers/media/platform/exynos4-is/fimc-is.c   | 1 +
 drivers/media/platform/exynos4-is/fimc-lite.c | 1 +
 drivers/media/platform/s5p-g2d/g2d.c  | 1 +
 drivers/media/platform/s5p-jpeg/jpeg-core.c   | 1 +
 drivers/media/platform/s5p-mfc/s5p_mfc.c  | 2 ++
 drivers/media/platform/s5p-tv/mixer_video.c   | 1 +
 8 files changed, 9 insertions(+)

diff --git a/drivers/media/platform/exynos-gsc/gsc-core.c 
b/drivers/media/platform/exynos-gsc/gsc-core.c
index 9b9e423e4fc4..4f90be43b5a9 100644
--- a/drivers/media/platform/exynos-gsc/gsc-core.c
+++ b/drivers/media/platform/exynos-gsc/gsc-core.c
@@ -1140,6 +1140,7 @@ static int gsc_probe(struct platform_device *pdev)
goto err_m2m;
 
/* Initialize continious memory allocator */
+   vb2_dma_contig_set_max_seg_size(dev, DMA_BIT_MASK(32));
gsc->alloc_ctx = vb2_dma_contig_init_ctx(dev);
if (IS_ERR(gsc->alloc_ctx)) {
ret = PTR_ERR(gsc->alloc_ctx);
diff --git a/drivers/media/platform/exynos4-is/fimc-core.c 
b/drivers/media/platform/exynos4-is/fimc-core.c
index cef2a7f07cdb..368e19b50498 100644
--- a/drivers/media/platform/exynos4-is/fimc-core.c
+++ b/drivers/media/platform/exynos4-is/fimc-core.c
@@ -1019,6 +1019,7 @@ static int fimc_probe(struct platform_device *pdev)
}
 
/* Initialize contiguous memory allocator */
+   vb2_dma_contig_set_max_seg_size(dev, DMA_BIT_MASK(32));
fimc->alloc_ctx = vb2_dma_contig_init_ctx(dev);
if (IS_ERR(fimc->alloc_ctx)) {
ret = PTR_ERR(fimc->alloc_ctx);
diff --git a/drivers/media/platform/exynos4-is/fimc-is.c 
b/drivers/media/platform/exynos4-is/fimc-is.c
index 49658ca39e51..123772fa0241 100644
--- a/drivers/media/platform/exynos4-is/fimc-is.c
+++ b/drivers/media/platform/exynos4-is/fimc-is.c
@@ -841,6 +841,7 @@ static int fimc_is_probe(struct platform_device *pdev)
if (ret < 0)
goto err_pm;
 
+   vb2_dma_contig_set_max_seg_size(dev, DMA_BIT_MASK(32));
is->alloc_ctx = vb2_dma_contig_init_ctx(dev);
if (IS_ERR(is->alloc_ctx)) {
ret = PTR_ERR(is->alloc_ctx);
diff --git a/drivers/media/platform/exynos4-is/fimc-lite.c 
b/drivers/media/platform/exynos4-is/fimc-lite.c
index 6f76afd909c4..9cfd2221f53d 100644
--- a/drivers/media/platform/exynos4-is/fimc-lite.c
+++ b/drivers/media/platform/exynos4-is/fimc-lite.c
@@ -1564,6 +1564,7 @@ static int fimc_lite_probe(struct platform_device *pdev)
goto err_sd;
}
 
+   vb2_dma_contig_set_max_seg_size(dev, DMA_BIT_MASK(32));
fimc->alloc_ctx = vb2_dma_contig_init_ctx(dev);
if (IS_ERR(fimc->alloc_ctx)) {
ret = PTR_ERR(fimc->alloc_ctx);
diff --git a/drivers/media/platform/s5p-g2d/g2d.c 
b/drivers/media/platform/s5p-g2d/g2d.c
index e1936d9d27da..31f6c233b146 100644
--- a/drivers/media/platform/s5p-g2d/g2d.c
+++ b/drivers/media/platform/s5p-g2d/g2d.c
@@ -681,6 +681,7 @@ static int g2d_probe(struct platform_device *pdev)
goto put_clk_gate;
}
 
+   vb2_dma_contig_set_max_seg_size(>dev, DMA_BIT_MASK(32));
dev->alloc_ctx = vb2_dma_contig_init_ctx(>dev);
if (IS_ERR(dev->alloc_ctx)) {
ret = PTR_ERR(dev->alloc_ctx);
diff --git a/drivers/media/platform/s5p-jpeg/jpeg-core.c 
b/drivers/media/platform/s5p-jpeg/jpeg-core.c
index 4a608cbe0fdb..6bd92f014a23 100644
--- a/drivers/media/platform/s5p-jpeg/jpeg-core.c
+++ b/drivers/media/platform/s5p-jpeg/jpeg-core.c
@@ -2839,6 +2839,7 @@ static int s5p_jpeg_probe(struct platform_device *pdev)
goto device_register_rollback;
}
 
+   vb2_dma_contig_set_max_seg_size(>dev, DMA_BIT_MASK(32));
jpeg->alloc_ctx = vb2_dma_contig_init_ctx(>dev);
if (IS_ERR(jpeg->alloc_ctx)) {
v4l2_err(>v4l2_dev, "Failed to init memory allocator\n");
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 81ffb67e6d66..8fcecf8a9a17 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -1164,11 +1164,13 @@ static int s5p_mfc_probe(struct platform_device *pdev)
}
}
 
+   vb2_dma_contig_set_max_seg_size(dev->mem_dev_l, DMA_BIT_MASK(32));
dev->alloc_ctx[0] = vb2_dma_contig_init_ctx(dev->mem_dev_l);
if (IS_ERR(dev->alloc_ctx[0])) {
ret = PTR_ERR(dev->alloc_ctx[0]);
goto err_res;
}
+   vb2_dma_contig_set_max_seg_size(dev->mem_dev_r, DMA_BIT_MASK(32));
dev->alloc_ctx[1] = 

[PATCH v2 3/4] dt-bindings: exynos-dp: update ports node binding for panel

2015-12-07 Thread Inki Dae
This patch updates a ports node binding for panel.

With this, dp node can have a ports node which describes
a remote endpoint node that can be connected to panel or bridge
node.

Changelog v2:
- remove unnecessary properties and numbering.
- update description about eDP device.

Signed-off-by: Inki Dae 
Reviewed-by: Javier Martinez Canillas 
---
 .../bindings/display/exynos/exynos_dp.txt  | 41 +++---
 1 file changed, 37 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt 
b/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt
index 64693f2..22efeba 100644
--- a/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt
+++ b/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt
@@ -1,3 +1,20 @@
+Device-Tree bindings for Samsung Exynos Embedded DisplayPort Transmitter(eDP)
+
+DisplayPort is industry standard to accommodate the growing board adoption
+of digital display technology within the PC and CE industries.
+It consolidates the internal and external connection methods to reduce device
+complexity and cost. It also supports necessary features for important cross
+industry applications and provides performance scalability to enable the next
+generation of displays that feature higher color depths, refresh rates, and
+display resolutions.
+
+eDP (embedded display port) device is compliant with Embedded DisplayPort
+standard as follows,
+- DisplayPort standard 1.1a for Exynos5250 and Exynos5260.
+- DisplayPort standard 1.3 for Exynos5422s and Exynos5800.
+
+eDP resides between FIMD and panel or FIMD and bridge such as LVDS.
+
 The Exynos display port interface should be configured based on
 the type of panel connected to it.
 
@@ -66,8 +83,15 @@ Optional properties for dp-controller:
Hotplug detect GPIO.
Indicates which GPIO should be used for hotplug
detection
-   -video interfaces: Device node can contain video interface port
-   nodes according to [1].
+Video interfaces:
+  Device node can contain video interface port nodes according to [1].
+  The following are properties specific to those nodes:
+
+  endpoint node connected to bridge or panel node:
+   - remote-endpoint: specifies the endpoint in panel or bridge node.
+ This node is required in all kinds of exynos dp
+ to represent the connection between dp and bridge
+ or dp and panel.
 
 [1]: Documentation/devicetree/bindings/media/video-interfaces.txt
 
@@ -111,9 +135,18 @@ Board Specific portion:
};
 
ports {
-   port@0 {
+   port {
dp_out: endpoint {
-   remote-endpoint = <_in>;
+   remote-endpoint = <_in>;
+   };
+   };
+   };
+
+   panel {
+   ...
+   port {
+   dp_in: endpoint {
+   remote-endpoint = <_out>;
};
};
};
-- 
1.9.1

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[PATCH v2 2/4] drm/exynos: dp: fix wrong return type

2015-12-07 Thread Inki Dae
This patch fixes wrong return type when dt binding of bridge device
failed.

If a board has a bridge device then of_graph_get_remote_port_parent
function shouldn't be NULL. So this patch will return a proper error
type so that the deferred probe isn't triggered.

Changelog v2:
- return -EINVAL if getting a port node failed.

Signed-off-by: Inki Dae 
Reviewed-by: Javier Martinez Canillas 
---
 drivers/gpu/drm/exynos/exynos_dp_core.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c 
b/drivers/gpu/drm/exynos/exynos_dp_core.c
index 60260a0..aeee60a 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_core.c
+++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
@@ -1437,8 +1437,10 @@ static int exynos_dp_probe(struct platform_device *pdev)
of_node_put(bridge_node);
if (!dp->ptn_bridge)
return -EPROBE_DEFER;
-   } else
-   return -EPROBE_DEFER;
+   } else {
+   DRM_ERROR("no port node for bridge device.\n");
+   return -EINVAL;
+   }
}
 
 out:
-- 
1.9.1

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[PATCH 4/4] ARM: dts: Use OF graph for DP to panel connection in exynos5800-peach-pi

2015-12-07 Thread Inki Dae
From: Javier Martinez Canillas 

The DT binding for the Exynos DRM Display Port (DP) driver isn't consistent
since it uses a phandle to describe the connection between the DP port and
the display panel but uses the OF graph ports and endpoints to describe the
connection betwen the DP port, a bridge chip and the panel.

The Exynos DP driver and the DT binding have been changed to allow also to
describe the DP port to panel connection using ports / endpoints (OF graph)
so this patch changes the Exynos5800 Peach Pi DT to make it consistent with
the Exynos5420 Peach Pit that has a eDP to LVDS chip and uses OF graph too.

Signed-off-by: Javier Martinez Canillas 
Tested-by: Javier Martinez Canillas 
Reviewed-by: Inki Dae 
---
 arch/arm/boot/dts/exynos5800-peach-pi.dts | 15 ++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts 
b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index 49a4f43..1cc2e95 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -122,6 +122,12 @@
compatible = "auo,b133htn01";
power-supply = <_fet6>;
backlight = <>;
+
+   port {
+   panel_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
};
 
mmc1_pwrseq: mmc1_pwrseq {
@@ -148,7 +154,14 @@
samsung,link-rate = <0x0a>;
samsung,lane-count = <2>;
samsung,hpd-gpio = < 6 GPIO_ACTIVE_HIGH>;
-   panel = <>;
+
+   ports {
+   port {
+   dp_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
 };
 
  {
-- 
1.9.1

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[PATCH v3 1/4] drm/exynos: dp: add of_graph dt binding support for panel

2015-12-07 Thread Inki Dae
This patch adds of_graph dt binding support for panel device
and also keeps the backward compatibility.

i.e.,
The dts file for Exynos5800 based peach pi board
has a panel property so we need to keep the backward compatibility.

Changelog v3:
- bind only one of two nodes outbound - panel or bridge.

Changelog v2:
- return -EINVAL if getting a port node failed.

Signed-off-by: Inki Dae 
Reviewed-by: Javier Martinez Canillas 
---
 drivers/gpu/drm/exynos/exynos_dp_core.c | 21 -
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c 
b/drivers/gpu/drm/exynos/exynos_dp_core.c
index 94f02a0..60260a0 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_core.c
+++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
@@ -1392,7 +1392,7 @@ static const struct component_ops exynos_dp_ops = {
 static int exynos_dp_probe(struct platform_device *pdev)
 {
struct device *dev = >dev;
-   struct device_node *panel_node, *bridge_node, *endpoint;
+   struct device_node *panel_node = NULL, *bridge_node, *endpoint = NULL;
struct exynos_dp_device *dp;
int ret;
 
@@ -1403,14 +1403,32 @@ static int exynos_dp_probe(struct platform_device *pdev)
 
platform_set_drvdata(pdev, dp);
 
+   /* This is for the backward compatibility. */
panel_node = of_parse_phandle(dev->of_node, "panel", 0);
if (panel_node) {
dp->panel = of_drm_find_panel(panel_node);
of_node_put(panel_node);
if (!dp->panel)
return -EPROBE_DEFER;
+   } else {
+   endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
+   if (endpoint) {
+   panel_node = of_graph_get_remote_port_parent(endpoint);
+   if (panel_node) {
+   dp->panel = of_drm_find_panel(panel_node);
+   of_node_put(panel_node);
+   if (!dp->panel)
+   return -EPROBE_DEFER;
+   } else {
+   DRM_ERROR("no port node for panel device.\n");
+   return -EINVAL;
+   }
+   }
}
 
+   if (endpoint)
+   goto out;
+
endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
if (endpoint) {
bridge_node = of_graph_get_remote_port_parent(endpoint);
@@ -1423,6 +1441,7 @@ static int exynos_dp_probe(struct platform_device *pdev)
return -EPROBE_DEFER;
}
 
+out:
pm_runtime_enable(dev);
 
ret = component_add(>dev, _dp_ops);
-- 
1.9.1

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[PATCH v2 0/4] drm/exynos: dp: consider port node outbound for panel

2015-12-07 Thread Inki Dae
This patch series considers a port node outbound for panel device node,
including dt binding for it. And also it fixes a wrong error type.

Changelog v2:
- add a patch from Javier, which allows dp to connect panel using of graph.
- remove unnecessary properties and numbering pointed out by
  Rob and Javier.
- update description about eDP device.

Thanks,
Inki Dae

Inki Dae (3):
  drm/exynos: dp: add of_graph dt binding support for panel
  drm/exynos: dp: fix wrong return type
  dt-bindings: exynos-dp: update ports node binding for panel

Javier Martinez Canillas (1):
  ARM: dts: Use OF graph for DP to panel connection in
exynos5800-peach-pi

 .../bindings/display/exynos/exynos_dp.txt  | 41 +++---
 arch/arm/boot/dts/exynos5800-peach-pi.dts  | 15 +++-
 drivers/gpu/drm/exynos/exynos_dp_core.c| 27 --
 3 files changed, 75 insertions(+), 8 deletions(-)

-- 
1.9.1

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[PATCH] drm/exynos: decon: remove unused variables

2015-12-07 Thread Inki Dae
This patch just removes unused variables, i and ret.

Signed-off-by: Inki Dae 
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index edfd6e3..2ac1d4d 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -377,8 +377,6 @@ static void decon_swreset(struct decon_context *ctx)
 static void decon_enable(struct exynos_drm_crtc *crtc)
 {
struct decon_context *ctx = crtc->ctx;
-   int ret;
-   int i;
 
if (!test_and_clear_bit(BIT_SUSPENDED, >flags))
return;
-- 
1.9.1

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Re: [PATCH 4/4] ARM: dts: Use OF graph for DP to panel connection in exynos5800-peach-pi

2015-12-07 Thread Inki Dae


2015년 12월 08일 09:48에 Krzysztof Kozlowski 이(가) 쓴 글:
> On 08.12.2015 00:36, Inki Dae wrote:
>> Hi Javier,
>>
>> 2015-12-07 22:41 GMT+09:00 Javier Martinez Canillas :
>>> Hello Inki,
>>>
>>> On 12/07/2015 09:52 AM, Inki Dae wrote:
 From: Javier Martinez Canillas 

>>>
>>> Thanks a lot for posting this patch.
>>>
 The DT binding for the Exynos DRM Display Port (DP) driver isn't consistent
 since it uses a phandle to describe the connection between the DP port and
 the display panel but uses the OF graph ports and endpoints to describe the
 connection betwen the DP port, a bridge chip and the panel.

 The Exynos DP driver and the DT binding have been changed to allow also to
 describe the DP port to panel connection using ports / endpoints (OF graph)
 so this patch changes the Exynos5800 Peach Pi DT to make it consistent with
 the Exynos5420 Peach Pit that has a eDP to LVDS chip and uses OF graph too.

 Signed-off-by: Javier Martinez Canillas 
 Tested-by: Javier Martinez Canillas 
>>>
>>> This tag was not in my original patch, it's true that I tested
>>> it but will someone believe me? ;)
>>
>> Oops. I confused you spread Reviewed-by and Tested-by here and there.
>> Don't worry about that. Will remove it if you don't give me Tested-by.
>> :)
> 
> Actually authorship (the "From") in this case means Tested-by. Author
> always tests the patch so it would look weird if we start adding
> tested-by to our own patches, right?
> 
> Dear Inki,
> However the patch misses your SoB. You touched and sent it so please
> extend the SoB chain-of-blame.

Right. Missed.

Thanks,
Inki Dae

> 
> Best regards,
> Krzysztof
> 
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> 
> 
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Re: [PATCH 4/4] ARM: dts: Use OF graph for DP to panel connection in exynos5800-peach-pi

2015-12-07 Thread Inki Dae


2015년 12월 08일 10:47에 Krzysztof Kozlowski 이(가) 쓴 글:
> On 08.12.2015 10:33, Javier Martinez Canillas wrote:
>> Hello Krzysztof,
>>
>> On 12/07/2015 09:45 PM, Krzysztof Kozlowski wrote:
>>> On 07.12.2015 21:52, Inki Dae wrote:
 From: Javier Martinez Canillas 

 The DT binding for the Exynos DRM Display Port (DP) driver isn't consistent
 since it uses a phandle to describe the connection between the DP port and
 the display panel but uses the OF graph ports and endpoints to describe the
 connection betwen the DP port, a bridge chip and the panel.

 The Exynos DP driver and the DT binding have been changed to allow also to
 describe the DP port to panel connection using ports / endpoints (OF graph)
 so this patch changes the Exynos5800 Peach Pi DT to make it consistent with
 the Exynos5420 Peach Pit that has a eDP to LVDS chip and uses OF graph too.

 Signed-off-by: Javier Martinez Canillas 
 Tested-by: Javier Martinez Canillas 
 Reviewed-by: Inki Dae 
 ---
  arch/arm/boot/dts/exynos5800-peach-pi.dts | 15 ++-
  1 file changed, 14 insertions(+), 1 deletion(-)

>>>
>>> Looks sensible:
>>> Reviewed-by: Krzysztof Kozlowski 
>>>
>>> Dependencies are not mentioned, does it depend on patch 1?
>>>
>>
>> Yes, it depends on patch 1/4 so it should be merged through the Exynos DRM
>> tree to maintain bisectability. Inki's patch maintains the DT ABI backward
>> compatibility though so another option is to wait until the DRM change hit
>> mainline and then pick $SUBJECT.
> 
> Thanks. We could also use a tag with DRM changes for samsung-soc but
> since I already flushed my queue for v4.5 I think it would be an
> overkill. From my point of view it can safely go through exynos-drm tree.

I will pick it up to exynos-drm tree. :)

Thanks,
Inki Dae

> 
> Best regards,
> Krzysztof
> 
> 
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Re: [PATCH 1/3] Device tree binding documentation for gpio-switch

2015-12-07 Thread Martyn Welch



On 07/12/15 17:37, Rob Herring wrote:

+Linus W

On Fri, Dec 04, 2015 at 05:31:13PM +, Martyn Welch wrote:

This patch adds documentation for the gpio-switch binding. This binding
provides a mechanism to bind named links to gpio, with the primary
purpose of enabling standardised access to switches that might be standard
across a group of devices but implemented differently on each device.


This is good and what I suggested, but it now makes me wonder if switch
is generic enough. This boils down to needing to expose single gpio
lines to userspace with a defined function/use. IIRC, there's been some
discussion about this before along with improving the userspace
interface for GPIO in general. So I'd like to get Linus' thoughts on
this.



No problem. Rename gpio-signal?




Signed-off-by: Martyn Welch 
---
  .../devicetree/bindings/misc/gpio-switch.txt   | 47 ++
  1 file changed, 47 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/misc/gpio-switch.txt

diff --git a/Documentation/devicetree/bindings/misc/gpio-switch.txt 
b/Documentation/devicetree/bindings/misc/gpio-switch.txt
new file mode 100644
index 000..13528bd
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/gpio-switch.txt
@@ -0,0 +1,47 @@
+Device-Tree bindings for gpio attached switches.
+
+This provides a mechanism to provide a named link to specified gpios. This can
+be useful in instances such as when theres a need to monitor a switch, which is
+common across a family of devices, but attached to different gpios and even
+implemented in different ways on differnet devices.
+
+Required properties:
+   - compatible = "gpio-switch";
+
+Each signal is represented as a sub-node of "gpio-switch". The naming of
+sub-nodes is arbitrary.
+
+Required sub-node properties:
+
+   - label: Name to be given to gpio switch.
+   - gpios: OF device-tree gpio specification.
+
+Optional sub-node properties:
+
+   - read-only: Boolean flag to mark the gpio as read-only, i.e. the line
+ should not be driven by the host.


In terms a a switch use, allowing driving it would be an override of the
switch. Is that the idea here?



Yeah - since it had become a lot more generic and a lot of 
switches/signals would probably be implemented with a pull-up resistor 
of something like that, it seemed to make sense to allow them to be 
driven as well.



+
+Example nodes:
+
+gpio-switch {
+compatible = "gpio-switch";


Both from a binding and driver perspective, there is no point in
grouping these. Each node can simply have this compatible string.



True. I did it this way as this is how gpio-keys is implemented. OK, 
that has one optional parameter (autorepeat) for the block and this has 
none. Though I can also see that these probably have less in common than 
the individual lines used in gpio-keys.



+
+write-protect {
+label = "write-protect";
+gpios = < 0 GPIO_ACTIVE_LOW>;
+read-only;
+};
+
+developer-switch {
+label = "developer-switch";
+gpios = < 3 GPIO_ACTIVE_HIGH>;
+read-only;
+};
+
+recovery-switch {
+label = "recovery-switch";
+gpios = < 7 GPIO_ACTIVE_LOW>;
+read-only;
+};
+};
+
--
2.1.4


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Re: [PATCH v5 0/12] cpufreq: Add support for Exynos 5800, 5420, and 5422

2015-12-07 Thread Ben Gamari
Viresh Kumar  writes:

> On 03-12-15, 11:26, Ben Gamari wrote:
>> Sounds reasonable to me. However, I'd just like to reiterate that this
>> line of work can be pursued independently from the upstreaming of this
>> series.
>
> I think this is the right time to upstream the right solution. Just
> try it once, if you face lots of difficulties or issues, then we can
> ofcourse see..
>
It looks like Bartlomiej has picked up this set. Regardless, while
tracking down various devicetree issues I noticed that the cpu-supply
and cpu%d-supply bindings appear to be completely undocumented. It
seem as though this ought to be fixed.

Cheers,

- Ben


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[PATCH 03/23] mtd: nftl: kill unused oobinfo field

2015-12-07 Thread Boris Brezillon
Signed-off-by: Boris Brezillon 
---
 include/linux/mtd/nftl.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/linux/mtd/nftl.h b/include/linux/mtd/nftl.h
index b059629..044daa0 100644
--- a/include/linux/mtd/nftl.h
+++ b/include/linux/mtd/nftl.h
@@ -50,7 +50,6 @@ struct NFTLrecord {
 unsigned int nb_blocks;/* number of physical blocks */
 unsigned int nb_boot_blocks;   /* number of blocks used by the bios */
 struct erase_info instr;
-   struct nand_ecclayout oobinfo;
 };
 
 int NFTL_mount(struct NFTLrecord *s);
-- 
2.1.4

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[PATCH 20/23] mtd: onenand: switch to mtd_ooblayout_ops

2015-12-07 Thread Boris Brezillon
Implementing the mtd_ooblayout_ops interface is the new way of exposing
ECC/OOB layout to MTD users. Modify the onenand drivers to switch to this
approach.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/onenand/onenand_base.c | 144 +
 include/linux/mtd/onenand.h|   2 -
 2 files changed, 82 insertions(+), 64 deletions(-)

diff --git a/drivers/mtd/onenand/onenand_base.c 
b/drivers/mtd/onenand/onenand_base.c
index b5937b7..5c7ff9f 100644
--- a/drivers/mtd/onenand/onenand_base.c
+++ b/drivers/mtd/onenand/onenand_base.c
@@ -68,21 +68,29 @@ MODULE_PARM_DESC(otp,   "Corresponding behaviour of 
OneNAND in OTP"
  * flexonenand_oob_128 - oob info for Flex-Onenand with 4KB page
  * For now, we expose only 64 out of 80 ecc bytes
  */
-static struct nand_ecclayout flexonenand_oob_128 = {
-   .eccbytes   = 64,
-   .eccpos = {
-   6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
-   22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
-   38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
-   54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
-   70, 71, 72, 73, 74, 75, 76, 77, 78, 79,
-   86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
-   102, 103, 104, 105
-   },
-   .oobfree= {
-   {2, 4}, {18, 4}, {34, 4}, {50, 4},
-   {66, 4}, {82, 4}, {98, 4}, {114, 4}
-   }
+static int flexonenand_eccpos(struct mtd_info *mtd, int eccbyte)
+{
+   if (eccbyte > 79)
+   return -ERANGE;
+
+   return ((eccbyte / 10) * 16) + 6 + (eccbyte % 10);
+}
+
+static int flexonenand_oobfree(struct mtd_info *mtd, int section,
+  struct nand_oobfree *oobfree)
+{
+   if (section > 7)
+   return -ERANGE;
+
+   oobfree->offset = (section * 16) + 2;
+   oobfree->length = 4;
+
+   return 0;
+}
+
+const struct mtd_ooblayout_ops flexonenand_ooblayout_ops = {
+   .eccpos = flexonenand_eccpos,
+   .oobfree = flexonenand_oobfree,
 };
 
 /*
@@ -91,56 +99,69 @@ static struct nand_ecclayout flexonenand_oob_128 = {
  * Based on specification:
  * 4Gb M-die OneNAND Flash (KFM4G16Q4M, KFN8G16Q4M). Rev. 1.3, Apr. 2010
  *
- * For eccpos we expose only 64 bytes out of 72 (see struct nand_ecclayout)
- *
  * oobfree uses the spare area fields marked as
  * "Managed by internal ECC logic for Logical Sector Number area"
  */
-static struct nand_ecclayout onenand_oob_128 = {
-   .eccbytes   = 64,
-   .eccpos = {
-   7, 8, 9, 10, 11, 12, 13, 14, 15,
-   23, 24, 25, 26, 27, 28, 29, 30, 31,
-   39, 40, 41, 42, 43, 44, 45, 46, 47,
-   55, 56, 57, 58, 59, 60, 61, 62, 63,
-   71, 72, 73, 74, 75, 76, 77, 78, 79,
-   87, 88, 89, 90, 91, 92, 93, 94, 95,
-   103, 104, 105, 106, 107, 108, 109, 110, 111,
-   119
-   },
-   .oobfree= {
-   {2, 3}, {18, 3}, {34, 3}, {50, 3},
-   {66, 3}, {82, 3}, {98, 3}, {114, 3}
-   }
+static int onenand_oob_128_eccpos(struct mtd_info *mtd, int eccbyte)
+{
+   if (eccbyte >= 72)
+   return -ERANGE;
+
+   return ((eccbyte / 9) * 16) + 7 + (eccbyte % 9);
+}
+
+static int onenand_oob_128_oobfree(struct mtd_info *mtd, int section,
+  struct nand_oobfree *oobfree)
+{
+   if (section >= 8)
+   return -ERANGE;
+
+   oobfree->offset = (section * 16) + 2;
+   oobfree->length = 3;
+
+   return 0;
+}
+
+const struct mtd_ooblayout_ops onenand_oob_128_ooblayout_ops = {
+   .eccpos = onenand_oob_128_eccpos,
+   .oobfree = onenand_oob_128_oobfree,
 };
 
 /**
- * onenand_oob_64 - oob info for large (2KB) page
+ * onenand_oob_32_64 - oob info for large (2KB) page
  */
-static struct nand_ecclayout onenand_oob_64 = {
-   .eccbytes   = 20,
-   .eccpos = {
-   8, 9, 10, 11, 12,
-   24, 25, 26, 27, 28,
-   40, 41, 42, 43, 44,
-   56, 57, 58, 59, 60,
-   },
-   .oobfree= {
-   {2, 3}, {14, 2}, {18, 3}, {30, 2},
-   {34, 3}, {46, 2}, {50, 3}, {62, 2}
+static int onenand_oob_32_64_eccpos(struct mtd_info *mtd, int eccbyte)
+{
+   int eccbytes = (mtd->oobsize / 32) * 10;
+
+   if (eccbyte >= eccbytes)
+   return -ERANGE;
+
+   return ((eccbyte / 5) * 16) + 8 + (eccbyte % 5);
+}
+
+static int onenand_oob_32_64_oobfree(struct mtd_info *mtd, int section,
+struct nand_oobfree *oobfree)
+{
+   int sections = (mtd->oobsize / 32) * 2;
+
+   if (section >= sections)
+   return -ERANGE;
+
+   if (section & 1) {
+   oobfree->offset = ((section - 1) * 16) + 14;
+   oobfree->length = 2;
+   } else  {
+   oobfree->offset = (section * 16) + 

[PATCH 21/23] staging: mt29f_spinand: switch to mtd_ooblayout_ops

2015-12-07 Thread Boris Brezillon
Signed-off-by: Boris Brezillon 
---
 drivers/staging/mt29f_spinand/mt29f_spinand.c | 44 ---
 1 file changed, 26 insertions(+), 18 deletions(-)

diff --git a/drivers/staging/mt29f_spinand/mt29f_spinand.c 
b/drivers/staging/mt29f_spinand/mt29f_spinand.c
index cb9d5ab..967d50a 100644
--- a/drivers/staging/mt29f_spinand/mt29f_spinand.c
+++ b/drivers/staging/mt29f_spinand/mt29f_spinand.c
@@ -42,23 +42,29 @@ static inline struct spinand_state *mtd_to_state(struct 
mtd_info *mtd)
 static int enable_hw_ecc;
 static int enable_read_hw_ecc;
 
-static struct nand_ecclayout spinand_oob_64 = {
-   .eccbytes = 24,
-   .eccpos = {
-   1, 2, 3, 4, 5, 6,
-   17, 18, 19, 20, 21, 22,
-   33, 34, 35, 36, 37, 38,
-   49, 50, 51, 52, 53, 54, },
-   .oobfree = {
-   {.offset = 8,
-   .length = 8},
-   {.offset = 24,
-   .length = 8},
-   {.offset = 40,
-   .length = 8},
-   {.offset = 56,
-   .length = 8},
-   }
+static int spinand_oob_64_eccpos(struct mtd_info *mtd, int eccbyte)
+{
+   if (eccbyte > 23)
+   return -ERANGE;
+
+   return ((eccbyte / 6) * 16) + 1;
+}
+
+static int spinand_oob_64_oobfree(struct mtd_info *mtd, int section,
+ struct nand_oobfree *oobfree)
+{
+   if (section > 3)
+   return -ERANGE;
+
+   oobfree->offset = (section * 16) + 8;
+   oobfree->length = 8;
+
+   return 0;
+}
+
+const struct mtd_ooblayout_ops spinand_oob_64_ops = {
+   .eccpos = spinand_oob_64_eccpos,
+   .oobfree = spinand_oob_64_oobfree,
 };
 #endif
 
@@ -883,7 +889,6 @@ static int spinand_probe(struct spi_device *spi_nand)
 
chip->ecc.strength = 1;
chip->ecc.total = chip->ecc.steps * chip->ecc.bytes;
-   chip->ecc.layout = _oob_64;
chip->ecc.read_page = spinand_read_page_hwecc;
chip->ecc.write_page = spinand_write_page_hwecc;
 #else
@@ -911,6 +916,9 @@ static int spinand_probe(struct spi_device *spi_nand)
mtd->priv = chip;
mtd->dev.parent = _nand->dev;
mtd->oobsize = 64;
+#ifdef CONFIG_MTD_SPINAND_ONDIEECC
+   mtd_set_ooblayout(mtd, _oob_64_ops);
+#endif
 
if (nand_scan(mtd, 1))
return -ENXIO;
-- 
2.1.4

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[PATCH 23/23] mtd: kill the nand_ecclayout struct

2015-12-07 Thread Boris Brezillon
Now that all mtd drivers have moved to the mtd_ooblayout_ops model we can
safely remove the struct nand_ecclayout definition, and all the remaining
places where it was still used.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/mtdchar.c  | 12 ++--
 drivers/mtd/mtdcore.c  | 44 
 include/linux/mtd/mtd.h| 20 
 include/uapi/mtd/mtd-abi.h |  2 +-
 4 files changed, 7 insertions(+), 71 deletions(-)

diff --git a/drivers/mtd/mtdchar.c b/drivers/mtd/mtdchar.c
index c03b678..322e838 100644
--- a/drivers/mtd/mtdchar.c
+++ b/drivers/mtd/mtdchar.c
@@ -465,12 +465,12 @@ static int mtdchar_readoob(struct file *file, struct 
mtd_info *mtd,
 }
 
 /*
- * Copies (and truncates, if necessary) data from the larger struct,
- * nand_ecclayout, to the smaller, deprecated layout struct,
- * nand_ecclayout_user. This is necessary only to support the deprecated
- * API ioctl ECCGETLAYOUT while allowing all new functionality to use
- * nand_ecclayout flexibly (i.e. the struct may change size in new
- * releases without requiring major rewrites).
+ * Copies (and truncates, if necessary) OOB layout information to the
+ * deprecated layout struct, nand_ecclayout_user. This is necessary only to
+ * support the deprecated API ioctl ECCGETLAYOUT while allowing all new
+ * functionality to use mtd_ooblayout_ops flexibly (i.e. mtd_ooblayout_ops
+ * can describe any kind of OOB layout with almost zero overhead from a
+ * memory usage point of view).
  */
 static int shrink_ecclayout(struct mtd_info *mtd,
struct nand_ecclayout_user *to)
diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index d87f3621..62f83b0 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -833,50 +833,6 @@ void __put_mtd_device(struct mtd_info *mtd)
 }
 EXPORT_SYMBOL_GPL(__put_mtd_device);
 
-static int nand_ecclayout_eccpos(struct mtd_info *mtd, int eccbyte)
-{
-   struct nand_ecclayout *layout = mtd->ecclayout;
-
-   if (!layout)
-   return -ENOTSUPP;
-
-   if (eccbyte >= layout->eccbytes)
-   return -ERANGE;
-
-   return layout->eccpos[eccbyte];
-}
-
-static int nand_ecclayout_oobfree(struct mtd_info *mtd, int section,
- struct nand_oobfree *oobfree)
-{
-   struct nand_ecclayout *layout = mtd->ecclayout;
-
-   if (!layout)
-   return -ENOTSUPP;
-
-   if (section >= MTD_MAX_OOBFREE_ENTRIES_LARGE)
-   return -ERANGE;
-
-   *oobfree = layout->oobfree[section];
-
-   return 0;
-}
-
-static const struct mtd_ooblayout_ops nand_ecclayout_ops = {
-   .eccpos = nand_ecclayout_eccpos,
-   .oobfree = nand_ecclayout_oobfree,
-};
-
-void mtd_set_ecclayout(struct mtd_info *mtd, struct nand_ecclayout *ecclayout)
-{
-   if (!mtd || !ecclayout)
-   return;
-
-   mtd->ecclayout = ecclayout;
-   mtd_set_ooblayout(mtd, _ecclayout_ops);
-}
-EXPORT_SYMBOL_GPL(mtd_set_ecclayout);
-
 /*
  * Erase is an asynchronous operation.  Device drivers are supposed
  * to call instr->callback() whenever the operation completes, even
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 9c3699b..3a4bab7 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -96,21 +96,6 @@ struct mtd_oob_ops {
 
 #define MTD_MAX_OOBFREE_ENTRIES_LARGE  32
 #define MTD_MAX_ECCPOS_ENTRIES_LARGE   640
-/*
- * Internal ECC layout control structure. For historical reasons, there is a
- * similar, smaller struct nand_ecclayout_user (in mtd-abi.h) that is retained
- * for export to user-space via the ECCGETLAYOUT ioctl.
- * nand_ecclayout should be expandable in the future simply by the above 
macros.
- *
- * This structure is now deprecated, you should use struct nand_ecclayout_ops
- * to describe your OOB layout.
- */
-struct nand_ecclayout {
-   __u32 eccbytes;
-   __u32 eccpos[MTD_MAX_ECCPOS_ENTRIES_LARGE];
-   struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES_LARGE];
-};
-
 /**
  * struct mtd_ooblayout_ops - NAND OOB layout operations.
  *
@@ -183,9 +168,6 @@ struct mtd_info {
const char *name;
int index;
 
-   /* [Deprecated] ECC layout structure pointer - read only! */
-   struct nand_ecclayout *ecclayout;
-
/* OOB layout description */
const struct mtd_ooblayout_ops *ooblayout;
 
@@ -279,8 +261,6 @@ static inline void mtd_set_ooblayout(struct mtd_info *mtd,
mtd->ooblayout = ooblayout;
 }
 
-void mtd_set_ecclayout(struct mtd_info *mtd, struct nand_ecclayout *ecclayout);
-
 static inline int mtd_eccpos(struct mtd_info *mtd, int eccbyte)
 {
if (!mtd->ooblayout || !mtd->ooblayout->eccpos)
diff --git a/include/uapi/mtd/mtd-abi.h b/include/uapi/mtd/mtd-abi.h
index 763bb69..0ec1da2 100644
--- a/include/uapi/mtd/mtd-abi.h
+++ b/include/uapi/mtd/mtd-abi.h
@@ -228,7 +228,7 @@ struct nand_oobfree {
  * complete set 

[PATCH 22/23] mtd: nand: kill layout field

2015-12-07 Thread Boris Brezillon
Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/nand_base.c | 8 
 drivers/mtd/nand/nand_bch.c  | 9 -
 include/linux/mtd/nand.h | 1 -
 3 files changed, 18 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 6440c5d..85deacb 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -4148,13 +4148,6 @@ int nand_scan_tail(struct mtd_info *mtd)
chip->oob_poi = chip->buffers->databuf + mtd->writesize;
 
/*
-* Set the provided ECC layout. If ecc->layout is NULL, the MTD core
-* will just leave mtd->ooblayout to NULL, if it's not NULL, it will
-* set ->ooblayout to the default ecclayout wrapper.
-*/
-   mtd_set_ecclayout(mtd, ecc->layout);
-
-   /*
 * If no default placement scheme is given, select an appropriate one.
 */
if (!mtd->ooblayout && (ecc->mode != NAND_ECC_SOFT_BCH)) {
@@ -4401,7 +4394,6 @@ int nand_scan_tail(struct mtd_info *mtd)
mtd->writebufsize = mtd->writesize;
 
/* propagate ecc info to mtd_info */
-   mtd_set_ecclayout(mtd, ecc->layout);
mtd->ecc_strength = ecc->strength;
mtd->ecc_step_size = ecc->size;
/*
diff --git a/drivers/mtd/nand/nand_bch.c b/drivers/mtd/nand/nand_bch.c
index 2937b49..3b90643 100644
--- a/drivers/mtd/nand/nand_bch.c
+++ b/drivers/mtd/nand/nand_bch.c
@@ -158,15 +158,6 @@ struct nand_bch_control *nand_bch_init(struct mtd_info 
*mtd)
 
eccsteps = mtd->writesize/eccsize;
 
-   /*
-* Rely on the default ecclayout to ooblayout wrapper provided by MTD
-* core if ecc.layout is not NULL.
-* FIXME: this should be removed when all callers have moved to the
-* mtd_ooblayout_ops approach.
-*/
-   if (nand->ecc.layout)
-   mtd_set_ecclayout(mtd, nand->ecc.layout);
-
/* if no ecc placement scheme was provided, build one */
if (!mtd->ooblayout) {
 
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 9ba9daba..f4ba147 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -494,7 +494,6 @@ struct nand_ecc_ctrl {
int strength;
int prepad;
int postpad;
-   struct nand_ecclayout   *layout;
void *priv;
void (*hwctl)(struct mtd_info *mtd, int mode);
int (*calculate)(struct mtd_info *mtd, const uint8_t *dat,
-- 
2.1.4

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[PATCH 18/23] mtd: nand: bch: switch to nand_ecclayout_pos

2015-12-07 Thread Boris Brezillon
Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/nand_bch.c | 33 +++--
 1 file changed, 11 insertions(+), 22 deletions(-)

diff --git a/drivers/mtd/nand/nand_bch.c b/drivers/mtd/nand/nand_bch.c
index 9cff544..2937b49 100644
--- a/drivers/mtd/nand/nand_bch.c
+++ b/drivers/mtd/nand/nand_bch.c
@@ -32,13 +32,11 @@
 /**
  * struct nand_bch_control - private NAND BCH control structure
  * @bch:   BCH control structure
- * @ecclayout: private ecc layout for this BCH configuration
  * @errloc:error location array
  * @eccmask:   XOR ecc mask, allows erased pages to be decoded as valid
  */
 struct nand_bch_control {
struct bch_control   *bch;
-   struct nand_ecclayout ecclayout;
unsigned int *errloc;
unsigned char*eccmask;
 };
@@ -124,7 +122,6 @@ struct nand_bch_control *nand_bch_init(struct mtd_info *mtd)
 {
struct nand_chip *nand = mtd_to_nand(mtd);
unsigned int m, t, eccsteps, i;
-   struct nand_ecclayout *layout = nand->ecc.layout;
struct nand_bch_control *nbc = NULL;
unsigned char *erased_page;
unsigned int eccsize = nand->ecc.size;
@@ -161,8 +158,17 @@ struct nand_bch_control *nand_bch_init(struct mtd_info 
*mtd)
 
eccsteps = mtd->writesize/eccsize;
 
+   /*
+* Rely on the default ecclayout to ooblayout wrapper provided by MTD
+* core if ecc.layout is not NULL.
+* FIXME: this should be removed when all callers have moved to the
+* mtd_ooblayout_ops approach.
+*/
+   if (nand->ecc.layout)
+   mtd_set_ecclayout(mtd, nand->ecc.layout);
+
/* if no ecc placement scheme was provided, build one */
-   if (!layout) {
+   if (!mtd->ooblayout) {
 
/* handle large page devices only */
if (mtd->oobsize < 64) {
@@ -171,24 +177,7 @@ struct nand_bch_control *nand_bch_init(struct mtd_info 
*mtd)
goto fail;
}
 
-   layout = >ecclayout;
-   layout->eccbytes = eccsteps*eccbytes;
-
-   /* reserve 2 bytes for bad block marker */
-   if (layout->eccbytes+2 > mtd->oobsize) {
-   printk(KERN_WARNING "no suitable oob scheme available "
-  "for oobsize %d eccbytes %u\n", mtd->oobsize,
-  eccbytes);
-   goto fail;
-   }
-   /* put ecc bytes at oob tail */
-   for (i = 0; i < layout->eccbytes; i++)
-   layout->eccpos[i] = mtd->oobsize-layout->eccbytes+i;
-
-   layout->oobfree[0].offset = 2;
-   layout->oobfree[0].length = mtd->oobsize-2-layout->eccbytes;
-
-   nand->ecc.layout = layout;
+   mtd_set_ooblayout(mtd, _ooblayout_lp_ops);
}
 
/* sanity checks */
-- 
2.1.4

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[PATCH 15/23] mtd: create an mtd_ooblayout_ops struct to ease ECC layout definition

2015-12-07 Thread Boris Brezillon
ECC layout definitions are currently exposed using the nand_ecclayout
struct which embeds oobfree and eccpos arrays with predefined size.
This approach was acceptable when the NAND were providing relatively small
OOB regions, but MLC and TLC now provide OOB regions of several hundreds
of bytes, which implies a non negigible size penalty for everybody even
those who only need to support legacy NANDs.

Create an mtd_ooblayout_ops interface providing the same functionality
(expose the ECC and OOBFREE layout) without the need for this huge
structure.

The mtd->ecclayout is now deprecated and should be replaced by the
equivalent mtd_ooblayout_ops. In the meantime we provide a wrapper around
the ->ecclayout field to ease migration to this new model.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/mtdchar.c   |  4 ++--
 drivers/mtd/mtdconcat.c |  2 +-
 drivers/mtd/mtdcore.c   | 44 
 drivers/mtd/mtdpart.c   | 22 +++-
 include/linux/mtd/mtd.h | 53 +
 5 files changed, 104 insertions(+), 21 deletions(-)

diff --git a/drivers/mtd/mtdchar.c b/drivers/mtd/mtdchar.c
index 66d0898..c03b678 100644
--- a/drivers/mtd/mtdchar.c
+++ b/drivers/mtd/mtdchar.c
@@ -862,7 +862,7 @@ static int mtdchar_ioctl(struct file *file, u_int cmd, 
u_long arg)
{
struct nand_oobinfo oi;
 
-   if (!mtd->ecclayout)
+   if (!mtd->ooblayout)
return -EOPNOTSUPP;
 
ret = get_oobinfo(mtd, );
@@ -956,7 +956,7 @@ static int mtdchar_ioctl(struct file *file, u_int cmd, 
u_long arg)
{
struct nand_ecclayout_user *usrlay;
 
-   if (!mtd->ecclayout)
+   if (!mtd->ooblayout)
return -EOPNOTSUPP;
 
usrlay = kmalloc(sizeof(*usrlay), GFP_KERNEL);
diff --git a/drivers/mtd/mtdconcat.c b/drivers/mtd/mtdconcat.c
index 481565e..d573606 100644
--- a/drivers/mtd/mtdconcat.c
+++ b/drivers/mtd/mtdconcat.c
@@ -777,7 +777,7 @@ struct mtd_info *mtd_concat_create(struct mtd_info 
*subdev[],   /* subdevices to c
 
}
 
-   mtd_set_ecclayout(>mtd, subdev[0]->ecclayout);
+   mtd_set_ooblayout(>mtd, subdev[0]->ooblayout);
 
concat->num_subdev = num_devs;
concat->mtd.name = name;
diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index 62f83b0..d87f3621 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -833,6 +833,50 @@ void __put_mtd_device(struct mtd_info *mtd)
 }
 EXPORT_SYMBOL_GPL(__put_mtd_device);
 
+static int nand_ecclayout_eccpos(struct mtd_info *mtd, int eccbyte)
+{
+   struct nand_ecclayout *layout = mtd->ecclayout;
+
+   if (!layout)
+   return -ENOTSUPP;
+
+   if (eccbyte >= layout->eccbytes)
+   return -ERANGE;
+
+   return layout->eccpos[eccbyte];
+}
+
+static int nand_ecclayout_oobfree(struct mtd_info *mtd, int section,
+ struct nand_oobfree *oobfree)
+{
+   struct nand_ecclayout *layout = mtd->ecclayout;
+
+   if (!layout)
+   return -ENOTSUPP;
+
+   if (section >= MTD_MAX_OOBFREE_ENTRIES_LARGE)
+   return -ERANGE;
+
+   *oobfree = layout->oobfree[section];
+
+   return 0;
+}
+
+static const struct mtd_ooblayout_ops nand_ecclayout_ops = {
+   .eccpos = nand_ecclayout_eccpos,
+   .oobfree = nand_ecclayout_oobfree,
+};
+
+void mtd_set_ecclayout(struct mtd_info *mtd, struct nand_ecclayout *ecclayout)
+{
+   if (!mtd || !ecclayout)
+   return;
+
+   mtd->ecclayout = ecclayout;
+   mtd_set_ooblayout(mtd, _ecclayout_ops);
+}
+EXPORT_SYMBOL_GPL(mtd_set_ecclayout);
+
 /*
  * Erase is an asynchronous operation.  Device drivers are supposed
  * to call instr->callback() whenever the operation completes, even
diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index 244faa8..2b5c8ca 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -320,6 +320,26 @@ static int part_block_markbad(struct mtd_info *mtd, loff_t 
ofs)
return res;
 }
 
+static int part_ooblayout_eccpos(struct mtd_info *mtd, int eccbyte)
+{
+   struct mtd_part *part = mtd_to_part(mtd);
+
+   return mtd_eccpos(part->master, eccbyte);
+}
+
+static int part_ooblayout_oobfree(struct mtd_info *mtd, int section,
+ struct nand_oobfree *oobfree)
+{
+   struct mtd_part *part = mtd_to_part(mtd);
+
+   return mtd_oobfree(part->master, section, oobfree);
+}
+
+static const struct mtd_ooblayout_ops part_ooblayout_ops = {
+   .eccpos = part_ooblayout_eccpos,
+   .oobfree = part_ooblayout_oobfree,
+};
+
 static inline void free_partition(struct mtd_part *p)
 {
kfree(p->mtd.name);
@@ -536,7 +556,7 @@ static struct mtd_part *allocate_partition(struct mtd_info 
*master,
part->name);
}
 
-   

[PATCH 17/23] mtd: nand: implement the default mtd_ooblayout_ops

2015-12-07 Thread Boris Brezillon
Replace the default nand_ecclayout definitions for large and small page
devices with the equivalent mtd_ooblayout_ops.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/nand_base.c | 138 +++
 include/linux/mtd/nand.h |   3 +
 2 files changed, 90 insertions(+), 51 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 2b334cf..6440c5d 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -48,50 +48,6 @@
 #include 
 #include 
 
-/* Define default oob placement schemes for large and small page devices */
-static struct nand_ecclayout nand_oob_8 = {
-   .eccbytes = 3,
-   .eccpos = {0, 1, 2},
-   .oobfree = {
-   {.offset = 3,
-.length = 2},
-   {.offset = 6,
-.length = 2} }
-};
-
-static struct nand_ecclayout nand_oob_16 = {
-   .eccbytes = 6,
-   .eccpos = {0, 1, 2, 3, 6, 7},
-   .oobfree = {
-   {.offset = 8,
-. length = 8} }
-};
-
-static struct nand_ecclayout nand_oob_64 = {
-   .eccbytes = 24,
-   .eccpos = {
-  40, 41, 42, 43, 44, 45, 46, 47,
-  48, 49, 50, 51, 52, 53, 54, 55,
-  56, 57, 58, 59, 60, 61, 62, 63},
-   .oobfree = {
-   {.offset = 2,
-.length = 38} }
-};
-
-static struct nand_ecclayout nand_oob_128 = {
-   .eccbytes = 48,
-   .eccpos = {
-  80, 81, 82, 83, 84, 85, 86, 87,
-  88, 89, 90, 91, 92, 93, 94, 95,
-  96, 97, 98, 99, 100, 101, 102, 103,
-  104, 105, 106, 107, 108, 109, 110, 111,
-  112, 113, 114, 115, 116, 117, 118, 119,
-  120, 121, 122, 123, 124, 125, 126, 127},
-   .oobfree = {
-   {.offset = 2,
-.length = 78} }
-};
-
 static int nand_get_device(struct mtd_info *mtd, int new_state);
 
 static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
@@ -103,6 +59,83 @@ static int nand_do_write_oob(struct mtd_info *mtd, loff_t 
to,
  */
 DEFINE_LED_TRIGGER(nand_led_trigger);
 
+/* Define default oob placement schemes for large and small page devices */
+static int nand_ooblayout_eccpos_sp(struct mtd_info *mtd, int eccbyte)
+{
+   struct nand_chip *chip = mtd->priv;
+   struct nand_ecc_ctrl *ecc = >ecc;
+
+   if (eccbyte >= ecc->bytes * ecc->steps)
+   return -ERANGE;
+
+   if (eccbyte < 4)
+   return eccbyte;
+
+   return eccbyte + 2;
+}
+
+static int nand_ooblayout_oobfree_sp(struct mtd_info *mtd, int section,
+struct nand_oobfree *oobfree)
+{
+   if (section > 1)
+   return -ERANGE;
+
+   if (mtd->oobsize == 16) {
+   if (section)
+   return -ERANGE;
+
+   oobfree->length = 8;
+   oobfree->offset = 8;
+   } else {
+   oobfree->length = 2;
+   if (!section)
+   oobfree->offset = 3;
+   else
+   oobfree->offset = 6;
+   }
+
+   return 0;
+}
+
+const struct mtd_ooblayout_ops nand_ooblayout_sp_ops = {
+   .eccpos = nand_ooblayout_eccpos_sp,
+   .oobfree = nand_ooblayout_oobfree_sp,
+};
+EXPORT_SYMBOL_GPL(nand_ooblayout_sp_ops);
+
+static int nand_ooblayout_eccpos_lp(struct mtd_info *mtd, int eccbyte)
+{
+   struct nand_chip *chip = mtd->priv;
+   struct nand_ecc_ctrl *ecc = >ecc;
+   int eccbytes = ecc->bytes * ecc->steps;
+
+   if (eccbyte >= eccbytes)
+   return -ERANGE;
+
+   return mtd->oobsize - eccbytes + eccbyte;
+}
+
+static int nand_ooblayout_oobfree_lp(struct mtd_info *mtd, int section,
+struct nand_oobfree *oobfree)
+{
+   struct nand_chip *chip = mtd->priv;
+   struct nand_ecc_ctrl *ecc = >ecc;
+
+   if (section)
+   return -ERANGE;
+
+   oobfree->length = mtd->oobsize - (ecc->bytes * ecc->steps) - 2;
+   oobfree->offset = 2;
+
+   return 0;
+}
+
+const struct mtd_ooblayout_ops nand_ooblayout_lp_ops = {
+   .eccpos = nand_ooblayout_eccpos_lp,
+   .oobfree = nand_ooblayout_oobfree_lp,
+};
+EXPORT_SYMBOL_GPL(nand_ooblayout_lp_ops);
+
 static int check_offs_len(struct mtd_info *mtd,
loff_t ofs, uint64_t len)
 {
@@ -4115,21 +4148,24 @@ int nand_scan_tail(struct mtd_info *mtd)
chip->oob_poi = chip->buffers->databuf + mtd->writesize;
 
/*
+* Set the provided ECC layout. If ecc->layout is NULL, the MTD core
+* will just leave mtd->ooblayout to NULL, if it's not NULL, it will
+* set ->ooblayout to the default ecclayout wrapper.
+*/
+   mtd_set_ecclayout(mtd, ecc->layout);
+
+   /*
 * If no default placement scheme is given, select an appropriate one.

[PATCH 12/23] mtd: use mtd_eccpos() and mtd_oobfree() where appropriate

2015-12-07 Thread Boris Brezillon
The mtd_eccpos(), mtd_oobfree() and mtd_eccbytes() helper functions have
been added to avoid direct accesses to the ecclayout, and thus allow for
future rework.
Use these helpers in all places where the oobfree[] and eccpos[] arrays
are referenced.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/mtdchar.c  | 79 
 drivers/mtd/mtdswap.c  |  4 +-
 drivers/mtd/nand/atmel_nand.c  | 21 -
 drivers/mtd/nand/fsl_ifc_nand.c|  2 +-
 drivers/mtd/nand/gpmi-nand/gpmi-nand.c |  9 ++--
 drivers/mtd/nand/lpc32xx_slc.c |  4 +-
 drivers/mtd/nand/nand_base.c   | 83 ++
 drivers/mtd/nand/nand_bch.c|  2 +-
 drivers/mtd/nand/omap2.c   | 11 ++---
 drivers/mtd/onenand/onenand_base.c | 61 +
 10 files changed, 163 insertions(+), 113 deletions(-)

diff --git a/drivers/mtd/mtdchar.c b/drivers/mtd/mtdchar.c
index 6d19835..66d0898 100644
--- a/drivers/mtd/mtdchar.c
+++ b/drivers/mtd/mtdchar.c
@@ -472,31 +472,78 @@ static int mtdchar_readoob(struct file *file, struct 
mtd_info *mtd,
  * nand_ecclayout flexibly (i.e. the struct may change size in new
  * releases without requiring major rewrites).
  */
-static int shrink_ecclayout(const struct nand_ecclayout *from,
-   struct nand_ecclayout_user *to)
+static int shrink_ecclayout(struct mtd_info *mtd,
+   struct nand_ecclayout_user *to)
 {
int i;
 
-   if (!from || !to)
+   if (!mtd || !to)
return -EINVAL;
 
memset(to, 0, sizeof(*to));
 
-   to->eccbytes = min((int)from->eccbytes, MTD_MAX_ECCPOS_ENTRIES);
-   for (i = 0; i < to->eccbytes; i++)
-   to->eccpos[i] = from->eccpos[i];
+   to->eccbytes = 0;
+   for (i = 0; i < MTD_MAX_ECCPOS_ENTRIES; i++) {
+   int pos = mtd_eccpos(mtd, i);
+
+   if (pos < 0)
+   break;
+
+   to->eccpos[i] = pos;
+   to->eccbytes++;
+   }
 
for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES; i++) {
-   if (from->oobfree[i].length == 0 &&
-   from->oobfree[i].offset == 0)
+   mtd_oobfree(mtd, i, >oobfree[i]);
+   if (to->oobfree[i].length == 0 &&
+   to->oobfree[i].offset == 0)
break;
-   to->oobavail += from->oobfree[i].length;
-   to->oobfree[i] = from->oobfree[i];
+   to->oobavail += to->oobfree[i].length;
}
 
return 0;
 }
 
+static int get_oobinfo(struct mtd_info *mtd, struct nand_oobinfo *to)
+{
+   int i;
+
+   if (!mtd || !to)
+   return -EINVAL;
+
+   memset(to, 0, sizeof(*to));
+
+   to->eccbytes = 0;
+   for (i = 0; i < ARRAY_SIZE(to->eccpos); i++) {
+   int pos = mtd_eccpos(mtd, i);
+
+   if (pos < 0)
+   break;
+
+   to->eccpos[i] = pos;
+   to->eccbytes++;
+   }
+
+   if (i == ARRAY_SIZE(to->eccpos))
+   return -EINVAL;
+
+   for (i = 0; i < 8; i++) {
+   struct nand_oobfree oobfree;
+
+   mtd_oobfree(mtd, i, );
+   if (oobfree.length == 0 &&
+   oobfree.offset == 0)
+   break;
+
+   to->oobfree[i][0] = oobfree.offset;
+   to->oobfree[i][1] = oobfree.length;
+   }
+
+   to->useecc = MTD_NANDECC_AUTOPLACE;
+
+   return 0;
+}
+
 static int mtdchar_blkpg_ioctl(struct mtd_info *mtd,
   struct blkpg_ioctl_arg *arg)
 {
@@ -817,14 +864,10 @@ static int mtdchar_ioctl(struct file *file, u_int cmd, 
u_long arg)
 
if (!mtd->ecclayout)
return -EOPNOTSUPP;
-   if (mtd->ecclayout->eccbytes > ARRAY_SIZE(oi.eccpos))
-   return -EINVAL;
 
-   oi.useecc = MTD_NANDECC_AUTOPLACE;
-   memcpy(, mtd->ecclayout->eccpos, sizeof(oi.eccpos));
-   memcpy(, mtd->ecclayout->oobfree,
-  sizeof(oi.oobfree));
-   oi.eccbytes = mtd->ecclayout->eccbytes;
+   ret = get_oobinfo(mtd, );
+   if (ret)
+   return ret;
 
if (copy_to_user(argp, , sizeof(struct nand_oobinfo)))
return -EFAULT;
@@ -920,7 +963,7 @@ static int mtdchar_ioctl(struct file *file, u_int cmd, 
u_long arg)
if (!usrlay)
return -ENOMEM;
 
-   shrink_ecclayout(mtd->ecclayout, usrlay);
+   shrink_ecclayout(mtd, usrlay);
 
if (copy_to_user(argp, usrlay, sizeof(*usrlay)))
ret = -EFAULT;
diff --git a/drivers/mtd/mtdswap.c b/drivers/mtd/mtdswap.c
index d330eb1..6fe47b0 100644
--- a/drivers/mtd/mtdswap.c
+++ 

[PATCH 16/23] mtd: docg3: switch to mtd_ooblayout_ops

2015-12-07 Thread Boris Brezillon
Signed-off-by: Boris Brezillon 
---
 drivers/mtd/devices/docg3.c | 34 +-
 1 file changed, 29 insertions(+), 5 deletions(-)

diff --git a/drivers/mtd/devices/docg3.c b/drivers/mtd/devices/docg3.c
index 6b516e1..7463dd8 100644
--- a/drivers/mtd/devices/docg3.c
+++ b/drivers/mtd/devices/docg3.c
@@ -73,10 +73,34 @@ MODULE_PARM_DESC(reliable_mode, "Set the docg3 mode 
(0=normal MLC, 1=fast, "
  * @eccpos: ecc positions (byte 7 is Hamming ECC, byte 8-14 are BCH ECC)
  * @oobfree: free pageinfo bytes (byte 0 until byte 6, byte 15
  */
-static struct nand_ecclayout docg3_oobinfo = {
-   .eccbytes = 8,
-   .eccpos = {7, 8, 9, 10, 11, 12, 13, 14},
-   .oobfree = {{0, 7}, {15, 1} },
+static int docg3_eccpos(struct mtd_info *mtd, int eccbyte)
+{
+   if (eccbyte >= 8)
+   return -ERANGE;
+
+   return eccbyte + 7;
+}
+
+static int docg3_oobfree(struct mtd_info *mtd, int section,
+struct nand_oobfree *oobfree)
+{
+   if (section > 1)
+   return -ERANGE;
+
+   if (!section) {
+   oobfree->offset = 0;
+   oobfree->length = 7;
+   } else {
+   oobfree->offset = 15;
+   oobfree->length = 1;
+   }
+
+   return 0;
+}
+
+static const struct nand_ooblayout_ops nand_ooblayout_docg3_ops = {
+   .eccpos = docg3_eccpos,
+   .oobfree = docg3_oobfree,
 };
 
 static inline u8 doc_readb(struct docg3 *docg3, u16 reg)
@@ -1857,7 +1881,7 @@ static int __init doc_set_driver_info(int chip_id, struct 
mtd_info *mtd)
mtd->_read_oob = doc_read_oob;
mtd->_write_oob = doc_write_oob;
mtd->_block_isbad = doc_block_isbad;
-   mtd_set_ecclayout(mtd, _oobinfo);
+   mtd_set_ooblayout_ops(mtd, _ooblayout_docg3_ops);
mtd->oobavail = 8;
mtd->ecc_strength = DOC_ECC_BCH_T;
 
-- 
2.1.4

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[PATCH 14/23] mtd: use mtd_set_ecclayout() where appropriate

2015-12-07 Thread Boris Brezillon
Use the mtd_set_ecclayout() helper instead of directly assigning the
mtd->ecclayout field.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/devices/docg3.c| 2 +-
 drivers/mtd/mtdconcat.c| 2 +-
 drivers/mtd/mtdpart.c  | 2 +-
 drivers/mtd/nand/nand_base.c   | 2 +-
 drivers/mtd/onenand/onenand_base.c | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/mtd/devices/docg3.c b/drivers/mtd/devices/docg3.c
index e7b2e43..6b516e1 100644
--- a/drivers/mtd/devices/docg3.c
+++ b/drivers/mtd/devices/docg3.c
@@ -1857,7 +1857,7 @@ static int __init doc_set_driver_info(int chip_id, struct 
mtd_info *mtd)
mtd->_read_oob = doc_read_oob;
mtd->_write_oob = doc_write_oob;
mtd->_block_isbad = doc_block_isbad;
-   mtd->ecclayout = _oobinfo;
+   mtd_set_ecclayout(mtd, _oobinfo);
mtd->oobavail = 8;
mtd->ecc_strength = DOC_ECC_BCH_T;
 
diff --git a/drivers/mtd/mtdconcat.c b/drivers/mtd/mtdconcat.c
index 239a8c8..481565e 100644
--- a/drivers/mtd/mtdconcat.c
+++ b/drivers/mtd/mtdconcat.c
@@ -777,7 +777,7 @@ struct mtd_info *mtd_concat_create(struct mtd_info 
*subdev[],   /* subdevices to c
 
}
 
-   concat->mtd.ecclayout = subdev[0]->ecclayout;
+   mtd_set_ecclayout(>mtd, subdev[0]->ecclayout);
 
concat->num_subdev = num_devs;
concat->mtd.name = name;
diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index c32b127..244faa8 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -536,7 +536,7 @@ static struct mtd_part *allocate_partition(struct mtd_info 
*master,
part->name);
}
 
-   slave->mtd.ecclayout = master->ecclayout;
+   mtd_set_ecclayout(>mtd, master->ecclayout);
slave->mtd.ecc_step_size = master->ecc_step_size;
slave->mtd.ecc_strength = master->ecc_strength;
slave->mtd.bitflip_threshold = master->bitflip_threshold;
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 30a0721..2b334cf 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -4365,7 +4365,7 @@ int nand_scan_tail(struct mtd_info *mtd)
mtd->writebufsize = mtd->writesize;
 
/* propagate ecc info to mtd_info */
-   mtd->ecclayout = ecc->layout;
+   mtd_set_ecclayout(mtd, ecc->layout);
mtd->ecc_strength = ecc->strength;
mtd->ecc_step_size = ecc->size;
/*
diff --git a/drivers/mtd/onenand/onenand_base.c 
b/drivers/mtd/onenand/onenand_base.c
index 25e6bf2..b5937b7 100644
--- a/drivers/mtd/onenand/onenand_base.c
+++ b/drivers/mtd/onenand/onenand_base.c
@@ -4059,7 +4059,7 @@ int onenand_scan(struct mtd_info *mtd, int maxchips)
 mtd_oobfree(mtd, i++, ))
mtd->oobavail += oobfree.length;
 
-   mtd->ecclayout = this->ecclayout;
+   mtd_set_ecclayout(mtd, this->ecclayout);
mtd->ecc_strength = 1;
 
/* Fill in remaining MTD driver data */
-- 
2.1.4

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[PATCH 13/23] mtd: add mtd_set_ecclayout() helper function

2015-12-07 Thread Boris Brezillon
Add an mtd_set_ecclayout() helper function to avoid direct accesses to the
mtd->ecclayout field. This will ease future refactor of ECC layout
definition.

Signed-off-by: Boris Brezillon 
---
 include/linux/mtd/mtd.h | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 25e3d0f..80e32fa 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -253,6 +253,12 @@ struct mtd_info {
int usecount;
 };
 
+static inline void mtd_set_ecclayout(struct mtd_info *mtd,
+struct nand_ecclayout *ecclayout)
+{
+   mtd->ecclayout = ecclayout;
+}
+
 static inline int mtd_eccpos(struct mtd_info *mtd, int eccbyte)
 {
if (!mtd->ecclayout)
-- 
2.1.4

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[PATCH 11/23] mtd: add mtd_eccpos(), mtd_oobfree() and mtd_eccbytes() helper functions

2015-12-07 Thread Boris Brezillon
In order to make the ecclayout definition completely dynamic we need to
rework the way these different ECC layouts are defined and iterated.

Create the mtd_eccpos(), mtd_oobfree() and mtd_eccbytes() helpers to hide
ecclayout definition internals to their users.

Signed-off-by: Boris Brezillon 
---
 include/linux/mtd/mtd.h | 32 
 1 file changed, 32 insertions(+)

diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 9cf13c4..25e3d0f 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -253,6 +253,38 @@ struct mtd_info {
int usecount;
 };
 
+static inline int mtd_eccpos(struct mtd_info *mtd, int eccbyte)
+{
+   if (!mtd->ecclayout)
+   return -ENOTSUPP;
+
+   if (eccbyte >= mtd->ecclayout->eccbytes)
+   return -ERANGE;
+
+   return mtd->ecclayout->eccpos[eccbyte];
+}
+
+static inline int mtd_oobfree(struct mtd_info *mtd, int section,
+ struct nand_oobfree *oobfree)
+{
+   memset(oobfree, 0, sizeof(*oobfree));
+
+   if (!mtd->ecclayout)
+   return -ENOTSUPP;
+
+   if (section >= MTD_MAX_OOBFREE_ENTRIES_LARGE)
+   return -ERANGE;
+
+   *oobfree = mtd->ecclayout->oobfree[section];
+
+   return 0;
+}
+
+static inline int mtd_eccbytes(struct mtd_info *mtd)
+{
+   return mtd->ecclayout ? mtd->ecclayout->eccbytes : 0;
+}
+
 static inline void mtd_set_of_node(struct mtd_info *mtd,
   struct device_node *np)
 {
-- 
2.1.4

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[PATCH 09/23] mtd: nand: vf610: remove useless mtd->ecclayout assignment

2015-12-07 Thread Boris Brezillon
The NAND core layer is already taking care of ecclayout propagation. Remove
this useless assignment.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/vf610_nfc.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/mtd/nand/vf610_nfc.c b/drivers/mtd/nand/vf610_nfc.c
index 1c86c6b..0413e24 100644
--- a/drivers/mtd/nand/vf610_nfc.c
+++ b/drivers/mtd/nand/vf610_nfc.c
@@ -794,8 +794,6 @@ static int vf610_nfc_probe(struct platform_device *pdev)
goto error;
}
 
-   /* propagate ecc.layout to mtd_info */
-   mtd->ecclayout = chip->ecc.layout;
chip->ecc.read_page = vf610_nfc_read_page;
chip->ecc.write_page = vf610_nfc_write_page;
 
-- 
2.1.4

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[PATCH 10/23] mtd: nand: simplify nand_bch_init() usage

2015-12-07 Thread Boris Brezillon
nand_bch_init() requires several arguments which could directly be deduced
from the mtd device. Get rid of those useless parameters.

nand_bch_init() is also requiring the caller to provide a proper eccbytes
value, while this value could be deduced from the ecc.size and
ecc.strength value. Fallback to eccbytes calculation when it is set to 0.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/nand_base.c |  6 ++
 drivers/mtd/nand/nand_bch.c  | 27 +--
 drivers/mtd/nand/omap2.c | 28 
 include/linux/mtd/nand_bch.h |  8 ++--
 4 files changed, 33 insertions(+), 36 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 1107f5c1..b99b442 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -4247,10 +4247,8 @@ int nand_scan_tail(struct mtd_info *mtd)
}
 
/* See nand_bch_init() for details. */
-   ecc->bytes = DIV_ROUND_UP(
-   ecc->strength * fls(8 * ecc->size), 8);
-   ecc->priv = nand_bch_init(mtd, ecc->size, ecc->bytes,
-  >layout);
+   ecc->bytes = 0;
+   ecc->priv = nand_bch_init(mtd);
if (!ecc->priv) {
pr_warn("BCH ECC initialization failed!\n");
BUG();
diff --git a/drivers/mtd/nand/nand_bch.c b/drivers/mtd/nand/nand_bch.c
index 3803e0b..3456c20 100644
--- a/drivers/mtd/nand/nand_bch.c
+++ b/drivers/mtd/nand/nand_bch.c
@@ -107,9 +107,6 @@ EXPORT_SYMBOL(nand_bch_correct_data);
 /**
  * nand_bch_init - [NAND Interface] Initialize NAND BCH error correction
  * @mtd:   MTD block structure
- * @eccsize:   ecc block size in bytes
- * @eccbytes:  ecc length in bytes
- * @ecclayout: output default layout
  *
  * Returns:
  *  a pointer to a new NAND BCH control structure, or NULL upon failure
@@ -123,14 +120,21 @@ EXPORT_SYMBOL(nand_bch_correct_data);
  * @eccsize = 512  (thus, m=13 is the smallest integer such that 2^m-1 > 512*8)
  * @eccbytes = 7   (7 bytes are required to store m*t = 13*4 = 52 bits)
  */
-struct nand_bch_control *
-nand_bch_init(struct mtd_info *mtd, unsigned int eccsize, unsigned int 
eccbytes,
- struct nand_ecclayout **ecclayout)
+struct nand_bch_control *nand_bch_init(struct mtd_info *mtd)
 {
+   struct nand_chip *nand = mtd_to_nand(mtd);
unsigned int m, t, eccsteps, i;
-   struct nand_ecclayout *layout;
+   struct nand_ecclayout *layout = nand->ecc.layout;
struct nand_bch_control *nbc = NULL;
unsigned char *erased_page;
+   unsigned int eccsize = nand->ecc.size;
+   unsigned int eccbytes = nand->ecc.bytes;
+   unsigned int eccstrength = nand->ecc.strength;
+
+   if (!eccbytes && eccstrength) {
+   eccbytes = DIV_ROUND_UP(eccstrength * fls(8 * eccsize), 8);
+   nand->ecc.bytes = eccbytes;
+   }
 
if (!eccsize || !eccbytes) {
printk(KERN_WARNING "ecc parameters not supplied\n");
@@ -158,7 +162,7 @@ nand_bch_init(struct mtd_info *mtd, unsigned int eccsize, 
unsigned int eccbytes,
eccsteps = mtd->writesize/eccsize;
 
/* if no ecc placement scheme was provided, build one */
-   if (!*ecclayout) {
+   if (!layout) {
 
/* handle large page devices only */
if (mtd->oobsize < 64) {
@@ -184,7 +188,7 @@ nand_bch_init(struct mtd_info *mtd, unsigned int eccsize, 
unsigned int eccbytes,
layout->oobfree[0].offset = 2;
layout->oobfree[0].length = mtd->oobsize-2-layout->eccbytes;
 
-   *ecclayout = layout;
+   nand->ecc.layout = layout;
}
 
/* sanity checks */
@@ -192,7 +196,7 @@ nand_bch_init(struct mtd_info *mtd, unsigned int eccsize, 
unsigned int eccbytes,
printk(KERN_WARNING "eccsize %u is too large\n", eccsize);
goto fail;
}
-   if ((*ecclayout)->eccbytes != (eccsteps*eccbytes)) {
+   if (layout->eccbytes != (eccsteps*eccbytes)) {
printk(KERN_WARNING "invalid ecc layout\n");
goto fail;
}
@@ -216,6 +220,9 @@ nand_bch_init(struct mtd_info *mtd, unsigned int eccsize, 
unsigned int eccbytes,
for (i = 0; i < eccbytes; i++)
nbc->eccmask[i] ^= 0xff;
 
+   if (!eccstrength)
+   nand->ecc.strength = (eccbytes * 8) / fls(8 * eccsize);
+
return nbc;
 fail:
nand_bch_free(nbc);
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index e307576..a2f015d 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -1820,13 +1820,19 @@ static int omap_nand_probe(struct platform_device *pdev)
goto return_error;
}
 
+   /*
+* Bail out earlier to let NAND_ECC_SOFT code create its own
+* 

[PATCH 08/23] mtd: nand: lpc32xx_mlc: fix ecc.size

2015-12-07 Thread Boris Brezillon
According to the ECC layout description the actual ecc.size is 512 bytes
and not mtd->writesize.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/lpc32xx_mlc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/lpc32xx_mlc.c b/drivers/mtd/nand/lpc32xx_mlc.c
index 57c4b71..0ee81a0 100644
--- a/drivers/mtd/nand/lpc32xx_mlc.c
+++ b/drivers/mtd/nand/lpc32xx_mlc.c
@@ -751,7 +751,7 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
}
 
nand_chip->ecc.mode = NAND_ECC_HW;
-   nand_chip->ecc.size = mtd->writesize;
+   nand_chip->ecc.size = 512;
nand_chip->ecc.layout = _nand_oob;
host->mlcsubpages = mtd->writesize / 512;
 
-- 
2.1.4

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[PATCH 01/23] mtd: kill the ecclayout->oobavail field

2015-12-07 Thread Boris Brezillon
ecclayout->oobavail is just redundant with the mtd->oobavail field.
Moreover, it prevents static const definition of ecc layouts since the
NAND framework is calculating this value based on the ecclayout->oobfree
field.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/devices/docg3.c   |  5 ++-
 drivers/mtd/mtdswap.c | 16 -
 drivers/mtd/nand/brcmnand/brcmnand.c  |  3 --
 drivers/mtd/nand/docg4.c  |  1 -
 drivers/mtd/nand/hisi504_nand.c   |  1 -
 drivers/mtd/nand/nand_base.c  | 12 +++
 drivers/mtd/onenand/onenand_base.c| 16 -
 drivers/mtd/tests/oobtest.c   | 49 +--
 drivers/staging/mt29f_spinand/mt29f_spinand.c |  1 -
 fs/jffs2/wbuf.c   |  6 ++--
 include/linux/mtd/mtd.h   |  1 -
 11 files changed, 48 insertions(+), 63 deletions(-)

diff --git a/drivers/mtd/devices/docg3.c b/drivers/mtd/devices/docg3.c
index c3a2695..e7b2e43 100644
--- a/drivers/mtd/devices/docg3.c
+++ b/drivers/mtd/devices/docg3.c
@@ -72,13 +72,11 @@ MODULE_PARM_DESC(reliable_mode, "Set the docg3 mode 
(0=normal MLC, 1=fast, "
  * @eccbytes: 8 bytes are used (1 for Hamming ECC, 7 for BCH ECC)
  * @eccpos: ecc positions (byte 7 is Hamming ECC, byte 8-14 are BCH ECC)
  * @oobfree: free pageinfo bytes (byte 0 until byte 6, byte 15
- * @oobavail: 8 available bytes remaining after ECC toll
  */
 static struct nand_ecclayout docg3_oobinfo = {
.eccbytes = 8,
.eccpos = {7, 8, 9, 10, 11, 12, 13, 14},
.oobfree = {{0, 7}, {15, 1} },
-   .oobavail = 8,
 };
 
 static inline u8 doc_readb(struct docg3 *docg3, u16 reg)
@@ -1438,7 +1436,7 @@ static int doc_write_oob(struct mtd_info *mtd, loff_t ofs,
oobdelta = mtd->oobsize;
break;
case MTD_OPS_AUTO_OOB:
-   oobdelta = mtd->ecclayout->oobavail;
+   oobdelta = mtd->oobavail;
break;
default:
return -EINVAL;
@@ -1860,6 +1858,7 @@ static int __init doc_set_driver_info(int chip_id, struct 
mtd_info *mtd)
mtd->_write_oob = doc_write_oob;
mtd->_block_isbad = doc_block_isbad;
mtd->ecclayout = _oobinfo;
+   mtd->oobavail = 8;
mtd->ecc_strength = DOC_ECC_BCH_T;
 
return 0;
diff --git a/drivers/mtd/mtdswap.c b/drivers/mtd/mtdswap.c
index fc8b3d1..d330eb1 100644
--- a/drivers/mtd/mtdswap.c
+++ b/drivers/mtd/mtdswap.c
@@ -346,7 +346,7 @@ static int mtdswap_read_markers(struct mtdswap_dev *d, 
struct swap_eb *eb)
if (mtd_can_have_bb(d->mtd) && mtd_block_isbad(d->mtd, offset))
return MTDSWAP_SCANNED_BAD;
 
-   ops.ooblen = 2 * d->mtd->ecclayout->oobavail;
+   ops.ooblen = 2 * d->mtd->oobavail;
ops.oobbuf = d->oob_buf;
ops.ooboffs = 0;
ops.datbuf = NULL;
@@ -359,7 +359,7 @@ static int mtdswap_read_markers(struct mtdswap_dev *d, 
struct swap_eb *eb)
 
data = (struct mtdswap_oobdata *)d->oob_buf;
data2 = (struct mtdswap_oobdata *)
-   (d->oob_buf + d->mtd->ecclayout->oobavail);
+   (d->oob_buf + d->mtd->oobavail);
 
if (le16_to_cpu(data->magic) == MTDSWAP_MAGIC_CLEAN) {
eb->erase_count = le32_to_cpu(data->count);
@@ -933,7 +933,7 @@ static unsigned int mtdswap_eblk_passes(struct mtdswap_dev 
*d,
 
ops.mode = MTD_OPS_AUTO_OOB;
ops.len = mtd->writesize;
-   ops.ooblen = mtd->ecclayout->oobavail;
+   ops.ooblen = mtd->oobavail;
ops.ooboffs = 0;
ops.datbuf = d->page_buf;
ops.oobbuf = d->oob_buf;
@@ -945,7 +945,7 @@ static unsigned int mtdswap_eblk_passes(struct mtdswap_dev 
*d,
for (i = 0; i < mtd_pages; i++) {
patt = mtdswap_test_patt(test + i);
memset(d->page_buf, patt, mtd->writesize);
-   memset(d->oob_buf, patt, mtd->ecclayout->oobavail);
+   memset(d->oob_buf, patt, mtd->oobavail);
ret = mtd_write_oob(mtd, pos, );
if (ret)
goto error;
@@ -964,7 +964,7 @@ static unsigned int mtdswap_eblk_passes(struct mtdswap_dev 
*d,
if (p1[j] != patt)
goto error;
 
-   for (j = 0; j < mtd->ecclayout->oobavail; j++)
+   for (j = 0; j < mtd->oobavail; j++)
if (p2[j] != (unsigned char)patt)
goto error;
 
@@ -1387,7 +1387,7 @@ static int mtdswap_init(struct mtdswap_dev *d, unsigned 
int eblocks,
if (!d->page_buf)
goto page_buf_fail;
 
-   d->oob_buf = kmalloc(2 * mtd->ecclayout->oobavail, GFP_KERNEL);
+   d->oob_buf = kmalloc(2 * mtd->oobavail, GFP_KERNEL);

[PATCH 06/23] mtd: nand: kill unused ->ecclayout field in platform_nand_chip struct

2015-12-07 Thread Boris Brezillon
This field is not set in any board file and can thus be dropped.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/plat_nand.c | 1 -
 include/linux/mtd/nand.h | 2 --
 2 files changed, 3 deletions(-)

diff --git a/drivers/mtd/nand/plat_nand.c b/drivers/mtd/nand/plat_nand.c
index 06ac6c6..71aaa09 100644
--- a/drivers/mtd/nand/plat_nand.c
+++ b/drivers/mtd/nand/plat_nand.c
@@ -74,7 +74,6 @@ static int plat_nand_probe(struct platform_device *pdev)
data->chip.bbt_options |= pdata->chip.bbt_options;
 
data->chip.ecc.hwctl = pdata->ctrl.hwcontrol;
-   data->chip.ecc.layout = pdata->chip.ecclayout;
data->chip.ecc.mode = NAND_ECC_SOFT;
 
platform_set_drvdata(pdev, data);
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index fad634e..cbedcb0 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -866,7 +866,6 @@ extern int nand_do_read(struct mtd_info *mtd, loff_t from, 
size_t len,
  * @chip_delay:R/B delay value in us
  * @options:   Option flags, e.g. 16bit buswidth
  * @bbt_options:   BBT option flags, e.g. NAND_BBT_USE_FLASH
- * @ecclayout: ECC layout info structure
  * @part_probe_types:  NULL-terminated array of probe types
  */
 struct platform_nand_chip {
@@ -874,7 +873,6 @@ struct platform_nand_chip {
int chip_offset;
int nr_partitions;
struct mtd_partition *partitions;
-   struct nand_ecclayout *ecclayout;
int chip_delay;
unsigned int options;
unsigned int bbt_options;
-- 
2.1.4

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[PATCH 05/23] mtd: nand: jz4770: kill the ->ecc_layout field

2015-12-07 Thread Boris Brezillon
->ecc_layout is not used by any board file. Kill this field to avoid any
confusion. New boards are encouraged to use the default ECC layout defined
in NAND core.

Signed-off-by: Boris Brezillon 
---
 arch/mips/include/asm/mach-jz4740/jz4740_nand.h | 2 --
 drivers/mtd/nand/jz4740_nand.c  | 3 ---
 2 files changed, 5 deletions(-)

diff --git a/arch/mips/include/asm/mach-jz4740/jz4740_nand.h 
b/arch/mips/include/asm/mach-jz4740/jz4740_nand.h
index 79cff26..398733e 100644
--- a/arch/mips/include/asm/mach-jz4740/jz4740_nand.h
+++ b/arch/mips/include/asm/mach-jz4740/jz4740_nand.h
@@ -25,8 +25,6 @@ struct jz_nand_platform_data {
int num_partitions;
struct mtd_partition*partitions;
 
-   struct nand_ecclayout   *ecc_layout;
-
unsigned char banks[JZ_NAND_NUM_BANKS];
 
void (*ident_callback)(struct platform_device *, struct nand_chip *,
diff --git a/drivers/mtd/nand/jz4740_nand.c b/drivers/mtd/nand/jz4740_nand.c
index 5a99a93..c4fe446 100644
--- a/drivers/mtd/nand/jz4740_nand.c
+++ b/drivers/mtd/nand/jz4740_nand.c
@@ -446,9 +446,6 @@ static int jz_nand_probe(struct platform_device *pdev)
chip->ecc.bytes = 9;
chip->ecc.strength  = 4;
 
-   if (pdata)
-   chip->ecc.layout = pdata->ecc_layout;
-
chip->chip_delay = 50;
chip->cmd_ctrl = jz_nand_cmd_ctrl;
chip->select_chip = jz_nand_select_chip;
-- 
2.1.4

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[PATCH 07/23] staging: mt29f_spinand: kill unused ecclayout field

2015-12-07 Thread Boris Brezillon
The spinand_info struct embeds a pointer to an ecclayout definition, but
this field is never used in the mt29f driver.

Signed-off-by: Boris Brezillon 
---
 drivers/staging/mt29f_spinand/mt29f_spinand.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/staging/mt29f_spinand/mt29f_spinand.h 
b/drivers/staging/mt29f_spinand/mt29f_spinand.h
index ae62975..457dc7f 100644
--- a/drivers/staging/mt29f_spinand/mt29f_spinand.h
+++ b/drivers/staging/mt29f_spinand/mt29f_spinand.h
@@ -78,7 +78,6 @@
 #define BL_ALL_UNLOCKED0
 
 struct spinand_info {
-   struct nand_ecclayout *ecclayout;
struct spi_device *spi;
void *priv;
 };
-- 
2.1.4

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[PATCH 04/23] mtd: nand: s3c2410: kill the ->ecc_layout field

2015-12-07 Thread Boris Brezillon
The s3c2410 is allowing board data to overload the default ECC layout
defined inside the driver, but this feature is not used by board
specific definitions.
Kill this field so that we can easily move to a model where ecclayout
are dynamically allocated by the NAND controller driver.

Signed-off-by: Boris Brezillon 
---
 arch/arm/plat-samsung/devs.c   | 9 -
 drivers/mtd/nand/s3c2410.c | 3 ---
 include/linux/platform_data/mtd-nand-s3c2410.h | 1 -
 3 files changed, 13 deletions(-)

diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 8207462..a903ee8 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -710,15 +710,6 @@ static int __init s3c_nand_copy_set(struct 
s3c2410_nand_set *set)
return -ENOMEM;
}
 
-   if (set->ecc_layout) {
-   ptr = kmemdup(set->ecc_layout,
- sizeof(struct nand_ecclayout), GFP_KERNEL);
-   set->ecc_layout = ptr;
-
-   if (!ptr)
-   return -ENOMEM;
-   }
-
return 0;
 }
 
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 05105ca..b569200 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -860,9 +860,6 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info 
*info,
chip->ecc.mode  = NAND_ECC_SOFT;
 #endif
 
-   if (set->ecc_layout != NULL)
-   chip->ecc.layout = set->ecc_layout;
-
if (set->disable_ecc)
chip->ecc.mode  = NAND_ECC_NONE;
 
diff --git a/include/linux/platform_data/mtd-nand-s3c2410.h 
b/include/linux/platform_data/mtd-nand-s3c2410.h
index 36bb921..c55e42ee 100644
--- a/include/linux/platform_data/mtd-nand-s3c2410.h
+++ b/include/linux/platform_data/mtd-nand-s3c2410.h
@@ -40,7 +40,6 @@ struct s3c2410_nand_set {
char*name;
int *nr_map;
struct mtd_partition*partitions;
-   struct nand_ecclayout   *ecc_layout;
 };
 
 struct s3c2410_platform_nand {
-- 
2.1.4

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[PATCH 02/23] mtd: inftl: kill unused oobinfo field

2015-12-07 Thread Boris Brezillon
Signed-off-by: Boris Brezillon 
---
 include/linux/mtd/inftl.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/linux/mtd/inftl.h b/include/linux/mtd/inftl.h
index 02cd5f9..8255118 100644
--- a/include/linux/mtd/inftl.h
+++ b/include/linux/mtd/inftl.h
@@ -44,7 +44,6 @@ struct INFTLrecord {
unsigned int nb_blocks; /* number of physical blocks */
unsigned int nb_boot_blocks;/* number of blocks used by the bios */
struct erase_info instr;
-   struct nand_ecclayout oobinfo;
 };
 
 int INFTL_mount(struct INFTLrecord *s);
-- 
2.1.4

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[PATCH 00/23] mtd: rework ECC layout definition

2015-12-07 Thread Boris Brezillon
Hello,

This patchset aims at getting rid of the nand_ecclayout limitations.
struct nand_ecclayout is defining fixed eccpos and oobfree arrays which
can only be increased by modifying the MTD_MAX_ECCPOS_ENTRIES_LARGE and
MTD_MAX_OOBFREE_ENTRIES_LARGE macros.
This approach forces us to modify the macro values each time we add a
new NAND chip with a bigger OOB area, and increasing these arrays also
penalize all platforms, even those who only support small NAND devices
(with small OOB area).

The idea to overcome this limitation, is to define the ECC/OOB layout
by the mean of two functions: ->eccpos() and ->oobfree(), which will
basically return the same information has those stored in the
nand_ecclayout struct.

Another advantage of this solution is that ECC layouts are usually
following a repetitive pattern (i.e. leave X bytes free and put Y bytes
of ECC per ECC chunk), which allows one to implement the ->eccpos()
and ->oobfree() functions with a simple logic that can be applied
to any size of OOB.

Patches 1 to 10 are just cleanups or trivial fixes that can be taken
independently.

Patch 19 is just an aggregate of several smaller commits (one per
driver), and has been submitted this way to limit the size of the
series. If everybody agrees on this approach, I'll resubmit the series
will those changes separated in different commits (as done here [1]).

Also note that the last two commits are removing the nand_ecclayout
definition, thus preventing any new driver to use this structure.
Of course, this step can be delayed if some of the previous patches
are not accepted.

Best Regards,

Boris

[1]https://github.com/bbrezillon/linux-sunxi/commits/nand/ecclayout2

Boris Brezillon (23):
  mtd: kill the ecclayout->oobavail field
  mtd: inftl: kill unused oobinfo field
  mtd: nftl: kill unused oobinfo field
  mtd: nand: s3c2410: kill the ->ecc_layout field
  mtd: nand: jz4770: kill the ->ecc_layout field
  mtd: nand: kill unused ->ecclayout field in platform_nand_chip struct
  staging: mt29f_spinand: kill unused ecclayout field
  mtd: nand: lpc32xx_mlc: fix ecc.size
  mtd: nand: vf610: remove useless mtd->ecclayout assignment
  mtd: nand: simplify nand_bch_init() usage
  mtd: add mtd_eccpos(), mtd_oobfree() and mtd_eccbytes() helper
functions
  mtd: use mtd_eccpos() and mtd_oobfree() where appropriate
  mtd: add mtd_set_ecclayout() helper function
  mtd: use mtd_set_ecclayout() where appropriate
  mtd: create an mtd_ooblayout_ops struct to ease ECC layout definition
  mtd: docg3: switch to mtd_ooblayout_ops
  mtd: nand: implement the default mtd_ooblayout_ops
  mtd: nand: bch: switch to nand_ecclayout_pos
  mtd: nand: switch all drivers to mtd_ooblayout_ops
  mtd: onenand: switch to mtd_ooblayout_ops
  staging: mt29f_spinand: switch to mtd_ooblayout_ops
  mtd: nand: kill layout field
  mtd: kill the nand_ecclayout struct

 arch/arm/mach-pxa/spitz.c   |  41 +++-
 arch/arm/plat-samsung/devs.c|   9 -
 arch/mips/include/asm/mach-jz4740/jz4740_nand.h |   4 +-
 arch/mips/jz4740/board-qi_lb60.c|  83 ---
 drivers/mtd/devices/docg3.c |  39 +++-
 drivers/mtd/mtdchar.c   |  95 +---
 drivers/mtd/mtdconcat.c |   2 +-
 drivers/mtd/mtdpart.c   |  22 +-
 drivers/mtd/mtdswap.c   |  20 +-
 drivers/mtd/nand/atmel_nand.c   | 100 
 drivers/mtd/nand/bf5xx_nand.c   |  47 ++--
 drivers/mtd/nand/brcmnand/brcmnand.c| 258 -
 drivers/mtd/nand/cafe_nand.c|  42 +++-
 drivers/mtd/nand/davinci_nand.c | 114 -
 drivers/mtd/nand/denali.c   |  48 ++--
 drivers/mtd/nand/diskonchip.c   |  34 ++-
 drivers/mtd/nand/docg4.c|  30 ++-
 drivers/mtd/nand/fsl_elbc_nand.c|  79 ---
 drivers/mtd/nand/fsl_ifc_nand.c | 226 +-
 drivers/mtd/nand/fsmc_nand.c| 294 +++-
 drivers/mtd/nand/gpmi-nand/gpmi-nand.c  |  57 +++--
 drivers/mtd/nand/hisi504_nand.c |  27 ++-
 drivers/mtd/nand/jz4740_nand.c  |   5 +-
 drivers/mtd/nand/lpc32xx_mlc.c  |  51 ++--
 drivers/mtd/nand/lpc32xx_slc.c  |  41 +++-
 drivers/mtd/nand/mxc_nand.c | 206 -
 drivers/mtd/nand/nand_base.c| 229 ++
 drivers/mtd/nand/nand_bch.c |  45 ++--
 drivers/mtd/nand/omap2.c| 219 ++
 drivers/mtd/nand/plat_nand.c|   1 -
 drivers/mtd/nand/pxa3xx_nand.c  | 101 
 drivers/mtd/nand/s3c2410.c  |  31 ++-
 drivers/mtd/nand/sh_flctl.c |  80 +--
 drivers/mtd/nand/sharpsl.c  |  

Re: [PATCH 09/23] mtd: nand: vf610: remove useless mtd->ecclayout assignment

2015-12-07 Thread Stefan Agner
On 2015-12-07 14:26, Boris Brezillon wrote:
> The NAND core layer is already taking care of ecclayout propagation. Remove
> this useless assignment.

Thx! I see, nand_scan_tail takes care of that...

Acked-by: Stefan Agner 

> 
> Signed-off-by: Boris Brezillon 
> ---
>  drivers/mtd/nand/vf610_nfc.c | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/drivers/mtd/nand/vf610_nfc.c b/drivers/mtd/nand/vf610_nfc.c
> index 1c86c6b..0413e24 100644
> --- a/drivers/mtd/nand/vf610_nfc.c
> +++ b/drivers/mtd/nand/vf610_nfc.c
> @@ -794,8 +794,6 @@ static int vf610_nfc_probe(struct platform_device *pdev)
>   goto error;
>   }
>  
> - /* propagate ecc.layout to mtd_info */
> - mtd->ecclayout = chip->ecc.layout;
>   chip->ecc.read_page = vf610_nfc_read_page;
>   chip->ecc.write_page = vf610_nfc_write_page;
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Re: [PATCH 12/23] mtd: use mtd_eccpos() and mtd_oobfree() where appropriate

2015-12-07 Thread kbuild test robot
Hi Boris,

[auto build test ERROR on next-20151207]
[cannot apply to staging/staging-testing v4.4-rc4 v4.4-rc3 v4.4-rc2 v4.4-rc4]

url:
https://github.com/0day-ci/linux/commits/Boris-Brezillon/mtd-rework-ECC-layout-definition/20151208-063127
config: i386-randconfig-x006-12070758 (attached as .config)
reproduce:
# save the attached .config to linux build tree
make ARCH=i386 

All error/warnings (new ones prefixed by >>):

   In file included from include/linux/linkage.h:4:0,
from include/linux/kernel.h:6,
from drivers/mtd/mtdswap.c:27:
   drivers/mtd/mtdswap.c: In function 'mtdswap_add_mtd':
>> drivers/mtd/mtdswap.c:1449:6: error: too few arguments to function 
>> 'mtd_oobfree'
 if (mtd_oobfree(mtd, 0) < 0) {
 ^
   include/linux/compiler.h:147:28: note: in definition of macro '__trace_if'
 if (__builtin_constant_p((cond)) ? !!(cond) :   \
   ^
>> drivers/mtd/mtdswap.c:1449:2: note: in expansion of macro 'if'
 if (mtd_oobfree(mtd, 0) < 0) {
 ^
   In file included from drivers/mtd/mtdswap.c:29:0:
   include/linux/mtd/mtd.h:267:19: note: declared here
static inline int mtd_oobfree(struct mtd_info *mtd, int section,
  ^
   In file included from include/linux/linkage.h:4:0,
from include/linux/kernel.h:6,
from drivers/mtd/mtdswap.c:27:
>> drivers/mtd/mtdswap.c:1449:6: error: too few arguments to function 
>> 'mtd_oobfree'
 if (mtd_oobfree(mtd, 0) < 0) {
 ^
   include/linux/compiler.h:147:40: note: in definition of macro '__trace_if'
 if (__builtin_constant_p((cond)) ? !!(cond) :   \
   ^
>> drivers/mtd/mtdswap.c:1449:2: note: in expansion of macro 'if'
 if (mtd_oobfree(mtd, 0) < 0) {
 ^
   In file included from drivers/mtd/mtdswap.c:29:0:
   include/linux/mtd/mtd.h:267:19: note: declared here
static inline int mtd_oobfree(struct mtd_info *mtd, int section,
  ^
   In file included from include/linux/linkage.h:4:0,
from include/linux/kernel.h:6,
from drivers/mtd/mtdswap.c:27:
>> drivers/mtd/mtdswap.c:1449:6: error: too few arguments to function 
>> 'mtd_oobfree'
 if (mtd_oobfree(mtd, 0) < 0) {
 ^
   include/linux/compiler.h:158:16: note: in definition of macro '__trace_if'
  __r = !!(cond); \
   ^
>> drivers/mtd/mtdswap.c:1449:2: note: in expansion of macro 'if'
 if (mtd_oobfree(mtd, 0) < 0) {
 ^
   In file included from drivers/mtd/mtdswap.c:29:0:
   include/linux/mtd/mtd.h:267:19: note: declared here
static inline int mtd_oobfree(struct mtd_info *mtd, int section,
  ^

vim +/mtd_oobfree +1449 drivers/mtd/mtdswap.c

  1443  if (PAGE_SIZE % mtd->writesize || mtd->writesize > PAGE_SIZE) {
  1444  printk(KERN_ERR "%s: PAGE_SIZE %lu not multiple of 
write size"
  1445  " %u\n", MTDSWAP_PREFIX, PAGE_SIZE, 
mtd->writesize);
  1446  return;
  1447  }
  1448  
> 1449  if (mtd_oobfree(mtd, 0) < 0) {
  1450  printk(KERN_ERR "%s: mtd%d does not have OOB\n",
  1451  MTDSWAP_PREFIX, mtd->index);
  1452  return;

---
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.config.gz
Description: Binary data


Re: [PATCH 22/23] mtd: nand: kill layout field

2015-12-07 Thread kbuild test robot
Hi Boris,

[auto build test ERROR on next-20151207]
[cannot apply to staging/staging-testing v4.4-rc4 v4.4-rc3 v4.4-rc2 v4.4-rc4]

url:
https://github.com/0day-ci/linux/commits/Boris-Brezillon/mtd-rework-ECC-layout-definition/20151208-063127
config: powerpc-allyesconfig (attached as .config)
reproduce:
wget 
https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
 -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=powerpc 

All error/warnings (new ones prefixed by >>):

   In file included from include/linux/printk.h:277:0,
from include/linux/kernel.h:13,
from include/linux/list.h:8,
from include/linux/module.h:9,
from drivers/mtd/nand/fsl_elbc_nand.c:25:
   drivers/mtd/nand/fsl_elbc_nand.c: In function 'fsl_elbc_chip_init_tail':
>> drivers/mtd/nand/fsl_elbc_nand.c:683:19: error: 'struct nand_ecc_ctrl' has 
>> no member named 'layout'
 chip->ecc.layout);
  ^
   include/linux/dynamic_debug.h:87:9: note: in definition of macro 
'dynamic_dev_dbg'
  ##__VA_ARGS__);  \
^
>> drivers/mtd/nand/fsl_elbc_nand.c:682:2: note: in expansion of macro 'dev_dbg'
 dev_dbg(priv->dev, "fsl_elbc_init: nand->ecc.layout = %p\n",
 ^
   drivers/mtd/nand/fsl_elbc_nand.c: In function 'fsl_elbc_chip_init':
   drivers/mtd/nand/fsl_elbc_nand.c:797:34: error: 'fsl_elbc_ooblayout_op' 
undeclared (first use in this function)
  mtd_set_ooblayout(>mtd, _elbc_ooblayout_op);
 ^
   drivers/mtd/nand/fsl_elbc_nand.c:797:34: note: each undeclared identifier is 
reported only once for each function it appears in

vim +683 drivers/mtd/nand/fsl_elbc_nand.c

3ab8f2a2 Roy Zang   2010-10-18  676 dev_dbg(priv->dev, "fsl_elbc_init: 
nand->ecc.steps = %d\n",
76b10467 Scott Wood 2008-02-06  677 chip->ecc.steps);
3ab8f2a2 Roy Zang   2010-10-18  678 dev_dbg(priv->dev, "fsl_elbc_init: 
nand->ecc.bytes = %d\n",
76b10467 Scott Wood 2008-02-06  679 chip->ecc.bytes);
3ab8f2a2 Roy Zang   2010-10-18  680 dev_dbg(priv->dev, "fsl_elbc_init: 
nand->ecc.total = %d\n",
76b10467 Scott Wood 2008-02-06  681 chip->ecc.total);
3ab8f2a2 Roy Zang   2010-10-18 @682 dev_dbg(priv->dev, "fsl_elbc_init: 
nand->ecc.layout = %p\n",
76b10467 Scott Wood 2008-02-06 @683 chip->ecc.layout);
3ab8f2a2 Roy Zang   2010-10-18  684 dev_dbg(priv->dev, "fsl_elbc_init: 
mtd->flags = %08x\n", mtd->flags);
3ab8f2a2 Roy Zang   2010-10-18  685 dev_dbg(priv->dev, "fsl_elbc_init: 
mtd->size = %lld\n", mtd->size);
3ab8f2a2 Roy Zang   2010-10-18  686 dev_dbg(priv->dev, "fsl_elbc_init: 
mtd->erasesize = %d\n",

:: The code at line 683 was first introduced by commit
:: 76b104671632c225ad594a50f9e26ada67bc0a74 [MTD] [NAND] Freescale enhanced 
Local Bus Controller FCM NAND support.

:: TO: Scott Wood <scottw...@freescale.com>
:: CC: David Woodhouse <dw...@infradead.org>

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: Binary data


Re: [PATCH 12/23] mtd: use mtd_eccpos() and mtd_oobfree() where appropriate

2015-12-07 Thread kbuild test robot
Hi Boris,

[auto build test WARNING on next-20151207]
[cannot apply to staging/staging-testing v4.4-rc4 v4.4-rc3 v4.4-rc2 v4.4-rc4]

url:
https://github.com/0day-ci/linux/commits/Boris-Brezillon/mtd-rework-ECC-layout-definition/20151208-063127
reproduce: make htmldocs

All warnings (new ones prefixed by >>):

>> drivers/mtd/nand/nand_base.c:1607: warning: No description found for 
>> parameter 'mtd'
>> drivers/mtd/nand/nand_base.c:1607: warning: Excess function parameter 'chip' 
>> description in 'nand_transfer_oob'
>> drivers/mtd/nand/nand_base.c:1607: warning: No description found for 
>> parameter 'mtd'
>> drivers/mtd/nand/nand_base.c:1607: warning: Excess function parameter 'chip' 
>> description in 'nand_transfer_oob'

vim +/mtd +1607 drivers/mtd/nand/nand_base.c

7e4178f9 Vitaly Wool 2006-06-07  1591   i = mtd->oobsize - (oob - 
chip->oob_poi);
f5bbdacc Thomas Gleixner 2006-05-25  1592   if (i)
f5bbdacc Thomas Gleixner 2006-05-25  1593   chip->read_buf(mtd, 
oob, i);
f5bbdacc Thomas Gleixner 2006-05-25  1594  
3f91e94f Mike Dunn   2012-04-25  1595   return max_bitflips;
^1da177e Linus Torvalds  2005-04-16  1596  }
^1da177e Linus Torvalds  2005-04-16  1597  
f5bbdacc Thomas Gleixner 2006-05-25  1598  /**
7854d3f7 Brian Norris2011-06-23  1599   * nand_transfer_oob - [INTERN] 
Transfer oob to client buffer
8593fbc6 Thomas Gleixner 2006-05-29  1600   * @chip: nand chip structure
844d3b42 Randy Dunlap2006-06-28  1601   * @oob: oob destination address
8593fbc6 Thomas Gleixner 2006-05-29  1602   * @ops: oob ops structure
7014568b Vitaly Wool 2006-11-03  1603   * @len: size of oob to transfer
8593fbc6 Thomas Gleixner 2006-05-29  1604   */
64456fac Boris Brezillon 2015-12-07  1605  static uint8_t 
*nand_transfer_oob(struct mtd_info *mtd, uint8_t *oob,
7014568b Vitaly Wool 2006-11-03  1606 
struct mtd_oob_ops *ops, size_t len)
8593fbc6 Thomas Gleixner 2006-05-29 @1607  {
64456fac Boris Brezillon 2015-12-07  1608   struct nand_chip *chip = 
mtd->priv;
64456fac Boris Brezillon 2015-12-07  1609  
8593fbc6 Thomas Gleixner 2006-05-29  1610   switch (ops->mode) {
8593fbc6 Thomas Gleixner 2006-05-29  1611  
0612b9dd Brian Norris2011-08-30  1612   case MTD_OPS_PLACE_OOB:
0612b9dd Brian Norris2011-08-30  1613   case MTD_OPS_RAW:
8593fbc6 Thomas Gleixner 2006-05-29  1614   memcpy(oob, 
chip->oob_poi + ops->ooboffs, len);
8593fbc6 Thomas Gleixner 2006-05-29  1615   return oob + len;

:: The code at line 1607 was first introduced by commit
:: 8593fbc68b0df1168995de76d1af38eb62fd6b62 [MTD] Rework the out of band 
handling completely

:: TO: Thomas Gleixner <t...@cruncher.tec.linutronix.de>
:: CC: Thomas Gleixner <t...@cruncher.tec.linutronix.de>

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: Binary data


Re: [linux-sunxi] [PATCH 21/23] staging: mt29f_spinand: switch to mtd_ooblayout_ops

2015-12-07 Thread Julian Calaby
Hi Boris,

On Tue, Dec 8, 2015 at 9:26 AM, Boris Brezillon
 wrote:
> Signed-off-by: Boris Brezillon 
> ---
>  drivers/staging/mt29f_spinand/mt29f_spinand.c | 44 
> ---
>  1 file changed, 26 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/staging/mt29f_spinand/mt29f_spinand.c 
> b/drivers/staging/mt29f_spinand/mt29f_spinand.c
> index cb9d5ab..967d50a 100644
> --- a/drivers/staging/mt29f_spinand/mt29f_spinand.c
> +++ b/drivers/staging/mt29f_spinand/mt29f_spinand.c
> @@ -42,23 +42,29 @@ static inline struct spinand_state *mtd_to_state(struct 
> mtd_info *mtd)
>  static int enable_hw_ecc;
>  static int enable_read_hw_ecc;
>
> -static struct nand_ecclayout spinand_oob_64 = {
> -   .eccbytes = 24,
> -   .eccpos = {
> -   1, 2, 3, 4, 5, 6,
> -   17, 18, 19, 20, 21, 22,
> -   33, 34, 35, 36, 37, 38,
> -   49, 50, 51, 52, 53, 54, },
> -   .oobfree = {
> -   {.offset = 8,
> -   .length = 8},
> -   {.offset = 24,
> -   .length = 8},
> -   {.offset = 40,
> -   .length = 8},
> -   {.offset = 56,
> -   .length = 8},
> -   }
> +static int spinand_oob_64_eccpos(struct mtd_info *mtd, int eccbyte)
> +{
> +   if (eccbyte > 23)
> +   return -ERANGE;
> +
> +   return ((eccbyte / 6) * 16) + 1;

Are you sure this is correct? My reading of this is that we'd get 1
for eccbytes 0 through 5.

Would

((eccbyte / 6) * 16) + (eccbyte % 6) + 1

be more correct?

Thanks,

-- 
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Email: julian.cal...@gmail.com
Profile: http://www.google.com/profiles/julian.calaby/
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[PATCH v4 2/8] clk: samsung: exynos5420: add cpu clock configuration data and instantiate cpu clock

2015-12-07 Thread Bartlomiej Zolnierkiewicz
From: Thomas Abraham 

With the addition of the new Samsung specific cpu-clock type, the
arm clock can be represented as a cpu-clock type. Add the CPU clock
configuration data and instantiate the CPU clock type for Exynos5420.

Changes by Bartlomiej:
- split Exynos5420 support from the original patches
- moved E5420_[EGL,KFC]_DIV0() macros to clk-exynos5420.c

Cc: Tomasz Figa 
Cc: Mike Turquette 
Cc: Javier Martinez Canillas 
Acked-by: Sylwester Nawrocki 
Signed-off-by: Thomas Abraham 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 drivers/clk/samsung/clk-exynos5420.c   | 58 --
 include/dt-bindings/clock/exynos5420.h |  2 ++
 2 files changed, 58 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos5420.c 
b/drivers/clk/samsung/clk-exynos5420.c
index 389af3c..2a92546 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -18,6 +18,7 @@
 #include 
 
 #include "clk.h"
+#include "clk-cpu.h"
 
 #define APLL_LOCK  0x0
 #define APLL_CON0  0x100
@@ -616,9 +617,11 @@ static struct samsung_mux_clock exynos5x_mux_clks[] 
__initdata = {
MUX(0, "mout_mspll_kfc", mout_mspll_cpu_p, SRC_TOP7, 8, 2),
MUX(0, "mout_mspll_cpu", mout_mspll_cpu_p, SRC_TOP7, 12, 2),
 
-   MUX(0, "mout_apll", mout_apll_p, SRC_CPU, 0, 1),
+   MUX_F(0, "mout_apll", mout_apll_p, SRC_CPU, 0, 1,
+ CLK_SET_RATE_PARENT | CLK_RECALC_NEW_RATES, 0),
MUX(0, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1),
-   MUX(0, "mout_kpll", mout_kpll_p, SRC_KFC, 0, 1),
+   MUX_F(0, "mout_kpll", mout_kpll_p, SRC_KFC, 0, 1,
+ CLK_SET_RATE_PARENT | CLK_RECALC_NEW_RATES, 0),
MUX(0, "mout_kfc", mout_kfc_p, SRC_KFC, 16, 1),
 
MUX(0, "mout_aclk200", mout_group1_p, SRC_TOP0, 8, 2),
@@ -1246,6 +1249,50 @@ static struct samsung_pll_clock exynos5x_plls[nr_plls] 
__initdata = {
KPLL_CON0, NULL),
 };
 
+#define E5420_EGL_DIV0(apll, pclk_dbg, atb, cpud)  \
+   apll) << 24) | ((pclk_dbg) << 20) | ((atb) << 16) | \
+((cpud) << 4)))
+
+static const struct exynos_cpuclk_cfg_data exynos5420_eglclk_d[] __initconst = 
{
+   { 180, E5420_EGL_DIV0(3, 7, 7, 4), },
+   { 170, E5420_EGL_DIV0(3, 7, 7, 3), },
+   { 160, E5420_EGL_DIV0(3, 7, 7, 3), },
+   { 150, E5420_EGL_DIV0(3, 7, 7, 3), },
+   { 140, E5420_EGL_DIV0(3, 7, 7, 3), },
+   { 130, E5420_EGL_DIV0(3, 7, 7, 2), },
+   { 120, E5420_EGL_DIV0(3, 7, 7, 2), },
+   { 110, E5420_EGL_DIV0(3, 7, 7, 2), },
+   { 100, E5420_EGL_DIV0(3, 6, 6, 2), },
+   {  90, E5420_EGL_DIV0(3, 6, 6, 2), },
+   {  80, E5420_EGL_DIV0(3, 5, 5, 2), },
+   {  70, E5420_EGL_DIV0(3, 5, 5, 2), },
+   {  60, E5420_EGL_DIV0(3, 4, 4, 2), },
+   {  50, E5420_EGL_DIV0(3, 3, 3, 2), },
+   {  40, E5420_EGL_DIV0(3, 3, 3, 2), },
+   {  30, E5420_EGL_DIV0(3, 3, 3, 2), },
+   {  20, E5420_EGL_DIV0(3, 3, 3, 2), },
+   {  0 },
+};
+
+#define E5420_KFC_DIV(kpll, pclk, aclk)
\
+   kpll) << 24) | ((pclk) << 20) | ((aclk) << 4)))
+
+static const struct exynos_cpuclk_cfg_data exynos5420_kfcclk_d[] __initconst = 
{
+   { 130, E5420_KFC_DIV(3, 5, 2), },
+   { 120, E5420_KFC_DIV(3, 5, 2), },
+   { 110, E5420_KFC_DIV(3, 5, 2), },
+   { 100, E5420_KFC_DIV(3, 5, 2), },
+   {  90, E5420_KFC_DIV(3, 5, 2), },
+   {  80, E5420_KFC_DIV(3, 5, 2), },
+   {  70, E5420_KFC_DIV(3, 4, 2), },
+   {  60, E5420_KFC_DIV(3, 4, 2), },
+   {  50, E5420_KFC_DIV(3, 4, 2), },
+   {  40, E5420_KFC_DIV(3, 3, 2), },
+   {  30, E5420_KFC_DIV(3, 3, 2), },
+   {  20, E5420_KFC_DIV(3, 3, 2), },
+   {  0 },
+};
+
 static const struct of_device_id ext_clk_match[] __initconst = {
{ .compatible = "samsung,exynos5420-oscclk", .data = (void *)0, },
{ },
@@ -1310,6 +1357,13 @@ static void __init exynos5x_clk_init(struct device_node 
*np,
ARRAY_SIZE(exynos5800_gate_clks));
}
 
+   exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk",
+   mout_cpu_p[0], mout_cpu_p[1], 0x200,
+   exynos5420_eglclk_d, ARRAY_SIZE(exynos5420_eglclk_d), 0);
+   exynos_register_cpu_clock(ctx, CLK_KFC_CLK, "kfcclk",
+   mout_kfc_p[0], mout_kfc_p[1], 0x28200,
+   exynos5420_kfcclk_d, ARRAY_SIZE(exynos5420_kfcclk_d), 0);
+
exynos5420_clk_sleep_init();
 
samsung_clk_of_add_provider(np, ctx);
diff --git a/include/dt-bindings/clock/exynos5420.h 
b/include/dt-bindings/clock/exynos5420.h
index 99da0d1..dde9664 100644
--- 

[PATCH v4 1/8] ARM: dts: Exynos542x/5800: add cluster regulator supply properties

2015-12-07 Thread Bartlomiej Zolnierkiewicz
Add cluster regulator supply properties as a preparation to
adding generic cpufreq-dt driver support for Exynos542x and
Exynos5800 based boards.

Cc: Kukjin Kim 
Cc: Doug Anderson 
Cc: Javier Martinez Canillas 
Cc: Andreas Faerber 
Cc: Sachin Kamat 
Cc: Thomas Abraham 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 arch/arm/boot/dts/exynos5420-arndale-octa.dts   | 8 
 arch/arm/boot/dts/exynos5420-peach-pit.dts  | 8 
 arch/arm/boot/dts/exynos5420-smdk5420.dts   | 8 
 arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts | 8 
 arch/arm/boot/dts/exynos5422-odroidxu3.dts  | 8 
 arch/arm/boot/dts/exynos5422-odroidxu4.dts  | 8 
 arch/arm/boot/dts/exynos5800-peach-pi.dts   | 8 
 7 files changed, 56 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts 
b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
index 4ecef69..4229641 100644
--- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
+++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
@@ -52,6 +52,14 @@
};
 };
 
+ {
+   cpu-supply = <_reg>;
+};
+
+ {
+   cpu-supply = <_reg>;
+};
+
 _dwc3_1 {
dr_mode = "host";
 };
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts 
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 35cfb07..30f146b 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -676,6 +676,14 @@
};
 };
 
+ {
+   cpu-supply = <_reg>;
+};
+
+ {
+   cpu-supply = <_reg>;
+};
+
 _2 {
status = "okay";
samsung,i2c-sda-delay = <100>;
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts 
b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index ac35aef..fdfe4e6 100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -423,3 +423,11 @@
 _phy1 {
vbus-supply = <_vbus_reg>;
 };
+
+ {
+   cpu-supply = <_reg>;
+};
+
+ {
+   cpu-supply = <_reg>;
+};
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 
b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
index 2ae1cf4..0bfd981 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
@@ -54,6 +54,14 @@
};
 };
 
+ {
+   cpu-supply = <_reg>;
+};
+
+ {
+   cpu-supply = <_reg>;
+};
+
  {
/*
 * PWM 0 -- fan
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts 
b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
index 432406d..b19561c 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
@@ -53,6 +53,14 @@
};
 };
 
+ {
+   cpu-supply = <_reg>;
+};
+
+ {
+   cpu-supply = <_reg>;
+};
+
 _0 {
status = "okay";
 
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu4.dts 
b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
index 2faf886..bdc7106 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu4.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
@@ -32,6 +32,14 @@
};
 };
 
+ {
+   cpu-supply = <_reg>;
+};
+
+ {
+   cpu-supply = <_reg>;
+};
+
  {
/*
 * PWM 0 -- fan
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts 
b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index 7b018e4..03ff1ceb 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -638,6 +638,14 @@
};
 };
 
+ {
+   cpu-supply = <_reg>;
+};
+
+ {
+   cpu-supply = <_reg>;
+};
+
 _2 {
status = "okay";
samsung,i2c-sda-delay = <100>;
-- 
1.9.1

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[PATCH v4 3/8] ARM: dts: Exynos5420: add CPU OPP properties

2015-12-07 Thread Bartlomiej Zolnierkiewicz
From: Thomas Abraham 

For Exynos5420 platforms, add CPU operating points for
migrating from Exynos specific cpufreq driver to using
generic cpufreq driver.

Changes by Bartlomiej:
- split Exynos5420 support from the original patch

Changes by Ben Gamari:
- Port to operating-points-v2

Cc: Kukjin Kim 
Cc: Doug Anderson 
Cc: Javier Martinez Canillas 
Cc: Andreas Faerber 
Cc: Sachin Kamat 
Cc: Thomas Abraham 
Signed-off-by: Ben Gamari 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 arch/arm/boot/dts/exynos5420.dtsi | 122 ++
 1 file changed, 122 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 48a0a55..f8f70a5 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -50,6 +50,116 @@
usbdrdphy1 = _phy1;
};
 
+   cpu0_opp_table: opp_table0 {
+   compatible = "operating-points-v2";
+   opp-shared;
+   opp00@18 {
+   opp-hz = /bits/ 64 <18>;
+   opp-microvolt = <125>;
+   clock-latency-ns = <14>;
+   };
+   opp01@17 {
+   opp-hz = /bits/ 64 <17>;
+   opp-microvolt = <1212500>;
+   clock-latency-ns = <14>;
+   };
+   opp02@16 {
+   opp-hz = /bits/ 64 <16>;
+   opp-microvolt = <1175000>;
+   clock-latency-ns = <14>;
+   };
+   opp03@15 {
+   opp-hz = /bits/ 64 <15>;
+   opp-microvolt = <1137500>;
+   clock-latency-ns = <14>;
+   };
+   opp04@14 {
+   opp-hz = /bits/ 64 <14>;
+   opp-microvolt = <1112500>;
+   clock-latency-ns = <14>;
+   };
+   opp05@13 {
+   opp-hz = /bits/ 64 <13>;
+   opp-microvolt = <1062500>;
+   clock-latency-ns = <14>;
+   };
+   opp06@12 {
+   opp-hz = /bits/ 64 <12>;
+   opp-microvolt = <1037500>;
+   clock-latency-ns = <14>;
+   };
+   opp07@11 {
+   opp-hz = /bits/ 64 <11>;
+   opp-microvolt = <1012500>;
+   clock-latency-ns = <14>;
+   };
+   opp08@10 {
+   opp-hz = /bits/ 64 <10>;
+   opp-microvolt = < 987500>;
+   clock-latency-ns = <14>;
+   };
+   opp09@9 {
+   opp-hz = /bits/ 64 <9>;
+   opp-microvolt = < 962500>;
+   clock-latency-ns = <14>;
+   };
+   opp10@8 {
+   opp-hz = /bits/ 64 <8>;
+   opp-microvolt = < 937500>;
+   clock-latency-ns = <14>;
+   };
+   opp11@7 {
+   opp-hz = /bits/ 64 <7>;
+   opp-microvolt = < 912500>;
+   clock-latency-ns = <14>;
+   };
+   };
+
+   cpu1_opp_table: opp_table1 {
+   compatible = "operating-points-v2";
+   opp-shared;
+   opp00@13 {
+   opp-hz = /bits/ 64 <13>;
+   opp-microvolt = <1275000>;
+   clock-latency-ns = <14>;
+   };
+   opp01@12 {
+   opp-hz = /bits/ 64 <12>;
+   opp-microvolt = <1212500>;
+   clock-latency-ns = <14>;
+   };
+   opp02@11 {
+   opp-hz = /bits/ 64 <11>;
+   opp-microvolt = <1162500>;
+   clock-latency-ns = <14>;
+   };
+   opp03@10 {
+   opp-hz = /bits/ 64 <10>;
+   opp-microvolt = <1112500>;
+   clock-latency-ns = <14>;
+   };
+   opp04@9 {
+   opp-hz = /bits/ 64 <9>;
+   opp-microvolt = <1062500>;
+   clock-latency-ns = <14>;
+   };
+   

[PATCH v4 4/8] ARM: Exynos: use generic cpufreq driver for Exynos5420

2015-12-07 Thread Bartlomiej Zolnierkiewicz
From: Thomas Abraham 

The new CPU clock type allows the use of cpufreq-dt driver
for Exynos5420.

Changes by Bartlomiej:
- split Exynos5420 support from the original patch
- disable cpufreq if big.LITTLE switcher support is enabled
- switch to using cpufreq-dt driver

Cc: Tomasz Figa 
Cc: Kukjin Kim 
Cc: Javier Martinez Canillas 
Signed-off-by: Thomas Abraham 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 arch/arm/mach-exynos/exynos.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 1c47aee..7a89c9d 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -230,6 +230,9 @@ static const struct of_device_id exynos_cpufreq_matches[] = 
{
{ .compatible = "samsung,exynos4212", .data = "cpufreq-dt" },
{ .compatible = "samsung,exynos4412", .data = "cpufreq-dt" },
{ .compatible = "samsung,exynos5250", .data = "cpufreq-dt" },
+#ifndef CONFIG_BL_SWITCHER
+   { .compatible = "samsung,exynos5420", .data = "cpufreq-dt" },
+#endif
{ /* sentinel */ }
 };
 
-- 
1.9.1

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[PATCH v4 5/8] clk: samsung: exynos5422/5800: fix cpu clock configuration data

2015-12-07 Thread Bartlomiej Zolnierkiewicz
Fix cpu clock configuration data for Exynos5422/5800 SoCs
(they use higher PCLK_DBG divider values than Exynos5420 and
support additional frequencies).

Based on Hardkernel's kernel for ODROID-XU3 board.

Cc: Tomasz Figa 
Cc: Mike Turquette 
Cc: Javier Martinez Canillas 
Cc: Thomas Abraham 
Acked-by: Sylwester Nawrocki 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 drivers/clk/samsung/clk-exynos5420.c | 36 +---
 1 file changed, 33 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos5420.c 
b/drivers/clk/samsung/clk-exynos5420.c
index 2a92546..837329d 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -1274,10 +1274,34 @@ static const struct exynos_cpuclk_cfg_data 
exynos5420_eglclk_d[] __initconst = {
{  0 },
 };
 
+static const struct exynos_cpuclk_cfg_data exynos5800_eglclk_d[] __initconst = 
{
+   { 200, E5420_EGL_DIV0(3, 7, 7, 4), },
+   { 190, E5420_EGL_DIV0(3, 7, 7, 4), },
+   { 180, E5420_EGL_DIV0(3, 7, 7, 4), },
+   { 170, E5420_EGL_DIV0(3, 7, 7, 3), },
+   { 160, E5420_EGL_DIV0(3, 7, 7, 3), },
+   { 150, E5420_EGL_DIV0(3, 7, 7, 3), },
+   { 140, E5420_EGL_DIV0(3, 7, 7, 3), },
+   { 130, E5420_EGL_DIV0(3, 7, 7, 2), },
+   { 120, E5420_EGL_DIV0(3, 7, 7, 2), },
+   { 110, E5420_EGL_DIV0(3, 7, 7, 2), },
+   { 100, E5420_EGL_DIV0(3, 7, 6, 2), },
+   {  90, E5420_EGL_DIV0(3, 7, 6, 2), },
+   {  80, E5420_EGL_DIV0(3, 7, 5, 2), },
+   {  70, E5420_EGL_DIV0(3, 7, 5, 2), },
+   {  60, E5420_EGL_DIV0(3, 7, 4, 2), },
+   {  50, E5420_EGL_DIV0(3, 7, 3, 2), },
+   {  40, E5420_EGL_DIV0(3, 7, 3, 2), },
+   {  30, E5420_EGL_DIV0(3, 7, 3, 2), },
+   {  20, E5420_EGL_DIV0(3, 7, 3, 2), },
+   {  0 },
+};
+
 #define E5420_KFC_DIV(kpll, pclk, aclk)
\
kpll) << 24) | ((pclk) << 20) | ((aclk) << 4)))
 
 static const struct exynos_cpuclk_cfg_data exynos5420_kfcclk_d[] __initconst = 
{
+   { 140, E5420_KFC_DIV(3, 5, 3), }, /* for Exynos5800 */
{ 130, E5420_KFC_DIV(3, 5, 2), },
{ 120, E5420_KFC_DIV(3, 5, 2), },
{ 110, E5420_KFC_DIV(3, 5, 2), },
@@ -1357,9 +1381,15 @@ static void __init exynos5x_clk_init(struct device_node 
*np,
ARRAY_SIZE(exynos5800_gate_clks));
}
 
-   exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk",
-   mout_cpu_p[0], mout_cpu_p[1], 0x200,
-   exynos5420_eglclk_d, ARRAY_SIZE(exynos5420_eglclk_d), 0);
+   if (soc == EXYNOS5420) {
+   exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk",
+   mout_cpu_p[0], mout_cpu_p[1], 0x200,
+   exynos5420_eglclk_d, ARRAY_SIZE(exynos5420_eglclk_d), 
0);
+   } else {
+   exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk",
+   mout_cpu_p[0], mout_cpu_p[1], 0x200,
+   exynos5800_eglclk_d, ARRAY_SIZE(exynos5800_eglclk_d), 
0);
+   }
exynos_register_cpu_clock(ctx, CLK_KFC_CLK, "kfcclk",
mout_kfc_p[0], mout_kfc_p[1], 0x28200,
exynos5420_kfcclk_d, ARRAY_SIZE(exynos5420_kfcclk_d), 0);
-- 
1.9.1

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[PATCH v4 0/8] cpufreq: add generic cpufreq driver support for Exynos542x/5800 platforms

2015-12-07 Thread Bartlomiej Zolnierkiewicz
Hi,

This patch series adds generic cpufreq-dt driver support for
Exynos542x/5800 (using the new CPU clock type which allows it).

It has been tested on Exynos5422 based ODROID-XU3 Lite board.

Depends on:
- next-20151124 branch of linux-next kernel tree

Changes since v3:
- switched to using cpufreq-dt driver
- updated patch descriptions to cover Exynos5422 support
- added Acked-by from Sylwester to clock driver patches

Changes since v2:
- ported over next-20151124 branch
- integrated missing CLK_RECALC_NEW_RATES flags fix to patch #3
  (from Anand Moon)
- added regulator supply properties for ODROID-XU3 Lite and
  ODROID-XU4 in patch #2
- ported CPU OPPs to operating-points-v2 (from Ben Gamari)
- added "ARM: dts: Exynos5422: fix OPP tables" patch (from Ben
  Gamari)
- added "cpufreq: arm-big-little: accept operating-points-v2
  nodes" patch (from Ben Gamari)
- renamed OPP nodes as opp@

Changes since v1:
- added CPU cluster regulator supply properties to
  exynos5420-arndale-octa.dts, exynos5420-peach-pit.dts,
  exynos5420-smdk5420.dts and exynos5800-peach-pi.dts

Changes over Thomas' original v12 code:
- split Exynos5420 and Exynos5800 support
- moved E5420_[EGL,KFC]_DIV0() macros to clk-exynos5420.c
- disabled cpufreq if big.LITTLE switcher support is enabled
- enhanced arm_big_little[_dt] driver with CPU cluster regulator
  support
- fixed CPU clock configuration data for Exynos5800
- fixed CPU operating points setup for Exynos5800
- added CPU cluster regulator supplies for ODROID-XU3 board

Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R Institute Poland
Samsung Electronics


Bartlomiej Zolnierkiewicz (3):
  ARM: dts: Exynos542x/5800: add cluster regulator supply properties
  clk: samsung: exynos5422/5800: fix cpu clock configuration data
  ARM: dts: Exynos5800: fix CPU OPP

Ben Gamari (1):
  ARM: dts: Exynos5422: fix OPP tables

Thomas Abraham (4):
  clk: samsung: exynos5420: add cpu clock configuration data and
instantiate cpu clock
  ARM: dts: Exynos5420: add CPU OPP and regulator supply property
  ARM: Exynos: use generic cpufreq driver for Exynos5420
  ARM: Exynos: use generic cpufreq driver for Exynos5422/5800

 arch/arm/boot/dts/exynos5420-arndale-octa.dts   |   8 ++
 arch/arm/boot/dts/exynos5420-peach-pit.dts  |   8 ++
 arch/arm/boot/dts/exynos5420-smdk5420.dts   |   8 ++
 arch/arm/boot/dts/exynos5420.dtsi   | 122 ++
 arch/arm/boot/dts/exynos5422-cpus.dtsi  |  10 ++
 arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts |   8 ++
 arch/arm/boot/dts/exynos5422-odroidxu3.dts  |   8 ++
 arch/arm/boot/dts/exynos5422-odroidxu4.dts  |   8 ++
 arch/arm/boot/dts/exynos5800-peach-pi.dts   |   8 ++
 arch/arm/boot/dts/exynos5800.dtsi   | 165 
 arch/arm/mach-exynos/exynos.c   |   4 +
 drivers/clk/samsung/clk-exynos5420.c|  88 -
 include/dt-bindings/clock/exynos5420.h  |   2 +
 13 files changed, 445 insertions(+), 2 deletions(-)

-- 
1.9.1

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[PATCH v4 8/8] ARM: Exynos: use generic cpufreq driver for Exynos5422/5800

2015-12-07 Thread Bartlomiej Zolnierkiewicz
From: Thomas Abraham 

The new CPU clock type allows the use of generic cpufreq-dt driver
for Exynos5422/5800.

Changes by Bartlomiej:
- split Exynos5800 support from the original patch
- disable cpufreq if big.LITTLE switcher support is enabled
- switch to using cpufreq-dt driver

Cc: Tomasz Figa 
Cc: Kukjin Kim 
Cc: Javier Martinez Canillas 
Signed-off-by: Thomas Abraham 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 arch/arm/mach-exynos/exynos.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 7a89c9d..cec8aeb 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -232,6 +232,7 @@ static const struct of_device_id exynos_cpufreq_matches[] = 
{
{ .compatible = "samsung,exynos5250", .data = "cpufreq-dt" },
 #ifndef CONFIG_BL_SWITCHER
{ .compatible = "samsung,exynos5420", .data = "cpufreq-dt" },
+   { .compatible = "samsung,exynos5800", .data = "cpufreq-dt" },
 #endif
{ /* sentinel */ }
 };
-- 
1.9.1

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[PATCH v4 7/8] ARM: dts: Exynos5422: fix OPP tables

2015-12-07 Thread Bartlomiej Zolnierkiewicz
From: Ben Gamari 

The Exynos 5422 is identical to the 5800 except for the fact that it
boots from the A7 cores. Consequently, the core numbering is different:
cores 0-3 are A7s whereas 4-7 are A15s.

We can reuse the device tree of the 5800 for the 5422 but we must take
care to override the OPP tables and CPU clocks.  These are otherwise
inherited from the exynos5800 devicetree, which has the CPU clusters
reversed compared to the 5422. This results in the A15 cores only
reaching 1.4GHz, the maximum rate of the KFC clock.

Cc: Javier Martinez Canillas 
Signed-off-by: Ben Gamari 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 arch/arm/boot/dts/exynos5422-cpus.dtsi | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5422-cpus.dtsi 
b/arch/arm/boot/dts/exynos5422-cpus.dtsi
index b7f60c8..9a5131d 100644
--- a/arch/arm/boot/dts/exynos5422-cpus.dtsi
+++ b/arch/arm/boot/dts/exynos5422-cpus.dtsi
@@ -20,8 +20,10 @@
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x100>;
+   clocks = < CLK_KFC_CLK>;
clock-frequency = <10>;
cci-control-port = <_control0>;
+   operating-points-v2 = <_opp_table>;
 };
 
  {
@@ -30,6 +32,7 @@
reg = <0x101>;
clock-frequency = <10>;
cci-control-port = <_control0>;
+   operating-points-v2 = <_opp_table>;
 };
 
  {
@@ -38,6 +41,7 @@
reg = <0x102>;
clock-frequency = <10>;
cci-control-port = <_control0>;
+   operating-points-v2 = <_opp_table>;
 };
 
  {
@@ -46,14 +50,17 @@
reg = <0x103>;
clock-frequency = <10>;
cci-control-port = <_control0>;
+   operating-points-v2 = <_opp_table>;
 };
 
  {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x0>;
+   clocks = < CLK_ARM_CLK>;
clock-frequency = <18>;
cci-control-port = <_control1>;
+   operating-points-v2 = <_opp_table>;
 };
 
  {
@@ -62,6 +69,7 @@
reg = <0x1>;
clock-frequency = <18>;
cci-control-port = <_control1>;
+   operating-points-v2 = <_opp_table>;
 };
 
  {
@@ -70,6 +78,7 @@
reg = <0x2>;
clock-frequency = <18>;
cci-control-port = <_control1>;
+   operating-points-v2 = <_opp_table>;
 };
 
  {
@@ -78,4 +87,5 @@
reg = <0x3>;
clock-frequency = <18>;
cci-control-port = <_control1>;
+   operating-points-v2 = <_opp_table>;
 };
-- 
1.9.1

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[PATCH v4 6/8] ARM: dts: Exynos5800: fix CPU OPP

2015-12-07 Thread Bartlomiej Zolnierkiewicz
Fix CPU operating points for Exynos5800 (it use different
voltages than Exynos5420 and supports additional frequencies).
However don't use 2000MHz & 1900MHz OPPs (for A15 cores) and
1400MHz OPP (for A7 cores) for now as they are not available
on all boards.

Based on Hardkernel's kernel for ODROID-XU3 board.

Changes by Ben Gamari:
- Port to operating-points-v2

Cc: Kukjin Kim 
Cc: Doug Anderson 
Cc: Javier Martinez Canillas 
Cc: Andreas Faerber 
Cc: Sachin Kamat 
Cc: Thomas Abraham 
Signed-off-by: Ben Gamari 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 arch/arm/boot/dts/exynos5800.dtsi | 165 ++
 1 file changed, 165 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5800.dtsi 
b/arch/arm/boot/dts/exynos5800.dtsi
index c0bb356..e417218 100644
--- a/arch/arm/boot/dts/exynos5800.dtsi
+++ b/arch/arm/boot/dts/exynos5800.dtsi
@@ -17,8 +17,173 @@
 
 / {
compatible = "samsung,exynos5800", "samsung,exynos5";
+
+   cpu0_opp_table: opp_table0 {
+   compatible = "operating-points-v2";
+   opp-shared;
+   opp00@18 {
+   opp-hz = /bits/ 64 <18>;
+   opp-microvolt = <125>;
+   clock-latency-ns = <14>;
+   };
+   opp01@17 {
+   opp-hz = /bits/ 64 <17>;
+   opp-microvolt = <125>;
+   clock-latency-ns = <14>;
+   };
+   opp02@16 {
+   opp-hz = /bits/ 64 <16>;
+   opp-microvolt = <125>;
+   clock-latency-ns = <14>;
+   };
+   opp03@15 {
+   opp-hz = /bits/ 64 <15>;
+   opp-microvolt = <110>;
+   clock-latency-ns = <14>;
+   };
+   opp04@14 {
+   opp-hz = /bits/ 64 <14>;
+   opp-microvolt = <110>;
+   clock-latency-ns = <14>;
+   };
+   opp05@13 {
+   opp-hz = /bits/ 64 <13>;
+   opp-microvolt = <110>;
+   clock-latency-ns = <14>;
+   };
+   opp06@12 {
+   opp-hz = /bits/ 64 <12>;
+   opp-microvolt = <100>;
+   clock-latency-ns = <14>;
+   };
+   opp07@11 {
+   opp-hz = /bits/ 64 <11>;
+   opp-microvolt = <100>;
+   clock-latency-ns = <14>;
+   };
+   opp08@10 {
+   opp-hz = /bits/ 64 <10>;
+   opp-microvolt = <100>;
+   clock-latency-ns = <14>;
+   };
+   opp09@9 {
+   opp-hz = /bits/ 64 <9>;
+   opp-microvolt = <100>;
+   clock-latency-ns = <14>;
+   };
+   opp10@8 {
+   opp-hz = /bits/ 64 <8>;
+   opp-microvolt = <90>;
+   clock-latency-ns = <14>;
+   };
+   opp11@7 {
+   opp-hz = /bits/ 64 <7>;
+   opp-microvolt = <90>;
+   clock-latency-ns = <14>;
+   };
+   opp12@6 {
+   opp-hz = /bits/ 64 <6>;
+   opp-microvolt = <90>;
+   clock-latency-ns = <14>;
+   };
+   opp13@5 {
+   opp-hz = /bits/ 64 <5>;
+   opp-microvolt = <90>;
+   clock-latency-ns = <14>;
+   };
+   opp14@4 {
+   opp-hz = /bits/ 64 <4>;
+   opp-microvolt = <90>;
+   clock-latency-ns = <14>;
+   };
+   opp15@3 {
+   opp-hz = /bits/ 64 <3>;
+   opp-microvolt = <90>;
+   clock-latency-ns = <14>;
+   };
+   opp16@2 {
+   opp-hz = /bits/ 64 <2>;
+   opp-microvolt = <90>;
+   clock-latency-ns = <14>;
+   };
+   };
+
+   cpu1_opp_table: opp_table1 {
+   compatible = "operating-points-v2";

^= usage

2015-12-07 Thread Michael McConville
Just a minor simplification.

Signed-off-by: Michael McConville 

---

--- sound/soc/samsung/i2s.c.origMon Oct  5 21:39:03 2015
+++ sound/soc/samsung/i2s.c Mon Dec  7 23:04:02 2015
@@ -623,10 +623,7 @@ static int i2s_set_fmt(struct snd_soc_dai *dai,
case SND_SOC_DAIFMT_NB_NF:
break;
case SND_SOC_DAIFMT_NB_IF:
-   if (tmp & lrp_rlow)
-   tmp &= ~lrp_rlow;
-   else
-   tmp |= lrp_rlow;
+   tmp ^= lrp_rlow;
break;
default:
dev_err(>pdev->dev, "Polarity not supported\n");
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Re: [PATCH 04/23] mtd: nand: s3c2410: kill the ->ecc_layout field

2015-12-07 Thread Krzysztof Kozlowski
On 08.12.2015 07:25, Boris Brezillon wrote:
> The s3c2410 is allowing board data to overload the default ECC layout
> defined inside the driver, but this feature is not used by board
> specific definitions.
> Kill this field so that we can easily move to a model where ecclayout
> are dynamically allocated by the NAND controller driver.
> 
> Signed-off-by: Boris Brezillon 
> ---
>  arch/arm/plat-samsung/devs.c   | 9 -
>  drivers/mtd/nand/s3c2410.c | 3 ---
>  include/linux/platform_data/mtd-nand-s3c2410.h | 1 -
>  3 files changed, 13 deletions(-)

Acked-by: Krzysztof Kozlowski 

Best regards,
Krzysztof



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Re: [PATCH 4/4] ARM: dts: Use OF graph for DP to panel connection in exynos5800-peach-pi

2015-12-07 Thread Krzysztof Kozlowski
On 08.12.2015 00:36, Inki Dae wrote:
> Hi Javier,
> 
> 2015-12-07 22:41 GMT+09:00 Javier Martinez Canillas :
>> Hello Inki,
>>
>> On 12/07/2015 09:52 AM, Inki Dae wrote:
>>> From: Javier Martinez Canillas 
>>>
>>
>> Thanks a lot for posting this patch.
>>
>>> The DT binding for the Exynos DRM Display Port (DP) driver isn't consistent
>>> since it uses a phandle to describe the connection between the DP port and
>>> the display panel but uses the OF graph ports and endpoints to describe the
>>> connection betwen the DP port, a bridge chip and the panel.
>>>
>>> The Exynos DP driver and the DT binding have been changed to allow also to
>>> describe the DP port to panel connection using ports / endpoints (OF graph)
>>> so this patch changes the Exynos5800 Peach Pi DT to make it consistent with
>>> the Exynos5420 Peach Pit that has a eDP to LVDS chip and uses OF graph too.
>>>
>>> Signed-off-by: Javier Martinez Canillas 
>>> Tested-by: Javier Martinez Canillas 
>>
>> This tag was not in my original patch, it's true that I tested
>> it but will someone believe me? ;)
> 
> Oops. I confused you spread Reviewed-by and Tested-by here and there.
> Don't worry about that. Will remove it if you don't give me Tested-by.
> :)

Actually authorship (the "From") in this case means Tested-by. Author
always tests the patch so it would look weird if we start adding
tested-by to our own patches, right?

Dear Inki,
However the patch misses your SoB. You touched and sent it so please
extend the SoB chain-of-blame.

Best regards,
Krzysztof

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Re: [PATCH 4/4] ARM: dts: Use OF graph for DP to panel connection in exynos5800-peach-pi

2015-12-07 Thread Javier Martinez Canillas
Hello Krzysztof,

On 12/07/2015 09:48 PM, Krzysztof Kozlowski wrote:
> On 08.12.2015 00:36, Inki Dae wrote:
>> Hi Javier,
>>
>> 2015-12-07 22:41 GMT+09:00 Javier Martinez Canillas :
>>> Hello Inki,
>>>
>>> On 12/07/2015 09:52 AM, Inki Dae wrote:
 From: Javier Martinez Canillas 

>>>
>>> Thanks a lot for posting this patch.
>>>
 The DT binding for the Exynos DRM Display Port (DP) driver isn't consistent
 since it uses a phandle to describe the connection between the DP port and
 the display panel but uses the OF graph ports and endpoints to describe the
 connection betwen the DP port, a bridge chip and the panel.

 The Exynos DP driver and the DT binding have been changed to allow also to
 describe the DP port to panel connection using ports / endpoints (OF graph)
 so this patch changes the Exynos5800 Peach Pi DT to make it consistent with
 the Exynos5420 Peach Pit that has a eDP to LVDS chip and uses OF graph too.

 Signed-off-by: Javier Martinez Canillas 
 Tested-by: Javier Martinez Canillas 
>>>
>>> This tag was not in my original patch, it's true that I tested
>>> it but will someone believe me? ;)
>>
>> Oops. I confused you spread Reviewed-by and Tested-by here and there.
>> Don't worry about that. Will remove it if you don't give me Tested-by.
>> :)
> 
> Actually authorship (the "From") in this case means Tested-by. Author
> always tests the patch so it would look weird if we start adding
> tested-by to our own patches, right?
>

Exactly, that's what I tried to say. It's implied that the
author tested her/his own patch in the best possible way.
 
> Dear Inki,
> However the patch misses your SoB. You touched and sent it so please
> extend the SoB chain-of-blame.
>

Right, I missed that.

> Best regards,
> Krzysztof
> 

Best regards,
-- 
Javier Martinez Canillas
Open Source Group
Samsung Research America
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Re: [PATCH 4/4] ARM: dts: Use OF graph for DP to panel connection in exynos5800-peach-pi

2015-12-07 Thread Krzysztof Kozlowski
On 08.12.2015 10:33, Javier Martinez Canillas wrote:
> Hello Krzysztof,
> 
> On 12/07/2015 09:45 PM, Krzysztof Kozlowski wrote:
>> On 07.12.2015 21:52, Inki Dae wrote:
>>> From: Javier Martinez Canillas 
>>>
>>> The DT binding for the Exynos DRM Display Port (DP) driver isn't consistent
>>> since it uses a phandle to describe the connection between the DP port and
>>> the display panel but uses the OF graph ports and endpoints to describe the
>>> connection betwen the DP port, a bridge chip and the panel.
>>>
>>> The Exynos DP driver and the DT binding have been changed to allow also to
>>> describe the DP port to panel connection using ports / endpoints (OF graph)
>>> so this patch changes the Exynos5800 Peach Pi DT to make it consistent with
>>> the Exynos5420 Peach Pit that has a eDP to LVDS chip and uses OF graph too.
>>>
>>> Signed-off-by: Javier Martinez Canillas 
>>> Tested-by: Javier Martinez Canillas 
>>> Reviewed-by: Inki Dae 
>>> ---
>>>  arch/arm/boot/dts/exynos5800-peach-pi.dts | 15 ++-
>>>  1 file changed, 14 insertions(+), 1 deletion(-)
>>>
>>
>> Looks sensible:
>> Reviewed-by: Krzysztof Kozlowski 
>>
>> Dependencies are not mentioned, does it depend on patch 1?
>>
> 
> Yes, it depends on patch 1/4 so it should be merged through the Exynos DRM
> tree to maintain bisectability. Inki's patch maintains the DT ABI backward
> compatibility though so another option is to wait until the DRM change hit
> mainline and then pick $SUBJECT.

Thanks. We could also use a tag with DRM changes for samsung-soc but
since I already flushed my queue for v4.5 I think it would be an
overkill. From my point of view it can safely go through exynos-drm tree.

Best regards,
Krzysztof

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Re: [PATCH 4/4] ARM: dts: Use OF graph for DP to panel connection in exynos5800-peach-pi

2015-12-07 Thread Krzysztof Kozlowski
On 07.12.2015 21:52, Inki Dae wrote:
> From: Javier Martinez Canillas 
> 
> The DT binding for the Exynos DRM Display Port (DP) driver isn't consistent
> since it uses a phandle to describe the connection between the DP port and
> the display panel but uses the OF graph ports and endpoints to describe the
> connection betwen the DP port, a bridge chip and the panel.
> 
> The Exynos DP driver and the DT binding have been changed to allow also to
> describe the DP port to panel connection using ports / endpoints (OF graph)
> so this patch changes the Exynos5800 Peach Pi DT to make it consistent with
> the Exynos5420 Peach Pit that has a eDP to LVDS chip and uses OF graph too.
> 
> Signed-off-by: Javier Martinez Canillas 
> Tested-by: Javier Martinez Canillas 
> Reviewed-by: Inki Dae 
> ---
>  arch/arm/boot/dts/exynos5800-peach-pi.dts | 15 ++-
>  1 file changed, 14 insertions(+), 1 deletion(-)
> 

Looks sensible:
Reviewed-by: Krzysztof Kozlowski 

Dependencies are not mentioned, does it depend on patch 1?

Best regards,
Krzysztof

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Re: [PATCH 4/4] ARM: dts: Use OF graph for DP to panel connection in exynos5800-peach-pi

2015-12-07 Thread Javier Martinez Canillas
Hello Krzysztof,

On 12/07/2015 09:45 PM, Krzysztof Kozlowski wrote:
> On 07.12.2015 21:52, Inki Dae wrote:
>> From: Javier Martinez Canillas 
>>
>> The DT binding for the Exynos DRM Display Port (DP) driver isn't consistent
>> since it uses a phandle to describe the connection between the DP port and
>> the display panel but uses the OF graph ports and endpoints to describe the
>> connection betwen the DP port, a bridge chip and the panel.
>>
>> The Exynos DP driver and the DT binding have been changed to allow also to
>> describe the DP port to panel connection using ports / endpoints (OF graph)
>> so this patch changes the Exynos5800 Peach Pi DT to make it consistent with
>> the Exynos5420 Peach Pit that has a eDP to LVDS chip and uses OF graph too.
>>
>> Signed-off-by: Javier Martinez Canillas 
>> Tested-by: Javier Martinez Canillas 
>> Reviewed-by: Inki Dae 
>> ---
>>  arch/arm/boot/dts/exynos5800-peach-pi.dts | 15 ++-
>>  1 file changed, 14 insertions(+), 1 deletion(-)
>>
> 
> Looks sensible:
> Reviewed-by: Krzysztof Kozlowski 
> 
> Dependencies are not mentioned, does it depend on patch 1?
>

Yes, it depends on patch 1/4 so it should be merged through the Exynos DRM
tree to maintain bisectability. Inki's patch maintains the DT ABI backward
compatibility though so another option is to wait until the DRM change hit
mainline and then pick $SUBJECT.
 
> Best regards,
> Krzysztof
> 

Best regards,
-- 
Javier Martinez Canillas
Open Source Group
Samsung Research America
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