[PATCH v5 4/7] ARM: Exynos: use generic cpufreq driver for Exynos5420

[Bartlomiej Zolnierkiewicz]

The new CPU clock type allows the use of cpufreq-dt driver
for Exynos5420.

Cc: Tomasz Figa 
Cc: Kukjin Kim 
Cc: Javier Martinez Canillas 
Cc: Thomas Abraham 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 arch/arm/mach-exynos/exynos.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 1c47aee..7a89c9d 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -230,6 +230,9 @@ static const struct of_device_id exynos_cpufreq_matches[] = 
{
{ .compatible = "samsung,exynos4212", .data = "cpufreq-dt" },
{ .compatible = "samsung,exynos4412", .data = "cpufreq-dt" },
{ .compatible = "samsung,exynos5250", .data = "cpufreq-dt" },
+#ifndef CONFIG_BL_SWITCHER
+   { .compatible = "samsung,exynos5420", .data = "cpufreq-dt" },
+#endif
{ /* sentinel */ }
 };
 
-- 
1.9.1

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[PATCH v3] PCI: hosts: mark pcie/pci (msi) irq cascade handler as IRQF_NO_THREAD

[Grygorii Strashko]

On -RT and if kernel is booting with "threadirqs" cmd line parameter
pcie/pci (msi) irq cascade handlers (like dra7xx_pcie_msi_irq_handler())
will be forced threaded and, as result, will generate warnings like:

WARNING: CPU: 1 PID: 82 at kernel/irq/handle.c:150 
handle_irq_event_percpu+0x14c/0x174()
irq 460 handler irq_default_primary_handler+0x0/0x14 enabled interrupts
Backtrace:
 (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40)
 (warn_slowpath_fmt) from [] (handle_irq_event_percpu+0x14c/0x174)
 (handle_irq_event_percpu) from [] (handle_irq_event+0x84/0xb8)
 (handle_irq_event) from [] (handle_simple_irq+0x90/0x118)
 (handle_simple_irq) from [] (generic_handle_irq+0x30/0x44)
 (generic_handle_irq) from [] (dra7xx_pcie_msi_irq_handler+0x7c/0x8c)
 (dra7xx_pcie_msi_irq_handler) from [] 
(irq_forced_thread_fn+0x28/0x5c)
 (irq_forced_thread_fn) from [] (irq_thread+0x128/0x204)

This happens because all of them invoke generic_handle_irq() from the
requsted handler. generic_handle_irq grabs raw_locks and this needs to
run in raw-irq context.

This issue was originally reproduced on TI dra7-evem, but, as was
identified during dicussion [1], other PCI(e) hosts can also suffer
from this issue. So let's fix all them at once and mark pcie/pci (msi)
irq cascade handlers IRQF_NO_THREAD explicitly.

[1] https://lkml.org/lkml/2015/11/20/356

Cc: Kishon Vijay Abraham I 
Cc: Bjorn Helgaas 
Cc: Jingoo Han 
Cc: Kukjin Kim 
Cc: Krzysztof Kozlowski 
Cc: Richard Zhu 
Cc: Lucas Stach 
Cc: Thierry Reding 
Cc: Stephen Warren 
Cc: Alexandre Courbot 
Cc: Simon Horman 
Cc: Pratyush Anand 
Cc: Michal Simek 
Cc: "Sören Brinkmann" 
Cc: Sebastian Andrzej Siewior 
Signed-off-by: Grygorii Strashko 
---
Changes in v3:
 - change applied to all affected pci(e) host drivers in drivers/pci/hosts.
   After some invsetigation I've decided to not touch arch code - it is not easy
   to identify all places which need to be fixed. 
   if it's still required - i can send separate patches for 
   arch/mips/pci/msi-octeon.c and arch/sparc/kernel/pci_msi.c.
Links
v2: https://lkml.org/lkml/2015/11/20/356
v1: https://lkml.org/lkml/2015/11/5/593
ref: https://lkml.org/lkml/2015/11/3/660

 drivers/pci/host/pci-dra7xx.c | 13 -
 drivers/pci/host/pci-exynos.c |  3 ++-
 drivers/pci/host/pci-imx6.c   |  3 ++-
 drivers/pci/host/pci-tegra.c  |  2 +-
 drivers/pci/host/pcie-rcar.c  |  6 --
 drivers/pci/host/pcie-spear13xx.c |  3 ++-
 drivers/pci/host/pcie-xilinx.c|  3 ++-
 7 files changed, 25 insertions(+), 8 deletions(-)

diff --git a/drivers/pci/host/pci-dra7xx.c b/drivers/pci/host/pci-dra7xx.c
index 8c36880..0415192 100644
--- a/drivers/pci/host/pci-dra7xx.c
+++ b/drivers/pci/host/pci-dra7xx.c
@@ -301,8 +301,19 @@ static int __init dra7xx_add_pcie_port(struct dra7xx_pcie 
*dra7xx,
return -EINVAL;
}
 
+   /*
+* Mark dra7xx_pcie_msi IRQ as IRQF_NO_THREAD
+* On -RT and if kernel is booting with "threadirqs" cmd line parameter
+* the dra7xx_pcie_msi_irq_handler() will be forced threaded but,
+* in the same time, it's IRQ dispatcher and calls generic_handle_irq(),
+* which, in turn, will be resolved to handle_simple_irq() call.
+* The handle_simple_irq() expected to be called with IRQ disabled, as
+* result kernle will display warning:
+* "irq XXX handler YYY+0x0/0x14 enabled interrupts".
+*/
ret = devm_request_irq(>dev, pp->irq,
-  dra7xx_pcie_msi_irq_handler, IRQF_SHARED,
+  dra7xx_pcie_msi_irq_handler,
+  IRQF_SHARED | IRQF_NO_THREAD,
   "dra7-pcie-msi", pp);
if (ret) {
dev_err(>dev, "failed to request irq\n");
diff --git a/drivers/pci/host/pci-exynos.c b/drivers/pci/host/pci-exynos.c
index 01095e1..d997d22 100644
--- a/drivers/pci/host/pci-exynos.c
+++ b/drivers/pci/host/pci-exynos.c
@@ -522,7 +522,8 @@ static int __init exynos_add_pcie_port(struct pcie_port *pp,
 
ret = devm_request_irq(>dev, pp->msi_irq,
exynos_pcie_msi_irq_handler,
-   IRQF_SHARED, "exynos-pcie", pp);
+   IRQF_SHARED | IRQF_NO_THREAD,
+   "exynos-pcie", pp);
if (ret) {
dev_err(>dev, "failed to request msi irq\n");
return ret;
diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
index 22e8224..9ce7cd1 

[PATCH v5 1/7] ARM: dts: Exynos542x/5800: add cluster regulator supply properties

[Bartlomiej Zolnierkiewicz]

Add cluster regulator supply properties as a preparation to
adding generic cpufreq-dt driver support for Exynos542x and
Exynos5800 based boards.

Cc: Kukjin Kim 
Cc: Doug Anderson 
Cc: Javier Martinez Canillas 
Cc: Andreas Faerber 
Cc: Thomas Abraham 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 arch/arm/boot/dts/exynos5420-arndale-octa.dts  | 8 
 arch/arm/boot/dts/exynos5420-peach-pit.dts | 8 
 arch/arm/boot/dts/exynos5420-smdk5420.dts  | 8 
 arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 8 
 arch/arm/boot/dts/exynos5800-peach-pi.dts  | 8 
 5 files changed, 40 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts 
b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
index 4ecef69..4229641 100644
--- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
+++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
@@ -52,6 +52,14 @@
};
 };
 
+ {
+   cpu-supply = <_reg>;
+};
+
+ {
+   cpu-supply = <_reg>;
+};
+
 _dwc3_1 {
dr_mode = "host";
 };
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts 
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 35cfb07..df071b33 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -143,6 +143,14 @@
vdd-supply = <_reg>;
 };
 
+ {
+   cpu-supply = <_reg>;
+};
+
+ {
+   cpu-supply = <_reg>;
+};
+
  {
status = "okay";
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts 
b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index ac35aef..124a9ba 100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -89,6 +89,14 @@
 
 };
 
+ {
+   cpu-supply = <_reg>;
+};
+
+ {
+   cpu-supply = <_reg>;
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_hpd>;
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi 
b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
index 9134217..1bd507b 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
@@ -67,6 +67,14 @@
<1920>;
 };
 
+ {
+   cpu-supply = <_reg>;
+};
+
+ {
+   cpu-supply = <_reg>;
+};
+
  {
status = "okay";
hpd-gpio = < 7 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts 
b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index 7b018e4..2f6d8ac 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -137,6 +137,14 @@
vdd-supply = <_reg>;
 };
 
+ {
+   cpu-supply = <_reg>;
+};
+
+ {
+   cpu-supply = <_reg>;
+};
+
  {
status = "okay";
pinctrl-names = "default";
-- 
1.9.1

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[PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties

[Bartlomiej Zolnierkiewicz]

From: Thomas Abraham 

For Exynos542x/5800 platforms, add CPU operating points
for migrating from Exynos specific cpufreq driver to using
generic cpufreq driver.

Changes by Bartlomiej:
- split Exynos5420 support from the original patch
- merged Exynos5422 fixes from Ben

Changes by Ben Gamari:
- Port to operating-points-v2

Cc: Kukjin Kim 
Cc: Doug Anderson 
Cc: Javier Martinez Canillas 
Cc: Andreas Faerber 
Signed-off-by: Thomas Abraham 
Signed-off-by: Ben Gamari 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 arch/arm/boot/dts/exynos5420.dtsi  | 122 +
 arch/arm/boot/dts/exynos5422-cpus.dtsi |  10 +++
 2 files changed, 132 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 48a0a55..616c2d0 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -50,6 +50,116 @@
usbdrdphy1 = _phy1;
};
 
+   cpu0_opp_table: opp_table0 {
+   compatible = "operating-points-v2";
+   opp-shared;
+   opp@18 {
+   opp-hz = /bits/ 64 <18>;
+   opp-microvolt = <125>;
+   clock-latency-ns = <14>;
+   };
+   opp@17 {
+   opp-hz = /bits/ 64 <17>;
+   opp-microvolt = <1212500>;
+   clock-latency-ns = <14>;
+   };
+   opp@16 {
+   opp-hz = /bits/ 64 <16>;
+   opp-microvolt = <1175000>;
+   clock-latency-ns = <14>;
+   };
+   opp@15 {
+   opp-hz = /bits/ 64 <15>;
+   opp-microvolt = <1137500>;
+   clock-latency-ns = <14>;
+   };
+   opp@14 {
+   opp-hz = /bits/ 64 <14>;
+   opp-microvolt = <1112500>;
+   clock-latency-ns = <14>;
+   };
+   opp@13 {
+   opp-hz = /bits/ 64 <13>;
+   opp-microvolt = <1062500>;
+   clock-latency-ns = <14>;
+   };
+   opp@12 {
+   opp-hz = /bits/ 64 <12>;
+   opp-microvolt = <1037500>;
+   clock-latency-ns = <14>;
+   };
+   opp@11 {
+   opp-hz = /bits/ 64 <11>;
+   opp-microvolt = <1012500>;
+   clock-latency-ns = <14>;
+   };
+   opp@10 {
+   opp-hz = /bits/ 64 <10>;
+   opp-microvolt = < 987500>;
+   clock-latency-ns = <14>;
+   };
+   opp@9 {
+   opp-hz = /bits/ 64 <9>;
+   opp-microvolt = < 962500>;
+   clock-latency-ns = <14>;
+   };
+   opp@8 {
+   opp-hz = /bits/ 64 <8>;
+   opp-microvolt = < 937500>;
+   clock-latency-ns = <14>;
+   };
+   opp@7 {
+   opp-hz = /bits/ 64 <7>;
+   opp-microvolt = < 912500>;
+   clock-latency-ns = <14>;
+   };
+   };
+
+   cpu1_opp_table: opp_table1 {
+   compatible = "operating-points-v2";
+   opp-shared;
+   opp@13 {
+   opp-hz = /bits/ 64 <13>;
+   opp-microvolt = <1275000>;
+   clock-latency-ns = <14>;
+   };
+   opp@12 {
+   opp-hz = /bits/ 64 <12>;
+   opp-microvolt = <1212500>;
+   clock-latency-ns = <14>;
+   };
+   opp@11 {
+   opp-hz = /bits/ 64 <11>;
+   opp-microvolt = <1162500>;
+   clock-latency-ns = <14>;
+   };
+   opp@10 {
+   opp-hz = /bits/ 64 <10>;
+   opp-microvolt = <1112500>;
+   clock-latency-ns = <14>;
+   };
+   opp@9 {
+   opp-hz = /bits/ 64 <9>;
+   opp-microvolt = <1062500>;
+   clock-latency-ns = <14>;
+   };
+

[PATCH v5 2/7] clk: samsung: exynos5420: add cpu clock configuration data and instantiate cpu clock

[Bartlomiej Zolnierkiewicz]

From: Thomas Abraham 

With the addition of the new Samsung specific cpu-clock type, the
arm clock can be represented as a cpu-clock type. Add the CPU clock
configuration data and instantiate the CPU clock type for Exynos5420.

Changes by Bartlomiej:
- split Exynos5420 support from the original patches
- moved E5420_[EGL,KFC]_DIV0() macros to clk-exynos5420.c

Cc: Tomasz Figa 
Cc: Mike Turquette 
Cc: Javier Martinez Canillas 
Acked-by: Sylwester Nawrocki 
Signed-off-by: Thomas Abraham 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 drivers/clk/samsung/clk-exynos5420.c   | 58 --
 include/dt-bindings/clock/exynos5420.h |  2 ++
 2 files changed, 58 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos5420.c 
b/drivers/clk/samsung/clk-exynos5420.c
index 389af3c..2a92546 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -18,6 +18,7 @@
 #include 
 
 #include "clk.h"
+#include "clk-cpu.h"
 
 #define APLL_LOCK  0x0
 #define APLL_CON0  0x100
@@ -616,9 +617,11 @@ static struct samsung_mux_clock exynos5x_mux_clks[] 
__initdata = {
MUX(0, "mout_mspll_kfc", mout_mspll_cpu_p, SRC_TOP7, 8, 2),
MUX(0, "mout_mspll_cpu", mout_mspll_cpu_p, SRC_TOP7, 12, 2),
 
-   MUX(0, "mout_apll", mout_apll_p, SRC_CPU, 0, 1),
+   MUX_F(0, "mout_apll", mout_apll_p, SRC_CPU, 0, 1,
+ CLK_SET_RATE_PARENT | CLK_RECALC_NEW_RATES, 0),
MUX(0, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1),
-   MUX(0, "mout_kpll", mout_kpll_p, SRC_KFC, 0, 1),
+   MUX_F(0, "mout_kpll", mout_kpll_p, SRC_KFC, 0, 1,
+ CLK_SET_RATE_PARENT | CLK_RECALC_NEW_RATES, 0),
MUX(0, "mout_kfc", mout_kfc_p, SRC_KFC, 16, 1),
 
MUX(0, "mout_aclk200", mout_group1_p, SRC_TOP0, 8, 2),
@@ -1246,6 +1249,50 @@ static struct samsung_pll_clock exynos5x_plls[nr_plls] 
__initdata = {
KPLL_CON0, NULL),
 };
 
+#define E5420_EGL_DIV0(apll, pclk_dbg, atb, cpud)  \
+   apll) << 24) | ((pclk_dbg) << 20) | ((atb) << 16) | \
+((cpud) << 4)))
+
+static const struct exynos_cpuclk_cfg_data exynos5420_eglclk_d[] __initconst = 
{
+   { 180, E5420_EGL_DIV0(3, 7, 7, 4), },
+   { 170, E5420_EGL_DIV0(3, 7, 7, 3), },
+   { 160, E5420_EGL_DIV0(3, 7, 7, 3), },
+   { 150, E5420_EGL_DIV0(3, 7, 7, 3), },
+   { 140, E5420_EGL_DIV0(3, 7, 7, 3), },
+   { 130, E5420_EGL_DIV0(3, 7, 7, 2), },
+   { 120, E5420_EGL_DIV0(3, 7, 7, 2), },
+   { 110, E5420_EGL_DIV0(3, 7, 7, 2), },
+   { 100, E5420_EGL_DIV0(3, 6, 6, 2), },
+   {  90, E5420_EGL_DIV0(3, 6, 6, 2), },
+   {  80, E5420_EGL_DIV0(3, 5, 5, 2), },
+   {  70, E5420_EGL_DIV0(3, 5, 5, 2), },
+   {  60, E5420_EGL_DIV0(3, 4, 4, 2), },
+   {  50, E5420_EGL_DIV0(3, 3, 3, 2), },
+   {  40, E5420_EGL_DIV0(3, 3, 3, 2), },
+   {  30, E5420_EGL_DIV0(3, 3, 3, 2), },
+   {  20, E5420_EGL_DIV0(3, 3, 3, 2), },
+   {  0 },
+};
+
+#define E5420_KFC_DIV(kpll, pclk, aclk)
\
+   kpll) << 24) | ((pclk) << 20) | ((aclk) << 4)))
+
+static const struct exynos_cpuclk_cfg_data exynos5420_kfcclk_d[] __initconst = 
{
+   { 130, E5420_KFC_DIV(3, 5, 2), },
+   { 120, E5420_KFC_DIV(3, 5, 2), },
+   { 110, E5420_KFC_DIV(3, 5, 2), },
+   { 100, E5420_KFC_DIV(3, 5, 2), },
+   {  90, E5420_KFC_DIV(3, 5, 2), },
+   {  80, E5420_KFC_DIV(3, 5, 2), },
+   {  70, E5420_KFC_DIV(3, 4, 2), },
+   {  60, E5420_KFC_DIV(3, 4, 2), },
+   {  50, E5420_KFC_DIV(3, 4, 2), },
+   {  40, E5420_KFC_DIV(3, 3, 2), },
+   {  30, E5420_KFC_DIV(3, 3, 2), },
+   {  20, E5420_KFC_DIV(3, 3, 2), },
+   {  0 },
+};
+
 static const struct of_device_id ext_clk_match[] __initconst = {
{ .compatible = "samsung,exynos5420-oscclk", .data = (void *)0, },
{ },
@@ -1310,6 +1357,13 @@ static void __init exynos5x_clk_init(struct device_node 
*np,
ARRAY_SIZE(exynos5800_gate_clks));
}
 
+   exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk",
+   mout_cpu_p[0], mout_cpu_p[1], 0x200,
+   exynos5420_eglclk_d, ARRAY_SIZE(exynos5420_eglclk_d), 0);
+   exynos_register_cpu_clock(ctx, CLK_KFC_CLK, "kfcclk",
+   mout_kfc_p[0], mout_kfc_p[1], 0x28200,
+   exynos5420_kfcclk_d, ARRAY_SIZE(exynos5420_kfcclk_d), 0);
+
exynos5420_clk_sleep_init();
 
samsung_clk_of_add_provider(np, ctx);
diff --git a/include/dt-bindings/clock/exynos5420.h 
b/include/dt-bindings/clock/exynos5420.h
index 99da0d1..dde9664 100644
--- 

[PATCH v4 28/58] mtd: nand: mxc: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/mxc_nand.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index b291258..9dd71af 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -173,7 +173,6 @@ struct mxc_nand_devtype_data {
 };
 
 struct mxc_nand_host {
-   struct mtd_info mtd;
struct nand_chipnand;
struct device   *dev;
 
@@ -1514,7 +1513,7 @@ static int mxcnd_probe(struct platform_device *pdev)
host->dev = >dev;
/* structures must be linked */
this = >nand;
-   mtd = >mtd;
+   mtd = nand_to_mtd(this);
mtd->priv = this;
mtd->dev.parent = >dev;
mtd->name = DRIVER_NAME;
@@ -1702,7 +1701,7 @@ static int mxcnd_remove(struct platform_device *pdev)
 {
struct mxc_nand_host *host = platform_get_drvdata(pdev);
 
-   nand_release(>mtd);
+   nand_release(nand_to_mtd(>nand));
if (host->clk_act)
clk_disable_unprepare(host->clk);
 
-- 
2.1.4

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[PATCH v4 29/58] mtd: nand: nandsim: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/nandsim.c | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/mtd/nand/nandsim.c b/drivers/mtd/nand/nandsim.c
index eb2a567..442eeaf 100644
--- a/drivers/mtd/nand/nandsim.c
+++ b/drivers/mtd/nand/nandsim.c
@@ -2236,13 +2236,13 @@ static int __init ns_init_module(void)
}
 
/* Allocate and initialize mtd_info, nand_chip and nandsim structures */
-   nsmtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip)
-   + sizeof(struct nandsim), GFP_KERNEL);
-   if (!nsmtd) {
+   chip = kzalloc(sizeof(struct nand_chip) + sizeof(struct nandsim),
+  GFP_KERNEL);
+   if (!chip) {
NS_ERR("unable to allocate core structures.\n");
return -ENOMEM;
}
-   chip= (struct nand_chip *)(nsmtd + 1);
+   nsmtd   = nand_to_mtd(chip);
 nsmtd->priv = (void *)chip;
nand= (struct nandsim *)(chip + 1);
chip->priv  = (void *)nand;
@@ -2392,7 +2392,7 @@ err_exit:
for (i = 0;i < ARRAY_SIZE(nand->partitions); ++i)
kfree(nand->partitions[i].name);
 error:
-   kfree(nsmtd);
+   kfree(chip);
free_lists();
 
return retval;
@@ -2413,7 +2413,7 @@ static void __exit ns_cleanup_module(void)
nand_release(nsmtd); /* Unregister driver */
for (i = 0;i < ARRAY_SIZE(ns->partitions); ++i)
kfree(ns->partitions[i].name);
-   kfree(nsmtd);/* Free other structures */
+   kfree(mtd_to_nand(nsmtd));/* Free other structures */
free_lists();
 }
 
-- 
2.1.4

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[PATCH v4 26/58] mtd: nand: lpc32xx: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/lpc32xx_mlc.c | 7 +++
 drivers/mtd/nand/lpc32xx_slc.c | 7 +++
 2 files changed, 6 insertions(+), 8 deletions(-)

diff --git a/drivers/mtd/nand/lpc32xx_mlc.c b/drivers/mtd/nand/lpc32xx_mlc.c
index 3738856..3400b3f 100644
--- a/drivers/mtd/nand/lpc32xx_mlc.c
+++ b/drivers/mtd/nand/lpc32xx_mlc.c
@@ -173,7 +173,6 @@ struct lpc32xx_nand_host {
struct nand_chipnand_chip;
struct lpc32xx_mlc_platform_data *pdata;
struct clk  *clk;
-   struct mtd_info mtd;
void __iomem*io_base;
int irq;
struct lpc32xx_nand_cfg_mlc *ncfg;
@@ -566,7 +565,7 @@ static void lpc32xx_ecc_enable(struct mtd_info *mtd, int 
mode)
 
 static int lpc32xx_dma_setup(struct lpc32xx_nand_host *host)
 {
-   struct mtd_info *mtd = >mtd;
+   struct mtd_info *mtd = nand_to_mtd(>nand_chip);
dma_cap_mask_t mask;
 
if (!host->pdata || !host->pdata->dma_filter) {
@@ -660,8 +659,8 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)

host->io_base_phy = rc->start;
 
-   mtd = >mtd;
nand_chip = >nand_chip;
+   mtd = nand_to_mtd(nand_chip);
if (pdev->dev.of_node)
host->ncfg = lpc32xx_parse_dt(>dev);
if (!host->ncfg) {
@@ -814,7 +813,7 @@ err_exit1:
 static int lpc32xx_nand_remove(struct platform_device *pdev)
 {
struct lpc32xx_nand_host *host = platform_get_drvdata(pdev);
-   struct mtd_info *mtd = >mtd;
+   struct mtd_info *mtd = nand_to_mtd(>nand_chip);
 
nand_release(mtd);
free_irq(host->irq, host);
diff --git a/drivers/mtd/nand/lpc32xx_slc.c b/drivers/mtd/nand/lpc32xx_slc.c
index fcd9fac..61b2961 100644
--- a/drivers/mtd/nand/lpc32xx_slc.c
+++ b/drivers/mtd/nand/lpc32xx_slc.c
@@ -204,7 +204,6 @@ struct lpc32xx_nand_host {
struct nand_chipnand_chip;
struct lpc32xx_slc_platform_data *pdata;
struct clk  *clk;
-   struct mtd_info mtd;
void __iomem*io_base;
struct lpc32xx_nand_cfg_slc *ncfg;
 
@@ -703,7 +702,7 @@ static int lpc32xx_nand_write_page_raw_syndrome(struct 
mtd_info *mtd,
 
 static int lpc32xx_nand_dma_setup(struct lpc32xx_nand_host *host)
 {
-   struct mtd_info *mtd = >mtd;
+   struct mtd_info *mtd = nand_to_mtd(>nand_chip);
dma_cap_mask_t mask;
 
if (!host->pdata || !host->pdata->dma_filter) {
@@ -799,8 +798,8 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
 
host->pdata = dev_get_platdata(>dev);
 
-   mtd = >mtd;
chip = >nand_chip;
+   mtd = nand_to_mtd(chip);
chip->priv = host;
nand_set_flash_node(chip, pdev->dev.of_node);
mtd->priv = chip;
@@ -932,7 +931,7 @@ static int lpc32xx_nand_remove(struct platform_device *pdev)
 {
uint32_t tmp;
struct lpc32xx_nand_host *host = platform_get_drvdata(pdev);
-   struct mtd_info *mtd = >mtd;
+   struct mtd_info *mtd = nand_to_mtd(>nand_chip);
 
nand_release(mtd);
dma_release_channel(host->dma_chan);
-- 
2.1.4

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[PATCH v4 25/58] mtd: nand: jz4740: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/jz4740_nand.c | 9 -
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/mtd/nand/jz4740_nand.c b/drivers/mtd/nand/jz4740_nand.c
index 5a06fba..03239a5 100644
--- a/drivers/mtd/nand/jz4740_nand.c
+++ b/drivers/mtd/nand/jz4740_nand.c
@@ -59,7 +59,6 @@
 #define JZ_NAND_MEM_ADDR_OFFSET 0x1
 
 struct jz_nand {
-   struct mtd_info mtd;
struct nand_chip chip;
void __iomem *base;
struct resource *mem;
@@ -76,7 +75,7 @@ struct jz_nand {
 
 static inline struct jz_nand *mtd_to_jz_nand(struct mtd_info *mtd)
 {
-   return container_of(mtd, struct jz_nand, mtd);
+   return container_of(mtd_to_nand(mtd), struct jz_nand, chip);
 }
 
 static void jz_nand_select_chip(struct mtd_info *mtd, int chipnr)
@@ -334,8 +333,8 @@ static int jz_nand_detect_bank(struct platform_device *pdev,
char gpio_name[9];
char res_name[6];
uint32_t ctrl;
-   struct mtd_info *mtd = >mtd;
struct nand_chip *chip = >chip;
+   struct mtd_info *mtd = nand_to_mtd(chip);
 
/* Request GPIO port. */
gpio = JZ_GPIO_MEM_CS0 + bank - 1;
@@ -432,8 +431,8 @@ static int jz_nand_probe(struct platform_device *pdev)
goto err_iounmap_mmio;
}
 
-   mtd = >mtd;
chip= >chip;
+   mtd = nand_to_mtd(chip);
mtd->priv   = chip;
mtd->dev.parent = >dev;
mtd->name   = "jz4740-nand";
@@ -543,7 +542,7 @@ static int jz_nand_remove(struct platform_device *pdev)
struct jz_nand *nand = platform_get_drvdata(pdev);
size_t i;
 
-   nand_release(>mtd);
+   nand_release(nand_to_mtd(>chip));
 
/* Deassert and disable all chips */
writel(0, nand->base + JZ_REG_NAND_CTRL);
-- 
2.1.4

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[PATCH v4 35/58] mtd: nand: plat: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/plat_nand.c | 15 ---
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/mtd/nand/plat_nand.c b/drivers/mtd/nand/plat_nand.c
index 06ac6c6..796eb7d 100644
--- a/drivers/mtd/nand/plat_nand.c
+++ b/drivers/mtd/nand/plat_nand.c
@@ -20,7 +20,6 @@
 
 struct plat_nand_data {
struct nand_chipchip;
-   struct mtd_info mtd;
void __iomem*io_base;
 };
 
@@ -31,6 +30,7 @@ static int plat_nand_probe(struct platform_device *pdev)
 {
struct platform_nand_data *pdata = dev_get_platdata(>dev);
struct plat_nand_data *data;
+   struct mtd_info *mtd;
struct resource *res;
const char **part_types;
int err = 0;
@@ -58,8 +58,9 @@ static int plat_nand_probe(struct platform_device *pdev)
 
data->chip.priv = 
nand_set_flash_node(>chip, pdev->dev.of_node);
-   data->mtd.priv = >chip;
-   data->mtd.dev.parent = >dev;
+   mtd = nand_to_mtd(>chip);
+   mtd->priv = >chip;
+   mtd->dev.parent = >dev;
 
data->chip.IO_ADDR_R = data->io_base;
data->chip.IO_ADDR_W = data->io_base;
@@ -87,21 +88,21 @@ static int plat_nand_probe(struct platform_device *pdev)
}
 
/* Scan to find existence of the device */
-   if (nand_scan(>mtd, pdata->chip.nr_chips)) {
+   if (nand_scan(mtd, pdata->chip.nr_chips)) {
err = -ENXIO;
goto out;
}
 
part_types = pdata->chip.part_probe_types;
 
-   err = mtd_device_parse_register(>mtd, part_types, NULL,
+   err = mtd_device_parse_register(mtd, part_types, NULL,
pdata->chip.partitions,
pdata->chip.nr_partitions);
 
if (!err)
return err;
 
-   nand_release(>mtd);
+   nand_release(mtd);
 out:
if (pdata->ctrl.remove)
pdata->ctrl.remove(pdev);
@@ -116,7 +117,7 @@ static int plat_nand_remove(struct platform_device *pdev)
struct plat_nand_data *data = platform_get_drvdata(pdev);
struct platform_nand_data *pdata = dev_get_platdata(>dev);
 
-   nand_release(>mtd);
+   nand_release(nand_to_mtd(>chip));
if (pdata->ctrl.remove)
pdata->ctrl.remove(pdev);
 
-- 
2.1.4

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[PATCH v4 34/58] mtd: nand: pasemi: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/pasemi_nand.c | 12 +---
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/mtd/nand/pasemi_nand.c b/drivers/mtd/nand/pasemi_nand.c
index 0ececac..4dd2985 100644
--- a/drivers/mtd/nand/pasemi_nand.c
+++ b/drivers/mtd/nand/pasemi_nand.c
@@ -110,17 +110,15 @@ static int pasemi_nand_probe(struct platform_device 
*ofdev)
pr_debug("pasemi_nand at %pR\n", );
 
/* Allocate memory for MTD device structure and private data */
-   pasemi_nand_mtd = kzalloc(sizeof(struct mtd_info) +
- sizeof(struct nand_chip), GFP_KERNEL);
-   if (!pasemi_nand_mtd) {
+   chip = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
+   if (!chip) {
printk(KERN_WARNING
   "Unable to allocate PASEMI NAND MTD device structure\n");
err = -ENOMEM;
goto out;
}
 
-   /* Get pointer to private data */
-   chip = (struct nand_chip *)_nand_mtd[1];
+   pasemi_nand_mtd = nand_to_mtd(chip);
 
/* Link the private data with the MTD structure */
pasemi_nand_mtd->priv = chip;
@@ -180,7 +178,7 @@ static int pasemi_nand_probe(struct platform_device *ofdev)
  out_ior:
iounmap(chip->IO_ADDR_R);
  out_mtd:
-   kfree(pasemi_nand_mtd);
+   kfree(chip);
  out:
return err;
 }
@@ -202,7 +200,7 @@ static int pasemi_nand_remove(struct platform_device *ofdev)
iounmap(chip->IO_ADDR_R);
 
/* Free the MTD device structure */
-   kfree(pasemi_nand_mtd);
+   kfree(chip);
 
pasemi_nand_mtd = NULL;
 
-- 
2.1.4

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[PATCH v4 36/58] mtd: nand: pxa3xx: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/pxa3xx_nand.c | 33 +
 1 file changed, 17 insertions(+), 16 deletions(-)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index dc39a98..c4d5788 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -167,7 +167,6 @@ enum pxa3xx_nand_variant {
 
 struct pxa3xx_nand_host {
struct nand_chipchip;
-   struct mtd_info *mtd;
void*info_data;
 
/* page size of attached chip */
@@ -450,14 +449,15 @@ static int pxa3xx_nand_init_timings_compat(struct 
pxa3xx_nand_host *host,
struct nand_chip *chip = >chip;
struct pxa3xx_nand_info *info = host->info_data;
const struct pxa3xx_nand_flash *f = NULL;
+   struct mtd_info *mtd = nand_to_mtd(>chip);
int i, id, ntypes;
 
ntypes = ARRAY_SIZE(builtin_flash_types);
 
-   chip->cmdfunc(host->mtd, NAND_CMD_READID, 0x00, -1);
+   chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
 
-   id = chip->read_byte(host->mtd);
-   id |= chip->read_byte(host->mtd) << 0x8;
+   id = chip->read_byte(mtd);
+   id |= chip->read_byte(mtd) << 0x8;
 
for (i = 0; i < ntypes; i++) {
f = _flash_types[i];
@@ -890,7 +890,7 @@ static void set_command_address(struct pxa3xx_nand_info 
*info,
 static void prepare_start_command(struct pxa3xx_nand_info *info, int command)
 {
struct pxa3xx_nand_host *host = info->host[info->cs];
-   struct mtd_info *mtd = host->mtd;
+   struct mtd_info *mtd = nand_to_mtd(>chip);
 
/* reset data and oob column point to handle data */
info->buf_start = 0;
@@ -943,7 +943,7 @@ static int prepare_set_command(struct pxa3xx_nand_info 
*info, int command,
struct mtd_info *mtd;
 
host = info->host[info->cs];
-   mtd = host->mtd;
+   mtd = nand_to_mtd(>chip);
addr_cycle = 0;
exec_cmd = 1;
 
@@ -1415,8 +1415,8 @@ static int pxa3xx_nand_config_ident(struct 
pxa3xx_nand_info *info)
 static void pxa3xx_nand_config_tail(struct pxa3xx_nand_info *info)
 {
struct pxa3xx_nand_host *host = info->host[info->cs];
-   struct mtd_info *mtd = host->mtd;
-   struct nand_chip *chip = mtd_to_nand(mtd);
+   struct nand_chip *chip = >chip;
+   struct mtd_info *mtd = nand_to_mtd(chip);
 
info->reg_ndcr |= (host->col_addr_cycles == 2) ? NDCR_RA_START : 0;
info->reg_ndcr |= (chip->page_shift == 6) ? NDCR_PG_PER_BLK : 0;
@@ -1693,19 +1693,20 @@ static int alloc_nand_resource(struct platform_device 
*pdev)
pdata = dev_get_platdata(>dev);
if (pdata->num_cs <= 0)
return -ENODEV;
-   info = devm_kzalloc(>dev, sizeof(*info) + (sizeof(*mtd) +
-   sizeof(*host)) * pdata->num_cs, GFP_KERNEL);
+   info = devm_kzalloc(>dev,
+   sizeof(*info) + sizeof(*host) * pdata->num_cs,
+   GFP_KERNEL);
if (!info)
return -ENOMEM;
 
info->pdev = pdev;
info->variant = pxa3xx_nand_get_variant(pdev);
for (cs = 0; cs < pdata->num_cs; cs++) {
-   mtd = (void *)[1] + (sizeof(*mtd) + sizeof(*host)) * cs;
-   chip = (struct nand_chip *)([1]);
-   host = (struct pxa3xx_nand_host *)chip;
+   host = (void *)[1] + sizeof(*host) * cs;
+   chip = >chip;
+   chip->priv = host;
+   mtd = nand_to_mtd(chip);
info->host[cs] = host;
-   host->mtd = mtd;
host->cs = cs;
host->info_data = info;
mtd->priv = chip;
@@ -1833,7 +1834,7 @@ static int pxa3xx_nand_remove(struct platform_device 
*pdev)
clk_disable_unprepare(info->clk);
 
for (cs = 0; cs < pdata->num_cs; cs++)
-   nand_release(info->host[cs]->mtd);
+   nand_release(nand_to_mtd(>host[cs]->chip));
return 0;
 }
 
@@ -1904,7 +1905,7 @@ static int pxa3xx_nand_probe(struct platform_device *pdev)
info = platform_get_drvdata(pdev);
probe_success = 0;
for (cs = 0; cs < pdata->num_cs; cs++) {
-   struct mtd_info *mtd = info->host[cs]->mtd;
+   struct mtd_info *mtd = nand_to_mtd(>host[cs]->chip);
 
/*
 * The mtd name matches the one used in 'mtdparts' kernel
-- 
2.1.4

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[PATCH v4 33/58] mtd: nand: orion: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/orion_nand.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/orion_nand.c b/drivers/mtd/nand/orion_nand.c
index 4ed4f67..087a040 100644
--- a/drivers/mtd/nand/orion_nand.c
+++ b/drivers/mtd/nand/orion_nand.c
@@ -85,11 +85,11 @@ static int __init orion_nand_probe(struct platform_device 
*pdev)
u32 val = 0;
 
nc = devm_kzalloc(>dev,
-   sizeof(struct nand_chip) + sizeof(struct mtd_info),
+   sizeof(struct nand_chip),
GFP_KERNEL);
if (!nc)
return -ENOMEM;
-   mtd = (struct mtd_info *)(nc + 1);
+   mtd = nand_to_mtd(nc);
 
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
io_base = devm_ioremap_resource(>dev, res);
-- 
2.1.4

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Re: [PATCH 004/182] gpio: generic: factor into gpio_chip struct

[Lee Jones]

On Wed, 09 Dec 2015, Linus Walleij wrote:

> The separate struct bgpio_chip has been a pain to handle, both
> by being confusingly similar in name to struct gpio_chip and
> for being contained inside a struct so that struct gpio_chip
> is contained in a struct contained in a struct, making several
> steps of dereferencing necessary.
> 
> Make things simpler: include the fields directly into
> , #ifdef:ed for CONFIG_GENERIC_GPIO, and
> get rid of the  altogether. Prefix
> some of the member variables with bgpio_* and add proper
> kerneldoc while we're at it.
> 
> Modify all users to handle the change and use a struct
> gpio_chip directly. And while we're at it: replace all
> container_of() dereferencing by gpiochip_get_data() and
> registering the gpio_chip with gpiochip_add_data().
> 
> Cc: a...@kernel.org
> Cc: Lee Jones 
> Cc: Alexander Shiyan 
> Cc: Shawn Guo 
> Cc: Sascha Hauer 
> Cc: Tony Lindgren 
> Cc: Kukjin Kim 
> Cc: Krzysztof Kozlowski 
> Cc: Alexandre Courbot 
> Cc: Gregory Fong 
> Cc: Brian Norris 
> Cc: Florian Fainelli 
> Cc: Liviu Dudau 
> Cc: Sudeep Holla 
> Cc: Lorenzo Pieralisi 
> Cc: Nicolas Pitre 
> Cc: Olof Johansson 
> Cc: Vladimir Zapolskiy 
> Cc: Rabin Vincent 
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: linux-o...@vger.kernel.org
> Cc: linux-samsung-soc@vger.kernel.org
> Cc: bcm-kernel-feedback-l...@broadcom.com
> Signed-off-by: Linus Walleij 
> ---
> ARM SoC folks and Lee: it would be great if you could
> ACK the few lines hitting arch/arm/* and drivers/mfd/* in this
> so I can take it through the GPIO tree.
> ---
>  arch/arm/mach-clps711x/board-autcpu12.c |   2 +-
>  arch/arm/mach-clps711x/board-p720t.c|   2 +-
>  arch/arm/mach-imx/mach-mx21ads.c|   2 +-
>  arch/arm/mach-omap1/board-ams-delta.c   |   2 +-
>  arch/arm/mach-s3c64xx/mach-crag6410.c   |   2 +-
>  drivers/gpio/gpio-74xx-mmio.c   |  37 ++--
>  drivers/gpio/gpio-brcmstb.c |  80 -
>  drivers/gpio/gpio-clps711x.c|  28 +--
>  drivers/gpio/gpio-dwapb.c   |  92 +-
>  drivers/gpio/gpio-ep93xx.c  |  25 +--
>  drivers/gpio/gpio-etraxfs.c |  49 +++---
>  drivers/gpio/gpio-ge.c  |  24 +--
>  drivers/gpio/gpio-generic.c | 292 
> +++-
>  drivers/gpio/gpio-grgpio.c  |  73 
>  drivers/gpio/gpio-moxart.c  |  29 ++--
>  drivers/gpio/gpio-mxc.c |  27 ++-
>  drivers/gpio/gpio-mxs.c |  33 ++--
>  drivers/gpio/gpio-sodaville.c   |  13 +-
>  drivers/gpio/gpio-xgene-sb.c|  40 ++---
>  drivers/mfd/vexpress-sysreg.c   |   8 +-

Acked-by: Lee Jones 

>  include/linux/basic_mmio_gpio.h |  80 -
>  include/linux/gpio/driver.h |  54 ++
>  22 files changed, 442 insertions(+), 552 deletions(-)
>  delete mode 100644 include/linux/basic_mmio_gpio.h

[...]

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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[PATCH v4 16/58] mtd: nand: diskonchip: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/diskonchip.c | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/mtd/nand/diskonchip.c b/drivers/mtd/nand/diskonchip.c
index 5f7bcc8..fff7a4a 100644
--- a/drivers/mtd/nand/diskonchip.c
+++ b/drivers/mtd/nand/diskonchip.c
@@ -1556,15 +1556,15 @@ static int __init doc_probe(unsigned long physadr)
 
printk(KERN_NOTICE "DiskOnChip found at 0x%lx\n", physadr);
 
-   len = sizeof(struct mtd_info) +
-   sizeof(struct nand_chip) + sizeof(struct doc_priv) + (2 * 
sizeof(struct nand_bbt_descr));
-   mtd = kzalloc(len, GFP_KERNEL);
-   if (!mtd) {
+   len = sizeof(struct nand_chip) + sizeof(struct doc_priv) +
+ (2 * sizeof(struct nand_bbt_descr));
+   nand = kzalloc(len, GFP_KERNEL);
+   if (!nand) {
ret = -ENOMEM;
goto fail;
}
 
-   nand= (struct nand_chip *) (mtd + 1);
+   mtd = nand_to_mtd(nand);
doc = (struct doc_priv *) (nand + 1);
nand->bbt_td= (struct nand_bbt_descr *) (doc + 1);
nand->bbt_md= nand->bbt_td + 1;
@@ -1615,7 +1615,7 @@ static int __init doc_probe(unsigned long physadr)
   haven't yet added it.  This is handled without incident by
   mtd_device_unregister, as far as I can tell. */
nand_release(mtd);
-   kfree(mtd);
+   kfree(nand);
goto fail;
}
 
@@ -1650,7 +1650,7 @@ static void release_nanddoc(void)
nand_release(mtd);
iounmap(doc->virtadr);
release_mem_region(doc->physadr, DOC_IOREMAP_LEN);
-   kfree(mtd);
+   kfree(nand);
}
 }
 
-- 
2.1.4

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[PATCH v4 18/58] mtd: nand: fsl_elbc: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/fsl_elbc_nand.c | 26 +++---
 1 file changed, 15 insertions(+), 11 deletions(-)

diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
index ad6d5da..7bde76a 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -48,7 +48,6 @@
 /* mtd information per set */
 
 struct fsl_elbc_mtd {
-   struct mtd_info mtd;
struct nand_chip chip;
struct fsl_lbc_ctrl *ctrl;
 
@@ -742,12 +741,13 @@ static int fsl_elbc_chip_init(struct fsl_elbc_mtd *priv)
struct fsl_lbc_regs __iomem *lbc = ctrl->regs;
struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = ctrl->nand;
struct nand_chip *chip = >chip;
+   struct mtd_info *mtd = nand_to_mtd(chip);
 
dev_dbg(priv->dev, "eLBC Set Information for bank %d\n", priv->bank);
 
/* Fill in fsl_elbc_mtd structure */
-   priv->mtd.priv = chip;
-   priv->mtd.dev.parent = priv->dev;
+   mtd->priv = chip;
+   mtd->dev.parent = priv->dev;
nand_set_flash_node(chip, priv->dev->of_node);
 
/* set timeout to maximum */
@@ -798,9 +798,11 @@ static int fsl_elbc_chip_init(struct fsl_elbc_mtd *priv)
 static int fsl_elbc_chip_remove(struct fsl_elbc_mtd *priv)
 {
struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = priv->ctrl->nand;
-   nand_release(>mtd);
+   struct mtd_info *mtd = nand_to_mtd(>chip);
 
-   kfree(priv->mtd.name);
+   nand_release(mtd);
+
+   kfree(mtd->name);
 
if (priv->vbase)
iounmap(priv->vbase);
@@ -824,6 +826,7 @@ static int fsl_elbc_nand_probe(struct platform_device *pdev)
int bank;
struct device *dev;
struct device_node *node = pdev->dev.of_node;
+   struct mtd_info *mtd;
 
if (!fsl_lbc_ctrl_dev || !fsl_lbc_ctrl_dev->regs)
return -ENODEV;
@@ -886,8 +889,9 @@ static int fsl_elbc_nand_probe(struct platform_device *pdev)
goto err;
}
 
-   priv->mtd.name = kasprintf(GFP_KERNEL, "%llx.flash", (u64)res.start);
-   if (!priv->mtd.name) {
+   mtd = nand_to_mtd(>chip);
+   mtd->name = kasprintf(GFP_KERNEL, "%llx.flash", (u64)res.start);
+   if (!nand_to_mtd(>chip)->name) {
ret = -ENOMEM;
goto err;
}
@@ -896,21 +900,21 @@ static int fsl_elbc_nand_probe(struct platform_device 
*pdev)
if (ret)
goto err;
 
-   ret = nand_scan_ident(>mtd, 1, NULL);
+   ret = nand_scan_ident(mtd, 1, NULL);
if (ret)
goto err;
 
-   ret = fsl_elbc_chip_init_tail(>mtd);
+   ret = fsl_elbc_chip_init_tail(mtd);
if (ret)
goto err;
 
-   ret = nand_scan_tail(>mtd);
+   ret = nand_scan_tail(mtd);
if (ret)
goto err;
 
/* First look for RedBoot table or partitions on the command
 * line, these take precedence over device tree information */
-   mtd_device_parse_register(>mtd, part_probe_types, NULL,
+   mtd_device_parse_register(mtd, part_probe_types, NULL,
  NULL, 0);
 
printk(KERN_INFO "eLBC NAND device at 0x%llx, bank %d\n",
-- 
2.1.4

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[PATCH v4 13/58] mtd: nand: cs553x: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/cs553x_nand.c | 17 -
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/drivers/mtd/nand/cs553x_nand.c b/drivers/mtd/nand/cs553x_nand.c
index 8904d68..386ae83 100644
--- a/drivers/mtd/nand/cs553x_nand.c
+++ b/drivers/mtd/nand/cs553x_nand.c
@@ -197,14 +197,13 @@ static int __init cs553x_init_one(int cs, int mmio, 
unsigned long adr)
}
 
/* Allocate memory for MTD device structure and private data */
-   new_mtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), 
GFP_KERNEL);
-   if (!new_mtd) {
+   this = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
+   if (!this) {
err = -ENOMEM;
goto out;
}
 
-   /* Get pointer to private data */
-   this = (struct nand_chip *)(_mtd[1]);
+   new_mtd = nand_to_mtd(this);
 
/* Link the private data with the MTD structure */
new_mtd->priv = this;
@@ -257,7 +256,7 @@ out_free:
 out_ior:
iounmap(this->IO_ADDR_R);
 out_mtd:
-   kfree(new_mtd);
+   kfree(this);
 out:
return err;
 }
@@ -337,19 +336,19 @@ static void __exit cs553x_cleanup(void)
if (!mtd)
continue;
 
-   this = mtd_to_nand(cs553x_mtd[i]);
+   this = mtd_to_nand(mtd);
mmio_base = this->IO_ADDR_R;
 
/* Release resources, unregister device */
-   nand_release(cs553x_mtd[i]);
-   kfree(cs553x_mtd[i]->name);
+   nand_release(mtd);
+   kfree(mtd->name);
cs553x_mtd[i] = NULL;
 
/* unmap physical address */
iounmap(mmio_base);
 
/* Free the MTD device structure */
-   kfree(mtd);
+   kfree(this);
}
 }
 
-- 
2.1.4

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[PATCH v4 14/58] mtd: nand: davinci: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/davinci_nand.c | 30 --
 1 file changed, 16 insertions(+), 14 deletions(-)

diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index b5978d5..b1f69f9 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -53,7 +53,6 @@
  * outputs in a "wire-AND" configuration, with no per-chip signals.
  */
 struct davinci_nand_info {
-   struct mtd_info mtd;
struct nand_chipchip;
struct nand_ecclayout   ecclayout;
 
@@ -80,8 +79,10 @@ struct davinci_nand_info {
 static DEFINE_SPINLOCK(davinci_nand_lock);
 static bool ecc4_busy;
 
-#define to_davinci_nand(m) container_of(m, struct davinci_nand_info, mtd)
-
+static inline struct davinci_nand_info *to_davinci_nand(struct mtd_info *mtd)
+{
+   return container_of(mtd_to_nand(mtd), struct davinci_nand_info, chip);
+}
 
 static inline unsigned int davinci_nand_readl(struct davinci_nand_info *info,
int offset)
@@ -636,6 +637,7 @@ static int nand_davinci_probe(struct platform_device *pdev)
int ret;
uint32_tval;
nand_ecc_modes_tecc_mode;
+   struct mtd_info *mtd;
 
pdata = nand_davinci_get_pdata(pdev);
if (IS_ERR(pdata))
@@ -682,8 +684,9 @@ static int nand_davinci_probe(struct platform_device *pdev)
info->base  = base;
info->vaddr = vaddr;
 
-   info->mtd.priv  = >chip;
-   info->mtd.dev.parent= >dev;
+   mtd = nand_to_mtd(>chip);
+   mtd->priv   = >chip;
+   mtd->dev.parent = >dev;
nand_set_flash_node(>chip, pdev->dev.of_node);
 
info->chip.IO_ADDR_R= vaddr;
@@ -785,7 +788,7 @@ static int nand_davinci_probe(struct platform_device *pdev)
spin_unlock_irq(_nand_lock);
 
/* Scan to find existence of the device(s) */
-   ret = nand_scan_ident(>mtd, pdata->mask_chipsel ? 2 : 1, NULL);
+   ret = nand_scan_ident(mtd, pdata->mask_chipsel ? 2 : 1, NULL);
if (ret < 0) {
dev_dbg(>dev, "no NAND chip(s) found\n");
goto err;
@@ -797,9 +800,9 @@ static int nand_davinci_probe(struct platform_device *pdev)
 * usable:  10 bytes are needed, not 6.
 */
if (pdata->ecc_bits == 4) {
-   int chunks = info->mtd.writesize / 512;
+   int chunks = mtd->writesize / 512;
 
-   if (!chunks || info->mtd.oobsize < 16) {
+   if (!chunks || mtd->oobsize < 16) {
dev_dbg(>dev, "too small\n");
ret = -EINVAL;
goto err;
@@ -811,8 +814,7 @@ static int nand_davinci_probe(struct platform_device *pdev)
 */
if (chunks == 1) {
info->ecclayout = hwecc4_small;
-   info->ecclayout.oobfree[1].length =
-   info->mtd.oobsize - 16;
+   info->ecclayout.oobfree[1].length = mtd->oobsize - 16;
goto syndrome_done;
}
if (chunks == 4) {
@@ -833,15 +835,15 @@ syndrome_done:
info->chip.ecc.layout = >ecclayout;
}
 
-   ret = nand_scan_tail(>mtd);
+   ret = nand_scan_tail(mtd);
if (ret < 0)
goto err;
 
if (pdata->parts)
-   ret = mtd_device_parse_register(>mtd, NULL, NULL,
+   ret = mtd_device_parse_register(mtd, NULL, NULL,
pdata->parts, pdata->nr_parts);
else
-   ret = mtd_device_register(>mtd, NULL, 0);
+   ret = mtd_device_register(mtd, NULL, 0);
if (ret < 0)
goto err;
 
@@ -871,7 +873,7 @@ static int nand_davinci_remove(struct platform_device *pdev)
ecc4_busy = false;

[PATCH v10.1 15/19] drm: bridge: analogix/dp: move hpd detect to connector detect function

[Yakir Yang]

This change just make a little clean to make code more like
drm core expect, move hdp detect code from bridge->enable(),
and place them into connector->detect().

Note: Gustavo Padovan try to remove the controller and phy
power on function in bind time at bellow commit:
drm/exynos: do not start enabling DP at bind() phase

But for now the connector status don't hardcode to connected,
need to operate dp phy in .detect function, so we need to revert
parts if Gustavo Padovan's changes, add phy poweron
function in bind time.

Signed-off-by: Yakir Yang 
Tested-by: Javier Martinez Canillas 
---
Changes in v10.1:
- Move the panel prepare from get_modes time to bind time, and move
  the panel unprepare from bridge->disable to unbind time. (Heiko)

Changes in v10:
- Revert parts of Gustavo Padovan's changes in commit:
drm/exynos: do not start enabling DP at bind() phase
  Add dp phy poweron function in bind time.

Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4:
- Take Jingoo suggest, add commit messages.

Changes in v3:
- move dp hpd detect to connector detect function.

Changes in v2: None

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 38 --
 1 file changed, 20 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 00aee44..6a13167 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -901,12 +901,6 @@ static void analogix_dp_commit(struct analogix_dp_device 
*dp)
DRM_ERROR("failed to disable the panel\n");
}
 
-   ret = analogix_dp_detect_hpd(dp);
-   if (ret) {
-   /* Cable has been disconnected, we're done */
-   return;
-   }
-
ret = analogix_dp_handle_edid(dp);
if (ret) {
dev_err(dp->dev, "unable to handle edid\n");
@@ -941,6 +935,11 @@ static void analogix_dp_commit(struct analogix_dp_device 
*dp)
 
 enum drm_connector_status analogix_dp_detect(struct device *dev, bool force)
 {
+   struct analogix_dp_device *dp = dev_get_drvdata(dev);
+
+   if (analogix_dp_detect_hpd(dp))
+   return connector_status_disconnected;
+
return connector_status_connected;
 }
 EXPORT_SYMBOL_GPL(analogix_dp_detect);
@@ -1006,13 +1005,6 @@ static void analogix_dp_bridge_enable(struct drm_bridge 
*bridge)
 
pm_runtime_get_sync(dp->dev);
 
-   if (dp->plat_data->panel) {
-   if (drm_panel_prepare(dp->plat_data->panel)) {
-   DRM_ERROR("failed to setup the panel\n");
-   return;
-   }
-   }
-
if (dp->plat_data->power_on)
dp->plat_data->power_on(dp->plat_data);
 
@@ -1045,11 +1037,6 @@ static void analogix_dp_bridge_disable(struct drm_bridge 
*bridge)
if (dp->plat_data->power_off)
dp->plat_data->power_off(dp->plat_data);
 
-   if (dp->plat_data->panel) {
-   if (drm_panel_unprepare(dp->plat_data->panel))
-   DRM_ERROR("failed to turnoff the panel\n");
-   }
-
pm_runtime_put_sync(dp->dev);
 
dp->dpms_mode = DRM_MODE_DPMS_OFF;
@@ -1307,6 +1294,15 @@ int analogix_dp_bind(struct device *dev, struct 
drm_device *drm_dev,
 
pm_runtime_enable(dev);
 
+   phy_power_on(dp->phy);
+
+   if (dp->plat_data->panel) {
+   if (drm_panel_prepare(dp->plat_data->panel)) {
+   DRM_ERROR("failed to setup the panel\n");
+   return -EBUSY;
+   }
+   }
+
ret = devm_request_irq(>dev, dp->irq, analogix_dp_irq_handler,
   irq_flags, "analogix-dp", dp);
if (ret) {
@@ -1340,6 +1336,12 @@ void analogix_dp_unbind(struct device *dev, struct 
device *master,
struct analogix_dp_device *dp = dev_get_drvdata(dev);
 
analogix_dp_bridge_disable(dp->bridge);
+
+   if (dp->plat_data->panel) {
+   if (drm_panel_unprepare(dp->plat_data->panel))
+   DRM_ERROR("failed to turnoff the panel\n");
+   }
+
pm_runtime_disable(>dev);
 }
 EXPORT_SYMBOL_GPL(analogix_dp_unbind);
-- 
1.9.1


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[PATCH v10 18/19] drm: bridge: analogix/dp: add panel prepare/unprepare in suspend/resume time

[Yakir Yang]

Turn off the panel power in suspend time would help to reduce
power waste.

Signed-off-by: Yakir Yang 
---
This patch was introduced in v10.1, suggested by Heiko

Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 13 +
 1 file changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index f5047ac..79ba88e 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -1364,6 +1364,12 @@ int analogix_dp_suspend(struct device *dev)
struct analogix_dp_device *dp = dev_get_drvdata(dev);
 
clk_disable_unprepare(dp->clock);
+
+   if (dp->plat_data->panel) {
+   if (drm_panel_unprepare(dp->plat_data->panel))
+   DRM_ERROR("failed to turnoff the panel\n");
+   }
+
return 0;
 }
 EXPORT_SYMBOL_GPL(analogix_dp_suspend);
@@ -1379,6 +1385,13 @@ int analogix_dp_resume(struct device *dev)
return ret;
}
 
+   if (dp->plat_data->panel) {
+   if (drm_panel_prepare(dp->plat_data->panel)) {
+   DRM_ERROR("failed to setup the panel\n");
+   return -EBUSY;
+   }
+   }
+
return 0;
 }
 EXPORT_SYMBOL_GPL(analogix_dp_resume);
-- 
1.9.1


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[PATCH v4 45/58] mtd: nand: vf610: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/vf610_nfc.c | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/vf610_nfc.c b/drivers/mtd/nand/vf610_nfc.c
index 1c86c6b..1bbb93a 100644
--- a/drivers/mtd/nand/vf610_nfc.c
+++ b/drivers/mtd/nand/vf610_nfc.c
@@ -156,7 +156,6 @@ enum vf610_nfc_variant {
 };
 
 struct vf610_nfc {
-   struct mtd_info mtd;
struct nand_chip chip;
struct device *dev;
void __iomem *regs;
@@ -171,7 +170,10 @@ struct vf610_nfc {
u32 ecc_mode;
 };
 
-#define mtd_to_nfc(_mtd) container_of(_mtd, struct vf610_nfc, mtd)
+static inline struct vf610_nfc *mtd_to_nfc(struct mtd_info *mtd)
+{
+   return container_of(mtd_to_nand(mtd), struct vf610_nfc, chip);
+}
 
 static struct nand_ecclayout vf610_nfc_ecc45 = {
.eccbytes = 45,
@@ -674,8 +676,8 @@ static int vf610_nfc_probe(struct platform_device *pdev)
return -ENOMEM;
 
nfc->dev = >dev;
-   mtd = >mtd;
chip = >chip;
+   mtd = nand_to_mtd(chip);
 
mtd->priv = chip;
mtd->owner = THIS_MODULE;
-- 
2.1.4

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[PATCH v4 27/58] mtd: nand: mpc5121: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/mpc5121_nfc.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/mpc5121_nfc.c b/drivers/mtd/nand/mpc5121_nfc.c
index 642c486..8b4cd82 100644
--- a/drivers/mtd/nand/mpc5121_nfc.c
+++ b/drivers/mtd/nand/mpc5121_nfc.c
@@ -118,7 +118,6 @@
 #define NFC_TIMEOUT(HZ / 10)   /* 1/10 s */
 
 struct mpc5121_nfc_prv {
-   struct mtd_info mtd;
struct nand_chipchip;
int irq;
void __iomem*regs;
@@ -654,8 +653,8 @@ static int mpc5121_nfc_probe(struct platform_device *op)
if (!prv)
return -ENOMEM;
 
-   mtd = >mtd;
chip = >chip;
+   mtd = nand_to_mtd(chip);
 
mtd->priv = chip;
mtd->dev.parent = dev;
-- 
2.1.4

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[PATCH v4 10/58] mtd: nand: brcm: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/brcmnand/brcmnand.c | 13 ++---
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c 
b/drivers/mtd/nand/brcmnand/brcmnand.c
index 190a99a..26b64bc 100644
--- a/drivers/mtd/nand/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/brcmnand/brcmnand.c
@@ -178,7 +178,6 @@ struct brcmnand_host {
struct list_headnode;
 
struct nand_chipchip;
-   struct mtd_info mtd;
struct platform_device  *pdev;
int cs;
 
@@ -1074,7 +1073,7 @@ static int brcmnand_low_level_op(struct brcmnand_host 
*host,
 enum brcmnand_llop_type type, u32 data,
 bool last_op)
 {
-   struct mtd_info *mtd = >mtd;
+   struct mtd_info *mtd = nand_to_mtd(>chip);
struct nand_chip *chip = >chip;
struct brcmnand_controller *ctrl = host->ctrl;
u32 tmp;
@@ -1802,7 +1801,7 @@ static inline int get_blk_adr_bytes(u64 size, u32 
writesize)
 
 static int brcmnand_setup_dev(struct brcmnand_host *host)
 {
-   struct mtd_info *mtd = >mtd;
+   struct mtd_info *mtd = nand_to_mtd(>chip);
struct nand_chip *chip = >chip;
struct brcmnand_controller *ctrl = host->ctrl;
struct brcmnand_cfg *cfg = >hwcfg;
@@ -1916,7 +1915,7 @@ static int brcmnand_init_cs(struct brcmnand_host *host, 
struct device_node *dn)
return -ENXIO;
}
 
-   mtd = >mtd;
+   mtd = nand_to_mtd(>chip);
chip = >chip;
 
nand_set_flash_node(chip, dn);
@@ -2060,8 +2059,8 @@ static int brcmnand_resume(struct device *dev)
}
 
list_for_each_entry(host, >host_list, node) {
-   struct mtd_info *mtd = >mtd;
-   struct nand_chip *chip = mtd_to_nand(mtd);
+   struct nand_chip *chip = >chip;
+   struct mtd_info *mtd = nand_to_mtd(chip);
 
brcmnand_save_restore_cs_config(host, 1);
 
@@ -2262,7 +2261,7 @@ int brcmnand_remove(struct platform_device *pdev)
struct brcmnand_host *host;
 
list_for_each_entry(host, >host_list, node)
-   nand_release(>mtd);
+   nand_release(nand_to_mtd(>chip));
 
dev_set_drvdata(>dev, NULL);
 
-- 
2.1.4

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[PATCH v4 08/58] mtd: nand: bcm47xx: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/bcm47xxnflash/bcm47xxnflash.h | 1 -
 drivers/mtd/nand/bcm47xxnflash/main.c  | 8 +---
 drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c   | 2 +-
 3 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/mtd/nand/bcm47xxnflash/bcm47xxnflash.h 
b/drivers/mtd/nand/bcm47xxnflash/bcm47xxnflash.h
index c005a62..8ea7571 100644
--- a/drivers/mtd/nand/bcm47xxnflash/bcm47xxnflash.h
+++ b/drivers/mtd/nand/bcm47xxnflash/bcm47xxnflash.h
@@ -12,7 +12,6 @@ struct bcm47xxnflash {
struct bcma_drv_cc *cc;
 
struct nand_chip nand_chip;
-   struct mtd_info mtd;
 
unsigned curr_command;
int curr_page_addr;
diff --git a/drivers/mtd/nand/bcm47xxnflash/main.c 
b/drivers/mtd/nand/bcm47xxnflash/main.c
index 9ba0c0f..4711ca2b 100644
--- a/drivers/mtd/nand/bcm47xxnflash/main.c
+++ b/drivers/mtd/nand/bcm47xxnflash/main.c
@@ -27,6 +27,7 @@ static int bcm47xxnflash_probe(struct platform_device *pdev)
 {
struct bcma_nflash *nflash = dev_get_platdata(>dev);
struct bcm47xxnflash *b47n;
+   struct mtd_info *mtd;
int err = 0;
 
b47n = devm_kzalloc(>dev, sizeof(*b47n), GFP_KERNEL);
@@ -34,8 +35,9 @@ static int bcm47xxnflash_probe(struct platform_device *pdev)
return -ENOMEM;
 
b47n->nand_chip.priv = b47n;
-   b47n->mtd.dev.parent = >dev;
-   b47n->mtd.priv = >nand_chip; /* Required */
+   mtd = nand_to_mtd(>nand_chip);
+   mtd->dev.parent = >dev;
+   mtd->priv = >nand_chip; /* Required */
b47n->cc = container_of(nflash, struct bcma_drv_cc, nflash);
 
if (b47n->cc->core->bus->chipinfo.id == BCMA_CHIP_ID_BCM4706) {
@@ -49,7 +51,7 @@ static int bcm47xxnflash_probe(struct platform_device *pdev)
return err;
}
 
-   err = mtd_device_parse_register(>mtd, probes, NULL, NULL, 0);
+   err = mtd_device_parse_register(mtd, probes, NULL, NULL, 0);
if (err) {
pr_err("Failed to register MTD device: %d\n", err);
return err;
diff --git a/drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c 
b/drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c
index e5b2e48..6524780 100644
--- a/drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c
+++ b/drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c
@@ -421,7 +421,7 @@ int bcm47xxnflash_ops_bcm4706_init(struct bcm47xxnflash 
*b47n)
(w4 << 24 | w3 << 18 | w2 << 12 | w1 << 6 | w0));
 
/* Scan NAND */
-   err = nand_scan(>mtd, 1);
+   err = nand_scan(nand_to_mtd(>nand_chip), 1);
if (err) {
pr_err("Could not scan NAND flash: %d\n", err);
goto exit;
-- 
2.1.4

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[PATCH v4 12/58] mtd: nand: cmx270: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/cmx270_nand.c | 13 +
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/drivers/mtd/nand/cmx270_nand.c b/drivers/mtd/nand/cmx270_nand.c
index 43bded6..6b26e0c 100644
--- a/drivers/mtd/nand/cmx270_nand.c
+++ b/drivers/mtd/nand/cmx270_nand.c
@@ -160,10 +160,8 @@ static int __init cmx270_init(void)
gpio_direction_input(GPIO_NAND_RB);
 
/* Allocate memory for MTD device structure and private data */
-   cmx270_nand_mtd = kzalloc(sizeof(struct mtd_info) +
- sizeof(struct nand_chip),
- GFP_KERNEL);
-   if (!cmx270_nand_mtd) {
+   this = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
+   if (!this) {
ret = -ENOMEM;
goto err_kzalloc;
}
@@ -175,8 +173,7 @@ static int __init cmx270_init(void)
goto err_ioremap;
}
 
-   /* Get pointer to private data */
-   this = (struct nand_chip *)(_nand_mtd[1]);
+   cmx270_nand_mtd = nand_to_mtd(this);
 
/* Link the private data with the MTD structure */
cmx270_nand_mtd->owner = THIS_MODULE;
@@ -216,7 +213,7 @@ static int __init cmx270_init(void)
 err_scan:
iounmap(cmx270_nand_io);
 err_ioremap:
-   kfree(cmx270_nand_mtd);
+   kfree(this);
 err_kzalloc:
gpio_free(GPIO_NAND_RB);
 err_gpio_request:
@@ -241,7 +238,7 @@ static void __exit cmx270_cleanup(void)
iounmap(cmx270_nand_io);
 
/* Free the MTD device structure */
-   kfree (cmx270_nand_mtd);
+   kfree(mtd_to_nand(cmx270_nand_mtd));
 }
 module_exit(cmx270_cleanup);
 
-- 
2.1.4

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[PATCH v4 11/58] mtd: nand: cafe: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/cafe_nand.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/mtd/nand/cafe_nand.c b/drivers/mtd/nand/cafe_nand.c
index 77c92f1..7d6a142 100644
--- a/drivers/mtd/nand/cafe_nand.c
+++ b/drivers/mtd/nand/cafe_nand.c
@@ -605,11 +605,11 @@ static int cafe_nand_probe(struct pci_dev *pdev,
 
pci_set_master(pdev);
 
-   mtd = kzalloc(sizeof(*mtd) + sizeof(struct cafe_priv), GFP_KERNEL);
-   if (!mtd)
+   cafe = kzalloc(sizeof(*cafe), GFP_KERNEL);
+   if (!cafe)
return  -ENOMEM;
-   cafe = (void *)([1]);
 
+   mtd = nand_to_mtd(>nand);
mtd->dev.parent = >dev;
mtd->priv = >nand;
cafe->nand.priv = cafe;
@@ -792,7 +792,7 @@ static int cafe_nand_probe(struct pci_dev *pdev,
  out_ior:
pci_iounmap(pdev, cafe->mmio);
  out_free_mtd:
-   kfree(mtd);
+   kfree(cafe);
  out:
return err;
 }
@@ -813,7 +813,7 @@ static void cafe_nand_remove(struct pci_dev *pdev)
2112 + sizeof(struct nand_buffers) +
mtd->writesize + mtd->oobsize,
cafe->dmabuf, cafe->dmaaddr);
-   kfree(mtd);
+   kfree(cafe);
 }
 
 static const struct pci_device_id cafe_nand_tbl[] = {
-- 
2.1.4

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[PATCH v4 09/58] mtd: nand: bf5xx: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/bf5xx_nand.c | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/mtd/nand/bf5xx_nand.c b/drivers/mtd/nand/bf5xx_nand.c
index d9da5ed..928d599 100644
--- a/drivers/mtd/nand/bf5xx_nand.c
+++ b/drivers/mtd/nand/bf5xx_nand.c
@@ -142,7 +142,6 @@ static struct nand_ecclayout bootrom_ecclayout = {
 struct bf5xx_nand_info {
/* mtd info */
struct nand_hw_control  controller;
-   struct mtd_info mtd;
struct nand_chipchip;
 
/* platform info */
@@ -160,7 +159,8 @@ struct bf5xx_nand_info {
  */
 static struct bf5xx_nand_info *mtd_to_nand_info(struct mtd_info *mtd)
 {
-   return container_of(mtd, struct bf5xx_nand_info, mtd);
+   return container_of(mtd_to_nand(mtd), struct bf5xx_nand_info,
+   chip);
 }
 
 static struct bf5xx_nand_info *to_nand_info(struct platform_device *pdev)
@@ -660,7 +660,7 @@ static int bf5xx_nand_hw_init(struct bf5xx_nand_info *info)
  */
 static int bf5xx_nand_add_partition(struct bf5xx_nand_info *info)
 {
-   struct mtd_info *mtd = >mtd;
+   struct mtd_info *mtd = nand_to_mtd(>chip);
struct mtd_partition *parts = info->platform->partitions;
int nr = info->platform->nr_partitions;
 
@@ -675,7 +675,7 @@ static int bf5xx_nand_remove(struct platform_device *pdev)
 * and their partitions, then go through freeing the
 * resources used
 */
-   nand_release(>mtd);
+   nand_release(nand_to_mtd(>chip));
 
peripheral_free_list(bfin_nfc_pin_req);
bf5xx_nand_dma_remove(info);
@@ -756,6 +756,7 @@ static int bf5xx_nand_probe(struct platform_device *pdev)
 
/* initialise chip data struct */
chip = >chip;
+   mtd = nand_to_mtd(>chip);
 
if (plat->data_width)
chip->options |= NAND_BUSWIDTH_16;
@@ -772,7 +773,7 @@ static int bf5xx_nand_probe(struct platform_device *pdev)
chip->cmd_ctrl = bf5xx_nand_hwcontrol;
chip->dev_ready= bf5xx_nand_devready;
 
-   chip->priv = >mtd;
+   chip->priv = mtd;
chip->controller   = >controller;
 
chip->IO_ADDR_R= (void __iomem *) NFC_READ;
@@ -781,7 +782,6 @@ static int bf5xx_nand_probe(struct platform_device *pdev)
chip->chip_delay   = 0;
 
/* initialise mtd info data struct */
-   mtd = >mtd;
mtd->priv   = chip;
mtd->dev.parent = >dev;
 
-- 
2.1.4

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[PATCH v10 19/19] drm: bridge: analogix/dp: Fix the possible dead lock in bridge disable time

[Yakir Yang]

It may caused a dead lock if we flush the hpd work in bridge disable time.

The normal flow would like:
  IN --> DRM IOCTL
1. Acquire crtc_ww_class_mutex (DRM IOCTL)
  IN --> analogix_dp_bridge
2. Acquire hpd work lock (Flush hpd work)
3. HPD work already in idle, no need to run the work function.
  OUT <-- analogix_dp_bridge
  OUT <-- DRM IOCTL

The dead lock flow would like:
  IN --> DRM IOCTL
1. Acquire crtc_ww_class_mutex (DRM IOCTL)
  IN --> analogix_dp_bridge
2. Acquire hpd work lock (Flush hpd work)
  IN --> analogix_dp_hotplug
  IN --> drm_helper_hpd_irq_event
3. Acquire mode_config lock (This lock already have been acquired in 
previous step 1)
** Dead Lock Now **

It's wrong to flush the hpd work in bridge->disable time, I guess the
original code just want to ensure the delay work must be finish before
encoder disabled.

The flush work in bridge disable time is try to ensure the HPD event
won't be missed before display card disabled, actually we can take a
fast respond way(interrupt thread) to update DRM HPD event to fix the
delay update and possible dead lock.

Signed-off-by: Yakir Yang 
---
This patch was introduced in v10.1, suggested by Heiko

Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 62 ++
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  3 +-
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  | 26 +
 3 files changed, 55 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 79ba88e..5977e06 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -848,47 +848,40 @@ static void analogix_dp_enable_scramble(struct 
analogix_dp_device *dp,
}
 }
 
-static irqreturn_t analogix_dp_irq_handler(int irq, void *arg)
+static irqreturn_t analogix_dp_hardirq(int irq, void *arg)
 {
struct analogix_dp_device *dp = arg;
-
+   irqreturn_t ret = IRQ_NONE;
enum dp_irq_type irq_type;
 
irq_type = analogix_dp_get_irq_type(dp);
-   switch (irq_type) {
-   case DP_IRQ_TYPE_HP_CABLE_IN:
-   dev_dbg(dp->dev, "Received irq - cable in\n");
-   schedule_work(>hotplug_work);
-   analogix_dp_clear_hotplug_interrupts(dp);
-   break;
-   case DP_IRQ_TYPE_HP_CABLE_OUT:
-   dev_dbg(dp->dev, "Received irq - cable out\n");
-   analogix_dp_clear_hotplug_interrupts(dp);
-   break;
-   case DP_IRQ_TYPE_HP_CHANGE:
-   /*
-* We get these change notifications once in a while, but there
-* is nothing we can do with them. Just ignore it for now and
-* only handle cable changes.
-*/
-   dev_dbg(dp->dev, "Received irq - hotplug change; ignoring.\n");
-   analogix_dp_clear_hotplug_interrupts(dp);
-   break;
-   default:
-   dev_err(dp->dev, "Received irq - unknown type!\n");
-   break;
+   if (irq_type != DP_IRQ_TYPE_UNKNOWN) {
+   analogix_dp_mute_hpd_interrupt(dp);
+   ret = IRQ_WAKE_THREAD;
}
-   return IRQ_HANDLED;
+
+   return ret;
 }
 
-static void analogix_dp_hotplug(struct work_struct *work)
+static irqreturn_t analogix_dp_irq_thread(int irq, void *arg)
 {
-   struct analogix_dp_device *dp;
+   struct analogix_dp_device *dp = arg;
+   enum dp_irq_type irq_type;
+
+   irq_type = analogix_dp_get_irq_type(dp);
+   if (irq_type & DP_IRQ_TYPE_HP_CABLE_IN ||
+   irq_type & DP_IRQ_TYPE_HP_CABLE_OUT) {
+   dev_dbg(dp->dev, "Detected cable status changed!\n");
+   if (dp->drm_dev)
+   drm_helper_hpd_irq_event(dp->drm_dev);
+   }
 
-   dp = container_of(work, struct analogix_dp_device, hotplug_work);
+   if (irq_type != DP_IRQ_TYPE_UNKNOWN) {
+   analogix_dp_clear_hotplug_interrupts(dp);
+   analogix_dp_unmute_hpd_interrupt(dp);
+   }
 
-   if (dp->drm_dev)
-   drm_helper_hpd_irq_event(dp->drm_dev);
+   return IRQ_HANDLED;
 }
 
 static void analogix_dp_commit(struct analogix_dp_device *dp)
@@ -1041,7 +1034,6 @@ static void analogix_dp_bridge_disable(struct drm_bridge 
*bridge)
}
 
disable_irq(dp->irq);
-   flush_work(>hotplug_work);
phy_power_off(dp->phy);
 
if (dp->plat_data->power_off)
@@ -1300,8 +1292,6 @@ int analogix_dp_bind(struct device *dev, struct 
drm_device *drm_dev,
return -ENODEV;
}
 
-   INIT_WORK(>hotplug_work, analogix_dp_hotplug);
-

[PATCH v4 05/58] mtd: nand: ams-delta: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance
instead of allocating our own.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/ams-delta.c | 13 +
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/drivers/mtd/nand/ams-delta.c b/drivers/mtd/nand/ams-delta.c
index b2b49c4..0f638c6 100644
--- a/drivers/mtd/nand/ams-delta.c
+++ b/drivers/mtd/nand/ams-delta.c
@@ -183,19 +183,16 @@ static int ams_delta_init(struct platform_device *pdev)
return -ENXIO;
 
/* Allocate memory for MTD device structure and private data */
-   ams_delta_mtd = kzalloc(sizeof(struct mtd_info) +
-   sizeof(struct nand_chip), GFP_KERNEL);
-   if (!ams_delta_mtd) {
+   this = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
+   if (!this) {
printk (KERN_WARNING "Unable to allocate E3 NAND MTD device 
structure.\n");
err = -ENOMEM;
goto out;
}
 
+   ams_delta_mtd = nand_to_mtd(this);
ams_delta_mtd->owner = THIS_MODULE;
 
-   /* Get pointer to private data */
-   this = (struct nand_chip *) (_delta_mtd[1]);
-
/* Link the private data with the MTD structure */
ams_delta_mtd->priv = this;
 
@@ -256,7 +253,7 @@ out_gpio:
gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);
iounmap(io_base);
 out_free:
-   kfree(ams_delta_mtd);
+   kfree(this);
  out:
return err;
 }
@@ -276,7 +273,7 @@ static int ams_delta_cleanup(struct platform_device *pdev)
iounmap(io_base);
 
/* Free the MTD device structure */
-   kfree(ams_delta_mtd);
+   kfree(mtd_to_nand(ams_delta_mtd));
 
return 0;
 }
-- 
2.1.4

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[PATCH v4 30/58] mtd: nand: ndfc: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/ndfc.c | 24 +---
 1 file changed, 13 insertions(+), 11 deletions(-)

diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c
index d8a23b0..3a7168e 100644
--- a/drivers/mtd/nand/ndfc.c
+++ b/drivers/mtd/nand/ndfc.c
@@ -37,7 +37,6 @@
 struct ndfc_controller {
struct platform_device *ofdev;
void __iomem *ndfcbase;
-   struct mtd_info mtd;
struct nand_chip chip;
int chip_select;
struct nand_hw_control ndfc_control;
@@ -147,6 +146,7 @@ static int ndfc_chip_init(struct ndfc_controller *ndfc,
 {
struct device_node *flash_np;
struct nand_chip *chip = >chip;
+   struct mtd_info *mtd = nand_to_mtd(chip);
int ret;
 
chip->IO_ADDR_R = ndfc->ndfcbase + NDFC_DATA;
@@ -167,31 +167,32 @@ static int ndfc_chip_init(struct ndfc_controller *ndfc,
chip->ecc.strength = 1;
chip->priv = ndfc;
 
-   ndfc->mtd.priv = chip;
-   ndfc->mtd.dev.parent = >ofdev->dev;
+   mtd->priv = chip;
+   mtd->dev.parent = >ofdev->dev;
 
flash_np = of_get_next_child(node, NULL);
if (!flash_np)
return -ENODEV;
nand_set_flash_node(chip, flash_np);
 
-   ndfc->mtd.name = kasprintf(GFP_KERNEL, "%s.%s",
-   dev_name(>ofdev->dev), flash_np->name);
-   if (!ndfc->mtd.name) {
+   ppdata.of_node = flash_np;
+   mtd->name = kasprintf(GFP_KERNEL, "%s.%s", dev_name(>ofdev->dev),
+ flash_np->name);
+   if (!mtd->name) {
ret = -ENOMEM;
goto err;
}
 
-   ret = nand_scan(>mtd, 1);
+   ret = nand_scan(mtd, 1);
if (ret)
goto err;
 
-   ret = mtd_device_register(>mtd, NULL, 0);
+   ret = mtd_device_register(mtd, NULL, 0);
 
 err:
of_node_put(flash_np);
if (ret)
-   kfree(ndfc->mtd.name);
+   kfree(mtd->name);
return ret;
 }
 
@@ -258,9 +259,10 @@ static int ndfc_probe(struct platform_device *ofdev)
 static int ndfc_remove(struct platform_device *ofdev)
 {
struct ndfc_controller *ndfc = dev_get_drvdata(>dev);
+   struct mtd_info *mtd = nand_to_mtd(>chip);
 
-   nand_release(>mtd);
-   kfree(ndfc->mtd.name);
+   nand_release(mtd);
+   kfree(mtd->name);
 
return 0;
 }
-- 
2.1.4

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[PATCH v4 44/58] mtd: nand: txx9ndfmc: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/txx9ndfmc.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/txx9ndfmc.c b/drivers/mtd/nand/txx9ndfmc.c
index ff9afb1..da7fcbd 100644
--- a/drivers/mtd/nand/txx9ndfmc.c
+++ b/drivers/mtd/nand/txx9ndfmc.c
@@ -63,7 +63,6 @@
 struct txx9ndfmc_priv {
struct platform_device *dev;
struct nand_chip chip;
-   struct mtd_info mtd;
int cs;
const char *mtdname;
 };
@@ -322,7 +321,7 @@ static int __init txx9ndfmc_probe(struct platform_device 
*dev)
if (!txx9_priv)
continue;
chip = _priv->chip;
-   mtd = _priv->mtd;
+   mtd = nand_to_mtd(chip);
mtd->dev.parent = >dev;
 
mtd->priv = chip;
-- 
2.1.4

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[PATCH v4 50/58] mtd: nand: remove useless mtd->priv = chip assignments

[Boris Brezillon]

mtd_to_nand() now uses the container_of() approach to transform an
mtd_info pointer into a nand_chip one. Drop useless mtd->priv
assignments from NAND controller drivers.

Signed-off-by: Boris Brezillon 
---
Patch generated with the following coccinelle script:

---8<
virtual patch

@@
struct mtd_info m;
struct mtd_info *mp;
struct nand_chip *c;
@@
(
-(m).priv = c;
|
-(mp)->priv = c;
|
-(mp)->priv = (void *)c;
)
---8<
---
 drivers/mtd/nand/ams-delta.c   | 3 ---
 drivers/mtd/nand/atmel_nand.c  | 1 -
 drivers/mtd/nand/au1550nd.c| 1 -
 drivers/mtd/nand/bcm47xxnflash/main.c  | 1 -
 drivers/mtd/nand/bf5xx_nand.c  | 1 -
 drivers/mtd/nand/brcmnand/brcmnand.c   | 1 -
 drivers/mtd/nand/cafe_nand.c   | 1 -
 drivers/mtd/nand/cmx270_nand.c | 1 -
 drivers/mtd/nand/cs553x_nand.c | 1 -
 drivers/mtd/nand/davinci_nand.c| 1 -
 drivers/mtd/nand/denali.c  | 1 -
 drivers/mtd/nand/diskonchip.c  | 1 -
 drivers/mtd/nand/docg4.c   | 1 -
 drivers/mtd/nand/fsl_elbc_nand.c   | 1 -
 drivers/mtd/nand/fsl_ifc_nand.c| 1 -
 drivers/mtd/nand/fsl_upm.c | 1 -
 drivers/mtd/nand/fsmc_nand.c   | 1 -
 drivers/mtd/nand/gpio.c| 1 -
 drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 1 -
 drivers/mtd/nand/hisi504_nand.c| 1 -
 drivers/mtd/nand/jz4740_nand.c | 1 -
 drivers/mtd/nand/lpc32xx_mlc.c | 1 -
 drivers/mtd/nand/lpc32xx_slc.c | 1 -
 drivers/mtd/nand/mpc5121_nfc.c | 1 -
 drivers/mtd/nand/mxc_nand.c| 1 -
 drivers/mtd/nand/nandsim.c | 1 -
 drivers/mtd/nand/ndfc.c| 1 -
 drivers/mtd/nand/nuc900_nand.c | 1 -
 drivers/mtd/nand/omap2.c   | 1 -
 drivers/mtd/nand/orion_nand.c  | 1 -
 drivers/mtd/nand/pasemi_nand.c | 1 -
 drivers/mtd/nand/plat_nand.c   | 1 -
 drivers/mtd/nand/pxa3xx_nand.c | 1 -
 drivers/mtd/nand/r852.c| 1 -
 drivers/mtd/nand/s3c2410.c | 2 --
 drivers/mtd/nand/sh_flctl.c| 1 -
 drivers/mtd/nand/sharpsl.c | 1 -
 drivers/mtd/nand/socrates_nand.c   | 1 -
 drivers/mtd/nand/sunxi_nand.c  | 1 -
 drivers/mtd/nand/tmio_nand.c   | 1 -
 drivers/mtd/nand/txx9ndfmc.c   | 2 --
 drivers/mtd/nand/vf610_nfc.c   | 1 -
 42 files changed, 46 deletions(-)

diff --git a/drivers/mtd/nand/ams-delta.c b/drivers/mtd/nand/ams-delta.c
index 0f638c6..1a18938 100644
--- a/drivers/mtd/nand/ams-delta.c
+++ b/drivers/mtd/nand/ams-delta.c
@@ -193,9 +193,6 @@ static int ams_delta_init(struct platform_device *pdev)
ams_delta_mtd = nand_to_mtd(this);
ams_delta_mtd->owner = THIS_MODULE;
 
-   /* Link the private data with the MTD structure */
-   ams_delta_mtd->priv = this;
-
/*
 * Don't try to request the memory region from here,
 * it should have been already requested from the
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 9ba2831..18c4e14 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -2128,7 +2128,6 @@ static int atmel_nand_probe(struct platform_device *pdev)
}
 
nand_chip->priv = host; /* link the private data structures */
-   mtd->priv = nand_chip;
mtd->dev.parent = >dev;
 
/* Set address of NAND IO lines */
diff --git a/drivers/mtd/nand/au1550nd.c b/drivers/mtd/nand/au1550nd.c
index 280e5b6..341ea49 100644
--- a/drivers/mtd/nand/au1550nd.c
+++ b/drivers/mtd/nand/au1550nd.c
@@ -441,7 +441,6 @@ static int au1550nd_probe(struct platform_device *pdev)
 
this = >chip;
mtd = nand_to_mtd(this);
-   mtd->priv = this;
mtd->dev.parent = >dev;
 
/* figure out which CS# r->start belongs to */
diff --git a/drivers/mtd/nand/bcm47xxnflash/main.c 
b/drivers/mtd/nand/bcm47xxnflash/main.c
index 4711ca2b..0f0a798 100644
--- a/drivers/mtd/nand/bcm47xxnflash/main.c
+++ b/drivers/mtd/nand/bcm47xxnflash/main.c
@@ -37,7 +37,6 @@ static int bcm47xxnflash_probe(struct platform_device *pdev)
b47n->nand_chip.priv = b47n;
mtd = nand_to_mtd(>nand_chip);
mtd->dev.parent = >dev;
-   mtd->priv = >nand_chip; /* Required */
b47n->cc = container_of(nflash, struct bcma_drv_cc, nflash);
 
if (b47n->cc->core->bus->chipinfo.id == BCMA_CHIP_ID_BCM4706) {
diff --git a/drivers/mtd/nand/bf5xx_nand.c b/drivers/mtd/nand/bf5xx_nand.c
index 928d599..9514e13 100644
--- a/drivers/mtd/nand/bf5xx_nand.c
+++ b/drivers/mtd/nand/bf5xx_nand.c
@@ -782,7 +782,6 @@ static int bf5xx_nand_probe(struct platform_device *pdev)
chip->chip_delay   = 0;
 
/* initialise mtd info data struct */
-   mtd->priv   = chip;
mtd->dev.parent = >dev;
 
/* initialise the hardware */
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c 
b/drivers/mtd/nand/brcmnand/brcmnand.c

[PATCH v4 49/58] mtd: nand: update mtd_to_nand()

[Boris Brezillon]

Now that all drivers are using the mtd instance embedded in the nand_chip
struct we can safely update the mtd_to_nand() implementation to use
the container_of macro instead of returning the content of mtd->priv.
This will allow us to remove mtd->priv = chip assignments done in all
NAND controller drivers.

Signed-off-by: Boris Brezillon 
---
 include/linux/mtd/nand.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index b614ed2..9cb7ace 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -734,7 +734,7 @@ static inline struct device_node 
*nand_get_flash_node(struct nand_chip *chip)
 
 static inline struct nand_chip *mtd_to_nand(struct mtd_info *mtd)
 {
-   return mtd->priv;
+   return container_of(mtd, struct nand_chip, mtd);
 }
 
 static inline struct mtd_info *nand_to_mtd(struct nand_chip *chip)
-- 
2.1.4

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[PATCH v4 43/58] mtd: nand: tmio: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/tmio_nand.c | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/nand/tmio_nand.c b/drivers/mtd/nand/tmio_nand.c
index 6d0cbe9..e7b82e1 100644
--- a/drivers/mtd/nand/tmio_nand.c
+++ b/drivers/mtd/nand/tmio_nand.c
@@ -103,7 +103,6 @@
 /*--*/
 
 struct tmio_nand {
-   struct mtd_info mtd;
struct nand_chip chip;
 
struct platform_device *dev;
@@ -119,7 +118,10 @@ struct tmio_nand {
unsigned read_good:1;
 };
 
-#define mtd_to_tmio(m) container_of(m, struct tmio_nand, mtd)
+static inline struct tmio_nand *mtd_to_tmio(struct mtd_info *mtd)
+{
+   return container_of(mtd_to_nand(mtd), struct tmio_nand, chip);
+}
 
 
 /*--*/
@@ -378,8 +380,8 @@ static int tmio_probe(struct platform_device *dev)
tmio->dev = dev;
 
platform_set_drvdata(dev, tmio);
-   mtd = >mtd;
nand_chip = >chip;
+   mtd = nand_to_mtd(nand_chip);
mtd->priv = nand_chip;
mtd->name = "tmio-nand";
mtd->dev.parent = >dev;
@@ -456,7 +458,7 @@ static int tmio_remove(struct platform_device *dev)
 {
struct tmio_nand *tmio = platform_get_drvdata(dev);
 
-   nand_release(>mtd);
+   nand_release(nand_to_mtd(>chip));
tmio_hw_stop(dev, tmio);
return 0;
 }
-- 
2.1.4

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[PATCH v4 47/58] staging: mt29f_spinand: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device, use it instead of allocating
a new one.

Signed-off-by: Boris Brezillon 
---
 drivers/staging/mt29f_spinand/mt29f_spinand.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/staging/mt29f_spinand/mt29f_spinand.c 
b/drivers/staging/mt29f_spinand/mt29f_spinand.c
index 8924a96..8171b74 100644
--- a/drivers/staging/mt29f_spinand/mt29f_spinand.c
+++ b/drivers/staging/mt29f_spinand/mt29f_spinand.c
@@ -903,9 +903,7 @@ static int spinand_probe(struct spi_device *spi_nand)
chip->options   |= NAND_CACHEPRG;
chip->select_chip = spinand_select_chip;
 
-   mtd = devm_kzalloc(_nand->dev, sizeof(struct mtd_info), GFP_KERNEL);
-   if (!mtd)
-   return -ENOMEM;
+   mtd = nand_to_mtd(chip);
 
dev_set_drvdata(_nand->dev, mtd);
 
-- 
2.1.4

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[PATCH v4 46/58] mtd: nand: update the documentation to reflect framework changes

[Boris Brezillon]

The MTD device is now directly embedded in the nand_chip struct. Update the
mtdnand documentation to mention this aspect and fix the different
examples.

Signed-off-by: Boris Brezillon 
---
 Documentation/DocBook/mtdnand.tmpl | 31 +++
 1 file changed, 15 insertions(+), 16 deletions(-)

diff --git a/Documentation/DocBook/mtdnand.tmpl 
b/Documentation/DocBook/mtdnand.tmpl
index 403a7ab..b442921 100644
--- a/Documentation/DocBook/mtdnand.tmpl
+++ b/Documentation/DocBook/mtdnand.tmpl
@@ -162,12 +162,15 @@

Basic defines

-   At least you have to provide a mtd structure and
-   a storage for the ioremap'ed chip address.
-   You can allocate the mtd structure using kmalloc
-   or you can allocate it statically.
-   In case of static allocation you have to allocate
-   a nand_chip structure too.
+   At least you have to provide a nand_chip structure
+   and a storage for the ioremap'ed chip address.
+   You can allocate the nand_chip structure using
+   kmalloc or you can allocate it statically.
+   The NAND chip structure embeds an mtd structure
+   which will be registered to the MTD subsystem.
+   You can extract a pointer to the mtd structure
+   from a nand_chip pointer using the nand_to_mtd()
+   helper.


Kmalloc based example
@@ -180,7 +183,6 @@ static void __iomem *baseaddr;
Static example


-static struct mtd_info board_mtd;
 static struct nand_chip board_chip;
 static void __iomem *baseaddr;

@@ -274,13 +276,15 @@ static int __init board_init (void)
int err = 0;
 
/* Allocate memory for MTD device structure and private data */
-   board_mtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), 
GFP_KERNEL);
-   if (!board_mtd) {
+   this = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
+   if (!this) {
printk ("Unable to allocate NAND MTD device structure.\n");
err = -ENOMEM;
goto out;
}
 
+   board_mtd = nand_to_mtd(this);
+
/* map physical address */
baseaddr = ioremap(CHIP_PHYSICAL_ADDRESS, 1024);
if (!baseaddr) {
@@ -289,11 +293,6 @@ static int __init board_init (void)
goto out_mtd;
}
 
-   /* Get pointer to private data */
-   this = (struct nand_chip *) ();
-   /* Link the private data with the MTD structure */
-   board_mtd->priv = this;
-
/* Set address of NAND IO lines */
this->IO_ADDR_R = baseaddr;
this->IO_ADDR_W = baseaddr;
@@ -317,7 +316,7 @@ static int __init board_init (void)
 out_ior:
iounmap(baseaddr);
 out_mtd:
-   kfree (board_mtd);
+   kfree (this);
 out:
return err;
 }
@@ -343,7 +342,7 @@ static void __exit board_cleanup (void)
iounmap(baseaddr);

/* Free the MTD device structure */
-   kfree (board_mtd);
+   kfree (mtd_to_nand(board_mtd));
 }
 module_exit(board_cleanup);
 #endif
-- 
2.1.4

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[PATCH v4 52/58] staging: mt29f_spinand: remove useless mtd->priv = chip assignment

[Boris Brezillon]

mtd_to_nand() now uses the container_of() approach to transform an
mtd_info pointer into a nand_chip one. Drop useless mtd->priv
assignments from NAND controller drivers.

Signed-off-by: Boris Brezillon 
---
Patch generated with the following coccinelle script:

---8<
virtual patch

@@
struct mtd_info m;
struct mtd_info *mp;
struct nand_chip *c;
@@
(
-(m).priv = c;
|
-(mp)->priv = c;
|
-(mp)->priv = (void *)c;
)
---8<
---
 drivers/staging/mt29f_spinand/mt29f_spinand.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/staging/mt29f_spinand/mt29f_spinand.c 
b/drivers/staging/mt29f_spinand/mt29f_spinand.c
index 8171b74..b7d429d 100644
--- a/drivers/staging/mt29f_spinand/mt29f_spinand.c
+++ b/drivers/staging/mt29f_spinand/mt29f_spinand.c
@@ -907,7 +907,6 @@ static int spinand_probe(struct spi_device *spi_nand)
 
dev_set_drvdata(_nand->dev, mtd);
 
-   mtd->priv = chip;
mtd->dev.parent = _nand->dev;
mtd->oobsize = 64;
 
-- 
2.1.4

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[PATCH v4 04/58] mtd: nand: omap2: create and use mtd_to_omap()

[Boris Brezillon]

Define and use mtd_to_omap() instead of container_of();

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/omap2.c | 55 ++--
 1 file changed, 21 insertions(+), 34 deletions(-)

diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 944a74e..1fb40db 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -177,6 +177,10 @@ struct omap_nand_info {
struct device_node  *of_node;
 };
 
+static inline struct omap_nand_info *mtd_to_omap(struct mtd_info *mtd)
+{
+   return container_of(mtd, struct omap_nand_info, mtd);
+}
 /**
  * omap_prefetch_enable - configures and starts prefetch transfer
  * @cs: cs (chip select) number
@@ -247,8 +251,7 @@ static int omap_prefetch_reset(int cs, struct 
omap_nand_info *info)
  */
 static void omap_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
 {
-   struct omap_nand_info *info = container_of(mtd,
-   struct omap_nand_info, mtd);
+   struct omap_nand_info *info = mtd_to_omap(mtd);
 
if (cmd != NAND_CMD_NONE) {
if (ctrl & NAND_CLE)
@@ -283,8 +286,7 @@ static void omap_read_buf8(struct mtd_info *mtd, u_char 
*buf, int len)
  */
 static void omap_write_buf8(struct mtd_info *mtd, const u_char *buf, int len)
 {
-   struct omap_nand_info *info = container_of(mtd,
-   struct omap_nand_info, mtd);
+   struct omap_nand_info *info = mtd_to_omap(mtd);
u_char *p = (u_char *)buf;
u32 status = 0;
 
@@ -319,8 +321,7 @@ static void omap_read_buf16(struct mtd_info *mtd, u_char 
*buf, int len)
  */
 static void omap_write_buf16(struct mtd_info *mtd, const u_char * buf, int len)
 {
-   struct omap_nand_info *info = container_of(mtd,
-   struct omap_nand_info, mtd);
+   struct omap_nand_info *info = mtd_to_omap(mtd);
u16 *p = (u16 *) buf;
u32 status = 0;
/* FIXME try bursts of writesw() or DMA ... */
@@ -344,8 +345,7 @@ static void omap_write_buf16(struct mtd_info *mtd, const 
u_char * buf, int len)
  */
 static void omap_read_buf_pref(struct mtd_info *mtd, u_char *buf, int len)
 {
-   struct omap_nand_info *info = container_of(mtd,
-   struct omap_nand_info, mtd);
+   struct omap_nand_info *info = mtd_to_omap(mtd);
uint32_t r_count = 0;
int ret = 0;
u32 *p = (u32 *)buf;
@@ -392,8 +392,7 @@ static void omap_read_buf_pref(struct mtd_info *mtd, u_char 
*buf, int len)
 static void omap_write_buf_pref(struct mtd_info *mtd,
const u_char *buf, int len)
 {
-   struct omap_nand_info *info = container_of(mtd,
-   struct omap_nand_info, mtd);
+   struct omap_nand_info *info = mtd_to_omap(mtd);
uint32_t w_count = 0;
int i = 0, ret = 0;
u16 *p = (u16 *)buf;
@@ -458,8 +457,7 @@ static void omap_nand_dma_callback(void *data)
 static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,
unsigned int len, int is_write)
 {
-   struct omap_nand_info *info = container_of(mtd,
-   struct omap_nand_info, mtd);
+   struct omap_nand_info *info = mtd_to_omap(mtd);
struct dma_async_tx_descriptor *tx;
enum dma_data_direction dir = is_write ? DMA_TO_DEVICE :
DMA_FROM_DEVICE;
@@ -623,8 +621,7 @@ done:
  */
 static void omap_read_buf_irq_pref(struct mtd_info *mtd, u_char *buf, int len)
 {
-   struct omap_nand_info *info = container_of(mtd,
-   struct omap_nand_info, mtd);
+   struct omap_nand_info *info = mtd_to_omap(mtd);
int ret = 0;
 
if (len <= mtd->oobsize) {
@@ -671,8 +668,7 @@ out_copy:
 static void omap_write_buf_irq_pref(struct mtd_info *mtd,
const u_char *buf, int len)
 {
-   struct omap_nand_info *info = container_of(mtd,
-   struct omap_nand_info, mtd);
+   struct omap_nand_info *info = mtd_to_omap(mtd);
int ret = 0;
unsigned long tim, limit;
u32 val;
@@ -886,8 +882,7 @@ static int omap_compare_ecc(u8 *ecc_data1,  /* read from 
NAND memory */
 static int omap_correct_data(struct mtd_info *mtd, u_char *dat,
u_char *read_ecc, u_char *calc_ecc)
 {
-   struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
-   mtd);
+   struct omap_nand_info *info = mtd_to_omap(mtd);
int blockCnt = 0, i = 0, ret = 0;
int stat = 0;
 
@@ -928,8 +923,7 @@ static int omap_correct_data(struct mtd_info *mtd, u_char 

[PATCH v4 06/58] mtd: nand: atmel: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/atmel_nand.c | 13 +++--
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index edd191a..9ba2831 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -116,7 +116,6 @@ static struct atmel_nfc nand_nfc;
 
 struct atmel_nand_host {
struct nand_chipnand_chip;
-   struct mtd_info mtd;
void __iomem*io_base;
dma_addr_t  io_phys;
struct atmel_nand_data  board;
@@ -317,8 +316,10 @@ static int nfc_set_sram_bank(struct atmel_nand_host *host, 
unsigned int bank)
return -EINVAL;
 
if (bank) {
+   struct mtd_info *mtd = nand_to_mtd(>nand_chip);
+
/* Only for a 2k-page or lower flash, NFC can handle 2 banks */
-   if (host->mtd.writesize > 2048)
+   if (mtd->writesize > 2048)
return -EINVAL;
nfc_writel(host->nfc->hsmc_regs, BANK, ATMEL_HSMC_NFC_BANK1);
} else {
@@ -1159,8 +1160,8 @@ static uint16_t *create_lookup_table(struct device *dev, 
int sector_size)
 static int atmel_pmecc_nand_init_params(struct platform_device *pdev,
 struct atmel_nand_host *host)
 {
-   struct mtd_info *mtd = >mtd;
struct nand_chip *nand_chip = >nand_chip;
+   struct mtd_info *mtd = nand_to_mtd(nand_chip);
struct resource *regs, *regs_pmerr, *regs_rom;
uint16_t *galois_table;
int cap, sector_size, err_no;
@@ -1586,8 +1587,8 @@ static int atmel_of_init_port(struct atmel_nand_host 
*host,
 static int atmel_hw_nand_init_params(struct platform_device *pdev,
 struct atmel_nand_host *host)
 {
-   struct mtd_info *mtd = >mtd;
struct nand_chip *nand_chip = >nand_chip;
+   struct mtd_info *mtd = nand_to_mtd(nand_chip);
struct resource *regs;
 
regs = platform_get_resource(pdev, IORESOURCE_MEM, 1);
@@ -2112,8 +2113,8 @@ static int atmel_nand_probe(struct platform_device *pdev)
}
host->io_phys = (dma_addr_t)mem->start;
 
-   mtd = >mtd;
nand_chip = >nand_chip;
+   mtd = nand_to_mtd(nand_chip);
host->dev = >dev;
if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
nand_set_flash_node(nand_chip, pdev->dev.of_node);
@@ -2283,7 +2284,7 @@ err_nand_ioremap:
 static int atmel_nand_remove(struct platform_device *pdev)
 {
struct atmel_nand_host *host = platform_get_drvdata(pdev);
-   struct mtd_info *mtd = >mtd;
+   struct mtd_info *mtd = nand_to_mtd(>nand_chip);
 
nand_release(mtd);
 
-- 
2.1.4

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[PATCH v4 00/58] mtd: nand: refactor the NAND subsystem (part 1)

[Boris Brezillon]

Hello,

This huge series aims at clarifying the relationship between the mtd and
nand_chip structures and hiding NAND framework internals to NAND
controller drivers.

The first part of the series (patch 1 to 4) is a set of fixes/simple
reworks easing the migration to mtd_to_nand().

The second part of the series embeds the mtd structure into the nand_chip
one so that NAND controller drivers don't have to bother allocating the
MTD device and linking it with the NAND chip.

The last part of the series hides accesses to the chip->priv field behind
two helper functions.

This allows removal of some of the boilerplate code done in all NAND
controller drivers, but most importantly, it unifies a bit the way NAND
chip structures are instantiated (even though we still have two different
kinds of drivers: those embedding the nand_chip struct into their private
nand chip representation, and those allocating two different structures
and linking them together with the chip->priv field).

As said in the title, this refactoring is only the first step. I plan to
rework the NAND controller / NAND chip separation for pretty much the same
reasons: clarifying the separation between the two concepts, and getting
rid of more boilerplate code in NAND controller drivers.

Stay tuned ;-).

Best Regards,

Boris

Changes since v3:
- fix some bugs introduced when migrating to nand_to_mtd()
- split the huge commit switching all drivers to nand_to_mtd() into several
  commits (one per driver) to ease review and integration
- add a simple fixes/reworks at the beginning of the series (mainly to
  ease migration to nand_to_mtd())
- drop already applied patches.

Changes since v2:
- fix some build warnings/erros

Changes since v1:
- dropped already applied patches
- fixed some typos
- manually fixed some modifications omitted by the coccinelle scripts
- manually reworked modifactions done by coccinelle scripts to improve
  readability and fix coding style issues

*** BLURB HERE ***

Boris Brezillon (58):
  mtd: nand: denali: add missing nand_release() call in denali_remove()
  mtd: nand: fsmc: create and use mtd_to_fsmc()
  mtd: nand: nuc900: create and use mtd_to_nuc900()
  mtd: nand: omap2: create and use mtd_to_omap()
  mtd: nand: ams-delta: use the mtd instance embedded in struct
nand_chip
  mtd: nand: atmel: use the mtd instance embedded in struct nand_chip
  mtd: nand: au1550nd: use the mtd instance embedded in struct nand_chip
  mtd: nand: bcm47xx: use the mtd instance embedded in struct nand_chip
  mtd: nand: bf5xx: use the mtd instance embedded in struct nand_chip
  mtd: nand: brcm: use the mtd instance embedded in struct nand_chip
  mtd: nand: cafe: use the mtd instance embedded in struct nand_chip
  mtd: nand: cmx270: use the mtd instance embedded in struct nand_chip
  mtd: nand: cs553x: use the mtd instance embedded in struct nand_chip
  mtd: nand: davinci: use the mtd instance embedded in struct nand_chip
  mtd: nand: denali: use the mtd instance embedded in struct nand_chip
  mtd: nand: diskonchip: use the mtd instance embedded in struct
nand_chip
  mtd: nand: docg4: use the mtd instance embedded in struct nand_chip
  mtd: nand: fsl_elbc: use the mtd instance embedded in struct nand_chip
  mtd: nand: fsl_ifc: use the mtd instance embedded in struct nand_chip
  mtd: nand: fsl_upm: use the mtd instance embedded in struct nand_chip
  mtd: nand: fsmc: use the mtd instance embedded in struct nand_chip
  mtd: nand: gpio: use the mtd instance embedded in struct nand_chip
  mtd: nand: gpmi: use the mtd instance embedded in struct nand_chip
  mtd: nand: hisi504: use the mtd instance embedded in struct nand_chip
  mtd: nand: jz4740: use the mtd instance embedded in struct nand_chip
  mtd: nand: lpc32xx: use the mtd instance embedded in struct nand_chip
  mtd: nand: mpc5121: use the mtd instance embedded in struct nand_chip
  mtd: nand: mxc: use the mtd instance embedded in struct nand_chip
  mtd: nand: nandsim: use the mtd instance embedded in struct nand_chip
  mtd: nand: ndfc: use the mtd instance embedded in struct nand_chip
  mtd: nand: nuc900: use the mtd instance embedded in struct nand_chip
  mtd: nand: omap2: use the mtd instance embedded in struct nand_chip
  mtd: nand: orion: use the mtd instance embedded in struct nand_chip
  mtd: nand: pasemi: use the mtd instance embedded in struct nand_chip
  mtd: nand: plat: use the mtd instance embedded in struct nand_chip
  mtd: nand: pxa3xx: use the mtd instance embedded in struct nand_chip
  mtd: nand: r852: use the mtd instance embedded in struct nand_chip
  mtd: nand: s3c2410: use the mtd instance embedded in struct nand_chip
  mtd: nand: sh_flctl: use the mtd instance embedded in struct nand_chip
  mtd: nand: sharpsl: use the mtd instance embedded in struct nand_chip
  mtd: nand: socrates: use the mtd instance embedded in struct nand_chip
  mtd: nand: sunxi: use the mtd instance embedded in struct nand_chip
  mtd: nand: tmio: use the mtd instance embedded in struct 

[PATCH v4 02/58] mtd: nand: fsmc: create and use mtd_to_fsmc()

[Boris Brezillon]

Create and use mtd_to_fsmc() to avoid duplication of
container_of(mtd, struct fsmc_nand_data, mtd) calls.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/fsmc_nand.c | 31 ++-
 1 file changed, 14 insertions(+), 17 deletions(-)

diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c
index 1c6c399..499fc59 100644
--- a/drivers/mtd/nand/fsmc_nand.c
+++ b/drivers/mtd/nand/fsmc_nand.c
@@ -326,13 +326,18 @@ struct fsmc_nand_data {
void(*select_chip)(uint32_t bank, uint32_t busw);
 };
 
+static inline struct fsmc_nand_data *mtd_to_fsmc(struct mtd_info *mtd)
+{
+   return container_of(mtd, struct fsmc_nand_data, mtd);
+}
+
 /* Assert CS signal based on chipnr */
 static void fsmc_select_chip(struct mtd_info *mtd, int chipnr)
 {
struct nand_chip *chip = mtd_to_nand(mtd);
struct fsmc_nand_data *host;
 
-   host = container_of(mtd, struct fsmc_nand_data, mtd);
+   host = mtd_to_fsmc(mtd);
 
switch (chipnr) {
case -1:
@@ -359,8 +364,7 @@ static void fsmc_select_chip(struct mtd_info *mtd, int 
chipnr)
 static void fsmc_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
 {
struct nand_chip *this = mtd_to_nand(mtd);
-   struct fsmc_nand_data *host = container_of(mtd,
-   struct fsmc_nand_data, mtd);
+   struct fsmc_nand_data *host = mtd_to_fsmc(mtd);
void __iomem *regs = host->regs_va;
unsigned int bank = host->bank;
 
@@ -445,8 +449,7 @@ static void fsmc_nand_setup(void __iomem *regs, uint32_t 
bank,
  */
 static void fsmc_enable_hwecc(struct mtd_info *mtd, int mode)
 {
-   struct fsmc_nand_data *host = container_of(mtd,
-   struct fsmc_nand_data, mtd);
+   struct fsmc_nand_data *host = mtd_to_fsmc(mtd);
void __iomem *regs = host->regs_va;
uint32_t bank = host->bank;
 
@@ -466,8 +469,7 @@ static void fsmc_enable_hwecc(struct mtd_info *mtd, int 
mode)
 static int fsmc_read_hwecc_ecc4(struct mtd_info *mtd, const uint8_t *data,
uint8_t *ecc)
 {
-   struct fsmc_nand_data *host = container_of(mtd,
-   struct fsmc_nand_data, mtd);
+   struct fsmc_nand_data *host = mtd_to_fsmc(mtd);
void __iomem *regs = host->regs_va;
uint32_t bank = host->bank;
uint32_t ecc_tmp;
@@ -517,8 +519,7 @@ static int fsmc_read_hwecc_ecc4(struct mtd_info *mtd, const 
uint8_t *data,
 static int fsmc_read_hwecc_ecc1(struct mtd_info *mtd, const uint8_t *data,
uint8_t *ecc)
 {
-   struct fsmc_nand_data *host = container_of(mtd,
-   struct fsmc_nand_data, mtd);
+   struct fsmc_nand_data *host = mtd_to_fsmc(mtd);
void __iomem *regs = host->regs_va;
uint32_t bank = host->bank;
uint32_t ecc_tmp;
@@ -674,9 +675,8 @@ static void fsmc_read_buf(struct mtd_info *mtd, uint8_t 
*buf, int len)
  */
 static void fsmc_read_buf_dma(struct mtd_info *mtd, uint8_t *buf, int len)
 {
-   struct fsmc_nand_data *host;
+   struct fsmc_nand_data *host  = mtd_to_fsmc(mtd);
 
-   host = container_of(mtd, struct fsmc_nand_data, mtd);
dma_xfer(host, buf, len, DMA_FROM_DEVICE);
 }
 
@@ -689,9 +689,8 @@ static void fsmc_read_buf_dma(struct mtd_info *mtd, uint8_t 
*buf, int len)
 static void fsmc_write_buf_dma(struct mtd_info *mtd, const uint8_t *buf,
int len)
 {
-   struct fsmc_nand_data *host;
+   struct fsmc_nand_data *host = mtd_to_fsmc(mtd);
 
-   host = container_of(mtd, struct fsmc_nand_data, mtd);
dma_xfer(host, (void *)buf, len, DMA_TO_DEVICE);
 }
 
@@ -712,8 +711,7 @@ static void fsmc_write_buf_dma(struct mtd_info *mtd, const 
uint8_t *buf,
 static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
 uint8_t *buf, int oob_required, int page)
 {
-   struct fsmc_nand_data *host = container_of(mtd,
-   struct fsmc_nand_data, mtd);
+   struct fsmc_nand_data *host = mtd_to_fsmc(mtd);
struct fsmc_eccplace *ecc_place = host->ecc_place;
int i, j, s, stat, eccsize = chip->ecc.size;
int eccbytes = chip->ecc.bytes;
@@ -782,9 +780,8 @@ static int fsmc_read_page_hwecc(struct mtd_info *mtd, 
struct nand_chip *chip,
 static int fsmc_bch8_correct_data(struct mtd_info *mtd, uint8_t *dat,
 uint8_t *read_ecc, uint8_t *calc_ecc)
 {
-   struct fsmc_nand_data *host = container_of(mtd,
-   struct fsmc_nand_data, mtd);
struct nand_chip *chip = mtd_to_nand(mtd);
+   struct fsmc_nand_data *host = mtd_to_fsmc(mtd);
void __iomem *regs = host->regs_va;
unsigned int bank = host->bank;
uint32_t err_idx[8];
-- 
2.1.4

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[PATCH v4 01/58] mtd: nand: denali: add missing nand_release() call in denali_remove()

[Boris Brezillon]

Unregister the NAND device from the NAND subsystem when removing a denali
NAND controller, otherwise the MTD attached to the NAND device is still
exposed by the MTD layer, and accesses to this device will likely crash
the system.

Signed-off-by: Boris Brezillon 
Cc:  #3.8+
Fixes: 2a0a288ec258 ("mtd: denali: split the generic driver and PCI layer")
---
 drivers/mtd/nand/denali.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 67eb2be..8feece3 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -1622,6 +1622,7 @@ EXPORT_SYMBOL(denali_init);
 /* driver exit point */
 void denali_remove(struct denali_nand_info *denali)
 {
+   nand_release(>mtd);
denali_irq_cleanup(denali->irq, denali);
dma_unmap_single(denali->dev, denali->buf.dma_buf,
 denali->mtd.writesize + denali->mtd.oobsize,
-- 
2.1.4

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[PATCH v4 03/58] mtd: nand: nuc900: create and use mtd_to_nuc900()

[Boris Brezillon]

Create and use mtd_to_nuc900() instead of direct container_of() calls.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/nuc900_nand.c | 25 ++---
 1 file changed, 10 insertions(+), 15 deletions(-)

diff --git a/drivers/mtd/nand/nuc900_nand.c b/drivers/mtd/nand/nuc900_nand.c
index 8148cd6..65908c0 100644
--- a/drivers/mtd/nand/nuc900_nand.c
+++ b/drivers/mtd/nand/nuc900_nand.c
@@ -62,6 +62,11 @@ struct nuc900_nand {
spinlock_t lock;
 };
 
+static inline struct nuc900_nand *mtd_to_nuc900(struct mtd_info *mtd)
+{
+   return container_of(mtd, struct nuc900_nand, mtd);
+}
+
 static const struct mtd_partition partitions[] = {
{
 .name = "NAND FS 0",
@@ -78,9 +83,7 @@ static const struct mtd_partition partitions[] = {
 static unsigned char nuc900_nand_read_byte(struct mtd_info *mtd)
 {
unsigned char ret;
-   struct nuc900_nand *nand;
-
-   nand = container_of(mtd, struct nuc900_nand, mtd);
+   struct nuc900_nand *nand = mtd_to_nuc900(mtd);
 
ret = (unsigned char)read_data_reg(nand);
 
@@ -91,9 +94,7 @@ static void nuc900_nand_read_buf(struct mtd_info *mtd,
 unsigned char *buf, int len)
 {
int i;
-   struct nuc900_nand *nand;
-
-   nand = container_of(mtd, struct nuc900_nand, mtd);
+   struct nuc900_nand *nand = mtd_to_nuc900(mtd);
 
for (i = 0; i < len; i++)
buf[i] = (unsigned char)read_data_reg(nand);
@@ -103,9 +104,7 @@ static void nuc900_nand_write_buf(struct mtd_info *mtd,
  const unsigned char *buf, int len)
 {
int i;
-   struct nuc900_nand *nand;
-
-   nand = container_of(mtd, struct nuc900_nand, mtd);
+   struct nuc900_nand *nand = mtd_to_nuc900(mtd);
 
for (i = 0; i < len; i++)
write_data_reg(nand, buf[i]);
@@ -124,11 +123,9 @@ static int nuc900_check_rb(struct nuc900_nand *nand)
 
 static int nuc900_nand_devready(struct mtd_info *mtd)
 {
-   struct nuc900_nand *nand;
+   struct nuc900_nand *nand = mtd_to_nuc900(mtd);
int ready;
 
-   nand = container_of(mtd, struct nuc900_nand, mtd);
-
ready = (nuc900_check_rb(nand)) ? 1 : 0;
return ready;
 }
@@ -137,9 +134,7 @@ static void nuc900_nand_command_lp(struct mtd_info *mtd, 
unsigned int command,
   int column, int page_addr)
 {
register struct nand_chip *chip = mtd_to_nand(mtd);
-   struct nuc900_nand *nand;
-
-   nand = container_of(mtd, struct nuc900_nand, mtd);
+   struct nuc900_nand *nand = mtd_to_nuc900(mtd);
 
if (command == NAND_CMD_READOOB) {
column += mtd->writesize;
-- 
2.1.4

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[PATCH v4 07/58] mtd: nand: au1550nd: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/au1550nd.c | 19 +++
 1 file changed, 11 insertions(+), 8 deletions(-)

diff --git a/drivers/mtd/nand/au1550nd.c b/drivers/mtd/nand/au1550nd.c
index 73fceb8..280e5b6 100644
--- a/drivers/mtd/nand/au1550nd.c
+++ b/drivers/mtd/nand/au1550nd.c
@@ -23,7 +23,6 @@
 
 
 struct au1550nd_ctx {
-   struct mtd_info info;
struct nand_chip chip;
 
int cs;
@@ -197,8 +196,9 @@ static void au_read_buf16(struct mtd_info *mtd, u_char 
*buf, int len)
 
 static void au1550_hwcontrol(struct mtd_info *mtd, int cmd)
 {
-   struct au1550nd_ctx *ctx = container_of(mtd, struct au1550nd_ctx, info);
struct nand_chip *this = mtd_to_nand(mtd);
+   struct au1550nd_ctx *ctx = container_of(this, struct au1550nd_ctx,
+   chip);
 
switch (cmd) {
 
@@ -267,8 +267,9 @@ static void au1550_select_chip(struct mtd_info *mtd, int 
chip)
  */
 static void au1550_command(struct mtd_info *mtd, unsigned command, int column, 
int page_addr)
 {
-   struct au1550nd_ctx *ctx = container_of(mtd, struct au1550nd_ctx, info);
struct nand_chip *this = mtd_to_nand(mtd);
+   struct au1550nd_ctx *ctx = container_of(this, struct au1550nd_ctx,
+   chip);
int ce_override = 0, i;
unsigned long flags = 0;
 
@@ -405,6 +406,7 @@ static int au1550nd_probe(struct platform_device *pdev)
struct au1550nd_platdata *pd;
struct au1550nd_ctx *ctx;
struct nand_chip *this;
+   struct mtd_info *mtd;
struct resource *r;
int ret, cs;
 
@@ -438,8 +440,9 @@ static int au1550nd_probe(struct platform_device *pdev)
}
 
this = >chip;
-   ctx->info.priv = this;
-   ctx->info.dev.parent = >dev;
+   mtd = nand_to_mtd(this);
+   mtd->priv = this;
+   mtd->dev.parent = >dev;
 
/* figure out which CS# r->start belongs to */
cs = find_nand_cs(r->start);
@@ -467,13 +470,13 @@ static int au1550nd_probe(struct platform_device *pdev)
this->write_buf = (pd->devwidth) ? au_write_buf16 : au_write_buf;
this->read_buf = (pd->devwidth) ? au_read_buf16 : au_read_buf;
 
-   ret = nand_scan(>info, 1);
+   ret = nand_scan(mtd, 1);
if (ret) {
dev_err(>dev, "NAND scan failed with %d\n", ret);
goto out3;
}
 
-   mtd_device_register(>info, pd->parts, pd->num_parts);
+   mtd_device_register(mtd, pd->parts, pd->num_parts);
 
platform_set_drvdata(pdev, ctx);
 
@@ -493,7 +496,7 @@ static int au1550nd_remove(struct platform_device *pdev)
struct au1550nd_ctx *ctx = platform_get_drvdata(pdev);
struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 
-   nand_release(>info);
+   nand_release(nand_to_mtd(>chip));
iounmap(ctx->base);
release_mem_region(r->start, 0x1000);
kfree(ctx);
-- 
2.1.4

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[PATCH v4 20/58] mtd: nand: fsl_upm: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/fsl_upm.c | 29 -
 1 file changed, 16 insertions(+), 13 deletions(-)

diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c
index 68ec128..0379adc 100644
--- a/drivers/mtd/nand/fsl_upm.c
+++ b/drivers/mtd/nand/fsl_upm.c
@@ -31,7 +31,6 @@
 
 struct fsl_upm_nand {
struct device *dev;
-   struct mtd_info mtd;
struct nand_chip chip;
int last_ctrl;
struct mtd_partition *parts;
@@ -49,7 +48,8 @@ struct fsl_upm_nand {
 
 static inline struct fsl_upm_nand *to_fsl_upm_nand(struct mtd_info *mtdinfo)
 {
-   return container_of(mtdinfo, struct fsl_upm_nand, mtd);
+   return container_of(mtd_to_nand(mtdinfo), struct fsl_upm_nand,
+   chip);
 }
 
 static int fun_chip_ready(struct mtd_info *mtd)
@@ -66,9 +66,10 @@ static int fun_chip_ready(struct mtd_info *mtd)
 static void fun_wait_rnb(struct fsl_upm_nand *fun)
 {
if (fun->rnb_gpio[fun->mchip_number] >= 0) {
+   struct mtd_info *mtd = nand_to_mtd(>chip);
int cnt = 100;
 
-   while (--cnt && !fun_chip_ready(>mtd))
+   while (--cnt && !fun_chip_ready(mtd))
cpu_relax();
if (!cnt)
dev_err(fun->dev, "tired waiting for RNB\n");
@@ -157,6 +158,7 @@ static int fun_chip_init(struct fsl_upm_nand *fun,
 const struct device_node *upm_np,
 const struct resource *io_res)
 {
+   struct mtd_info *mtd = nand_to_mtd(>chip);
int ret;
struct device_node *flash_np;
 
@@ -174,30 +176,30 @@ static int fun_chip_init(struct fsl_upm_nand *fun,
if (fun->rnb_gpio[0] >= 0)
fun->chip.dev_ready = fun_chip_ready;
 
-   fun->mtd.priv = >chip;
-   fun->mtd.dev.parent = fun->dev;
+   mtd->priv = >chip;
+   mtd->dev.parent = fun->dev;
 
flash_np = of_get_next_child(upm_np, NULL);
if (!flash_np)
return -ENODEV;
 
nand_set_flash_node(>chip, flash_np);
-   fun->mtd.name = kasprintf(GFP_KERNEL, "0x%llx.%s", (u64)io_res->start,
- flash_np->name);
-   if (!fun->mtd.name) {
+   mtd->name = kasprintf(GFP_KERNEL, "0x%llx.%s", (u64)io_res->start,
+ flash_np->name);
+   if (!mtd->name) {
ret = -ENOMEM;
goto err;
}
 
-   ret = nand_scan(>mtd, fun->mchip_count);
+   ret = nand_scan(mtd, fun->mchip_count);
if (ret)
goto err;
 
-   ret = mtd_device_register(>mtd, NULL, 0);
+   ret = mtd_device_register(mtd, NULL, 0);
 err:
of_node_put(flash_np);
if (ret)
-   kfree(fun->mtd.name);
+   kfree(mtd->name);
return ret;
 }
 
@@ -321,10 +323,11 @@ err1:
 static int fun_remove(struct platform_device *ofdev)
 {
struct fsl_upm_nand *fun = dev_get_drvdata(>dev);
+   struct mtd_info *mtd = nand_to_mtd(>chip);
int i;
 
-   nand_release(>mtd);
-   kfree(fun->mtd.name);
+   nand_release(mtd);
+   kfree(mtd->name);
 
for (i = 0; i < fun->mchip_count; i++) {
if (fun->rnb_gpio[i] < 0)
-- 
2.1.4

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[PATCH v4 56/58] ARM: make use of nand_set/get_controller_data() helpers

[Boris Brezillon]

New helpers have been added to avoid directly accessing chip->field. Use
them where appropriate.

Signed-off-by: Boris Brezillon 
---
 arch/arm/mach-ixp4xx/ixdp425-setup.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c 
b/arch/arm/mach-ixp4xx/ixdp425-setup.c
index 333b0f9..508c2d7 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-setup.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c
@@ -77,7 +77,7 @@ static void
 ixdp425_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
 {
struct nand_chip *this = mtd_to_nand(mtd);
-   int offset = (int)this->priv;
+   int offset = (int)nand_get_controller_data(this);
 
if (ctrl & NAND_CTRL_CHANGE) {
if (ctrl & NAND_NCE) {
@@ -88,7 +88,7 @@ ixdp425_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, 
unsigned int ctrl)
 
offset = (ctrl & NAND_CLE) ? IXDP425_NAND_CMD_BYTE : 0;
offset |= (ctrl & NAND_ALE) ? IXDP425_NAND_ADDR_BYTE : 0;
-   this->priv = (void *)offset;
+   nand_set_controller_data(this, (void *)offset);
}
 
if (cmd != NAND_CMD_NONE)
-- 
2.1.4

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[PATCH v4 58/58] staging: mt29f_spinand: make use of nand_set/get_controller_data() helpers

[Boris Brezillon]

New helpers have been added to avoid directly accessing chip->field. Use
them where appropriate.

Signed-off-by: Boris Brezillon 
---
 drivers/staging/mt29f_spinand/mt29f_spinand.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/staging/mt29f_spinand/mt29f_spinand.c 
b/drivers/staging/mt29f_spinand/mt29f_spinand.c
index b7d429d..197d112 100644
--- a/drivers/staging/mt29f_spinand/mt29f_spinand.c
+++ b/drivers/staging/mt29f_spinand/mt29f_spinand.c
@@ -32,7 +32,7 @@
 static inline struct spinand_state *mtd_to_state(struct mtd_info *mtd)
 {
struct nand_chip *chip = mtd_to_nand(mtd);
-   struct spinand_info *info = (struct spinand_info *)chip->priv;
+   struct spinand_info *info = nand_get_controller_data(chip);
struct spinand_state *state = (struct spinand_state *)info->priv;
 
return state;
@@ -633,7 +633,7 @@ static int spinand_read_page_hwecc(struct mtd_info *mtd, 
struct nand_chip *chip,
u8 *p = buf;
int eccsize = chip->ecc.size;
int eccsteps = chip->ecc.steps;
-   struct spinand_info *info = (struct spinand_info *)chip->priv;
+   struct spinand_info *info = nand_get_controller_data(chip);
 
enable_read_hw_ecc = 1;
 
@@ -679,7 +679,7 @@ static u8 spinand_read_byte(struct mtd_info *mtd)
 
 static int spinand_wait(struct mtd_info *mtd, struct nand_chip *chip)
 {
-   struct spinand_info *info = (struct spinand_info *)chip->priv;
+   struct spinand_info *info = nand_get_controller_data(chip);
 
unsigned long timeo = jiffies;
int retval, state = chip->state;
@@ -745,7 +745,7 @@ static void spinand_cmdfunc(struct mtd_info *mtd, unsigned 
int command,
int column, int page)
 {
struct nand_chip *chip = mtd_to_nand(mtd);
-   struct spinand_info *info = (struct spinand_info *)chip->priv;
+   struct spinand_info *info = nand_get_controller_data(chip);
struct spinand_state *state = (struct spinand_state *)info->priv;
 
switch (command) {
@@ -894,7 +894,7 @@ static int spinand_probe(struct spi_device *spi_nand)
 #endif
 
nand_set_flash_node(chip, spi_nand->dev.of_node);
-   chip->priv  = info;
+   nand_set_controller_data(chip, info);
chip->read_buf  = spinand_read_buf;
chip->write_buf = spinand_write_buf;
chip->read_byte = spinand_read_byte;
-- 
2.1.4

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[PATCH v4 51/58] cris: nand: remove useless mtd->priv = chip assignments

[Boris Brezillon]

mtd_to_nand() now uses the container_of() approach to transform an
mtd_info pointer into a nand_chip one. Drop useless mtd->priv
assignments from NAND controller drivers.

Signed-off-by: Boris Brezillon 
---
Patch generated with the following coccinelle script:

---8<
virtual patch

@@
struct mtd_info m;
struct mtd_info *mp;
struct nand_chip *c;
@@
(
-(m).priv = c;
|
-(mp)->priv = c;
|
-(mp)->priv = (void *)c;
)
---8<
---
 arch/cris/arch-v32/drivers/mach-a3/nandflash.c | 3 ---
 arch/cris/arch-v32/drivers/mach-fs/nandflash.c | 3 ---
 2 files changed, 6 deletions(-)

diff --git a/arch/cris/arch-v32/drivers/mach-a3/nandflash.c 
b/arch/cris/arch-v32/drivers/mach-a3/nandflash.c
index ee74e45..5aa3f51 100644
--- a/arch/cris/arch-v32/drivers/mach-a3/nandflash.c
+++ b/arch/cris/arch-v32/drivers/mach-a3/nandflash.c
@@ -149,9 +149,6 @@ struct mtd_info *__init crisv32_nand_flash_probe(void)
this = >chip;
crisv32_mtd = nand_to_mtd(this);
 
-   /* Link the private data with the MTD structure */
-   crisv32_mtd->priv = this;
-
/* Set address of NAND IO lines */
this->IO_ADDR_R = read_cs;
this->IO_ADDR_W = write_cs;
diff --git a/arch/cris/arch-v32/drivers/mach-fs/nandflash.c 
b/arch/cris/arch-v32/drivers/mach-fs/nandflash.c
index 5626297..a7c17b0 100644
--- a/arch/cris/arch-v32/drivers/mach-fs/nandflash.c
+++ b/arch/cris/arch-v32/drivers/mach-fs/nandflash.c
@@ -140,9 +140,6 @@ struct mtd_info *__init crisv32_nand_flash_probe(void)
bif_cfg.gated_csp1 = regk_bif_core_wr;
REG_WR(bif_core, regi_bif_core, rw_grp3_cfg, bif_cfg);
 
-   /* Link the private data with the MTD structure */
-   crisv32_mtd->priv = this;
-
/* Set address of NAND IO lines */
this->IO_ADDR_R = read_cs;
this->IO_ADDR_W = write_cs;
-- 
2.1.4

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[PATCH v4 54/58] mtd: nand: kill the chip->flash_node field

[Boris Brezillon]

Now that the nand_chip struct directly embeds an mtd_info struct we can
get rid of the ->flash_node field and forward set/get_flash_node requests
to the MTD layer.

As a side effect, we no longer need the mtd_set_of_node() call done in
nand_dt_init().

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/nand_base.c | 3 ---
 include/linux/mtd/nand.h | 7 ++-
 2 files changed, 2 insertions(+), 8 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index ae3fd2a..8bb8ebd6 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -3945,9 +3945,6 @@ static int nand_dt_init(struct nand_chip *chip)
if (!dn)
return 0;
 
-   /* MTD can automatically handle DT partitions, etc. */
-   mtd_set_of_node(nand_to_mtd(chip), dn);
-
if (of_get_nand_bus_width(dn) == 16)
chip->options |= NAND_BUSWIDTH_16;
 
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 9cb7ace..2bee2e4 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -545,7 +545,6 @@ struct nand_buffers {
  * flash device
  * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the
  * flash device.
- * @flash_node:[BOARDSPECIFIC] device node describing this 
instance
  * @read_byte: [REPLACEABLE] read one byte from the chip
  * @read_word: [REPLACEABLE] read one word from the chip
  * @write_byte:[REPLACEABLE] write a single byte to the chip 
on the
@@ -645,8 +644,6 @@ struct nand_chip {
void __iomem *IO_ADDR_R;
void __iomem *IO_ADDR_W;
 
-   struct device_node *flash_node;
-
uint8_t (*read_byte)(struct mtd_info *mtd);
u16 (*read_word)(struct mtd_info *mtd);
void (*write_byte)(struct mtd_info *mtd, uint8_t byte);
@@ -724,12 +721,12 @@ struct nand_chip {
 static inline void nand_set_flash_node(struct nand_chip *chip,
   struct device_node *np)
 {
-   chip->flash_node = np;
+   mtd_set_of_node(>mtd, np);
 }
 
 static inline struct device_node *nand_get_flash_node(struct nand_chip *chip)
 {
-   return chip->flash_node;
+   return mtd_get_of_node(>mtd);
 }
 
 static inline struct nand_chip *mtd_to_nand(struct mtd_info *mtd)
-- 
2.1.4

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[PATCH v4 53/58] mtd: nand: simplify nand_dt_init() usage

[Boris Brezillon]

nand_dt_init() function requires 3 arguments where it actually needs one
(dn and mtd can both be retrieved from chip). Drop these parameters.

Testing for dn != NULL inside nand_dt_init() also helps simplifying the
caller code.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/nand_base.c | 21 +++--
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 5aec154..ae3fd2a 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -3937,11 +3937,17 @@ ident_done:
return type;
 }
 
-static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip,
-   struct device_node *dn)
+static int nand_dt_init(struct nand_chip *chip)
 {
+   struct device_node *dn = nand_get_flash_node(chip);
int ecc_mode, ecc_strength, ecc_step;
 
+   if (!dn)
+   return 0;
+
+   /* MTD can automatically handle DT partitions, etc. */
+   mtd_set_of_node(nand_to_mtd(chip), dn);
+
if (of_get_nand_bus_width(dn) == 16)
chip->options |= NAND_BUSWIDTH_16;
 
@@ -3989,14 +3995,9 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips,
struct nand_flash_dev *type;
int ret;
 
-   if (nand_get_flash_node(chip)) {
-   /* MTD can automatically handle DT partitions, etc. */
-   mtd_set_of_node(mtd, nand_get_flash_node(chip));
-
-   ret = nand_dt_init(mtd, chip, nand_get_flash_node(chip));
-   if (ret)
-   return ret;
-   }
+   ret = nand_dt_init(chip);
+   if (ret)
+   return ret;
 
/* Set the default functions */
nand_set_defaults(chip, chip->options & NAND_BUSWIDTH_16);
-- 
2.1.4

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[PATCH v4 24/58] mtd: nand: hisi504: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/hisi504_nand.c | 13 ++---
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/drivers/mtd/nand/hisi504_nand.c b/drivers/mtd/nand/hisi504_nand.c
index 6358d4a..6e6e482 100644
--- a/drivers/mtd/nand/hisi504_nand.c
+++ b/drivers/mtd/nand/hisi504_nand.c
@@ -134,7 +134,6 @@
 
 struct hinfc_host {
struct nand_chipchip;
-   struct mtd_info mtd;
struct device   *dev;
void __iomem*iobase;
void __iomem*mmio;
@@ -189,8 +188,8 @@ static void wait_controller_finished(struct hinfc_host 
*host)
 
 static void hisi_nfc_dma_transfer(struct hinfc_host *host, int todev)
 {
-   struct mtd_info *mtd = >mtd;
-   struct nand_chip *chip = mtd_to_nand(mtd);
+   struct nand_chip *chip = >chip;
+   struct mtd_info *mtd = nand_to_mtd(chip);
unsigned long val;
int ret;
 
@@ -262,7 +261,7 @@ static int hisi_nfc_send_cmd_pageprog(struct hinfc_host 
*host)
 
 static int hisi_nfc_send_cmd_readstart(struct hinfc_host *host)
 {
-   struct mtd_info *mtd = >mtd;
+   struct mtd_info *mtd = nand_to_mtd(>chip);
 
if ((host->addr_value[0] == host->cache_addr_value[0]) &&
(host->addr_value[1] == host->cache_addr_value[1]))
@@ -643,7 +642,7 @@ static int hisi_nfc_ecc_probe(struct hinfc_host *host)
int size, strength, ecc_bits;
struct device *dev = host->dev;
struct nand_chip *chip = >chip;
-   struct mtd_info *mtd = >mtd;
+   struct mtd_info *mtd = nand_to_mtd(chip);
struct device_node *np = host->dev->of_node;
 
size = of_get_nand_ecc_step_size(np);
@@ -712,7 +711,7 @@ static int hisi_nfc_probe(struct platform_device *pdev)
 
platform_set_drvdata(pdev, host);
chip = >chip;
-   mtd  = >mtd;
+   mtd  = nand_to_mtd(chip);
 
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
@@ -822,7 +821,7 @@ err_res:
 static int hisi_nfc_remove(struct platform_device *pdev)
 {
struct hinfc_host *host = platform_get_drvdata(pdev);
-   struct mtd_info *mtd = >mtd;
+   struct mtd_info *mtd = nand_to_mtd(>chip);
 
nand_release(mtd);
 
-- 
2.1.4

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[PATCH v4 19/58] mtd: nand: fsl_ifc: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/fsl_ifc_nand.c | 28 
 1 file changed, 16 insertions(+), 12 deletions(-)

diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index 3136842..3f5654f 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -40,7 +40,6 @@ struct fsl_ifc_ctrl;
 
 /* mtd information per set */
 struct fsl_ifc_mtd {
-   struct mtd_info mtd;
struct nand_chip chip;
struct fsl_ifc_ctrl *ctrl;
 
@@ -877,12 +876,13 @@ static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv)
struct fsl_ifc_ctrl *ctrl = priv->ctrl;
struct fsl_ifc_regs __iomem *ifc = ctrl->regs;
struct nand_chip *chip = >chip;
+   struct mtd_info *mtd = nand_to_mtd(>chip);
struct nand_ecclayout *layout;
u32 csor;
 
/* Fill in fsl_ifc_mtd structure */
-   priv->mtd.priv = chip;
-   priv->mtd.dev.parent = priv->dev;
+   mtd->priv = chip;
+   mtd->dev.parent = priv->dev;
nand_set_flash_node(chip, priv->dev->of_node);
 
/* fill in nand_chip structure */
@@ -994,9 +994,11 @@ static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv)
 
 static int fsl_ifc_chip_remove(struct fsl_ifc_mtd *priv)
 {
-   nand_release(>mtd);
+   struct mtd_info *mtd = nand_to_mtd(>chip);
 
-   kfree(priv->mtd.name);
+   nand_release(mtd);
+
+   kfree(mtd->name);
 
if (priv->vbase)
iounmap(priv->vbase);
@@ -1031,6 +1033,7 @@ static int fsl_ifc_nand_probe(struct platform_device *dev)
int ret;
int bank;
struct device_node *node = dev->dev.of_node;
+   struct mtd_info *mtd;
 
if (!fsl_ifc_ctrl_dev || !fsl_ifc_ctrl_dev->regs)
return -ENODEV;
@@ -1103,8 +1106,10 @@ static int fsl_ifc_nand_probe(struct platform_device 
*dev)
  IFC_NAND_EVTER_INTR_FTOERIR_EN |
  IFC_NAND_EVTER_INTR_WPERIR_EN,
  >ifc_nand.nand_evter_intr_en);
-   priv->mtd.name = kasprintf(GFP_KERNEL, "%llx.flash", (u64)res.start);
-   if (!priv->mtd.name) {
+
+   mtd = nand_to_mtd(>chip);
+   mtd->name = kasprintf(GFP_KERNEL, "%llx.flash", (u64)res.start);
+   if (!mtd->name) {
ret = -ENOMEM;
goto err;
}
@@ -1113,22 +1118,21 @@ static int fsl_ifc_nand_probe(struct platform_device 
*dev)
if (ret)
goto err;
 
-   ret = nand_scan_ident(>mtd, 1, NULL);
+   ret = nand_scan_ident(mtd, 1, NULL);
if (ret)
goto err;
 
-   ret = fsl_ifc_chip_init_tail(>mtd);
+   ret = fsl_ifc_chip_init_tail(mtd);
if (ret)
goto err;
 
-   ret = nand_scan_tail(>mtd);
+   ret = nand_scan_tail(mtd);
if (ret)
goto err;
 
/* First look for RedBoot table or partitions on the command
 * line, these take precedence over device tree information */
-   mtd_device_parse_register(>mtd, part_probe_types, NULL,
-   NULL, 0);
+   mtd_device_parse_register(mtd, part_probe_types, NULL, NULL, 0);
 
dev_info(priv->dev, "IFC NAND device at 0x%llx, bank %d\n",
 (unsigned long long)res.start, priv->bank);
-- 
2.1.4

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[PATCH v4 55/58] mtd: nand: add helpers to access ->priv

[Boris Brezillon]

Add two helpers to access the field reserved for private controller data.
This makes it clearer what this field is reserved for and ease future
refactoring.

Signed-off-by: Boris Brezillon 
---
 include/linux/mtd/nand.h | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 2bee2e4..4aed4b2 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -739,6 +739,16 @@ static inline struct mtd_info *nand_to_mtd(struct 
nand_chip *chip)
return >mtd;
 }
 
+static inline void *nand_get_controller_data(struct nand_chip *chip)
+{
+   return chip->priv;
+}
+
+static inline void nand_set_controller_data(struct nand_chip *chip, void *priv)
+{
+   chip->priv = priv;
+}
+
 /*
  * NAND Flash Manufacturer ID Codes
  */
-- 
2.1.4

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[PATCH v4 40/58] mtd: nand: sharpsl: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/sharpsl.c | 22 +-
 1 file changed, 13 insertions(+), 9 deletions(-)

diff --git a/drivers/mtd/nand/sharpsl.c b/drivers/mtd/nand/sharpsl.c
index 84129e5..4b649fb 100644
--- a/drivers/mtd/nand/sharpsl.c
+++ b/drivers/mtd/nand/sharpsl.c
@@ -29,13 +29,15 @@
 #include 
 
 struct sharpsl_nand {
-   struct mtd_info mtd;
struct nand_chipchip;
 
void __iomem*io;
 };
 
-#define mtd_to_sharpsl(_mtd)   container_of(_mtd, struct sharpsl_nand, mtd)
+static inline struct sharpsl_nand *mtd_to_sharpsl(struct mtd_info *mtd)
+{
+   return container_of(mtd_to_nand(mtd), struct sharpsl_nand, chip);
+}
 
 /* register offset */
 #define ECCLPLB0x00/* line parity 7 - 0 bit */
@@ -109,6 +111,7 @@ static int sharpsl_nand_calculate_ecc(struct mtd_info *mtd, 
const u_char * dat,
 static int sharpsl_nand_probe(struct platform_device *pdev)
 {
struct nand_chip *this;
+   struct mtd_info *mtd;
struct resource *r;
int err = 0;
struct sharpsl_nand *sharpsl;
@@ -143,8 +146,9 @@ static int sharpsl_nand_probe(struct platform_device *pdev)
this = (struct nand_chip *)(>chip);
 
/* Link the private data with the MTD structure */
-   sharpsl->mtd.priv = this;
-   sharpsl->mtd.dev.parent = >dev;
+   mtd = nand_to_mtd(this);
+   mtd->priv = this;
+   mtd->dev.parent = >dev;
 
platform_set_drvdata(pdev, sharpsl);
 
@@ -173,14 +177,14 @@ static int sharpsl_nand_probe(struct platform_device 
*pdev)
this->ecc.correct = nand_correct_data;
 
/* Scan to find existence of the device */
-   err = nand_scan(>mtd, 1);
+   err = nand_scan(mtd, 1);
if (err)
goto err_scan;
 
/* Register the partitions */
-   sharpsl->mtd.name = "sharpsl-nand";
+   mtd->name = "sharpsl-nand";
 
-   err = mtd_device_parse_register(>mtd, NULL, NULL,
+   err = mtd_device_parse_register(mtd, NULL, NULL,
data->partitions, data->nr_partitions);
if (err)
goto err_add;
@@ -189,7 +193,7 @@ static int sharpsl_nand_probe(struct platform_device *pdev)
return 0;
 
 err_add:
-   nand_release(>mtd);
+   nand_release(mtd);
 
 err_scan:
iounmap(sharpsl->io);
@@ -207,7 +211,7 @@ static int sharpsl_nand_remove(struct platform_device *pdev)
struct sharpsl_nand *sharpsl = platform_get_drvdata(pdev);
 
/* Release resources, unregister device */
-   nand_release(>mtd);
+   nand_release(nand_to_mtd(>chip));
 
iounmap(sharpsl->io);
 
-- 
2.1.4

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[PATCH v4 38/58] mtd: nand: s3c2410: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/s3c2410.c | 23 ++-
 1 file changed, 14 insertions(+), 9 deletions(-)

diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index e658b29..c074a49 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -104,7 +104,6 @@ struct s3c2410_nand_info;
  * @scan_res: The result from calling nand_scan_ident().
 */
 struct s3c2410_nand_mtd {
-   struct mtd_info mtd;
struct nand_chipchip;
struct s3c2410_nand_set *set;
struct s3c2410_nand_info*info;
@@ -168,7 +167,8 @@ struct s3c2410_nand_info {
 
 static struct s3c2410_nand_mtd *s3c2410_nand_mtd_toours(struct mtd_info *mtd)
 {
-   return container_of(mtd, struct s3c2410_nand_mtd, mtd);
+   return container_of(mtd_to_nand(mtd), struct s3c2410_nand_mtd,
+   chip);
 }
 
 static struct s3c2410_nand_info *s3c2410_nand_mtd_toinfo(struct mtd_info *mtd)
@@ -745,7 +745,7 @@ static int s3c24xx_nand_remove(struct platform_device *pdev)
 
for (mtdno = 0; mtdno < info->mtd_count; mtdno++, ptr++) {
pr_debug("releasing mtd %d (%p)\n", mtdno, ptr);
-   nand_release(>mtd);
+   nand_release(nand_to_mtd(>chip));
}
}
 
@@ -762,9 +762,11 @@ static int s3c2410_nand_add_partition(struct 
s3c2410_nand_info *info,
  struct s3c2410_nand_set *set)
 {
if (set) {
-   mtd->mtd.name = set->name;
+   struct mtd_info *mtdinfo = nand_to_mtd(>chip);
 
-   return mtd_device_parse_register(>mtd, NULL, NULL,
+   mtdinfo->name = set->name;
+
+   return mtd_device_parse_register(mtdinfo, NULL, NULL,
 set->partitions, set->nr_partitions);
}
 
@@ -786,6 +788,7 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info 
*info,
   struct s3c2410_nand_set *set)
 {
struct nand_chip *chip = >chip;
+   struct mtd_info *mtd = nand_to_mtd(chip);
void __iomem *regs = info->regs;
 
chip->write_buf= s3c2410_nand_write_buf;
@@ -831,7 +834,7 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info 
*info,
chip->IO_ADDR_R = chip->IO_ADDR_W;
 
nmtd->info = info;
-   nmtd->mtd.priv = chip;
+   mtd->priv  = chip;
nmtd->set  = set;
 
 #ifdef CONFIG_MTD_NAND_S3C2410_HWECC
@@ -1012,19 +1015,21 @@ static int s3c24xx_nand_probe(struct platform_device 
*pdev)
nmtd = info->mtds;
 
for (setno = 0; setno < nr_sets; setno++, nmtd++) {
+   struct mtd_info *mtd = nand_to_mtd(>chip);
+
pr_debug("initialising set %d (%p, info %p)\n",
 setno, nmtd, info);
 
-   nmtd->mtd.dev.parent = >dev;
+   mtd->dev.parent = >dev;
s3c2410_nand_init_chip(info, nmtd, sets);
 
-   nmtd->scan_res = nand_scan_ident(>mtd,
+   nmtd->scan_res = nand_scan_ident(mtd,
 (sets) ? sets->nr_chips : 1,
 NULL);
 
if (nmtd->scan_res == 0) {
s3c2410_nand_update_chip(info, nmtd);
-   nand_scan_tail(>mtd);
+   nand_scan_tail(mtd);
s3c2410_nand_add_partition(info, nmtd, sets);
}
 
-- 
2.1.4

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[PATCH v4 32/58] mtd: nand: omap2: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/omap2.c | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 1fb40db..f9d0b58 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -152,7 +152,6 @@ static struct nand_hw_control omap_gpmc_controller = {
 
 struct omap_nand_info {
struct omap_nand_platform_data  *pdata;
-   struct mtd_info mtd;
struct nand_chipnand;
struct platform_device  *pdev;
 
@@ -179,8 +178,9 @@ struct omap_nand_info {
 
 static inline struct omap_nand_info *mtd_to_omap(struct mtd_info *mtd)
 {
-   return container_of(mtd, struct omap_nand_info, mtd);
+   return container_of(mtd_to_nand(mtd), struct omap_nand_info, nand);
 }
+
 /**
  * omap_prefetch_enable - configures and starts prefetch transfer
  * @cs: cs (chip select) number
@@ -1670,10 +1670,10 @@ static int omap_nand_probe(struct platform_device *pdev)
info->reg   = pdata->reg;
info->of_node   = pdata->of_node;
info->ecc_opt   = pdata->ecc_opt;
-   mtd = >mtd;
+   nand_chip   = >nand;
+   mtd = nand_to_mtd(nand_chip);
mtd->priv   = >nand;
mtd->dev.parent = >dev;
-   nand_chip   = >nand;
nand_chip->ecc.priv = NULL;
nand_set_flash_node(nand_chip, pdata->of_node);
 
@@ -1897,7 +1897,7 @@ static int omap_nand_probe(struct platform_device *pdev)
ecclayout->eccpos[ecclayout->eccbytes - 1] + 1;
 
err = elm_config(info->elm_dev, BCH4_ECC,
-info->mtd.writesize / nand_chip->ecc.size,
+mtd->writesize / nand_chip->ecc.size,
 nand_chip->ecc.size, nand_chip->ecc.bytes);
if (err < 0)
goto return_error;
@@ -1951,7 +1951,7 @@ static int omap_nand_probe(struct platform_device *pdev)
nand_chip->ecc.write_page   = omap_write_page_bch;
 
err = elm_config(info->elm_dev, BCH8_ECC,
-info->mtd.writesize / nand_chip->ecc.size,
+mtd->writesize / nand_chip->ecc.size,
 nand_chip->ecc.size, nand_chip->ecc.bytes);
if (err < 0)
goto return_error;
@@ -1981,7 +1981,7 @@ static int omap_nand_probe(struct platform_device *pdev)
nand_chip->ecc.write_page   = omap_write_page_bch;
 
err = elm_config(info->elm_dev, BCH16_ECC,
-info->mtd.writesize / nand_chip->ecc.size,
+mtd->writesize / nand_chip->ecc.size,
 nand_chip->ecc.size, nand_chip->ecc.bytes);
if (err < 0)
goto return_error;
-- 
2.1.4

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[PATCH v4 31/58] mtd: nand: nuc900: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/nuc900_nand.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/mtd/nand/nuc900_nand.c b/drivers/mtd/nand/nuc900_nand.c
index 65908c0..4dad170 100644
--- a/drivers/mtd/nand/nuc900_nand.c
+++ b/drivers/mtd/nand/nuc900_nand.c
@@ -55,7 +55,6 @@
__raw_writel((val), (dev)->reg + REG_SMADDR)
 
 struct nuc900_nand {
-   struct mtd_info mtd;
struct nand_chip chip;
void __iomem *reg;
struct clk *clk;
@@ -64,7 +63,7 @@ struct nuc900_nand {
 
 static inline struct nuc900_nand *mtd_to_nuc900(struct mtd_info *mtd)
 {
-   return container_of(mtd, struct nuc900_nand, mtd);
+   return container_of(mtd_to_nand(mtd), struct nuc900_nand, chip);
 }
 
 static const struct mtd_partition partitions[] = {
@@ -236,6 +235,7 @@ static int nuc900_nand_probe(struct platform_device *pdev)
 {
struct nuc900_nand *nuc900_nand;
struct nand_chip *chip;
+   struct mtd_info *mtd;
struct resource *res;
 
nuc900_nand = devm_kzalloc(>dev, sizeof(struct nuc900_nand),
@@ -243,9 +243,10 @@ static int nuc900_nand_probe(struct platform_device *pdev)
if (!nuc900_nand)
return -ENOMEM;
chip = &(nuc900_nand->chip);
+   mtd = nand_to_mtd(chip);
 
-   nuc900_nand->mtd.priv   = chip;
-   nuc900_nand->mtd.dev.parent = >dev;
+   mtd->priv   = chip;
+   mtd->dev.parent = >dev;
spin_lock_init(_nand->lock);
 
nuc900_nand->clk = devm_clk_get(>dev, NULL);
@@ -269,11 +270,10 @@ static int nuc900_nand_probe(struct platform_device *pdev)
 
nuc900_nand_enable(nuc900_nand);
 
-   if (nand_scan(&(nuc900_nand->mtd), 1))
+   if (nand_scan(mtd, 1))
return -ENXIO;
 
-   mtd_device_register(&(nuc900_nand->mtd), partitions,
-   ARRAY_SIZE(partitions));
+   mtd_device_register(mtd, partitions, ARRAY_SIZE(partitions));
 
platform_set_drvdata(pdev, nuc900_nand);
 
@@ -284,7 +284,7 @@ static int nuc900_nand_remove(struct platform_device *pdev)
 {
struct nuc900_nand *nuc900_nand = platform_get_drvdata(pdev);
 
-   nand_release(_nand->mtd);
+   nand_release(nand_to_mtd(_nand->chip));
clk_disable(nuc900_nand->clk);
 
return 0;
-- 
2.1.4

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[PATCH v4 21/58] mtd: nand: fsmc: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/fsmc_nand.c | 22 ++
 1 file changed, 10 insertions(+), 12 deletions(-)

diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c
index 499fc59..4c68e7a 100644
--- a/drivers/mtd/nand/fsmc_nand.c
+++ b/drivers/mtd/nand/fsmc_nand.c
@@ -299,7 +299,6 @@ static struct fsmc_eccplace fsmc_ecc4_sp_place = {
  */
 struct fsmc_nand_data {
u32 pid;
-   struct mtd_info mtd;
struct nand_chipnand;
struct mtd_partition*partitions;
unsigned intnr_partitions;
@@ -328,7 +327,7 @@ struct fsmc_nand_data {
 
 static inline struct fsmc_nand_data *mtd_to_fsmc(struct mtd_info *mtd)
 {
-   return container_of(mtd, struct fsmc_nand_data, mtd);
+   return container_of(mtd_to_nand(mtd), struct fsmc_nand_data, nand);
 }
 
 /* Assert CS signal based on chipnr */
@@ -1008,13 +1007,13 @@ static int __init fsmc_nand_probe(struct 
platform_device *pdev)
init_completion(>dma_access_complete);
 
/* Link all private pointers */
-   mtd = >mtd;
+   mtd = nand_to_mtd(>nand);
nand = >nand;
mtd->priv = nand;
nand->priv = host;
nand_set_flash_node(nand, np);
 
-   host->mtd.dev.parent = >dev;
+   mtd->dev.parent = >dev;
nand->IO_ADDR_R = host->data_va;
nand->IO_ADDR_W = host->data_va;
nand->cmd_ctrl = fsmc_cmd_ctrl;
@@ -1077,14 +1076,14 @@ static int __init fsmc_nand_probe(struct 
platform_device *pdev)
/*
 * Scan to find existence of the device
 */
-   if (nand_scan_ident(>mtd, 1, NULL)) {
+   if (nand_scan_ident(mtd, 1, NULL)) {
ret = -ENXIO;
dev_err(>dev, "No NAND Device found!\n");
goto err_scan_ident;
}
 
if (AMBA_REV_BITS(host->pid) >= 8) {
-   switch (host->mtd.oobsize) {
+   switch (mtd->oobsize) {
case 16:
nand->ecc.layout = _ecc4_16_layout;
host->ecc_place = _ecc4_sp_place;
@@ -1135,7 +1134,7 @@ static int __init fsmc_nand_probe(struct platform_device 
*pdev)
 * generated later in nand_bch_init() later.
 */
if (nand->ecc.mode != NAND_ECC_SOFT_BCH) {
-   switch (host->mtd.oobsize) {
+   switch (mtd->oobsize) {
case 16:
nand->ecc.layout = _ecc1_16_layout;
break;
@@ -1156,7 +1155,7 @@ static int __init fsmc_nand_probe(struct platform_device 
*pdev)
}
 
/* Second stage of scan to fill MTD data-structures */
-   if (nand_scan_tail(>mtd)) {
+   if (nand_scan_tail(mtd)) {
ret = -ENXIO;
goto err_probe;
}
@@ -1171,9 +1170,8 @@ static int __init fsmc_nand_probe(struct platform_device 
*pdev)
/*
 * Check for partition info passed
 */
-   host->mtd.name = "nand";
-   ret = mtd_device_register(>mtd, host->partitions,
- host->nr_partitions);
+   mtd->name = "nand";
+   ret = mtd_device_register(mtd, host->partitions, host->nr_partitions);
if (ret)
goto err_probe;
 
@@ -1203,7 +1201,7 @@ static int fsmc_nand_remove(struct platform_device *pdev)
struct fsmc_nand_data *host = platform_get_drvdata(pdev);
 
if (host) {
-   nand_release(>mtd);
+   nand_release(nand_to_mtd(>nand));
 
if (host->mode == USE_DMA_ACCESS) {
dma_release_channel(host->write_dma_chan);
-- 
2.1.4

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[PATCH v4 23/58] mtd: nand: gpmi: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/gpmi-nand/gpmi-lib.c  |  2 +-
 drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 23 +++
 drivers/mtd/nand/gpmi-nand/gpmi-nand.h |  1 -
 3 files changed, 12 insertions(+), 14 deletions(-)

diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c 
b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
index 43fa16b..0f68a99 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
@@ -919,7 +919,7 @@ static int enable_edo_mode(struct gpmi_nand_data *this, int 
mode)
 {
struct resources  *r = >resources;
struct nand_chip *nand = >nand;
-   struct mtd_info  *mtd = >mtd;
+   struct mtd_info  *mtd = nand_to_mtd(nand);
uint8_t *feature;
unsigned long rate;
int ret;
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c 
b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
index 802adb0..38b07c7 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
@@ -107,7 +107,7 @@ static irqreturn_t bch_irq(int irq, void *cookie)
 static inline int get_ecc_strength(struct gpmi_nand_data *this)
 {
struct bch_geometry *geo = >bch_geometry;
-   struct mtd_info *mtd = >mtd;
+   struct mtd_info *mtd = nand_to_mtd(>nand);
int ecc_strength;
 
ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8)
@@ -139,8 +139,8 @@ static inline bool gpmi_check_ecc(struct gpmi_nand_data 
*this)
 static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this)
 {
struct bch_geometry *geo = >bch_geometry;
-   struct mtd_info *mtd = >mtd;
-   struct nand_chip *chip = mtd_to_nand(mtd);
+   struct nand_chip *chip = >nand;
+   struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_oobfree *of = gpmi_hw_ecclayout.oobfree;
unsigned int block_mark_bit_offset;
 
@@ -257,7 +257,7 @@ static bool set_geometry_by_ecc_info(struct gpmi_nand_data 
*this)
 static int legacy_set_geometry(struct gpmi_nand_data *this)
 {
struct bch_geometry *geo = >bch_geometry;
-   struct mtd_info *mtd = >mtd;
+   struct mtd_info *mtd = nand_to_mtd(>nand);
unsigned int metadata_size;
unsigned int status_size;
unsigned int block_mark_bit_offset;
@@ -804,7 +804,7 @@ static int gpmi_alloc_dma_buffer(struct gpmi_nand_data 
*this)
 {
struct bch_geometry *geo = >bch_geometry;
struct device *dev = this->dev;
-   struct mtd_info *mtd = >mtd;
+   struct mtd_info *mtd = nand_to_mtd(>nand);
 
/* [1] Allocate a command buffer. PAGE_SIZE is enough. */
this->cmd_buffer = kzalloc(PAGE_SIZE, GFP_DMA | GFP_KERNEL);
@@ -1600,8 +1600,8 @@ static int mx23_check_transcription_stamp(struct 
gpmi_nand_data *this)
 {
struct boot_rom_geometry *rom_geo = >rom_geometry;
struct device *dev = this->dev;
-   struct mtd_info *mtd = >mtd;
struct nand_chip *chip = >nand;
+   struct mtd_info *mtd = nand_to_mtd(chip);
unsigned int search_area_size_in_strides;
unsigned int stride;
unsigned int page;
@@ -1655,8 +1655,8 @@ static int mx23_write_transcription_stamp(struct 
gpmi_nand_data *this)
 {
struct device *dev = this->dev;
struct boot_rom_geometry *rom_geo = >rom_geometry;
-   struct mtd_info *mtd = >mtd;
struct nand_chip *chip = >nand;
+   struct mtd_info *mtd = nand_to_mtd(chip);
unsigned int block_size_in_pages;
unsigned int search_area_size_in_strides;
unsigned int search_area_size_in_pages;
@@ -1735,7 +1735,7 @@ static int mx23_boot_init(struct gpmi_nand_data  *this)
 {
struct device *dev = this->dev;
struct nand_chip *chip = >nand;
-   struct mtd_info *mtd = >mtd;
+   struct mtd_info *mtd = nand_to_mtd(chip);
unsigned int block_count;
unsigned int block;
int chipnr;
@@ -1831,14 +1831,13 @@ static int gpmi_set_geometry(struct gpmi_nand_data 
*this)
 
 static void gpmi_nand_exit(struct gpmi_nand_data *this)
 {
-   nand_release(>mtd);
+  

[PATCH v4 15/58] mtd: nand: denali: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---

Conflicts:
drivers/mtd/nand/denali.c
---
 drivers/mtd/nand/denali.c | 70 ++-
 drivers/mtd/nand/denali.h |  1 -
 2 files changed, 39 insertions(+), 32 deletions(-)

diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 8feece3..2b66cee 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -75,7 +75,10 @@ MODULE_PARM_DESC(onfi_timing_mode,
  * this macro allows us to convert from an MTD structure to our own
  * device context (denali) structure.
  */
-#define mtd_to_denali(m) container_of(m, struct denali_nand_info, mtd)
+static inline struct denali_nand_info *mtd_to_denali(struct mtd_info *mtd)
+{
+   return container_of(mtd_to_nand(mtd), struct denali_nand_info, nand);
+}
 
 /*
  * These constants are defined by the driver to enable common driver
@@ -986,6 +989,8 @@ static bool handle_ecc(struct denali_nand_info *denali, 
uint8_t *buf,
 * than one NAND connected.
 */
if (err_byte < ECC_SECTOR_SIZE) {
+   struct mtd_info *mtd =
+   nand_to_mtd(>nand);
int offset;
 
offset = (err_sector *
@@ -995,7 +1000,7 @@ static bool handle_ecc(struct denali_nand_info *denali, 
uint8_t *buf,
err_device;
/* correct the ECC error */
buf[offset] ^= err_correction_value;
-   denali->mtd.ecc_stats.corrected++;
+   mtd->ecc_stats.corrected++;
bitflips++;
}
} else {
@@ -1062,7 +1067,7 @@ static int write_page(struct mtd_info *mtd, struct 
nand_chip *chip,
 {
struct denali_nand_info *denali = mtd_to_denali(mtd);
dma_addr_t addr = denali->buf.dma_buf;
-   size_t size = denali->mtd.writesize + denali->mtd.oobsize;
+   size_t size = mtd->writesize + mtd->oobsize;
uint32_t irq_status;
uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP |
INTR_STATUS__PROGRAM_FAIL;
@@ -1160,7 +1165,7 @@ static int denali_read_page(struct mtd_info *mtd, struct 
nand_chip *chip,
struct denali_nand_info *denali = mtd_to_denali(mtd);
 
dma_addr_t addr = denali->buf.dma_buf;
-   size_t size = denali->mtd.writesize + denali->mtd.oobsize;
+   size_t size = mtd->writesize + mtd->oobsize;
 
uint32_t irq_status;
uint32_t irq_mask = INTR_STATUS__ECC_TRANSACTION_DONE |
@@ -1193,14 +1198,14 @@ static int denali_read_page(struct mtd_info *mtd, 
struct nand_chip *chip,
denali_enable_dma(denali, false);
 
if (check_erased_page) {
-   read_oob_data(>mtd, chip->oob_poi, denali->page);
+   read_oob_data(mtd, chip->oob_poi, denali->page);
 
/* check ECC failures that may have occurred on erased pages */
if (check_erased_page) {
-   if (!is_erased(buf, denali->mtd.writesize))
-   denali->mtd.ecc_stats.failed++;
-   if (!is_erased(buf, denali->mtd.oobsize))
-   denali->mtd.ecc_stats.failed++;
+   if (!is_erased(buf, mtd->writesize))
+   mtd->ecc_stats.failed++;
+   if (!is_erased(buf, mtd->oobsize))
+   mtd->ecc_stats.failed++;
}
}
return max_bitflips;
@@ -1211,7 +1216,7 @@ static int denali_read_page_raw(struct mtd_info *mtd, 
struct nand_chip *chip,
 {
struct denali_nand_info *denali = mtd_to_denali(mtd);
dma_addr_t addr = denali->buf.dma_buf;
-   size_t 

[PATCH v4 22/58] mtd: nand: gpio: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
Changes generated with the following coccinelle script

--->8---
virtual patch

@fix1@
identifier __chipfield, __mtdfield;
type __type;
@@
(
__type {
...
struct nand_chip __chipfield;
...
-   struct mtd_info __mtdfield;
...
};
|
__type {
...
-   struct mtd_info __mtdfield;
...
struct nand_chip __chipfield;
...
};
)

@fix2 depends on fix1@
identifier fix1.__chipfield, fix1.__mtdfield;
identifier __subfield;
type fix1.__type;
__type *__priv;
@@
(
-   __priv->__mtdfield.__subfield
+   nand_to_mtd(&__priv->__chipfield)->__subfield
|
-   &(__priv->__mtdfield)
+   nand_to_mtd(&__priv->__chipfield)
)
--->8---
---
 drivers/mtd/nand/gpio.c | 21 -
 1 file changed, 12 insertions(+), 9 deletions(-)

diff --git a/drivers/mtd/nand/gpio.c b/drivers/mtd/nand/gpio.c
index d57a07a..99dd74c 100644
--- a/drivers/mtd/nand/gpio.c
+++ b/drivers/mtd/nand/gpio.c
@@ -35,12 +35,14 @@
 
 struct gpiomtd {
void __iomem*io_sync;
-   struct mtd_info mtd_info;
struct nand_chipnand_chip;
struct gpio_nand_platdata plat;
 };
 
-#define gpio_nand_getpriv(x) container_of(x, struct gpiomtd, mtd_info)
+static inline struct gpiomtd *gpio_nand_getpriv(struct mtd_info *mtd)
+{
+   return container_of(mtd_to_nand(mtd), struct gpiomtd, nand_chip);
+}
 
 
 #ifdef CONFIG_ARM
@@ -195,7 +197,7 @@ static int gpio_nand_remove(struct platform_device *pdev)
 {
struct gpiomtd *gpiomtd = platform_get_drvdata(pdev);
 
-   nand_release(>mtd_info);
+   nand_release(nand_to_mtd(>nand_chip));
 
if (gpio_is_valid(gpiomtd->plat.gpio_nwp))
gpio_set_value(gpiomtd->plat.gpio_nwp, 0);
@@ -208,6 +210,7 @@ static int gpio_nand_probe(struct platform_device *pdev)
 {
struct gpiomtd *gpiomtd;
struct nand_chip *chip;
+   struct mtd_info *mtd;
struct resource *res;
int ret = 0;
 
@@ -274,24 +277,24 @@ static int gpio_nand_probe(struct platform_device *pdev)
chip->chip_delay= gpiomtd->plat.chip_delay;
chip->cmd_ctrl  = gpio_nand_cmd_ctrl;
 
-   gpiomtd->mtd_info.priv  = chip;
-   gpiomtd->mtd_info.dev.parent = >dev;
+   mtd = nand_to_mtd(chip);
+   mtd->priv   = chip;
+   mtd->dev.parent = >dev;
 
platform_set_drvdata(pdev, gpiomtd);
 
if (gpio_is_valid(gpiomtd->plat.gpio_nwp))
gpio_direction_output(gpiomtd->plat.gpio_nwp, 1);
 
-   if (nand_scan(>mtd_info, 1)) {
+   if (nand_scan(mtd, 1)) {
ret = -ENXIO;
goto err_wp;
}
 
if (gpiomtd->plat.adjust_parts)
-   gpiomtd->plat.adjust_parts(>plat,
-  gpiomtd->mtd_info.size);
+   gpiomtd->plat.adjust_parts(>plat, mtd->size);
 
-   ret = mtd_device_register(>mtd_info, gpiomtd->plat.parts,
+   ret = mtd_device_register(mtd, gpiomtd->plat.parts,
  gpiomtd->plat.num_parts);
if (!ret)
return 0;
-- 
2.1.4

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[PATCH v4 17/58] mtd: nand: docg4: use the mtd instance embedded in struct nand_chip

[Boris Brezillon]

struct nand_chip now embeds an mtd device. Make use of this mtd instance.

Signed-off-by: Boris Brezillon 
---
 drivers/mtd/nand/docg4.c | 23 ---
 1 file changed, 12 insertions(+), 11 deletions(-)

diff --git a/drivers/mtd/nand/docg4.c b/drivers/mtd/nand/docg4.c
index da93d7f..cb6efad 100644
--- a/drivers/mtd/nand/docg4.c
+++ b/drivers/mtd/nand/docg4.c
@@ -1305,14 +1305,14 @@ static int __init probe_docg4(struct platform_device 
*pdev)
return -EIO;
}
 
-   len = sizeof(struct mtd_info) + sizeof(struct nand_chip) +
-   sizeof(struct docg4_priv);
-   mtd = kzalloc(len, GFP_KERNEL);
-   if (mtd == NULL) {
+   len = sizeof(struct nand_chip) + sizeof(struct docg4_priv);
+   nand = kzalloc(len, GFP_KERNEL);
+   if (nand == NULL) {
retval = -ENOMEM;
-   goto fail;
+   goto fail_unmap;
}
-   nand = (struct nand_chip *) (mtd + 1);
+
+   mtd = nand_to_mtd(nand);
doc = (struct docg4_priv *) (nand + 1);
mtd->priv = nand;
nand->priv = doc;
@@ -1354,16 +1354,17 @@ static int __init probe_docg4(struct platform_device 
*pdev)
return 0;
 
  fail:
-   iounmap(virtadr);
-   if (mtd) {
+   if (nand) {
/* re-declarations avoid compiler warning */
-   struct nand_chip *nand = mtd_to_nand(mtd);
struct docg4_priv *doc = nand->priv;
nand_release(mtd); /* deletes partitions and mtd devices */
free_bch(doc->bch);
-   kfree(mtd);
+   kfree(nand);
}
 
+fail_unmap:
+   iounmap(virtadr);
+
return retval;
 }
 
@@ -1372,7 +1373,7 @@ static int __exit cleanup_docg4(struct platform_device 
*pdev)
struct docg4_priv *doc = platform_get_drvdata(pdev);
nand_release(doc->mtd);
free_bch(doc->bch);
-   kfree(doc->mtd);
+   kfree(mtd_to_nand(doc->mtd));
iounmap(doc->virtadr);
return 0;
 }
-- 
2.1.4

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Re: [GIT PULL] ARM: Exynos fixes for v4.4

[Arnd Bergmann]

On Wednesday 02 December 2015 01:04:05 Kukjin Kim wrote:
> Krzysztof Kozlowski wrote:
> > 
> Hi Krzysztof,
> 
> Looks good to me, but I have no other fixes in my tree so this would be sent 
> to
> out arm-soc directly 
> 
> Hi Arnd, Olof, Kevin,
> Please pull this for v4.4.
> 

Pulled into fixes now, thanks!

Arnd
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Re: [PATCH v4 01/58] mtd: nand: denali: add missing nand_release() call in denali_remove()

[Brian Norris]

On Thu, Dec 10, 2015 at 08:59:45AM +0100, Boris Brezillon wrote:
> Unregister the NAND device from the NAND subsystem when removing a denali
> NAND controller, otherwise the MTD attached to the NAND device is still
> exposed by the MTD layer, and accesses to this device will likely crash
> the system.
> 
> Signed-off-by: Boris Brezillon 
> Cc:  #3.8+

Does this follow these rules, from
Documentation/stable_kernel_rules.txt?

 - It must be obviously correct and tested.

 - It must fix a real bug that bothers people (not a, "This could be a
   problem..." type thing).

> Fixes: 2a0a288ec258 ("mtd: denali: split the generic driver and PCI layer")
> ---
>  drivers/mtd/nand/denali.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
> index 67eb2be..8feece3 100644
> --- a/drivers/mtd/nand/denali.c
> +++ b/drivers/mtd/nand/denali.c
> @@ -1622,6 +1622,7 @@ EXPORT_SYMBOL(denali_init);
>  /* driver exit point */
>  void denali_remove(struct denali_nand_info *denali)
>  {
> + nand_release(>mtd);
>   denali_irq_cleanup(denali->irq, denali);
>   dma_unmap_single(denali->dev, denali->buf.dma_buf,
>denali->mtd.writesize + denali->mtd.oobsize,

It feels a bit odd to allow usage of MTD fields after it has been
unregistered. Maybe precompute this before the nand_release()?

Brian
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Re: [PATCH v5 4/7] ARM: Exynos: use generic cpufreq driver for Exynos5420

[Krzysztof Kozlowski]

On 11.12.2015 01:58, Bartlomiej Zolnierkiewicz wrote:
> The new CPU clock type allows the use of cpufreq-dt driver
> for Exynos5420.
> 
> Cc: Tomasz Figa 
> Cc: Kukjin Kim 
> Cc: Javier Martinez Canillas 
> Cc: Thomas Abraham 
> Signed-off-by: Bartlomiej Zolnierkiewicz 
> ---
>  arch/arm/mach-exynos/exynos.c | 3 +++
>  1 file changed, 3 insertions(+)

Reviewed-by: Krzysztof Kozlowski 

Best regards,
Krzysztof


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Re: [PATCH v5 1/7] ARM: dts: Exynos542x/5800: add cluster regulator supply properties

[Krzysztof Kozlowski]

On 11.12.2015 01:58, Bartlomiej Zolnierkiewicz wrote:
> Add cluster regulator supply properties as a preparation to
> adding generic cpufreq-dt driver support for Exynos542x and
> Exynos5800 based boards.
> 
> Cc: Kukjin Kim 
> Cc: Doug Anderson 
> Cc: Javier Martinez Canillas 
> Cc: Andreas Faerber 
> Cc: Thomas Abraham 
> Signed-off-by: Bartlomiej Zolnierkiewicz 
> ---
>  arch/arm/boot/dts/exynos5420-arndale-octa.dts  | 8 
>  arch/arm/boot/dts/exynos5420-peach-pit.dts | 8 
>  arch/arm/boot/dts/exynos5420-smdk5420.dts  | 8 
>  arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 8 
>  arch/arm/boot/dts/exynos5800-peach-pi.dts  | 8 
>  5 files changed, 40 insertions(+)
> 

Reviewed-by: Krzysztof Kozlowski 

Best regards,
Krzysztof
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Re: [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties

[Krzysztof Kozlowski]

On 11.12.2015 01:58, Bartlomiej Zolnierkiewicz wrote:
> From: Thomas Abraham 
> 
> For Exynos542x/5800 platforms, add CPU operating points
> for migrating from Exynos specific cpufreq driver to using
> generic cpufreq driver.
> 
> Changes by Bartlomiej:
> - split Exynos5420 support from the original patch
> - merged Exynos5422 fixes from Ben
> 
> Changes by Ben Gamari:
> - Port to operating-points-v2
> 
> Cc: Kukjin Kim 
> Cc: Doug Anderson 
> Cc: Javier Martinez Canillas 
> Cc: Andreas Faerber 
> Signed-off-by: Thomas Abraham 
> Signed-off-by: Ben Gamari 
> Signed-off-by: Bartlomiej Zolnierkiewicz 
> ---
>  arch/arm/boot/dts/exynos5420.dtsi  | 122 
> +
>  arch/arm/boot/dts/exynos5422-cpus.dtsi |  10 +++
>  2 files changed, 132 insertions(+)
> 

Reviewed-by: Krzysztof Kozlowski 

Best regards,
Krzysztof

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Re: [PATCH v2 10/22] drm/exynos: introduce exynos_drm_plane_config structure

[Inki Dae]

Hi Marek,

2015년 11월 30일 22:53에 Marek Szyprowski 이(가) 쓴 글:
> This patch adds common structure for keeping plane configuration and
> capabilities data. This patch is inspired by similar code developed by
> Tobias Jakobi.
> 
> Signed-off-by: Marek Szyprowski 
> ---
>  drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 18 ---
>  drivers/gpu/drm/exynos/exynos7_drm_decon.c| 23 +-
>  drivers/gpu/drm/exynos/exynos_drm_drv.h   | 19 
>  drivers/gpu/drm/exynos/exynos_drm_fimd.c  | 25 ++-
>  drivers/gpu/drm/exynos/exynos_drm_plane.c | 34 +
>  drivers/gpu/drm/exynos/exynos_drm_plane.h |  7 ++---
>  drivers/gpu/drm/exynos/exynos_drm_vidi.c  | 25 ++-
>  drivers/gpu/drm/exynos/exynos_mixer.c | 44 
> +++
>  8 files changed, 121 insertions(+), 74 deletions(-)
> 
<--snip-->
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_vidi.c 
> b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
> index 3ce141236fad..90701647aef1 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_vidi.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
> @@ -30,7 +30,6 @@
>  
>  /* vidi has totally three virtual windows. */
>  #define WINDOWS_NR   3
> -#define CURSOR_WIN   2
>  
>  #define ctx_from_connector(c)container_of(c, struct vidi_context, \
>   connector)
> @@ -90,6 +89,12 @@ static const uint32_t formats[] = {
>   DRM_FORMAT_NV12,
>  };
>  
> +static const enum drm_plane_type vidi_win_types[WINDOWS_NR] = {
> + DRM_PLANE_TYPE_PRIMARY,
> + DRM_PLANE_TYPE_OVERLAY,
> + DRM_PLANE_TYPE_CURSOR,
> +};
> +
>  static int vidi_enable_vblank(struct exynos_drm_crtc *crtc)
>  {
>   struct vidi_context *ctx = crtc->ctx;
> @@ -442,17 +447,21 @@ static int vidi_bind(struct device *dev, struct device 
> *master, void *data)
>   struct drm_device *drm_dev = data;
>   struct drm_encoder *encoder = >encoder;
>   struct exynos_drm_plane *exynos_plane;
> - enum drm_plane_type type;
> - unsigned int zpos;
> + struct exynos_drm_plane_config plane_config = { 0 };
> + unsigned int i;
>   int pipe, ret;
>  
>   vidi_ctx_initialize(ctx, drm_dev);
>  
> - for (zpos = 0; zpos < WINDOWS_NR; zpos++) {
> - type = exynos_plane_get_type(zpos, CURSOR_WIN);
> - ret = exynos_plane_init(drm_dev, >planes[zpos],
> - 1 << ctx->pipe, type, formats,
> - ARRAY_SIZE(formats), zpos);
> + plane_config.pixel_formats = formats;
> + plane_config.num_pixel_formats = ARRAY_SIZE(formats);
> +
> + for (i = 0; i < WINDOWS_NR; i++) {
> + plane_config.zpos = i;
> + plane_config.type = vidi_win_types(i);

vidi_win_types is not really a function. So this should be 'vidi_win_type[i]'
This is a trivial so I can fix it.

Thanks,
Inki Dae

> +
> + ret = exynos_plane_init(drm_dev, >planes[i],
> + 1 << ctx->pipe, _config);
>   if (ret)
>   return ret;
>   }
> diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c 
> b/drivers/gpu/drm/exynos/exynos_mixer.c
> index 8d2ce13eb725..a229f86d221a 100644
> --- a/drivers/gpu/drm/exynos/exynos_mixer.c
> +++ b/drivers/gpu/drm/exynos/exynos_mixer.c
> @@ -43,7 +43,6 @@
>  
>  #define MIXER_WIN_NR 3
>  #define VP_DEFAULT_WIN   2
> -#define CURSOR_WIN   1
>  
>  /* The pixelformats that are natively supported by the mixer. */
>  #define MXR_FORMAT_RGB5654
> @@ -112,6 +111,25 @@ struct mixer_drv_data {
>   boolhas_sclk;
>  };
>  
> +static const struct exynos_drm_plane_config plane_configs[MIXER_WIN_NR] = {
> + {
> + .zpos = 0,
> + .type = DRM_PLANE_TYPE_PRIMARY,
> + .pixel_formats = mixer_formats,
> + .num_pixel_formats = ARRAY_SIZE(mixer_formats),
> + }, {
> + .zpos = 1,
> + .type = DRM_PLANE_TYPE_CURSOR,
> + .pixel_formats = mixer_formats,
> + .num_pixel_formats = ARRAY_SIZE(mixer_formats),
> + }, {
> + .zpos = 2,
> + .type = DRM_PLANE_TYPE_OVERLAY,
> + .pixel_formats = vp_formats,
> + .num_pixel_formats = ARRAY_SIZE(vp_formats),
> + },
> +};
> +
>  static const u8 filter_y_horiz_tap8[] = {
>   0,  -1, -1, -1, -1, -1, -1, -1,
>   -1, -1, -1, -1, -1, 0,  0,  0,
> @@ -1155,33 +1173,19 @@ static int mixer_bind(struct device *dev, struct 
> device *manager, void *data)
>   struct mixer_context *ctx = dev_get_drvdata(dev);
>   struct drm_device *drm_dev = data;
>   struct exynos_drm_plane *exynos_plane;
> - unsigned int zpos;
> + unsigned int i;
>   int ret;
>  
>   ret = mixer_initialize(ctx, 

Re: [PATCH v2 14/22] drm/exynos: fimd: fix dma burst size setting for small plane size

[Inki Dae]

Hi Marek,

2015년 11월 30일 22:53에 Marek Szyprowski 이(가) 쓴 글:
> This patch fixes trashed display of buffers cropped to very small width.
> Even if DMA is unstable and causes tearing when changing the burst size,
> it is still better than displaying a garbage.

It seems that this patch is different from above description. I think below 
patch is just cleanup,
which passes each member necessary instead of passing a drm_framebuffer object.

Thanks,
Inki Dae

> 
> Signed-off-by: Marek Szyprowski 
> ---
>  drivers/gpu/drm/exynos/exynos_drm_fimd.c | 24 +++-
>  1 file changed, 11 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c 
> b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> index 70cd2681e343..2e2247126581 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> @@ -487,7 +487,7 @@ static void fimd_commit(struct exynos_drm_crtc *crtc)
>  
>  
>  static void fimd_win_set_pixfmt(struct fimd_context *ctx, unsigned int win,
> - struct drm_framebuffer *fb)
> + uint32_t pixel_format, int width)
>  {
>   unsigned long val;
>  
> @@ -498,11 +498,11 @@ static void fimd_win_set_pixfmt(struct fimd_context 
> *ctx, unsigned int win,
>* So the request format is ARGB then change it to XRGB.
>*/
>   if (ctx->driver_data->has_limited_fmt && !win) {
> - if (fb->pixel_format == DRM_FORMAT_ARGB)
> - fb->pixel_format = DRM_FORMAT_XRGB;
> + if (pixel_format == DRM_FORMAT_ARGB)
> + pixel_format = DRM_FORMAT_XRGB;
>   }
>  
> - switch (fb->pixel_format) {
> + switch (pixel_format) {
>   case DRM_FORMAT_C8:
>   val |= WINCON0_BPPMODE_8BPP_PALETTE;
>   val |= WINCONx_BURSTLEN_8WORD;
> @@ -538,17 +538,15 @@ static void fimd_win_set_pixfmt(struct fimd_context 
> *ctx, unsigned int win,
>   break;
>   }
>  
> - DRM_DEBUG_KMS("bpp = %d\n", fb->bits_per_pixel);
> -
>   /*
> -  * In case of exynos, setting dma-burst to 16Word causes permanent
> -  * tearing for very small buffers, e.g. cursor buffer. Burst Mode
> -  * switching which is based on plane size is not recommended as
> -  * plane size varies alot towards the end of the screen and rapid
> -  * movement causes unstable DMA which results into iommu crash/tear.
> +  * Setting dma-burst to 16Word causes permanent tearing for very small
> +  * buffers, e.g. cursor buffer. Burst Mode switching which based on
> +  * plane size is not recommended as plane size varies alot towards the
> +  * end of the screen and rapid movement causes unstable DMA, but it is
> +  * still better to change dma-burst than displaying garbage.
>*/
>  
> - if (fb->width < MIN_FB_WIDTH_FOR_16WORD_BURST) {
> + if (width < MIN_FB_WIDTH_FOR_16WORD_BURST) {
>   val &= ~WINCONx_BURSTLEN_MASK;
>   val |= WINCONx_BURSTLEN_4WORD;
>   }
> @@ -723,7 +721,7 @@ static void fimd_update_plane(struct exynos_drm_crtc 
> *crtc,
>   DRM_DEBUG_KMS("osd size = 0x%x\n", (unsigned int)val);
>   }
>  
> - fimd_win_set_pixfmt(ctx, win, fb);
> + fimd_win_set_pixfmt(ctx, win, fb->pixel_format, state->src.w);
>  
>   /* hardware window 0 doesn't support color key. */
>   if (win != 0)
> 
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[PATCH v5 5/7] clk: samsung: exynos5422/5800: fix cpu clock configuration data

[Bartlomiej Zolnierkiewicz]

Fix cpu clock configuration data for Exynos5422/5800 SoCs
(they use higher PCLK_DBG divider values than Exynos5420 and
support additional frequencies).

Based on Hardkernel's kernel for ODROID-XU3 board.

Cc: Tomasz Figa 
Cc: Mike Turquette 
Cc: Javier Martinez Canillas 
Cc: Thomas Abraham 
Acked-by: Sylwester Nawrocki 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 drivers/clk/samsung/clk-exynos5420.c | 36 +---
 1 file changed, 33 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos5420.c 
b/drivers/clk/samsung/clk-exynos5420.c
index 2a92546..837329d 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -1274,10 +1274,34 @@ static const struct exynos_cpuclk_cfg_data 
exynos5420_eglclk_d[] __initconst = {
{  0 },
 };
 
+static const struct exynos_cpuclk_cfg_data exynos5800_eglclk_d[] __initconst = 
{
+   { 200, E5420_EGL_DIV0(3, 7, 7, 4), },
+   { 190, E5420_EGL_DIV0(3, 7, 7, 4), },
+   { 180, E5420_EGL_DIV0(3, 7, 7, 4), },
+   { 170, E5420_EGL_DIV0(3, 7, 7, 3), },
+   { 160, E5420_EGL_DIV0(3, 7, 7, 3), },
+   { 150, E5420_EGL_DIV0(3, 7, 7, 3), },
+   { 140, E5420_EGL_DIV0(3, 7, 7, 3), },
+   { 130, E5420_EGL_DIV0(3, 7, 7, 2), },
+   { 120, E5420_EGL_DIV0(3, 7, 7, 2), },
+   { 110, E5420_EGL_DIV0(3, 7, 7, 2), },
+   { 100, E5420_EGL_DIV0(3, 7, 6, 2), },
+   {  90, E5420_EGL_DIV0(3, 7, 6, 2), },
+   {  80, E5420_EGL_DIV0(3, 7, 5, 2), },
+   {  70, E5420_EGL_DIV0(3, 7, 5, 2), },
+   {  60, E5420_EGL_DIV0(3, 7, 4, 2), },
+   {  50, E5420_EGL_DIV0(3, 7, 3, 2), },
+   {  40, E5420_EGL_DIV0(3, 7, 3, 2), },
+   {  30, E5420_EGL_DIV0(3, 7, 3, 2), },
+   {  20, E5420_EGL_DIV0(3, 7, 3, 2), },
+   {  0 },
+};
+
 #define E5420_KFC_DIV(kpll, pclk, aclk)
\
kpll) << 24) | ((pclk) << 20) | ((aclk) << 4)))
 
 static const struct exynos_cpuclk_cfg_data exynos5420_kfcclk_d[] __initconst = 
{
+   { 140, E5420_KFC_DIV(3, 5, 3), }, /* for Exynos5800 */
{ 130, E5420_KFC_DIV(3, 5, 2), },
{ 120, E5420_KFC_DIV(3, 5, 2), },
{ 110, E5420_KFC_DIV(3, 5, 2), },
@@ -1357,9 +1381,15 @@ static void __init exynos5x_clk_init(struct device_node 
*np,
ARRAY_SIZE(exynos5800_gate_clks));
}
 
-   exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk",
-   mout_cpu_p[0], mout_cpu_p[1], 0x200,
-   exynos5420_eglclk_d, ARRAY_SIZE(exynos5420_eglclk_d), 0);
+   if (soc == EXYNOS5420) {
+   exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk",
+   mout_cpu_p[0], mout_cpu_p[1], 0x200,
+   exynos5420_eglclk_d, ARRAY_SIZE(exynos5420_eglclk_d), 
0);
+   } else {
+   exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk",
+   mout_cpu_p[0], mout_cpu_p[1], 0x200,
+   exynos5800_eglclk_d, ARRAY_SIZE(exynos5800_eglclk_d), 
0);
+   }
exynos_register_cpu_clock(ctx, CLK_KFC_CLK, "kfcclk",
mout_kfc_p[0], mout_kfc_p[1], 0x28200,
exynos5420_kfcclk_d, ARRAY_SIZE(exynos5420_kfcclk_d), 0);
-- 
1.9.1

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[PATCH v5 7/7] ARM: Exynos: use generic cpufreq driver for Exynos5422/5800

[Bartlomiej Zolnierkiewicz]

The new CPU clock type allows the use of generic cpufreq-dt driver
for Exynos5422/5800.

Cc: Tomasz Figa 
Cc: Kukjin Kim 
Cc: Javier Martinez Canillas 
Cc: Thomas Abraham 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 arch/arm/mach-exynos/exynos.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 7a89c9d..cec8aeb 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -232,6 +232,7 @@ static const struct of_device_id exynos_cpufreq_matches[] = 
{
{ .compatible = "samsung,exynos5250", .data = "cpufreq-dt" },
 #ifndef CONFIG_BL_SWITCHER
{ .compatible = "samsung,exynos5420", .data = "cpufreq-dt" },
+   { .compatible = "samsung,exynos5800", .data = "cpufreq-dt" },
 #endif
{ /* sentinel */ }
 };
-- 
1.9.1

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[PATCH v5 6/7] ARM: dts: Exynos5800: fix CPU OPP

[Bartlomiej Zolnierkiewicz]

Fix CPU operating points for Exynos5800 (it use different
voltages than Exynos5420 and supports additional frequencies).
However don't use 2000MHz & 1900MHz OPPs (for A15 cores) and
1400MHz OPP (for A7 cores) for now as they are not available
on all boards.

Based on Hardkernel's kernel for ODROID-XU3 board.

Changes by Ben Gamari:
- Port to operating-points-v2

Cc: Kukjin Kim 
Cc: Doug Anderson 
Cc: Javier Martinez Canillas 
Cc: Andreas Faerber 
Cc: Thomas Abraham 
Signed-off-by: Ben Gamari 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 arch/arm/boot/dts/exynos5800.dtsi | 108 ++
 1 file changed, 108 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5800.dtsi 
b/arch/arm/boot/dts/exynos5800.dtsi
index c0bb356..b3c16f6 100644
--- a/arch/arm/boot/dts/exynos5800.dtsi
+++ b/arch/arm/boot/dts/exynos5800.dtsi
@@ -23,6 +23,114 @@
compatible = "samsung,exynos5800-clock";
 };
 
+_opp_table {
+   opp@17 {
+   opp-microvolt = <125>;
+   };
+   opp@16 {
+   opp-microvolt = <125>;
+   };
+   opp@15 {
+   opp-microvolt = <110>;
+   };
+   opp@14 {
+   opp-microvolt = <110>;
+   };
+   opp@13 {
+   opp-microvolt = <110>;
+   };
+   opp@12 {
+   opp-microvolt = <100>;
+   };
+   opp@11 {
+   opp-microvolt = <100>;
+   };
+   opp@10 {
+   opp-microvolt = <100>;
+   };
+   opp@9 {
+   opp-microvolt = <100>;
+   };
+   opp@8 {
+   opp-microvolt = <90>;
+   };
+   opp@7 {
+   opp-microvolt = <90>;
+   };
+   opp@6 {
+   opp-hz = /bits/ 64 <6>;
+   opp-microvolt = <90>;
+   clock-latency-ns = <14>;
+   };
+   opp@5 {
+   opp-hz = /bits/ 64 <5>;
+   opp-microvolt = <90>;
+   clock-latency-ns = <14>;
+   };
+   opp@4 {
+   opp-hz = /bits/ 64 <4>;
+   opp-microvolt = <90>;
+   clock-latency-ns = <14>;
+   };
+   opp@3 {
+   opp-hz = /bits/ 64 <3>;
+   opp-microvolt = <90>;
+   clock-latency-ns = <14>;
+   };
+   opp@2 {
+   opp-hz = /bits/ 64 <2>;
+   opp-microvolt = <90>;
+   clock-latency-ns = <14>;
+   };
+};
+
+_opp_table {
+   opp@13 {
+   opp-microvolt = <125>;
+   };
+   opp@12 {
+   opp-microvolt = <125>;
+   };
+   opp@11 {
+   opp-microvolt = <125>;
+   };
+   opp@10 {
+   opp-microvolt = <110>;
+   };
+   opp@9 {
+   opp-microvolt = <110>;
+   };
+   opp@8 {
+   opp-microvolt = <110>;
+   };
+   opp@7 {
+   opp-microvolt = <100>;
+   };
+   opp@6 {
+   opp-microvolt = <100>;
+   };
+   opp@5 {
+   opp-hz = /bits/ 64 <5>;
+   opp-microvolt = <100>;
+   clock-latency-ns = <14>;
+   };
+   opp@4 {
+   opp-hz = /bits/ 64 <4>;
+   opp-microvolt = <100>;
+   clock-latency-ns = <14>;
+   };
+   opp@3 {
+   opp-hz = /bits/ 64 <3>;
+   opp-microvolt = <90>;
+   clock-latency-ns = <14>;
+   };
+   opp@2 {
+   opp-hz = /bits/ 64 <2>;
+   opp-microvolt = <90>;
+   clock-latency-ns = <14>;
+   };
+};
+
  {
compatible = "samsung,mfc-v8";
 };
-- 
1.9.1

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Re: [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties

[Javier Martinez Canillas]

Hello Viresh,

On 12/11/2015 12:16 AM, Viresh Kumar wrote:
> On 10-12-15, 17:58, Bartlomiej Zolnierkiewicz wrote:
>> diff --git a/arch/arm/boot/dts/exynos5422-cpus.dtsi 
>> b/arch/arm/boot/dts/exynos5422-cpus.dtsi
>> index b7f60c8..9a5131d 100644
>> --- a/arch/arm/boot/dts/exynos5422-cpus.dtsi
>> +++ b/arch/arm/boot/dts/exynos5422-cpus.dtsi
>> @@ -20,8 +20,10 @@
>>  device_type = "cpu";
>>  compatible = "arm,cortex-a7";
>>  reg = <0x100>;
>> +clocks = < CLK_KFC_CLK>;
>>  clock-frequency = <10>;
>>  cci-control-port = <_control0>;
>> +operating-points-v2 = <_opp_table>;
>>  };
> 
> Why do you need to update this file? This file is included by
> exynos5422-odroidxu3-common.dtsi, which already inherits cpus nodes
> from exynos5800.dtsi (which inherits exynos5420.dtsi).
> 
> i.e. operating-points-v2 should already be set.
>

The problem is that the big and LITTLE cores have different ordering per SoCs:

- Exynos5420 and Exynos5800: cpu0-3 (Cortex-A15) and cpu4-7 (Coretx-A7)
- Exynos5422: cpu0-3 (Cortex-A7) and cpu4-7 (Cortex-A15)

So the OPP tables are set in this DTSI file, to prevent the OPP tables
in the Exynos5422 to be inverted for the cluster 0 and 1.

Best regards,
-- 
Javier Martinez Canillas
Open Source Group
Samsung Research America
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Re: [PATCH v2 09/19] PM / devfreq: exynos: Update documentation for bus devices using passive governor

[Rob Herring]

On Fri, Dec 11, 2015 at 12:10:13AM +0900, Chanwoo Choi wrote:
> On Thu, Dec 10, 2015 at 11:21 PM, Rob Herring  wrote:
> > On Wed, Dec 09, 2015 at 01:08:01PM +0900, Chanwoo Choi wrote:
> >> This patch updates the documentation for passive bus devices and adds the
> >> detailed example of Exynos3250.
> >>
> >> Signed-off-by: Chanwoo Choi 
> >> ---
> >>  .../devicetree/bindings/devfreq/exynos-bus.txt | 244 
> >> -
> >>  1 file changed, 241 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt 
> >> b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> >> index 54a1f9c46c88..c4fdc70f8eac 100644
> >> --- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> >> +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> >> @@ -13,18 +13,23 @@ SoC has the different sub-blocks. So, this difference 
> >> should be specified
> >>  in devicetree file instead of each device driver. In result, this driver
> >>  is able to support the bus frequency for all Exynos SoCs.
> >>
> >> -Required properties for bus device:
> >> +Required properties for all bus devices:
> >>  - compatible: Should be "samsung,exynos-bus".
> >>  - clock-names : the name of clock used by the bus, "bus".
> >>  - clocks : phandles for clock specified in "clock-names" property.
> >>  - #clock-cells: should be 1.
> >>  - operating-points-v2: the OPP table including frequency/voltage 
> >> information
> >>to support DVFS (Dynamic Voltage/Frequency Scaling) feature.
> >> +
> >> +Required properties for only parent bus device:
> >>  - vdd-supply: the regulator to provide the buses with the voltage.
> >>  - devfreq-events: the devfreq-event device to monitor the curret 
> >> utilization
> >>of buses.
> >>
> >> -Optional properties for bus device:
> >> +Required properties for only passive bus device:
> >> +- devfreq: the parent bus device.
> >> +
> >> +Optional properties for only parent bus device:
> >>  - exynos,saturation-ratio: the percentage value which is used to calibrate
> >> the performance count againt total cycle count.
> >>
> >> @@ -33,7 +38,20 @@ Example1:
> >>   power line (regulator). The MIF (Memory Interface) AXI bus is used to
> >>   transfer data between DRAM and CPU and uses the VDD_MIF regualtor.
> >>
> >> - - power line(VDD_MIF) --> bus for DMC (Dynamic Memory Controller) 
> >> block
> >> + - MIF (Memory Interface) block
> >> + : VDD_MIF |--- DMC (Dynamic Memory Controller)
> >> +
> >> + - INT (Internal) block
> >> + : VDD_INT |--- LEFTBUS (parent device)
> >> +   |--- PERIL
> >> +   |--- MFC
> >> +   |--- G3D
> >> +   |--- RIGHTBUS
> >> +   |--- FSYS
> >> +   |--- LCD0
> >> +   |--- PERIR
> >> +   |--- ISP
> >> +   |--- CAM
> >
> > This still has the same problem as before. I would expect that the bus
> > hierarchy in the dts match the hierarchy here. You just have flat nodes
> > in the example below. So all IP blocks affected by frequency scaling
> > should be under the bus node defining the OPPs. Something like this:
> 
> The each bus of sub-block has not h/w dependency among sub-blocks
> and has the owned source clock / OPP table. Just they share the same
> power line. So, I think that flat nodes in the example below is not problem.

I'm talking about the peripherals not described here. Is the ISP block 
not a child of the bus_isp node? Same for the display controller block 
and bus_lcd0. And so on.

Rob

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Re: [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties

[Viresh Kumar]

On 11-12-15, 00:25, Javier Martinez Canillas wrote:
> The problem is that the big and LITTLE cores have different ordering per SoCs:
> 
> - Exynos5420 and Exynos5800: cpu0-3 (Cortex-A15) and cpu4-7 (Coretx-A7)
> - Exynos5422: cpu0-3 (Cortex-A7) and cpu4-7 (Cortex-A15)
> 
> So the OPP tables are set in this DTSI file, to prevent the OPP tables
> in the Exynos5422 to be inverted for the cluster 0 and 1.

Oh dude, that's really *ugly*. :)

Reusing files/definitions is fine to the point where things are
readable. But you have screwed it up so very badly.

Over that, why can't you keep cpu0-3 as A7 and 4-7 as a15 for all the
cases? The only worrying thing for you should be that CPU0 within the
kenrel should be controllable, right? i.e. you want a A15 to boot 5800
and A7 to boot 5422.

If yes, than you could have kept the CPUs in 5422 as:
0-3: A7
4-7: A15

and in 5420 as:
4-7: A15
0-3: A7

Wouldnt' that work ?

-- 
viresh
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Re: [PATCH v2 09/19] PM / devfreq: exynos: Update documentation for bus devices using passive governor

[Chanwoo Choi]

On 2015년 12월 11일 12:24, Rob Herring wrote:
> On Fri, Dec 11, 2015 at 12:10:13AM +0900, Chanwoo Choi wrote:
>> On Thu, Dec 10, 2015 at 11:21 PM, Rob Herring  wrote:
>>> On Wed, Dec 09, 2015 at 01:08:01PM +0900, Chanwoo Choi wrote:
 This patch updates the documentation for passive bus devices and adds the
 detailed example of Exynos3250.

 Signed-off-by: Chanwoo Choi 
 ---
  .../devicetree/bindings/devfreq/exynos-bus.txt | 244 
 -
  1 file changed, 241 insertions(+), 3 deletions(-)

 diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt 
 b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
 index 54a1f9c46c88..c4fdc70f8eac 100644
 --- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
 +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
 @@ -13,18 +13,23 @@ SoC has the different sub-blocks. So, this difference 
 should be specified
  in devicetree file instead of each device driver. In result, this driver
  is able to support the bus frequency for all Exynos SoCs.

 -Required properties for bus device:
 +Required properties for all bus devices:
  - compatible: Should be "samsung,exynos-bus".
  - clock-names : the name of clock used by the bus, "bus".
  - clocks : phandles for clock specified in "clock-names" property.
  - #clock-cells: should be 1.
  - operating-points-v2: the OPP table including frequency/voltage 
 information
to support DVFS (Dynamic Voltage/Frequency Scaling) feature.
 +
 +Required properties for only parent bus device:
  - vdd-supply: the regulator to provide the buses with the voltage.
  - devfreq-events: the devfreq-event device to monitor the curret 
 utilization
of buses.

 -Optional properties for bus device:
 +Required properties for only passive bus device:
 +- devfreq: the parent bus device.
 +
 +Optional properties for only parent bus device:
  - exynos,saturation-ratio: the percentage value which is used to calibrate
 the performance count againt total cycle count.

 @@ -33,7 +38,20 @@ Example1:
   power line (regulator). The MIF (Memory Interface) AXI bus is used to
   transfer data between DRAM and CPU and uses the VDD_MIF regualtor.

 - - power line(VDD_MIF) --> bus for DMC (Dynamic Memory Controller) 
 block
 + - MIF (Memory Interface) block
 + : VDD_MIF |--- DMC (Dynamic Memory Controller)
 +
 + - INT (Internal) block
 + : VDD_INT |--- LEFTBUS (parent device)
 +   |--- PERIL
 +   |--- MFC
 +   |--- G3D
 +   |--- RIGHTBUS
 +   |--- FSYS
 +   |--- LCD0
 +   |--- PERIR
 +   |--- ISP
 +   |--- CAM
>>>
>>> This still has the same problem as before. I would expect that the bus
>>> hierarchy in the dts match the hierarchy here. You just have flat nodes
>>> in the example below. So all IP blocks affected by frequency scaling
>>> should be under the bus node defining the OPPs. Something like this:
>>
>> The each bus of sub-block has not h/w dependency among sub-blocks
>> and has the owned source clock / OPP table. Just they share the same
>> power line. So, I think that flat nodes in the example below is not problem.
> 
> I'm talking about the peripherals not described here. Is the ISP block 
> not a child of the bus_isp node? Same for the display controller block 
> and bus_lcd0. And so on.

>From the H/W point of view, ISP block is really not included in ISP's AXI bus 
>(bus_isp).
Just, the bus_isp connect to between ISP block and DRAM.

Thanks,
Chanwoo Choi

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Re: [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties

[Viresh Kumar]

On 11-12-15, 13:00, Krzysztof Kozlowski wrote:
> It wasn't working like this. The cpu0 got the index from booting cpu, so
> on 5420 cpu0 was A15 and on 5422 it was A7.
> 
> Maybe I am not aware of some changes recently in the kernel but how do
> you want to assign the booting CPU proper number (not CPU0)?

Okay, this is how it works and I don't think you need to change the
order of CPUs based on machines.

The boot CPU isn't controlled by the DT file but your bootloader, so
it will be A15 on 5420 and A7 on 5422.

Now if you keep the order in DT as: 0-3 A7 and 4-7 A15 irrespective of
the SoCs, then this is how they will be assigned.

Linux CPU numbers   Actual CPU assigned to them
54205422

CPU0A15-0 (boot)A7-0 (boot)
CPU1A7-0A7-1
CPU2A7-1A7-2
CPU3A7-2A7-3
CPU4A7-3A15-0
CPU5A15-1   A15-1
CPU6A15-2   A15-2
CPU7A15-3   A15-3

This happens because all non-boot CPUs will be added in the order they
are present in DT.

Now, there should be no *real* reason for you to want your CPUs to be
always contiguous, isn't it?

In the case of 5420, cpufreq will show related CPUs as:
Policy0: CPU0,5-7, Policy1: CPU1-4

and in the case of 5422, cpufreq will show related CPUs as:
Policy0: CPU0-3, Policy1: CPU4-7

And I think you should really fix this now..

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Re: [PATCH v5 7/7] ARM: Exynos: use generic cpufreq driver for Exynos5422/5800

[Krzysztof Kozlowski]

On 11.12.2015 01:58, Bartlomiej Zolnierkiewicz wrote:
> The new CPU clock type allows the use of generic cpufreq-dt driver
> for Exynos5422/5800.
> 
> Cc: Tomasz Figa 
> Cc: Kukjin Kim 
> Cc: Javier Martinez Canillas 
> Cc: Thomas Abraham 
> Signed-off-by: Bartlomiej Zolnierkiewicz 
> ---
>  arch/arm/mach-exynos/exynos.c | 1 +
>  1 file changed, 1 insertion(+)

Reviewed-by: Krzysztof Kozlowski 

Best regards,
Krzysztof


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Re: [PATCH v5 6/7] ARM: dts: Exynos5800: fix CPU OPP

[Krzysztof Kozlowski]

On 11.12.2015 01:58, Bartlomiej Zolnierkiewicz wrote:
> Fix CPU operating points for Exynos5800 (it use different
> voltages than Exynos5420 and supports additional frequencies).
> However don't use 2000MHz & 1900MHz OPPs (for A15 cores) and
> 1400MHz OPP (for A7 cores) for now as they are not available
> on all boards.
> 
> Based on Hardkernel's kernel for ODROID-XU3 board.
> 
> Changes by Ben Gamari:
> - Port to operating-points-v2
> 
> Cc: Kukjin Kim 
> Cc: Doug Anderson 
> Cc: Javier Martinez Canillas 
> Cc: Andreas Faerber 
> Cc: Thomas Abraham 
> Signed-off-by: Ben Gamari 
> Signed-off-by: Bartlomiej Zolnierkiewicz 
> ---
>  arch/arm/boot/dts/exynos5800.dtsi | 108 
> ++
>  1 file changed, 108 insertions(+)
> 

Reviewed-by: Krzysztof Kozlowski 

Best regards,
Krzysztof


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Re: [PATCH] pwm: Avoid double mutex lock on pwm_enable

[Anand Moon]

Hi Krzysztof,

On 22 November 2015 at 05:43, Krzysztof Kozlowski
 wrote:
> 2015-11-22 3:14 GMT+09:00 Anand Moon :
>> Hi Krzysztof,
>>
>> On 21 November 2015 at 18:37, Krzysztof Kozlowski
>>  wrote:
>>> 2015-11-21 21:11 GMT+09:00 Anand Moon :
 hi Krzysztof,

 On 21 November 2015 at 15:22, Krzysztof Kozlowski
  wrote:
> 2015-11-21 18:40 GMT+09:00 Anand Moon :
>> hi Krzysztof,
>>
>> On 21 November 2015 at 09:56, Krzysztof Kozlowski 
>> 
>> wrote:
>>>
>>> W dniu 21.11.2015 o 01:59, Anand Moon pisze:
>>> > Commit d1cd21427747f15920cd726f5f67a07880e7dee4
>>> > (pwm: Set enable state properly on failed call to enable)
>>> > introduce double lock of mutex on pwm_enable
>>> >
>>> > Changes fix the following debug lock warning.
>>> >
>>> > [2.701720] WARNING: CPU: 3 PID: 0 at kernel/locking/mutex.c:526
>>> > __mutex_lock_slowpath+0x3bc/0x404()
>>> > [2.701731] DEBUG_LOCKS_WARN_ON(in_interrupt())
>>>
>>> Hi Anand!
>>>
>>> Yeah, I am hitting this as well. Annoying. However your description is
>>> inaccurate. Double lock of mutex does not cause warnings of sleeping or
>>> locking in atomic context (if you build with debug sleep atomic you will
>>> see different warning). More over you are partially reverting the commit
>>> d1cd21427747 ("pwm: Set enable state properly on failed call to enable")
>>> without proper explanation:
>>> 1. why this locking is inappropriate;
>>> 2. why it is safe to remove the mutex_lock().
>>>
>>> Please find the real problem, fix the real problem and throughly explain
>>> the real issue.
>>>
>>> I was suspecting some weird changes in timers. For !irqsafe timer I
>>> think it is safe to use mutexes... but apparently not. Maybe a work
>>> should be scheduled from function called by timer?
>>>
>>> Warning with debug atomic sleep:
>>> [   16.047517] BUG: sleeping function called from invalid context at
>>> ../kernel/locking/mutex.c:617
>>> [   16.054866] in_atomic(): 1, irqs_disabled(): 0, pid: 0, name: 
>>> swapper/0
>>> [   16.061402] INFO: lockdep is turned off.
>>> [   16.065281] Preemption disabled at:[<  (null)>]   (null)
>>> [   16.070524]
>>> [   16.072002] CPU: 0 PID: 0 Comm: swapper/0 Not tainted
>>> 4.4.0-rc1-00040-g28c429565d4f #290
>>> [   16.080150] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
>>> [   16.086215] [] (unwind_backtrace) from []
>>> (show_stack+0x10/0x14)
>>> [   16.093938] [] (show_stack) from []
>>> (dump_stack+0x70/0xbc)
>>> [   16.101122] [] (dump_stack) from []
>>> (mutex_lock_nested+0x24/0x474)
>>> [   16.109009] [] (mutex_lock_nested) from []
>>> (pwm_enable+0x20/0x7c)
>>> [   16.116799] [] (pwm_enable) from []
>>> (led_heartbeat_function+0xdc/0x140)
>>> [   16.125119] [] (led_heartbeat_function) from []
>>> (call_timer_fn+0x6c/0xf4)
>>> [   16.133606] [] (call_timer_fn) from []
>>> (run_timer_softirq+0x1a8/0x230)
>>> [   16.141846] [] (run_timer_softirq) from []
>>> (__do_softirq+0x134/0x2c0)
>>> [   16.149982] [] (__do_softirq) from []
>>> (irq_exit+0xd0/0x114)
>>> [   16.157255] [] (irq_exit) from []
>>> (__handle_domain_irq+0x70/0xe4)
>>> [   16.165056] [] (__handle_domain_irq) from []
>>> (gic_handle_irq+0x4c/0x94)
>>> [   16.173376] [] (gic_handle_irq) from []
>>> (__irq_svc+0x58/0x98)
>>> [   16.180817] Exception stack(0xc08cdf58 to 0xc08cdfa0)
>>> [   16.185823] df40:
>>>c0010dcc 
>>> [   16.193997] df60: c08cdfa8  c05f57c4  c08ca520
>>> c08ce4bc c08c7364 c08ce4b4
>>> [   16.202141] df80: c09121ca  0001 c08cdfa8 c0010dcc
>>> c0010dd0 600f0013 
>>> [   16.210291] [] (__irq_svc) from []
>>> (arch_cpu_idle+0x20/0x3c)
>>> [   16.217661] [] (arch_cpu_idle) from []
>>> (cpu_startup_entry+0x17c/0x26c)
>>> [   16.225899] [] (cpu_startup_entry) from []
>>> (start_kernel+0x368/0x3d0)
>>>
>>> Best regards,
>>> Krzysztof
>>>
>>>
>>> > [2.701737] Modules linked in:
>>> > [2.701748] CPU: 3 PID: 0 Comm: swapper/3 Not tainted 
>>> > 4.4.0-rc1-xu4f
>>> > #24
>>> > [2.701753] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
>>> > [2.701787] [] (unwind_backtrace) from []
>>> > (show_stack+0x10/0x14)
>>> > [2.701808] [] (show_stack) from []
>>> > (dump_stack+0x84/0xc4)
>>> > [2.701824] [] (dump_stack) from []
>>> > (warn_slowpath_common+0x80/0xb0)
>>> > [2.701836] [] (warn_slowpath_common) from []
>>> > (warn_slowpath_fmt+0x30/0x40)
>>> > [2.701849] [] (warn_slowpath_fmt) from []
>>> 

Re: [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties

[Krzysztof Kozlowski]

On 11.12.2015 13:13, Viresh Kumar wrote:
> On 11-12-15, 13:00, Krzysztof Kozlowski wrote:
>> It wasn't working like this. The cpu0 got the index from booting cpu, so
>> on 5420 cpu0 was A15 and on 5422 it was A7.
>>
>> Maybe I am not aware of some changes recently in the kernel but how do
>> you want to assign the booting CPU proper number (not CPU0)?
> 
> Okay, this is how it works and I don't think you need to change the
> order of CPUs based on machines.
> 
> The boot CPU isn't controlled by the DT file but your bootloader, so
> it will be A15 on 5420 and A7 on 5422.
> 
> Now if you keep the order in DT as: 0-3 A7 and 4-7 A15 irrespective of
> the SoCs, then this is how they will be assigned.
> 
> Linux CPU numbers   Actual CPU assigned to them
> 54205422
> 
> CPU0A15-0 (boot)A7-0 (boot)
> CPU1A7-0A7-1
> CPU2A7-1A7-2
> CPU3A7-2A7-3
> CPU4A7-3A15-0
> CPU5A15-1   A15-1
> CPU6A15-2   A15-2
> CPU7A15-3   A15-3
> 
> This happens because all non-boot CPUs will be added in the order they
> are present in DT.
> 
> Now, there should be no *real* reason for you to want your CPUs to be
> always contiguous, isn't it?
> 
> In the case of 5420, cpufreq will show related CPUs as:
> Policy0: CPU0,5-7, Policy1: CPU1-4
> 
> and in the case of 5422, cpufreq will show related CPUs as:
> Policy0: CPU0-3, Policy1: CPU4-7
> 
> And I think you should really fix this now..

We had such configuration before (before df09df6f9ac3). I don't see any
benefit in what you described. Where is the "thing" to be fixed? It is
mixed up. The contiguous ordering is easier to read and more natural.

Best regards,
Krzysztof


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Re: [PATCH v2 16/19] ARM: dts: Add PPMU node for exynos4412-odroidu3

[Chanwoo Choi]

On 2015년 12월 10일 15:44, Krzysztof Kozlowski wrote:
> On 09.12.2015 13:08, Chanwoo Choi wrote:
>> This patch add dt node for PPMU_{DMC0|DMC1|LEFTBUS|RIGHTBUS} for
>> exynos4412-odroidu3 board. Each PPMU dt node includes one event of
>> 'PPMU Count3'.
>>
>> Signed-off-by: Chanwoo Choi 
>> ---
>>  arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 40 
>> +
>>  1 file changed, 40 insertions(+)
>>
> 
> The patch itself is good but now I see that it is duplicated with
> Rinato, Monk and Trats2. Probably for all other Exynos4 and
> one-cluster-Exynos5 boards this would be exactly the same as well.
> 
> How about making a DTSI file with common PPMU events configuration?

OK. I'll make the exynos4412-ppmu-common.dtsi.

The Exynos4 series used the PPMU firstly. That is why deciding the filename
of exynos4412-ppmu-common.dtsi.

Best Regards,
Chanwoo Choi
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Re: [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties

[Viresh Kumar]

On 10-12-15, 17:58, Bartlomiej Zolnierkiewicz wrote:
> diff --git a/arch/arm/boot/dts/exynos5422-cpus.dtsi 
> b/arch/arm/boot/dts/exynos5422-cpus.dtsi
> index b7f60c8..9a5131d 100644
> --- a/arch/arm/boot/dts/exynos5422-cpus.dtsi
> +++ b/arch/arm/boot/dts/exynos5422-cpus.dtsi
> @@ -20,8 +20,10 @@
>   device_type = "cpu";
>   compatible = "arm,cortex-a7";
>   reg = <0x100>;
> + clocks = < CLK_KFC_CLK>;
>   clock-frequency = <10>;
>   cci-control-port = <_control0>;
> + operating-points-v2 = <_opp_table>;
>  };

Why do you need to update this file? This file is included by
exynos5422-odroidxu3-common.dtsi, which already inherits cpus nodes
from exynos5800.dtsi (which inherits exynos5420.dtsi).

i.e. operating-points-v2 should already be set.

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Re: [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties

[Krzysztof Kozlowski]

On 11.12.2015 12:32, Viresh Kumar wrote:
> On 11-12-15, 00:25, Javier Martinez Canillas wrote:
>> The problem is that the big and LITTLE cores have different ordering per 
>> SoCs:
>>
>> - Exynos5420 and Exynos5800: cpu0-3 (Cortex-A15) and cpu4-7 (Coretx-A7)
>> - Exynos5422: cpu0-3 (Cortex-A7) and cpu4-7 (Cortex-A15)
>>
>> So the OPP tables are set in this DTSI file, to prevent the OPP tables
>> in the Exynos5422 to be inverted for the cluster 0 and 1.
> 
> Oh dude, that's really *ugly*. :)
> 
> Reusing files/definitions is fine to the point where things are
> readable. But you have screwed it up so very badly.
> 
> Over that, why can't you keep cpu0-3 as A7 and 4-7 as a15 for all the
> cases? The only worrying thing for you should be that CPU0 within the
> kenrel should be controllable, right? i.e. you want a A15 to boot 5800
> and A7 to boot 5422.
> 
> If yes, than you could have kept the CPUs in 5422 as:
> 0-3: A7
> 4-7: A15
> 
> and in 5420 as:
> 4-7: A15
> 0-3: A7
> 
> Wouldnt' that work ?

It wasn't working like this. The cpu0 got the index from booting cpu, so
on 5420 cpu0 was A15 and on 5422 it was A7.

Maybe I am not aware of some changes recently in the kernel but how do
you want to assign the booting CPU proper number (not CPU0)?

Best regards,
Krzysztof

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Re: [PATCH v5 0/7] cpufreq: add generic cpufreq driver support for Exynos542x/5800 platforms

[Krzysztof Kozlowski]

On 11.12.2015 01:58, Bartlomiej Zolnierkiewicz wrote:
> Hi,
> 
> This patch series adds generic cpufreq-dt driver support for
> Exynos542x/5800 (using the new CPU clock type which allows it).
> 
> It has been tested on Exynos5422 based ODROID-XU3 Lite board.
> 
> Depends on:
> - next-20151124 branch of linux-next kernel tree

Bartlomiej,
Thanks for update! Nice work. Everything looks good for me. As for
merging, my last pull requests are waiting on Kukjin, so I am not
grabbing more stuff till they get in. This (I hope) should happen this
weekend so:
1. Either Kukjin will pick it up directly,
2. I could apply this later and hopefully still send them for v4.5.


Sylwester,
However in case of any delay, how about merging clock changes now
through clock tree and preparing a tag for samsung-soc? If the series
won't make till v4.5 then at least dependency would be merged.

In that case you could also pick the first patch from Marek's GSCL clock.


Best regards,
Krzysztof

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Re: [PATCH v4 38/58] mtd: nand: s3c2410: use the mtd instance embedded in struct nand_chip

[Krzysztof Kozlowski]

On 10.12.2015 17:00, Boris Brezillon wrote:
> struct nand_chip now embeds an mtd device. Make use of this mtd instance.
> 
> Signed-off-by: Boris Brezillon 
> ---
> Changes generated with the following coccinelle script
> 
> --->8---
> virtual patch
> 
> @fix1@
> identifier __chipfield, __mtdfield;
> type __type;
> @@
> (
>   __type {
>   ...
>   struct nand_chip __chipfield;
>   ...
> - struct mtd_info __mtdfield;
>   ...
>   };
> |
>   __type {
>   ...
> - struct mtd_info __mtdfield;
>   ...
>   struct nand_chip __chipfield;
>   ...
>   };
> )
> 
> @fix2 depends on fix1@
> identifier fix1.__chipfield, fix1.__mtdfield;
> identifier __subfield;
> type fix1.__type;
> __type *__priv;
> @@
> (
> - __priv->__mtdfield.__subfield
> + nand_to_mtd(&__priv->__chipfield)->__subfield
> |
> - &(__priv->__mtdfield)
> + nand_to_mtd(&__priv->__chipfield)
> )
> --->8---
> ---
>  drivers/mtd/nand/s3c2410.c | 23 ++-
>  1 file changed, 14 insertions(+), 9 deletions(-)
> 

Looks correct:

Reviewed-by: Krzysztof Kozlowski 

Best regards,
Krzysztof


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Re: [PATCH v2 14/22] drm/exynos: fimd: fix dma burst size setting for small plane size

[Marek Szyprowski]

Hello,

On 2015-12-10 12:35, Inki Dae wrote:

Hi Marek,

2015년 11월 30일 22:53에 Marek Szyprowski 이(가) 쓴 글:

This patch fixes trashed display of buffers cropped to very small width.
Even if DMA is unstable and causes tearing when changing the burst size,
it is still better than displaying a garbage.

It seems that this patch is different from above description. I think below 
patch is just cleanup,
which passes each member necessary instead of passing a drm_framebuffer object.


Please note the last chunk of this patch. After applying it width is
taken from state->src.w instead of fb->width. If you want, I can split
this patch into 2 parts - one cleanup without functional change, and
second, replacement of fb->width with state->src.w.





Signed-off-by: Marek Szyprowski 
---
  drivers/gpu/drm/exynos/exynos_drm_fimd.c | 24 +++-
  1 file changed, 11 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c 
b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 70cd2681e343..2e2247126581 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -487,7 +487,7 @@ static void fimd_commit(struct exynos_drm_crtc *crtc)
  
  
  static void fimd_win_set_pixfmt(struct fimd_context *ctx, unsigned int win,

-   struct drm_framebuffer *fb)
+   uint32_t pixel_format, int width)
  {
unsigned long val;
  
@@ -498,11 +498,11 @@ static void fimd_win_set_pixfmt(struct fimd_context *ctx, unsigned int win,

 * So the request format is ARGB then change it to XRGB.
 */
if (ctx->driver_data->has_limited_fmt && !win) {
-   if (fb->pixel_format == DRM_FORMAT_ARGB)
-   fb->pixel_format = DRM_FORMAT_XRGB;
+   if (pixel_format == DRM_FORMAT_ARGB)
+   pixel_format = DRM_FORMAT_XRGB;
}
  
-	switch (fb->pixel_format) {

+   switch (pixel_format) {
case DRM_FORMAT_C8:
val |= WINCON0_BPPMODE_8BPP_PALETTE;
val |= WINCONx_BURSTLEN_8WORD;
@@ -538,17 +538,15 @@ static void fimd_win_set_pixfmt(struct fimd_context *ctx, 
unsigned int win,
break;
}
  
-	DRM_DEBUG_KMS("bpp = %d\n", fb->bits_per_pixel);

-
/*
-* In case of exynos, setting dma-burst to 16Word causes permanent
-* tearing for very small buffers, e.g. cursor buffer. Burst Mode
-* switching which is based on plane size is not recommended as
-* plane size varies alot towards the end of the screen and rapid
-* movement causes unstable DMA which results into iommu crash/tear.
+* Setting dma-burst to 16Word causes permanent tearing for very small
+* buffers, e.g. cursor buffer. Burst Mode switching which based on
+* plane size is not recommended as plane size varies alot towards the
+* end of the screen and rapid movement causes unstable DMA, but it is
+* still better to change dma-burst than displaying garbage.
 */
  
-	if (fb->width < MIN_FB_WIDTH_FOR_16WORD_BURST) {

+   if (width < MIN_FB_WIDTH_FOR_16WORD_BURST) {
val &= ~WINCONx_BURSTLEN_MASK;
val |= WINCONx_BURSTLEN_4WORD;
}
@@ -723,7 +721,7 @@ static void fimd_update_plane(struct exynos_drm_crtc *crtc,
DRM_DEBUG_KMS("osd size = 0x%x\n", (unsigned int)val);
}
  
-	fimd_win_set_pixfmt(ctx, win, fb);

+   fimd_win_set_pixfmt(ctx, win, fb->pixel_format, state->src.w);
  
  	/* hardware window 0 doesn't support color key. */

if (win != 0)



Best regards
--
Marek Szyprowski, PhD
Samsung R Institute Poland

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Re: [PATCH v2 06/22] drm/exynos: move dma_addr attribute from exynos plane to exynos fb

[Inki Dae]

2015년 11월 30일 22:53에 Marek Szyprowski 이(가) 쓴 글:
> DMA address is a framebuffer attribute and the right place for it is
> exynos_drm_framebuffer not exynos_drm_plane. This patch also introduces
> helper function for getting dma address of the given framebuffer.
> 
> Signed-off-by: Marek Szyprowski 
> Reviewed-by: Gustavo Padovan 
> ---
>  drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 13 -
>  drivers/gpu/drm/exynos/exynos7_drm_decon.c| 16 +---
>  drivers/gpu/drm/exynos/exynos_drm_drv.h   |  3 ---
>  drivers/gpu/drm/exynos/exynos_drm_fb.c| 16 ++--
>  drivers/gpu/drm/exynos/exynos_drm_fb.h|  3 +--
>  drivers/gpu/drm/exynos/exynos_drm_fimd.c  | 10 ++
>  drivers/gpu/drm/exynos/exynos_drm_plane.c | 18 --
>  drivers/gpu/drm/exynos/exynos_drm_vidi.c  |  5 -
>  drivers/gpu/drm/exynos/exynos_mixer.c |  7 ---
>  9 files changed, 38 insertions(+), 53 deletions(-)
> 

<--snip-->

> diff --git a/drivers/gpu/drm/exynos/exynos_drm_vidi.c 
> b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
> index 669362c53f49..3ce141236fad 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_vidi.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
> @@ -24,6 +24,7 @@
>  
>  #include "exynos_drm_drv.h"
>  #include "exynos_drm_crtc.h"
> +#include "exynos_drm_fb.h"
>  #include "exynos_drm_plane.h"
>  #include "exynos_drm_vidi.h"
>  
> @@ -126,11 +127,13 @@ static void vidi_update_plane(struct exynos_drm_crtc 
> *crtc,
> struct exynos_drm_plane *plane)
>  {
>   struct vidi_context *ctx = crtc->ctx;
> + dma_addr_t addr;
>  
>   if (ctx->suspended)
>   return;
>  
> - DRM_DEBUG_KMS("dma_addr = %pad\n", plane->dma_addr);
> + addr = exynos_drm_fb_dma_addr(plane->base.fb, 0);

At this point, plane->base.fb is NULL so null pointer access happens like below,

[5.969422] Unable to handle kernel NULL pointer dereference at virtual 
address 0090
[5.977481] pgd = ee59
[5.980142] [0090] *pgd=6e526831, *pte=, *ppte=
[5.986347] Internal error: Oops: 17 [#1] PREEMPT SMP ARM
[5.991712] Modules linked in:
[5.994770] CPU: 3 PID: 1598 Comm: sh Not tainted 
4.4.0-rc3-00052-gc60d7e2-dirty #199
[6.002565] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[6.008647] task: ef328000 ti: ee4d4000 task.ti: ee4d4000
[6.014053] PC is at exynos_drm_fb_dma_addr+0x8/0x14
[6.018990] LR is at vidi_update_plane+0x4c/0xc4
[6.023581] pc : []lr : []psr: 8013
[6.023581] sp : ee4d5d90  ip : 0001  fp : 
[6.035029] r10:   r9 : c05b965c  r8 : ee813e00
[6.040241] r7 :   r6 : ee8e3330  r5 :   r4 : ee8e3010
[6.046749] r3 :   r2 :   r1 : 0024  r0 : 
[6.053264] Flags: Nzcv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
[6.060379] Control: 10c5387d  Table: 6e59004a  DAC: 0051
[6.066107] Process sh (pid: 1598, stack limit = 0xee4d4210)
[6.071748] Stack: (0xee4d5d90 to 0xee4d6000)
[6.076100] 5d80:  ee813300 
ee476e40 0005
[6.084236] 5da0: ee8e3330 c028ac14 0008 ee476e40 ee476fc0 ef3b3800 
ee476fc0 eeb3e380
[6.092395] 5dc0: 0002 c02b08e4  eeb3e3a4 ee476fc0 ee476e40 
ef3b3800 eeb3e380
[6.100554] 5de0: 0002 c02b12b8 ee854400  0001 ee8501a8 
 ee476e40
[6.108714] 5e00: ef3b3800 0001 ee476e40 0050 ee850c80 0001 
ee476e40 ef3b3aac
[6.116873] 5e20: 0002 00ff  c028e0ec 000a82b4 c02acc50 
ee8e36a0 ee476c80
[6.125032] 5e40: ef3b3aac ef3b3800 ee476c9c ee850c80 ef3b3800 ef3b3800 
ef3b3800 ef3b398c
[6.133191] 5e60: c088c390 0002 000a82b4 c028f8d4  ef3b3800 
ef0f4300 c028f948
[6.141350] 5e80: ee850c80 c028f864 ef3b3a84 0001 ef3b3a90 c02853e4 
0001 
[6.149509] 5ea0: 000a82b4 ee4d5ec0 0002 ee8e3010 0002 0002 
ee4d5f88 
[6.157669] 5ec0:  eeb8df00 000a82b4 c02c4278 0002 ee476b00 
eeb8df0c c01390ac
[6.165828] 5ee0:   ee4e1f00 0002 000a9540 ee4d5f88 
c000f844 ee4d4000
[6.173987] 5f00:  c00dbf70 000a82b4 c00093dc ee4d4000 ee4d5f78 
ef328234 c0579bec
[6.182146] 5f20: 0001 0001 ee4d5f3c 0001 ee45e9c4 0001 
000a82b4 c005ca74
[6.190306] 5f40: ee45e9c4 0002 000a9540 c005cad4 ee4e1f00 0002 
000a9540 ee4d5f88
[6.198465] 5f60: c000f844 c00dc770   ee4e1f00 ee4e1f00 
0002 000a9540
[6.206624] 5f80: c000f844 c00dcf98   0003 000a7c40 
0001 000a9540
[6.214783] 5fa0: 0004 c000f680 000a7c40 0001 0001 000a9540 
0002 
[6.222942] 5fc0: 000a7c40 0001 000a9540 0004 0020 000a82c8 
000a8294 000a82b4
[6.231102] 5fe0:  be8b1624 00012345 

[PATCH v5 0/7] cpufreq: add generic cpufreq driver support for Exynos542x/5800 platforms

[Bartlomiej Zolnierkiewicz]

Hi,

This patch series adds generic cpufreq-dt driver support for
Exynos542x/5800 (using the new CPU clock type which allows it).

It has been tested on Exynos5422 based ODROID-XU3 Lite board.

Depends on:
- next-20151124 branch of linux-next kernel tree

Changes since v4:
- renamed oppXX@hz to opp@hz
- put Odroid changes in exynos5422-odroidxu3-common.dtsi
- override CPU OPP properties for Exynos5422/5800 instead of
  duplicating them
- merged "ARM: dts: Exynos5422: fix OPP tables" patch with
  "ARM: dts: Exynos5420: add CPU OPP properties" one
- added missing Thomas' SoB line to "ARM: dts: Exynos5420:
  add CPU OPP properties" patch
- updated authorship of "ARM: Exynos: use generic cpufreq
  driver for Exynos5420" and "ARM: Exynos: use generic
  cpufreq driver for Exynos5422/5800" patches
- updated Javier's and Mike's e-mail adresses
- removed non-working e-mail address of Sachin Kamat

Changes since v3:
- switched to using cpufreq-dt driver
- updated patch descriptions to cover Exynos5422 support
- added Acked-by from Sylwester to clock driver patches

Changes since v2:
- ported over next-20151124 branch
- integrated missing CLK_RECALC_NEW_RATES flags fix to patch #3
  (from Anand Moon)
- added regulator supply properties for ODROID-XU3 Lite and
  ODROID-XU4 in patch #2
- ported CPU OPPs to operating-points-v2 (from Ben Gamari)
- added "ARM: dts: Exynos5422: fix OPP tables" patch (from Ben
  Gamari)
- added "cpufreq: arm-big-little: accept operating-points-v2
  nodes" patch (from Ben Gamari)
- renamed OPP nodes as opp@

Changes since v1:
- added CPU cluster regulator supply properties to
  exynos5420-arndale-octa.dts, exynos5420-peach-pit.dts,
  exynos5420-smdk5420.dts and exynos5800-peach-pi.dts

Changes over Thomas' original v12 code:
- split Exynos5420 and Exynos5800 support
- moved E5420_[EGL,KFC]_DIV0() macros to clk-exynos5420.c
- disabled cpufreq if big.LITTLE switcher support is enabled
- enhanced arm_big_little[_dt] driver with CPU cluster regulator
  support
- fixed CPU clock configuration data for Exynos5800
- fixed CPU operating points setup for Exynos5800
- added CPU cluster regulator supplies for ODROID-XU3 board

Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R Institute Poland
Samsung Electronics


Bartlomiej Zolnierkiewicz (5):
  ARM: dts: Exynos542x/5800: add cluster regulator supply properties
  ARM: Exynos: use generic cpufreq driver for Exynos5420
  clk: samsung: exynos5422/5800: fix cpu clock configuration data
  ARM: dts: Exynos5800: fix CPU OPP
  ARM: Exynos: use generic cpufreq driver for Exynos5422/5800

Thomas Abraham (2):
  clk: samsung: exynos5420: add cpu clock configuration data and
instantiate cpu clock
  ARM: dts: Exynos542x/5800: add CPU OPP properties

 arch/arm/boot/dts/exynos5420-arndale-octa.dts  |   8 ++
 arch/arm/boot/dts/exynos5420-peach-pit.dts |   8 ++
 arch/arm/boot/dts/exynos5420-smdk5420.dts  |   8 ++
 arch/arm/boot/dts/exynos5420.dtsi  | 122 +
 arch/arm/boot/dts/exynos5422-cpus.dtsi |  10 ++
 arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi |   8 ++
 arch/arm/boot/dts/exynos5800-peach-pi.dts  |   8 ++
 arch/arm/boot/dts/exynos5800.dtsi  | 108 ++
 arch/arm/mach-exynos/exynos.c  |   4 +
 drivers/clk/samsung/clk-exynos5420.c   |  88 ++-
 include/dt-bindings/clock/exynos5420.h |   2 +
 11 files changed, 372 insertions(+), 2 deletions(-)

-- 
1.9.1

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Re: [PATCH v3 13/20] ARM: dts: Add bus nodes using VDD_INT for Exynos3250

[Krzysztof Kozlowski]

On 11.12.2015 14:07, Chanwoo Choi wrote:
> This patch adds the bus nodes using VDD_INT for Exynos3250 SoC.
> Exynos3250 has following AXI buses to translate data between
> DRAM and sub-blocks.
> 
> Following list specifies the detailed relation between DRAM and sub-blocks:
> - ACLK400 clock for MCUISP
> - ACLK266 clock for ISP
> - ACLK200 clock for FSYS
> - ACLK160 clock for LCD0
> - ACLK100 clock for PERIL
> - GDL clock for LEFTBUS
> - GDR clock for RIGHTBUS
> - SCLK_MFC clock for MFC
> 
> Signed-off-by: Chanwoo Choi 
> ---
>  arch/arm/boot/dts/exynos3250.dtsi | 147 
> ++
>  1 file changed, 147 insertions(+)
> 

Reviewed-by: Krzysztof Kozlowski 

Best regards,
Krzysztof


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Re: [PATCH v3 14/20] ARM: dts: Add bus nodes using VDD_MIF for Exynos4x12

[Krzysztof Kozlowski]

On 11.12.2015 14:07, Chanwoo Choi wrote:
> This patch adds the bus noes using VDD_MIF for Exynos4x12 SoC.

"noes", pointed at v2.

> Exynos4x12 has the following AXI buses to translate data
> between DRAM and DMC/ACP/C2C.
> 
> Signed-off-by: Chanwoo Choi 
> [linux.amoon: Tested on Odroid U3]
> Tested-by: Anand Moon 
> ---
>  arch/arm/boot/dts/exynos4x12.dtsi | 68 
> +++
>  1 file changed, 68 insertions(+)

The code itself:
Reviewed-by: Krzysztof Kozlowski 

Best regards,
Krzysztof


> diff --git a/arch/arm/boot/dts/exynos4x12.dtsi 
> b/arch/arm/boot/dts/exynos4x12.dtsi
> index 84a23f962946..99a0f4ca3d47 100644
> --- a/arch/arm/boot/dts/exynos4x12.dtsi
> +++ b/arch/arm/boot/dts/exynos4x12.dtsi
> @@ -281,6 +281,74 @@
>   clocks = < CLK_SMMU_LITE1>, < CLK_FIMC_LITE1>;
>   #iommu-cells = <0>;
>   };
> +
> + bus_dmc: bus_dmc {
> + compatible = "samsung,exynos-bus";
> + clocks = < CLK_DIV_DMC>;
> + clock-names = "bus";
> + operating-points-v2 = <_dmc_opp_table>;
> + status = "disabled";
> + };
> +
> + bus_acp: bus_acp {
> + compatible = "samsung,exynos-bus";
> + clocks = < CLK_DIV_ACP>;
> + clock-names = "bus";
> + operating-points-v2 = <_acp_opp_table>;
> + status = "disabled";
> + };
> +
> + bus_c2c: bus_c2c {
> + compatible = "samsung,exynos-bus";
> + clocks = < CLK_DIV_C2C>;
> + clock-names = "bus";
> + operating-points-v2 = <_dmc_opp_table>;
> + status = "disabled";
> + };
> +
> + bus_dmc_opp_table: opp_table1 {
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + opp@1 {
> + opp-hz = /bits/ 64 <1>;
> + opp-microvolt = <90>;
> + };
> + opp@13400 {
> + opp-hz = /bits/ 64 <13400>;
> + opp-microvolt = <90>;
> + };
> + opp@16000 {
> + opp-hz = /bits/ 64 <16000>;
> + opp-microvolt = <90>;
> + };
> + opp@26700 {
> + opp-hz = /bits/ 64 <26700>;
> + opp-microvolt = <95>;
> + };
> + opp@4 {
> + opp-hz = /bits/ 64 <4>;
> + opp-microvolt = <105>;
> + };
> + };
> +
> + bus_acp_opp_table: opp_table2 {
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + opp@1 {
> + opp-hz = /bits/ 64 <1>;
> + };
> + opp@13400 {
> + opp-hz = /bits/ 64 <13400>;
> + };
> + opp@16000 {
> + opp-hz = /bits/ 64 <16000>;
> + };
> + opp@26700 {
> + opp-hz = /bits/ 64 <26700>;
> + };
> + };
>  };
>  
>   {
> 

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Re: [PATCH v3 17/20] ARM: dts: Add exynos4412-ppmu-common dtsi to delete duplicate PPMU node

[Krzysztof Kozlowski]

On 11.12.2015 14:07, Chanwoo Choi wrote:
> This patch adds the exynos4412-ppmu-common.dtsi to duplicate PPMU node

I think the goal of the patch was to remove duplication of nodes, not to
duplicate them. :)

Except of that patch is okay:

Reviewed-by: Krzysztof Kozlowski 

Best regards,
Krzysztof


> because exynos3250-rinato/monk, exynos4412-trats2/odroidu3 has the same
> PPMU device tree node.
> 
> Signed-off-by: Chanwoo Choi 
> ---
>  arch/arm/boot/dts/exynos3250-monk.dts   | 41 +
>  arch/arm/boot/dts/exynos3250-rinato.dts | 41 +
>  arch/arm/boot/dts/exynos4412-odroid-common.dtsi |  1 +
>  arch/arm/boot/dts/exynos4412-ppmu-common.dtsi   | 49 
> +
>  arch/arm/boot/dts/exynos4412-trats2.dts | 41 +
>  5 files changed, 53 insertions(+), 120 deletions(-)
>  create mode 100644 arch/arm/boot/dts/exynos4412-ppmu-common.dtsi

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Re: [PATCH v3 18/20] ARM: dts: Add support of bus frequency using VDD_INT for exynos3250-rinato

[Krzysztof Kozlowski]

On 11.12.2015 14:07, Chanwoo Choi wrote:
> This patch adds the bus device-tree node of INT (internal) block
> to enable the bus frequency scaling. The following sub-blocks share
> the VDD_INT power source:
> - LEFTBUS (parent device)
> - RIGHTBUS
> - PERIL
> - LCD0
> - FSYS
> - MCUISP / ISP
> - MFC
> 
> The LEFTBUS is parent device with devfreq ondemand governor
> and the rest devices has the dependency on LEFTBUS bus.

I pointed this previously. If you wish to leave the sentence in such
form then "rest of" and "have" not "has".

Best regards,
Krzysztof

> 
> Signed-off-by: Chanwoo Choi 
> Reviewed-by: Krzysztof Kozlowski 
> ---
>  arch/arm/boot/dts/exynos3250-rinato.dts | 41 
> +
>  1 file changed, 41 insertions(+)
> 
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Re: [PATCH v3 15/20] ARM: dts: Add bus nodes using VDD_INT for Exynos4x12

[Krzysztof Kozlowski]

On 11.12.2015 14:07, Chanwoo Choi wrote:
> This patch adds the bus noes using VDD_INT for Exynos4x12 SoC.
> Exynos4x12 has the following AXI buses to translate data between
> DRAM and sub-blocks.
> 
> Following list specifies the detailed relation between DRAM and sub-blocks:
> - ACLK100 clock for PERIL/PERIR/MFC(PCLK)
> - ACLK160 clock for CAM/TV/LCD
> : The minimum clock of ACLK160 should be over 160MHz.
>   When drop the clock under 160MHz, show the broken image.
> - ACLK133 clock for FSYS
> - GDL clock for LEFTBUS
> - GDR clock for RIGHTBUS
> - SCLK_MFC clock for MFC
> 
> Signed-off-by: Chanwoo Choi 
> [linux.amoon: Tested on Odroid U3]
> Tested-by: Anand Moon 
> ---
>  arch/arm/boot/dts/exynos4x12.dtsi | 106 
> ++
>  1 file changed, 106 insertions(+)
> 

Reviewed-by: Krzysztof Kozlowski 

Best regards,
Krzysztof



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Re: [PATCH v3 16/20] ARM: dts: Add bus nodes using VDD_MIF for Exynos4210

[Krzysztof Kozlowski]

On 11.12.2015 14:07, Chanwoo Choi wrote:
> This patch adds the bus nodes for Exynos4210 SoC. Exynos4210 SoC has
> one power line for all buses to translate data between DRAM and sub-blocks.
> 
> Following list specifies the detailed relation between DRAM and sub-blocks:
> - DMC/ACP clock for DMC (Dynamic Memory Controller)
> - ACLK200 clock for LCD0
> - ACLK100 clock for PERIL/PERIR/MFC(PCLK)
> - ACLK160 clock for CAM/TV/LCD0/LCD1
> - ACLK133 clock for FSYS/GPS
> - GDL/GDR clock for LEFTBUS/RIGHTBUS
> - SCLK_MFC clock for MFC
> 
> Signed-off-by: Chanwoo Choi 
> ---
>  arch/arm/boot/dts/exynos4210.dtsi | 159 
> ++
>  1 file changed, 159 insertions(+)
> 

Reviewed-by: Krzysztof Kozlowski 

Best regards,
Krzysztof


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Re: [PATCH v3 20/20] ARM: dts: Add support of bus frequency for exynos4412-trats/odroidu3

[Krzysztof Kozlowski]

On 11.12.2015 14:07, Chanwoo Choi wrote:
> THis patch adds the bus device tree nodes for both MIF (Memory) and INT
> (Internal) block to enable the bus frequency.
> 
> The DMC bus is parent device in MIF block using VDD_MIF and the LEFTBUS
> bus is parent device in INT block using VDD_INT.
> 
> Signed-off-by: Chanwoo Choi 
> [linux.amoon: Tested on Odroid U3]
> Tested-by: Anand Moon 
> ---
>  arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 47 
>  arch/arm/boot/dts/exynos4412-trats2.dts | 48 
> +
>  2 files changed, 95 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi 
> b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> index 7bd65026761e..b6818aec7cf9 100644
> --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> @@ -501,3 +501,50 @@
>   {
>   status = "okay";
>  };
> +
> +_acp {
> + devfreq = <_dmc>;
> + status = "okay";
> +};

I meant put them in proper place, respecting alphabetical order. The 'b'
comes before 'w'.

As for the new nodes (bus_XXX) your previous sorting (first parent, then
passive) was also okay - it had sense. This is up to you. Just put
everything not at the end of file.

Best regards,
Krzysztof


> +
> +_c2c {
> + devfreq = <_dmc>;
> + status = "okay";
> +};
> +
> +_dmc {
> + devfreq-events = <_dmc0_3>, <_dmc1_3>;
> + vdd-supply = <_reg>;
> + status = "okay";
> +};
> +
> +_display {
> + devfreq = <_leftbus>;
> + status = "okay";
> +};
> +
> +_fsys {
> + devfreq = <_leftbus>;
> + status = "okay";
> +};
> +
> +_leftbus {
> + devfreq-events = <_leftbus_3>, <_rightbus_3>;
> + vdd-supply = <_reg>;
> + status = "okay";
> +};
> +
> +_mfc {
> + devfreq = <_leftbus>;
> + status = "okay";
> +};
> +
> +_peri {
> + devfreq = <_leftbus>;
> + status = "okay";
> +};
> +
> +_rightbus {
> + devfreq = <_leftbus>;
> + status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts 
> b/arch/arm/boot/dts/exynos4412-trats2.dts
> index 92438eb6eec6..0b8aff3b8cb7 100644
> --- a/arch/arm/boot/dts/exynos4412-trats2.dts
> +++ b/arch/arm/boot/dts/exynos4412-trats2.dts
> @@ -1251,3 +1251,51 @@
>   vtmu-supply = <_reg>;
>   status = "okay";
>  };
> +
> +_acp {
> + devfreq = <_dmc>;
> + status = "okay";
> +};
> +
> +_c2c {
> + devfreq = <_dmc>;
> + status = "okay";
> +};
> +
> +_dmc {
> + devfreq-events = <_dmc0_3>, <_dmc1_3>;
> + vdd-supply = <_reg>;
> + status = "okay";
> +};
> +
> +_display {
> + devfreq = <_leftbus>;
> + status = "okay";
> +};
> +
> +
> +_fsys {
> + devfreq = <_leftbus>;
> + status = "okay";
> +};
> +
> +_leftbus {
> + devfreq-events = <_leftbus_3>, <_rightbus_3>;
> + vdd-supply = <_reg>;
> + status = "okay";
> +};
> +
> +_mfc {
> + devfreq = <_leftbus>;
> + status = "okay";
> +};
> +
> +_peri {
> + devfreq = <_leftbus>;
> + status = "okay";
> +};
> +
> +_rightbus {
> + devfreq = <_leftbus>;
> + status = "okay";
> +};
> 

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Re: [PATCH v3 17/20] ARM: dts: Add exynos4412-ppmu-common dtsi to delete duplicate PPMU node

[Chanwoo Choi]

On 2015년 12월 11일 16:15, Krzysztof Kozlowski wrote:
> On 11.12.2015 14:07, Chanwoo Choi wrote:
>> This patch adds the exynos4412-ppmu-common.dtsi to duplicate PPMU node
> 
> I think the goal of the patch was to remove duplication of nodes, not to
> duplicate them. :)

OK. I'll modify both subject and description of this patch.

> 
> Except of that patch is okay:
> 
> Reviewed-by: Krzysztof Kozlowski 

[snip]

Best Regards,
Chanwoo Choi
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Re: [PATCH v3 18/20] ARM: dts: Add support of bus frequency using VDD_INT for exynos3250-rinato

[Chanwoo Choi]

On 2015년 12월 11일 16:18, Krzysztof Kozlowski wrote:
> On 11.12.2015 14:07, Chanwoo Choi wrote:
>> This patch adds the bus device-tree node of INT (internal) block
>> to enable the bus frequency scaling. The following sub-blocks share
>> the VDD_INT power source:
>> - LEFTBUS (parent device)
>> - RIGHTBUS
>> - PERIL
>> - LCD0
>> - FSYS
>> - MCUISP / ISP
>> - MFC
>>
>> The LEFTBUS is parent device with devfreq ondemand governor
>> and the rest devices has the dependency on LEFTBUS bus.
> 
> I pointed this previously. If you wish to leave the sentence in such
> form then "rest of" and "have" not "has".

It is my mistake. I'll modify it as following your comment:
- "and the rest of devices depend on the LEFTBUS device."

Best Regards,
Chanwoo Choi

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Re: [PATCH v3 01/20] PM / devfreq: exynos: Add generic exynos bus frequency driver

[Chanwoo Choi]

Dear MyungJoo,

Almost device tree patches in this series are reviewed by Exynos maintainer.
Could you please review this series?

Best Regards,
Chanwoo Choi

On 2015년 12월 11일 14:07, Chanwoo Choi wrote:
> This patch adds the generic exynos bus frequency driver for AMBA AXI bus
> of sub-blocks in exynos SoC with DEVFREQ framework. The Samsung Exynos SoC
> have the common architecture for bus between DRAM and sub-blocks in SoC.
> This driver can support the generic bus frequency driver for Exynos SoCs.
> 
> In devicetree, Each bus block has a bus clock, regulator, operation-point
> and devfreq-event devices which measure the utilization of each bus block.
> 
> Signed-off-by: Chanwoo Choi 
> [linux.amoon: Tested on Odroid U3]
> Tested-by: Anand Moon 
> ---
>  drivers/devfreq/Kconfig |  15 ++
>  drivers/devfreq/Makefile|   1 +
>  drivers/devfreq/exynos/Makefile |   1 +
>  drivers/devfreq/exynos/exynos-bus.c | 449 
> 
>  4 files changed, 466 insertions(+)
>  create mode 100644 drivers/devfreq/exynos/exynos-bus.c
> 
> diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
> index 64281bb2f650..55ec774f794c 100644
> --- a/drivers/devfreq/Kconfig
> +++ b/drivers/devfreq/Kconfig
> @@ -66,6 +66,21 @@ config DEVFREQ_GOV_USERSPACE
>  
>  comment "DEVFREQ Drivers"
>  
> +config ARM_EXYNOS_BUS_DEVFREQ
> + bool "ARM EXYNOS Generic Memory Bus DEVFREQ Driver"
> + depends on ARCH_EXYNOS
> + select DEVFREQ_GOV_SIMPLE_ONDEMAND
> + select DEVFREQ_EVENT_EXYNOS_PPMU
> + select PM_DEVFREQ_EVENT
> + select PM_OPP
> + help
> +   This adds the common DEVFREQ driver for Exynos Memory bus. Exynos
> +   Memory bus has one more group of memory bus (e.g, MIF and INT block).
> +   Each memory bus group could contain many memoby bus block. It reads
> +   PPMU counters of memory controllers by using DEVFREQ-event device
> +   and adjusts the operating frequencies and voltages with OPP support.
> +   This does not yet operate with optimal voltages.
> +
>  config ARM_EXYNOS4_BUS_DEVFREQ
>   bool "ARM Exynos4210/4212/4412 Memory Bus DEVFREQ Driver"
>   depends on (CPU_EXYNOS4210 || SOC_EXYNOS4212 || SOC_EXYNOS4412) && 
> !ARCH_MULTIPLATFORM
> diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile
> index 5134f9ee983d..375ebbb4fcfb 100644
> --- a/drivers/devfreq/Makefile
> +++ b/drivers/devfreq/Makefile
> @@ -6,6 +6,7 @@ obj-$(CONFIG_DEVFREQ_GOV_POWERSAVE)   += governor_powersave.o
>  obj-$(CONFIG_DEVFREQ_GOV_USERSPACE)  += governor_userspace.o
>  
>  # DEVFREQ Drivers
> +obj-$(CONFIG_ARCH_EXYNOS)+= exynos/
>  obj-$(CONFIG_ARM_EXYNOS4_BUS_DEVFREQ)+= exynos/
>  obj-$(CONFIG_ARM_EXYNOS5_BUS_DEVFREQ)+= exynos/
>  obj-$(CONFIG_ARM_TEGRA_DEVFREQ)  += tegra-devfreq.o
> diff --git a/drivers/devfreq/exynos/Makefile b/drivers/devfreq/exynos/Makefile
> index 49bc9175f923..4ec06d322996 100644
> --- a/drivers/devfreq/exynos/Makefile
> +++ b/drivers/devfreq/exynos/Makefile
> @@ -1,3 +1,4 @@
>  # Exynos DEVFREQ Drivers
> +obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ) += exynos-bus.o
>  obj-$(CONFIG_ARM_EXYNOS4_BUS_DEVFREQ)+= exynos_ppmu.o exynos4_bus.o
>  obj-$(CONFIG_ARM_EXYNOS5_BUS_DEVFREQ)+= exynos_ppmu.o exynos5_bus.o
> diff --git a/drivers/devfreq/exynos/exynos-bus.c 
> b/drivers/devfreq/exynos/exynos-bus.c
> new file mode 100644
> index ..f1bc20839650
> --- /dev/null
> +++ b/drivers/devfreq/exynos/exynos-bus.c
> @@ -0,0 +1,449 @@
> +/*
> + * Generic Exynos Bus frequency driver with DEVFREQ Framework
> + *
> + * Copyright (c) 2015 Samsung Electronics Co., Ltd.
> + * Author : Chanwoo Choi 
> + *
> + * This driver support Exynos Bus frequency feature by using
> + * DEVFREQ framework and is based on drivers/devfreq/exynos/exynos4_bus.c.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define DEFAULT_SATURATION_RATIO 40
> +
> +struct exynos_bus {
> + struct device *dev;
> +
> + struct devfreq *devfreq;
> + struct devfreq_event_dev **edev;
> + unsigned int edev_count;
> + struct mutex lock;
> +
> + struct dev_pm_opp *curr_opp;
> +
> + struct regulator *regulator;
> + struct clk *clk;
> + int ratio;
> +};
> +
> +/*
> + * Control the devfreq-event device to get the current state of bus
> + */
> +#define exynos_bus_ops_edev(ops) \
> +static int exynos_bus_##ops(struct exynos_bus *bus)  \
> +{\
> + int i, ret;  

Re: [PATCH v4 7/8] ARM: dts: Exynos5422: fix OPP tables

[Bartlomiej Zolnierkiewicz]

Hi,

On Tuesday, December 08, 2015 05:13:26 PM Krzysztof Kozlowski wrote:
> On 08.12.2015 03:18, Bartlomiej Zolnierkiewicz wrote:
> > From: Ben Gamari 
> > 
> > The Exynos 5422 is identical to the 5800 except for the fact that it
> > boots from the A7 cores. Consequently, the core numbering is different:
> > cores 0-3 are A7s whereas 4-7 are A15s.
> > 
> > We can reuse the device tree of the 5800 for the 5422 but we must take
> > care to override the OPP tables and CPU clocks.  These are otherwise
> > inherited from the exynos5800 devicetree, which has the CPU clusters
> > reversed compared to the 5422. This results in the A15 cores only
> > reaching 1.4GHz, the maximum rate of the KFC clock.
> > 
> > Cc: Javier Martinez Canillas 
> > Signed-off-by: Ben Gamari 
> > Signed-off-by: Bartlomiej Zolnierkiewicz 
> > ---
> >  arch/arm/boot/dts/exynos5422-cpus.dtsi | 10 ++
> >  1 file changed, 10 insertions(+)
> > 
> 
> This looks like a very-non-atomic way of handling a change. You added
> opp tables to exynos5420 before so at that time they will be applied to
> Odroid XU3 family which uses different CPU order. After that you are
> fixing the tables to proper CPU order. Direct bisectability probably
> won't be an issue because all of DTS would go to separate branch... but
> the logic behind confuses.

It was done this way to preserve original authorship of changes and
bisectability should not be affected unless patch #8 is merged before
patch #7.

> I think this should be squashed into 3/8.

OK.

> Best regards,
> Krzysztof

Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R Institute Poland
Samsung Electronics

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