Re: [PATCH v2 1/3] rtc: s5m: Cleanup by removing useless 'rtc' prefix from fields

2016-01-04 Thread Alexandre Belloni
On 05/01/2016 at 09:04:39 +0900, Krzysztof Kozlowski wrote :
> > 
> > Probably that's my fault because I rebased it on linux-next. I will
> > rebase the patches on rtc-next and resend.
> 
> Ah, no need for rebasing. I forgot about dependency - the support for
> S2MPS15 was added recently through Lee Jones' tree. Fortunately Lee put
> S2MPS15 patches in a separate branch and tag: "ib-mfd-regulator-rtc-4.5"
> 
> This means that to apply the patches this is needed first:
> https://git.kernel.org/cgit/linux/kernel/git/lee/mfd.git/log/?h=ib-mfd-regulator-rtc-4.5
> 

Ah, true, that's what I forgot, thanks.


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Re: [PATCH v2 1/3] rtc: s5m: Cleanup by removing useless 'rtc' prefix from fields

2016-01-04 Thread Alexandre Belloni
; 0) {
>   dev_err(info->dev, "%s: fail to read update reg(%d)\n",
>   __func__, ret);
>   return ret;
>   }
>  
> - data |= info->regs->rtc_udr_mask;
> + data |= info->regs->udr_mask;
>   switch (info->device_type) {
>   case S5M8763X:
>   case S5M8767X:
> @@ -268,7 +266,7 @@ static inline int s5m8767_rtc_set_alarm_reg(struct 
> s5m_rtc_info *info)
>   break;
>   case S2MPS15X:
>   /* As per UM, for write alarm, set A_UDR(bit[4]) to high
> -  * rtc_udr_mask above sets bit[4]
> +  * udr_mask above sets bit[4]
>*/
>   break;
>   case S2MPS14X:
> @@ -281,7 +279,7 @@ static inline int s5m8767_rtc_set_alarm_reg(struct 
> s5m_rtc_info *info)
>   return -EINVAL;
>   }
>  
> - ret = regmap_write(info->regmap, info->regs->rtc_udr_update, data);
> + ret = regmap_write(info->regmap, info->regs->udr_update, data);
>   if (ret < 0) {
>   dev_err(info->dev, "%s: fail to write update reg(%d)\n",
>   __func__, ret);
> @@ -292,7 +290,7 @@ static inline int s5m8767_rtc_set_alarm_reg(struct 
> s5m_rtc_info *info)
>  
>   /* On S2MPS13 the AUDR is not auto-cleared */
>   if (info->device_type == S2MPS13X)
> - regmap_update_bits(info->regmap, info->regs->rtc_udr_update,
> +     regmap_update_bits(info->regmap, info->regs->udr_update,
>  S2MPS13_RTC_AUDR_MASK, 0);
>  
>   return ret;
> @@ -339,7 +337,7 @@ static int s5m_rtc_read_time(struct device *dev, struct 
> rtc_time *tm)
>   if (info->device_type == S2MPS15X || info->device_type == S2MPS14X ||
>   info->device_type == S2MPS13X) {
>   ret = regmap_update_bits(info->regmap,
> - info->regs->rtc_udr_update,
> + info->regs->udr_update,
>   S2MPS_RTC_RUDR_MASK, S2MPS_RTC_RUDR_MASK);
>   if (ret) {
>   dev_err(dev,
> -- 
> 1.9.1
> 

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Re: [PATCH v5 4/4] drivers/rtc/rtc-s5m.c: add support for S2MPS15 RTC

2015-11-02 Thread Alexandre Belloni
On 02/11/2015 at 09:03:59 +, Lee Jones wrote :
> > > I think you cannot apply it directly because it depends on headers from
> > > patch 2/4. It won't build.
> > > 
> > 
> > Yeah, this depends on the mfd tree. I don't thin Lee applied patch 2/4
> > yet so I'm taking that one for 4.5.
> 
> I don't mind if you take it, but if you do so you need to take the
> Regulator patch as well AND provide Mark and I a pull-request from an
> immutable branch please. 
> 

Actually, I was thinking that you would take 2/4 through your tree and I
would either base myself on that or delay the patch for 4.5. You could
also take the rtc patch if you plan to apply 2/4, feel free to add my
acked-by.

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Re: [PATCH v5 4/4] drivers/rtc/rtc-s5m.c: add support for S2MPS15 RTC

2015-11-01 Thread Alexandre Belloni
On 30/10/2015 at 11:55:34 +0530, Alim Akhtar wrote :
> RTC found in s2mps15 is almost same as one found on s2mps13
> with few differences in RTC_UPDATE register fields, like:
> 1> Bit[4] and Bit[1] are reversed
>- On s2mps13
>   WUDR -> bit[4], AUDR -> bit[1]
>- On s2mps15
> WUDR -> bit[1], AUDR -> bit[4]
> 2> In case of s2mps13, for alarm register, need to set both
>WDUR and ADUR high, whereas for s2mps15 only set AUDR to high.
> 3> On s2mps15, WUDR, RUDR and AUDR functions should never be used
>at the same time.
> 
> This patch add required changes to enable s2mps15 rtc timer.
> 
> Cc: Alexandre Belloni <alexandre.bell...@free-electrons.com>
> Signed-off-by: Alim Akhtar <alim.akh...@samsung.com>
> ---
>  drivers/rtc/rtc-s5m.c   |   37 +
>  include/linux/mfd/samsung/rtc.h |2 ++
>  2 files changed, 35 insertions(+), 4 deletions(-)
> 
Applied after fixing the small alignment issue, thanks.

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Re: [PATCH v5 4/4] drivers/rtc/rtc-s5m.c: add support for S2MPS15 RTC

2015-11-01 Thread Alexandre Belloni
On 02/11/2015 at 08:46:21 +0900, Krzysztof Kozlowski wrote :
> On 02.11.2015 02:40, Alexandre Belloni wrote:
> > On 30/10/2015 at 11:55:34 +0530, Alim Akhtar wrote :
> >> RTC found in s2mps15 is almost same as one found on s2mps13
> >> with few differences in RTC_UPDATE register fields, like:
> >> 1> Bit[4] and Bit[1] are reversed
> >>- On s2mps13
> >>   WUDR -> bit[4], AUDR -> bit[1]
> >>- On s2mps15
> >>  WUDR -> bit[1], AUDR -> bit[4]
> >> 2> In case of s2mps13, for alarm register, need to set both
> >>WDUR and ADUR high, whereas for s2mps15 only set AUDR to high.
> >> 3> On s2mps15, WUDR, RUDR and AUDR functions should never be used
> >>at the same time.
> >>
> >> This patch add required changes to enable s2mps15 rtc timer.
> >>
> >> Cc: Alexandre Belloni <alexandre.bell...@free-electrons.com>
> >> Signed-off-by: Alim Akhtar <alim.akh...@samsung.com>
> >> ---
> >>  drivers/rtc/rtc-s5m.c   |   37 
> >> +
> >>  include/linux/mfd/samsung/rtc.h |2 ++
> >>  2 files changed, 35 insertions(+), 4 deletions(-)
> >>
> > Applied after fixing the small alignment issue, thanks.
> > 
> 
> I think you cannot apply it directly because it depends on headers from
> patch 2/4. It won't build.
> 

Yeah, this depends on the mfd tree. I don't thin Lee applied patch 2/4
yet so I'm taking that one for 4.5.

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Re: [rtc-linux] Re: [PATCH v3 5/5] drivers/rtc/rtc-s5m.c: add support for S2MPS15 RTC

2015-10-28 Thread Alexandre Belloni
On 28/10/2015 at 22:31:48 +0900, Krzysztof Kozlowski wrote :
> > So you don't care about DT backward compatibility because when a
> > workaround will be needed for one of the IPs, then you will have to
> > update the old dtb to use it.
> 
> Nope, DTB does not contain the name for RTC driver (s2mps15-rtc). It
> will be exactly the same.
> 

Sure, I see it now. So no change is needed in the rtc driver until you
need to use that particular bit that is different.

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Pending rtc-s3c patches

2015-10-28 Thread Alexandre Belloni
Hi,

There are three pending patches (from 2010 and 2011) for rtc-s3c. I'd
like to get an update and either drop or apply those.

Can someone take a few minutes to review them?

The patches are:
http://patchwork.ozlabs.org/patch/71318/
http://patchwork.ozlabs.org/patch/99857/
http://patchwork.ozlabs.org/patch/101732/

I'm not sure about 71318 but I guess I can take 99857 and 101732.

Thanks,

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Re: [rtc-linux] Re: [PATCH v3 5/5] drivers/rtc/rtc-s5m.c: add support for S2MPS15 RTC

2015-10-28 Thread Alexandre Belloni
On 28/10/2015 at 12:31:43 +0900, Krzysztof Kozlowski wrote :
> The s2mps13 clock driver added new name and compatible... which was
> probably totally unneeded (I missed that during review). We don't have
> to make this as a rule...
> 
> Since we do not have any data about future workarounds and the
> differences then just follow Ockham's razor - use the same name and
> compatible.
> 

So you don't care about DT backward compatibility because when a
workaround will be needed for one of the IPs, then you will have to
update the old dtb to use it.

Unless you are sure that the IP is the same, doing

{ "s2mps15-rtc",S2MPS14X },

is probably the best way to handle that. Note that I personally don't
care about the DT ABI, I'm just pointing out what may happen ;)

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Re: [rtc-linux] [PATCH v3 5/5] drivers/rtc/rtc-s5m.c: add support for S2MPS15 RTC

2015-10-27 Thread Alexandre Belloni
On 26/10/2015 at 18:21:22 +0530, Alim Akhtar wrote :
> RTC found in s2mps15 is almost same as one found in s2mps14.
> This patch add required changes to enable s2mps15 rtc timer.
> 
> Signed-off-by: Alim Akhtar <alim.akh...@samsung.com>

One really small nitpick below else you can add my
Acked-by: Alexandre Belloni <alexandre.bell...@free-electrons.com>

> ---
>  drivers/rtc/rtc-s5m.c |   14 +-
>  1 file changed, 13 insertions(+), 1 deletion(-)
> 
> @@ -317,7 +319,8 @@ static int s5m_rtc_read_time(struct device *dev, struct 
> rtc_time *tm)
>   u8 data[info->regs->regs_count];
>   int ret;
>  
> - if (info->device_type == S2MPS14X || info->device_type == S2MPS13X) {
> + if (info->device_type == S2MPS14X || info->device_type == S2MPS15X ||
> + info->device_type == S2MPS13X) {

This line is not properly aligned.

>   ret = regmap_update_bits(info->regmap,
>   info->regs->rtc_udr_update,
>   S2MPS_RTC_RUDR_MASK, S2MPS_RTC_RUDR_MASK);

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Re: [PATCH] rtc: Fix module autoload for rtc-{ab8500,max8997,s5m} drivers

2015-08-31 Thread Alexandre Belloni
On 27/08/2015 at 12:34:32 +0200, Javier Martinez Canillas wrote :
> These platform drivers have a platform device ID table but the module
> alias information is not created so module autoloading will not work.
> 
> Signed-off-by: Javier Martinez Canillas <jav...@osg.samsung.com>
> 
> ---
> 
>  drivers/rtc/rtc-ab8500.c  | 1 +
>  drivers/rtc/rtc-max8997.c | 1 +
>  drivers/rtc/rtc-s5m.c | 1 +
>  3 files changed, 3 insertions(+)
Applied, thanks.

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Re: [PATCH v2] rtc: s5m: fix to update ctrl register

2015-08-24 Thread Alexandre Belloni
On 21/08/2015 at 18:43:41 +0900, Joonyoung Shim wrote :
 According to datasheet, the S2MPS13X and S2MPS14X should update write
 buffer via setting WUDR bit to high after ctrl register is written.
 
 If not, ALARM interrupt of rtc-s5m doesn't happen first time when i use
 tools/testing/selftests/timers/rtctest.c test program and hour format is
 used to 12 hour mode in Odroid-XU3 board.
 
 One more issue is the RTC doesn't keep time on Odroid-XU3 board when i
 turn on board after power off even if RTC battery is connected. It can
 be solved as setting WUDR  RUDR bits to high at the same time after
 RTC_CTRL register is written. It's same with condition of only writing
 ALARM registers, so this is for only S2MPS14 and we should set WUDR 
 A_UDR bits to high on S2MPS13.
 
 I can't find any reasonable description about this like fix from
 datasheet, but can find similar codes from rtc driver source of
 hardkernel kernel and vender kernel.
 
 Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
 Cc: sta...@vger.kernel.org # v3.16
 ---
 Changelog for v2:
 - update commit description and code to fix time keeping problem
 - update the stable tag with the kernel version
 
  drivers/rtc/rtc-s5m.c | 10 ++
  1 file changed, 10 insertions(+)
 
Applied, thanks. I fixed the small typo.

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Re: [PATCH v2] rtc: s3c: fix disabled clocks for alarm

2015-08-20 Thread Alexandre Belloni
On 12/08/2015 at 19:21:46 +0900, Joonyoung Shim wrote :
 The clock enable/disable codes for alarm have been removed from
 commit 24e1455493da (drivers/rtc/rtc-s3c.c: delete duplicate clock
 control) and the clocks are disabled even if alarm is set, so alarm
 interrupt can't happen.
 
 The s3c_rtc_setaie function can be called several times with 'enabled'
 argument having same value, so it needs to check whether clocks are
 enabled or not.
 
 Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
 Cc: sta...@vger.kernel.org # v4.1
 ---
 This is v2 of prior patch [PATCH 4/4] rtc: s3c: enable/disable clocks
 for alarm.
 
 Changelog for v2:
 - commit messages is modified by Krzysztof suggestion
 - make to backportable patch
 - add Cc-stable
 
  drivers/rtc/rtc-s3c.c | 24 ++--
  1 file changed, 18 insertions(+), 6 deletions(-)
 

Applied, thanks.

However, ...

 @@ -39,6 +39,7 @@ struct s3c_rtc {
   void __iomem *base;
   struct clk *rtc_clk;
   struct clk *rtc_src_clk;
 + bool clk_disabled;
  

This is quite unusual and I would say the principle of least
astonishment would require using clk_enabled and explicitly set it to
true in the probe. I don't expect a lot of changes regarding the clocks
in the probe so this is probably OK but doing so will require extra
carefulness.

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Re: [PATCH 2/4] rtc: s3c: remove unnecessary NULL assignment

2015-08-20 Thread Alexandre Belloni
On 11/08/2015 at 20:28:20 +0900, Joonyoung Shim wrote :
 It's unnecessary the code that assigns info-rtc_clk to NULL in
 s3c_rtc_remove.
 
 Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
 ---
  drivers/rtc/rtc-s3c.c | 1 -
  1 file changed, 1 deletion(-)
 
Applied, thanks.

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Re: [PATCH 1/4] rtc: s3c: add missing clk control

2015-08-20 Thread Alexandre Belloni
On 11/08/2015 at 20:28:19 +0900, Joonyoung Shim wrote :
 It's missed to call clk_unprepare() about info-rtc_src_clk in
 s3c_rtc_remove and to call clk_disable_unprepare about info-rtc_clk in
 error routine of s3c_rtc_probe.
 
 Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
 ---
  drivers/rtc/rtc-s3c.c | 3 +++
  1 file changed, 3 insertions(+)
 
Applied, thanks.

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Re: [PATCH] rtc: s5m: fix to update ctrl register

2015-08-20 Thread Alexandre Belloni
Hi,

On 13/08/2015 at 17:49:24 +0900, Joonyoung Shim wrote :
 According to datasheet, the S2MPS13X and S2MPS14X should update write
 buffer via setting WUDR bit to high after ctrl register is updated.
 
 If not, ALARM interrupt of rtc-s5m doesn't happen first time when i use
 tools/testing/selftests/timers/rtctest.c test program and hour format is
 used to 12 hour mode in Odroid-XU3 board.
 

From what I understood, I should expect a v2 of tihat patch also setting
RUDR, is that right? OR would you prefer that I apply that one and then
fix RUDR in a following patch?

 Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
 Cc: sta...@vger.kernel.org

can you update the stable tag with the kernel version introducing the
issue?

 ---
  drivers/rtc/rtc-s5m.c | 12 
  1 file changed, 12 insertions(+)

 diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c
 index 8c70d78..03828bb 100644
 --- a/drivers/rtc/rtc-s5m.c
 +++ b/drivers/rtc/rtc-s5m.c
 @@ -635,6 +635,18 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info 
 *info)
   case S2MPS13X:
   data[0] = (0  BCD_EN_SHIFT) | (1  MODEL24_SHIFT);
   ret = regmap_write(info-regmap, info-regs-ctrl, data[0]);
 + if (ret  0)
 + break;
 +
 + ret = regmap_update_bits(info-regmap,
 + info-regs-rtc_udr_update,
 + info-regs-rtc_udr_mask,
 + info-regs-rtc_udr_mask);

Very small indentation issue here, it should be aligned with the open
parenthesis.


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Re: [PATCH 2/2] ARM: dts: s3c-rtc: Use s3c6410-rtc instead of exynos3250-rtc

2015-03-31 Thread Alexandre Belloni
On 31/03/2015 at 09:47:15 +0900, Chanwoo Choi wrote :
  Are you absolutely sure that the exynos3250 IP is the same as the
  s3c6410 (I don't know much about the exynos family). The concern being
  that if at one point you have an errata on one or ther other, you will
  have to break the DT ABI by undoing this change.
  
  Note that I'm fine with it, I'm just asking.
 
 I'm sure about exynos3250 RTC is same with S3C6410 RTC.
 There was little different about that pevious S3C6410 RTC
 don't consider to control the 'rtc_src' clk.
 
 
 But, Javier's patch[1] add the '.needs_src_clk' to control the
 'rtc_src' clk. After merged this patch, there is no different part between
 Exynos3250 RTC and S3C6410 RTC.
 
 [1] 8792f7772f4f (drivers/rtc/rtc-s3c.c: add .needs_src_clk to s3c6410 RTC 
 data)
 

Yes, I saw that the software was handling both the same way, I was
asking about the hardware side.


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Re: [PATCH 1/2] drivers/rtc/rtc-s3c.c: Integrate Exynos3250 into S3C6410

2015-03-31 Thread Alexandre Belloni
Hi,

On 31/03/2015 at 08:49:39 +0200, Javier Martinez Canillas wrote :
 Hello Alexandre,
 
 On Tue, Mar 31, 2015 at 2:27 AM, Alexandre Belloni
 alexandre.bell...@free-electrons.com wrote:
  nitpick: I would prefer rtc: rtc-s3c instead of drivers/rtc/rtc-s3c.c
 
 
 Yes but Krzysztof is following the convention used in drivers/rtc/
 which I think is the correct thing to do even when it's different from
 what is used all over the kernel.
 

Having a look at the git history, the first and most used prefix is
actually 'rtc:' at some point, this started to change to 'drivers/rtc/'.
We should probably start to get back to 'rtc:', like most subsystems.


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Re: [PATCH 2/2] ARM: dts: s3c-rtc: Use s3c6410-rtc instead of exynos3250-rtc

2015-03-30 Thread Alexandre Belloni
Hi,

On 31/03/2015 at 08:38:30 +0900, Chanwoo Choi wrote :
  diff --git a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt 
  b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
  index ab757b84daa7..ac2fcd6ff4b8 100644
  --- a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
  +++ b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
  @@ -6,7 +6,8 @@ Required properties:
   * samsung,s3c2416-rtc - for controllers compatible with s3c2416 rtc.
   * samsung,s3c2443-rtc - for controllers compatible with s3c2443 rtc.
   * samsung,s3c6410-rtc - for controllers compatible with s3c6410 rtc.
  -* samsung,exynos3250-rtc - for controllers compatible with 
  exynos3250 rtc.
  +* samsung,exynos3250-rtc - (deprecated) for controllers compatible 
  with
  + exynos3250 rtc (use 
  samsung,s3c6410-rtc).
   - reg: physical base address of the controller and length of memory mapped
 region.
   - interrupts: Two interrupt numbers to the cpu should be specified. First
  diff --git a/arch/arm/boot/dts/exynos3250.dtsi 
  b/arch/arm/boot/dts/exynos3250.dtsi
  index e3bfb11c6ef8..8d58b550e925 100644
  --- a/arch/arm/boot/dts/exynos3250.dtsi
  +++ b/arch/arm/boot/dts/exynos3250.dtsi
  @@ -189,7 +189,7 @@
  };
   
  rtc: rtc@1007 {
  -   compatible = samsung,exynos3250-rtc;
  +   compatible = samsung,s3c6410-rtc;
  reg = 0x1007 0x100;
  interrupts = 0 73 0, 0 74 0;
  interrupt-parent = pmu_system_controller;
  diff --git a/arch/arm/boot/dts/exynos4415.dtsi 
  b/arch/arm/boot/dts/exynos4415.dtsi
  index 5caea996e090..186cb8465683 100644
  --- a/arch/arm/boot/dts/exynos4415.dtsi
  +++ b/arch/arm/boot/dts/exynos4415.dtsi
  @@ -177,7 +177,7 @@
  };
   
  rtc: rtc@1007 {
  -   compatible = samsung,exynos3250-rtc;
  +   compatible = samsung,s3c6410-rtc;
  reg = 0x1007 0x100;
  interrupts = 0 73 0, 0 74 0;
  status = disabled;
  
 
 Looks good to me.
 
 Reviewed-by: Chanwoo Choi cw00.c...@samsung.com
 

Are you absolutely sure that the exynos3250 IP is the same as the
s3c6410 (I don't know much about the exynos family). The concern being
that if at one point you have an errata on one or ther other, you will
have to break the DT ABI by undoing this change.

Note that I'm fine with it, I'm just asking.

Regards,

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Re: [PATCH 1/2] drivers/rtc/rtc-s3c.c: Integrate Exynos3250 into S3C6410

2015-03-30 Thread Alexandre Belloni
nitpick: I would prefer rtc: rtc-s3c instead of drivers/rtc/rtc-s3c.c

On 30/03/2015 at 17:19:32 +0200, Krzysztof Kozlowski wrote :
 There are now no differences between RTC on Exynos3250 and S3C6410.
 Merge everything into one so duplicated code could be removed.
 
 Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com

Acked-by: Alexandre Belloni alexandre.bell...@free-electrons.com

 ---
  drivers/rtc/rtc-s3c.c | 14 +-
  1 file changed, 1 insertion(+), 13 deletions(-)
 
 diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
 index fb0c569765c6..5e162eaad277 100644
 --- a/drivers/rtc/rtc-s3c.c
 +++ b/drivers/rtc/rtc-s3c.c
 @@ -774,18 +774,6 @@ static struct s3c_rtc_data const s3c6410_rtc_data = {
   .disable= s3c6410_rtc_disable,
  };
  
 -static struct s3c_rtc_data const exynos3250_rtc_data = {
 - .max_user_freq  = 32768,
 - .needs_src_clk  = true,
 - .irq_handler= s3c6410_rtc_irq,
 - .set_freq   = s3c6410_rtc_setfreq,
 - .enable_tick= s3c6410_rtc_enable_tick,
 - .save_tick_cnt  = s3c6410_rtc_save_tick_cnt,
 - .restore_tick_cnt   = s3c6410_rtc_restore_tick_cnt,
 - .enable = s3c24xx_rtc_enable,
 - .disable= s3c6410_rtc_disable,
 -};
 -
  static const struct of_device_id s3c_rtc_dt_match[] = {
   {
   .compatible = samsung,s3c2410-rtc,
 @@ -801,7 +789,7 @@ static const struct of_device_id s3c_rtc_dt_match[] = {
   .data = (void *)s3c6410_rtc_data,
   }, {
   .compatible = samsung,exynos3250-rtc,
 - .data = (void *)exynos3250_rtc_data,
 + .data = (void *)s3c6410_rtc_data,
   },
   { /* sentinel */ },
  };
 -- 
 1.9.1
 

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Re: [PATCH v5 0/7] Enable L2 cache support on Exynos4210/4x12 SoCs

2015-01-14 Thread Alexandre Belloni
 deletions(-)
 
 -- 
 1.9.2
 
 
 ___
 linux-arm-kernel mailing list
 linux-arm-ker...@lists.infradead.org
 http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

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Re: [PATCH v5 0/7] Enable L2 cache support on Exynos4210/4x12 SoCs

2015-01-14 Thread Alexandre Belloni
Hi,

On 14/01/2015 at 16:21:50 +, Russell King - ARM Linux wrote :
 On Wed, Jan 14, 2015 at 04:46:03PM +0100, Alexandre Belloni wrote:
  Hi,
  
  This patch set hasn't moved since while. We actually need patch 4 to
  properly configure prefetch on sama5d4. What would be needed to come to
  an agreement ?
 
 What do you mean hasn't moved since a while - there has been movement.
 It was discovered that it breaks OMAP4 platforms.
 
 Since then, work has been done to resolve that breakage, and I've merged
 the recent patch set into my tree for further regression testing, and
 I'm going to push it out to linux-next later this week.
 

Indeed, my searching skills are not great. I was actually looking for
mails from Tomasz but he is not taking care of it now...

Thanks for the info!

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Re: [PATCH v4 4/7] ARM: l2c: Add support for overriding prefetch settings

2014-09-19 Thread Alexandre Belloni
On 26/08/2014 at 16:17:57 +0200, Tomasz Figa wrote :
 Firmware on certain boards (e.g. ODROID-U3) can leave incorrect L2C prefetch
 settings configured in registers leading to crashes if L2C is enabled
 without overriding them. This patch introduces bindings to enable
 prefetch settings to be specified from DT and necessary support in the
 driver.
 
 Signed-off-by: Tomasz Figa t.f...@samsung.com

Tested-by: Alexandre Belloni alexandre.bell...@free-electrons.com

It is working and useful on Atmel's sama5d4 were the bootloader is not
configuring the L2C prefetch. However, I'm wondering whether we should
add support for setting L310_PREFETCH_CTRL_DATA_PREFETCH and
L310_PREFETCH_CTRL_INSTR_PREFETCH. I'm currently doing it by using
.l2c_aux_val= L310_AUX_CTRL_DATA_PREFETCH |
L310_AUX_CTRL_INSTR_PREFETCH (those are the same bits) but this has the
disadvantage of displaying the L2C: platform modifies aux control
register: twice.

 + if (!of_property_read_u32(np, arm,prefetch-offset, val)) {
 + prefetch = ~L310_PREFETCH_CTRL_OFFSET_MASK;
 + prefetch |= val  L310_PREFETCH_CTRL_OFFSET_MASK;
 + }
 +

While you use val directly here, later, while printing the offset, val +
1 is used. Maybe it would be better to have the same number in both
places, else you end up with having arm,prefetch-offset = 1 in your
DT and the kernel printing L2C-310 ID prefetch enabled, offset 2
lines.



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Re: [PATCH v4 4/7] ARM: l2c: Add support for overriding prefetch settings

2014-09-19 Thread Alexandre Belloni
On 19/09/2014 at 17:39:32 +0100, Russell King - ARM Linux wrote :
 On Fri, Sep 19, 2014 at 11:50:01AM +0200, Alexandre Belloni wrote:
  On 26/08/2014 at 16:17:57 +0200, Tomasz Figa wrote :
   Firmware on certain boards (e.g. ODROID-U3) can leave incorrect L2C 
   prefetch
   settings configured in registers leading to crashes if L2C is enabled
   without overriding them. This patch introduces bindings to enable
   prefetch settings to be specified from DT and necessary support in the
   driver.
   
   Signed-off-by: Tomasz Figa t.f...@samsung.com
  
  Tested-by: Alexandre Belloni alexandre.bell...@free-electrons.com
  
  It is working and useful on Atmel's sama5d4 were the bootloader is not
  configuring the L2C prefetch. However, I'm wondering whether we should
  add support for setting L310_PREFETCH_CTRL_DATA_PREFETCH and
  L310_PREFETCH_CTRL_INSTR_PREFETCH. I'm currently doing it by using
  .l2c_aux_val= L310_AUX_CTRL_DATA_PREFETCH |
  L310_AUX_CTRL_INSTR_PREFETCH (those are the same bits) but this has the
  disadvantage of displaying the L2C: platform modifies aux control
  register: twice.
 
 The L2C documentation, freely available from the ARM infocentre website,
 has the answer to this for you.
 
 The two bits in the prefetch control register which control the data
 and instruction prefetching are aliases of the aux control register.
 If you set them to a value in one register, they are reflected in the
 other.
 
 The reason for that is that once the L2 cache is enabled, writes to
 the aux control register are no longer permitted, but it's safe to
 enable and disable the prefetching with the cache already enabled.
 This reason is even stated in the documentation.
 

Yeah, so my question still holds, should we have an other way to
enable/disable I/D prefetch by adding two other DT bindings ?


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