Re: [PATCH v2 1/3] iio: exyno-adc: use syscon for PMU register access

2014-11-05 Thread Jonathan Cameron
On 28/10/14 12:31, Vivek Gautam wrote:
 Hi all,
 
 
 CC'ing Naveen's gmail id, since the Samsung id is invalid now.
 
 
 On Tue, Sep 16, 2014 at 2:28 PM, Naveen Krishna Chatradhi
 ch.nav...@samsung.com wrote:
 This patch updates the IIO based ADC driver to use syscon and regmap
 APIs to access and use PMU registers instead of remapping the PMU
 registers in the driver.

 Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
 To: linux-...@vger.kernel.org
 ---
 Changes since v1:
 Rebased on top of togreg branch of IIO git
 
 If the changes look good, then first two patches of this series can be
 picked up ?
 The last dt patch then belongs to samsung tree.
Given the interlinked nature of the patches and Kukjin Kim's ack I'll
take the lot. Obviously if someone wants to pull the 3rd patch into
Samsung's tree as well, then git will deal with it just fine at merge
time!

Thanks,

Jonathan
 

  drivers/iio/adc/exynos_adc.c |   30 +-
  1 file changed, 21 insertions(+), 9 deletions(-)

 diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
 index 43620fd..fe03177 100644
 --- a/drivers/iio/adc/exynos_adc.c
 +++ b/drivers/iio/adc/exynos_adc.c
 @@ -39,6 +39,8 @@
  #include linux/iio/iio.h
  #include linux/iio/machine.h
  #include linux/iio/driver.h
 +#include linux/mfd/syscon.h
 +#include linux/regmap.h

  /* S3C/EXYNOS4412/5250 ADC_V1 registers definitions */
  #define ADC_V1_CON(x)  ((x) + 0x00)
 @@ -90,11 +92,14 @@

  #define EXYNOS_ADC_TIMEOUT (msecs_to_jiffies(100))

 +#define EXYNOS_ADCV1_PHY_OFFSET0x0718
 +#define EXYNOS_ADCV2_PHY_OFFSET0x0720
 +
  struct exynos_adc {
 struct exynos_adc_data  *data;
 struct device   *dev;
 void __iomem*regs;
 -   void __iomem*enable_reg;
 +   struct regmap   *pmu_map;
 struct clk  *clk;
 struct clk  *sclk;
 unsigned intirq;
 @@ -110,6 +115,7 @@ struct exynos_adc_data {
 int num_channels;
 bool needs_sclk;
 bool needs_adc_phy;
 +   int phy_offset;
 u32 mask;

 void (*init_hw)(struct exynos_adc *info);
 @@ -183,7 +189,7 @@ static void exynos_adc_v1_init_hw(struct exynos_adc 
 *info)
 u32 con1;

 if (info-data-needs_adc_phy)
 -   writel(1, info-enable_reg);
 +   regmap_write(info-pmu_map, info-data-phy_offset, 1);

 /* set default prescaler values and Enable prescaler */
 con1 =  ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN;
 @@ -198,7 +204,7 @@ static void exynos_adc_v1_exit_hw(struct exynos_adc 
 *info)
 u32 con;

 if (info-data-needs_adc_phy)
 -   writel(0, info-enable_reg);
 +   regmap_write(info-pmu_map, info-data-phy_offset, 0);

 con = readl(ADC_V1_CON(info-regs));
 con |= ADC_V1_CON_STANDBY;
 @@ -225,6 +231,7 @@ static const struct exynos_adc_data exynos_adc_v1_data = 
 {
 .num_channels   = MAX_ADC_V1_CHANNELS,
 .mask   = ADC_DATX_MASK,/* 12 bit ADC resolution */
 .needs_adc_phy  = true,
 +   .phy_offset = EXYNOS_ADCV1_PHY_OFFSET,

 .init_hw= exynos_adc_v1_init_hw,
 .exit_hw= exynos_adc_v1_exit_hw,
 @@ -314,7 +321,7 @@ static void exynos_adc_v2_init_hw(struct exynos_adc 
 *info)
 u32 con1, con2;

 if (info-data-needs_adc_phy)
 -   writel(1, info-enable_reg);
 +   regmap_write(info-pmu_map, info-data-phy_offset, 1);

 con1 = ADC_V2_CON1_SOFT_RESET;
 writel(con1, ADC_V2_CON1(info-regs));
 @@ -332,7 +339,7 @@ static void exynos_adc_v2_exit_hw(struct exynos_adc 
 *info)
 u32 con;

 if (info-data-needs_adc_phy)
 -   writel(0, info-enable_reg);
 +   regmap_write(info-pmu_map, info-data-phy_offset, 0);

 con = readl(ADC_V2_CON1(info-regs));
 con = ~ADC_CON_EN_START;
 @@ -362,6 +369,7 @@ static const struct exynos_adc_data exynos_adc_v2_data = 
 {
 .num_channels   = MAX_ADC_V2_CHANNELS,
 .mask   = ADC_DATX_MASK, /* 12 bit ADC resolution */
 .needs_adc_phy  = true,
 +   .phy_offset = EXYNOS_ADCV2_PHY_OFFSET,

 .init_hw= exynos_adc_v2_init_hw,
 .exit_hw= exynos_adc_v2_exit_hw,
 @@ -374,6 +382,7 @@ static const struct exynos_adc_data exynos3250_adc_data 
 = {
 .mask   = ADC_DATX_MASK, /* 12 bit ADC resolution */
 .needs_sclk = true,
 .needs_adc_phy  = true,
 +   .phy_offset = EXYNOS_ADCV1_PHY_OFFSET,

 .init_hw= exynos_adc_v2_init_hw,
 .exit_hw= exynos_adc_v2_exit_hw,
 @@ -558,10 +567,13 @@ static int exynos_adc_probe(struct platform_device 
 *pdev)


 if (info-data-needs_adc_phy) {
 -   mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 -   

Re: [PATCH v2 1/3] iio: exyno-adc: use syscon for PMU register access

2014-11-05 Thread Jonathan Cameron
On 16/09/14 09:58, Naveen Krishna Chatradhi wrote:
 This patch updates the IIO based ADC driver to use syscon and regmap
 APIs to access and use PMU registers instead of remapping the PMU
 registers in the driver.
 
 Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
 To: linux-...@vger.kernel.org
Applied to the togreg branch of iio.git - initially pushed out as testing
for the autobuilders to play.


 ---
 Changes since v1:
 Rebased on top of togreg branch of IIO git
 
  drivers/iio/adc/exynos_adc.c |   30 +-
  1 file changed, 21 insertions(+), 9 deletions(-)
 
 diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
 index 43620fd..fe03177 100644
 --- a/drivers/iio/adc/exynos_adc.c
 +++ b/drivers/iio/adc/exynos_adc.c
 @@ -39,6 +39,8 @@
  #include linux/iio/iio.h
  #include linux/iio/machine.h
  #include linux/iio/driver.h
 +#include linux/mfd/syscon.h
 +#include linux/regmap.h
  
  /* S3C/EXYNOS4412/5250 ADC_V1 registers definitions */
  #define ADC_V1_CON(x)((x) + 0x00)
 @@ -90,11 +92,14 @@
  
  #define EXYNOS_ADC_TIMEOUT   (msecs_to_jiffies(100))
  
 +#define EXYNOS_ADCV1_PHY_OFFSET  0x0718
 +#define EXYNOS_ADCV2_PHY_OFFSET  0x0720
 +
  struct exynos_adc {
   struct exynos_adc_data  *data;
   struct device   *dev;
   void __iomem*regs;
 - void __iomem*enable_reg;
 + struct regmap   *pmu_map;
   struct clk  *clk;
   struct clk  *sclk;
   unsigned intirq;
 @@ -110,6 +115,7 @@ struct exynos_adc_data {
   int num_channels;
   bool needs_sclk;
   bool needs_adc_phy;
 + int phy_offset;
   u32 mask;
  
   void (*init_hw)(struct exynos_adc *info);
 @@ -183,7 +189,7 @@ static void exynos_adc_v1_init_hw(struct exynos_adc *info)
   u32 con1;
  
   if (info-data-needs_adc_phy)
 - writel(1, info-enable_reg);
 + regmap_write(info-pmu_map, info-data-phy_offset, 1);
  
   /* set default prescaler values and Enable prescaler */
   con1 =  ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN;
 @@ -198,7 +204,7 @@ static void exynos_adc_v1_exit_hw(struct exynos_adc *info)
   u32 con;
  
   if (info-data-needs_adc_phy)
 - writel(0, info-enable_reg);
 + regmap_write(info-pmu_map, info-data-phy_offset, 0);
  
   con = readl(ADC_V1_CON(info-regs));
   con |= ADC_V1_CON_STANDBY;
 @@ -225,6 +231,7 @@ static const struct exynos_adc_data exynos_adc_v1_data = {
   .num_channels   = MAX_ADC_V1_CHANNELS,
   .mask   = ADC_DATX_MASK,/* 12 bit ADC resolution */
   .needs_adc_phy  = true,
 + .phy_offset = EXYNOS_ADCV1_PHY_OFFSET,
  
   .init_hw= exynos_adc_v1_init_hw,
   .exit_hw= exynos_adc_v1_exit_hw,
 @@ -314,7 +321,7 @@ static void exynos_adc_v2_init_hw(struct exynos_adc *info)
   u32 con1, con2;
  
   if (info-data-needs_adc_phy)
 - writel(1, info-enable_reg);
 + regmap_write(info-pmu_map, info-data-phy_offset, 1);
  
   con1 = ADC_V2_CON1_SOFT_RESET;
   writel(con1, ADC_V2_CON1(info-regs));
 @@ -332,7 +339,7 @@ static void exynos_adc_v2_exit_hw(struct exynos_adc *info)
   u32 con;
  
   if (info-data-needs_adc_phy)
 - writel(0, info-enable_reg);
 + regmap_write(info-pmu_map, info-data-phy_offset, 0);
  
   con = readl(ADC_V2_CON1(info-regs));
   con = ~ADC_CON_EN_START;
 @@ -362,6 +369,7 @@ static const struct exynos_adc_data exynos_adc_v2_data = {
   .num_channels   = MAX_ADC_V2_CHANNELS,
   .mask   = ADC_DATX_MASK, /* 12 bit ADC resolution */
   .needs_adc_phy  = true,
 + .phy_offset = EXYNOS_ADCV2_PHY_OFFSET,
  
   .init_hw= exynos_adc_v2_init_hw,
   .exit_hw= exynos_adc_v2_exit_hw,
 @@ -374,6 +382,7 @@ static const struct exynos_adc_data exynos3250_adc_data = 
 {
   .mask   = ADC_DATX_MASK, /* 12 bit ADC resolution */
   .needs_sclk = true,
   .needs_adc_phy  = true,
 + .phy_offset = EXYNOS_ADCV1_PHY_OFFSET,
  
   .init_hw= exynos_adc_v2_init_hw,
   .exit_hw= exynos_adc_v2_exit_hw,
 @@ -558,10 +567,13 @@ static int exynos_adc_probe(struct platform_device 
 *pdev)
  
  
   if (info-data-needs_adc_phy) {
 - mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 - info-enable_reg = devm_ioremap_resource(pdev-dev, mem);
 - if (IS_ERR(info-enable_reg))
 - return PTR_ERR(info-enable_reg);
 + info-pmu_map = syscon_regmap_lookup_by_phandle(
 + pdev-dev.of_node,
 + samsung,syscon-phandle);
 + if (IS_ERR(info-pmu_map)) {
 + dev_err(pdev-dev, syscon regmap lookup failed.\n);
 + return PTR_ERR(info-pmu_map);
 + }
 

Re: [PATCH v2 2/3] Documentation: dt-bindings: update exynos-adc.txt with syscon handle

2014-11-05 Thread Jonathan Cameron
On 16/09/14 09:58, Naveen Krishna Chatradhi wrote:
 This patch updates the DT bindings for ADC in exynos-adc.txt with the
 syscon phandle to the ADC nodes.
 
 Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
 To: devicet...@vger.kernel.org
Applied to the togreg branch of iio.git - initially pushed out as testing.

Thanks,
 ---
  .../devicetree/bindings/arm/samsung/exynos-adc.txt |9 +++--
  1 file changed, 7 insertions(+), 2 deletions(-)
 
 diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt 
 b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
 index 709efaa..c368210 100644
 --- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
 +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
 @@ -43,13 +43,16 @@ Required properties:
  compatible ADC block)
  - vdd-supply VDD input supply.
  
 +- samsung,syscon-phandle Contains the PMU system controller node
 + (To access the ADC_PHY register on 
 Exynos5250/5420/5800/3250)
 +
  Note: child nodes can be added for auto probing from device tree.
  
  Example: adding device info in dtsi file
  
  adc: adc@12D1 {
   compatible = samsung,exynos-adc-v1;
 - reg = 0x12D1 0x100, 0x10040718 0x4;
 + reg = 0x12D1 0x100;
   interrupts = 0 106 0;
   #io-channel-cells = 1;
   io-channel-ranges;
 @@ -58,13 +61,14 @@ adc: adc@12D1 {
   clock-names = adc;
  
   vdd-supply = buck5_reg;
 + samsung,syscon-phandle = pmu_system_controller;
  };
  
  Example: adding device info in dtsi file for Exynos3250 with additional sclk
  
  adc: adc@126C {
   compatible = samsung,exynos3250-adc, samsung,exynos-adc-v2;
 - reg = 0x126C 0x100, 0x10020718 0x4;
 + reg = 0x126C 0x100;
   interrupts = 0 137 0;
   #io-channel-cells = 1;
   io-channel-ranges;
 @@ -73,6 +77,7 @@ adc: adc@126C {
   clock-names = adc, sclk;
  
   vdd-supply = buck5_reg;
 + samsung,syscon-phandle = pmu_system_controller;
  };
  
  Example: Adding child nodes in dts file
 
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Re: [PATCH v2 3/3] ARM: dts: exynos: Add sysreg phandle to ADC node

2014-11-05 Thread Jonathan Cameron
On 16/09/14 09:58, Naveen Krishna Chatradhi wrote:
 Instead of using the ADC_PHY register base address, use sysreg phandle
 in ADC node to control ADC_PHY configuration register.
 
 This patch adds syscon node for Exynos3250, Exynos4x12, Exynos5250,
 and Exynos5420, Exynos5800.
 
 Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
 To: linux-samsung-soc@vger.kernel.org
Applied to the togreg branch of iio.git - initially pushed out as testing.

As this is very closely tied with the driver changes I've applied it through
the IIO tree.  If it turns up in the samsung tree as well, we can let git
work it's magic to drop one of the copies!

Jonathan
 ---
  arch/arm/boot/dts/exynos3250.dtsi |3 ++-
  arch/arm/boot/dts/exynos4x12.dtsi |3 ++-
  arch/arm/boot/dts/exynos5250.dtsi |3 ++-
  arch/arm/boot/dts/exynos5420.dtsi |3 ++-
  4 files changed, 8 insertions(+), 4 deletions(-)
 
 diff --git a/arch/arm/boot/dts/exynos3250.dtsi 
 b/arch/arm/boot/dts/exynos3250.dtsi
 index 1d52de6..b997a4c 100644
 --- a/arch/arm/boot/dts/exynos3250.dtsi
 +++ b/arch/arm/boot/dts/exynos3250.dtsi
 @@ -272,12 +272,13 @@
   adc: adc@126C {
   compatible = samsung,exynos3250-adc,
samsung,exynos-adc-v2;
 - reg = 0x126C 0x100, 0x10020718 0x4;
 + reg = 0x126C 0x100;
   interrupts = 0 137 0;
   clock-names = adc, sclk;
   clocks = cmu CLK_TSADC, cmu CLK_SCLK_TSADC;
   #io-channel-cells = 1;
   io-channel-ranges;
 + samsung,syscon-phandle = pmu_system_controller;
   status = disabled;
   };
  
 diff --git a/arch/arm/boot/dts/exynos4x12.dtsi 
 b/arch/arm/boot/dts/exynos4x12.dtsi
 index 861bb91..9ee77d3 100644
 --- a/arch/arm/boot/dts/exynos4x12.dtsi
 +++ b/arch/arm/boot/dts/exynos4x12.dtsi
 @@ -108,13 +108,14 @@
  
   adc: adc@126C {
   compatible = samsung,exynos-adc-v1;
 - reg = 0x126C 0x100, 0x10020718 0x4;
 + reg = 0x126C 0x100;
   interrupt-parent = combiner;
   interrupts = 10 3;
   clocks = clock CLK_TSADC;
   clock-names = adc;
   #io-channel-cells = 1;
   io-channel-ranges;
 + samsung,syscon-phandle = pmu_system_controller;
   status = disabled;
   };
  
 diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
 b/arch/arm/boot/dts/exynos5250.dtsi
 index 492e1ef..108adc5 100644
 --- a/arch/arm/boot/dts/exynos5250.dtsi
 +++ b/arch/arm/boot/dts/exynos5250.dtsi
 @@ -765,12 +765,13 @@
  
   adc: adc@12D1 {
   compatible = samsung,exynos-adc-v1;
 - reg = 0x12D1 0x100, 0x10040718 0x4;
 + reg = 0x12D1 0x100;
   interrupts = 0 106 0;
   clocks = clock CLK_ADC;
   clock-names = adc;
   #io-channel-cells = 1;
   io-channel-ranges;
 + samsung,syscon-phandle = pmu_system_controller;
   status = disabled;
   };
  
 diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
 b/arch/arm/boot/dts/exynos5420.dtsi
 index bfe056d..5fd587a 100644
 --- a/arch/arm/boot/dts/exynos5420.dtsi
 +++ b/arch/arm/boot/dts/exynos5420.dtsi
 @@ -541,12 +541,13 @@
  
   adc: adc@12D1 {
   compatible = samsung,exynos-adc-v2;
 - reg = 0x12D1 0x100, 0x10040720 0x4;
 + reg = 0x12D1 0x100;
   interrupts = 0 106 0;
   clocks = clock CLK_TSADC;
   clock-names = adc;
   #io-channel-cells = 1;
   io-channel-ranges;
 + samsung,syscon-phandle = pmu_system_controller;
   status = disabled;
   };
  
 
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Re: [PATCH v2 0/3] iio: exynos-adc: use syscon instead of ioremap

2014-10-25 Thread Jonathan Cameron
On 09/10/14 21:05, Jonathan Cameron wrote:
 On 21/09/14 13:17, Jonathan Cameron wrote:
 On 16/09/14 09:58, Naveen Krishna Chatradhi wrote:
 Changes since v1:
 1. Rebased on top of togreg branch of IIO git.

 This patch set does the following
 1. Use the syscon and Regmap API instead of ioremappaing the
ADC_PHY register from PMU.
 2. Updates the Documentation in exynos-adc.txt with syscon phandle
for the ADC nodes.
 3. Updates the Dts files for Exynos3250, Exynos4x12, Exynos5250,
Exynos5420 with the syscon phandle.

 Tested on Exynos5420 based Peach PIT and Exynos5800 based Peach PI
 by verifying sysfs entries provided by HWMON based NTC thermistors.

 Tested-By for Exynos3250, Exynos4x12 would be appreciated.
 Would definitely be good!

 The main issue I have with this series is that it breaks backward
 compatibility with old device trees and newer kernels.

 Now I appreciate that sometimes there are reasons to do it but want this
 to have deeper consideration (and acks to show it) from the Exynos side
 of things and preferably from the device tree side of things as well.

 cc'd Kukjin Kim for the Exynos side of things as the listed Maintainer.

 Otherwise, the series looks fine to me.
 Kukjin? Sorry to pester, but this has been sat in my waiting queue for a
 while now.
This is still sitting here waiting for those acks from Exynos side of things.
I'm happy to let this sit indefinitely, but does seem a little silly.

 Naveen Krishna Chatradhi (3):
   iio: exyno-adc: use syscon for PMU register access
   Documentation: dt-bindings: update exynos-adc.txt with syscon handle
   ARM: dts: exynos: Add sysreg phandle to ADC node

  .../devicetree/bindings/arm/samsung/exynos-adc.txt |9 --
  arch/arm/boot/dts/exynos3250.dtsi  |3 +-
  arch/arm/boot/dts/exynos4x12.dtsi  |3 +-
  arch/arm/boot/dts/exynos5250.dtsi  |3 +-
  arch/arm/boot/dts/exynos5420.dtsi  |3 +-
  drivers/iio/adc/exynos_adc.c   |   30 
 ++--
  6 files changed, 36 insertions(+), 15 deletions(-)

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Re: [PATCH v2 0/3] iio: exynos-adc: use syscon instead of ioremap

2014-10-10 Thread Jonathan Cameron
On 21/09/14 13:17, Jonathan Cameron wrote:
 On 16/09/14 09:58, Naveen Krishna Chatradhi wrote:
 Changes since v1:
 1. Rebased on top of togreg branch of IIO git.

 This patch set does the following
 1. Use the syscon and Regmap API instead of ioremappaing the
ADC_PHY register from PMU.
 2. Updates the Documentation in exynos-adc.txt with syscon phandle
for the ADC nodes.
 3. Updates the Dts files for Exynos3250, Exynos4x12, Exynos5250,
Exynos5420 with the syscon phandle.

 Tested on Exynos5420 based Peach PIT and Exynos5800 based Peach PI
 by verifying sysfs entries provided by HWMON based NTC thermistors.

 Tested-By for Exynos3250, Exynos4x12 would be appreciated.
 Would definitely be good!
 
 The main issue I have with this series is that it breaks backward
 compatibility with old device trees and newer kernels.
 
 Now I appreciate that sometimes there are reasons to do it but want this
 to have deeper consideration (and acks to show it) from the Exynos side
 of things and preferably from the device tree side of things as well.
 
 cc'd Kukjin Kim for the Exynos side of things as the listed Maintainer.
 
 Otherwise, the series looks fine to me.
Kukjin? Sorry to pester, but this has been sat in my waiting queue for a
while now.

 Naveen Krishna Chatradhi (3):
   iio: exyno-adc: use syscon for PMU register access
   Documentation: dt-bindings: update exynos-adc.txt with syscon handle
   ARM: dts: exynos: Add sysreg phandle to ADC node

  .../devicetree/bindings/arm/samsung/exynos-adc.txt |9 --
  arch/arm/boot/dts/exynos3250.dtsi  |3 +-
  arch/arm/boot/dts/exynos4x12.dtsi  |3 +-
  arch/arm/boot/dts/exynos5250.dtsi  |3 +-
  arch/arm/boot/dts/exynos5420.dtsi  |3 +-
  drivers/iio/adc/exynos_adc.c   |   30 
 ++--
  6 files changed, 36 insertions(+), 15 deletions(-)

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Re: [PATCH v2 0/3] iio: exynos-adc: use syscon instead of ioremap

2014-09-21 Thread Jonathan Cameron
On 16/09/14 09:58, Naveen Krishna Chatradhi wrote:
 Changes since v1:
 1. Rebased on top of togreg branch of IIO git.
 
 This patch set does the following
 1. Use the syscon and Regmap API instead of ioremappaing the
ADC_PHY register from PMU.
 2. Updates the Documentation in exynos-adc.txt with syscon phandle
for the ADC nodes.
 3. Updates the Dts files for Exynos3250, Exynos4x12, Exynos5250,
Exynos5420 with the syscon phandle.
 
 Tested on Exynos5420 based Peach PIT and Exynos5800 based Peach PI
 by verifying sysfs entries provided by HWMON based NTC thermistors.
 
 Tested-By for Exynos3250, Exynos4x12 would be appreciated.
Would definitely be good!

The main issue I have with this series is that it breaks backward
compatibility with old device trees and newer kernels.

Now I appreciate that sometimes there are reasons to do it but want this
to have deeper consideration (and acks to show it) from the Exynos side
of things and preferably from the device tree side of things as well.

cc'd Kukjin Kim for the Exynos side of things as the listed Maintainer.

Otherwise, the series looks fine to me.
 
 Naveen Krishna Chatradhi (3):
   iio: exyno-adc: use syscon for PMU register access
   Documentation: dt-bindings: update exynos-adc.txt with syscon handle
   ARM: dts: exynos: Add sysreg phandle to ADC node
 
  .../devicetree/bindings/arm/samsung/exynos-adc.txt |9 --
  arch/arm/boot/dts/exynos3250.dtsi  |3 +-
  arch/arm/boot/dts/exynos4x12.dtsi  |3 +-
  arch/arm/boot/dts/exynos5250.dtsi  |3 +-
  arch/arm/boot/dts/exynos5420.dtsi  |3 +-
  drivers/iio/adc/exynos_adc.c   |   30 
 ++--
  6 files changed, 36 insertions(+), 15 deletions(-)
 
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Re: [PATCHv2 1/3] iio: adc: exynos_adc: add support for s3c64xx adc

2014-08-07 Thread Jonathan Cameron
On 28/07/14 13:44, Chanwoo Choi wrote:
 From: Arnd Bergmann a...@arndb.de
 
 The ADC in s3c64xx is almost the same as exynosv1, but
 has a different 'select' method. Adding this here will be
 helpful to move over the existing s3c64xx platform from the
 legacy plat-samsung/adc driver to the new exynos-adc.
 
 Signed-off-by: Arnd Bergmann a...@arndb.de
 Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Applied to the togreg branch of iio.git.  Initially pushed out as testing
for the autobuilders to play.

Thanks,

 ---
  .../devicetree/bindings/arm/samsung/exynos-adc.txt |  2 ++
  drivers/iio/adc/exynos_adc.c   | 28 
 +-
  2 files changed, 29 insertions(+), 1 deletion(-)
 
 diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt 
 b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
 index adc61b0..d3dad46 100644
 --- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
 +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
 @@ -16,6 +16,8 @@ Required properties:
   future controllers.
   Must be samsung,exynos3250-adc for
   controllers compatible with ADC of Exynos3250.
 + Must be samsung,s3c6410-adc for
 + the ADC in s3c6410 and compatibles
  - reg:   Contains ADC register address range (base 
 address and
   length) and the address of the phy enable register.
  - interrupts:Contains the interrupt information for the 
 timer. The
 diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
 index 87e0895..ed9e4c8 100644
 --- a/drivers/iio/adc/exynos_adc.c
 +++ b/drivers/iio/adc/exynos_adc.c
 @@ -40,7 +40,7 @@
  #include linux/iio/machine.h
  #include linux/iio/driver.h
  
 -/* EXYNOS4412/5250 ADC_V1 registers definitions */
 +/* S3C/EXYNOS4412/5250 ADC_V1 registers definitions */
  #define ADC_V1_CON(x)((x) + 0x00)
  #define ADC_V1_DLY(x)((x) + 0x08)
  #define ADC_V1_DATX(x)   ((x) + 0x0C)
 @@ -61,6 +61,9 @@
  #define ADC_V1_CON_PRSCLV(x) (((x)  0xFF)  6)
  #define ADC_V1_CON_STANDBY   (1u  2)
  
 +/* Bit definitions for S3C2410 ADC */
 +#define ADC_S3C2410_CON_SELMUX(x) (((x)  7)  3)
 +
  /* Bit definitions for ADC_V2 */
  #define ADC_V2_CON1_SOFT_RESET   (1u  2)
  
 @@ -217,6 +220,26 @@ static const struct exynos_adc_data const 
 exynos_adc_v1_data = {
   .start_conv = exynos_adc_v1_start_conv,
  };
  
 +static void exynos_adc_s3c64xx_start_conv(struct exynos_adc *info,
 +   unsigned long addr)
 +{
 + u32 con1;
 +
 + con1 = readl(ADC_V1_CON(info-regs));
 + con1 = ~ADC_S3C2410_CON_SELMUX(0x7);
 + con1 |= ADC_S3C2410_CON_SELMUX(addr);
 + writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info-regs));
 +}
 +
 +static struct exynos_adc_data const exynos_adc_s3c64xx_data = {
 + .num_channels   = MAX_ADC_V1_CHANNELS,
 +
 + .init_hw= exynos_adc_v1_init_hw,
 + .exit_hw= exynos_adc_v1_exit_hw,
 + .clear_irq  = exynos_adc_v1_clear_irq,
 + .start_conv = exynos_adc_s3c64xx_start_conv,
 +};
 +
  static void exynos_adc_v2_init_hw(struct exynos_adc *info)
  {
   u32 con1, con2;
 @@ -285,6 +308,9 @@ static const struct exynos_adc_data const 
 exynos3250_adc_data = {
  
  static const struct of_device_id exynos_adc_match[] = {
   {
 + .compatible = samsung,s3c6410-adc,
 + .data = exynos_adc_s3c64xx_data,
 + }, {
   .compatible = samsung,exynos-adc-v1,
   .data = exynos_adc_v1_data,
   }, {
 
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Re: [PATCHv2 2/3] iio: adc: exynos_adc: Add support for s3c24xx ADC

2014-08-07 Thread Jonathan Cameron
On 28/07/14 13:44, Chanwoo Choi wrote:
 This patch add support for s3c2410/s3c2416/s3c2440/s3c2443 ADC. The s3c24xx
 is alomost same as ADCv1. But, There are a little difference as following:
 - ADCMUX register address
 - ADCDAT mask (10 bit or 12 bit ADC resolution according to SoC version)
 - s3c24xx/s3c64xx has not included ADC_PHY enable register
 
 Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
 Acked-by: Arnd Bergmann a...@arndb.de
Applied - with a little bit of fuzz and pushed out as testing for the 
autobuilders
to play with it.

Thanks

Jonathan
 ---
  .../devicetree/bindings/arm/samsung/exynos-adc.txt |  16 ++-
  drivers/iio/adc/Kconfig|   2 +-
  drivers/iio/adc/exynos_adc.c   | 109 
 +++--
  3 files changed, 114 insertions(+), 13 deletions(-)
 
 diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt 
 b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
 index d3dad46..709efaa 100644
 --- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
 +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
 @@ -11,15 +11,25 @@ New driver handles the following
  
  Required properties:
  - compatible:Must be samsung,exynos-adc-v1
 - for exynos4412/5250 controllers.
 + for exynos4412/5250 and s5pv210 controllers.
   Must be samsung,exynos-adc-v2 for
   future controllers.
   Must be samsung,exynos3250-adc for
   controllers compatible with ADC of Exynos3250.
 + Must be samsung,s3c2410-adc for
 + the ADC in s3c2410 and compatibles
 + Must be samsung,s3c2416-adc for
 + the ADC in s3c2416 and compatibles
 + Must be samsung,s3c2440-adc for
 + the ADC in s3c2440 and compatibles
 + Must be samsung,s3c2443-adc for
 + the ADC in s3c2443 and compatibles
   Must be samsung,s3c6410-adc for
   the ADC in s3c6410 and compatibles
 -- reg:   Contains ADC register address range (base 
 address and
 - length) and the address of the phy enable register.
 +- reg:   List of ADC register address range
 + - The base address and range of ADC register
 + - The base address and range of ADC_PHY register (every
 +   SoC except for s3c24xx/s3c64xx ADC)
  - interrupts:Contains the interrupt information for the 
 timer. The
   format is being dependent on which interrupt controller
   the Samsung device uses.
 diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
 index a80d236..a247655 100644
 --- a/drivers/iio/adc/Kconfig
 +++ b/drivers/iio/adc/Kconfig
 @@ -119,7 +119,7 @@ config AT91_ADC
  
  config EXYNOS_ADC
   tristate Exynos ADC driver support
 - depends on ARCH_EXYNOS || (OF  COMPILE_TEST)
 + depends on ARCH_EXYNOS || ARCH_S3C24XX || ARCH_S3C64XX || (OF  
 COMPILE_TEST)
   help
 Core support for the ADC block found in the Samsung EXYNOS series
 of SoCs for drivers such as the touchscreen and hwmon to use to share
 diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
 index ed9e4c8..3b17faa 100644
 --- a/drivers/iio/adc/exynos_adc.c
 +++ b/drivers/iio/adc/exynos_adc.c
 @@ -47,6 +47,9 @@
  #define ADC_V1_INTCLR(x) ((x) + 0x18)
  #define ADC_V1_MUX(x)((x) + 0x1c)
  
 +/* S3C2410 ADC registers definitions */
 +#define ADC_S3C2410_MUX(x)   ((x) + 0x18)
 +
  /* Future ADC_V2 registers definitions */
  #define ADC_V2_CON1(x)   ((x) + 0x00)
  #define ADC_V2_CON2(x)   ((x) + 0x04)
 @@ -63,6 +66,8 @@
  
  /* Bit definitions for S3C2410 ADC */
  #define ADC_S3C2410_CON_SELMUX(x) (((x)  7)  3)
 +#define ADC_S3C2410_DATX_MASK0x3FF
 +#define ADC_S3C2416_CON_RES_SEL  (1u  3)
  
  /* Bit definitions for ADC_V2 */
  #define ADC_V2_CON1_SOFT_RESET   (1u  2)
 @@ -80,6 +85,7 @@
  
  /* Bit definitions common for ADC_V1 and ADC_V2 */
  #define ADC_CON_EN_START (1u  0)
 +#define ADC_CON_EN_START_MASK(0x3  0)
  #define ADC_DATX_MASK0xFFF
  
  #define EXYNOS_ADC_TIMEOUT   (msecs_to_jiffies(100))
 @@ -103,6 +109,8 @@ struct exynos_adc {
  struct exynos_adc_data {
   int num_channels;
   bool needs_sclk;
 + bool needs_adc_phy;
 + u32 mask;
  
   void (*init_hw)(struct exynos_adc *info);
   void (*exit_hw)(struct exynos_adc *info);
 @@ -174,7 +182,8 @@ static void exynos_adc_v1_init_hw(struct exynos_adc *info)
  {
   u32 con1;
  
 - writel(1, info-enable_reg);
 + if 

Re: [PATCHv2 3/3] dt-bindings: samsung: exynos_adc: Remove un-necessary white-sapce

2014-08-07 Thread Jonathan Cameron
On 28/07/14 13:44, Chanwoo Choi wrote:
 This patch remove un-necessary white-sapce to code clean.
 
 Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Applied to the togreg branch of iio.git. Obviously this didn't
need to go through my tree, but as it is so trivial it might
as well do so.

J
 ---
  Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt 
 b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
 index 709efaa..5ee0266 100644
 --- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
 +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
 @@ -30,7 +30,7 @@ Required properties:
   - The base address and range of ADC register
   - The base address and range of ADC_PHY register (every
 SoC except for s3c24xx/s3c64xx ADC)
 -- interrupts:Contains the interrupt information for the 
 timer. The
 +- interrupts:Contains the interrupt information for the 
 timer. The
   format is being dependent on which interrupt controller
   the Samsung device uses.
  - #io-channel-cells = 1; As ADC has multiple outputs
 
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Re: [PATCHv8 4/4] ARM: dts: Fix wrong compatible string for Exynos3250 ADC

2014-07-23 Thread Jonathan Cameron

On 22/07/14 03:04, Chanwoo Choi wrote:

This patchset fix wrong compatible string for Exynos3250 ADC. Exynos3250 SoC
need to control only special clock for ADC. Exynos SoC except for Exynos3250
has not included special clock for ADC. The exynos ADC driver can control
special clock if compatible string is 'exynos3250-adc-v2'.

Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
Acked-by: Kukjin Kim kgene@samsung.com
Acked-by: Arnd Bergmann a...@arndb.de

Applied to the togreg branch of iio.git - initially pushed out as testing.

Thanks

Jonathan

---
  arch/arm/boot/dts/exynos3250.dtsi | 5 +++--
  1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos3250.dtsi 
b/arch/arm/boot/dts/exynos3250.dtsi
index 15c9c87..767189a 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -407,10 +407,11 @@
};

adc: adc@126C {
-   compatible = samsung,exynos-adc-v3;
+   compatible = samsung,exynos3250-adc,
+samsung,exynos-adc-v2;
reg = 0x126C 0x100, 0x10020718 0x4;
interrupts = 0 137 0;
-   clock-names = adc, sclk_tsadc;
+   clock-names = adc, sclk;
clocks = cmu CLK_TSADC, cmu CLK_SCLK_TSADC;
#io-channel-cells = 1;
io-channel-ranges;



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Re: [PATCH 2/2] iio: exynos-adc: add experimental touchscreen support

2014-07-20 Thread Jonathan Cameron

On 18/07/14 20:29, Arnd Bergmann wrote:

This adds support for the touchscreen on Samsung s3c64xx.
The driver is completely untested but shows roughly how
it could be done, following the example of the at91 driver.


Hi Arnd,


Open questions include:

- compared to the old plat-samsung/adc driver, there is
   no support for prioritizing ts over other clients, nor
   for oversampling. From my reading of the code, the
   priorities didn't actually have any effect at all, but
   the oversampling might be needed. Maybe the original
   authors have some insight.

- I simply register the input device from the adc driver
   itself, as the at91 code does. The driver also supports
   sub-nodes, but I don't understand how they are meant
   to be used, so using those might be better.

So, the alternative you are (I think) referring to is to use
the buffered in kernel client interface.  That way a separate
touch screen driver can use the output channels provided by IIO
in much the same way you might use a regulator or similar.
Note that whilst this is similar to the simple polled interface
used for things like the iio_hwmon driver, the data flow is
quite different (clearly the polled interfce would be
inappropriate here).

Whilst we've discussed it in the past for touch screen drivers
like this, usually the hardware isn't generic enough to be
of any real use if not being used as a touch screen.  As such
it's often simpler to just have the support directly in the
driver (as you've observed the at91 driver does this).

Whilst the interface has been there a while, it's not really had
all that much use.  The original target was the simpler case
of 3D accelerometer where we have a generic iio to input
bridge driver. Time constraints meant that I haven't yet actually
formally submitted the input side of this. Whilst there are lots
of other things that can use this interface, right now nothing
actually does so.



- The new exynos_read_s3c64xx_ts() function is intentionally
   very similar to the existing exynos_read_raw() functions.
   It should probably be changed, either by merging the two
   into one, or by simplifying the exynos_read_s3c64xx_ts()
   function. This depends a bit on the answers to the questions
   above.

I'd be tempted to not bother keeping them that similar.  It's
not a generic IIO channel so simplify it where possible.


- We probably need to add support for platform_data as well,
   I've skipped this so far.

- Is anybody able to debug this driver on real hardware?
   While it's possible that it actually works, it's more
   likely that I made a few subtle mistakes.

Signed-off-by: Arnd Bergmann a...@arndb.de

Looks pretty good to me.  A few symantic bits and pieces and
one bug spotted.  Short and sweet.


diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt 
b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
index e1b74828f413..4329bf3c3326 100644
--- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
@@ -41,6 +41,10 @@ Required properties:
   and compatible ADC block)
  - vdd-supply  VDD input supply.

+Optional properties:
+- has-touchscreen: If present, indicates that a touchscreen is
+   connected an usable.
+
  Note: child nodes can be added for auto probing from device tree.

  Example: adding device info in dtsi file
diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
index 5f95638513d2..cf1d9f3e2492 100644
--- a/drivers/iio/adc/exynos_adc.c
+++ b/drivers/iio/adc/exynos_adc.c
@@ -34,6 +34,7 @@
  #include linux/regulator/consumer.h
  #include linux/of_platform.h
  #include linux/err.h
+#include linux/input.h

Might want to make the input side optional at compile time...
I supose the existing parts are unlikely to be used much in headless
devices, but you never know.  Maybe we just leave this until someone
shouts they want to be able to avoid compiling it in.


  #include linux/iio/iio.h
  #include linux/iio/machine.h
@@ -103,6 +104,7 @@

  /* Bit definitions common for ADC_V1 and ADC_V2 */
  #define ADC_CON_EN_START  (1u  0)
+#define ADC_DATX_PRESSED   (1u  15)
  #define ADC_DATX_MASK 0xFFF

  #define EXYNOS_ADC_TIMEOUT(msecs_to_jiffies(100))
@@ -110,16 +112,20 @@
  struct exynos_adc {
struct exynos_adc_data  *data;
struct device   *dev;
+   struct input_dev*input;
void __iomem*regs;
void __iomem*enable_reg;
struct clk  *clk;
struct clk  *sclk;
unsigned intirq;
+   unsigned inttsirq;
struct regulator*vdd;

struct completion   completion;

+   boolread_ts;
u32 value;
+   u32 value2;

As I state further down, I'd rather keep a 

Re: [PATCH 2/2] iio: exynos-adc: add experimental touchscreen support

2014-07-20 Thread Jonathan Cameron

On 20/07/14 14:49, Jonathan Cameron wrote:

On 18/07/14 20:29, Arnd Bergmann wrote:

This adds support for the touchscreen on Samsung s3c64xx.
The driver is completely untested but shows roughly how
it could be done, following the example of the at91 driver.


Hi Arnd,

Cc'd linux-input and Dmitry.



Open questions include:

- compared to the old plat-samsung/adc driver, there is
   no support for prioritizing ts over other clients, nor
   for oversampling. From my reading of the code, the
   priorities didn't actually have any effect at all, but
   the oversampling might be needed. Maybe the original
   authors have some insight.

- I simply register the input device from the adc driver
   itself, as the at91 code does. The driver also supports
   sub-nodes, but I don't understand how they are meant
   to be used, so using those might be better.

So, the alternative you are (I think) referring to is to use
the buffered in kernel client interface.  That way a separate
touch screen driver can use the output channels provided by IIO
in much the same way you might use a regulator or similar.
Note that whilst this is similar to the simple polled interface
used for things like the iio_hwmon driver, the data flow is
quite different (clearly the polled interfce would be
inappropriate here).

Whilst we've discussed it in the past for touch screen drivers
like this, usually the hardware isn't generic enough to be
of any real use if not being used as a touch screen.  As such
it's often simpler to just have the support directly in the
driver (as you've observed the at91 driver does this).

Whilst the interface has been there a while, it's not really had
all that much use.  The original target was the simpler case
of 3D accelerometer where we have a generic iio to input
bridge driver. Time constraints meant that I haven't yet actually
formally submitted the input side of this. Whilst there are lots
of other things that can use this interface, right now nothing
actually does so.



- The new exynos_read_s3c64xx_ts() function is intentionally
   very similar to the existing exynos_read_raw() functions.
   It should probably be changed, either by merging the two
   into one, or by simplifying the exynos_read_s3c64xx_ts()
   function. This depends a bit on the answers to the questions
   above.

I'd be tempted to not bother keeping them that similar.  It's
not a generic IIO channel so simplify it where possible.


- We probably need to add support for platform_data as well,
   I've skipped this so far.

- Is anybody able to debug this driver on real hardware?
   While it's possible that it actually works, it's more
   likely that I made a few subtle mistakes.

Signed-off-by: Arnd Bergmann a...@arndb.de

Looks pretty good to me.  A few symantic bits and pieces and
one bug spotted.  Short and sweet.


diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt 
b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
index e1b74828f413..4329bf3c3326 100644
--- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
@@ -41,6 +41,10 @@ Required properties:
 and compatible ADC block)
  - vdd-supplyVDD input supply.

+Optional properties:
+- has-touchscreen:If present, indicates that a touchscreen is
+connected an usable.
+
  Note: child nodes can be added for auto probing from device tree.

  Example: adding device info in dtsi file
diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
index 5f95638513d2..cf1d9f3e2492 100644
--- a/drivers/iio/adc/exynos_adc.c
+++ b/drivers/iio/adc/exynos_adc.c
@@ -34,6 +34,7 @@
  #include linux/regulator/consumer.h
  #include linux/of_platform.h
  #include linux/err.h
+#include linux/input.h

Might want to make the input side optional at compile time...
I supose the existing parts are unlikely to be used much in headless
devices, but you never know.  Maybe we just leave this until someone
shouts they want to be able to avoid compiling it in.


  #include linux/iio/iio.h
  #include linux/iio/machine.h
@@ -103,6 +104,7 @@

  /* Bit definitions common for ADC_V1 and ADC_V2 */
  #define ADC_CON_EN_START(1u  0)
+#define ADC_DATX_PRESSED(1u  15)
  #define ADC_DATX_MASK0xFFF

  #define EXYNOS_ADC_TIMEOUT(msecs_to_jiffies(100))
@@ -110,16 +112,20 @@
  struct exynos_adc {
  struct exynos_adc_data*data;
  struct device*dev;
+struct input_dev*input;
  void __iomem*regs;
  void __iomem*enable_reg;
  struct clk*clk;
  struct clk*sclk;
  unsigned intirq;
+unsigned inttsirq;
  struct regulator*vdd;

  struct completioncompletion;

+boolread_ts;
  u32value;
+u32value2;

As I state further down, I'd rather keep a little
clear of the naming used in IIO for bits

Re: [PATCH 1/4 v2] iio: exyno-adc: use syscon for PMU register access

2014-07-20 Thread Jonathan Cameron

On 17/07/14 14:56, Bartlomiej Zolnierkiewicz wrote:


Hi,

On Thursday, July 17, 2014 05:41:16 PM Naveen Krishna Ch wrote:

Hello Sachin,

On 17 July 2014 17:24, Sachin Kamat spk.li...@gmail.com wrote:

Hi Naveen,

On Thu, Jul 17, 2014 at 4:49 PM, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:

This patch updates the IIO based ADC driver to use syscon and regmap
APIs to access and use PMU registers instead of remapping the PMU
registers in the driver.

Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
To: linux-...@vger.kernel.org


With only this patch applied, I believe the ADC functionality would be broken.
Perhaps the DT changes should be merged along with this patch?


Jonathan already mentioned that, he would wait for Ack from Kukjin.
With out the dts changes ADC driver will fail to probe but it wont
crash the system.
git bisect should still work.


Unless someone bisects things related to ADC functionality..

Also patch #1 seems to break device tree ABI (the old dtb will no longer
work with the new kernel).

A very good point.  How to avoid this breakage?  Supporting the whole
old mechanism is going to be a little painful but without that phandle
is there any other way?


Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung RD Institute Poland
Samsung Electronics

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Re: [PATCH 0/4] iio: exynos-adc: use syscon instead of ioremap

2014-07-15 Thread Jonathan Cameron

On 11/07/14 10:06, Naveen Krishna Chatradhi wrote:

This patch does the following
1. Use the syscon and Regmap API instead of ioremappaing the
ADC_PHY register from PMU.
2. Moves the exynos-adc.txt from bindings/arm/samsung/
to bindings/iio/adc/.
3. Updates the Documentation in exynos-adc.txt with syscon phandle
for the ADC nodes.
4. Updates the Dts files for Exynos3250, Exynos4x12, Exynos5250,
Exynos5420 with the syscon phandle.

Tested on Exynos5420 based Peach PIT and Exynos5800 based Peach PI
by verifying sysfs entries provided by HWMON based NTC thermistors.

Tested-By for Exynos3250, Exynos4x12 would be appreciated.


This series all looks fine to me.  Took me a minute to work out what the point
of the syscon change was (perhaps a little description in the cover letter
would have been nice ;)

Anyhow, with the device tree changes in here we'll have to let it sit for
a while.  I'll also definitely want an ack from
Kukjin Kim kgene@samsung.com for the device tree changes.

Jonathan

Naveen Krishna Chatradhi (4):
   iio: exyno-adc: use syscon for PMU register access
   Documentation: dt-bindings: move exynos-adc.txt to more iio/adc/
   Documentation: dt-bindings: update exynos-adc.txt with syscon handle
   ARM: dts: exynos: Add sysreg phandle to ADC node

  .../devicetree/bindings/arm/samsung/exynos-adc.txt |   82 --
  .../devicetree/bindings/iio/adc/exynos-adc.txt |   87 
  arch/arm/boot/dts/exynos3250.dtsi  |3 +-
  arch/arm/boot/dts/exynos4x12.dtsi  |3 +-
  arch/arm/boot/dts/exynos5250.dtsi  |3 +-
  arch/arm/boot/dts/exynos5420.dtsi  |3 +-
  drivers/iio/adc/exynos_adc.c   |   29 +--
  7 files changed, 115 insertions(+), 95 deletions(-)
  delete mode 100644 
Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
  create mode 100644 Documentation/devicetree/bindings/iio/adc/exynos-adc.txt



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Re: [PATCH 0/4] iio: exynos-adc: use syscon instead of ioremap

2014-07-15 Thread Jonathan Cameron

On 15/07/14 19:13, Jonathan Cameron wrote:

On 11/07/14 10:06, Naveen Krishna Chatradhi wrote:

This patch does the following
1. Use the syscon and Regmap API instead of ioremappaing the
ADC_PHY register from PMU.
2. Moves the exynos-adc.txt from bindings/arm/samsung/
to bindings/iio/adc/.
3. Updates the Documentation in exynos-adc.txt with syscon phandle
for the ADC nodes.
4. Updates the Dts files for Exynos3250, Exynos4x12, Exynos5250,
Exynos5420 with the syscon phandle.

Tested on Exynos5420 based Peach PIT and Exynos5800 based Peach PI
by verifying sysfs entries provided by HWMON based NTC thermistors.

Tested-By for Exynos3250, Exynos4x12 would be appreciated.


This series all looks fine to me.  Took me a minute to work out what the point
of the syscon change was (perhaps a little description in the cover letter
would have been nice ;)

Anyhow, with the device tree changes in here we'll have to let it sit for
a while.  I'll also definitely want an ack from
Kukjin Kim kgene@samsung.com for the device tree changes.

Although I haven't tried it, I'd imagine this might cause a little bit
of merging fun with the other exynos series waiting for Kukjin to
ack...
[PATCHv5 0/4] iio: adc: exynos_adc: Support Exynos3250 ADC and code clean


Jonathan

Naveen Krishna Chatradhi (4):
   iio: exyno-adc: use syscon for PMU register access
   Documentation: dt-bindings: move exynos-adc.txt to more iio/adc/
   Documentation: dt-bindings: update exynos-adc.txt with syscon handle
   ARM: dts: exynos: Add sysreg phandle to ADC node

  .../devicetree/bindings/arm/samsung/exynos-adc.txt |   82 --
  .../devicetree/bindings/iio/adc/exynos-adc.txt |   87 
  arch/arm/boot/dts/exynos3250.dtsi  |3 +-
  arch/arm/boot/dts/exynos4x12.dtsi  |3 +-
  arch/arm/boot/dts/exynos5250.dtsi  |3 +-
  arch/arm/boot/dts/exynos5420.dtsi  |3 +-
  drivers/iio/adc/exynos_adc.c   |   29 +--
  7 files changed, 115 insertions(+), 95 deletions(-)
  delete mode 100644 
Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
  create mode 100644 Documentation/devicetree/bindings/iio/adc/exynos-adc.txt



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Re: [PATCHv5 3/4] iio: devicetree: Add DT binding documentation for Exynos3250 ADC

2014-06-29 Thread Jonathan Cameron

On 27/06/14 05:30, Chanwoo Choi wrote:

This patch add DT binding documentation for Exynos3250 ADC IP. Exynos3250 has
special clock ('sclk_adc') for ADC which provide clock to internal ADC.

Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Reviewed-by: Naveen Krishna Chatradhi ch.nav...@samsung.com

One trivial inline.  As a fairly obvious extension of the existing bindings
'probably' doesn't really need a dt maintainer ack (or the 3 weeks)

---
  .../devicetree/bindings/arm/samsung/exynos-adc.txt | 26 --
  1 file changed, 24 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt 
b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
index 5d49f2b..b87749a 100644
--- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
@@ -14,14 +14,22 @@ Required properties:
for exynos4412/5250 controllers.
Must be samsung,exynos-adc-v2 for
future controllers.
+   Must be samsung,exynos3250-adc-v2 for
+   for controllers compatible with ADC of

for for

+   Exynos3250.
  - reg:Contains ADC register address range (base 
address and
length) and the address of the phy enable register.
  - interrupts: Contains the interrupt information for the 
timer. The
format is being dependent on which interrupt controller
the Samsung device uses.
  - #io-channel-cells = 1; As ADC has multiple outputs
-- clocks   From common clock binding: handle to adc clock.
-- clock-names  From common clock binding: Shall be adc.
+- clocks   From common clock bindings: handles to clocks specified
+   in clock-names property, in the same order.
+- clock-names  From common clock bindings: list of clock input names
+   used by ADC block:
+   - adc : ADC bus clock
+   - sclk_adc : ADC special clock (only for Exynos3250
+  and compatible ADC block)
  - vdd-supply  VDD input supply.

  Note: child nodes can be added for auto probing from device tree.
@@ -41,6 +49,20 @@ adc: adc@12D1 {
vdd-supply = buck5_reg;
  };

+Example: adding device info in dtsi file for Exynos3250 with additional sclk
+
+adc: adc@126C {
+   compatible = samsung,exynos3250-adc-v2;
+   reg = 0x126C 0x100, 0x10020718 0x4;
+   interrupts = 0 137 0;
+   #io-channel-cells = 1;
+   io-channel-ranges;
+
+   clocks = cmu CLK_TSADC, cmu CLK_SCLK_TSADC;
+   clock-names = adc, sclk_adc;
+
+   vdd-supply = buck5_reg;
+};

  Example: Adding child nodes in dts file




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Re: [PATCHv5 0/4] iio: adc: exynos_adc: Support Exynos3250 ADC and code clean

2014-06-29 Thread Jonathan Cameron

On 27/06/14 05:30, Chanwoo Choi wrote:

Changes from v4:
- Use 'exynos_adc_data' structure instead of 'exynos_adc_ops' structure
   and remove enum variable of ADC version
- Fix wrong name of special clock (sclk_tsadc - sclk_adc)
- Add reviewed message by Naveen Krishna Chatradhi
- Add functions for ADC clock control

Changes from v3:
- Add new 'exynos_adc_ops' structure to improve readability according to
  Tomasz Figa comment[1]
  [1] https://lkml.org/lkml/2014/4/16/238
- Add new 'exynos3250-adc-v2' compatible string to support Exynos3250 ADC
- Fix wrong compaitlbe string of ADC in Exynos3250 dtsi file

Changes from v2:
- Check return value of clock function to deal with error exception
- Fix minor coding style to improve readability

Changes from v1:
- Add new samsung,exynos-adc-v3 compatible to support Exynos3250 ADC
- Add a patch about DT binding documentation

Chanwoo Choi (4):
   iio: adc: exynos_adc: Add exynos_adc_data structure to improve readability
   iio: adc: exynos_adc: Control special clock of ADC to support Exynos3250 ADC
   iio: devicetree: Add DT binding documentation for Exynos3250 ADC
   ARM: dts: Fix wrong compatible string for Exynos3250 ADC

  .../devicetree/bindings/arm/samsung/exynos-adc.txt |  26 +-
  arch/arm/boot/dts/exynos3250.dtsi  |   4 +-
  drivers/iio/adc/exynos_adc.c   | 326 +++--
  3 files changed, 268 insertions(+), 88 deletions(-)


I am happy with this series, but given it touches some exynos bindings, I would
like an ack from Kukjin Kim (or according to MAINTAINERS Ben Dooks) before 
taking it
all through IIO.

Thanks,

Jonathan
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Re: [PATCH 1/5 v3] iio: exynos_adc: use indio_dev-dev structure to handle child nodes

2014-04-30 Thread Jonathan Cameron

On 30/04/14 10:26, Naveen Krishna Chatradhi wrote:

From: Naveen Krishna Ch ch.nav...@samsung.com

Using pdev-dev with device_for_each_child() would iterate over all
of the children of the platform device and delete them.
Thus, causing crashes during module unload.

We should be using the indio_dev-dev structure for
registering/unregistering child nodes.

Signed-off-by: Naveen Krishna Ch ch.nav...@samsung.com
Reported-by: Doug Anderson diand...@chromium.org
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org

This one has been in my fixes-togreg branch for a few days and
a pull request has gone to Greg.

---
Changes since v2:
None
Changes since v1:
Adding Doug's tags
v0:
This change was tested on top of
https://lkml.org/lkml/2014/4/21/481 from Doug.

  drivers/iio/adc/exynos_adc.c |6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
index d25b262..affa93f 100644
--- a/drivers/iio/adc/exynos_adc.c
+++ b/drivers/iio/adc/exynos_adc.c
@@ -344,7 +344,7 @@ static int exynos_adc_probe(struct platform_device *pdev)

exynos_adc_hw_init(info);

-   ret = of_platform_populate(np, exynos_adc_match, NULL, pdev-dev);
+   ret = of_platform_populate(np, exynos_adc_match, NULL, indio_dev-dev);
if (ret  0) {
dev_err(pdev-dev, failed adding child nodes\n);
goto err_of_populate;
@@ -353,7 +353,7 @@ static int exynos_adc_probe(struct platform_device *pdev)
return 0;

  err_of_populate:
-   device_for_each_child(pdev-dev, NULL,
+   device_for_each_child(indio_dev-dev, NULL,
exynos_adc_remove_devices);
regulator_disable(info-vdd);
clk_disable_unprepare(info-clk);
@@ -369,7 +369,7 @@ static int exynos_adc_remove(struct platform_device *pdev)
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
struct exynos_adc *info = iio_priv(indio_dev);

-   device_for_each_child(pdev-dev, NULL,
+   device_for_each_child(indio_dev-dev, NULL,
exynos_adc_remove_devices);
regulator_disable(info-vdd);
clk_disable_unprepare(info-clk);



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Re: [PATCH 2/5 v3] iio: exynos_adc: rearrange clk and regulator enable/disable calls

2014-04-30 Thread Jonathan Cameron

On 30/04/14 10:26, Naveen Krishna Chatradhi wrote:

From: Naveen Krishna Ch ch.nav...@samsung.com

This patch maintains the following order in
probe(), remove(), resume() and suspend() calls

regulator enable, clk prepare enable
...
clk disable unprepare, regulator disable

While at it,
1. enable the regulator before the iio_device_register()
2. handle the return values for enable/disable calls

Signed-off-by: Naveen Krishna Ch ch.nav...@samsung.com
Reviewed-by: Doug Anderson diand...@chromium.org

Applied to the togreg branch of iio.git.

Thanks,

---
Changes since v2:
Remove extra unused line and add Doug's Reviewed-by
Changes since v1:
corrected the register/unregister and enabling/disbaling sequences

  drivers/iio/adc/exynos_adc.c |   62 ++
  1 file changed, 33 insertions(+), 29 deletions(-)

diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
index affa93f..ff98c5d 100644
--- a/drivers/iio/adc/exynos_adc.c
+++ b/drivers/iio/adc/exynos_adc.c
@@ -290,32 +290,30 @@ static int exynos_adc_probe(struct platform_device *pdev)

init_completion(info-completion);

-   ret = request_irq(info-irq, exynos_adc_isr,
-   0, dev_name(pdev-dev), info);
-   if (ret  0) {
-   dev_err(pdev-dev, failed requesting irq, irq = %d\n,
-   info-irq);
-   return ret;
-   }
-
-   writel(1, info-enable_reg);
-
info-clk = devm_clk_get(pdev-dev, adc);
if (IS_ERR(info-clk)) {
dev_err(pdev-dev, failed getting clock, err = %ld\n,
PTR_ERR(info-clk));
-   ret = PTR_ERR(info-clk);
-   goto err_irq;
+   return PTR_ERR(info-clk);
}

info-vdd = devm_regulator_get(pdev-dev, vdd);
if (IS_ERR(info-vdd)) {
dev_err(pdev-dev, failed getting regulator, err = %ld\n,
PTR_ERR(info-vdd));
-   ret = PTR_ERR(info-vdd);
-   goto err_irq;
+   return PTR_ERR(info-vdd);
}

+   ret = regulator_enable(info-vdd);
+   if (ret)
+   return ret;
+
+   ret = clk_prepare_enable(info-clk);
+   if (ret)
+   goto err_disable_reg;
+
+   writel(1, info-enable_reg);
+
info-version = exynos_adc_get_version(pdev);

platform_set_drvdata(pdev, indio_dev);
@@ -332,16 +330,18 @@ static int exynos_adc_probe(struct platform_device *pdev)
else
indio_dev-num_channels = MAX_ADC_V2_CHANNELS;

+   ret = request_irq(info-irq, exynos_adc_isr,
+   0, dev_name(pdev-dev), info);
+   if (ret  0) {
+   dev_err(pdev-dev, failed requesting irq, irq = %d\n,
+   info-irq);
+   goto err_disable_clk;
+   }
+
ret = iio_device_register(indio_dev);
if (ret)
goto err_irq;

-   ret = regulator_enable(info-vdd);
-   if (ret)
-   goto err_iio_dev;
-
-   clk_prepare_enable(info-clk);
-
exynos_adc_hw_init(info);

ret = of_platform_populate(np, exynos_adc_match, NULL, indio_dev-dev);
@@ -355,12 +355,14 @@ static int exynos_adc_probe(struct platform_device *pdev)
  err_of_populate:
device_for_each_child(indio_dev-dev, NULL,
exynos_adc_remove_devices);
-   regulator_disable(info-vdd);
-   clk_disable_unprepare(info-clk);
-err_iio_dev:
iio_device_unregister(indio_dev);
  err_irq:
free_irq(info-irq, info);
+err_disable_clk:
+   writel(0, info-enable_reg);
+   clk_disable_unprepare(info-clk);
+err_disable_reg:
+   regulator_disable(info-vdd);
return ret;
  }

@@ -371,11 +373,11 @@ static int exynos_adc_remove(struct platform_device *pdev)

device_for_each_child(indio_dev-dev, NULL,
exynos_adc_remove_devices);
-   regulator_disable(info-vdd);
-   clk_disable_unprepare(info-clk);
-   writel(0, info-enable_reg);
iio_device_unregister(indio_dev);
free_irq(info-irq, info);
+   writel(0, info-enable_reg);
+   clk_disable_unprepare(info-clk);
+   regulator_disable(info-vdd);

return 0;
  }
@@ -397,8 +399,8 @@ static int exynos_adc_suspend(struct device *dev)
writel(con, ADC_V1_CON(info-regs));
}

-   clk_disable_unprepare(info-clk);
writel(0, info-enable_reg);
+   clk_disable_unprepare(info-clk);
regulator_disable(info-vdd);

return 0;
@@ -414,9 +416,11 @@ static int exynos_adc_resume(struct device *dev)
if (ret)
return ret;

-   writel(1, info-enable_reg);
-   clk_prepare_enable(info-clk);
+   ret = clk_prepare_enable(info-clk);
+  

Re: [PATCH 3/5 v3] iio: exynos_adc: reduce timeout and use wait_for_completion_timeout

2014-04-30 Thread Jonathan Cameron

On 30/04/14 10:26, Naveen Krishna Chatradhi wrote:

ADC module on Exynos5 SoCs runs at 600KSPS. At this conversion rate,
waiting for 1000 msecs is wasteful (incase of h/w failure).

Hence, reduce the time out to 100msecs and use
wait_for_completion_timeout() instead of
wait_for_completion_interruptible_timeout()

Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Reviewed-by: Doug Anderson diand...@chromium.org

Applied to the togreg branch of iio.git

Thanks

---
Changes since v2:
None
Changes since v1:
None
v0:
This change is a part of the patch reviewd at https://lkml.org/lkml/2013/11/5/92

  drivers/iio/adc/exynos_adc.c |   18 +++---
  1 file changed, 11 insertions(+), 7 deletions(-)

diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
index ff98c5d..939aaf7 100644
--- a/drivers/iio/adc/exynos_adc.c
+++ b/drivers/iio/adc/exynos_adc.c
@@ -82,7 +82,7 @@ enum adc_version {
  #define ADC_CON_EN_START  (1u  0)
  #define ADC_DATX_MASK 0xFFF

-#define EXYNOS_ADC_TIMEOUT (msecs_to_jiffies(1000))
+#define EXYNOS_ADC_TIMEOUT (msecs_to_jiffies(100))

  struct exynos_adc {
void __iomem*regs;
@@ -121,6 +121,7 @@ static int exynos_read_raw(struct iio_dev *indio_dev,
struct exynos_adc *info = iio_priv(indio_dev);
unsigned long timeout;
u32 con1, con2;
+   int ret;

if (mask != IIO_CHAN_INFO_RAW)
return -EINVAL;
@@ -145,16 +146,19 @@ static int exynos_read_raw(struct iio_dev *indio_dev,
ADC_V1_CON(info-regs));
}

-   timeout = wait_for_completion_interruptible_timeout
+   timeout = wait_for_completion_timeout
(info-completion, EXYNOS_ADC_TIMEOUT);
-   *val = info-value;
+   if (timeout == 0) {
+   ret = -ETIMEDOUT;
+   } else {
+   *val = info-value;
+   *val2 = 0;
+   ret = IIO_VAL_INT;
+   }

mutex_unlock(indio_dev-mlock);

-   if (timeout == 0)
-   return -ETIMEDOUT;
-
-   return IIO_VAL_INT;
+   return ret;
  }

  static irqreturn_t exynos_adc_isr(int irq, void *dev_id)



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Re: [PATCH 4/5 v3] iio: exynos_adc: do a soft reset in case of timeout

2014-04-30 Thread Jonathan Cameron

On 30/04/14 10:26, Naveen Krishna Chatradhi wrote:

Do a soft reset software if a timeout happens.
This is applicable only for ADC_V2.

Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Reviewed-by: Doug Anderson diand...@chromium.org

Applied to the togreg branch of iio.git

Thanks,

---
Changes since v2:
None
Changes since v1:
None
v0:
This change is a part of the patch reviewed at 
https://lkml.org/lkml/2013/11/5/92

  drivers/iio/adc/exynos_adc.c |   50 ++
  1 file changed, 26 insertions(+), 24 deletions(-)

diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
index 939aaf7..eddc58e 100644
--- a/drivers/iio/adc/exynos_adc.c
+++ b/drivers/iio/adc/exynos_adc.c
@@ -112,6 +112,30 @@ static inline unsigned int exynos_adc_get_version(struct 
platform_device *pdev)
return (unsigned int)match-data;
  }

+static void exynos_adc_hw_init(struct exynos_adc *info)
+{
+   u32 con1, con2;
+
+   if (info-version == ADC_V2) {
+   con1 = ADC_V2_CON1_SOFT_RESET;
+   writel(con1, ADC_V2_CON1(info-regs));
+
+   con2 = ADC_V2_CON2_OSEL | ADC_V2_CON2_ESEL |
+   ADC_V2_CON2_HIGHF | ADC_V2_CON2_C_TIME(0);
+   writel(con2, ADC_V2_CON2(info-regs));
+
+   /* Enable interrupts */
+   writel(1, ADC_V2_INT_EN(info-regs));
+   } else {
+   /* set default prescaler values and Enable prescaler */
+   con1 =  ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN;
+
+   /* Enable 12-bit ADC resolution */
+   con1 |= ADC_V1_CON_RES;
+   writel(con1, ADC_V1_CON(info-regs));
+   }
+}
+
  static int exynos_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val,
@@ -149,6 +173,8 @@ static int exynos_read_raw(struct iio_dev *indio_dev,
timeout = wait_for_completion_timeout
(info-completion, EXYNOS_ADC_TIMEOUT);
if (timeout == 0) {
+   dev_warn(indio_dev-dev, Conversion timed out! Resetting\n);
+   exynos_adc_hw_init(info);
ret = -ETIMEDOUT;
} else {
*val = info-value;
@@ -230,30 +256,6 @@ static int exynos_adc_remove_devices(struct device *dev, 
void *c)
return 0;
  }

-static void exynos_adc_hw_init(struct exynos_adc *info)
-{
-   u32 con1, con2;
-
-   if (info-version == ADC_V2) {
-   con1 = ADC_V2_CON1_SOFT_RESET;
-   writel(con1, ADC_V2_CON1(info-regs));
-
-   con2 = ADC_V2_CON2_OSEL | ADC_V2_CON2_ESEL |
-   ADC_V2_CON2_HIGHF | ADC_V2_CON2_C_TIME(0);
-   writel(con2, ADC_V2_CON2(info-regs));
-
-   /* Enable interrupts */
-   writel(1, ADC_V2_INT_EN(info-regs));
-   } else {
-   /* set default prescaler values and Enable prescaler */
-   con1 =  ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN;
-
-   /* Enable 12-bit ADC resolution */
-   con1 |= ADC_V1_CON_RES;
-   writel(con1, ADC_V1_CON(info-regs));
-   }
-}
-
  static int exynos_adc_probe(struct platform_device *pdev)
  {
struct exynos_adc *info = NULL;



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Re: [PATCH 5/5 v3] iio: exynos_adc: do a reinit_completion before the conversion

2014-04-30 Thread Jonathan Cameron

On 30/04/14 10:26, Naveen Krishna Chatradhi wrote:

Add reinit_completion() before the wait_for_completion_timeout in
raw_read() call.

Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Reviewed-by: Doug Anderson diand...@chromium.org

Applied to the togreg branch of iio.git
I wasn't sure if this one was technically a fix, but as it isn't
marked clearly as such it can go in during the next merge window.
I won't have pushed this out to a non rebasing branch until tomorrow
so if this fixes an observed issue then let me know and it might move
to the fixes-togreg branch.

Thanks,

Jonathan

---
Changes since v2:
None
Changes since v1:
None
v0:
This change is a part of the patch reviewed at 
https://lkml.org/lkml/2013/11/5/92

  drivers/iio/adc/exynos_adc.c |1 +
  1 file changed, 1 insertion(+)

diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
index eddc58e..010578f 100644
--- a/drivers/iio/adc/exynos_adc.c
+++ b/drivers/iio/adc/exynos_adc.c
@@ -151,6 +151,7 @@ static int exynos_read_raw(struct iio_dev *indio_dev,
return -EINVAL;

mutex_lock(indio_dev-mlock);
+   reinit_completion(info-completion);

/* Select the channel to be used and Trigger conversion */
if (info-version == ADC_V2) {



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Re: [PATCH 5/5 v3] iio: exynos_adc: do a reinit_completion before the conversion

2014-04-30 Thread Jonathan Cameron


On May 1, 2014 12:23:27 AM GMT+01:00, Doug Anderson diand...@chromium.org 
wrote:
Jonathan,

On Wed, Apr 30, 2014 at 1:49 PM, Jonathan Cameron ji...@kernel.org
wrote:
 On 30/04/14 10:26, Naveen Krishna Chatradhi wrote:

 Add reinit_completion() before the wait_for_completion_timeout in
 raw_read() call.

 Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
 Reviewed-by: Doug Anderson diand...@chromium.org

 Applied to the togreg branch of iio.git
 I wasn't sure if this one was technically a fix, but as it isn't
 marked clearly as such it can go in during the next merge window.
 I won't have pushed this out to a non rebasing branch until tomorrow
 so if this fixes an observed issue then let me know and it might move
 to the fixes-togreg branch.

As far as I know this doesn't fix an observed issue.  I believe it was
requested as part of a previous review and is finally reposted.  I
believe it's just extra precautions to make sure that some old IRQ
didn't accidentally complete us between the last transaction and this
one.

Old discussion is somewhere around here
https://patchwork.kernel.org/patch/2279591/
Thanks for clarifying this.

J

Thanks!

-Doug

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Re: [PATCH 1/5] iio: exynos_adc: use indio_dev-dev structure to handle child nodes

2014-04-26 Thread Jonathan Cameron

On 25/04/14 16:46, Doug Anderson wrote:

Naveen,

Thanks for sending this.  Given that Jonathan Cameron was involved in
the previous discussion, it probably would have been wise to include
him on the CC list.

In my case, don't worry too much as I have linux-iio coming into exactly
the same place in my inbox. Doug is correct that it is generally a good
idea unless someone has asked you not to.


On Fri, Apr 25, 2014 at 3:14 AM, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:

From: Naveen Krishna Ch ch.nav...@samsung.com

Using pdev-dev with device_for_each_child() would iterate over all
of the children of the platform device and delete them.
Thus, causing crashes during module unload.

We should be using the indio_dev-dev structure for
registering/unregistering child nodes.

Signed-off-by: Naveen Krishna Ch ch.nav...@samsung.com
---
This change was tested on top of
https://lkml.org/lkml/2014/4/21/481 from Doug.

  drivers/iio/adc/exynos_adc.c |6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)


Reported-by: Doug Anderson diand...@chromium.org
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org

Applied to the fixes-togreg branch of iio.git

Thanks,

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Re: [PATCH 1/5 v2] iio: exynos_adc: use indio_dev-dev structure to handle child nodes

2014-04-26 Thread Jonathan Cameron

On 26/04/14 12:37, Naveen Krishna Chatradhi wrote:

From: Naveen Krishna Ch ch.nav...@samsung.com

Using pdev-dev with device_for_each_child() would iterate over all
of the children of the platform device and delete them.
Thus, causing crashes during module unload.

We should be using the indio_dev-dev structure for
registering/unregistering child nodes.

Signed-off-by: Naveen Krishna Ch ch.nav...@samsung.com
Reported-by: Doug Anderson diand...@chromium.org
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
---

Oops, I applied this one earlier (from v1) but didn't send the email...
Never mind as there were no changes.

This change was tested on top of
https://lkml.org/lkml/2014/4/21/481 from Doug.

  drivers/iio/adc/exynos_adc.c |6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
index d25b262..affa93f 100644
--- a/drivers/iio/adc/exynos_adc.c
+++ b/drivers/iio/adc/exynos_adc.c
@@ -344,7 +344,7 @@ static int exynos_adc_probe(struct platform_device *pdev)

exynos_adc_hw_init(info);

-   ret = of_platform_populate(np, exynos_adc_match, NULL, pdev-dev);
+   ret = of_platform_populate(np, exynos_adc_match, NULL, indio_dev-dev);
if (ret  0) {
dev_err(pdev-dev, failed adding child nodes\n);
goto err_of_populate;
@@ -353,7 +353,7 @@ static int exynos_adc_probe(struct platform_device *pdev)
return 0;

  err_of_populate:
-   device_for_each_child(pdev-dev, NULL,
+   device_for_each_child(indio_dev-dev, NULL,
exynos_adc_remove_devices);
regulator_disable(info-vdd);
clk_disable_unprepare(info-clk);
@@ -369,7 +369,7 @@ static int exynos_adc_remove(struct platform_device *pdev)
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
struct exynos_adc *info = iio_priv(indio_dev);

-   device_for_each_child(pdev-dev, NULL,
+   device_for_each_child(indio_dev-dev, NULL,
exynos_adc_remove_devices);
regulator_disable(info-vdd);
clk_disable_unprepare(info-clk);



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Re: [PATCHv2 1/2] iio: adc: exynos_adc: Control special clock of ADC to support Exynos3250 ADC

2014-04-16 Thread Jonathan Cameron


On April 16, 2014 2:13:39 AM GMT+01:00, Chanwoo Choi cw00.c...@samsung.com 
wrote:
Hi Jonathan,

Any comment of this patchset?

Best Regards,
Chanwoo Choi
Hi Chanwoo

Not got to it yet I'm afraid. May be sometime next week before I do.

Jonathan

On 04/14/2014 06:07 PM, Chanwoo Choi wrote:
 This patch control special clock for ADC in Exynos series's FSYS
block.
 If special clock of ADC is registerd on clock list of common clk
framework,
 Exynos ADC drvier have to control this clock.
 
 Exynos3250/Exynos4/Exynos5 has 'adc' clock as following:
 - 'adc' clock: bus clock for ADC
 
 Exynos3250 has additional 'sclk_tsadc' clock as following:
 - 'sclk_tsadc' clock: special clock for ADC which provide clock to
internal ADC
 
 Exynos 4210/4212/4412 and Exynos5250/5420 has not included
'sclk_tsadc' clock
 in FSYS_BLK. But, Exynos3250 based on Cortex-A7 has only included
'sclk_tsadc'
 clock in FSYS_BLK.
 
 Cc: Jonathan Cameron ji...@kernel.org
 Cc: Kukjin Kim kgene@samsung.com
 Cc: Naveen Krishna Chatradhi
 Cc: linux-...@vger.kernel.org
 Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
 Acked-by: Kyungmin Park kyungmin.p...@samsung.com
 ---
  drivers/iio/adc/exynos_adc.c | 54
+---
  1 file changed, 41 insertions(+), 13 deletions(-)
 
 diff --git a/drivers/iio/adc/exynos_adc.c
b/drivers/iio/adc/exynos_adc.c
 index d25b262..3c99243 100644
 --- a/drivers/iio/adc/exynos_adc.c
 +++ b/drivers/iio/adc/exynos_adc.c
 @@ -40,8 +40,9 @@
  #include linux/iio/driver.h
  
  enum adc_version {
 -ADC_V1,
 -ADC_V2
 +ADC_V1 = 0x1,
 +ADC_V2 = 0x2,
 +ADC_V3 = (ADC_V1 | ADC_V2),
  };
  
  /* EXYNOS4412/5250 ADC_V1 registers definitions */
 @@ -88,6 +89,7 @@ struct exynos_adc {
  void __iomem*regs;
  void __iomem*enable_reg;
  struct clk  *clk;
 +struct clk  *sclk;
  unsigned intirq;
  struct regulator*vdd;
  
 @@ -100,6 +102,7 @@ struct exynos_adc {
  static const struct of_device_id exynos_adc_match[] = {
  { .compatible = samsung,exynos-adc-v1, .data = (void *)ADC_V1 },
  { .compatible = samsung,exynos-adc-v2, .data = (void *)ADC_V2 },
 +{ .compatible = samsung,exynos-adc-v3, .data = (void *)ADC_V3 },
  {},
  };
  MODULE_DEVICE_TABLE(of, exynos_adc_match);
 @@ -128,7 +131,7 @@ static int exynos_read_raw(struct iio_dev
*indio_dev,
  mutex_lock(indio_dev-mlock);
  
  /* Select the channel to be used and Trigger conversion */
 -if (info-version == ADC_V2) {
 +if (info-version  ADC_V2) {
  con2 = readl(ADC_V2_CON2(info-regs));
  con2 = ~ADC_V2_CON2_ACH_MASK;
  con2 |= ADC_V2_CON2_ACH_SEL(chan-address);
 @@ -165,7 +168,7 @@ static irqreturn_t exynos_adc_isr(int irq, void
*dev_id)
  info-value = readl(ADC_V1_DATX(info-regs)) 
  ADC_DATX_MASK;
  /* clear irq */
 -if (info-version == ADC_V2)
 +if (info-version  ADC_V2)
  writel(1, ADC_V2_INT_ST(info-regs));
  else
  writel(1, ADC_V1_INTCLR(info-regs));
 @@ -226,11 +229,25 @@ static int exynos_adc_remove_devices(struct
device *dev, void *c)
  return 0;
  }
  
 +static void exynos_adc_enable_clock(struct exynos_adc *info, bool
enable)
 +{
 +if (enable) {
 +clk_prepare_enable(info-clk);
 +if (info-version == ADC_V3)
 +clk_prepare_enable(info-sclk);
 +
 +} else {
 +if (info-version == ADC_V3)
 +clk_disable_unprepare(info-sclk);
 +clk_disable_unprepare(info-clk);
 +}
 +}
 +
  static void exynos_adc_hw_init(struct exynos_adc *info)
  {
  u32 con1, con2;
  
 -if (info-version == ADC_V2) {
 +if (info-version  ADC_V2) {
  con1 = ADC_V2_CON1_SOFT_RESET;
  writel(con1, ADC_V2_CON1(info-regs));
  
 @@ -300,6 +317,8 @@ static int exynos_adc_probe(struct
platform_device *pdev)
  
  writel(1, info-enable_reg);
  
 +info-version = exynos_adc_get_version(pdev);
 +
  info-clk = devm_clk_get(pdev-dev, adc);
  if (IS_ERR(info-clk)) {
  dev_err(pdev-dev, failed getting clock, err = %ld\n,
 @@ -308,6 +327,17 @@ static int exynos_adc_probe(struct
platform_device *pdev)
  goto err_irq;
  }
  
 +if (info-version == ADC_V3) {
 +info-sclk = devm_clk_get(pdev-dev, sclk_tsadc);
 +if (IS_ERR(info-sclk)) {
 +dev_warn(pdev-dev,
 +failed getting sclk clock, err = %ld\n,
 +PTR_ERR(info-sclk));
 +ret = PTR_ERR(info-sclk);
 +goto err_irq;
 +}
 +}
 +
  info-vdd = devm_regulator_get(pdev-dev, vdd);
  if (IS_ERR(info-vdd)) {
  dev_err(pdev-dev, failed getting regulator, err = %ld\n,
 @@ -316,8 +346,6 @@ static int exynos_adc_probe(struct
platform_device *pdev

Re: [PATCHv2 1/2] iio: adc: exynos_adc: Control special clock of ADC to support Exynos3250 ADC

2014-04-16 Thread Jonathan Cameron


On April 16, 2014 5:55:17 AM GMT+01:00, Chanwoo Choi cw00.c...@samsung.com 
wrote:
Hi Sachin,

On 04/16/2014 01:44 PM, Chanwoo Choi wrote:
 Hi Sachin,
 
 On 04/16/2014 12:48 PM, Sachin Kamat wrote:
 Hi Chanwoo,

 On 14 April 2014 14:37, Chanwoo Choi cw00.c...@samsung.com wrote:
 This patch control special clock for ADC in Exynos series's FSYS
block.
 If special clock of ADC is registerd on clock list of common clk
framework,
 Exynos ADC drvier have to control this clock.

 Exynos3250/Exynos4/Exynos5 has 'adc' clock as following:
 - 'adc' clock: bus clock for ADC

 Exynos3250 has additional 'sclk_tsadc' clock as following:
 - 'sclk_tsadc' clock: special clock for ADC which provide clock to
internal ADC

 Exynos 4210/4212/4412 and Exynos5250/5420 has not included
'sclk_tsadc' clock
 in FSYS_BLK. But, Exynos3250 based on Cortex-A7 has only included
'sclk_tsadc'
 clock in FSYS_BLK.

 Cc: Jonathan Cameron ji...@kernel.org
 Cc: Kukjin Kim kgene@samsung.com
 Cc: Naveen Krishna Chatradhi
 Cc: linux-...@vger.kernel.org
 Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
 Acked-by: Kyungmin Park kyungmin.p...@samsung.com
 ---
  drivers/iio/adc/exynos_adc.c | 54
+---
  1 file changed, 41 insertions(+), 13 deletions(-)

 diff --git a/drivers/iio/adc/exynos_adc.c
b/drivers/iio/adc/exynos_adc.c
 index d25b262..3c99243 100644
 --- a/drivers/iio/adc/exynos_adc.c
 +++ b/drivers/iio/adc/exynos_adc.c
 @@ -40,8 +40,9 @@
  #include linux/iio/driver.h

  enum adc_version {
 -   ADC_V1,
 -   ADC_V2
 +   ADC_V1 = 0x1,
 +   ADC_V2 = 0x2,
 +   ADC_V3 = (ADC_V1 | ADC_V2),

 Can't this be simply 0x3? Or is this not really a h/w version?
 
 Even thought ADC_V3 isn't h/w revision, ADC_V3 include all featues of
ADC_V2
 and only one difference of clock(sclk_tsadc) from ADC_V2.
 I want to describethat ADC_V3 include ADC_V2 feature So, I add as
following:
   +   ADC_V3 = (ADC_V1 | ADC_V2),
 

  };

  /* EXYNOS4412/5250 ADC_V1 registers definitions */
 @@ -88,6 +89,7 @@ struct exynos_adc {
 void __iomem*regs;
 void __iomem*enable_reg;
 struct clk  *clk;
 +   struct clk  *sclk;
 unsigned intirq;
 struct regulator*vdd;

 @@ -100,6 +102,7 @@ struct exynos_adc {
  static const struct of_device_id exynos_adc_match[] = {
 { .compatible = samsung,exynos-adc-v1, .data = (void
*)ADC_V1 },
 { .compatible = samsung,exynos-adc-v2, .data = (void
*)ADC_V2 },
 +   { .compatible = samsung,exynos-adc-v3, .data = (void
*)ADC_V3 },
 {},
  };
  MODULE_DEVICE_TABLE(of, exynos_adc_match);
 @@ -128,7 +131,7 @@ static int exynos_read_raw(struct iio_dev
*indio_dev,
 mutex_lock(indio_dev-mlock);

 /* Select the channel to be used and Trigger conversion */
 -   if (info-version == ADC_V2) {
 +   if (info-version  ADC_V2) {

 So, now this would be applicable for ADC_V3 too, right?

ADC_V3 isn't h/w version. So, I think this code is proper instead of
using ADC_V3 direclty.
I want to use ADC_V3 version on checking clock(sclk_tsadc).



 con2 = readl(ADC_V2_CON2(info-regs));
 con2 = ~ADC_V2_CON2_ACH_MASK;
 con2 |= ADC_V2_CON2_ACH_SEL(chan-address);
 @@ -165,7 +168,7 @@ static irqreturn_t exynos_adc_isr(int irq, void
*dev_id)
 info-value = readl(ADC_V1_DATX(info-regs)) 
 ADC_DATX_MASK;
 /* clear irq */
 -   if (info-version == ADC_V2)
 +   if (info-version  ADC_V2)
 writel(1, ADC_V2_INT_ST(info-regs));
 else
 writel(1, ADC_V1_INTCLR(info-regs));
 @@ -226,11 +229,25 @@ static int exynos_adc_remove_devices(struct
device *dev, void *c)
 return 0;
  }

 +static void exynos_adc_enable_clock(struct exynos_adc *info, bool
enable)
 +{
 +   if (enable) {
 +   clk_prepare_enable(info-clk);

 This could fail. Is it OK without any checks?
 
 OK, I'll check return value.

Do you want to check return value always?
I think again, Some device drivers in mainline would not check
return value of clock function. If maintainer confirm this
modification,
I'll fix it as your comment.
Its general good practice to check all return values. Even if a function 
doesn't return an 
error now, it might in future. There is lots of old or lazy code out there 
doing many much 
stranger things than this!

So yes, please check return values and pass on up the call stack if an error.

Best Regards,
Chanwoo Choi
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Re: [PATCH] iio: adc: exynos_adc: Control special clock of ADC to support Exynos3250 ADC

2014-04-12 Thread Jonathan Cameron


On April 11, 2014 11:45:42 PM GMT+01:00, 최찬우 cwcho...@gmail.com wrote:
Hi Bartlomiej,

On Fri, Apr 11, 2014 at 6:41 PM, Bartlomiej Zolnierkiewicz
b.zolnier...@samsung.com wrote:

 Hi,

 On Friday, April 11, 2014 11:00:40 AM Chanwoo Choi wrote:
 This patch control special clock for ADC in Exynos series's FSYS
block.

 s/control/controls/

I'll fix it.


 If special clock of ADC is registerd on clock list of common clk
framework,
 Exynos ADC drvier have to control this clock.

 s/drvier/driver/

I'll fix it.


 Exynos3250/Exynos4/Exynos5 has 'adc' clock as following:
 - 'adc' clock: bus clock for ADC

 Exynos3250 has additional 'sclk_tsadc' clock as following:
 - 'sclk_tsadc' clock: special clock for ADC which provide clock to
internal ADC

 Exynos 4210/4212/4412 and Exynos5250/5420 has not included
'sclk_tsadc' clock
 in FSYS_BLK. But, Exynos3250 based on Cortex-A7 has only included
'sclk_tsadc'
 clock in FSYS_BLK.

 Cc: Jonathan Cameron ji...@kernel.org
 Cc: Kukjin Kim kgene@samsung.com
 Cc: Naveen Krishna Chatradhi ch.nav...@samsung.com
 Cc: linux-...@vger.kernel.org
 Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
 Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
 ---
  drivers/iio/adc/exynos_adc.c | 13 +
  1 file changed, 13 insertions(+)

 diff --git a/drivers/iio/adc/exynos_adc.c
b/drivers/iio/adc/exynos_adc.c
 index d25b262..4cd1975 100644
 --- a/drivers/iio/adc/exynos_adc.c
 +++ b/drivers/iio/adc/exynos_adc.c
 @@ -88,6 +88,7 @@ struct exynos_adc {
   void __iomem*regs;
   void __iomem*enable_reg;
   struct clk  *clk;
 + struct clk  *sclk;
   unsigned intirq;
   struct regulator*vdd;

 @@ -308,6 +309,13 @@ static int exynos_adc_probe(struct
platform_device *pdev)
   goto err_irq;
   }

 + info-sclk = devm_clk_get(pdev-dev, sclk_tsadc);
 + if (IS_ERR(info-sclk)) {
 + dev_warn(pdev-dev, failed getting sclk clock, err =
%ld\n,
 +
PTR_ERR(info-sclk));
 + info-sclk = NULL;
 + }
 +
   info-vdd = devm_regulator_get(pdev-dev, vdd);
   if (IS_ERR(info-vdd)) {
   dev_err(pdev-dev, failed getting regulator, err =
%ld\n,
 @@ -341,6 +349,7 @@ static int exynos_adc_probe(struct
platform_device *pdev)
   goto err_iio_dev;

   clk_prepare_enable(info-clk);
 + clk_prepare_enable(info-sclk);

   exynos_adc_hw_init(info);

 @@ -357,6 +366,7 @@ err_of_populate:
   exynos_adc_remove_devices);
   regulator_disable(info-vdd);
   clk_disable_unprepare(info-clk);
 + clk_disable_unprepare(info-sclk);

 Please disable clocks in the reverse of order in which they were
enabled.

Is it necessary? I don't think that.
It is probably not a bug but it is more obviously correct in the reverse order 
so that is how it should be done!

Best Regards,
Chanwoo Choi

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Re: [PATCH] iio: exynos_adc: fix wrong structure extration in suspend and resume

2013-05-22 Thread Jonathan Cameron
On 05/20/2013 06:09 PM, Doug Anderson wrote:
 Naveen,
 
 On Sun, May 19, 2013 at 11:34 PM, Naveen Krishna Chatradhi
 ch.nav...@samsung.com wrote:
 The exynos_adc device structure was wrongly extracted from the dev*
 correcting the same.

 Using the regular conversion of
 struct device* - struct platform_device* - struct exynos_adc* seems wrong.
 Instead we should be doing
 struct device* - struct iio_dev* - struct exynos_adc*

 Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
 ---
  drivers/iio/adc/exynos_adc.c | 8 
  1 file changed, 4 insertions(+), 4 deletions(-)
 
 Reviewed-by: Doug Anderson diand...@chromium.org
Applied to the fixes-togreg branch of iio.git
I'll hopefully send these on to Greg before the weekend.
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Re: [PATCH 1/2] iio: adc: Kconfig: exynos_adc depends on CONFIG_OF

2013-03-17 Thread Jonathan Cameron
On 03/15/2013 06:09 PM, Doug Anderson wrote:
 Naveen,
 
 On Fri, Mar 15, 2013 at 9:23 AM, Naveen Krishna Chatradhi
 ch.nav...@samsung.com wrote:
 As the exynos_adc driver only supports device tree registration.
 Making driver depend on CONFIG_OF solves possible errors during probe.

 Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
 Reported-by: Dan Carpenter dan.carpen...@oracle.com
 Cc: Doug Anderson diand...@chromium.org
 Cc: Lars-Peter Clausen l...@metafoo.de
 ---
 Discussion thread for this patch can be found at
 http://www.gossamer-threads.com/lists/linux/kernel/1693284?page=last

  drivers/iio/adc/Kconfig |1 +
  1 file changed, 1 insertion(+)
 
 Reviewed-by: Doug Anderson diand...@chromium.org
Applied to togreg branch of iio.git, thanks,

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Re: [PATCH v7] iio: adc: add exynos adc driver under iio framwork

2013-03-03 Thread Jonathan Cameron
On 02/15/2013 01:35 PM, Naveen Krishna Ch wrote:
 On 15 February 2013 18:56, Lars-Peter Clausen l...@metafoo.de wrote:
 On 02/15/2013 02:17 PM, Naveen Krishna Ch wrote:
 On 15 February 2013 18:43, Lars-Peter Clausen l...@metafoo.de wrote:
 On 02/15/2013 07:56 AM, Naveen Krishna Chatradhi wrote:
 This patch adds New driver to support:
 1. Supports ADC IF found on EXYNOS4412/EXYNOS5250
and future SoCs from Samsung
 2. Add ADC driver under iio/adc framework
 3. Also adds the Documentation for device tree bindings

 Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com

 Looks good.

 Reviewed-by: Lars-Peter Clausen l...@metafoo.de
Applied to togreg branch of iio.git

Thanks,


 One minor thing though, there are a couple of places where you break a line
 into multiple lines, even though the line fits easily inside the 80 chars
 per line limit. In my opinion this doesn't help the legibility of the code.
 E.g.:

 +   info-value = readl(ADC_V1_DATX(info-regs)) 
 +   ADC_DATX_MASK;

 There is no need to respin the patch just for this, but if you happen to
 make another version of the patch, that's something to consider.

 ---
 Changes since v1:

 1. Fixed comments from Lars
 2. Added support for ADC on EXYNOS5410

 Changes since v2:

 1. Changed the instance name for (struct iio_dev *) to indio_dev
 2. Changed devm_request_irq to request_irq

 Few doubts regarding the mappings and child device handling.
 Kindly, suggest me better methods.

 Changes since v3:

 1. Added clk_prepare_disable and regulator_disable calls in _remove()
 2. Moved init_completion before irq_request
 3. Added NULL pointer check for devm_request_and_ioremap() return value.
 4. Use number of channels as per the ADC version
 5. Change the define ADC_V1_CHANNEL to ADC_CHANNEL
 6. Update the Documentation to include EXYNOS5410 compatible

 Changes since v4:

 1. if devm_request_and_ioremap() failes, free iio_device before returning

 Changes since v5:

 1. Fixed comments from Olof (ADC hardware version handling)
 2. Rebased on top of comming OF framework for IIO by Guenter Roeck.

 Changes since v6:

 1. Addressed comments from Lars-Peter Clausen


 btw. these kind of change logs are not really helpful, it would be better 
 to
 list the actual changes made.
 Hello Lars,

 No other changes from my side. But, I can send another version.
 Do you want me to list the latest change alone instead of the whole
 change list ?

 Hi,

 No need to resend the patch, this is just something to consider for the
 future. A changelog entry which reads like Addressed Jon Does comments is
 not really useful since most people will probably not know or not longer
 remember all the details of those comments, instead a nice list of all the
 changes which have been made is much better. E.g.:

 Changes since v6:
 * Fixed debugfs_read_reg
 * Introduced timeout when waiting for the data ready IRQ
 * Slightly reformatted exynos_read_raw for better legibility

 - Lars
 
 Thanks for your comments and valuable time.
 Sure Lars, Will do it.


 
 
 
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Re: [PATCH] iio: adc: add exynos5 adc driver under iio framwork

2013-01-26 Thread Jonathan Cameron
On 01/24/2013 04:58 AM, Naveen Krishna Chatradhi wrote:
 This patch adds driver for ADC IP found on EXYNOS5250 and EXYNOS5410
 from Samsung. Also adds the Documentation for device tree bindings.
 
 Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Just a quick general comment on patch formatting. For later versions give
a title of
[PATCH V5]...
to the email as then it's easy for those of us who have been sitting
back and quitely not reading the thread to figure out which the latest
patch is.

Thanks

Jonathan

 ---
 Changes since v1:
 
 1. Fixed comments from Lars
 2. Added support for ADC on EXYNOS5410
 
 Changes since v2:
 
 1. Changed the instance name for (struct iio_dev *) to indio_dev
 2. Changed devm_request_irq to request_irq
 
 Few doubts regarding the mappings and child device handling.
 Kindly, suggest me better methods.
 
 Changes since v3:
 
 1. Added clk_prepare_disable and regulator_disable calls in _remove()
 2. Moved init_completion before irq_request
 3. Added NULL pointer check for devm_request_and_ioremap() return value.
 4. Use number of channels as per the ADC version 
 5. Change the define ADC_V1_CHANNEL to ADC_CHANNEL
 6. Update the Documentation to include EXYNOS5410 compatible
 
 Doug, i've used
   chan = iio_channel_get(dev_name(pdev-dev), adc3);
 in ntc thermistor driver during probe and
   iio_read_channel_raw(chan, val);
 for read.
 
 But, then the drivers become kind of coupled. Right.
 
 Lars, Is there an other way.
 
 Thanks for the comments
 
  .../bindings/arm/samsung/exynos5-adc.txt   |   38 ++
  drivers/iio/adc/Kconfig|7 +
  drivers/iio/adc/Makefile   |1 +
  drivers/iio/adc/exynos5_adc.c  |  475 
 
  4 files changed, 521 insertions(+)
  create mode 100644 
 Documentation/devicetree/bindings/arm/samsung/exynos5-adc.txt
  create mode 100644 drivers/iio/adc/exynos5_adc.c
 
 diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos5-adc.txt 
 b/Documentation/devicetree/bindings/arm/samsung/exynos5-adc.txt
 new file mode 100644
 index 000..0f281d9
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/arm/samsung/exynos5-adc.txt
 @@ -0,0 +1,38 @@
 +Samsung Exynos5 Analog to Digital Converter bindings
 +
 +Required properties:
 +- compatible:Must be samsung,exynos5250-adc for exynos5250 
 controllers.
 + Must be samsung,exynos5410-adc for exynos5410 
 controllers.
 +- reg:   Contains ADC register address range (base 
 address and
 + length).
 +- interrupts:Contains the interrupt information for the 
 timer. The
 + format is being dependent on which interrupt controller
 + the Samsung device uses.
 +
 +Note: child nodes can be added for auto probing from device tree.
 +
 +Example: adding device info in dtsi file
 +
 +adc@12D1 {
 + compatible = samsung,exynos5250-adc;
 + reg = 0x12D1 0x100;
 + interrupts = 0 106 0;
 + #address-cells = 1;
 + #size-cells = 1;
 + ranges;
 +};
 +
 +
 +Example: Adding child nodes in dts file
 +
 +adc@12D1 {
 +
 + /* NTC thermistor is a hwmon device */
 + ncp15wb473@0 {
 + compatible = ntc,ncp15wb473;
 + reg = 0x0;
 + pullup-uV = 180;
 + pullup-ohm = 47000;
 + pulldown-ohm = 0;
 + };
 +};
 diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
 index fe822a1..33ceabf 100644
 --- a/drivers/iio/adc/Kconfig
 +++ b/drivers/iio/adc/Kconfig
 @@ -91,6 +91,13 @@ config AT91_ADC
   help
 Say yes here to build support for Atmel AT91 ADC.
  
 +config EXYNOS5_ADC
 + bool Exynos5 ADC driver support
 + help
 +   Core support for the ADC block found in the Samsung EXYNOS5 series
 +   of SoCs for drivers such as the touchscreen and hwmon to use to share
 +   this resource.
 +
  config LP8788_ADC
   bool LP8788 ADC driver
   depends on MFD_LP8788
 diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
 index 2d5f100..5b4a4f6 100644
 --- a/drivers/iio/adc/Makefile
 +++ b/drivers/iio/adc/Makefile
 @@ -10,6 +10,7 @@ obj-$(CONFIG_AD7791) += ad7791.o
  obj-$(CONFIG_AD7793) += ad7793.o
  obj-$(CONFIG_AD7887) += ad7887.o
  obj-$(CONFIG_AT91_ADC) += at91_adc.o
 +obj-$(CONFIG_EXYNOS5_ADC) += exynos5_adc.o
  obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o
  obj-$(CONFIG_MAX1363) += max1363.o
  obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
 diff --git a/drivers/iio/adc/exynos5_adc.c b/drivers/iio/adc/exynos5_adc.c
 new file mode 100644
 index 000..4963649
 --- /dev/null
 +++ b/drivers/iio/adc/exynos5_adc.c
 @@ -0,0 +1,475 @@
 +/*
 + *  exynos5_adc.c - Support for ADC in EXYNOS5 SoCs
 + *
 + *  8 ~ 10 channel, 10/12-bit ADC
 + *
 + *  Copyright (C) 2013 Naveen Krishna Chatradhi ch.nav...@samsung.com
 + *
 + *  This program is free software; you can