[PATCH] ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412
Exynos4412 uses different information register for each core. This patch
adjusts the bring-up code to take that into account.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Reviewed-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/platsmp.c | 30 --
1 file changed, 24 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index f93d820..4ca8ff1 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -36,8 +36,22 @@
extern void exynos4_secondary_startup(void);
-#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
- S5P_INFORM5 : S5P_VA_SYSRAM)
+static inline void __iomem *cpu_boot_reg_base(void)
+{
+ if (soc_is_exynos4210() samsung_rev() == EXYNOS4210_REV_1_1)
+ return S5P_INFORM5;
+ return S5P_VA_SYSRAM;
+}
+
+static inline void __iomem *cpu_boot_reg(int cpu)
+{
+ void __iomem *boot_reg;
+
+ boot_reg = cpu_boot_reg_base();
+ if (soc_is_exynos4412())
+ boot_reg += 4*cpu;
+ return boot_reg;
+}
/*
* Write pen_release in a way that is guaranteed to be visible to all
@@ -84,6 +98,7 @@ static void __cpuinit exynos_secondary_init(unsigned int cpu)
static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct
task_struct *idle)
{
unsigned long timeout;
+ unsigned long phys_cpu = cpu_logical_map(cpu);
/*
* Set synchronisation state between this boot processor
@@ -99,7 +114,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu,
struct task_struct
* Note that pen_release is the hardware CPU ID, whereas
* cpu is Linux's internal ID.
*/
- write_pen_release(cpu_logical_map(cpu));
+ write_pen_release(phys_cpu);
if (!(__raw_readl(S5P_ARM_CORE1_STATUS) S5P_CORE_LOCAL_PWR_EN)) {
__raw_writel(S5P_CORE_LOCAL_PWR_EN,
@@ -133,7 +148,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int
cpu, struct task_struct
smp_rmb();
__raw_writel(virt_to_phys(exynos4_secondary_startup),
- CPU1_BOOT_REG);
+ cpu_boot_reg(phys_cpu));
gic_raise_softirq(cpumask_of(cpu), 0);
if (pen_release == -1)
@@ -181,6 +196,8 @@ static void __init exynos_smp_init_cpus(void)
static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
{
+ int i;
+
if (!soc_is_exynos5250())
scu_enable(scu_base_addr());
@@ -190,8 +207,9 @@ static void __init exynos_smp_prepare_cpus(unsigned int
max_cpus)
* until it receives a soft interrupt, and then the
* secondary CPU branches to this address.
*/
- __raw_writel(virt_to_phys(exynos4_secondary_startup),
- CPU1_BOOT_REG);
+ for (i = 1; i max_cpus; ++i)
+ __raw_writel(virt_to_phys(exynos4_secondary_startup),
+ cpu_boot_reg(cpu_logical_map(i)));
}
struct smp_operations exynos_smp_ops __initdata = {
--
1.8.0
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RE: [PATCH] ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412
Tomasz Figa wrote:
Exynos4412 uses different information register for each core. This patch
adjusts the bring-up code to take that into account.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Reviewed-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/platsmp.c | 30 --
1 file changed, 24 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index f93d820..4ca8ff1 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -36,8 +36,22 @@
extern void exynos4_secondary_startup(void);
-#define CPU1_BOOT_REG(samsung_rev() == EXYNOS4210_REV_1_1 ? \
- S5P_INFORM5 : S5P_VA_SYSRAM)
+static inline void __iomem *cpu_boot_reg_base(void)
+{
+ if (soc_is_exynos4210() samsung_rev() == EXYNOS4210_REV_1_1)
+ return S5P_INFORM5;
+ return S5P_VA_SYSRAM;
+}
+
+static inline void __iomem *cpu_boot_reg(int cpu)
+{
+ void __iomem *boot_reg;
+
+ boot_reg = cpu_boot_reg_base();
+ if (soc_is_exynos4412())
+ boot_reg += 4*cpu;
+ return boot_reg;
+}
/*
* Write pen_release in a way that is guaranteed to be visible to all
@@ -84,6 +98,7 @@ static void __cpuinit exynos_secondary_init(unsigned int
cpu)
static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct
task_struct *idle)
{
unsigned long timeout;
+ unsigned long phys_cpu = cpu_logical_map(cpu);
/*
* Set synchronisation state between this boot processor
@@ -99,7 +114,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int
cpu, struct task_struct
* Note that pen_release is the hardware CPU ID, whereas
* cpu is Linux's internal ID.
*/
- write_pen_release(cpu_logical_map(cpu));
+ write_pen_release(phys_cpu);
if (!(__raw_readl(S5P_ARM_CORE1_STATUS) S5P_CORE_LOCAL_PWR_EN)) {
__raw_writel(S5P_CORE_LOCAL_PWR_EN,
@@ -133,7 +148,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int
cpu, struct task_struct
smp_rmb();
__raw_writel(virt_to_phys(exynos4_secondary_startup),
- CPU1_BOOT_REG);
+ cpu_boot_reg(phys_cpu));
gic_raise_softirq(cpumask_of(cpu), 0);
if (pen_release == -1)
@@ -181,6 +196,8 @@ static void __init exynos_smp_init_cpus(void)
static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
{
+ int i;
+
if (!soc_is_exynos5250())
scu_enable(scu_base_addr());
@@ -190,8 +207,9 @@ static void __init exynos_smp_prepare_cpus(unsigned int
max_cpus)
* until it receives a soft interrupt, and then the
* secondary CPU branches to this address.
*/
- __raw_writel(virt_to_phys(exynos4_secondary_startup),
- CPU1_BOOT_REG);
+ for (i = 1; i max_cpus; ++i)
+ __raw_writel(virt_to_phys(exynos4_secondary_startup),
+ cpu_boot_reg(cpu_logical_map(i)));
}
struct smp_operations exynos_smp_ops __initdata = {
--
1.8.0
Looks OK to me, will apply.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
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[PATCH] ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412
Exynos4412 uses different information register for each core. This patch
adjusts the bring-up code to take that into account.
Signed-off-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/platsmp.c | 25 -
1 file changed, 20 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 36c3984..1114ced 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -34,8 +34,19 @@
extern void exynos4_secondary_startup(void);
-#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
- S5P_INFORM5 : S5P_VA_SYSRAM)
+static inline volatile void *cpu_boot_reg_base(void)
+{
+ if (soc_is_exynos4210() samsung_rev() == EXYNOS4210_REV_1_1)
+ return S5P_INFORM5;
+ return S5P_VA_SYSRAM;
+}
+
+static inline volatile void *cpu_boot_reg(int cpu)
+{
+ if (soc_is_exynos4412())
+ return cpu_boot_reg_base() + 4*cpu;
+ return cpu_boot_reg_base();
+}
/*
* control for which core is the next to come out of the secondary
@@ -138,7 +149,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct
task_struct *idle)
smp_rmb();
__raw_writel(virt_to_phys(exynos4_secondary_startup),
- CPU1_BOOT_REG);
+ cpu_boot_reg(cpu));
gic_raise_softirq(cpumask_of(cpu), 1);
if (pen_release == -1)
@@ -186,6 +197,8 @@ void __init smp_init_cpus(void)
void __init platform_smp_prepare_cpus(unsigned int max_cpus)
{
+ int i;
+
if (!soc_is_exynos5250())
scu_enable(scu_base_addr());
@@ -195,6 +208,8 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
* until it receives a soft interrupt, and then the
* secondary CPU branches to this address.
*/
- __raw_writel(virt_to_phys(exynos4_secondary_startup),
- CPU1_BOOT_REG);
+ for (i = 1; i max_cpus; ++i) {
+ __raw_writel(virt_to_phys(exynos4_secondary_startup),
+ cpu_boot_reg(i));
+ }
}
--
1.7.12
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Re: [PATCH] ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412
On 8/28/2012 4:13 AM, Tomasz Figa wrote:
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 36c3984..1114ced 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -34,8 +34,19 @@
extern void exynos4_secondary_startup(void);
-#define CPU1_BOOT_REG(samsung_rev() == EXYNOS4210_REV_1_1 ? \
- S5P_INFORM5 : S5P_VA_SYSRAM)
+static inline volatile void *cpu_boot_reg_base(void)
__iomem?
+{
+ if (soc_is_exynos4210() samsung_rev() == EXYNOS4210_REV_1_1)
+ return S5P_INFORM5;
+ return S5P_VA_SYSRAM;
+}
+
+static inline volatile void *cpu_boot_reg(int cpu)
__iomem? And why volatile?
+{
+ if (soc_is_exynos4412())
+ return cpu_boot_reg_base() + 4*cpu;
+ return cpu_boot_reg_base();
+}
/*
* control for which core is the next to come out of the secondary
@@ -195,6 +208,8 @@ void __init platform_smp_prepare_cpus(unsigned int
max_cpus)
* until it receives a soft interrupt, and then the
* secondary CPU branches to this address.
*/
- __raw_writel(virt_to_phys(exynos4_secondary_startup),
- CPU1_BOOT_REG);
+ for (i = 1; i max_cpus; ++i) {
+ __raw_writel(virt_to_phys(exynos4_secondary_startup),
+ cpu_boot_reg(i));
Do you need to use cpu_logical_map()?
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Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
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Re: [PATCH] ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412
Hi,
Thanks for reviewing the patch.
On Tuesday 28 of August 2012 09:21:40 Stephen Boyd wrote:
On 8/28/2012 4:13 AM, Tomasz Figa wrote:
diff --git a/arch/arm/mach-exynos/platsmp.c
b/arch/arm/mach-exynos/platsmp.c index 36c3984..1114ced 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -34,8 +34,19 @@
extern void exynos4_secondary_startup(void);
-#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
- S5P_INFORM5 : S5P_VA_SYSRAM)
+static inline volatile void *cpu_boot_reg_base(void)
__iomem?
Sorry, bad habit. I will fix it.
+{
+ if (soc_is_exynos4210() samsung_rev() == EXYNOS4210_REV_1_1)
+ return S5P_INFORM5;
+ return S5P_VA_SYSRAM;
+}
+
+static inline volatile void *cpu_boot_reg(int cpu)
__iomem? And why volatile?
Ditto.
+{
+ if (soc_is_exynos4412())
+ return cpu_boot_reg_base() + 4*cpu;
+ return cpu_boot_reg_base();
+}
/*
* control for which core is the next to come out of the secondary
@@ -195,6 +208,8 @@ void __init platform_smp_prepare_cpus(unsigned int
max_cpus)
* until it receives a soft interrupt, and then the
* secondary CPU branches to this address.
*/
- __raw_writel(virt_to_phys(exynos4_secondary_startup),
- CPU1_BOOT_REG);
+ for (i = 1; i max_cpus; ++i) {
+ __raw_writel(virt_to_phys(exynos4_secondary_startup),
+ cpu_boot_reg(i));
Do you need to use cpu_logical_map()?
Correct me if I am wrong, but physical to logical CPU mapping will not be
1:1 only if booted on physical CPU other than 0. I have not seen yet an
Exynos-based board which does it.
However it might be wiser to use cpu_logical_map() just to be safe indeed.
I will add it in next version of the patch.
--
Best regards,
Tomasz Figa
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