Re: [PATCH 10/25] drm/exynos: move dma_addr attribute from exynos plane to exynos fb

[Gustavo Padovan]

Hi Marek,

2015-11-10 Marek Szyprowski :

> DMA address is a framebuffer attribute and the right place for it is
> exynos_drm_framebuffer not exynos_drm_plane. This patch also introduces
> helper function for getting dma address of the given framebuffer.
> 
> Signed-off-by: Marek Szyprowski 
> ---
>  drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 13 -
>  drivers/gpu/drm/exynos/exynos7_drm_decon.c| 16 +---
>  drivers/gpu/drm/exynos/exynos_drm_drv.h   |  3 ---
>  drivers/gpu/drm/exynos/exynos_drm_fb.c| 16 ++--
>  drivers/gpu/drm/exynos/exynos_drm_fb.h|  3 +--
>  drivers/gpu/drm/exynos/exynos_drm_fimd.c  | 10 ++
>  drivers/gpu/drm/exynos/exynos_drm_plane.c | 18 --
>  drivers/gpu/drm/exynos/exynos_drm_vidi.c  |  5 -
>  drivers/gpu/drm/exynos/exynos_mixer.c |  7 ---
>  9 files changed, 38 insertions(+), 53 deletions(-)

Reviewed-by: Gustavo Padovan 

Gustavo
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[PATCH 10/25] drm/exynos: move dma_addr attribute from exynos plane to exynos fb

[Marek Szyprowski]

DMA address is a framebuffer attribute and the right place for it is
exynos_drm_framebuffer not exynos_drm_plane. This patch also introduces
helper function for getting dma address of the given framebuffer.

Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 13 -
 drivers/gpu/drm/exynos/exynos7_drm_decon.c| 16 +---
 drivers/gpu/drm/exynos/exynos_drm_drv.h   |  3 ---
 drivers/gpu/drm/exynos/exynos_drm_fb.c| 16 ++--
 drivers/gpu/drm/exynos/exynos_drm_fb.h|  3 +--
 drivers/gpu/drm/exynos/exynos_drm_fimd.c  | 10 ++
 drivers/gpu/drm/exynos/exynos_drm_plane.c | 18 --
 drivers/gpu/drm/exynos/exynos_drm_vidi.c  |  5 -
 drivers/gpu/drm/exynos/exynos_mixer.c |  7 ---
 9 files changed, 38 insertions(+), 53 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index fbe1b3174f75..a3161b0428b9 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -21,6 +21,7 @@
 
 #include "exynos_drm_drv.h"
 #include "exynos_drm_crtc.h"
+#include "exynos_drm_fb.h"
 #include "exynos_drm_plane.h"
 #include "exynos_drm_iommu.h"
 
@@ -261,9 +262,11 @@ static void decon_update_plane(struct exynos_drm_crtc 
*crtc,
 {
struct decon_context *ctx = crtc->ctx;
struct drm_plane_state *state = plane->base.state;
+   struct drm_framebuffer *fb = state->fb;
unsigned int win = plane->zpos;
-   unsigned int bpp = state->fb->bits_per_pixel >> 3;
-   unsigned int pitch = state->fb->pitches[0];
+   unsigned int bpp = fb->bits_per_pixel >> 3;
+   unsigned int pitch = fb->pitches[0];
+   dma_addr_t dma_addr = exynos_drm_fb_dma_addr(fb, 0);
u32 val;
 
if (test_bit(BIT_SUSPENDED, >flags))
@@ -284,9 +287,9 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
VIDOSD_Wx_ALPHA_B_F(0x0);
writel(val, ctx->addr + DECON_VIDOSDxD(win));
 
-   writel(plane->dma_addr[0], ctx->addr + DECON_VIDW0xADD0B0(win));
+   writel(dma_addr, ctx->addr + DECON_VIDW0xADD0B0(win));
 
-   val = plane->dma_addr[0] + pitch * plane->crtc_h;
+   val = dma_addr + pitch * plane->crtc_h;
writel(val, ctx->addr + DECON_VIDW0xADD1B0(win));
 
if (ctx->out_type != IFTYPE_HDMI)
@@ -297,7 +300,7 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
| BIT_VAL(plane->crtc_w * bpp, 14, 0);
writel(val, ctx->addr + DECON_VIDW0xADD2(win));
 
-   decon_win_set_pixfmt(ctx, win, state->fb);
+   decon_win_set_pixfmt(ctx, win, fb);
 
/* window enable */
decon_set_bits(ctx, DECON_WINCONx(win), WINCONx_ENWIN_F, ~0);
diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
index d50c26a41e09..15e1e165020f 100644
--- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
@@ -30,6 +30,7 @@
 #include "exynos_drm_crtc.h"
 #include "exynos_drm_plane.h"
 #include "exynos_drm_drv.h"
+#include "exynos_drm_fb.h"
 #include "exynos_drm_fbdev.h"
 #include "exynos_drm_iommu.h"
 
@@ -400,13 +401,14 @@ static void decon_update_plane(struct exynos_drm_crtc 
*crtc,
 {
struct decon_context *ctx = crtc->ctx;
struct drm_plane_state *state = plane->base.state;
+   struct drm_framebuffer *fb = state->fb;
int padding;
unsigned long val, alpha;
unsigned int last_x;
unsigned int last_y;
unsigned int win = plane->zpos;
-   unsigned int bpp = state->fb->bits_per_pixel >> 3;
-   unsigned int pitch = state->fb->pitches[0];
+   unsigned int bpp = fb->bits_per_pixel >> 3;
+   unsigned int pitch = fb->pitches[0];
 
if (ctx->suspended)
return;
@@ -422,14 +424,14 @@ static void decon_update_plane(struct exynos_drm_crtc 
*crtc,
 */
 
/* buffer start address */
-   val = (unsigned long)plane->dma_addr[0];
+   val = (unsigned long)exynos_drm_fb_dma_addr(fb, 0);
writel(val, ctx->regs + VIDW_BUF_START(win));
 
-   padding = (pitch / bpp) - state->fb->width;
+   padding = (pitch / bpp) - fb->width;
 
/* buffer size */
-   writel(state->fb->width + padding, ctx->regs + VIDW_WHOLE_X(win));
-   writel(state->fb->height, ctx->regs + VIDW_WHOLE_Y(win));
+   writel(fb->width + padding, ctx->regs + VIDW_WHOLE_X(win));
+   writel(fb->height, ctx->regs + VIDW_WHOLE_Y(win));
 
/* offset from the start of the buffer to read */
writel(plane->src_x, ctx->regs + VIDW_OFFSET_X(win));
@@ -471,7 +473,7 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
 
writel(alpha, ctx->regs + VIDOSD_D(win));
 
-   decon_win_set_pixfmt(ctx, win, state->fb);
+   decon_win_set_pixfmt(ctx, win, fb);