Re: [PATCH 11/25] drm/exynos: introduce exynos_drm_plane_state structure

[Gustavo Padovan]

Hi Marek,

2015-11-10 Marek Szyprowski :

> This patch introduces exynos_drm_plane_state structure, which subclasses
> drm_plane_state and holds precalculated data suitable for configuring
> Exynos hardware.
> 
> Signed-off-by: Marek Szyprowski 
> ---
>  drivers/gpu/drm/exynos/exynos5433_drm_decon.c |  21 ++---
>  drivers/gpu/drm/exynos/exynos7_drm_decon.c|  21 ++---
>  drivers/gpu/drm/exynos/exynos_drm_drv.h   |  56 +++-
>  drivers/gpu/drm/exynos/exynos_drm_fimd.c  |  33 +++
>  drivers/gpu/drm/exynos/exynos_drm_plane.c | 125 
> +++---
>  drivers/gpu/drm/exynos/exynos_mixer.c |  61 +++--
>  6 files changed, 197 insertions(+), 120 deletions(-)
> 
> diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c 
> b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
> index a3161b0428b9..27039468364b 100644
> --- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
> +++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
> @@ -260,9 +260,10 @@ static void decon_atomic_begin(struct exynos_drm_crtc 
> *crtc,
>  static void decon_update_plane(struct exynos_drm_crtc *crtc,
>  struct exynos_drm_plane *plane)
>  {
> + struct exynos_drm_plane_state *state =
> + to_exynos_plane_state(plane->base.state);
>   struct decon_context *ctx = crtc->ctx;
> - struct drm_plane_state *state = plane->base.state;
> - struct drm_framebuffer *fb = state->fb;
> + struct drm_framebuffer *fb = state->base.fb;
>   unsigned int win = plane->zpos;
>   unsigned int bpp = fb->bits_per_pixel >> 3;
>   unsigned int pitch = fb->pitches[0];
> @@ -272,11 +273,11 @@ static void decon_update_plane(struct exynos_drm_crtc 
> *crtc,
>   if (test_bit(BIT_SUSPENDED, >flags))
>   return;
>  
> - val = COORDINATE_X(plane->crtc_x) | COORDINATE_Y(plane->crtc_y);
> + val = COORDINATE_X(state->crtc.x) | COORDINATE_Y(state->crtc.y);
>   writel(val, ctx->addr + DECON_VIDOSDxA(win));
>  
> - val = COORDINATE_X(plane->crtc_x + plane->crtc_w - 1) |
> - COORDINATE_Y(plane->crtc_y + plane->crtc_h - 1);
> + val = COORDINATE_X(state->crtc.x + state->crtc.w - 1) |
> + COORDINATE_Y(state->crtc.y + state->crtc.h - 1);
>   writel(val, ctx->addr + DECON_VIDOSDxB(win));
>  
>   val = VIDOSD_Wx_ALPHA_R_F(0x0) | VIDOSD_Wx_ALPHA_G_F(0x0) |
> @@ -289,15 +290,15 @@ static void decon_update_plane(struct exynos_drm_crtc 
> *crtc,
>  
>   writel(dma_addr, ctx->addr + DECON_VIDW0xADD0B0(win));
>  
> - val = dma_addr + pitch * plane->crtc_h;
> + val = dma_addr + pitch * state->src.h;
>   writel(val, ctx->addr + DECON_VIDW0xADD1B0(win));
>  
>   if (ctx->out_type != IFTYPE_HDMI)
> - val = BIT_VAL(pitch - plane->crtc_w * bpp, 27, 14)
> - | BIT_VAL(plane->crtc_w * bpp, 13, 0);
> + val = BIT_VAL(pitch - state->crtc.w * bpp, 27, 14)
> + | BIT_VAL(state->crtc.w * bpp, 13, 0);
>   else
> - val = BIT_VAL(pitch - plane->crtc_w * bpp, 29, 15)
> - | BIT_VAL(plane->crtc_w * bpp, 14, 0);
> + val = BIT_VAL(pitch - state->crtc.w * bpp, 29, 15)
> + | BIT_VAL(state->crtc.w * bpp, 14, 0);
>   writel(val, ctx->addr + DECON_VIDW0xADD2(win));
>  
>   decon_win_set_pixfmt(ctx, win, fb);
> diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c 
> b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
> index 15e1e165020f..7868d30d8eac 100644
> --- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c
> +++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
> @@ -399,9 +399,10 @@ static void decon_atomic_begin(struct exynos_drm_crtc 
> *crtc,
>  static void decon_update_plane(struct exynos_drm_crtc *crtc,
>  struct exynos_drm_plane *plane)
>  {
> + struct exynos_drm_plane_state *state =
> + to_exynos_plane_state(plane->base.state);
>   struct decon_context *ctx = crtc->ctx;
> - struct drm_plane_state *state = plane->base.state;
> - struct drm_framebuffer *fb = state->fb;
> + struct drm_framebuffer *fb = state->base.fb;
>   int padding;
>   unsigned long val, alpha;
>   unsigned int last_x;
> @@ -434,22 +435,22 @@ static void decon_update_plane(struct exynos_drm_crtc 
> *crtc,
>   writel(fb->height, ctx->regs + VIDW_WHOLE_Y(win));
>  
>   /* offset from the start of the buffer to read */
> - writel(plane->src_x, ctx->regs + VIDW_OFFSET_X(win));
> - writel(plane->src_y, ctx->regs + VIDW_OFFSET_Y(win));
> + writel(state->src.x, ctx->regs + VIDW_OFFSET_X(win));
> + writel(state->src.y, ctx->regs + VIDW_OFFSET_Y(win));
>  
>   DRM_DEBUG_KMS("start addr = 0x%lx\n",
>   (unsigned long)val);
>   DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
> - plane->crtc_w, 

[PATCH 11/25] drm/exynos: introduce exynos_drm_plane_state structure

[Marek Szyprowski]

This patch introduces exynos_drm_plane_state structure, which subclasses
drm_plane_state and holds precalculated data suitable for configuring
Exynos hardware.

Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c |  21 ++---
 drivers/gpu/drm/exynos/exynos7_drm_decon.c|  21 ++---
 drivers/gpu/drm/exynos/exynos_drm_drv.h   |  56 +++-
 drivers/gpu/drm/exynos/exynos_drm_fimd.c  |  33 +++
 drivers/gpu/drm/exynos/exynos_drm_plane.c | 125 +++---
 drivers/gpu/drm/exynos/exynos_mixer.c |  61 +++--
 6 files changed, 197 insertions(+), 120 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index a3161b0428b9..27039468364b 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -260,9 +260,10 @@ static void decon_atomic_begin(struct exynos_drm_crtc 
*crtc,
 static void decon_update_plane(struct exynos_drm_crtc *crtc,
   struct exynos_drm_plane *plane)
 {
+   struct exynos_drm_plane_state *state =
+   to_exynos_plane_state(plane->base.state);
struct decon_context *ctx = crtc->ctx;
-   struct drm_plane_state *state = plane->base.state;
-   struct drm_framebuffer *fb = state->fb;
+   struct drm_framebuffer *fb = state->base.fb;
unsigned int win = plane->zpos;
unsigned int bpp = fb->bits_per_pixel >> 3;
unsigned int pitch = fb->pitches[0];
@@ -272,11 +273,11 @@ static void decon_update_plane(struct exynos_drm_crtc 
*crtc,
if (test_bit(BIT_SUSPENDED, >flags))
return;
 
-   val = COORDINATE_X(plane->crtc_x) | COORDINATE_Y(plane->crtc_y);
+   val = COORDINATE_X(state->crtc.x) | COORDINATE_Y(state->crtc.y);
writel(val, ctx->addr + DECON_VIDOSDxA(win));
 
-   val = COORDINATE_X(plane->crtc_x + plane->crtc_w - 1) |
-   COORDINATE_Y(plane->crtc_y + plane->crtc_h - 1);
+   val = COORDINATE_X(state->crtc.x + state->crtc.w - 1) |
+   COORDINATE_Y(state->crtc.y + state->crtc.h - 1);
writel(val, ctx->addr + DECON_VIDOSDxB(win));
 
val = VIDOSD_Wx_ALPHA_R_F(0x0) | VIDOSD_Wx_ALPHA_G_F(0x0) |
@@ -289,15 +290,15 @@ static void decon_update_plane(struct exynos_drm_crtc 
*crtc,
 
writel(dma_addr, ctx->addr + DECON_VIDW0xADD0B0(win));
 
-   val = dma_addr + pitch * plane->crtc_h;
+   val = dma_addr + pitch * state->src.h;
writel(val, ctx->addr + DECON_VIDW0xADD1B0(win));
 
if (ctx->out_type != IFTYPE_HDMI)
-   val = BIT_VAL(pitch - plane->crtc_w * bpp, 27, 14)
-   | BIT_VAL(plane->crtc_w * bpp, 13, 0);
+   val = BIT_VAL(pitch - state->crtc.w * bpp, 27, 14)
+   | BIT_VAL(state->crtc.w * bpp, 13, 0);
else
-   val = BIT_VAL(pitch - plane->crtc_w * bpp, 29, 15)
-   | BIT_VAL(plane->crtc_w * bpp, 14, 0);
+   val = BIT_VAL(pitch - state->crtc.w * bpp, 29, 15)
+   | BIT_VAL(state->crtc.w * bpp, 14, 0);
writel(val, ctx->addr + DECON_VIDW0xADD2(win));
 
decon_win_set_pixfmt(ctx, win, fb);
diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
index 15e1e165020f..7868d30d8eac 100644
--- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
@@ -399,9 +399,10 @@ static void decon_atomic_begin(struct exynos_drm_crtc 
*crtc,
 static void decon_update_plane(struct exynos_drm_crtc *crtc,
   struct exynos_drm_plane *plane)
 {
+   struct exynos_drm_plane_state *state =
+   to_exynos_plane_state(plane->base.state);
struct decon_context *ctx = crtc->ctx;
-   struct drm_plane_state *state = plane->base.state;
-   struct drm_framebuffer *fb = state->fb;
+   struct drm_framebuffer *fb = state->base.fb;
int padding;
unsigned long val, alpha;
unsigned int last_x;
@@ -434,22 +435,22 @@ static void decon_update_plane(struct exynos_drm_crtc 
*crtc,
writel(fb->height, ctx->regs + VIDW_WHOLE_Y(win));
 
/* offset from the start of the buffer to read */
-   writel(plane->src_x, ctx->regs + VIDW_OFFSET_X(win));
-   writel(plane->src_y, ctx->regs + VIDW_OFFSET_Y(win));
+   writel(state->src.x, ctx->regs + VIDW_OFFSET_X(win));
+   writel(state->src.y, ctx->regs + VIDW_OFFSET_Y(win));
 
DRM_DEBUG_KMS("start addr = 0x%lx\n",
(unsigned long)val);
DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
-   plane->crtc_w, plane->crtc_h);
+   state->crtc.w, state->crtc.h);
 
-   val = VIDOSDxA_TOPLEFT_X(plane->crtc_x) |
-