Re: [PATCH V2] ARM: dts: Add DMA controller node info on Exynos5420.
On 08/14/13 21:04, Padmavathi Venna wrote:
This patch adds dma controller node info on Exynos5420.
Signed-off-by: Padmavathi Vennapadm...@samsung.com
---
Changes since V1:
- In V1, dma node common stuff was added in common exynos5.dtsi file.
This was removed as per Kukjin comment and added in exynos5420.dtsi.
This patch is dependent on audss clk controller patches that were
posted in the below link.
http://www.spinics.net/lists/linux-samsung-soc/msg20253.html
So I'm still waiting for above...
- Kukjin
arch/arm/boot/dts/exynos5420.dtsi | 63 +
1 files changed, 63 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm/boot/dts/exynos5420.dtsi
index 9e90d1e..23cfea4 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -126,6 +126,69 @@
interrupts =0 47 0;
};
+ amba {
+ #address-cells =1;
+ #size-cells =1;
+ compatible = arm,amba-bus;
+ interrupt-parent =gic;
+ ranges;
+
+ pdma0: pdma@121A {
+ compatible = arm,pl330, arm,primecell;
+ reg =0x121A 0x1000;
+ interrupts =0 34 0;
+ clocks =clock 362;
+ clock-names = apb_pclk;
+ #dma-cells =1;
+ #dma-channels =8;
+ #dma-requests =32;
+ };
+
+ pdma1: pdma@121B {
+ compatible = arm,pl330, arm,primecell;
+ reg =0x121B 0x1000;
+ interrupts =0 35 0;
+ clocks =clock 363;
+ clock-names = apb_pclk;
+ #dma-cells =1;
+ #dma-channels =8;
+ #dma-requests =32;
+ };
+
+ mdma0: mdma@1080 {
+ compatible = arm,pl330, arm,primecell;
+ reg =0x1080 0x1000;
+ interrupts =0 33 0;
+ clocks =clock 473;
+ clock-names = apb_pclk;
+ #dma-cells =1;
+ #dma-channels =8;
+ #dma-requests =1;
+ };
+
+ mdma1: mdma@11C1 {
+ compatible = arm,pl330, arm,primecell;
+ reg =0x11C1 0x1000;
+ interrupts =0 124 0;
+ clocks =clock 442;
+ clock-names = apb_pclk;
+ #dma-cells =1;
+ #dma-channels =8;
+ #dma-requests =1;
+ };
+
+ adma: adma@0388 {
+ compatible = arm,pl330, arm,primecell;
+ reg =0x0388 0x1000;
+ interrupts =0 110 0;
+ clocks =clock_audss EXYNOS_ADMA;
+ clock-names = apb_pclk;
+ #dma-cells =1;
+ #dma-channels =6;
+ #dma-requests =16;
+ };
+ };
+
serial@12C0 {
clocks =clock 257,clock 128;
clock-names = uart, clk_uart_baud0;
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[PATCH V2] ARM: dts: Add DMA controller node info on Exynos5420.
This patch adds dma controller node info on Exynos5420.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
Changes since V1:
- In V1, dma node common stuff was added in common exynos5.dtsi file.
This was removed as per Kukjin comment and added in exynos5420.dtsi.
This patch is dependent on audss clk controller patches that were
posted in the below link.
http://www.spinics.net/lists/linux-samsung-soc/msg20253.html
arch/arm/boot/dts/exynos5420.dtsi | 63 +
1 files changed, 63 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm/boot/dts/exynos5420.dtsi
index 9e90d1e..23cfea4 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -126,6 +126,69 @@
interrupts = 0 47 0;
};
+ amba {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = arm,amba-bus;
+ interrupt-parent = gic;
+ ranges;
+
+ pdma0: pdma@121A {
+ compatible = arm,pl330, arm,primecell;
+ reg = 0x121A 0x1000;
+ interrupts = 0 34 0;
+ clocks = clock 362;
+ clock-names = apb_pclk;
+ #dma-cells = 1;
+ #dma-channels = 8;
+ #dma-requests = 32;
+ };
+
+ pdma1: pdma@121B {
+ compatible = arm,pl330, arm,primecell;
+ reg = 0x121B 0x1000;
+ interrupts = 0 35 0;
+ clocks = clock 363;
+ clock-names = apb_pclk;
+ #dma-cells = 1;
+ #dma-channels = 8;
+ #dma-requests = 32;
+ };
+
+ mdma0: mdma@1080 {
+ compatible = arm,pl330, arm,primecell;
+ reg = 0x1080 0x1000;
+ interrupts = 0 33 0;
+ clocks = clock 473;
+ clock-names = apb_pclk;
+ #dma-cells = 1;
+ #dma-channels = 8;
+ #dma-requests = 1;
+ };
+
+ mdma1: mdma@11C1 {
+ compatible = arm,pl330, arm,primecell;
+ reg = 0x11C1 0x1000;
+ interrupts = 0 124 0;
+ clocks = clock 442;
+ clock-names = apb_pclk;
+ #dma-cells = 1;
+ #dma-channels = 8;
+ #dma-requests = 1;
+ };
+
+ adma: adma@0388 {
+ compatible = arm,pl330, arm,primecell;
+ reg = 0x0388 0x1000;
+ interrupts = 0 110 0;
+ clocks = clock_audss EXYNOS_ADMA;
+ clock-names = apb_pclk;
+ #dma-cells = 1;
+ #dma-channels = 6;
+ #dma-requests = 16;
+ };
+ };
+
serial@12C0 {
clocks = clock 257, clock 128;
clock-names = uart, clk_uart_baud0;
--
1.7.4.4
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