Re: [PATCH V3 1/3] ARM: EXYNOS5: PMU support for 5420
Hi Alim, [...] + /* Time taken to stabilized XXTI clock */ + regmap_write(pmu_context-pmu_regmap, EXYNOS5_XXTI_DURATION3, 0x005dc); + There is no good reason why XXTI_DURATION3 need to be set here. This is something that iROM sets, please remove this. Will remove. Regards, Abhilash -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V3 1/3] ARM: EXYNOS5: PMU support for 5420
Hi Pankaj,
[...]
#include exynos-pmu.h
#include regs-pmu.h
+#include common.h
I think it will be better if we move EXYNOS5420_USE_STANDBY_WFI_ALL
macro into regs-pmu.h itself. It will help us removing dependency of
common.h
from pmu.c, so that in future we can easily move this file out of machine
directory.
Will move to regs-pmu.h
[...]
+ * exynos_set_core_flag - set the cluster id to IROM register
+ * to ensure that we wake up with the
+ * current cluster.
+ */
+static void exynos5420_set_core_flag(void)
+{
+ unsigned int this_cluster;
+ this_cluster = MPIDR_AFFINITY_LEVEL(read_cpuid_mpidr(), 1);
+
+ regmap_write(pmu_context-pmu_regmap, EXYNOS_IROM_DATA2,
this_cluster);
+}
+
+void exynos5420_powerdown_conf(enum sys_powerdown mode)
+{
+ exynos5420_set_core_flag();
I think we can avoid extra function call of exynos5420_set_core_flag by
moving
all of it's code in powerdown_conf itself.
Will move to powerdown_conf.
+}
void exynos5_powerdown_conf(enum sys_powerdown mode)
{
unsigned int i;
@@ -429,6 +670,80 @@ static void exynos5250_pmu_init(void)
regmap_write(pmu_regmap, EXYNOS5_MASK_WDTRESET_REQUEST, tmp);
}
+static void exynos5420_pmu_init(void)
+{
+ unsigned int value;
+ int i;
+
+ /*
+* Set the CMU_RESET, CMU_SYSCLK and CMU_CLKSTOP registers
+* for local power blocks to Low initially as per Table 8-4:
+* System-Level Power-Down Configuration Registers.
+*/
+ for (i = 0; i ARRAY_SIZE(exynos5420_list_disable_pmu_reg); i++)
+ regmap_write(pmu_context-pmu_regmap,
+ exynos5420_list_disable_pmu_reg[i], 0);
+
+ /* Time taken to stabilized XXTI clock */
+ regmap_write(pmu_context-pmu_regmap, EXYNOS5_XXTI_DURATION3,
0x005dc);
Isn't it will be good if you use some macro of 0x005dc?
Will remove this as per Alim's comment.
Regards,
Abhilash
--
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Re: [PATCH V3 1/3] ARM: EXYNOS5: PMU support for 5420
HI
On Thu, May 8, 2014 at 4:22 PM, Vikas Sajjan vikas.saj...@samsung.com wrote:
Add intial PMU settings for exynos5420. This is required for
future S2R and Switching support.
Signed-off-by: Thomas Abraham thomas...@samsung.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Vikas Sajjan vikas.saj...@samsung.com
---
arch/arm/mach-exynos/common.h |9 ++
arch/arm/mach-exynos/exynos.c |1 +
arch/arm/mach-exynos/pmu.c | 325
+++
arch/arm/mach-exynos/regs-pmu.h | 231
4 files changed, 566 insertions(+)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 8f45a35..9e31cf1 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -17,6 +17,15 @@
void exynos_firmware_init(void);
+#define EXYNOS5420_USE_STANDBY_WFI_ALL (EXYNOS5420_ARM_USE_STANDBY_WFI0 \
+| EXYNOS5420_ARM_USE_STANDBY_WFI1 \
+| EXYNOS5420_ARM_USE_STANDBY_WFI2 \
+| EXYNOS5420_ARM_USE_STANDBY_WFI3 \
+| EXYNOS5420_KFC_USE_STANDBY_WFI0 \
+| EXYNOS5420_KFC_USE_STANDBY_WFI1 \
+| EXYNOS5420_KFC_USE_STANDBY_WFI2 \
+| EXYNOS5420_KFC_USE_STANDBY_WFI3)
+
#ifdef CONFIG_PINCTRL_EXYNOS
extern u32 exynos_get_eint_wake_mask(void);
#else
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index a59b122..72b6c3f 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -259,6 +259,7 @@ static const struct of_device_id exynos_dt_pmu_match[] = {
{ .compatible = samsung,exynos4212-pmu },
{ .compatible = samsung,exynos4412-pmu },
{ .compatible = samsung,exynos5250-pmu },
+ { .compatible = samsung,exynos5420-pmu },
{},
};
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 1570761..c40e6c1 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -9,6 +9,7 @@
* published by the Free Software Foundation.
*/
+#include linux/delay.h
#include linux/module.h
#include linux/regmap.h
#include linux/of.h
@@ -16,8 +17,11 @@
#include linux/slab.h
#include linux/mfd/syscon.h
+#include asm/cputype.h
+
#include exynos-pmu.h
#include regs-pmu.h
+#include common.h
struct exynos_pmu_data {
const struct exynos_pmu_conf *pmu_config;
@@ -332,6 +336,151 @@ static const struct exynos_pmu_conf
exynos5250_pmu_config[] = {
{ PMU_TABLE_END,},
};
+static struct exynos_pmu_conf exynos5420_pmu_config[] = {
+ /* { .reg = address, .val = { AFTR, LPA, SLEEP } */
+ { EXYNOS5_ARM_CORE0_SYS_PWR_REG,{ 0x0, 0x0,
0x0} },
+ { EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG,{ 0x0, 0x0,
0x0} },
+ { EXYNOS5_ARM_CORE1_SYS_PWR_REG,{ 0x0, 0x0,
0x0} },
+ { EXYNOS5_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG,{ 0x0, 0x0,
0x0} },
+ { EXYNOS5420_ARM_CORE2_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_ARM_CORE2_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_ARM_CORE2_CENTRAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_ARM_CORE3_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_ARM_CORE3_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_ARM_CORE3_CENTRAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_KFC_CORE0_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE0_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE0_CENTRAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_KFC_CORE1_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE1_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE1_CENTRAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_KFC_CORE2_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE2_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE2_CENTRAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_KFC_CORE3_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE3_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE3_CENTRAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ {
Re: [PATCH V3 1/3] ARM: EXYNOS5: PMU support for 5420
Hi Vikas,
On 05/08/2014 07:52 PM, Vikas Sajjan wrote:
Add intial PMU settings for exynos5420. This is required for
future S2R and Switching support.
Signed-off-by: Thomas Abraham thomas...@samsung.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Vikas Sajjan vikas.saj...@samsung.com
---
arch/arm/mach-exynos/common.h |9 ++
arch/arm/mach-exynos/exynos.c |1 +
arch/arm/mach-exynos/pmu.c | 325 +++
arch/arm/mach-exynos/regs-pmu.h | 231
4 files changed, 566 insertions(+)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 8f45a35..9e31cf1 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -17,6 +17,15 @@
void exynos_firmware_init(void);
+#define EXYNOS5420_USE_STANDBY_WFI_ALL (EXYNOS5420_ARM_USE_STANDBY_WFI0 \
+| EXYNOS5420_ARM_USE_STANDBY_WFI1 \
+| EXYNOS5420_ARM_USE_STANDBY_WFI2 \
+| EXYNOS5420_ARM_USE_STANDBY_WFI3 \
+| EXYNOS5420_KFC_USE_STANDBY_WFI0 \
+| EXYNOS5420_KFC_USE_STANDBY_WFI1 \
+| EXYNOS5420_KFC_USE_STANDBY_WFI2 \
+| EXYNOS5420_KFC_USE_STANDBY_WFI3)
+
#ifdef CONFIG_PINCTRL_EXYNOS
extern u32 exynos_get_eint_wake_mask(void);
#else
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index a59b122..72b6c3f 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -259,6 +259,7 @@ static const struct of_device_id exynos_dt_pmu_match[] = {
{ .compatible = samsung,exynos4212-pmu },
{ .compatible = samsung,exynos4412-pmu },
{ .compatible = samsung,exynos5250-pmu },
+ { .compatible = samsung,exynos5420-pmu },
{},
};
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 1570761..c40e6c1 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -9,6 +9,7 @@
* published by the Free Software Foundation.
*/
+#include linux/delay.h
#include linux/module.h
#include linux/regmap.h
#include linux/of.h
@@ -16,8 +17,11 @@
#include linux/slab.h
#include linux/mfd/syscon.h
+#include asm/cputype.h
+
#include exynos-pmu.h
#include regs-pmu.h
+#include common.h
I think it will be better if we move EXYNOS5420_USE_STANDBY_WFI_ALL
macro into regs-pmu.h itself. It will help us removing dependency of common.h
from pmu.c, so that in future we can easily move this file out of machine
directory.
struct exynos_pmu_data {
const struct exynos_pmu_conf *pmu_config;
@@ -332,6 +336,151 @@ static const struct exynos_pmu_conf
exynos5250_pmu_config[] = {
{ PMU_TABLE_END,},
};
+static struct exynos_pmu_conf exynos5420_pmu_config[] = {
+ /* { .reg = address, .val = { AFTR, LPA, SLEEP } */
+ { EXYNOS5_ARM_CORE0_SYS_PWR_REG,{ 0x0, 0x0,
0x0} },
+ { EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG,{ 0x0, 0x0,
0x0} },
+ { EXYNOS5_ARM_CORE1_SYS_PWR_REG,{ 0x0, 0x0,
0x0} },
+ { EXYNOS5_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG,{ 0x0, 0x0,
0x0} },
+ { EXYNOS5420_ARM_CORE2_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_ARM_CORE2_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_ARM_CORE2_CENTRAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_ARM_CORE3_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_ARM_CORE3_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_ARM_CORE3_CENTRAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_KFC_CORE0_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE0_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE0_CENTRAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_KFC_CORE1_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE1_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE1_CENTRAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_KFC_CORE2_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE2_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE2_CENTRAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_KFC_CORE3_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ {
[PATCH V3 1/3] ARM: EXYNOS5: PMU support for 5420
Add intial PMU settings for exynos5420. This is required for
future S2R and Switching support.
Signed-off-by: Thomas Abraham thomas...@samsung.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Vikas Sajjan vikas.saj...@samsung.com
---
arch/arm/mach-exynos/common.h |9 ++
arch/arm/mach-exynos/exynos.c |1 +
arch/arm/mach-exynos/pmu.c | 325 +++
arch/arm/mach-exynos/regs-pmu.h | 231
4 files changed, 566 insertions(+)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 8f45a35..9e31cf1 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -17,6 +17,15 @@
void exynos_firmware_init(void);
+#define EXYNOS5420_USE_STANDBY_WFI_ALL (EXYNOS5420_ARM_USE_STANDBY_WFI0 \
+| EXYNOS5420_ARM_USE_STANDBY_WFI1 \
+| EXYNOS5420_ARM_USE_STANDBY_WFI2 \
+| EXYNOS5420_ARM_USE_STANDBY_WFI3 \
+| EXYNOS5420_KFC_USE_STANDBY_WFI0 \
+| EXYNOS5420_KFC_USE_STANDBY_WFI1 \
+| EXYNOS5420_KFC_USE_STANDBY_WFI2 \
+| EXYNOS5420_KFC_USE_STANDBY_WFI3)
+
#ifdef CONFIG_PINCTRL_EXYNOS
extern u32 exynos_get_eint_wake_mask(void);
#else
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index a59b122..72b6c3f 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -259,6 +259,7 @@ static const struct of_device_id exynos_dt_pmu_match[] = {
{ .compatible = samsung,exynos4212-pmu },
{ .compatible = samsung,exynos4412-pmu },
{ .compatible = samsung,exynos5250-pmu },
+ { .compatible = samsung,exynos5420-pmu },
{},
};
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 1570761..c40e6c1 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -9,6 +9,7 @@
* published by the Free Software Foundation.
*/
+#include linux/delay.h
#include linux/module.h
#include linux/regmap.h
#include linux/of.h
@@ -16,8 +17,11 @@
#include linux/slab.h
#include linux/mfd/syscon.h
+#include asm/cputype.h
+
#include exynos-pmu.h
#include regs-pmu.h
+#include common.h
struct exynos_pmu_data {
const struct exynos_pmu_conf *pmu_config;
@@ -332,6 +336,151 @@ static const struct exynos_pmu_conf
exynos5250_pmu_config[] = {
{ PMU_TABLE_END,},
};
+static struct exynos_pmu_conf exynos5420_pmu_config[] = {
+ /* { .reg = address, .val = { AFTR, LPA, SLEEP } */
+ { EXYNOS5_ARM_CORE0_SYS_PWR_REG,{ 0x0, 0x0,
0x0} },
+ { EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG,{ 0x0, 0x0,
0x0} },
+ { EXYNOS5_ARM_CORE1_SYS_PWR_REG,{ 0x0, 0x0,
0x0} },
+ { EXYNOS5_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG,{ 0x0, 0x0,
0x0} },
+ { EXYNOS5420_ARM_CORE2_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_ARM_CORE2_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_ARM_CORE2_CENTRAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_ARM_CORE3_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_ARM_CORE3_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_ARM_CORE3_CENTRAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_KFC_CORE0_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE0_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE0_CENTRAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_KFC_CORE1_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE1_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE1_CENTRAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_KFC_CORE2_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE2_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE2_CENTRAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_KFC_CORE3_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE3_LOCAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5420_DIS_IRQ_KFC_CORE3_CENTRAL_SYS_PWR_REG, { 0x0, 0x0,
0x0} },
+ { EXYNOS5_ISP_ARM_SYS_PWR_REG, { 0x1, 0x0,
0x0} },
+ { EXYNOS5_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG,{ 0x1, 0x0,
0x0} },
+ {
