Re: [PATCH V4 4/4] ARM: dts: add clock provider information for i2s controllers in Exynos5250

[Doug Anderson]

Padmavathi,

On Sun, Jun 2, 2013 at 10:19 PM, Padmavathi Venna padm...@samsung.com wrote:
 +   clocks = clock_audss EXYNOS_I2S_BUS,
 +   clock_audss EXYNOS_I2S_BUS,
 +   clock_audss EXYNOS_SCLK_I2S,
 +   clock_audss EXYNOS_MOUT_AUDSS,
 +   clock_audss EXYNOS_MOUT_I2S;
 +   clock-names = iis, i2s_opclk0, i2s_opclk1,
 +   mout_audss, mout_i2s;

Are there bindings for these clocks? Would be nice to see a
description for what they are supposed to be.

I looked up i2s_opclk0 / i2s_opclk1 and they look reasonable at a
quick glance. ...and it does seem right that iis and i2s_opclk0 are
the same. ...but I don't see any place that uses the last two. Is
there an in-flight patch?

-Doug
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Re: [PATCH V4 4/4] ARM: dts: add clock provider information for i2s controllers in Exynos5250

[Padma Venkat]

Hi Doug,

On Tue, Jun 4, 2013 at 1:48 AM, Doug Anderson diand...@chromium.org wrote:
 Padmavathi,

 On Sun, Jun 2, 2013 at 10:19 PM, Padmavathi Venna padm...@samsung.com wrote:
 +   clocks = clock_audss EXYNOS_I2S_BUS,
 +   clock_audss EXYNOS_I2S_BUS,
 +   clock_audss EXYNOS_SCLK_I2S,
 +   clock_audss EXYNOS_MOUT_AUDSS,
 +   clock_audss EXYNOS_MOUT_I2S;
 +   clock-names = iis, i2s_opclk0, i2s_opclk1,
 +   mout_audss, mout_i2s;

 Are there bindings for these clocks? Would be nice to see a
 description for what they are supposed to be.

Yes. They have bindings. I will add the description.


 I looked up i2s_opclk0 / i2s_opclk1 and they look reasonable at a
 quick glance. ...and it does seem right that iis and i2s_opclk0 are
 the same. ...but I don't see any place that uses the last two. Is
 there an in-flight patch?

I don't have any patch for these right now. These are used internally.
But as these are i2s0 base clocks I added here.


 -Doug

Thanks
Padma
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[PATCH V4 4/4] ARM: dts: add clock provider information for i2s controllers in Exynos5250

[Padmavathi Venna]

Add clock lookup information for i2s controllers on exynos5250 SoC.

Signed-off-by: Padmavathi Venna padm...@samsung.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
 arch/arm/boot/dts/exynos5250.dtsi |   13 +
 1 files changed, 13 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 388983e..2b917ba 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -20,6 +20,8 @@
 #include skeleton.dtsi
 #include exynos5250-pinctrl.dtsi
 
+#include dt-bindings/clk/exynos-audss-clk.h
+
 / {
compatible = samsung,exynos5250;
interrupt-parent = gic;
@@ -457,6 +459,13 @@
pdma0 9
pdma0 8;
dma-names = tx, rx, tx-sec;
+   clocks = clock_audss EXYNOS_I2S_BUS,
+   clock_audss EXYNOS_I2S_BUS,
+   clock_audss EXYNOS_SCLK_I2S,
+   clock_audss EXYNOS_MOUT_AUDSS,
+   clock_audss EXYNOS_MOUT_I2S;
+   clock-names = iis, i2s_opclk0, i2s_opclk1,
+   mout_audss, mout_i2s;
samsung,supports-6ch;
samsung,supports-rstclr;
samsung,supports-secdai;
@@ -471,6 +480,8 @@
dmas = pdma1 12
pdma1 11;
dma-names = tx, rx;
+   clocks = clock 307;
+   clock-names = iis;
pinctrl-names = default;
pinctrl-0 = i2s1_bus;
};
@@ -481,6 +492,8 @@
dmas = pdma0 12
pdma0 11;
dma-names = tx, rx;
+   clocks = clock 308;
+   clock-names = iis;
pinctrl-names = default;
pinctrl-0 = i2s2_bus;
};
-- 
1.7.4.4

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