Re: [PATCH V6 09/30] thermal: exynos: Add extra entries in the tmu platform data

2013-06-21 Thread amit daniel kachhap 
Hi Eduardo,

On Thu, Jun 20, 2013 at 1:49 AM, Eduardo Valentin
eduardo.valen...@ti.com wrote:
 On 17-06-2013 02:46, Amit Daniel Kachhap wrote:
 This patch adds entries min_efuse_value, max_efuse_value, 
 default_temp_offset,
 trigger_type, cal_type, trim_first_point, trim_second_point, 
 max_trigger_level
 trigger_enable in the TMU platform data structure. Also the driver is 
 modified
 to use the data passed by these new platform memebers instead of the constant
 macros. All these changes helps in separating the SOC specific data part from
 the TMU driver.

 Acked-by: Kukjin Kim kgene@samsung.com
 Acked-by: Jonghwa Lee jonghwa3@samsung.com
 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
 ---
  drivers/thermal/samsung/exynos_thermal_common.h |7 +++
  drivers/thermal/samsung/exynos_tmu.c|   43 ++--
  drivers/thermal/samsung/exynos_tmu.h|   49 
 ++
  drivers/thermal/samsung/exynos_tmu_data.c   |   35 
  4 files changed, 86 insertions(+), 48 deletions(-)

 diff --git a/drivers/thermal/samsung/exynos_thermal_common.h 
 b/drivers/thermal/samsung/exynos_thermal_common.h
 index 068f56c..fd789a5 100644
 --- a/drivers/thermal/samsung/exynos_thermal_common.h
 +++ b/drivers/thermal/samsung/exynos_thermal_common.h
 @@ -44,6 +44,13 @@

  #define EXYNOS_ZONE_COUNT3

 +enum trigger_type {
 + THROTTLE_ACTIVE = 1,
 + THROTTLE_PASSIVE,
 + SW_TRIP,
 + HW_TRIP,
 +};
 +
  /**
   * struct freq_clip_table
   * @freq_clip_max: maximum frequency allowed for this cooling state.
 diff --git a/drivers/thermal/samsung/exynos_tmu.c 
 b/drivers/thermal/samsung/exynos_tmu.c
 index fa33a48..401ec98 100644
 --- a/drivers/thermal/samsung/exynos_tmu.c
 +++ b/drivers/thermal/samsung/exynos_tmu.c
 @@ -49,7 +49,6 @@
  #define EXYNOS_TMU_BUF_SLOPE_SEL_MASK0xf
  #define EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT   8
  #define EXYNOS_TMU_CORE_EN_SHIFT 0
 -#define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET   50

  /* Exynos4210 specific registers */
  #define EXYNOS4210_TMU_REG_THRESHOLD_TEMP0x44
 @@ -94,9 +93,6 @@
  #define EXYNOS_TMU_INTEN_FALL1_SHIFT 20
  #define EXYNOS_TMU_INTEN_FALL2_SHIFT 24

 -#define EFUSE_MIN_VALUE 40
 -#define EFUSE_MAX_VALUE 100
 -
  #ifdef CONFIG_THERMAL_EMULATION
  #define EXYNOS_EMUL_TIME 0x57F0
  #define EXYNOS_EMUL_TIME_MASK0x
 @@ -136,15 +132,16 @@ static int temp_to_code(struct exynos_tmu_data *data, 
 u8 temp)

   switch (pdata-cal_type) {
   case TYPE_TWO_POINT_TRIMMING:
 - temp_code = (temp - 25) *
 - (data-temp_error2 - data-temp_error1) /
 - (85 - 25) + data-temp_error1;
 + temp_code = (temp - pdata-first_point_trim) *
 + (data-temp_error2 - data-temp_error1) /
 + (pdata-second_point_trim - pdata-first_point_trim) +
 + data-temp_error1;
   break;
   case TYPE_ONE_POINT_TRIMMING:
 - temp_code = temp + data-temp_error1 - 25;
 + temp_code = temp + data-temp_error1 - pdata-first_point_trim;
   break;
   default:
 - temp_code = temp + EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
 + temp_code = temp + pdata-default_temp_offset;
   break;
   }
  out:
 @@ -169,14 +166,16 @@ static int code_to_temp(struct exynos_tmu_data *data, 
 u8 temp_code)

   switch (pdata-cal_type) {
   case TYPE_TWO_POINT_TRIMMING:
 - temp = (temp_code - data-temp_error1) * (85 - 25) /
 - (data-temp_error2 - data-temp_error1) + 25;
 + temp = (temp_code - data-temp_error1) *
 + (pdata-second_point_trim - pdata-first_point_trim) /
 + (data-temp_error2 - data-temp_error1) +
 + pdata-first_point_trim;
   break;
   case TYPE_ONE_POINT_TRIMMING:
 - temp = temp_code - data-temp_error1 + 25;
 + temp = temp_code - data-temp_error1 + pdata-first_point_trim;
   break;
   default:
 - temp = temp_code - EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
 + temp = temp_code - pdata-default_temp_offset;
   break;
   }
  out:
 @@ -209,8 +208,8 @@ static int exynos_tmu_initialize(struct platform_device 
 *pdev)
   data-temp_error1 = trim_info  EXYNOS_TMU_TRIM_TEMP_MASK;
   data-temp_error2 = ((trim_info  8)  EXYNOS_TMU_TRIM_TEMP_MASK);

 - if ((EFUSE_MIN_VALUE  data-temp_error1) ||
 - (data-temp_error1  EFUSE_MAX_VALUE) ||
 + if ((pdata-min_efuse_value  data-temp_error1) ||
 + (data-temp_error1  pdata-max_efuse_value) ||
   (data-temp_error2 != 0))
   data-temp_error1 = pdata-efuse_value;

 @@ -300,10 +299,10 @@ static void exynos_tmu_control(struct platform_device 
 *pdev, bool on)
   if (on) {
   con |= (1

Re: [PATCH V6 09/30] thermal: exynos: Add extra entries in the tmu platform data

2013-06-21 Thread amit daniel kachhap 
Hi,

On Thu, Jun 20, 2013 at 2:22 AM, Eduardo Valentin
eduardo.valen...@ti.com wrote:
 On 19-06-2013 16:19, Eduardo Valentin wrote:
 On 17-06-2013 02:46, Amit Daniel Kachhap wrote:
 This patch adds entries min_efuse_value, max_efuse_value, 
 default_temp_offset,
 trigger_type, cal_type, trim_first_point, trim_second_point, 
 max_trigger_level
 trigger_enable in the TMU platform data structure. Also the driver is 
 modified
 to use the data passed by these new platform memebers instead of the 
 constant
 macros. All these changes helps in separating the SOC specific data part 
 from
 the TMU driver.

 Acked-by: Kukjin Kim kgene@samsung.com
 Acked-by: Jonghwa Lee jonghwa3@samsung.com
 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
 ---
  drivers/thermal/samsung/exynos_thermal_common.h |7 +++
  drivers/thermal/samsung/exynos_tmu.c|   43 ++--
  drivers/thermal/samsung/exynos_tmu.h|   49 
 ++
  drivers/thermal/samsung/exynos_tmu_data.c   |   35 
  4 files changed, 86 insertions(+), 48 deletions(-)

 diff --git a/drivers/thermal/samsung/exynos_thermal_common.h 
 b/drivers/thermal/samsung/exynos_thermal_common.h
 index 068f56c..fd789a5 100644
 --- a/drivers/thermal/samsung/exynos_thermal_common.h
 +++ b/drivers/thermal/samsung/exynos_thermal_common.h
 @@ -44,6 +44,13 @@

  #define EXYNOS_ZONE_COUNT   3

 +enum trigger_type {
 +THROTTLE_ACTIVE = 1,
 +THROTTLE_PASSIVE,
 +SW_TRIP,
 +HW_TRIP,
 +};
 +
  /**
   * struct freq_clip_table
   * @freq_clip_max: maximum frequency allowed for this cooling state.
 diff --git a/drivers/thermal/samsung/exynos_tmu.c 
 b/drivers/thermal/samsung/exynos_tmu.c
 index fa33a48..401ec98 100644
 --- a/drivers/thermal/samsung/exynos_tmu.c
 +++ b/drivers/thermal/samsung/exynos_tmu.c
 @@ -49,7 +49,6 @@
  #define EXYNOS_TMU_BUF_SLOPE_SEL_MASK   0xf
  #define EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT  8
  #define EXYNOS_TMU_CORE_EN_SHIFT0
 -#define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET  50

  /* Exynos4210 specific registers */
  #define EXYNOS4210_TMU_REG_THRESHOLD_TEMP   0x44
 @@ -94,9 +93,6 @@
  #define EXYNOS_TMU_INTEN_FALL1_SHIFT20
  #define EXYNOS_TMU_INTEN_FALL2_SHIFT24

 -#define EFUSE_MIN_VALUE 40
 -#define EFUSE_MAX_VALUE 100
 -
  #ifdef CONFIG_THERMAL_EMULATION
  #define EXYNOS_EMUL_TIME0x57F0
  #define EXYNOS_EMUL_TIME_MASK   0x
 @@ -136,15 +132,16 @@ static int temp_to_code(struct exynos_tmu_data *data, 
 u8 temp)

  switch (pdata-cal_type) {
  case TYPE_TWO_POINT_TRIMMING:
 -temp_code = (temp - 25) *
 -(data-temp_error2 - data-temp_error1) /
 -(85 - 25) + data-temp_error1;
 +temp_code = (temp - pdata-first_point_trim) *
 +(data-temp_error2 - data-temp_error1) /
 +(pdata-second_point_trim - pdata-first_point_trim) +
 +data-temp_error1;
  break;
  case TYPE_ONE_POINT_TRIMMING:
 -temp_code = temp + data-temp_error1 - 25;
 +temp_code = temp + data-temp_error1 - pdata-first_point_trim;
  break;
  default:
 -temp_code = temp + EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
 +temp_code = temp + pdata-default_temp_offset;
  break;
  }
  out:
 @@ -169,14 +166,16 @@ static int code_to_temp(struct exynos_tmu_data *data, 
 u8 temp_code)

  switch (pdata-cal_type) {
  case TYPE_TWO_POINT_TRIMMING:
 -temp = (temp_code - data-temp_error1) * (85 - 25) /
 -(data-temp_error2 - data-temp_error1) + 25;
 +temp = (temp_code - data-temp_error1) *
 +(pdata-second_point_trim - pdata-first_point_trim) /
 +(data-temp_error2 - data-temp_error1) +
 +pdata-first_point_trim;
  break;
  case TYPE_ONE_POINT_TRIMMING:
 -temp = temp_code - data-temp_error1 + 25;
 +temp = temp_code - data-temp_error1 + pdata-first_point_trim;
  break;
  default:
 -temp = temp_code - EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
 +temp = temp_code - pdata-default_temp_offset;
  break;
  }
  out:
 @@ -209,8 +208,8 @@ static int exynos_tmu_initialize(struct platform_device 
 *pdev)
  data-temp_error1 = trim_info  EXYNOS_TMU_TRIM_TEMP_MASK;
  data-temp_error2 = ((trim_info  8)  EXYNOS_TMU_TRIM_TEMP_MASK);

 -if ((EFUSE_MIN_VALUE  data-temp_error1) ||
 -(data-temp_error1  EFUSE_MAX_VALUE) ||
 +if ((pdata-min_efuse_value  data-temp_error1) ||
 +(data-temp_error1  pdata-max_efuse_value) ||
  (data-temp_error2 != 0))
  data-temp_error1 = pdata-efuse_value;

 @@ -300,10 +299,10 @@ static void exynos_tmu_control(struct platform_device 
 *pdev, bool on)
  if (on) {
  con |= (1

Re: [PATCH V6 09/30] thermal: exynos: Add extra entries in the tmu platform data

2013-06-21 Thread Eduardo Valentin 
On 21-06-2013 04:50, amit daniel kachhap wrote:
 Hi,
 
 On Thu, Jun 20, 2013 at 2:22 AM, Eduardo Valentin
 eduardo.valen...@ti.com wrote:
 On 19-06-2013 16:19, Eduardo Valentin wrote:
 On 17-06-2013 02:46, Amit Daniel Kachhap wrote:
 This patch adds entries min_efuse_value, max_efuse_value, 
 default_temp_offset,
 trigger_type, cal_type, trim_first_point, trim_second_point, 
 max_trigger_level
 trigger_enable in the TMU platform data structure. Also the driver is 
 modified
 to use the data passed by these new platform memebers instead of the 
 constant
 macros. All these changes helps in separating the SOC specific data part 
 from
 the TMU driver.

 Acked-by: Kukjin Kim kgene@samsung.com
 Acked-by: Jonghwa Lee jonghwa3@samsung.com
 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
 ---
  drivers/thermal/samsung/exynos_thermal_common.h |7 +++
  drivers/thermal/samsung/exynos_tmu.c|   43 
 ++--
  drivers/thermal/samsung/exynos_tmu.h|   49 
 ++
  drivers/thermal/samsung/exynos_tmu_data.c   |   35 
  4 files changed, 86 insertions(+), 48 deletions(-)

 diff --git a/drivers/thermal/samsung/exynos_thermal_common.h 
 b/drivers/thermal/samsung/exynos_thermal_common.h
 index 068f56c..fd789a5 100644
 --- a/drivers/thermal/samsung/exynos_thermal_common.h
 +++ b/drivers/thermal/samsung/exynos_thermal_common.h
 @@ -44,6 +44,13 @@

  #define EXYNOS_ZONE_COUNT   3

 +enum trigger_type {
 +THROTTLE_ACTIVE = 1,
 +THROTTLE_PASSIVE,
 +SW_TRIP,
 +HW_TRIP,
 +};
 +
  /**
   * struct freq_clip_table
   * @freq_clip_max: maximum frequency allowed for this cooling state.
 diff --git a/drivers/thermal/samsung/exynos_tmu.c 
 b/drivers/thermal/samsung/exynos_tmu.c
 index fa33a48..401ec98 100644
 --- a/drivers/thermal/samsung/exynos_tmu.c
 +++ b/drivers/thermal/samsung/exynos_tmu.c
 @@ -49,7 +49,6 @@
  #define EXYNOS_TMU_BUF_SLOPE_SEL_MASK   0xf
  #define EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT  8
  #define EXYNOS_TMU_CORE_EN_SHIFT0
 -#define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET  50

  /* Exynos4210 specific registers */
  #define EXYNOS4210_TMU_REG_THRESHOLD_TEMP   0x44
 @@ -94,9 +93,6 @@
  #define EXYNOS_TMU_INTEN_FALL1_SHIFT20
  #define EXYNOS_TMU_INTEN_FALL2_SHIFT24

 -#define EFUSE_MIN_VALUE 40
 -#define EFUSE_MAX_VALUE 100
 -
  #ifdef CONFIG_THERMAL_EMULATION
  #define EXYNOS_EMUL_TIME0x57F0
  #define EXYNOS_EMUL_TIME_MASK   0x
 @@ -136,15 +132,16 @@ static int temp_to_code(struct exynos_tmu_data 
 *data, u8 temp)

  switch (pdata-cal_type) {
  case TYPE_TWO_POINT_TRIMMING:
 -temp_code = (temp - 25) *
 -(data-temp_error2 - data-temp_error1) /
 -(85 - 25) + data-temp_error1;
 +temp_code = (temp - pdata-first_point_trim) *
 +(data-temp_error2 - data-temp_error1) /
 +(pdata-second_point_trim - pdata-first_point_trim) +
 +data-temp_error1;
  break;
  case TYPE_ONE_POINT_TRIMMING:
 -temp_code = temp + data-temp_error1 - 25;
 +temp_code = temp + data-temp_error1 - 
 pdata-first_point_trim;
  break;
  default:
 -temp_code = temp + EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
 +temp_code = temp + pdata-default_temp_offset;
  break;
  }
  out:
 @@ -169,14 +166,16 @@ static int code_to_temp(struct exynos_tmu_data 
 *data, u8 temp_code)

  switch (pdata-cal_type) {
  case TYPE_TWO_POINT_TRIMMING:
 -temp = (temp_code - data-temp_error1) * (85 - 25) /
 -(data-temp_error2 - data-temp_error1) + 25;
 +temp = (temp_code - data-temp_error1) *
 +(pdata-second_point_trim - pdata-first_point_trim) /
 +(data-temp_error2 - data-temp_error1) +
 +pdata-first_point_trim;
  break;
  case TYPE_ONE_POINT_TRIMMING:
 -temp = temp_code - data-temp_error1 + 25;
 +temp = temp_code - data-temp_error1 + 
 pdata-first_point_trim;
  break;
  default:
 -temp = temp_code - EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
 +temp = temp_code - pdata-default_temp_offset;
  break;
  }
  out:
 @@ -209,8 +208,8 @@ static int exynos_tmu_initialize(struct 
 platform_device *pdev)
  data-temp_error1 = trim_info  EXYNOS_TMU_TRIM_TEMP_MASK;
  data-temp_error2 = ((trim_info  8)  EXYNOS_TMU_TRIM_TEMP_MASK);

 -if ((EFUSE_MIN_VALUE  data-temp_error1) ||
 -(data-temp_error1  EFUSE_MAX_VALUE) ||
 +if ((pdata-min_efuse_value  data-temp_error1) ||
 +(data-temp_error1  pdata-max_efuse_value) ||
  (data-temp_error2 != 0))
  data-temp_error1 = pdata-efuse_value;

 @@ -300,10 +299,10 @@ static void exynos_tmu_control(struct 
 platform_device *pdev, bool on)

Re: [PATCH V6 09/30] thermal: exynos: Add extra entries in the tmu platform data

2013-06-19 Thread Eduardo Valentin 
On 17-06-2013 02:46, Amit Daniel Kachhap wrote:
 This patch adds entries min_efuse_value, max_efuse_value, default_temp_offset,
 trigger_type, cal_type, trim_first_point, trim_second_point, max_trigger_level
 trigger_enable in the TMU platform data structure. Also the driver is modified
 to use the data passed by these new platform memebers instead of the constant
 macros. All these changes helps in separating the SOC specific data part from
 the TMU driver.
 
 Acked-by: Kukjin Kim kgene@samsung.com
 Acked-by: Jonghwa Lee jonghwa3@samsung.com
 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
 ---
  drivers/thermal/samsung/exynos_thermal_common.h |7 +++
  drivers/thermal/samsung/exynos_tmu.c|   43 ++--
  drivers/thermal/samsung/exynos_tmu.h|   49 ++
  drivers/thermal/samsung/exynos_tmu_data.c   |   35 
  4 files changed, 86 insertions(+), 48 deletions(-)
 
 diff --git a/drivers/thermal/samsung/exynos_thermal_common.h 
 b/drivers/thermal/samsung/exynos_thermal_common.h
 index 068f56c..fd789a5 100644
 --- a/drivers/thermal/samsung/exynos_thermal_common.h
 +++ b/drivers/thermal/samsung/exynos_thermal_common.h
 @@ -44,6 +44,13 @@
  
  #define EXYNOS_ZONE_COUNT3
  
 +enum trigger_type {
 + THROTTLE_ACTIVE = 1,
 + THROTTLE_PASSIVE,
 + SW_TRIP,
 + HW_TRIP,
 +};
 +
  /**
   * struct freq_clip_table
   * @freq_clip_max: maximum frequency allowed for this cooling state.
 diff --git a/drivers/thermal/samsung/exynos_tmu.c 
 b/drivers/thermal/samsung/exynos_tmu.c
 index fa33a48..401ec98 100644
 --- a/drivers/thermal/samsung/exynos_tmu.c
 +++ b/drivers/thermal/samsung/exynos_tmu.c
 @@ -49,7 +49,6 @@
  #define EXYNOS_TMU_BUF_SLOPE_SEL_MASK0xf
  #define EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT   8
  #define EXYNOS_TMU_CORE_EN_SHIFT 0
 -#define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET   50
  
  /* Exynos4210 specific registers */
  #define EXYNOS4210_TMU_REG_THRESHOLD_TEMP0x44
 @@ -94,9 +93,6 @@
  #define EXYNOS_TMU_INTEN_FALL1_SHIFT 20
  #define EXYNOS_TMU_INTEN_FALL2_SHIFT 24
  
 -#define EFUSE_MIN_VALUE 40
 -#define EFUSE_MAX_VALUE 100
 -
  #ifdef CONFIG_THERMAL_EMULATION
  #define EXYNOS_EMUL_TIME 0x57F0
  #define EXYNOS_EMUL_TIME_MASK0x
 @@ -136,15 +132,16 @@ static int temp_to_code(struct exynos_tmu_data *data, 
 u8 temp)
  
   switch (pdata-cal_type) {
   case TYPE_TWO_POINT_TRIMMING:
 - temp_code = (temp - 25) *
 - (data-temp_error2 - data-temp_error1) /
 - (85 - 25) + data-temp_error1;
 + temp_code = (temp - pdata-first_point_trim) *
 + (data-temp_error2 - data-temp_error1) /
 + (pdata-second_point_trim - pdata-first_point_trim) +
 + data-temp_error1;
   break;
   case TYPE_ONE_POINT_TRIMMING:
 - temp_code = temp + data-temp_error1 - 25;
 + temp_code = temp + data-temp_error1 - pdata-first_point_trim;
   break;
   default:
 - temp_code = temp + EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
 + temp_code = temp + pdata-default_temp_offset;
   break;
   }
  out:
 @@ -169,14 +166,16 @@ static int code_to_temp(struct exynos_tmu_data *data, 
 u8 temp_code)
  
   switch (pdata-cal_type) {
   case TYPE_TWO_POINT_TRIMMING:
 - temp = (temp_code - data-temp_error1) * (85 - 25) /
 - (data-temp_error2 - data-temp_error1) + 25;
 + temp = (temp_code - data-temp_error1) *
 + (pdata-second_point_trim - pdata-first_point_trim) /
 + (data-temp_error2 - data-temp_error1) +
 + pdata-first_point_trim;
   break;
   case TYPE_ONE_POINT_TRIMMING:
 - temp = temp_code - data-temp_error1 + 25;
 + temp = temp_code - data-temp_error1 + pdata-first_point_trim;
   break;
   default:
 - temp = temp_code - EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
 + temp = temp_code - pdata-default_temp_offset;
   break;
   }
  out:
 @@ -209,8 +208,8 @@ static int exynos_tmu_initialize(struct platform_device 
 *pdev)
   data-temp_error1 = trim_info  EXYNOS_TMU_TRIM_TEMP_MASK;
   data-temp_error2 = ((trim_info  8)  EXYNOS_TMU_TRIM_TEMP_MASK);
  
 - if ((EFUSE_MIN_VALUE  data-temp_error1) ||
 - (data-temp_error1  EFUSE_MAX_VALUE) ||
 + if ((pdata-min_efuse_value  data-temp_error1) ||
 + (data-temp_error1  pdata-max_efuse_value) ||
   (data-temp_error2 != 0))
   data-temp_error1 = pdata-efuse_value;
  
 @@ -300,10 +299,10 @@ static void exynos_tmu_control(struct platform_device 
 *pdev, bool on)
   if (on) {
   con |= (1  EXYNOS_TMU_CORE_EN_SHIFT);
   interrupt_en =
 - pdata-trigger_level3_en

Re: [PATCH V6 09/30] thermal: exynos: Add extra entries in the tmu platform data

2013-06-19 Thread Eduardo Valentin 
On 19-06-2013 16:19, Eduardo Valentin wrote:
 On 17-06-2013 02:46, Amit Daniel Kachhap wrote:
 This patch adds entries min_efuse_value, max_efuse_value, 
 default_temp_offset,
 trigger_type, cal_type, trim_first_point, trim_second_point, 
 max_trigger_level
 trigger_enable in the TMU platform data structure. Also the driver is 
 modified
 to use the data passed by these new platform memebers instead of the constant
 macros. All these changes helps in separating the SOC specific data part from
 the TMU driver.

 Acked-by: Kukjin Kim kgene@samsung.com
 Acked-by: Jonghwa Lee jonghwa3@samsung.com
 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
 ---
  drivers/thermal/samsung/exynos_thermal_common.h |7 +++
  drivers/thermal/samsung/exynos_tmu.c|   43 ++--
  drivers/thermal/samsung/exynos_tmu.h|   49 
 ++
  drivers/thermal/samsung/exynos_tmu_data.c   |   35 
  4 files changed, 86 insertions(+), 48 deletions(-)

 diff --git a/drivers/thermal/samsung/exynos_thermal_common.h 
 b/drivers/thermal/samsung/exynos_thermal_common.h
 index 068f56c..fd789a5 100644
 --- a/drivers/thermal/samsung/exynos_thermal_common.h
 +++ b/drivers/thermal/samsung/exynos_thermal_common.h
 @@ -44,6 +44,13 @@
  
  #define EXYNOS_ZONE_COUNT   3
  
 +enum trigger_type {
 +THROTTLE_ACTIVE = 1,
 +THROTTLE_PASSIVE,
 +SW_TRIP,
 +HW_TRIP,
 +};
 +
  /**
   * struct freq_clip_table
   * @freq_clip_max: maximum frequency allowed for this cooling state.
 diff --git a/drivers/thermal/samsung/exynos_tmu.c 
 b/drivers/thermal/samsung/exynos_tmu.c
 index fa33a48..401ec98 100644
 --- a/drivers/thermal/samsung/exynos_tmu.c
 +++ b/drivers/thermal/samsung/exynos_tmu.c
 @@ -49,7 +49,6 @@
  #define EXYNOS_TMU_BUF_SLOPE_SEL_MASK   0xf
  #define EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT  8
  #define EXYNOS_TMU_CORE_EN_SHIFT0
 -#define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET  50
  
  /* Exynos4210 specific registers */
  #define EXYNOS4210_TMU_REG_THRESHOLD_TEMP   0x44
 @@ -94,9 +93,6 @@
  #define EXYNOS_TMU_INTEN_FALL1_SHIFT20
  #define EXYNOS_TMU_INTEN_FALL2_SHIFT24
  
 -#define EFUSE_MIN_VALUE 40
 -#define EFUSE_MAX_VALUE 100
 -
  #ifdef CONFIG_THERMAL_EMULATION
  #define EXYNOS_EMUL_TIME0x57F0
  #define EXYNOS_EMUL_TIME_MASK   0x
 @@ -136,15 +132,16 @@ static int temp_to_code(struct exynos_tmu_data *data, 
 u8 temp)
  
  switch (pdata-cal_type) {
  case TYPE_TWO_POINT_TRIMMING:
 -temp_code = (temp - 25) *
 -(data-temp_error2 - data-temp_error1) /
 -(85 - 25) + data-temp_error1;
 +temp_code = (temp - pdata-first_point_trim) *
 +(data-temp_error2 - data-temp_error1) /
 +(pdata-second_point_trim - pdata-first_point_trim) +
 +data-temp_error1;
  break;
  case TYPE_ONE_POINT_TRIMMING:
 -temp_code = temp + data-temp_error1 - 25;
 +temp_code = temp + data-temp_error1 - pdata-first_point_trim;
  break;
  default:
 -temp_code = temp + EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
 +temp_code = temp + pdata-default_temp_offset;
  break;
  }
  out:
 @@ -169,14 +166,16 @@ static int code_to_temp(struct exynos_tmu_data *data, 
 u8 temp_code)
  
  switch (pdata-cal_type) {
  case TYPE_TWO_POINT_TRIMMING:
 -temp = (temp_code - data-temp_error1) * (85 - 25) /
 -(data-temp_error2 - data-temp_error1) + 25;
 +temp = (temp_code - data-temp_error1) *
 +(pdata-second_point_trim - pdata-first_point_trim) /
 +(data-temp_error2 - data-temp_error1) +
 +pdata-first_point_trim;
  break;
  case TYPE_ONE_POINT_TRIMMING:
 -temp = temp_code - data-temp_error1 + 25;
 +temp = temp_code - data-temp_error1 + pdata-first_point_trim;
  break;
  default:
 -temp = temp_code - EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
 +temp = temp_code - pdata-default_temp_offset;
  break;
  }
  out:
 @@ -209,8 +208,8 @@ static int exynos_tmu_initialize(struct platform_device 
 *pdev)
  data-temp_error1 = trim_info  EXYNOS_TMU_TRIM_TEMP_MASK;
  data-temp_error2 = ((trim_info  8)  EXYNOS_TMU_TRIM_TEMP_MASK);
  
 -if ((EFUSE_MIN_VALUE  data-temp_error1) ||
 -(data-temp_error1  EFUSE_MAX_VALUE) ||
 +if ((pdata-min_efuse_value  data-temp_error1) ||
 +(data-temp_error1  pdata-max_efuse_value) ||
  (data-temp_error2 != 0))
  data-temp_error1 = pdata-efuse_value;
  
 @@ -300,10 +299,10 @@ static void exynos_tmu_control(struct platform_device 
 *pdev, bool on)
  if (on) {
  con |= (1  EXYNOS_TMU_CORE_EN_SHIFT);
  interrupt_en =
 -pdata-trigger_level3_en

[PATCH V6 09/30] thermal: exynos: Add extra entries in the tmu platform data

2013-06-17 Thread Amit Daniel Kachhap 
This patch adds entries min_efuse_value, max_efuse_value, default_temp_offset,
trigger_type, cal_type, trim_first_point, trim_second_point, max_trigger_level
trigger_enable in the TMU platform data structure. Also the driver is modified
to use the data passed by these new platform memebers instead of the constant
macros. All these changes helps in separating the SOC specific data part from
the TMU driver.

Acked-by: Kukjin Kim kgene@samsung.com
Acked-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/thermal/samsung/exynos_thermal_common.h |7 +++
 drivers/thermal/samsung/exynos_tmu.c|   43 ++--
 drivers/thermal/samsung/exynos_tmu.h|   49 ++
 drivers/thermal/samsung/exynos_tmu_data.c   |   35 
 4 files changed, 86 insertions(+), 48 deletions(-)

diff --git a/drivers/thermal/samsung/exynos_thermal_common.h 
b/drivers/thermal/samsung/exynos_thermal_common.h
index 068f56c..fd789a5 100644
--- a/drivers/thermal/samsung/exynos_thermal_common.h
+++ b/drivers/thermal/samsung/exynos_thermal_common.h
@@ -44,6 +44,13 @@
 
 #define EXYNOS_ZONE_COUNT  3
 
+enum trigger_type {
+   THROTTLE_ACTIVE = 1,
+   THROTTLE_PASSIVE,
+   SW_TRIP,
+   HW_TRIP,
+};
+
 /**
  * struct freq_clip_table
  * @freq_clip_max: maximum frequency allowed for this cooling state.
diff --git a/drivers/thermal/samsung/exynos_tmu.c 
b/drivers/thermal/samsung/exynos_tmu.c
index fa33a48..401ec98 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -49,7 +49,6 @@
 #define EXYNOS_TMU_BUF_SLOPE_SEL_MASK  0xf
 #define EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT 8
 #define EXYNOS_TMU_CORE_EN_SHIFT   0
-#define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET 50
 
 /* Exynos4210 specific registers */
 #define EXYNOS4210_TMU_REG_THRESHOLD_TEMP  0x44
@@ -94,9 +93,6 @@
 #define EXYNOS_TMU_INTEN_FALL1_SHIFT   20
 #define EXYNOS_TMU_INTEN_FALL2_SHIFT   24
 
-#define EFUSE_MIN_VALUE 40
-#define EFUSE_MAX_VALUE 100
-
 #ifdef CONFIG_THERMAL_EMULATION
 #define EXYNOS_EMUL_TIME   0x57F0
 #define EXYNOS_EMUL_TIME_MASK  0x
@@ -136,15 +132,16 @@ static int temp_to_code(struct exynos_tmu_data *data, u8 
temp)
 
switch (pdata-cal_type) {
case TYPE_TWO_POINT_TRIMMING:
-   temp_code = (temp - 25) *
-   (data-temp_error2 - data-temp_error1) /
-   (85 - 25) + data-temp_error1;
+   temp_code = (temp - pdata-first_point_trim) *
+   (data-temp_error2 - data-temp_error1) /
+   (pdata-second_point_trim - pdata-first_point_trim) +
+   data-temp_error1;
break;
case TYPE_ONE_POINT_TRIMMING:
-   temp_code = temp + data-temp_error1 - 25;
+   temp_code = temp + data-temp_error1 - pdata-first_point_trim;
break;
default:
-   temp_code = temp + EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
+   temp_code = temp + pdata-default_temp_offset;
break;
}
 out:
@@ -169,14 +166,16 @@ static int code_to_temp(struct exynos_tmu_data *data, u8 
temp_code)
 
switch (pdata-cal_type) {
case TYPE_TWO_POINT_TRIMMING:
-   temp = (temp_code - data-temp_error1) * (85 - 25) /
-   (data-temp_error2 - data-temp_error1) + 25;
+   temp = (temp_code - data-temp_error1) *
+   (pdata-second_point_trim - pdata-first_point_trim) /
+   (data-temp_error2 - data-temp_error1) +
+   pdata-first_point_trim;
break;
case TYPE_ONE_POINT_TRIMMING:
-   temp = temp_code - data-temp_error1 + 25;
+   temp = temp_code - data-temp_error1 + pdata-first_point_trim;
break;
default:
-   temp = temp_code - EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
+   temp = temp_code - pdata-default_temp_offset;
break;
}
 out:
@@ -209,8 +208,8 @@ static int exynos_tmu_initialize(struct platform_device 
*pdev)
data-temp_error1 = trim_info  EXYNOS_TMU_TRIM_TEMP_MASK;
data-temp_error2 = ((trim_info  8)  EXYNOS_TMU_TRIM_TEMP_MASK);
 
-   if ((EFUSE_MIN_VALUE  data-temp_error1) ||
-   (data-temp_error1  EFUSE_MAX_VALUE) ||
+   if ((pdata-min_efuse_value  data-temp_error1) ||
+   (data-temp_error1  pdata-max_efuse_value) ||
(data-temp_error2 != 0))
data-temp_error1 = pdata-efuse_value;
 
@@ -300,10 +299,10 @@ static void exynos_tmu_control(struct platform_device 
*pdev, bool on)
if (on) {
con |= (1  EXYNOS_TMU_CORE_EN_SHIFT);
interrupt_en =
-   pdata-trigger_level3_en  EXYNOS_TMU_INTEN_RISE3_SHIFT |
-   pdata-trigger_level2_en