Re: [PATCH v2 04/11] ARM: EXYNOS: add interrupt definitions for EXYNOS5250

2012-03-07 Thread Kukjin Kim

On 03/06/12 10:55, Olof Johansson wrote:

Hi,

On Tue, Feb 21, 2012 at 2:35 AM, Kukjin Kimkgene@samsung.com  wrote:


Yes, as you said, it brakes single zImage for EXYNOS4 + EXYNOS5
(mach-exynos). So I'm working on regarding resource for EXYNOS SoCs and I
think, it can resolve the problem you said before v3.4 merge window.

If any updates, let you know.


Just a friendly reminder; the time is close to running out for staging
new code for 3.4.


Hi Olof,

Thanks for your kindly reminder but I couldn't finish it yet because it 
is required to touch most of samsung stuff, and it's a big change. 
Frankly, I need more time...


So how about sending current exynos5 stuff for now and then sorting out 
single kernel for exynos4 and exynos5 next time? Actually, this exynos5 
arch part is _really_ needed for developing/contribution of drivers on 
exynos5.


Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
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Re: [PATCH v2 04/11] ARM: EXYNOS: add interrupt definitions for EXYNOS5250

2012-03-07 Thread Kyungmin Park
On Wed, Mar 7, 2012 at 10:12 PM, Kukjin Kim kgene@samsung.com wrote:
 On 03/06/12 10:55, Olof Johansson wrote:

 Hi,

 On Tue, Feb 21, 2012 at 2:35 AM, Kukjin Kimkgene@samsung.com  wrote:

 Yes, as you said, it brakes single zImage for EXYNOS4 + EXYNOS5
 (mach-exynos). So I'm working on regarding resource for EXYNOS SoCs and I
 think, it can resolve the problem you said before v3.4 merge window.

 If any updates, let you know.


 Just a friendly reminder; the time is close to running out for staging
 new code for 3.4.

 Hi Olof,

 Thanks for your kindly reminder but I couldn't finish it yet because it is
 required to touch most of samsung stuff, and it's a big change. Frankly, I
 need more time...

 So how about sending current exynos5 stuff for now and then sorting out
 single kernel for exynos4 and exynos5 next time? Actually, this exynos5 arch
 part is _really_ needed for developing/contribution of drivers on exynos5.
No,

I heard too many times. we have plan to support ... but I didn't see
any progress.
it's general rules. you should fix it correctly and merged correctly
instead of not now

Thank you,
Kyungmin Park


 Thanks.

 Best regards,
 Kgene.
 --
 Kukjin Kim kgene@samsung.com, Senior Engineer,
 SW Solution Development Team, Samsung Electronics Co., Ltd.
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Re: [PATCH v2 04/11] ARM: EXYNOS: add interrupt definitions for EXYNOS5250

2012-03-07 Thread Olof Johansson
Hi,

On Wed, Mar 7, 2012 at 5:12 AM, Kukjin Kim kgene@samsung.com wrote:

 Thanks for your kindly reminder but I couldn't finish it yet because it is
 required to touch most of samsung stuff, and it's a big change. Frankly, I
 need more time...

 So how about sending current exynos5 stuff for now and then sorting out
 single kernel for exynos4 and exynos5 next time? Actually, this exynos5 arch
 part is _really_ needed for developing/contribution of drivers on exynos5.

I suggest that you work on the code until it's in shape to go in. If
we pick it up half-finished it just causes extra churn.

We have been pushing back on v6/v7 additions that are not multi-board
and multi-soc within the same machine type. Not being able to build a
combined binary with exynos 4 and 5 support in one would be a step
backwards on that effort.

I'm not sure I understand the argument about drivers -- they should
mostly be possible to submit and get included without the core SoC
patches such that when those land, you'll have a fully functional
system.


-Olof
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Re: [PATCH v2 04/11] ARM: EXYNOS: add interrupt definitions for EXYNOS5250

2012-03-06 Thread Olof Johansson
Hi,

On Tue, Feb 21, 2012 at 2:35 AM, Kukjin Kim kgene@samsung.com wrote:

 Yes, as you said, it brakes single zImage for EXYNOS4 + EXYNOS5
 (mach-exynos). So I'm working on regarding resource for EXYNOS SoCs and I
 think, it can resolve the problem you said before v3.4 merge window.

 If any updates, let you know.

Just a friendly reminder; the time is close to running out for staging
new code for 3.4.


-Olof
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RE: [PATCH v2 04/11] ARM: EXYNOS: add interrupt definitions for EXYNOS5250

2012-02-21 Thread Kukjin Kim
Olof Johansson wrote:
 
 Hi,
 
Hi Olof,

[snip]

  +#ifdef CONFIG_ARCH_EXYNOS4
  +
 
 irqs.h seems to be one of the major files that causes conflicts if a
 combined EXYNOS4+5 kernel is built (after editing Kconfig to allow
 both). Can you please try to come up with a way to allow both of them
 to coexist instead of making them exclusive?
 
Yes, as you said, it brakes single zImage for EXYNOS4 + EXYNOS5
(mach-exynos). So I'm working on regarding resource for EXYNOS SoCs and I
think, it can resolve the problem you said before v3.4 merge window.

If any updates, let you know.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

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Re: [PATCH v2 04/11] ARM: EXYNOS: add interrupt definitions for EXYNOS5250

2012-02-16 Thread Olof Johansson
Hi,

On Sat, Feb 11, 2012 at 9:34 AM, Kukjin Kim kgene@samsung.com wrote:
 This patch adds the interrupt definitions for EXYNOS5250 at
 mach/irqs.h file. Basically, now it is needed for EXYNOS5250
 interrupt and will be updated for single zImage next time.

 Signed-off-by: Kukjin Kim kgene@samsung.com
 ---
  arch/arm/mach-exynos/include/mach/irqs.h |  236 
 +-
  1 files changed, 232 insertions(+), 4 deletions(-)

 diff --git a/arch/arm/mach-exynos/include/mach/irqs.h 
 b/arch/arm/mach-exynos/include/mach/irqs.h
 index f77bce0..0dab1b1 100644
 --- a/arch/arm/mach-exynos/include/mach/irqs.h
 +++ b/arch/arm/mach-exynos/include/mach/irqs.h
 @@ -1,9 +1,8 @@
 -/* linux/arch/arm/mach-exynos4/include/mach/irqs.h
 - *
 - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
 +/*
 + * Copyright (c) 2010-2012 Samsung Electronics Co., Ltd.
  *             http://www.samsung.com
  *
 - * EXYNOS4 - IRQ definitions
 + * EXYNOS - IRQ definitions
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
 @@ -25,6 +24,8 @@

  #define IRQ_SPI(x)             (x+32)

 +#ifdef CONFIG_ARCH_EXYNOS4
 +

irqs.h seems to be one of the major files that causes conflicts if a
combined EXYNOS4+5 kernel is built (after editing Kconfig to allow
both). Can you please try to come up with a way to allow both of them
to coexist instead of making them exclusive?


-Olof



-Olof
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[PATCH v2 04/11] ARM: EXYNOS: add interrupt definitions for EXYNOS5250

2012-02-11 Thread Kukjin Kim
This patch adds the interrupt definitions for EXYNOS5250 at
mach/irqs.h file. Basically, now it is needed for EXYNOS5250
interrupt and will be updated for single zImage next time.

Signed-off-by: Kukjin Kim kgene@samsung.com
---
 arch/arm/mach-exynos/include/mach/irqs.h |  236 +-
 1 files changed, 232 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-exynos/include/mach/irqs.h 
b/arch/arm/mach-exynos/include/mach/irqs.h
index f77bce0..0dab1b1 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -1,9 +1,8 @@
-/* linux/arch/arm/mach-exynos4/include/mach/irqs.h
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+/*
+ * Copyright (c) 2010-2012 Samsung Electronics Co., Ltd.
  * http://www.samsung.com
  *
- * EXYNOS4 - IRQ definitions
+ * EXYNOS - IRQ definitions
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -25,6 +24,8 @@
 
 #define IRQ_SPI(x) (x+32)
 
+#ifdef CONFIG_ARCH_EXYNOS4
+
 #define IRQ_EINT0  IRQ_SPI(16)
 #define IRQ_EINT1  IRQ_SPI(17)
 #define IRQ_EINT2  IRQ_SPI(18)
@@ -170,5 +171,232 @@
 
 /* Set the default NR_IRQS */
 #define NR_IRQS(IRQ_TIMER_BASE + IRQ_TIMER_COUNT)
+#endif
+
+#ifdef CONFIG_ARCH_EXYNOS5
+#define IRQ_EINT16_31  IRQ_SPI(32)
+#define IRQ_MDMA0  IRQ_SPI(33)
+#define IRQ_PDMA0  IRQ_SPI(34)
+#define IRQ_PDMA1  IRQ_SPI(35)
+#define IRQ_TIMER0_VIC IRQ_SPI(36)
+#define IRQ_TIMER1_VIC IRQ_SPI(37)
+#define IRQ_TIMER2_VIC IRQ_SPI(38)
+#define IRQ_TIMER3_VIC IRQ_SPI(39)
+#define IRQ_TIMER4_VIC IRQ_SPI(40)
+#define IRQ_RTIC   IRQ_SPI(41)
+#define IRQ_WDTIRQ_SPI(42)
+#define IRQ_RTC_ALARM  IRQ_SPI(43)
+#define IRQ_RTC_TICIRQ_SPI(44)
+#define IRQ_GPIO_XBIRQ_SPI(45)
+#define IRQ_GPIO_XAIRQ_SPI(46)
+#define IRQ_GPIO   IRQ_SPI(47)
+#define IRQ_IEM_IECIRQ_SPI(48)
+#define IRQ_IEM_APCIRQ_SPI(49)
+#define IRQ_GPIO_C2C   IRQ_SPI(50)
+#define IRQ_UART0  IRQ_SPI(51)
+#define IRQ_UART1  IRQ_SPI(52)
+#define IRQ_UART2  IRQ_SPI(53)
+#define IRQ_UART3  IRQ_SPI(54)
+#define IRQ_UART4  IRQ_SPI(55)
+#define IRQ_IICIRQ_SPI(56)
+#define IRQ_IIC1   IRQ_SPI(57)
+#define IRQ_IIC2   IRQ_SPI(58)
+#define IRQ_IIC3   IRQ_SPI(59)
+#define IRQ_IIC4   IRQ_SPI(60)
+#define IRQ_IIC5   IRQ_SPI(61)
+#define IRQ_IIC6   IRQ_SPI(62)
+#define IRQ_IIC7   IRQ_SPI(63)
+#define IRQ_IIC_HDMIPHYIRQ_SPI(64)
+#define IRQ_TMUIRQ_SPI(65)
+#define IRQ_FIQ_0  IRQ_SPI(66)
+#define IRQ_FIQ_1  IRQ_SPI(67)
+#define IRQ_SPI0   IRQ_SPI(68)
+#define IRQ_SPI1   IRQ_SPI(69)
+#define IRQ_SPI2   IRQ_SPI(70)
+#define IRQ_USB_HOST   IRQ_SPI(71)
+#define IRQ_USB3_DRD   IRQ_SPI(72)
+#define IRQ_MIPI_HSI   IRQ_SPI(73)
+#define IRQ_USB_HSOTG  IRQ_SPI(74)
+#define IRQ_HSMMC0 IRQ_SPI(75)
+#define IRQ_HSMMC1 IRQ_SPI(76)
+#define IRQ_HSMMC2 IRQ_SPI(77)
+#define IRQ_HSMMC3 IRQ_SPI(78)
+#define IRQ_MIPICSI0   IRQ_SPI(79)
+#define IRQ_MIPICSI1   IRQ_SPI(80)
+#define IRQ_EFNFCON_DMA_ABORT  IRQ_SPI(81)
+#define IRQ_MIPIDSI0   IRQ_SPI(82)
+#define IRQ_ROTATORIRQ_SPI(84)
+#define IRQ_GSC0   IRQ_SPI(85)
+#define IRQ_GSC1   IRQ_SPI(86)
+#define IRQ_GSC2   IRQ_SPI(87)
+#define IRQ_GSC3   IRQ_SPI(88)
+#define IRQ_JPEG   IRQ_SPI(89)
+#define IRQ_EFNFCON_DMAIRQ_SPI(90)
+#define IRQ_2D IRQ_SPI(91)
+#define IRQ_SFMC0  IRQ_SPI(92)
+#define IRQ_SFMC1  IRQ_SPI(93)
+#define IRQ_MIXER  IRQ_SPI(94)
+#define IRQ_HDMI   IRQ_SPI(95)
+#define IRQ_MFCIRQ_SPI(96)
+#define IRQ_AUDIO_SS   IRQ_SPI(97)
+#define IRQ_I2S0   IRQ_SPI(98)
+#define IRQ_I2S1   IRQ_SPI(99)
+#define IRQ_I2S2   IRQ_SPI(100)
+#define IRQ_AC97   IRQ_SPI(101)
+#define IRQ_PCM0   IRQ_SPI(102)
+#define IRQ_PCM1   IRQ_SPI(103)
+#define IRQ_PCM2   IRQ_SPI(104)
+#define IRQ_SPDIF  IRQ_SPI(105)
+#define IRQ_ADC0   IRQ_SPI(106)
+
+#define IRQ_SATA_PHY   IRQ_SPI(108)
+#define IRQ_SATA_PMEMREQ   IRQ_SPI(109)
+#define IRQ_CAM_C  IRQ_SPI(110)
+#define IRQ_EAGLE_PMU  IRQ_SPI(111)
+#define IRQ_INTFEEDCTRL_SSSIRQ_SPI(112)
+#define IRQ_DP1_INTP1