Add DTS for the Hardkernel Odroid XU3. The name of the DTS file is kept the
same as the vendors naming, which means it's prefixed with exynos5422
instead of exynos5800 as the SoC name even though it includes the
exyno5800 dtsi.
Signed-off-by: Sjoerd Simons sjoerd.sim...@collabora.co.uk
---
Changes since v1:
* Add chosen/linux,stdout-path to point the serial console device
* Change memory start offset to 0x4000 to match the vendors DTS (pointed
out by Heesub Shin)
* Declare base address size for the memory banks to be used by the MFC
Changes since v2:
* Correct hdmi supplies (spotted by Joonyoung Shim). This currently doesn't
have a practical impact as all supplies are always-on, but makes the dts
match the schematics.
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/exynos5422-odroidxu3.dts | 332 +
2 files changed, 333 insertions(+)
create mode 100644 arch/arm/boot/dts/exynos5422-odroidxu3.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 91bd5bd..df397c2 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -98,6 +98,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos3250-monk.dtb \
exynos5420-arndale-octa.dtb \
exynos5420-peach-pit.dtb \
exynos5420-smdk5420.dtb \
+ exynos5422-odroidxu3.dtb \
exynos5440-sd5v1.dtb \
exynos5440-ssdk5440.dtb \
exynos5800-peach-pi.dtb
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
new file mode 100644
index 000..c29123c
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
@@ -0,0 +1,332 @@
+/*
+ * Hardkernel Odroid XU3 board device tree source
+ *
+ * Copyright (c) 2014 Collabora Ltd.
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+#include exynos5800.dtsi
+
+/ {
+ model = Hardkernel Odroid XU3;
+ compatible = hardkernel,odroid-xu3, samsung,exynos5800,
samsung,exynos5;
+
+ memory {
+ reg = 0x4000 0x8000;
+ };
+
+ chosen {
+ linux,stdout-path = serial_2;
+ };
+
+ fimd@1440 {
+ status = okay;
+ };
+
+ firmware@02073000 {
+ compatible = samsung,secure-firmware;
+ reg = 0x02073000 0x1000;
+ };
+
+ fixed-rate-clocks {
+ oscclk {
+ compatible = samsung,exynos5420-oscclk;
+ clock-frequency = 2400;
+ };
+ };
+
+ hsi2c_4: i2c@12CA {
+ status = okay;
+
+ s2mps11_pmic@66 {
+ compatible = samsung,s2mps11-pmic;
+ reg = 0x66;
+ s2mps11,buck2-ramp-delay = 12;
+ s2mps11,buck34-ramp-delay = 12;
+ s2mps11,buck16-ramp-delay = 12;
+ s2mps11,buck6-ramp-enable = 1;
+ s2mps11,buck2-ramp-enable = 1;
+ s2mps11,buck3-ramp-enable = 1;
+ s2mps11,buck4-ramp-enable = 1;
+
+ s2mps11_osc: clocks {
+ #clock-cells = 1;
+ clock-output-names = s2mps11_ap,
+ s2mps11_cp, s2mps11_bt;
+ };
+
+ regulators {
+ ldo1_reg: LDO1 {
+ regulator-name = vdd_ldo1;
+ regulator-min-microvolt = 100;
+ regulator-max-microvolt = 100;
+ regulator-always-on;
+ };
+
+ ldo3_reg: LDO3 {
+ regulator-name = vdd_ldo3;
+ regulator-min-microvolt = 180;
+ regulator-max-microvolt = 180;
+ regulator-always-on;
+ };
+
+ ldo5_reg: LDO5 {
+ regulator-name = vdd_ldo5;
+ regulator-min-microvolt = 180;
+ regulator-max-microvolt = 180;
+ regulator-always-on;
+ };
+
+ ldo6_reg: LDO6 {
+ regulator-name = vdd_ldo6;
+ regulator-min-microvolt = 100;
+
