Re: [PATCH v3 6/7] ARM: dts: Set i2c7 clock at 400kHz for Peach boards

2014-09-10 Thread Doug Anderson 
Javier,

On Wed, Sep 10, 2014 at 3:19 AM, Javier Martinez Canillas
 wrote:
> The downstream ChromeOS 3.8 kernel sets the clock frequency
> for the I2C bus 7 at 400kHz. Do the same change in mainline.
>
> Suggested-by: Doug Anderson 
> Signed-off-by: Javier Martinez Canillas 
> ---
>  arch/arm/boot/dts/exynos5420-peach-pit.dts | 1 +
>  arch/arm/boot/dts/exynos5800-peach-pi.dts  | 1 +
>  2 files changed, 2 insertions(+)

Reviewed-by: Doug Anderson 
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[PATCH v3 6/7] ARM: dts: Set i2c7 clock at 400kHz for Peach boards

2014-09-10 Thread Javier Martinez Canillas 
The downstream ChromeOS 3.8 kernel sets the clock frequency
for the I2C bus 7 at 400kHz. Do the same change in mainline.

Suggested-by: Doug Anderson 
Signed-off-by: Javier Martinez Canillas 
---
 arch/arm/boot/dts/exynos5420-peach-pit.dts | 1 +
 arch/arm/boot/dts/exynos5800-peach-pi.dts  | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts 
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index b8fea56..f247709 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -489,6 +489,7 @@
 
 &hsi2c_7 {
status = "okay";
+   clock-frequency = <40>;
 
max98090: codec@10 {
compatible = "maxim,max98090";
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts 
b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index 17537f0..88b3544 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -487,6 +487,7 @@
 
 &hsi2c_7 {
status = "okay";
+   clock-frequency = <40>;
 
max98091: codec@10 {
compatible = "maxim,max98091";
-- 
2.1.0

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