[PATCH v6] ARM: EXYNOS: Use MCPM call-backs to support S2R on Exynos5420

2014-07-04 Thread Abhilash Kesavan 
Use the MCPM layer to handle core suspend/resume on Exynos5420.
Also, restore the entry address setup code post-resume.

Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
---
Changes in v2:
- Made use of the MCPM suspend/powered_up call-backs
Changes in v3:
- Used the residency value to indicate the entered state
Changes in v4:
- Checked if MCPM has been enabled to prevent build error
Changes in v5:
- Removed the MCPM flags and just used a local flag to
indicate that we are suspending.
Changes in v6:
- Read the SYS_PWR_REG value to decide if we are suspending
the system.
- Restore the SYS_PWR_REG value post-resume.
- Modified the comments to reflect the first change.

This has been tested both on an SMDK5420 and Peach Pit Chromebook on
next-20140704. Nicolas' boot cluster CCI enablement patches are in
linux-next now.

Here are the dependencies (some of these patches did not apply cleanly):
1) Cleanup patches for mach-exynos
http://comments.gmane.org/gmane.linux.kernel.samsung-soc/33772

2) PMU cleanup and refactoring for using DT
https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg671625.html

3) Exynos5420 PMU/S2R Series
http://comments.gmane.org/gmane.linux.kernel.samsung-soc/33898

4) Exynos5420 CPUIdle Series which populates MCPM suspend/powered_up
call-backs.
www.gossamer-threads.com/lists/linux/kernel/1945347
https://patchwork.kernel.org/patch/4357461/

5) Exynos5420 MCPM cluster power down support
http://www.spinics.net/lists/arm-kernel/msg339988.html

6) TPM reset mask patch
http://www.spinics.net/lists/arm-kernel/msg341884.html
 
 arch/arm/mach-exynos/mcpm-exynos.c |   55 ++--
 arch/arm/mach-exynos/pm.c  |   42 +--
 2 files changed, 80 insertions(+), 17 deletions(-)

diff --git a/arch/arm/mach-exynos/mcpm-exynos.c 
b/arch/arm/mach-exynos/mcpm-exynos.c
index 2dd51cc..26670e7 100644
--- a/arch/arm/mach-exynos/mcpm-exynos.c
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -15,6 +15,7 @@
 #include linux/delay.h
 #include linux/io.h
 #include linux/of_address.h
+#include linux/syscore_ops.h
 
 #include asm/cputype.h
 #include asm/cp15.h
@@ -30,6 +31,8 @@
 #define EXYNOS5420_USE_ARM_CORE_DOWN_STATE BIT(29)
 #define EXYNOS5420_USE_L2_COMMON_UP_STATE  BIT(30)
 
+static void __iomem *ns_sram_base_addr;
+
 /*
  * The common v7_exit_coherency_flush API could not be used because of the
  * Erratum 799270 workaround. This macro is the same as the common one (in
@@ -129,11 +132,11 @@ static int exynos_power_up(unsigned int cpu, unsigned int 
cluster)
  * and can only be executed on processors like A15 and A7 that hit the cache
  * with the C bit clear in the SCTLR register.
  */
-static void exynos_power_down(void)
+static void exynos_mcpm_power_down(u64 residency)
 {
unsigned int mpidr, cpu, cluster;
bool last_man = false, skip_wfi = false;
-   unsigned int cpunr;
+   unsigned int cpunr, temp;
 
mpidr = read_cpuid_mpidr();
cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
@@ -150,7 +153,15 @@ static void exynos_power_down(void)
BUG_ON(__mcpm_cluster_state(cluster) != CLUSTER_UP);
cpu_use_count[cpu][cluster]--;
if (cpu_use_count[cpu][cluster] == 0) {
-   exynos_cpu_power_down(cpunr);
+   /*
+* Bypass power down for CPU0 during suspend. Check for
+* the SYS_PWR_REG value to decide if we are suspending
+* the system.
+*/
+   temp = __raw_readl(pmu_base_addr +
+   EXYNOS5_ARM_CORE0_SYS_PWR_REG);
+   if ((cpu != 0) || ((temp  S5P_CORE_LOCAL_PWR_EN) != 0))
+   exynos_cpu_power_down(cpunr);
 
if (exynos_cluster_unused(cluster)) {
exynos_cluster_power_down(cluster);
@@ -209,6 +220,11 @@ static void exynos_power_down(void)
/* Not dead at this point?  Let our caller cope. */
 }
 
+static void exynos_power_down(void)
+{
+   exynos_mcpm_power_down(0);
+}
+
 static int exynos_wait_for_powerdown(unsigned int cpu, unsigned int cluster)
 {
unsigned int tries = 100;
@@ -250,11 +266,11 @@ static void exynos_suspend(u64 residency)
 {
unsigned int mpidr, cpunr;
 
-   exynos_power_down();
+   exynos_mcpm_power_down(residency);
 
/*
 * Execution reaches here only if cpu did not power down.
-* Hence roll back the changes done in exynos_power_down function.
+* Hence roll back the changes done in exynos_mcpm_power_down function.
 *
 * CAUTION: This function requires the stack data to be visible through
 * power down and can only be executed on processors like A15 and A7
@@ -319,10 +335,26 @@ static const struct of_device_id exynos_dt_mcpm_match[] = 
{
{},
 };
 
+static void exynos_mcpm_setup_entry_point(void)
+{
+   /*
+* U-Boot SPL is

Re: [PATCH v6] ARM: EXYNOS: Use MCPM call-backs to support S2R on Exynos5420

2014-07-04 Thread Nicolas Pitre 
On Fri, 4 Jul 2014, Abhilash Kesavan wrote:

 On Fri, Jul 4, 2014 at 9:43 AM, Nicolas Pitre nicolas.pi...@linaro.org 
 wrote:
  Another suggestion which might possibly be better: why not looking for
  the SYS_PWR_CFG bit in exynos_cpu_power_down() directly?  After all,
  exynos_cpu_power_down() is semantically supposed to do what its name
  suggest and could simply do nothing if the proper conditions are already
  in place.
 I have implemented this and it works fine. Patch coming up.

On Fri, 4 Jul 2014, Abhilash Kesavan wrote:

 Use the MCPM layer to handle core suspend/resume on Exynos5420.
 Also, restore the entry address setup code post-resume.
 
 Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
 ---
 Changes in v2:
   - Made use of the MCPM suspend/powered_up call-backs
 Changes in v3:
   - Used the residency value to indicate the entered state
 Changes in v4:
   - Checked if MCPM has been enabled to prevent build error
 Changes in v5:
   - Removed the MCPM flags and just used a local flag to
   indicate that we are suspending.
 Changes in v6:
   - Read the SYS_PWR_REG value to decide if we are suspending
   the system.
   - Restore the SYS_PWR_REG value post-resume.
   - Modified the comments to reflect the first change.

[...]

 @@ -150,7 +153,15 @@ static void exynos_power_down(void)
   BUG_ON(__mcpm_cluster_state(cluster) != CLUSTER_UP);
   cpu_use_count[cpu][cluster]--;
   if (cpu_use_count[cpu][cluster] == 0) {
 - exynos_cpu_power_down(cpunr);
 + /*
 +  * Bypass power down for CPU0 during suspend. Check for
 +  * the SYS_PWR_REG value to decide if we are suspending
 +  * the system.
 +  */
 + temp = __raw_readl(pmu_base_addr +
 + EXYNOS5_ARM_CORE0_SYS_PWR_REG);
 + if ((cpu != 0) || ((temp  S5P_CORE_LOCAL_PWR_EN) != 0))
 + exynos_cpu_power_down(cpunr);

Nah...  We're going in circles, aren't we?

What I suggested above is:

diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 67d383de61..0a48421860 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -110,6 +110,16 @@ static int exynos_irq_set_wake(struct irq_data *data, 
unsigned int state)
  */
 void exynos_cpu_power_down(int cpu)
 {
+   if (soc_is_exynos5250()  cpu == 0) {
+   /*
+* Bypass power down for CPU0 during suspend. Check for
+* the SYS_PWR_REG value to decide if we are suspending
+* the system.
+*/
+   int val = __raw_readl(pmu_base_addr 
+EXYNOS5_ARM_CORE0_SYS_PWR_REG);
+   if (!(val  S5P_CORE_LOCAL_PWR_EN))
+   return;
+   }
__raw_writel(0, EXYNOS_ARM_CORE_CONFIGURATION(cpu));
 }


Nicolas
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Re: [PATCH v6] ARM: EXYNOS: Use MCPM call-backs to support S2R on Exynos5420

2014-07-04 Thread Abhilash Kesavan 
Hi Nicolas,

On Sat, Jul 5, 2014 at 12:00 AM, Nicolas Pitre nicolas.pi...@linaro.org wrote:
 On Fri, 4 Jul 2014, Abhilash Kesavan wrote:

 On Fri, Jul 4, 2014 at 9:43 AM, Nicolas Pitre nicolas.pi...@linaro.org 
 wrote:
  Another suggestion which might possibly be better: why not looking for
  the SYS_PWR_CFG bit in exynos_cpu_power_down() directly?  After all,
  exynos_cpu_power_down() is semantically supposed to do what its name
  suggest and could simply do nothing if the proper conditions are already
  in place.
 I have implemented this and it works fine. Patch coming up.

 On Fri, 4 Jul 2014, Abhilash Kesavan wrote:

 Use the MCPM layer to handle core suspend/resume on Exynos5420.
 Also, restore the entry address setup code post-resume.

 Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
 ---
 Changes in v2:
   - Made use of the MCPM suspend/powered_up call-backs
 Changes in v3:
   - Used the residency value to indicate the entered state
 Changes in v4:
   - Checked if MCPM has been enabled to prevent build error
 Changes in v5:
   - Removed the MCPM flags and just used a local flag to
   indicate that we are suspending.
 Changes in v6:
   - Read the SYS_PWR_REG value to decide if we are suspending
   the system.
   - Restore the SYS_PWR_REG value post-resume.
   - Modified the comments to reflect the first change.

 [...]

 @@ -150,7 +153,15 @@ static void exynos_power_down(void)
   BUG_ON(__mcpm_cluster_state(cluster) != CLUSTER_UP);
   cpu_use_count[cpu][cluster]--;
   if (cpu_use_count[cpu][cluster] == 0) {
 - exynos_cpu_power_down(cpunr);
 + /*
 +  * Bypass power down for CPU0 during suspend. Check for
 +  * the SYS_PWR_REG value to decide if we are suspending
 +  * the system.
 +  */
 + temp = __raw_readl(pmu_base_addr +
 + EXYNOS5_ARM_CORE0_SYS_PWR_REG);
 + if ((cpu != 0) || ((temp  S5P_CORE_LOCAL_PWR_EN) != 0))
 + exynos_cpu_power_down(cpunr);

 Nah...  We're going in circles, aren't we?

 What I suggested above is:

 diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
 index 67d383de61..0a48421860 100644
 --- a/arch/arm/mach-exynos/pm.c
 +++ b/arch/arm/mach-exynos/pm.c
 @@ -110,6 +110,16 @@ static int exynos_irq_set_wake(struct irq_data *data, 
 unsigned int state)
   */
  void exynos_cpu_power_down(int cpu)
  {
 +   if (soc_is_exynos5250()  cpu == 0) {
 +   /*
 +* Bypass power down for CPU0 during suspend. Check for
 +* the SYS_PWR_REG value to decide if we are suspending
 +* the system.
 +*/
 +   int val = __raw_readl(pmu_base_addr 
 +EXYNOS5_ARM_CORE0_SYS_PWR_REG);
 +   if (!(val  S5P_CORE_LOCAL_PWR_EN))
 +   return;
 +   }
 __raw_writel(0, EXYNOS_ARM_CORE_CONFIGURATION(cpu));
  }
Ah, I get it, much nicer indeed. Will change.


 Nicolas
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Re: [PATCH v6] ARM: EXYNOS: Use MCPM call-backs to support S2R on Exynos5420

2014-07-04 Thread Abhilash Kesavan 
Hi Nicolas,

On Sat, Jul 5, 2014 at 12:32 AM, Abhilash Kesavan
kesavan.abhil...@gmail.com wrote:
 Hi Nicolas,

 On Sat, Jul 5, 2014 at 12:00 AM, Nicolas Pitre nicolas.pi...@linaro.org 
 wrote:
 On Fri, 4 Jul 2014, Abhilash Kesavan wrote:

 On Fri, Jul 4, 2014 at 9:43 AM, Nicolas Pitre nicolas.pi...@linaro.org 
 wrote:
  Another suggestion which might possibly be better: why not looking for
  the SYS_PWR_CFG bit in exynos_cpu_power_down() directly?  After all,
  exynos_cpu_power_down() is semantically supposed to do what its name
  suggest and could simply do nothing if the proper conditions are already
  in place.
 I have implemented this and it works fine. Patch coming up.

 On Fri, 4 Jul 2014, Abhilash Kesavan wrote:

 Use the MCPM layer to handle core suspend/resume on Exynos5420.
 Also, restore the entry address setup code post-resume.

 Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
 ---
 Changes in v2:
   - Made use of the MCPM suspend/powered_up call-backs
 Changes in v3:
   - Used the residency value to indicate the entered state
 Changes in v4:
   - Checked if MCPM has been enabled to prevent build error
 Changes in v5:
   - Removed the MCPM flags and just used a local flag to
   indicate that we are suspending.
 Changes in v6:
   - Read the SYS_PWR_REG value to decide if we are suspending
   the system.
   - Restore the SYS_PWR_REG value post-resume.
   - Modified the comments to reflect the first change.

 [...]

 @@ -150,7 +153,15 @@ static void exynos_power_down(void)
   BUG_ON(__mcpm_cluster_state(cluster) != CLUSTER_UP);
   cpu_use_count[cpu][cluster]--;
   if (cpu_use_count[cpu][cluster] == 0) {
 - exynos_cpu_power_down(cpunr);
 + /*
 +  * Bypass power down for CPU0 during suspend. Check for
 +  * the SYS_PWR_REG value to decide if we are suspending
 +  * the system.
 +  */
 + temp = __raw_readl(pmu_base_addr +
 + EXYNOS5_ARM_CORE0_SYS_PWR_REG);
 + if ((cpu != 0) || ((temp  S5P_CORE_LOCAL_PWR_EN) != 0))
 + exynos_cpu_power_down(cpunr);

 Nah...  We're going in circles, aren't we?

 What I suggested above is:

 diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
 index 67d383de61..0a48421860 100644
 --- a/arch/arm/mach-exynos/pm.c
 +++ b/arch/arm/mach-exynos/pm.c
 @@ -110,6 +110,16 @@ static int exynos_irq_set_wake(struct irq_data *data, 
 unsigned int state)
   */
  void exynos_cpu_power_down(int cpu)
  {
 +   if (soc_is_exynos5250()  cpu == 0) {
 +   /*
 +* Bypass power down for CPU0 during suspend. Check for
 +* the SYS_PWR_REG value to decide if we are suspending
 +* the system.
 +*/
 +   int val = __raw_readl(pmu_base_addr 
 +EXYNOS5_ARM_CORE0_SYS_PWR_REG);
 +   if (!(val  S5P_CORE_LOCAL_PWR_EN))
 +   return;
 +   }
 __raw_writel(0, EXYNOS_ARM_CORE_CONFIGURATION(cpu));
  }
 Ah, I get it, much nicer indeed. Will change.
On a different note, I have been using the cpuidle patchset
(https://patchwork.kernel.org/patch/4357421/) as base for S2R support
and had a question. Rather than making the driver depend on
ARCH_EXYNOS should it depend on EXYNOS5420_MCPM which in turn depends
on MCPM (like TC2) or should we just be making the bL cpuidle driver
depend on MCPM ?

Regards,
Abhilash



 Nicolas
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Re: [PATCH v6] ARM: EXYNOS: Use MCPM call-backs to support S2R on Exynos5420

2014-07-04 Thread Nicolas Pitre 
On Sat, 5 Jul 2014, Abhilash Kesavan wrote:

 On a different note, I have been using the cpuidle patchset
 (https://patchwork.kernel.org/patch/4357421/) as base for S2R support
 and had a question. Rather than making the driver depend on
 ARCH_EXYNOS should it depend on EXYNOS5420_MCPM which in turn depends
 on MCPM (like TC2) or should we just be making the bL cpuidle driver
 depend on MCPM ?

Probably making it depend on MCPM directly is the best approach.


Nicolas
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Re: [PATCH v6] ARM: EXYNOS: Use MCPM call-backs to support S2R on Exynos5420

2014-07-04 Thread Abhilash Kesavan 
Hi Nicolas,

On Sat, Jul 5, 2014 at 2:33 AM, Nicolas Pitre nicolas.pi...@linaro.org wrote:
 On Sat, 5 Jul 2014, Abhilash Kesavan wrote:

 On a different note, I have been using the cpuidle patchset
 (https://patchwork.kernel.org/patch/4357421/) as base for S2R support
 and had a question. Rather than making the driver depend on
 ARCH_EXYNOS should it depend on EXYNOS5420_MCPM which in turn depends
 on MCPM (like TC2) or should we just be making the bL cpuidle driver
 depend on MCPM ?

 Probably making it depend on MCPM directly is the best approach.
I'll discuss this with Chander and one of us will post a patch for it.

Regards,
Abhilash


 Nicolas
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