Re: Fwd: [PATCH v7] i2c: exynos5: add High Speed I2C controller driver
Hi, + - Samsung GPIO variant (deprecated): +- gpios: The order of the gpios should be the following: SDA, SCL. + The gpio specifier depends on the gpio controller. Huh? Why should we support a deprecated method with a new driver? This was left unanswered. I am curious. +Optional properties: + - samsung,hs-mode: Mode of operation, High speed or Fast speed mode. If not +specified, default value is 0. + - samsung,hs-clock-freq: Desired operating frequency in Hz of the bus. +If not specified, the default value in Hz is 10. + - samsung,fs-clock-freq: Desired operarting frequency in Hz of the bus. +If not specified, the default value in Hz is 10. NACK! We have a generic binding for defining the bus speed. And shouldn't hs-mode be set depending on the bus speed? Please use clock-frequency here, like other drivers do. + /* In auto mode the length of xfer cannot be 0 */ + if (i2c-msg-len == 0) + i2c_auto_conf |= 0x1; So you send some byte then? Why not reject the message? This is to support the probing the devices (i2cdetect cases) No! This is not a proper SMBUS_QUICK if you send a byte! If it doesn't work without sending data, then your device does not support it. This is not uncommon. Please check the smbus specs if you are unsure. + i2c-regs = of_iomap(np, 0); devm_ioremap_resource() This was a comment from Thomas on v1. https://lkml.org/lkml/2012/11/27/264 Kindly, suggest me which one is more optimal in this case. Optimal is difficult here, but devm_* has momentum and I prefer consistency. Thanks for your valuable time and comments You're welcome! Thanks for the submission. Wolfram -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Fwd: [PATCH v7] i2c: exynos5: add High Speed I2C controller driver
On 2 May 2013 16:57, Wolfram Sang w...@the-dreams.de wrote: Hi, + - Samsung GPIO variant (deprecated): +- gpios: The order of the gpios should be the following: SDA, SCL. + The gpio specifier depends on the gpio controller. Huh? Why should we support a deprecated method with a new driver? This was left unanswered. I am curious. This was a previous reply i sent out to public, With my recent testing i can remove this deprecated method and use pinctrl instead. will be fixed in next revision. +Optional properties: + - samsung,hs-mode: Mode of operation, High speed or Fast speed mode. If not +specified, default value is 0. + - samsung,hs-clock-freq: Desired operating frequency in Hz of the bus. +If not specified, the default value in Hz is 10. + - samsung,fs-clock-freq: Desired operarting frequency in Hz of the bus. +If not specified, the default value in Hz is 10. NACK! We have a generic binding for defining the bus speed. And shouldn't hs-mode be set depending on the bus speed? Please use clock-frequency here, like other drivers do. I've tested this as well. + /* In auto mode the length of xfer cannot be 0 */ + if (i2c-msg-len == 0) + i2c_auto_conf |= 0x1; So you send some byte then? Why not reject the message? This is to support the probing the devices (i2cdetect cases) No! This is not a proper SMBUS_QUICK if you send a byte! If it doesn't work without sending data, then your device does not support it. This is not uncommon. Please check the smbus specs if you are unsure. Ok, i will look into it, thanks for pointing out. With this fix, the i2cdetect works for me though. + i2c-regs = of_iomap(np, 0); devm_ioremap_resource() This was a comment from Thomas on v1. https://lkml.org/lkml/2012/11/27/264 Kindly, suggest me which one is more optimal in this case. Optimal is difficult here, but devm_* has momentum and I prefer consistency. I've seen the rate of adaption for devm_* functions, have changed in my local work. Thanks for your valuable time and comments You're welcome! Thanks for the submission. Thanks again. Naveen Wolfram -- Shine bright, (: Nav :) -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Fwd: [PATCH v7] i2c: exynos5: add High Speed I2C controller driver
On 16 April 2013 15:59, Wolfram Sang w...@the-dreams.de wrote:
Hi,
thanks for the submission.
On Thu, Apr 04, 2013 at 09:52:01PM -0700, Naveen Krishna Chatradhi wrote:
From: Naveen Krishna Chatradhi ch.nav...@samsung.com
Adds support for High Speed I2C driver found in Exynos5 and
later SoCs from Samsung.
This driver currently supports Auto mode.
Either explain the limitation of this mode or just leave this sentence.
Sure will add bit more explanation
Driver only supports Device Tree method.
Note: Added debugfs support for registers view, not tested.
Then leave it out, please.
I prefer leave it out for now.
Signed-off-by: Taekgyun Ko taeggyun...@samsung.com
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Reviewed-by: Simon Glass s...@google.com
Tested-by: Andrew Bresticker abres...@google.com
---
change since v6:
1. clock divisor function hs split to handle the error cases
2. Other irq types are handled
3. FIFO are handled more efficiently in TX and RX
4. More function description added
5. handled the return cases in xfer_msg function
.../devicetree/bindings/i2c/i2c-exynos5.txt| 50 ++
drivers/i2c/busses/Kconfig |7 +
drivers/i2c/busses/Makefile|1 +
drivers/i2c/busses/i2c-exynos5.c | 934
4 files changed, 992 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
create mode 100644 drivers/i2c/busses/i2c-exynos5.c
diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
new file mode 100644
index 000..0bc9347
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
@@ -0,0 +1,50 @@
+* Samsung's High Speed I2C controller
+
+The Samsung's High Speed I2C controller is used to interface with I2C
devices
+at various speeds ranging from 100khz to 3.4Mhz.
+
+Required properties:
+ - compatible: value should be.
+ (a) samsung,exynos5-hsi2c, for i2c compatible with exynos5 hsi2c.
+ - reg: physical base address of the controller and length of memory mapped
+region.
+ - interrupts: interrupt number to the cpu.
+
+ - Samsung GPIO variant (deprecated):
+- gpios: The order of the gpios should be the following: SDA, SCL.
+ The gpio specifier depends on the gpio controller.
Huh? Why should we support a deprecated method with a new driver?
+ - Pinctrl variant (preferred, if available):
+- pinctrl-0: Pin control group to be used for this controller.
+- pinctrl-names: Should contain only one value - default.
+
+Optional properties:
+ - samsung,hs-mode: Mode of operation, High speed or Fast speed mode. If
not
+specified, default value is 0.
+ - samsung,hs-clock-freq: Desired operating frequency in Hz of the bus.
+If not specified, the default value in Hz is 10.
+ - samsung,fs-clock-freq: Desired operarting frequency in Hz of the bus.
+If not specified, the default value in Hz is 10.
NACK! We have a generic binding for defining the bus speed. And
shouldn't hs-mode be set depending on the bus speed?
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index adfee98..9fbfa01 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -434,6 +434,13 @@ config I2C_EG20T
ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
+config I2C_EXYNOS5
+ tristate Exynos5 high-speed I2C driver
+ depends on ARCH_EXYNOS5 OF
+ help
+ Say Y here to include support for High-speed I2C controller in the
+ Exynos5 based Samsung SoCs.
s/High/high/
+struct exynos5_i2c {
+ struct i2c_adapter adap;
+ unsigned intsuspended:1;
+
+ struct i2c_msg *msg;
+ struct completion msg_complete;
+ unsigned intmsg_ptr;
+ unsigned intmsg_len;
+
+ unsigned intirq;
+
+ void __iomem*regs;
+ struct clk *clk;
+ struct device *dev;
+ int state;
+
+ /* GPIO lines for SDA/SCL*/
+ int gpios[2];
+
+ /* Controller operating frequency */
+ unsigned intclock;
+ unsigned intclk_cycle;
+ unsigned intclk_div;
+
+ /* HSI2C Controller can operate in
+ * 1. High speed upto 3.4Mbps
+ * 2. Fast speed upto 1Mbps
+ */
+ int speed_mode;
+};
Only one space as indentation after the type, please.
Will change to 1 space for all of them
+
+static const struct of_device_id exynos5_i2c_match[] = {
+ { .compatible = samsung,exynos5-hsi2c },
+ {},
+};
+MODULE_DEVICE_TABLE(of, exynos5_i2c_match);
+
+static inline void
Re: [PATCH v7] i2c: exynos5: add High Speed I2C controller driver
Hi,
thanks for the submission.
On Thu, Apr 04, 2013 at 09:52:01PM -0700, Naveen Krishna Chatradhi wrote:
From: Naveen Krishna Chatradhi ch.nav...@samsung.com
Adds support for High Speed I2C driver found in Exynos5 and
later SoCs from Samsung.
This driver currently supports Auto mode.
Either explain the limitation of this mode or just leave this sentence.
Driver only supports Device Tree method.
Note: Added debugfs support for registers view, not tested.
Then leave it out, please.
Signed-off-by: Taekgyun Ko taeggyun...@samsung.com
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Reviewed-by: Simon Glass s...@google.com
Tested-by: Andrew Bresticker abres...@google.com
---
change since v6:
1. clock divisor function hs split to handle the error cases
2. Other irq types are handled
3. FIFO are handled more efficiently in TX and RX
4. More function description added
5. handled the return cases in xfer_msg function
.../devicetree/bindings/i2c/i2c-exynos5.txt| 50 ++
drivers/i2c/busses/Kconfig |7 +
drivers/i2c/busses/Makefile|1 +
drivers/i2c/busses/i2c-exynos5.c | 934
4 files changed, 992 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
create mode 100644 drivers/i2c/busses/i2c-exynos5.c
diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
new file mode 100644
index 000..0bc9347
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
@@ -0,0 +1,50 @@
+* Samsung's High Speed I2C controller
+
+The Samsung's High Speed I2C controller is used to interface with I2C devices
+at various speeds ranging from 100khz to 3.4Mhz.
+
+Required properties:
+ - compatible: value should be.
+ (a) samsung,exynos5-hsi2c, for i2c compatible with exynos5 hsi2c.
+ - reg: physical base address of the controller and length of memory mapped
+region.
+ - interrupts: interrupt number to the cpu.
+
+ - Samsung GPIO variant (deprecated):
+- gpios: The order of the gpios should be the following: SDA, SCL.
+ The gpio specifier depends on the gpio controller.
Huh? Why should we support a deprecated method with a new driver?
+ - Pinctrl variant (preferred, if available):
+- pinctrl-0: Pin control group to be used for this controller.
+- pinctrl-names: Should contain only one value - default.
+
+Optional properties:
+ - samsung,hs-mode: Mode of operation, High speed or Fast speed mode. If not
+specified, default value is 0.
+ - samsung,hs-clock-freq: Desired operating frequency in Hz of the bus.
+If not specified, the default value in Hz is 10.
+ - samsung,fs-clock-freq: Desired operarting frequency in Hz of the bus.
+If not specified, the default value in Hz is 10.
NACK! We have a generic binding for defining the bus speed. And
shouldn't hs-mode be set depending on the bus speed?
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index adfee98..9fbfa01 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -434,6 +434,13 @@ config I2C_EG20T
ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
+config I2C_EXYNOS5
+ tristate Exynos5 high-speed I2C driver
+ depends on ARCH_EXYNOS5 OF
+ help
+ Say Y here to include support for High-speed I2C controller in the
+ Exynos5 based Samsung SoCs.
s/High/high/
+struct exynos5_i2c {
+ struct i2c_adapter adap;
+ unsigned intsuspended:1;
+
+ struct i2c_msg *msg;
+ struct completion msg_complete;
+ unsigned intmsg_ptr;
+ unsigned intmsg_len;
+
+ unsigned intirq;
+
+ void __iomem*regs;
+ struct clk *clk;
+ struct device *dev;
+ int state;
+
+ /* GPIO lines for SDA/SCL*/
+ int gpios[2];
+
+ /* Controller operating frequency */
+ unsigned intclock;
+ unsigned intclk_cycle;
+ unsigned intclk_div;
+
+ /* HSI2C Controller can operate in
+ * 1. High speed upto 3.4Mbps
+ * 2. Fast speed upto 1Mbps
+ */
+ int speed_mode;
+};
Only one space as indentation after the type, please.
+
+static const struct of_device_id exynos5_i2c_match[] = {
+ { .compatible = samsung,exynos5-hsi2c },
+ {},
+};
+MODULE_DEVICE_TABLE(of, exynos5_i2c_match);
+
+static inline void exynos5_i2c_stop(struct exynos5_i2c *i2c)
+{
+ writel(0, i2c-regs + HSI2C_INT_ENABLE);
+
+ complete(i2c-msg_complete);
+}
I wonder if this needs to be a seperate
Re: [PATCH v7] i2c: exynos5: add High Speed I2C controller driver
On 5 April 2013 10:22, Naveen Krishna Chatradhi
naveenkrishna...@gmail.com wrote:
From: Naveen Krishna Chatradhi ch.nav...@samsung.com
Adds support for High Speed I2C driver found in Exynos5 and
later SoCs from Samsung.
This driver currently supports Auto mode.
Driver only supports Device Tree method.
Note: Added debugfs support for registers view, not tested.
Signed-off-by: Taekgyun Ko taeggyun...@samsung.com
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Reviewed-by: Simon Glass s...@google.com
Tested-by: Andrew Bresticker abres...@google.com
---
change since v6:
1. clock divisor function hs split to handle the error cases
2. Other irq types are handled
3. FIFO are handled more efficiently in TX and RX
4. More function description added
5. handled the return cases in xfer_msg function
.../devicetree/bindings/i2c/i2c-exynos5.txt| 50 ++
drivers/i2c/busses/Kconfig |7 +
drivers/i2c/busses/Makefile|1 +
drivers/i2c/busses/i2c-exynos5.c | 934
4 files changed, 992 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
create mode 100644 drivers/i2c/busses/i2c-exynos5.c
diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
new file mode 100644
index 000..0bc9347
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
@@ -0,0 +1,50 @@
+* Samsung's High Speed I2C controller
+
+The Samsung's High Speed I2C controller is used to interface with I2C devices
+at various speeds ranging from 100khz to 3.4Mhz.
+
+Required properties:
+ - compatible: value should be.
+ (a) samsung,exynos5-hsi2c, for i2c compatible with exynos5 hsi2c.
+ - reg: physical base address of the controller and length of memory mapped
+region.
+ - interrupts: interrupt number to the cpu.
+
+ - Samsung GPIO variant (deprecated):
+- gpios: The order of the gpios should be the following: SDA, SCL.
+ The gpio specifier depends on the gpio controller.
+ - Pinctrl variant (preferred, if available):
+- pinctrl-0: Pin control group to be used for this controller.
+- pinctrl-names: Should contain only one value - default.
+
+Optional properties:
+ - samsung,hs-mode: Mode of operation, High speed or Fast speed mode. If not
+specified, default value is 0.
+ - samsung,hs-clock-freq: Desired operating frequency in Hz of the bus.
+If not specified, the default value in Hz is 10.
+ - samsung,fs-clock-freq: Desired operarting frequency in Hz of the bus.
+If not specified, the default value in Hz is 10.
+
+Example:
+
+ hsi2c@12ca {
+ compatible = samsung,exynos5-hsi2c;
+ reg = 0x12ca 0x100;
+ interrupts = 56;
+ samsung,fs-clock-freq = 10;
+ /* Samsung GPIO variant begins here */
+ gpios = gpd1 2 0 /* SDA */
+gpd1 3 0 /* SCL */;
+ /* Samsung GPIO variant ends here */
+ /* Pinctrl variant begins here */
+ pinctrl-0 = i2c4_bus;
+ pinctrl-names = default;
+ /* Pinctrl variant ends here */
+ #address-cells = 1;
+ #size-cells = 0;
+
+ s2mps11_pmic@66 {
+ compatible = samsung,s2mps11-pmic;
+ reg = 0x66;
+ };
+ };
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index adfee98..9fbfa01 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -434,6 +434,13 @@ config I2C_EG20T
ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
+config I2C_EXYNOS5
+ tristate Exynos5 high-speed I2C driver
+ depends on ARCH_EXYNOS5 OF
+ help
+ Say Y here to include support for High-speed I2C controller in the
+ Exynos5 based Samsung SoCs.
+
config I2C_GPIO
tristate GPIO-based bitbanging I2C
depends on GENERIC_GPIO
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 8f4fc23..b19366c 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -42,6 +42,7 @@ i2c-designware-platform-objs := i2c-designware-platdrv.o
obj-$(CONFIG_I2C_DESIGNWARE_PCI) += i2c-designware-pci.o
i2c-designware-pci-objs := i2c-designware-pcidrv.o
obj-$(CONFIG_I2C_EG20T)+= i2c-eg20t.o
+obj-$(CONFIG_I2C_EXYNOS5) += i2c-exynos5.o
obj-$(CONFIG_I2C_GPIO) += i2c-gpio.o
obj-$(CONFIG_I2C_HIGHLANDER) += i2c-highlander.o
obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o
diff --git a/drivers/i2c/busses/i2c-exynos5.c
[PATCH v7] i2c: exynos5: add High Speed I2C controller driver
From: Naveen Krishna Chatradhi ch.nav...@samsung.com
Adds support for High Speed I2C driver found in Exynos5 and
later SoCs from Samsung.
This driver currently supports Auto mode.
Driver only supports Device Tree method.
Note: Added debugfs support for registers view, not tested.
Signed-off-by: Taekgyun Ko taeggyun...@samsung.com
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Reviewed-by: Simon Glass s...@google.com
Tested-by: Andrew Bresticker abres...@google.com
---
change since v6:
1. clock divisor function hs split to handle the error cases
2. Other irq types are handled
3. FIFO are handled more efficiently in TX and RX
4. More function description added
5. handled the return cases in xfer_msg function
.../devicetree/bindings/i2c/i2c-exynos5.txt| 50 ++
drivers/i2c/busses/Kconfig |7 +
drivers/i2c/busses/Makefile|1 +
drivers/i2c/busses/i2c-exynos5.c | 934
4 files changed, 992 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
create mode 100644 drivers/i2c/busses/i2c-exynos5.c
diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
new file mode 100644
index 000..0bc9347
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
@@ -0,0 +1,50 @@
+* Samsung's High Speed I2C controller
+
+The Samsung's High Speed I2C controller is used to interface with I2C devices
+at various speeds ranging from 100khz to 3.4Mhz.
+
+Required properties:
+ - compatible: value should be.
+ (a) samsung,exynos5-hsi2c, for i2c compatible with exynos5 hsi2c.
+ - reg: physical base address of the controller and length of memory mapped
+region.
+ - interrupts: interrupt number to the cpu.
+
+ - Samsung GPIO variant (deprecated):
+- gpios: The order of the gpios should be the following: SDA, SCL.
+ The gpio specifier depends on the gpio controller.
+ - Pinctrl variant (preferred, if available):
+- pinctrl-0: Pin control group to be used for this controller.
+- pinctrl-names: Should contain only one value - default.
+
+Optional properties:
+ - samsung,hs-mode: Mode of operation, High speed or Fast speed mode. If not
+specified, default value is 0.
+ - samsung,hs-clock-freq: Desired operating frequency in Hz of the bus.
+If not specified, the default value in Hz is 10.
+ - samsung,fs-clock-freq: Desired operarting frequency in Hz of the bus.
+If not specified, the default value in Hz is 10.
+
+Example:
+
+ hsi2c@12ca {
+ compatible = samsung,exynos5-hsi2c;
+ reg = 0x12ca 0x100;
+ interrupts = 56;
+ samsung,fs-clock-freq = 10;
+ /* Samsung GPIO variant begins here */
+ gpios = gpd1 2 0 /* SDA */
+gpd1 3 0 /* SCL */;
+ /* Samsung GPIO variant ends here */
+ /* Pinctrl variant begins here */
+ pinctrl-0 = i2c4_bus;
+ pinctrl-names = default;
+ /* Pinctrl variant ends here */
+ #address-cells = 1;
+ #size-cells = 0;
+
+ s2mps11_pmic@66 {
+ compatible = samsung,s2mps11-pmic;
+ reg = 0x66;
+ };
+ };
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index adfee98..9fbfa01 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -434,6 +434,13 @@ config I2C_EG20T
ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
+config I2C_EXYNOS5
+ tristate Exynos5 high-speed I2C driver
+ depends on ARCH_EXYNOS5 OF
+ help
+ Say Y here to include support for High-speed I2C controller in the
+ Exynos5 based Samsung SoCs.
+
config I2C_GPIO
tristate GPIO-based bitbanging I2C
depends on GENERIC_GPIO
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 8f4fc23..b19366c 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -42,6 +42,7 @@ i2c-designware-platform-objs := i2c-designware-platdrv.o
obj-$(CONFIG_I2C_DESIGNWARE_PCI) += i2c-designware-pci.o
i2c-designware-pci-objs := i2c-designware-pcidrv.o
obj-$(CONFIG_I2C_EG20T)+= i2c-eg20t.o
+obj-$(CONFIG_I2C_EXYNOS5) += i2c-exynos5.o
obj-$(CONFIG_I2C_GPIO) += i2c-gpio.o
obj-$(CONFIG_I2C_HIGHLANDER) += i2c-highlander.o
obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o
diff --git a/drivers/i2c/busses/i2c-exynos5.c b/drivers/i2c/busses/i2c-exynos5.c
new file mode 100644
index 000..a38c616
--- /dev/null
+++ b/drivers/i2c/busses/i2c-exynos5.c
@@ -0,0 +1,934 @@
+/**
+ * i2c-exynos5.c - Samsung Exynos5 I2C Controller Driver
+ *
+ *
