Re: [PATCH V2 1/7] ARM: SAMSUNG: add additional registers and SFR definitions for writeback
On Friday, July 20, 2012 7:00 PM, Sylwester Nawrocki wrote: On 07/20/2012 04:59 AM, Leela Krishna Amudala wrote: --- a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h +++ b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h @@ -30,9 +30,16 @@ #define VIDCON1_FSTATUS_EVEN (1 15) /* Video timing controls */ +#ifdef CONFIG_FB_EXYNOS_FIMD_V8 +#define VIDTCON0(0x20010) +#define VIDTCON1(0x20014) +#define VIDTCON3(0x2001C) +#else #define VIDTCON0 (0x10) #define VIDTCON1 (0x14) #define VIDTCON2 (0x18) +#define VIDTCON3 (0x1C) +#endif Wouldn't it break s3c-fb on SoCs with earlier FIMD versions with CONFIG_FB_EXYNOS_FIMD_V8 selected? We are aiming at multi-platform ARM kernels, aren't we (i.e support of both V8 and earlier FIMD in one kernel)? Exynos5 has FIMD_V8 and other SoCs has older FIMD versions. As address offsets for certain registers has changed in FIMD_V8, we introduced these defines. So we have to select CONFIG_FB_EXYNOS_FIMD_V8 in case of Exynos5 SoC, and deselect for other SoCs. Yes, I'm aware of different FIMD versions in different SoCs. My point is that it shouldn't be necessary to deselect CONFIG_FB_EXYNOS_FIMD_V8 to support other SoCs than Exynos5, i.e. additional config options should be incremental - should not break other setups. Ideally there should not be any new config option for FIMD v8. The detection of FIMD version and selection of appropriate register offsets should be done in the driver at runtime, based for example on platform_device_id (see the s3c-fb driver and usage of s3c_fb_driverdata and s3c_fb_win_variant structs). I could not agree with Tomasz Figa more. FIMD register offset should be selected at runtime. Leela Krishna Amudala, Please, don't use ugly #ifdef. Best regards, Jingoo Han Yes, Each SoC having its own defconfigs (eg: exynos4_defconfig, exynos5_defconfig etc.,) So, CONFIG_FB_EXYNOS_FIMD_V8 will be added into exynos5_defconfig and it won't affect the other SoCs. NACK. As others explained, and you don't seem to understand or you are stubborn enough not to change your approach, resolving hardware differences at compile time only is not acceptable, especially that Exynos SoCs are going to be DT only platforms. We shouldn't be short-sighted like this. Especially that the problem is relatively easy to solve at run-time, just add EXYNOS5_* register address definitions and create separate functions at the driver(s) touching those registers that changed on Exynos5. Or parametrize existing ones with an offset that would be stored in driver data passed trough struct platform_device_id::driver_data. @Jingoo: BTW, shouldn't we have plat-samsung/include/plat/regs-fb.h plat-samsung/include/plat/regs-fb-v4.h merged into one file and moved under include/video/ ? Yes, you're right. I think that these files need to be merged to one file. Also, 'include/video/' seems to be good. For example include/video/s3c-fb.h, and board files could also include that header. We have FIMD variant structures anyway, so why do we still need multiple headers ? -- Regards, Sylwester -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V2 1/7] ARM: SAMSUNG: add additional registers and SFR definitions for writeback
On 07/20/2012 04:59 AM, Leela Krishna Amudala wrote: --- a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h +++ b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h @@ -30,9 +30,16 @@ #define VIDCON1_FSTATUS_EVEN (1 15) /* Video timing controls */ +#ifdef CONFIG_FB_EXYNOS_FIMD_V8 +#define VIDTCON0(0x20010) +#define VIDTCON1(0x20014) +#define VIDTCON3(0x2001C) +#else #define VIDTCON0 (0x10) #define VIDTCON1 (0x14) #define VIDTCON2 (0x18) +#define VIDTCON3 (0x1C) +#endif Wouldn't it break s3c-fb on SoCs with earlier FIMD versions with CONFIG_FB_EXYNOS_FIMD_V8 selected? We are aiming at multi-platform ARM kernels, aren't we (i.e support of both V8 and earlier FIMD in one kernel)? Exynos5 has FIMD_V8 and other SoCs has older FIMD versions. As address offsets for certain registers has changed in FIMD_V8, we introduced these defines. So we have to select CONFIG_FB_EXYNOS_FIMD_V8 in case of Exynos5 SoC, and deselect for other SoCs. Yes, I'm aware of different FIMD versions in different SoCs. My point is that it shouldn't be necessary to deselect CONFIG_FB_EXYNOS_FIMD_V8 to support other SoCs than Exynos5, i.e. additional config options should be incremental - should not break other setups. Ideally there should not be any new config option for FIMD v8. The detection of FIMD version and selection of appropriate register offsets should be done in the driver at runtime, based for example on platform_device_id (see the s3c-fb driver and usage of s3c_fb_driverdata and s3c_fb_win_variant structs). I could not agree with Tomasz Figa more. FIMD register offset should be selected at runtime. Leela Krishna Amudala, Please, don't use ugly #ifdef. Best regards, Jingoo Han Yes, Each SoC having its own defconfigs (eg: exynos4_defconfig, exynos5_defconfig etc.,) So, CONFIG_FB_EXYNOS_FIMD_V8 will be added into exynos5_defconfig and it won't affect the other SoCs. NACK. As others explained, and you don't seem to understand or you are stubborn enough not to change your approach, resolving hardware differences at compile time only is not acceptable, especially that Exynos SoCs are going to be DT only platforms. We shouldn't be short-sighted like this. Especially that the problem is relatively easy to solve at run-time, just add EXYNOS5_* register address definitions and create separate functions at the driver(s) touching those registers that changed on Exynos5. Or parametrize existing ones with an offset that would be stored in driver data passed trough struct platform_device_id::driver_data. @Jingoo: BTW, shouldn't we have plat-samsung/include/plat/regs-fb.h plat-samsung/include/plat/regs-fb-v4.h merged into one file and moved under include/video/ ? For example include/video/s3c-fb.h, and board files could also include that header. We have FIMD variant structures anyway, so why do we still need multiple headers ? -- Regards, Sylwester -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V2 1/7] ARM: SAMSUNG: add additional registers and SFR definitions for writeback
On 07/20/2012 01:07 PM, Leela Krishna Amudala wrote: Will do the run-time approach, and post the next version patchset soon. Great, thanks. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V2 1/7] ARM: SAMSUNG: add additional registers and SFR definitions for writeback
Hello Marek, On Wed, Jul 18, 2012 at 12:21 PM, Marek Szyprowski m.szyprow...@samsung.com wrote: Hello, On Wednesday, July 18, 2012 7:57 AM Leela Krishna Amudala wrote: This patch updates the register address offsets and adds SFR definitions for writeback for Samsung's V8 display controller. Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com --- arch/arm/plat-samsung/include/plat/regs-fb-v4.h | 10 arch/arm/plat-samsung/include/plat/regs-fb.h| 51 +++ drivers/video/Kconfig |6 +++ 3 files changed, 67 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h b/arch/arm/plat- samsung/include/plat/regs-fb-v4.h index 4c3647f..1639c17 100644 --- a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h +++ b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h @@ -30,9 +30,16 @@ #define VIDCON1_FSTATUS_EVEN (1 15) /* Video timing controls */ +#ifdef CONFIG_FB_EXYNOS_FIMD_V8 +#define VIDTCON0(0x20010) +#define VIDTCON1(0x20014) +#define VIDTCON3(0x2001C) +#else #define VIDTCON0 (0x10) #define VIDTCON1 (0x14) #define VIDTCON2 (0x18) +#define VIDTCON3 (0x1C) +#endif /* Window position controls */ @@ -43,9 +50,12 @@ #define VIDOSD_BASE (0x40) #define VIDINTCON0 (0x130) +#define VIDINTCON1 (0x134) /* WINCONx */ +#define WINCONx_CSC_CON_EQ709 (1 28) +#define WINCONx_CSC_CON_EQ601 (0 28) #define WINCONx_CSCWIDTH_MASK(0x3 26) #define WINCONx_CSCWIDTH_SHIFT (26) #define WINCONx_CSCWIDTH_WIDE(0x0 26) diff --git a/arch/arm/plat-samsung/include/plat/regs-fb.h b/arch/arm/plat- samsung/include/plat/regs-fb.h index 9a78012..6d2ee16 100644 --- a/arch/arm/plat-samsung/include/plat/regs-fb.h +++ b/arch/arm/plat-samsung/include/plat/regs-fb.h @@ -32,12 +32,28 @@ #define VIDCON0 (0x00) #define VIDCON0_INTERLACE(1 29) + +#ifdef CONFIG_FB_EXYNOS_FIMD_V8 +#define VIDOUT_CON (0x2) +#define VIDOUT_CON_VIDOUT_UP_MASK(0x1 16) +#define VIDOUT_CON_VIDOUT_UP_SHIFT (16) +#define VIDOUT_CON_VIDOUT_UP_ALWAYS (0x0 16) +#define VIDOUT_CON_VIDOUT_UP_START_FRAME (0x1 16) +#define VIDOUT_CON_VIDOUT_F_MASK (0x7 8) +#define VIDOUT_CON_VIDOUT_F_SHIFT(8) +#define VIDOUT_CON_VIDOUT_F_RGB (0x0 8) +#define VIDOUT_CON_VIDOUT_F_I80_LDI0 (0x2 8) +#define VIDOUT_CON_VIDOUT_F_I80_LDI1 (0x3 8) +#define VIDOUT_CON_VIDOUT_F_WB (0x4 8) +#endif + #define VIDCON0_VIDOUT_MASK (0x3 26) #define VIDCON0_VIDOUT_SHIFT (26) #define VIDCON0_VIDOUT_RGB (0x0 26) #define VIDCON0_VIDOUT_TV(0x1 26) #define VIDCON0_VIDOUT_I80_LDI0 (0x2 26) #define VIDCON0_VIDOUT_I80_LDI1 (0x3 26) +#define VIDCON0_VIDOUT_WB (0x4 26) #define VIDCON0_L1_DATA_MASK (0x7 23) #define VIDCON0_L1_DATA_SHIFT(23) @@ -81,7 +97,13 @@ #define VIDCON0_ENVID(1 1) #define VIDCON0_ENVID_F (1 0) +#ifdef CONFIG_FB_EXYNOS_FIMD_V8 +#define VIDOUT_CON (0x2) +#define VIDCON1 (0x20004) +#else #define VIDCON1 (0x04) +#endif + #define VIDCON1_LINECNT_MASK (0x7ff 16) #define VIDCON1_LINECNT_SHIFT(16) #define VIDCON1_LINECNT_GET(_v) (((_v) 16) 0x7ff) @@ -111,6 +133,14 @@ #define VIDCON2_TVFMTSEL1_RGB(0x0 12) #define VIDCON2_TVFMTSEL1_YUV422 (0x1 12) #define VIDCON2_TVFMTSEL1_YUV444 (0x2 12) +#define VIDCON2_TVFMTSEL1_SHIFT (12) +#define VIDCON2_TVFMTSEL_SW (1 14) +#define VIDCON2_TVFORMATSEL_YUV444 (0x2 12) + +#define VIDCON2_TVFMTSEL1_MASK (0x3 12) +#define VIDCON2_TVFMTSEL1_RGB(0x0 12) +#define VIDCON2_TVFMTSEL1_YUV422 (0x1 12) +#define VIDCON2_TVFMTSEL1_YUV444 (0x2 12) #define VIDCON2_ORGYCbCr (1 8) #define VIDCON2_YUVORDCrCb (1 7) @@ -165,8 +195,15 @@ #define VIDTCON1_HSPW_SHIFT (0) #define VIDTCON1_HSPW_LIMIT (0xff) #define
Re: [PATCH V2 1/7] ARM: SAMSUNG: add additional registers and SFR definitions for writeback
Hi Tomasz, On Wed, Jul 18, 2012 at 4:35 PM, Tomasz Figa tomasz.f...@gmail.com wrote: Hi, On Wednesday 18 of July 2012 11:27:27 Leela Krishna Amudala wrote: This patch updates the register address offsets and adds SFR definitions for writeback for Samsung's V8 display controller. Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com --- arch/arm/plat-samsung/include/plat/regs-fb-v4.h | 10 arch/arm/plat-samsung/include/plat/regs-fb.h| 51 +++ drivers/video/Kconfig |6 +++ 3 files changed, 67 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h index 4c3647f..1639c17 100644 --- a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h +++ b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h @@ -30,9 +30,16 @@ #define VIDCON1_FSTATUS_EVEN (1 15) /* Video timing controls */ +#ifdef CONFIG_FB_EXYNOS_FIMD_V8 +#define VIDTCON0(0x20010) +#define VIDTCON1(0x20014) +#define VIDTCON3(0x2001C) +#else #define VIDTCON0 (0x10) #define VIDTCON1 (0x14) #define VIDTCON2 (0x18) +#define VIDTCON3 (0x1C) +#endif Wouldn't it break s3c-fb on SoCs with earlier FIMD versions with CONFIG_FB_EXYNOS_FIMD_V8 selected? We are aiming at multi-platform ARM kernels, aren't we (i.e support of both V8 and earlier FIMD in one kernel)? Exynos5 has FIMD_V8 and other SoCs has older FIMD versions. As address offsets for certain registers has changed in FIMD_V8, we introduced these defines. So we have to select CONFIG_FB_EXYNOS_FIMD_V8 in case of Exynos5 SoC, and deselect for other SoCs. /* Window position controls */ @@ -43,9 +50,12 @@ #define VIDOSD_BASE (0x40) #define VIDINTCON0 (0x130) +#define VIDINTCON1 (0x134) /* WINCONx */ +#define WINCONx_CSC_CON_EQ709 (1 28) +#define WINCONx_CSC_CON_EQ601 (0 28) #define WINCONx_CSCWIDTH_MASK(0x3 26) #define WINCONx_CSCWIDTH_SHIFT (26) #define WINCONx_CSCWIDTH_WIDE(0x0 26) diff --git a/arch/arm/plat-samsung/include/plat/regs-fb.h b/arch/arm/plat-samsung/include/plat/regs-fb.h index 9a78012..6d2ee16 100644 --- a/arch/arm/plat-samsung/include/plat/regs-fb.h +++ b/arch/arm/plat-samsung/include/plat/regs-fb.h @@ -32,12 +32,28 @@ #define VIDCON0 (0x00) #define VIDCON0_INTERLACE(1 29) + +#ifdef CONFIG_FB_EXYNOS_FIMD_V8 +#define VIDOUT_CON (0x2) +#define VIDOUT_CON_VIDOUT_UP_MASK(0x1 16) +#define VIDOUT_CON_VIDOUT_UP_SHIFT (16) +#define VIDOUT_CON_VIDOUT_UP_ALWAYS (0x0 16) +#define VIDOUT_CON_VIDOUT_UP_START_FRAME (0x1 16) +#define VIDOUT_CON_VIDOUT_F_MASK (0x7 8) +#define VIDOUT_CON_VIDOUT_F_SHIFT(8) +#define VIDOUT_CON_VIDOUT_F_RGB (0x0 8) +#define VIDOUT_CON_VIDOUT_F_I80_LDI0 (0x2 8) +#define VIDOUT_CON_VIDOUT_F_I80_LDI1 (0x3 8) +#define VIDOUT_CON_VIDOUT_F_WB (0x4 8) +#endif + #define VIDCON0_VIDOUT_MASK (0x3 26) #define VIDCON0_VIDOUT_SHIFT (26) #define VIDCON0_VIDOUT_RGB (0x0 26) #define VIDCON0_VIDOUT_TV(0x1 26) #define VIDCON0_VIDOUT_I80_LDI0 (0x2 26) #define VIDCON0_VIDOUT_I80_LDI1 (0x3 26) +#define VIDCON0_VIDOUT_WB (0x4 26) #define VIDCON0_L1_DATA_MASK (0x7 23) #define VIDCON0_L1_DATA_SHIFT(23) @@ -81,7 +97,13 @@ #define VIDCON0_ENVID(1 1) #define VIDCON0_ENVID_F (1 0) +#ifdef CONFIG_FB_EXYNOS_FIMD_V8 +#define VIDOUT_CON (0x2) +#define VIDCON1 (0x20004) +#else #define VIDCON1 (0x04) +#endif Same here. Also isn't it a redefinition of VIDOUT_CON that was defined several lines above? Will be corrected in the next version patch set. Best Wishes, Leela Krishna Amudala. #define VIDCON1_LINECNT_MASK (0x7ff 16) #define VIDCON1_LINECNT_SHIFT(16) #define VIDCON1_LINECNT_GET(_v) (((_v) 16) 0x7ff) @@ -111,6 +133,14 @@ #define VIDCON2_TVFMTSEL1_RGB(0x0 12) #define VIDCON2_TVFMTSEL1_YUV422 (0x1 12) #define VIDCON2_TVFMTSEL1_YUV444 (0x2 12) +#define VIDCON2_TVFMTSEL1_SHIFT (12)
Re: [PATCH V2 1/7] ARM: SAMSUNG: add additional registers and SFR definitions for writeback
Hi Leela, On Thursday 19 of July 2012 18:30:44 Leela Krishna Amudala wrote: Hi Tomasz, On Wed, Jul 18, 2012 at 4:35 PM, Tomasz Figa tomasz.f...@gmail.com wrote: Hi, On Wednesday 18 of July 2012 11:27:27 Leela Krishna Amudala wrote: This patch updates the register address offsets and adds SFR definitions for writeback for Samsung's V8 display controller. Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com --- arch/arm/plat-samsung/include/plat/regs-fb-v4.h | 10 arch/arm/plat-samsung/include/plat/regs-fb.h| 51 +++ drivers/video/Kconfig |6 +++ 3 files changed, 67 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h index 4c3647f..1639c17 100644 --- a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h +++ b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h @@ -30,9 +30,16 @@ #define VIDCON1_FSTATUS_EVEN (1 15) /* Video timing controls */ +#ifdef CONFIG_FB_EXYNOS_FIMD_V8 +#define VIDTCON0(0x20010) +#define VIDTCON1(0x20014) +#define VIDTCON3(0x2001C) +#else #define VIDTCON0 (0x10) #define VIDTCON1 (0x14) #define VIDTCON2 (0x18) +#define VIDTCON3 (0x1C) +#endif Wouldn't it break s3c-fb on SoCs with earlier FIMD versions with CONFIG_FB_EXYNOS_FIMD_V8 selected? We are aiming at multi-platform ARM kernels, aren't we (i.e support of both V8 and earlier FIMD in one kernel)? Exynos5 has FIMD_V8 and other SoCs has older FIMD versions. As address offsets for certain registers has changed in FIMD_V8, we introduced these defines. So we have to select CONFIG_FB_EXYNOS_FIMD_V8 in case of Exynos5 SoC, and deselect for other SoCs. Yes, I'm aware of different FIMD versions in different SoCs. My point is that it shouldn't be necessary to deselect CONFIG_FB_EXYNOS_FIMD_V8 to support other SoCs than Exynos5, i.e. additional config options should be incremental - should not break other setups. Ideally there should not be any new config option for FIMD v8. The detection of FIMD version and selection of appropriate register offsets should be done in the driver at runtime, based for example on platform_device_id (see the s3c-fb driver and usage of s3c_fb_driverdata and s3c_fb_win_variant structs). Best regards, Tomasz Figa /* Window position controls */ @@ -43,9 +50,12 @@ #define VIDOSD_BASE (0x40) #define VIDINTCON0 (0x130) +#define VIDINTCON1 (0x134) /* WINCONx */ +#define WINCONx_CSC_CON_EQ709 (1 28) +#define WINCONx_CSC_CON_EQ601 (0 28) #define WINCONx_CSCWIDTH_MASK(0x3 26) #define WINCONx_CSCWIDTH_SHIFT (26) #define WINCONx_CSCWIDTH_WIDE(0x0 26) diff --git a/arch/arm/plat-samsung/include/plat/regs-fb.h b/arch/arm/plat-samsung/include/plat/regs-fb.h index 9a78012..6d2ee16 100644 --- a/arch/arm/plat-samsung/include/plat/regs-fb.h +++ b/arch/arm/plat-samsung/include/plat/regs-fb.h @@ -32,12 +32,28 @@ #define VIDCON0 (0x00) #define VIDCON0_INTERLACE(1 29) + +#ifdef CONFIG_FB_EXYNOS_FIMD_V8 +#define VIDOUT_CON (0x2) +#define VIDOUT_CON_VIDOUT_UP_MASK(0x1 16) +#define VIDOUT_CON_VIDOUT_UP_SHIFT (16) +#define VIDOUT_CON_VIDOUT_UP_ALWAYS (0x0 16) +#define VIDOUT_CON_VIDOUT_UP_START_FRAME (0x1 16) +#define VIDOUT_CON_VIDOUT_F_MASK (0x7 8) +#define VIDOUT_CON_VIDOUT_F_SHIFT(8) +#define VIDOUT_CON_VIDOUT_F_RGB (0x0 8) +#define VIDOUT_CON_VIDOUT_F_I80_LDI0 (0x2 8) +#define VIDOUT_CON_VIDOUT_F_I80_LDI1 (0x3 8) +#define VIDOUT_CON_VIDOUT_F_WB (0x4 8) +#endif + #define VIDCON0_VIDOUT_MASK (0x3 26) #define VIDCON0_VIDOUT_SHIFT (26) #define VIDCON0_VIDOUT_RGB (0x0 26) #define VIDCON0_VIDOUT_TV(0x1 26) #define VIDCON0_VIDOUT_I80_LDI0 (0x2 26) #define VIDCON0_VIDOUT_I80_LDI1 (0x3 26) +#define VIDCON0_VIDOUT_WB (0x4 26) #define VIDCON0_L1_DATA_MASK (0x7 23) #define VIDCON0_L1_DATA_SHIFT(23) @@ -81,7 +97,13 @@ #define VIDCON0_ENVID(1 1) #define VIDCON0_ENVID_F (1 0) +#ifdef
RE: [PATCH V2 1/7] ARM: SAMSUNG: add additional registers and SFR definitions for writeback
Hello, On Wednesday, July 18, 2012 7:57 AM Leela Krishna Amudala wrote: This patch updates the register address offsets and adds SFR definitions for writeback for Samsung's V8 display controller. Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com --- arch/arm/plat-samsung/include/plat/regs-fb-v4.h | 10 arch/arm/plat-samsung/include/plat/regs-fb.h| 51 +++ drivers/video/Kconfig |6 +++ 3 files changed, 67 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h b/arch/arm/plat- samsung/include/plat/regs-fb-v4.h index 4c3647f..1639c17 100644 --- a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h +++ b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h @@ -30,9 +30,16 @@ #define VIDCON1_FSTATUS_EVEN (1 15) /* Video timing controls */ +#ifdef CONFIG_FB_EXYNOS_FIMD_V8 +#define VIDTCON0(0x20010) +#define VIDTCON1(0x20014) +#define VIDTCON3(0x2001C) +#else #define VIDTCON0 (0x10) #define VIDTCON1 (0x14) #define VIDTCON2 (0x18) +#define VIDTCON3 (0x1C) +#endif /* Window position controls */ @@ -43,9 +50,12 @@ #define VIDOSD_BASE (0x40) #define VIDINTCON0 (0x130) +#define VIDINTCON1 (0x134) /* WINCONx */ +#define WINCONx_CSC_CON_EQ709 (1 28) +#define WINCONx_CSC_CON_EQ601 (0 28) #define WINCONx_CSCWIDTH_MASK(0x3 26) #define WINCONx_CSCWIDTH_SHIFT (26) #define WINCONx_CSCWIDTH_WIDE(0x0 26) diff --git a/arch/arm/plat-samsung/include/plat/regs-fb.h b/arch/arm/plat- samsung/include/plat/regs-fb.h index 9a78012..6d2ee16 100644 --- a/arch/arm/plat-samsung/include/plat/regs-fb.h +++ b/arch/arm/plat-samsung/include/plat/regs-fb.h @@ -32,12 +32,28 @@ #define VIDCON0 (0x00) #define VIDCON0_INTERLACE(1 29) + +#ifdef CONFIG_FB_EXYNOS_FIMD_V8 +#define VIDOUT_CON (0x2) +#define VIDOUT_CON_VIDOUT_UP_MASK(0x1 16) +#define VIDOUT_CON_VIDOUT_UP_SHIFT (16) +#define VIDOUT_CON_VIDOUT_UP_ALWAYS (0x0 16) +#define VIDOUT_CON_VIDOUT_UP_START_FRAME (0x1 16) +#define VIDOUT_CON_VIDOUT_F_MASK (0x7 8) +#define VIDOUT_CON_VIDOUT_F_SHIFT(8) +#define VIDOUT_CON_VIDOUT_F_RGB (0x0 8) +#define VIDOUT_CON_VIDOUT_F_I80_LDI0 (0x2 8) +#define VIDOUT_CON_VIDOUT_F_I80_LDI1 (0x3 8) +#define VIDOUT_CON_VIDOUT_F_WB (0x4 8) +#endif + #define VIDCON0_VIDOUT_MASK (0x3 26) #define VIDCON0_VIDOUT_SHIFT (26) #define VIDCON0_VIDOUT_RGB (0x0 26) #define VIDCON0_VIDOUT_TV(0x1 26) #define VIDCON0_VIDOUT_I80_LDI0 (0x2 26) #define VIDCON0_VIDOUT_I80_LDI1 (0x3 26) +#define VIDCON0_VIDOUT_WB (0x4 26) #define VIDCON0_L1_DATA_MASK (0x7 23) #define VIDCON0_L1_DATA_SHIFT(23) @@ -81,7 +97,13 @@ #define VIDCON0_ENVID(1 1) #define VIDCON0_ENVID_F (1 0) +#ifdef CONFIG_FB_EXYNOS_FIMD_V8 +#define VIDOUT_CON (0x2) +#define VIDCON1 (0x20004) +#else #define VIDCON1 (0x04) +#endif + #define VIDCON1_LINECNT_MASK (0x7ff 16) #define VIDCON1_LINECNT_SHIFT(16) #define VIDCON1_LINECNT_GET(_v) (((_v) 16) 0x7ff) @@ -111,6 +133,14 @@ #define VIDCON2_TVFMTSEL1_RGB(0x0 12) #define VIDCON2_TVFMTSEL1_YUV422 (0x1 12) #define VIDCON2_TVFMTSEL1_YUV444 (0x2 12) +#define VIDCON2_TVFMTSEL1_SHIFT (12) +#define VIDCON2_TVFMTSEL_SW (1 14) +#define VIDCON2_TVFORMATSEL_YUV444 (0x2 12) + +#define VIDCON2_TVFMTSEL1_MASK (0x3 12) +#define VIDCON2_TVFMTSEL1_RGB(0x0 12) +#define VIDCON2_TVFMTSEL1_YUV422 (0x1 12) +#define VIDCON2_TVFMTSEL1_YUV444 (0x2 12) #define VIDCON2_ORGYCbCr (1 8) #define VIDCON2_YUVORDCrCb (1 7) @@ -165,8 +195,15 @@ #define VIDTCON1_HSPW_SHIFT (0) #define VIDTCON1_HSPW_LIMIT (0xff) #define VIDTCON1_HSPW(_x)((_x) 0) +#define VIDCON1_VCLK_MASK
Re: [PATCH V2 1/7] ARM: SAMSUNG: add additional registers and SFR definitions for writeback
Hello Marek, On Wed, Jul 18, 2012 at 12:21 PM, Marek Szyprowski m.szyprow...@samsung.com wrote: Hello, On Wednesday, July 18, 2012 7:57 AM Leela Krishna Amudala wrote: This patch updates the register address offsets and adds SFR definitions for writeback for Samsung's V8 display controller. Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com --- arch/arm/plat-samsung/include/plat/regs-fb-v4.h | 10 arch/arm/plat-samsung/include/plat/regs-fb.h| 51 +++ drivers/video/Kconfig |6 +++ 3 files changed, 67 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h b/arch/arm/plat- samsung/include/plat/regs-fb-v4.h index 4c3647f..1639c17 100644 --- a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h +++ b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h @@ -30,9 +30,16 @@ #define VIDCON1_FSTATUS_EVEN (1 15) /* Video timing controls */ +#ifdef CONFIG_FB_EXYNOS_FIMD_V8 +#define VIDTCON0(0x20010) +#define VIDTCON1(0x20014) +#define VIDTCON3(0x2001C) +#else #define VIDTCON0 (0x10) #define VIDTCON1 (0x14) #define VIDTCON2 (0x18) +#define VIDTCON3 (0x1C) +#endif /* Window position controls */ @@ -43,9 +50,12 @@ #define VIDOSD_BASE (0x40) #define VIDINTCON0 (0x130) +#define VIDINTCON1 (0x134) /* WINCONx */ +#define WINCONx_CSC_CON_EQ709 (1 28) +#define WINCONx_CSC_CON_EQ601 (0 28) #define WINCONx_CSCWIDTH_MASK(0x3 26) #define WINCONx_CSCWIDTH_SHIFT (26) #define WINCONx_CSCWIDTH_WIDE(0x0 26) diff --git a/arch/arm/plat-samsung/include/plat/regs-fb.h b/arch/arm/plat- samsung/include/plat/regs-fb.h index 9a78012..6d2ee16 100644 --- a/arch/arm/plat-samsung/include/plat/regs-fb.h +++ b/arch/arm/plat-samsung/include/plat/regs-fb.h @@ -32,12 +32,28 @@ #define VIDCON0 (0x00) #define VIDCON0_INTERLACE(1 29) + +#ifdef CONFIG_FB_EXYNOS_FIMD_V8 +#define VIDOUT_CON (0x2) +#define VIDOUT_CON_VIDOUT_UP_MASK(0x1 16) +#define VIDOUT_CON_VIDOUT_UP_SHIFT (16) +#define VIDOUT_CON_VIDOUT_UP_ALWAYS (0x0 16) +#define VIDOUT_CON_VIDOUT_UP_START_FRAME (0x1 16) +#define VIDOUT_CON_VIDOUT_F_MASK (0x7 8) +#define VIDOUT_CON_VIDOUT_F_SHIFT(8) +#define VIDOUT_CON_VIDOUT_F_RGB (0x0 8) +#define VIDOUT_CON_VIDOUT_F_I80_LDI0 (0x2 8) +#define VIDOUT_CON_VIDOUT_F_I80_LDI1 (0x3 8) +#define VIDOUT_CON_VIDOUT_F_WB (0x4 8) +#endif + #define VIDCON0_VIDOUT_MASK (0x3 26) #define VIDCON0_VIDOUT_SHIFT (26) #define VIDCON0_VIDOUT_RGB (0x0 26) #define VIDCON0_VIDOUT_TV(0x1 26) #define VIDCON0_VIDOUT_I80_LDI0 (0x2 26) #define VIDCON0_VIDOUT_I80_LDI1 (0x3 26) +#define VIDCON0_VIDOUT_WB (0x4 26) #define VIDCON0_L1_DATA_MASK (0x7 23) #define VIDCON0_L1_DATA_SHIFT(23) @@ -81,7 +97,13 @@ #define VIDCON0_ENVID(1 1) #define VIDCON0_ENVID_F (1 0) +#ifdef CONFIG_FB_EXYNOS_FIMD_V8 +#define VIDOUT_CON (0x2) +#define VIDCON1 (0x20004) +#else #define VIDCON1 (0x04) +#endif + #define VIDCON1_LINECNT_MASK (0x7ff 16) #define VIDCON1_LINECNT_SHIFT(16) #define VIDCON1_LINECNT_GET(_v) (((_v) 16) 0x7ff) @@ -111,6 +133,14 @@ #define VIDCON2_TVFMTSEL1_RGB(0x0 12) #define VIDCON2_TVFMTSEL1_YUV422 (0x1 12) #define VIDCON2_TVFMTSEL1_YUV444 (0x2 12) +#define VIDCON2_TVFMTSEL1_SHIFT (12) +#define VIDCON2_TVFMTSEL_SW (1 14) +#define VIDCON2_TVFORMATSEL_YUV444 (0x2 12) + +#define VIDCON2_TVFMTSEL1_MASK (0x3 12) +#define VIDCON2_TVFMTSEL1_RGB(0x0 12) +#define VIDCON2_TVFMTSEL1_YUV422 (0x1 12) +#define VIDCON2_TVFMTSEL1_YUV444 (0x2 12) #define VIDCON2_ORGYCbCr (1 8) #define VIDCON2_YUVORDCrCb (1 7) @@ -165,8 +195,15 @@ #define VIDTCON1_HSPW_SHIFT (0) #define VIDTCON1_HSPW_LIMIT (0xff) #define
