tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
pending-fixes
head: 0b86d65557b6f9fb73ce357f14e0f22e9f47a072
commit: fad84e39f116035ae8d550c6020107b8ac113b45 [34/128] ARC: boot log:
eliminate struct cpuinfo_arc #4: boot log per ISA
config: arc-randconfig-001-20230822
(https://download.01.org/0day-ci/archive/20230822/202308221549.xkufwewp-...@intel.com/config)
compiler: arceb-elf-gcc (GCC) 13.2.0
reproduce:
(https://download.01.org/0day-ci/archive/20230822/202308221549.xkufwewp-...@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot
| Closes:
https://lore.kernel.org/oe-kbuild-all/202308221549.xkufwewp-...@intel.com/
All warnings (new ones prefixed by >>):
arch/arc/kernel/setup.c: In function 'arcompact_mumbojumbo':
>> arch/arc/kernel/setup.c:82:13: warning: variable 'atomic' set but not used
>> [-Wunused-but-set-variable]
82 | int atomic = 0, be, present;
| ^~
vim +/atomic +82 arch/arc/kernel/setup.c
74
75 static int
76 arcompact_mumbojumbo(int c, struct cpuinfo_arc *info, char *buf, int
len)
77 {
78 int n = 0;
79 #ifdef CONFIG_ISA_ARCOMPACT
80 char *cpu_nm, *isa_nm = "ARCompact";
81 struct bcr_fp_arcompact fpu_sp, fpu_dp;
> 82 int atomic = 0, be, present;
83 int bpu_full, bpu_cache, bpu_pred;
84 struct bcr_bpu_arcompact bpu;
85 struct bcr_iccm_arcompact iccm;
86 struct bcr_dccm_arcompact dccm;
87 struct bcr_generic isa;
88
89 READ_BCR(ARC_REG_ISA_CFG_BCR, isa);
90
91 if (!isa.ver) /* ISA BCR absent, use Kconfig info */
92 atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
93 else {
94 /* ARC700_BUILD only has 2 bits of isa info */
95 atomic = isa.info & 1;
96 }
97
98 be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
99
100 if (info->arcver < 0x34)
101 cpu_nm = "ARC750";
102 else
103 cpu_nm = "ARC770";
104
105 n += scnprintf(buf + n, len - n, "processor [%d]\t: %s (%s ISA)
%s\n",
106 c, cpu_nm, isa_nm, IS_AVAIL1(be,
"[Big-Endian]"));
107
108 READ_BCR(ARC_REG_FP_BCR, fpu_sp);
109 READ_BCR(ARC_REG_DPFP_BCR, fpu_dp);
110
111 if (fpu_sp.ver | fpu_dp.ver)
112 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
113 IS_AVAIL1(fpu_sp.ver, "SP "),
114 IS_AVAIL1(fpu_dp.ver, "DP "));
115
116 READ_BCR(ARC_REG_BPU_BCR, bpu);
117 bpu_full = bpu.fam ? 1 : 0;
118 bpu_cache = 256 << (bpu.ent - 1);
119 bpu_pred = 256 << (bpu.ent - 1);
120
121 n += scnprintf(buf + n, len - n,
122 "BPU\t\t: %s%s match, cache:%d, Predict
Table:%d\n",
123 IS_AVAIL1(bpu_full, "full"),
124 IS_AVAIL1(!bpu_full, "partial"),
125 bpu_cache, bpu_pred);
126
127 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
128 if (iccm.ver) {
129 info->iccm.sz = 4096 << iccm.sz;/* 8K to 512K */
130 info->iccm.base = iccm.base << 16;
131 }
132
133 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
134 if (dccm.ver) {
135 unsigned long base;
136 info->dccm.sz = 2048 << dccm.sz;/* 2K to 256K */
137
138 base = read_aux_reg(ARC_REG_DCCM_BASE_BUILD);
139 info->dccm.base = base & ~0xF;
140 }
141
142 /* ARCompact ISA specific sanity checks */
143 present = fpu_dp.ver; /* SP has no arch visible regs */
144 CHK_OPT_STRICT(CONFIG_ARC_FPU_SAVE_RESTORE, present);
145 #endif
146 return n;
147
--
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https://github.com/intel/lkp-tests/wiki
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