Re: [linux-sunxi] [PATCH v2] sun8i: h3: Add support for the Beelink-x2 STB

2018-11-21 Thread Jagan Teki
On Thu, Nov 15, 2018 at 2:19 PM  wrote:
>
> From: Marcus Cooper 
>
> The Beelink X2 is an STB based on the Allwinner H3 SoC with a uSD slot,
> 2 USB ports( 1 * USB-2 Host, 1 USB OTG), a 10/100M ethernet port using the
> SoC's integrated PHY, Wifi via an sdio wifi chip, HDMI, an IR receiver, a
> dual colour LED and an optical S/PDIF connector.
>
> Signed-off-by: Marcus Cooper 
> ---
>  arch/arm/dts/Makefile|   1 +
>  arch/arm/dts/sun8i-h3-beelink-x2.dts | 179 +++
>  board/sunxi/MAINTAINERS  |   5 +
>  configs/beelink_x2_defconfig |  19 +++
>  4 files changed, 204 insertions(+)
>  create mode 100644 arch/arm/dts/sun8i-h3-beelink-x2.dts
>  create mode 100644 configs/beelink_x2_defconfig
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 1cbb45d679..cc217d4f98 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -370,6 +370,7 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
> sun8i-h2-plus-orangepi-r1.dtb \
> sun8i-h2-plus-orangepi-zero.dtb \
> sun8i-h3-bananapi-m2-plus.dtb \
> +   sun8i-h3-beelink-x2.dtb \
> sun8i-h3-libretech-all-h3-cc.dtb \
> sun8i-h3-nanopi-m1.dtb \
> sun8i-h3-nanopi-m1-plus.dtb \
> diff --git a/arch/arm/dts/sun8i-h3-beelink-x2.dts 
> b/arch/arm/dts/sun8i-h3-beelink-x2.dts
> new file mode 100644
> index 00..683c5c31a9
> --- /dev/null
> +++ b/arch/arm/dts/sun8i-h3-beelink-x2.dts
> @@ -0,0 +1,179 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +//
> +// Device Tree Source for Beelink X2
> +//
> +// Copyright (C) 2018 Marcus Cooper 

need space, but this doesn't look like Linux sync. better sync it
directly w/o any changes, if you need updated license do first in
Linux.

otherwise,

Reviewed-by: Jagan Teki 

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[linux-sunxi] [PATCH v2] sun8i: h3: Add support for the Beelink-x2 STB

2018-11-15 Thread codekipper
From: Marcus Cooper 

The Beelink X2 is an STB based on the Allwinner H3 SoC with a uSD slot,
2 USB ports( 1 * USB-2 Host, 1 USB OTG), a 10/100M ethernet port using the
SoC's integrated PHY, Wifi via an sdio wifi chip, HDMI, an IR receiver, a
dual colour LED and an optical S/PDIF connector.

Signed-off-by: Marcus Cooper 
---
 arch/arm/dts/Makefile|   1 +
 arch/arm/dts/sun8i-h3-beelink-x2.dts | 179 +++
 board/sunxi/MAINTAINERS  |   5 +
 configs/beelink_x2_defconfig |  19 +++
 4 files changed, 204 insertions(+)
 create mode 100644 arch/arm/dts/sun8i-h3-beelink-x2.dts
 create mode 100644 configs/beelink_x2_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 1cbb45d679..cc217d4f98 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -370,6 +370,7 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
sun8i-h2-plus-orangepi-r1.dtb \
sun8i-h2-plus-orangepi-zero.dtb \
sun8i-h3-bananapi-m2-plus.dtb \
+   sun8i-h3-beelink-x2.dtb \
sun8i-h3-libretech-all-h3-cc.dtb \
sun8i-h3-nanopi-m1.dtb \
sun8i-h3-nanopi-m1-plus.dtb \
diff --git a/arch/arm/dts/sun8i-h3-beelink-x2.dts 
b/arch/arm/dts/sun8i-h3-beelink-x2.dts
new file mode 100644
index 00..683c5c31a9
--- /dev/null
+++ b/arch/arm/dts/sun8i-h3-beelink-x2.dts
@@ -0,0 +1,179 @@
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Device Tree Source for Beelink X2
+//
+// Copyright (C) 2018 Marcus Cooper 
+/dts-v1/;
+#include "sun8i-h3.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include 
+#include 
+
+/ {
+   model = "Beelink X2";
+   compatible = "roofull,beelink-x2", "allwinner,sun8i-h3";
+
+   aliases {
+   serial0 = &uart0;
+   /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+   ethernet1 = &sdiowifi;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   connector {
+   compatible = "hdmi-connector";
+   type = "a";
+
+   port {
+   hdmi_con_in: endpoint {
+   remote-endpoint = <&hdmi_out_con>;
+   };
+   };
+   };
+
+   leds {
+   compatible = "gpio-leds";
+
+   blue {
+   label = "beelink-x2:blue:pwr";
+   gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+   default-state = "on";
+   };
+
+   red {
+   label = "beelink-x2:red:standby";
+   gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>; /* PA15 */
+   };
+   };
+
+   wifi_pwrseq: wifi_pwrseq {
+   compatible = "mmc-pwrseq-simple";
+   reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+   };
+
+   sound_spdif {
+   compatible = "simple-audio-card";
+   simple-audio-card,name = "On-board SPDIF";
+
+   simple-audio-card,cpu {
+   sound-dai = <&spdif>;
+   };
+
+   simple-audio-card,codec {
+   sound-dai = <&spdif_out>;
+   };
+   };
+
+   spdif_out: spdif-out {
+   #sound-dai-cells = <0>;
+   compatible = "linux,spdif-dit";
+   };
+};
+
+&de {
+   status = "okay";
+};
+
+&ehci0 {
+   status = "okay";
+};
+
+&ehci1 {
+   status = "okay";
+};
+
+&emac {
+   phy-handle = <&int_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   status = "okay";
+};
+
+&hdmi {
+   status = "okay";
+};
+
+&hdmi_out {
+   hdmi_out_con: endpoint {
+   remote-endpoint = <&hdmi_con_in>;
+   };
+};
+
+&ir {
+   pinctrl-names = "default";
+   pinctrl-0 = <&ir_pins_a>;
+   status = "okay";
+};
+
+&mmc0 {
+   vmmc-supply = <®_vcc3v3>;
+   bus-width = <4>;
+   cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+   status = "okay";
+};
+
+&mmc1 {
+   vmmc-supply = <®_vcc3v3>;
+   bus-width = <4>;
+   non-removable;
+   status = "okay";
+
+   /*
+* Explicitly define the sdio device, so that we can add an ethernet
+* alias for it (which e.g. makes u-boot set a mac-address).
+*/
+   sdiowifi: sdio_wifi@1 {
+   reg = <1>;
+   };
+};
+
+&mmc2 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&mmc2_8bit_pins>;
+   vmmc-supply = <®_vcc3v3>;
+   bus-width = <8>;
+   non-removable;
+   cap-mmc-hw-reset;
+   status = "okay";
+};
+
+&ohci0 {
+   status = "okay";
+};
+
+&ohci1 {
+   status = "okay";
+};
+
+®_usb0_vbus {
+   gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
+   status = "okay";
+};
+
+&spdif {
+   pinctrl-names = "default";
+   pinctrl-0 = <&spdif_tx_pins_a>;
+   status = "okay";
+};
+
+&uart0 {
+   pinctrl-names = "default";
+   pinct