On Sat, Oct 29, 2016 at 6:39 PM, Hans de Goede wrote:
> Hi,
>
> On 28-10-16 20:54, Jagan Teki wrote:
>>
>> On Fri, Oct 28, 2016 at 3:51 PM, Chen-Yu Tsai wrote:
>>>
>>> From: Philipp Tomsich
>>>
>>> This adds DRAM initialisation code for sun9i, which calculates the
>>> appropriate timings based on timing information for the supplied
>>> DDR3 bin and the clock speeds used.
>>>
>>> With this DRAM setup, we have verified DDR3 clocks of up to 792MHz
>>> (i.e. DDR3-1600) on the A80-Q7 using a dual-channel configuration.
>>>
>>> [w...@csie.org: Moved dram_sun9i.c to arch/arm/mach-sunxi/; style
>>> cleanup]
>>> Signed-off-by: Chen-Yu Tsai
>>> ---
>>> arch/arm/include/asm/arch-sunxi/clock_sun9i.h | 34 +-
>>> arch/arm/include/asm/arch-sunxi/cpu_sun9i.h |6 +
>>> arch/arm/include/asm/arch-sunxi/dram.h|2 +
>>> arch/arm/include/asm/arch-sunxi/dram_sun9i.h | 275 +++
>>> arch/arm/mach-sunxi/Makefile |1 +
>>> arch/arm/mach-sunxi/dram_sun9i.c | 1059
>>> +
>>> board/sunxi/Kconfig |6 +-
>>> 7 files changed, 1368 insertions(+), 15 deletions(-)
>>> create mode 100644 arch/arm/include/asm/arch-sunxi/dram_sun9i.h
>>> create mode 100644 arch/arm/mach-sunxi/dram_sun9i.c
>>
>>
>> Checkpatch:
>> total: 45 errors, 77 warnings, 42 checks, 1464 lines checked
>
>
> Ugh, ok I've fixed this up locally in my tree, Chen-Yu next time
> please remember to run your patches through check-patch.
Sorry about that. Checkpatch considers #if 0 dead code, but the
reality is that a lot of the marked code may or may not be used
later. We just don't know. A lot of it was marked with C99 style
( // ) comments. Using #if 0 is easier to retain trailing comments
within the currently unused sections. Switching to traditional
C style comments means we might be editing those same lines again.
Otherwise I think I cleaned up most of the 'used' code.
Regards
ChenYu
> Jagan, thanks for the review I've addressed all your comments
> in my tree.
>
> Regards,
>
> Hans
>
>
>
>>
>>>
>>> diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
>>> b/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
>>> index a61934fb3661..82881ff8bdaf 100644
>>> --- a/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
>>> +++ b/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
>>> @@ -37,57 +37,61 @@ struct sunxi_ccm_reg {
>>> u8 reserved3[0x04]; /* 0x7c */
>>> u32 ats_cfg;/* 0x80 ats clock configuration */
>>> u32 trace_cfg; /* 0x84 trace clock configuration */
>>> - u8 reserved4[0xf8]; /* 0x88 */
>>> + u8 reserved4[0x14]; /* 0x88 */
>>> + u32 pll_stable_status; /* 0x9c */
>>> + u8 reserved5[0xe0]; /* 0xa0 */
>>> u32 clk_output_a; /* 0x180 clk_output_a */
>>> u32 clk_output_b; /* 0x184 clk_output_a */
>>> - u8 reserved5[0x278];/* 0x188 */
>>> + u8 reserved6[0x278];/* 0x188 */
>>>
>>> u32 nand0_clk_cfg; /* 0x400 nand0 clock configuration0 */
>>> u32 nand0_clk_cfg1; /* 0x404 nand1 clock configuration */
>>> - u8 reserved6[0x08]; /* 0x408 */
>>> + u8 reserved7[0x08]; /* 0x408 */
>>> u32 sd0_clk_cfg;/* 0x410 sd0 clock configuration */
>>> u32 sd1_clk_cfg;/* 0x414 sd1 clock configuration */
>>> u32 sd2_clk_cfg;/* 0x418 sd2 clock configuration */
>>> u32 sd3_clk_cfg;/* 0x41c sd3 clock configuration */
>>> - u8 reserved7[0x08]; /* 0x420 */
>>> + u8 reserved8[0x08]; /* 0x420 */
>>> u32 ts_clk_cfg; /* 0x428 transport stream clock cfg */
>>> u32 ss_clk_cfg; /* 0x42c security system clock cfg */
>>> u32 spi0_clk_cfg; /* 0x430 spi0 clock configuration */
>>> u32 spi1_clk_cfg; /* 0x434 spi1 clock configuration */
>>> u32 spi2_clk_cfg; /* 0x438 spi2 clock configuration */
>>> u32 spi3_clk_cfg; /* 0x43c spi3 clock configuration */
>>> - u8 reserved8[0x50]; /* 0x440 */
>>> + u8 reserved9[0x44]; /* 0x440 */
>>> + u32 dram_clk_cfg; /* 0x484 DRAM (controller) clock
>>> configuration */
>>> + u8 reserved10[0x8]; /* 0x488 */
>>> u32 de_clk_cfg; /* 0x490 display engine clock
>>> configuration */
>>> - u8 reserved9[0x04]; /* 0x494 */
>>> + u8 reserved11[0x04];/* 0x494 */
>>> u32 mp_clk_cfg; /* 0x498 mp clock configuration */
>>> u32 lcd0_clk_cfg; /* 0x49c LCD0 module clock */
>>> u32 lcd1_clk_cfg; /* 0x4a0 LCD1 module clock */
>>> - u8 reserved10[0x1c];/* 0x4a4 */
>>> + u8 reserved12[0x1c];/* 0x4a4 */
>>> u32 csi_isp_clk_cfg;/* 0x4c0 CSI ISP module clock */
>>> u32 csi0_clk_cfg; /* 0x4c4 CSI0