[PATCH 05/11] uwb: convert bus code to use dev_groups

2013-10-07 Thread Greg Kroah-Hartman
The dev_attrs field of struct bus_type is going away soon, dev_groups
should be used instead.  This converts the uwb bus code to use the
correct field.

Cc: Bruno Morelli br...@evidence.eu.com
Cc: linux-usb@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman gre...@linuxfoundation.org
---
 drivers/uwb/umc-bus.c | 13 -
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/uwb/umc-bus.c b/drivers/uwb/umc-bus.c
index 5c5b3fc..e3ed6ff 100644
--- a/drivers/uwb/umc-bus.c
+++ b/drivers/uwb/umc-bus.c
@@ -201,6 +201,7 @@ static ssize_t capability_id_show(struct device *dev, 
struct device_attribute *a
 
return sprintf(buf, 0x%02x\n, umc-cap_id);
 }
+static DEVICE_ATTR_RO(capability_id);
 
 static ssize_t version_show(struct device *dev, struct device_attribute *attr, 
char *buf)
 {
@@ -208,12 +209,14 @@ static ssize_t version_show(struct device *dev, struct 
device_attribute *attr, c
 
return sprintf(buf, 0x%04x\n, umc-version);
 }
+static DEVICE_ATTR_RO(version);
 
-static struct device_attribute umc_dev_attrs[] = {
-   __ATTR_RO(capability_id),
-   __ATTR_RO(version),
-   __ATTR_NULL,
+static struct attribute *umc_dev_attrs[] = {
+   dev_attr_capability_id.attr,
+   dev_attr_version.attr,
+   NULL,
 };
+ATTRIBUTE_GROUPS(umc_dev);
 
 struct bus_type umc_bus_type = {
.name   = umc,
@@ -222,7 +225,7 @@ struct bus_type umc_bus_type = {
.remove = umc_device_remove,
.suspend= umc_device_suspend,
.resume = umc_device_resume,
-   .dev_attrs  = umc_dev_attrs,
+   .dev_groups = umc_dev_groups,
 };
 EXPORT_SYMBOL_GPL(umc_bus_type);
 
-- 
1.8.4.6.g82e253f.dirty

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[PATCH v6 1/3] usb: dwc3: msm: Add device tree binding information

2013-10-07 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

MSM USB3.0 core wrapper consist of USB3.0 IP from Synopsys
(SNPS) and HS, SS PHY's control and configuration registers.

It could operate in device mode (SS, HS, FS) and host
mode (SS, HS, FS, LS).

Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
Acked-by: Stephen Warren swar...@nvidia.com
---
 .../devicetree/bindings/usb/msm-ssusb.txt  |  105 
 1 file changed, 105 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/msm-ssusb.txt

diff --git a/Documentation/devicetree/bindings/usb/msm-ssusb.txt 
b/Documentation/devicetree/bindings/usb/msm-ssusb.txt
new file mode 100644
index 000..a71bf00
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/msm-ssusb.txt
@@ -0,0 +1,105 @@
+MSM SuperSpeed DWC3 USB SoC controller
+
+
+MSM DW Highspeed USB PHY
+
+Required properities:
+- compatible:  should contain qcom,dw-hsphy;
+- reg: offset and length of the register set in the memory map
+- clocks:  A list of phandle + clock-specifier pairs for the
+   clocks listed in clock-names
+- clock-names: Should contain the following:
+  xo External reference clock
+  sleep_aSleep clock, used when USB3 core goes into low
+   power mode (U3).
+- v1p8-supply: phandle to the regulator for the 1.8v supply to HSPHY.
+- v3p3-supply: phandle to the regulator for the 3.3v supply to HSPHY.
+- vbus-supply: phandle to the regulator for the vbus supply for host
+   mode.
+- vddcx-supply: phandle to the regulator for the vdd supply for HSPHY
+digital circuit operation.
+
+MSM DW Superspeed USB PHY
+=
+Required properities:
+- compatible:  should contain qcom,dw-ssphy;
+- reg: offset and length of the register set in the memory map
+- clocks:  A list of phandle + clock-specifier pairs for the
+   clocks listed in clock-names
+- clock-names: Should contain the following:
+  xo External reference clock
+  refReference clock - used in host mode.
+- v1p8-supply: phandle to the regulator for the 1.8v supply to HSPHY.
+- vddcx-supply: phandle to the regulator for the vdd supply for HSPHY
+digital circuit operation.
+
+MSM DWC3 controller wrapper
+===
+Required properties:
+- compatible:  should contain qcom,dwc3
+- reg: offset and length of the TCSR register for routing USB
+   signals to either picoPHY0 or picoPHY1.
+- clocks:  A list of phandle + clock-specifier pairs for the
+   clocks listed in clock-names
+- clock-names: Should contain the following:
+  core   Master/Core clock, have to be = 125 MHz for SS
+   operation and = 60MHz for HS operation
+  iface  System bus AXI clock
+  sleep  Sleep clock, used when USB3 core goes into low
+   power mode (U3).
+  utmi   Generated by HSPHY. Used to clock the low power
+   parts of thr HS Link layer.
+Optional regulator:
+- gdsc-supply: phandle to the regulator from globally distributed
+   switch controller
+Required child node:
+A child node must exist to represent the core DWC3 IP block. The name of
+the node is not important. The content of the node is defined in dwc3.txt.
+
+Example device nodes:
+
+   dw_hsphy: phy@f92f8800 {
+   compatible = qcom,dw-hsphy;
+   reg = 0xf92f8800 0x30;
+
+   clocks = cxo, usb2a_phy_sleep_cxc;
+   clock-names = xo, sleep_a;
+
+   vbus-supply = supply;
+   vddcx-supply = supply;
+   v1p8-supply = supply;
+   v3p3-supply = supply;
+   };
+
+   dw_ssphy: phy@f92f8830 {
+   compatible = qcom,dw-ssphy;
+   reg = 0xf92f8830 0x30;
+
+   clocks = cxo, usb30_mock_utmi_cxc;
+   clock-names = xo, ref;
+
+   vddcx-supply = supply;
+   v1p8-supply = supply;
+   };
+
+   usb@fd4ab000 {
+   compatible = qcom,dwc3;
+   #address-cells = 1;
+   #size-cells = 1;
+   reg = 0xfd4ab000 0x4;
+
+   clocks = usb30_master_cxc, sys_noc_usb3_axi_cxc,
+   usb30_sleep_cxc, usb30_mock_utmi_cxc;
+   clock-names = core, iface, sleep, utmi;
+
+   gdsc-supply = supply;
+
+   ranges;
+   dwc3@f920 {
+   compatible = snps,dwc3;
+   reg = 0xf920 0xcd00;
+   interrupts = 0 131;
+   usb-phy = dw_hsphy, dw_ssphy;
+   

[PATCH v6 2/3] usb: phy: Add Qualcomm SS-USB and HS-USB drivers for DW PHY's

2013-10-07 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

These drivers handles control and configuration of the HS
and SS USB PHY transceivers. They are part of the driver
which manage Synopsys DesignWare USB3 controller stack
inside Qualcomm SoC's.

Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
 drivers/usb/phy/Kconfig |   11 ++
 drivers/usb/phy/Makefile|2 +
 drivers/usb/phy/phy-msm-dw-hs.c |  329 ++
 drivers/usb/phy/phy-msm-dw-ss.c |  375 +++
 4 files changed, 717 insertions(+)
 create mode 100644 drivers/usb/phy/phy-msm-dw-hs.c
 create mode 100644 drivers/usb/phy/phy-msm-dw-ss.c

diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index d5589f9..bbb2d0e 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -214,6 +214,17 @@ config USB_RCAR_PHY
  To compile this driver as a module, choose M here: the
  module will be called phy-rcar-usb.
 
+config USB_MSM_DW_PHYS
+   tristate Qualcomm USB controller DW PHY's wrappers support
+   depends on (USB || USB_GADGET)  ARCH_MSM
+   select USB_PHY
+   help
+ Enable this to support the DW USB PHY transceivers on MSM chips
+ with DWC3 USB core. It handles PHY initialization, clock
+ management required after resetting the hardware and power
+ management. This driver is required even for peripheral only or
+ host only mode configurations.
+
 config USB_ULPI
bool Generic ULPI Transceiver Driver
depends on ARM
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index 2135e85..4813eb5 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -26,6 +26,8 @@ obj-$(CONFIG_USB_EHCI_TEGRA)  += phy-tegra-usb.o
 obj-$(CONFIG_USB_GPIO_VBUS)+= phy-gpio-vbus-usb.o
 obj-$(CONFIG_USB_ISP1301)  += phy-isp1301.o
 obj-$(CONFIG_USB_MSM_OTG)  += phy-msm-usb.o
+obj-$(CONFIG_USB_MSM_DW_PHYS)  += phy-msm-dw-hs.o
+obj-$(CONFIG_USB_MSM_DW_PHYS)  += phy-msm-dw-ss.o
 obj-$(CONFIG_USB_MV_OTG)   += phy-mv-usb.o
 obj-$(CONFIG_USB_MXS_PHY)  += phy-mxs-usb.o
 obj-$(CONFIG_USB_RCAR_PHY) += phy-rcar-usb.o
diff --git a/drivers/usb/phy/phy-msm-dw-hs.c b/drivers/usb/phy/phy-msm-dw-hs.c
new file mode 100644
index 000..d29c1f1
--- /dev/null
+++ b/drivers/usb/phy/phy-msm-dw-hs.c
@@ -0,0 +1,329 @@
+/* Copyright (c) 2013, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/clk.h
+#include linux/err.h
+#include linux/io.h
+#include linux/module.h
+#include linux/of.h
+#include linux/platform_device.h
+#include linux/regulator/consumer.h
+#include linux/usb/phy.h
+
+/**
+ *  USB QSCRATCH Hardware registers
+ */
+#define QSCRATCH_CTRL_REG  (0x04)
+#define QSCRATCH_GENERAL_CFG   (0x08)
+#define PHY_CTRL_REG   (0x10)
+#define PARAMETER_OVERRIDE_X_REG   (0x14)
+#define CHARGING_DET_CTRL_REG  (0x18)
+#define CHARGING_DET_OUTPUT_REG(0x1c)
+#define ALT_INTERRUPT_EN_REG   (0x20)
+#define PHY_IRQ_STAT_REG   (0x24)
+#define CGCTL_REG  (0x28)
+
+#define PHY_3P3_VOL_MIN305 /* uV */
+#define PHY_3P3_VOL_MAX330 /* uV */
+#define PHY_3P3_HPM_LOAD   16000   /* uA */
+
+#define PHY_1P8_VOL_MIN180 /* uV */
+#define PHY_1P8_VOL_MAX180 /* uV */
+#define PHY_1P8_HPM_LOAD   19000   /* uA */
+
+/* TODO: these are suspicious */
+#define USB_VDDCX_NO   1   /* index */
+#define USB_VDDCX_MIN  5   /* index */
+#define USB_VDDCX_MAX  7   /* index */
+
+struct msm_dw_hs_phy {
+   struct usb_phy  phy;
+   void __iomem*base;
+   struct device   *dev;
+
+   struct clk  *xo_clk;
+   struct clk  *sleep_a_clk;
+
+   struct regulator*v3p3;
+   struct regulator*v1p8;
+   struct regulator*vddcx;
+   struct regulator*vbus;
+};
+
+#definephy_to_dw_phy(x)container_of((x), struct msm_dw_hs_phy, 
phy)
+
+
+/**
+ * Write register.
+ *
+ * @base - MSM DWC3 PHY base virtual address.
+ * @offset - register offset.
+ * @val - value to write.
+ */
+static inline void msm_dw_hs_write(void __iomem *base, u32 offset, u32 val)
+{
+   

[PATCH v6 0/3] DWC3 USB support for Qualcomm platform

2013-10-07 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

Hi,

This is sixth version of MSM USB3 drivers patches.

Changes since v5:
* devicetree bindings descriptions fixes 
* Fixed NULL pointer dereferences in dev_prink's
* Removed extra space in sleep  clock name

Changes since v4:
* Substitute references to wc3 with just dw in USB PHY drivers and
  file names. This is to indicate that the PHY's are DesignWare, but
  not necessarily related to DWC3 IP core. 

Changes since v3:
* Remove _clk suffix from clock names
* Clarify required child node for qcom,dwc3
* Fix comments in functions headers
* Use dbg instead err in drivers probe functions.

Changes since v2:
* Several improvements in devicetree bindings description
* Disable regulators in glue layer if there is error during 
  ioremap.

Changes since first version:
* Split devicetree bindings description file to separate patch
* Address comments for device bindings description
* Fix typo in 'gdsc' requlator name.

These patches add basic support for USB3.0 controllers found
on MSM platforms. USB3.0 core is based on Synopsys DesignWare 
SuperSpeed IP. 

Generated on top of Felipe 'testing' branch.

Ivan T. Ivanov (3):
  usb: dwc3: msm: Add device tree binding information
  usb: phy: Add Qualcomm SS-USB and HS-USB drivers for DW PHY's
  usb: dwc3: Add Qualcomm DWC3 glue layer driver

 .../devicetree/bindings/usb/msm-ssusb.txt  |  105 ++
 drivers/usb/dwc3/Kconfig   |8 +
 drivers/usb/dwc3/Makefile  |1 +
 drivers/usb/dwc3/dwc3-msm.c|  168 +
 drivers/usb/phy/Kconfig|   11 +
 drivers/usb/phy/Makefile   |2 +
 drivers/usb/phy/phy-msm-dw-hs.c|  329 +
 drivers/usb/phy/phy-msm-dw-ss.c|  375 
 8 files changed, 999 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/msm-ssusb.txt
 create mode 100644 drivers/usb/dwc3/dwc3-msm.c
 create mode 100644 drivers/usb/phy/phy-msm-dw-hs.c
 create mode 100644 drivers/usb/phy/phy-msm-dw-ss.c

-- 
1.7.9.5

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[PATCH v6 3/3] usb: dwc3: Add Qualcomm DWC3 glue layer driver

2013-10-07 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

DWC3 glue layer is hardware layer around Synopsys DesignWare
USB3 core. Its purpose is to supply Synopsys IP with required
clocks, voltages and interface it with the rest of the SoC.

Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
 drivers/usb/dwc3/Kconfig|8 +++
 drivers/usb/dwc3/Makefile   |1 +
 drivers/usb/dwc3/dwc3-msm.c |  168 +++
 3 files changed, 177 insertions(+)
 create mode 100644 drivers/usb/dwc3/dwc3-msm.c

diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index 70fc430..4c7b5a4 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -59,6 +59,14 @@ config USB_DWC3_EXYNOS
  Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
  say 'Y' or 'M' if you have one such device.
 
+config USB_DWC3_MSM
+   tristate Qualcomm MSM/APQ Platforms
+   default USB_DWC3
+   select USB_MSM_DWC3_PHYS
+   help
+ Recent Qualcomm SoCs ship with one DesignWare Core USB3 IP inside,
+ say 'Y' or 'M' if you have one such device.
+
 config USB_DWC3_PCI
tristate PCIe-based Platforms
depends on PCI
diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
index dd17601..a90de66 100644
--- a/drivers/usb/dwc3/Makefile
+++ b/drivers/usb/dwc3/Makefile
@@ -31,4 +31,5 @@ endif
 
 obj-$(CONFIG_USB_DWC3_OMAP)+= dwc3-omap.o
 obj-$(CONFIG_USB_DWC3_EXYNOS)  += dwc3-exynos.o
+obj-$(CONFIG_USB_DWC3_MSM) += dwc3-msm.o
 obj-$(CONFIG_USB_DWC3_PCI) += dwc3-pci.o
diff --git a/drivers/usb/dwc3/dwc3-msm.c b/drivers/usb/dwc3/dwc3-msm.c
new file mode 100644
index 000..1d73f92
--- /dev/null
+++ b/drivers/usb/dwc3/dwc3-msm.c
@@ -0,0 +1,168 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/clk.h
+#include linux/err.h
+#include linux/io.h
+#include linux/module.h
+#include linux/of.h
+#include linux/of_platform.h
+#include linux/platform_device.h
+#include linux/regulator/consumer.h
+#include linux/usb/phy.h
+
+struct dwc3_msm {
+   struct device   *dev;
+
+   struct clk  *core_clk;
+   struct clk  *iface_clk;
+   struct clk  *sleep_clk;
+   struct clk  *utmi_clk;
+
+   struct regulator*gdsc;
+};
+
+static int dwc3_msm_probe(struct platform_device *pdev)
+{
+   struct device_node *node = pdev-dev.of_node;
+   struct dwc3_msm *mdwc;
+   struct resource *res;
+   void __iomem *tcsr;
+   int ret = 0;
+
+   mdwc = devm_kzalloc(pdev-dev, sizeof(*mdwc), GFP_KERNEL);
+   if (!mdwc)
+   return -ENOMEM;
+
+   platform_set_drvdata(pdev, mdwc);
+
+   mdwc-dev = pdev-dev;
+
+   mdwc-gdsc = devm_regulator_get(mdwc-dev, gdsc);
+
+   mdwc-core_clk = devm_clk_get(mdwc-dev, core);
+   if (IS_ERR(mdwc-core_clk)) {
+   dev_dbg(mdwc-dev, failed to get core clock\n);
+   return PTR_ERR(mdwc-core_clk);
+   }
+
+   mdwc-iface_clk = devm_clk_get(mdwc-dev, iface);
+   if (IS_ERR(mdwc-iface_clk)) {
+   dev_dbg(mdwc-dev, failed to get iface clock\n);
+   return PTR_ERR(mdwc-iface_clk);
+   }
+
+   mdwc-sleep_clk = devm_clk_get(mdwc-dev, sleep);
+   if (IS_ERR(mdwc-sleep_clk)) {
+   dev_dbg(mdwc-dev, failed to get sleep clock\n);
+   return  PTR_ERR(mdwc-sleep_clk);
+   }
+
+   mdwc-utmi_clk = devm_clk_get(mdwc-dev, utmi);
+   if (IS_ERR(mdwc-utmi_clk)) {
+   dev_dbg(mdwc-dev, failed to get utmi clock\n);
+   return  PTR_ERR(mdwc-utmi_clk);
+   }
+
+   if (!IS_ERR(mdwc-gdsc)) {
+   ret = regulator_enable(mdwc-gdsc);
+   if (ret)
+   dev_err(mdwc-dev, cannot enable gdsc\n);
+   }
+
+   /*
+* DWC3 Core requires its CORE CLK (aka master / bus clk) to
+* run at 125Mhz in SSUSB mode and 60MHZ for HSUSB mode.
+*/
+   clk_set_rate(mdwc-core_clk, 12500);
+   clk_prepare_enable(mdwc-core_clk);
+   clk_prepare_enable(mdwc-iface_clk);
+   clk_prepare_enable(mdwc-sleep_clk);
+   clk_prepare_enable(mdwc-utmi_clk);
+
+   res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+   tcsr = devm_ioremap_resource(mdwc-dev, res);
+   if (!tcsr) {
+   ret = PTR_ERR(tcsr);
+   goto dis_clks;
+   }
+
+   /*
+* 

Re: [PATCH v5 1/3] usb: dwc3: msm: Add device tree binding information

2013-10-07 Thread Ivan T. Ivanov

Hi Felipe,

On Fri, 2013-10-04 at 09:31 -0500, Felipe Balbi wrote: 
 On Wed, Aug 21, 2013 at 04:29:44PM +0300, Ivan T. Ivanov wrote:
  From: Ivan T. Ivanov iiva...@mm-sol.com
  
  MSM USB3.0 core wrapper consist of USB3.0 IP from Synopsys
  (SNPS) and HS, SS PHY's control and configuration registers.
  
  It could operate in device mode (SS, HS, FS) and host
  mode (SS, HS, FS, LS).
  
  Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
 
 these patches were sent *ages* and nobody from DT mailing list has
 reviewed. Unless someone steps up now, I'll be queueing these patches
 next week.
 

Please take v6 of the patch set, which I have just posted. 
They contain several fixes and I have also added ACK from
Stephen Warren for DT part.

Thanks, 
Ivan

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Re: [PATCH v7 09/10] usb: dwc3: omap: manage usb_otg_ss_refclk960m clock

2013-10-07 Thread Roger Quadros
On 10/04/2013 04:23 PM, Greg KH wrote:
 On Fri, Oct 04, 2013 at 01:46:08PM +0300, Roger Quadros wrote:
 Greg,

 On 10/03/2013 06:41 PM, Greg KH wrote:
 On Thu, Oct 03, 2013 at 05:54:14PM +0300, Roger Quadros wrote:
 On 10/03/2013 03:29 PM, Felipe Balbi wrote:
 Hi,

 On Wed, Oct 02, 2013 at 04:41:53PM +0300, Roger Quadros wrote:
 On 10/02/2013 04:11 PM, Felipe Balbi wrote:
 On Mon, Sep 23, 2013 at 04:11:30PM +0300, Roger Quadros wrote:
 Hi Felipe,

 On 09/18/2013 03:49 PM, Roger Quadros wrote:
 usb_otg_ss_refclk960m is an optional functional clock to the
 UBS_OTG_SS module. So manage it in the driver.


 Just realized that usb_otg_ss_refclk960m is in fact functional clock 
 to the 
 PHY and not USB_OTG_SS module. The name is misleading.

 So please ignore patch 9 and 10.

 ignored. All others are fine, right ?

 Yes. But I might have to rebase this on top of Phy framework stuff.

 alright, Greg already took the PHY framework, so maybe we need to just
 give him my Acked-by and he takes the patches directly as I don't have
 PYH framework.

 OK. I'll resend this series to Greg in a while.

 It looks like you did, but forgot Felipe's ack :(

 I was under the impression that Felipe will explicitly give his Ack there.
 Should I resend with his Acked-bys?
 
 No need, I took the patches yesterday, you should have seen the
 automated emails, right?
 
Thanks. Yes, I got the automated e-mails.

cheers,
-roger
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Re: [PATCH v6 2/3] usb: phy: Add Qualcomm SS-USB and HS-USB drivers for DW PHY's

2013-10-07 Thread Stanimir Varbanov
Hi Ivan,

Few comments below.

On 10/07/2013 10:44 AM, Ivan T. Ivanov wrote:
 From: Ivan T. Ivanov iiva...@mm-sol.com
 
 These drivers handles control and configuration of the HS
 and SS USB PHY transceivers. They are part of the driver
 which manage Synopsys DesignWare USB3 controller stack
 inside Qualcomm SoC's.
 
 Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
 ---
  drivers/usb/phy/Kconfig |   11 ++
  drivers/usb/phy/Makefile|2 +
  drivers/usb/phy/phy-msm-dw-hs.c |  329 ++
  drivers/usb/phy/phy-msm-dw-ss.c |  375 
 +++
  4 files changed, 717 insertions(+)
  create mode 100644 drivers/usb/phy/phy-msm-dw-hs.c
  create mode 100644 drivers/usb/phy/phy-msm-dw-ss.c
 
 diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
 index d5589f9..bbb2d0e 100644
 --- a/drivers/usb/phy/Kconfig
 +++ b/drivers/usb/phy/Kconfig
 @@ -214,6 +214,17 @@ config USB_RCAR_PHY
 To compile this driver as a module, choose M here: the
 module will be called phy-rcar-usb.
  
 +config USB_MSM_DW_PHYS
 + tristate Qualcomm USB controller DW PHY's wrappers support
 + depends on (USB || USB_GADGET)  ARCH_MSM
 + select USB_PHY
 + help
 +   Enable this to support the DW USB PHY transceivers on MSM chips
 +   with DWC3 USB core. It handles PHY initialization, clock
 +   management required after resetting the hardware and power
 +   management. This driver is required even for peripheral only or
 +   host only mode configurations.
 +
  config USB_ULPI
   bool Generic ULPI Transceiver Driver
   depends on ARM
 diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
 index 2135e85..4813eb5 100644
 --- a/drivers/usb/phy/Makefile
 +++ b/drivers/usb/phy/Makefile
 @@ -26,6 +26,8 @@ obj-$(CONFIG_USB_EHCI_TEGRA)+= 
 phy-tegra-usb.o
  obj-$(CONFIG_USB_GPIO_VBUS)  += phy-gpio-vbus-usb.o
  obj-$(CONFIG_USB_ISP1301)+= phy-isp1301.o
  obj-$(CONFIG_USB_MSM_OTG)+= phy-msm-usb.o
 +obj-$(CONFIG_USB_MSM_DW_PHYS)+= phy-msm-dw-hs.o
 +obj-$(CONFIG_USB_MSM_DW_PHYS)+= phy-msm-dw-ss.o
  obj-$(CONFIG_USB_MV_OTG) += phy-mv-usb.o
  obj-$(CONFIG_USB_MXS_PHY)+= phy-mxs-usb.o
  obj-$(CONFIG_USB_RCAR_PHY)   += phy-rcar-usb.o
 diff --git a/drivers/usb/phy/phy-msm-dw-hs.c b/drivers/usb/phy/phy-msm-dw-hs.c
 new file mode 100644
 index 000..d29c1f1
 --- /dev/null
 +++ b/drivers/usb/phy/phy-msm-dw-hs.c
 @@ -0,0 +1,329 @@
 +/* Copyright (c) 2013, Code Aurora Forum. All rights reserved.
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 and
 + * only version 2 as published by the Free Software Foundation.
 + *
 + * This program is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 + * GNU General Public License for more details.
 + */
 +
 +#include linux/clk.h
 +#include linux/err.h
 +#include linux/io.h
 +#include linux/module.h
 +#include linux/of.h
 +#include linux/platform_device.h
 +#include linux/regulator/consumer.h
 +#include linux/usb/phy.h
 +
 +/**
 + *  USB QSCRATCH Hardware registers
 + */
 +#define QSCRATCH_CTRL_REG(0x04)
 +#define QSCRATCH_GENERAL_CFG (0x08)
 +#define PHY_CTRL_REG (0x10)
 +#define PARAMETER_OVERRIDE_X_REG (0x14)
 +#define CHARGING_DET_CTRL_REG(0x18)
 +#define CHARGING_DET_OUTPUT_REG  (0x1c)
 +#define ALT_INTERRUPT_EN_REG (0x20)
 +#define PHY_IRQ_STAT_REG (0x24)
 +#define CGCTL_REG(0x28)
 +

Please remove braces above and below.

 +#define PHY_3P3_VOL_MIN  305 /* uV */
 +#define PHY_3P3_VOL_MAX  330 /* uV */
 +#define PHY_3P3_HPM_LOAD 16000   /* uA */
 +
 +#define PHY_1P8_VOL_MIN  180 /* uV */
 +#define PHY_1P8_VOL_MAX  180 /* uV */
 +#define PHY_1P8_HPM_LOAD 19000   /* uA */
 +
 +/* TODO: these are suspicious */
 +#define USB_VDDCX_NO 1   /* index */
 +#define USB_VDDCX_MIN5   /* index */
 +#define USB_VDDCX_MAX7   /* index */
 +
 +struct msm_dw_hs_phy {
 + struct usb_phy  phy;
 + void __iomem*base;
 + struct device   *dev;
 +
 + struct clk  *xo_clk;
 + struct clk  *sleep_a_clk;
 +
 + struct regulator*v3p3;
 + struct regulator*v1p8;
 + struct regulator*vddcx;
 + struct regulator*vbus;
 +};
 +
 +#define  phy_to_dw_phy(x)container_of((x), struct msm_dw_hs_phy, 
 phy)

I think that using tab after #define is uncommon, 

Re: [PATCH v6 3/3] usb: dwc3: Add Qualcomm DWC3 glue layer driver

2013-10-07 Thread Stanimir Varbanov
Hi Ivan,

Minor comments below.

On 10/07/2013 10:44 AM, Ivan T. Ivanov wrote:
 From: Ivan T. Ivanov iiva...@mm-sol.com
 
 DWC3 glue layer is hardware layer around Synopsys DesignWare
 USB3 core. Its purpose is to supply Synopsys IP with required
 clocks, voltages and interface it with the rest of the SoC.
 
 Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
 ---
  drivers/usb/dwc3/Kconfig|8 +++
  drivers/usb/dwc3/Makefile   |1 +
  drivers/usb/dwc3/dwc3-msm.c |  168 
 +++
  3 files changed, 177 insertions(+)
  create mode 100644 drivers/usb/dwc3/dwc3-msm.c
 
 diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
 index 70fc430..4c7b5a4 100644
 --- a/drivers/usb/dwc3/Kconfig
 +++ b/drivers/usb/dwc3/Kconfig
 @@ -59,6 +59,14 @@ config USB_DWC3_EXYNOS
 Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
 say 'Y' or 'M' if you have one such device.
  
 +config USB_DWC3_MSM
 +   tristate Qualcomm MSM/APQ Platforms
 +   default USB_DWC3
 +   select USB_MSM_DWC3_PHYS
 +   help
 + Recent Qualcomm SoCs ship with one DesignWare Core USB3 IP inside,
 + say 'Y' or 'M' if you have one such device.
 +
  config USB_DWC3_PCI
   tristate PCIe-based Platforms
   depends on PCI
 diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
 index dd17601..a90de66 100644
 --- a/drivers/usb/dwc3/Makefile
 +++ b/drivers/usb/dwc3/Makefile
 @@ -31,4 +31,5 @@ endif
  
  obj-$(CONFIG_USB_DWC3_OMAP)  += dwc3-omap.o
  obj-$(CONFIG_USB_DWC3_EXYNOS)+= dwc3-exynos.o
 +obj-$(CONFIG_USB_DWC3_MSM)   += dwc3-msm.o
  obj-$(CONFIG_USB_DWC3_PCI)   += dwc3-pci.o
 diff --git a/drivers/usb/dwc3/dwc3-msm.c b/drivers/usb/dwc3/dwc3-msm.c
 new file mode 100644
 index 000..1d73f92
 --- /dev/null
 +++ b/drivers/usb/dwc3/dwc3-msm.c
 @@ -0,0 +1,168 @@
 +/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 and
 + * only version 2 as published by the Free Software Foundation.
 + *
 + * This program is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 + * GNU General Public License for more details.
 + */
 +
 +#include linux/clk.h
 +#include linux/err.h
 +#include linux/io.h
 +#include linux/module.h
 +#include linux/of.h
 +#include linux/of_platform.h
 +#include linux/platform_device.h
 +#include linux/regulator/consumer.h
 +#include linux/usb/phy.h
 +
 +struct dwc3_msm {
 + struct device   *dev;
 +
 + struct clk  *core_clk;
 + struct clk  *iface_clk;
 + struct clk  *sleep_clk;
 + struct clk  *utmi_clk;
 +
 + struct regulator*gdsc;
 +};
 +
 +static int dwc3_msm_probe(struct platform_device *pdev)
 +{
 + struct device_node *node = pdev-dev.of_node;
 + struct dwc3_msm *mdwc;
 + struct resource *res;
 + void __iomem *tcsr;
 + int ret = 0;
 +
 + mdwc = devm_kzalloc(pdev-dev, sizeof(*mdwc), GFP_KERNEL);
 + if (!mdwc)
 + return -ENOMEM;
 +
 + platform_set_drvdata(pdev, mdwc);
 +
 + mdwc-dev = pdev-dev;
 +
 + mdwc-gdsc = devm_regulator_get(mdwc-dev, gdsc);
 +
 + mdwc-core_clk = devm_clk_get(mdwc-dev, core);
 + if (IS_ERR(mdwc-core_clk)) {
 + dev_dbg(mdwc-dev, failed to get core clock\n);
 + return PTR_ERR(mdwc-core_clk);
 + }
 +
 + mdwc-iface_clk = devm_clk_get(mdwc-dev, iface);
 + if (IS_ERR(mdwc-iface_clk)) {
 + dev_dbg(mdwc-dev, failed to get iface clock\n);
 + return PTR_ERR(mdwc-iface_clk);
 + }
 +
 + mdwc-sleep_clk = devm_clk_get(mdwc-dev, sleep);
 + if (IS_ERR(mdwc-sleep_clk)) {
 + dev_dbg(mdwc-dev, failed to get sleep clock\n);
 + return  PTR_ERR(mdwc-sleep_clk);
 + }
 +
 + mdwc-utmi_clk = devm_clk_get(mdwc-dev, utmi);
 + if (IS_ERR(mdwc-utmi_clk)) {
 + dev_dbg(mdwc-dev, failed to get utmi clock\n);
 + return  PTR_ERR(mdwc-utmi_clk);
 + }

I'm not sure that those dev_dbg() are useful at all.

 +
 + if (!IS_ERR(mdwc-gdsc)) {
 + ret = regulator_enable(mdwc-gdsc);
 + if (ret)
 + dev_err(mdwc-dev, cannot enable gdsc\n);
 + }
 +
 + /*
 +  * DWC3 Core requires its CORE CLK (aka master / bus clk) to
 +  * run at 125Mhz in SSUSB mode and 60MHZ for HSUSB mode.
 +  */
 + clk_set_rate(mdwc-core_clk, 12500);
 + clk_prepare_enable(mdwc-core_clk);
 + clk_prepare_enable(mdwc-iface_clk);
 + clk_prepare_enable(mdwc-sleep_clk);
 + clk_prepare_enable(mdwc-utmi_clk);

All function calls above could return errors. Aren't those clocks fatal?


Re: [PATCH v5 10/15] usb/gadget: f_mass_storage: create fsg_common_run_thread for use in fsg_common_init

2013-10-07 Thread Andrzej Pietrasiewicz

W dniu 05.10.2013 15:18, Michal Nazarewicz pisze:

On Thu, Oct 03 2013, Andrzej Pietrasiewicz wrote:

fsg_common_init is a lengthy function. Factor a portion of it out.

Signed-off-by: Andrzej Pietrasiewicz andrze...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com


Acked-by: Michal Nazarewicz min...@mina86.com


---
  drivers/usb/gadget/f_mass_storage.c |   32 +---
  drivers/usb/gadget/f_mass_storage.h |2 ++
  2 files changed, 23 insertions(+), 11 deletions(-)






@Felipe:
I will address the small issues indicated in the review and submit a v6
series.

@Michal:
Thank you for reviewing the series. Can I put your Acked-by in the
corrected patches? At least if I feel they do exactly what you
suggested and the way you suggested?

AP

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[PATCH 2/5] usb: gadget: s3c-hsotg: support configurable UTMI PHY width

2013-10-07 Thread Matt Porter
Extend dwc2 binding with an optional utmi phy width property.
Enable the s3c-hsotg.c driver to use standard dwc2 binding
and enable configuration of the UTMI phy width based on the
property.

Signed-off-by: Matt Porter matt.por...@linaro.org
Reviewed-by: Markus Mayer markus.ma...@linaro.org
Reviewed-by: Tim Kryger tim.kry...@linaro.org
---
 Documentation/devicetree/bindings/staging/dwc2.txt |  4 
 drivers/usb/gadget/s3c-hsotg.c | 18 +-
 drivers/usb/gadget/s3c-hsotg.h |  1 +
 3 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/staging/dwc2.txt 
b/Documentation/devicetree/bindings/staging/dwc2.txt
index 1a1b7cf..fb6b8ee 100644
--- a/Documentation/devicetree/bindings/staging/dwc2.txt
+++ b/Documentation/devicetree/bindings/staging/dwc2.txt
@@ -6,10 +6,14 @@ Required properties:
 - reg : Should contain 1 register range (address and length)
 - interrupts : Should contain 1 interrupt
 
+Optional properties:
+- snps,phy-utmi-width: Must contain the UTMI data width (either 8 or 16)
+
 Example:
 
 usb@101c {
 compatible = ralink,rt3050-usb, snps,dwc2;
 reg = 0x101c 4;
 interrupts = 18;
+   snps,phy-utmi-width = 8;
 };
diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c
index 34d80f3..396afb3 100644
--- a/drivers/usb/gadget/s3c-hsotg.c
+++ b/drivers/usb/gadget/s3c-hsotg.c
@@ -137,6 +137,7 @@ struct s3c_hsotg_ep {
  * @regs: The memory area mapped for accessing registers.
  * @irq: The IRQ number we are using
  * @supplies: Definition of USB power supplies
+ * @phyif: PHY interface width
  * @dedicated_fifos: Set if the hardware has dedicated IN-EP fifos.
  * @num_of_eps: Number of available EPs (excluding EP0)
  * @debug_root: root directrory for debugfs.
@@ -164,6 +165,7 @@ struct s3c_hsotg {
 
struct regulator_bulk_data supplies[ARRAY_SIZE(s3c_hsotg_supply_names)];
 
+   u32 phyif;
unsigned intdedicated_fifos:1;
unsigned char   num_of_eps;
 
@@ -2212,7 +2214,7 @@ static void s3c_hsotg_core_init(struct s3c_hsotg *hsotg)
 */
 
/* set the PLL on, remove the HNP/SRP and set the PHY */
-   writel(GUSBCFG_PHYIf16 | GUSBCFG_TOutCal(7) |
+   writel(hsotg-phyif | GUSBCFG_TOutCal(7) |
   (0x5  10), hsotg-regs + GUSBCFG);
 
s3c_hsotg_init_fifo(hsotg);
@@ -3447,9 +3449,11 @@ static int s3c_hsotg_probe(struct platform_device *pdev)
struct s3c_hsotg_plat *plat = dev_get_platdata(pdev-dev);
struct usb_phy *phy;
struct device *dev = pdev-dev;
+   struct device_node *np = dev-of_node;
struct s3c_hsotg_ep *eps;
struct s3c_hsotg *hsotg;
struct resource *res;
+   u32 phy_utmi_width = 16;
int epnum;
int ret;
int i;
@@ -3539,6 +3543,17 @@ static int s3c_hsotg_probe(struct platform_device *pdev)
goto err_supplies;
}
 
+   /* Set default UTMI width */
+   hsotg-phyif = GUSBCFG_PHYIf16;
+   if (np) {
+   of_property_read_u32(np, snps,phy-utmi-width,
+phy_utmi_width);
+   if (phy_utmi_width == 8)
+   hsotg-phyif = GUSBCFG_PHYIf8;
+   if ((phy_utmi_width != 8)  (phy_utmi_width != 16))
+   dev_warn(dev, invalid snps,phy-utmi-width value\n);
+   }
+
/* usb phy enable */
s3c_hsotg_phy_enable(hsotg);
 
@@ -3645,6 +3660,7 @@ static int s3c_hsotg_remove(struct platform_device *pdev)
 #ifdef CONFIG_OF
 static const struct of_device_id s3c_hsotg_of_ids[] = {
{ .compatible = samsung,s3c6400-hsotg, },
+   { .compatible = snps,dwc2, },
{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, s3c_hsotg_of_ids);
diff --git a/drivers/usb/gadget/s3c-hsotg.h b/drivers/usb/gadget/s3c-hsotg.h
index d650b12..85f549f 100644
--- a/drivers/usb/gadget/s3c-hsotg.h
+++ b/drivers/usb/gadget/s3c-hsotg.h
@@ -55,6 +55,7 @@
 #define GUSBCFG_HNPCap (1  9)
 #define GUSBCFG_SRPCap (1  8)
 #define GUSBCFG_PHYIf16(1  3)
+#define GUSBCFG_PHYIf8 (0  3)
 #define GUSBCFG_TOutCal_MASK   (0x7  0)
 #define GUSBCFG_TOutCal_SHIFT  (0)
 #define GUSBCFG_TOutCal_LIMIT  (0x7)
-- 
1.8.4

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[PATCH 4/5] usb: phy: add Broadcom Kona USB PHY driver

2013-10-07 Thread Matt Porter
Add a USB PHY driver for BCM281xx devices. This driver makes use of the
Broadcom Kona USB control driver to control init/shutdown of the PHY.

Signed-off-by: Matt Porter matt.por...@linaro.org
Reviewed-by: Markus Mayer markus.ma...@linaro.org
Reviewed-by: Tim Kryger tim.kry...@linaro.org
---
 .../devicetree/bindings/usb/bcm-kona-usb-phy.txt   | 10 +++
 drivers/usb/phy/Kconfig|  7 ++
 drivers/usb/phy/Makefile   |  1 +
 drivers/usb/phy/phy-bcm-kona-usb2.c| 99 ++
 4 files changed, 117 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/bcm-kona-usb-phy.txt
 create mode 100644 drivers/usb/phy/phy-bcm-kona-usb2.c

diff --git a/Documentation/devicetree/bindings/usb/bcm-kona-usb-phy.txt 
b/Documentation/devicetree/bindings/usb/bcm-kona-usb-phy.txt
new file mode 100644
index 000..a935fe2
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/bcm-kona-usb-phy.txt
@@ -0,0 +1,10 @@
+BROADCOM KONA USB PHY
+
+Required properties:
+ - compatible: brcm,kona-usb2
+
+Example:
+
+   usbphy: usbphy {
+   compatible = brcm,kona-usb2;
+   };
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 2b7b4f1..d063204 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -105,6 +105,13 @@ config BCM_KONA_CTRL_USB
help
  Enable this to support the Broadcom Kona USB control block
 
+config BCM_KONA_PHY_USB2
+   tristate Broadcom Kona USB2 PHY Driver
+   select USB_PHY
+   select BCM_KONA_CTRL_USB
+   help
+ Enable this to support the Broadcom Kona USB 2.0 PHY.
+
 config SAMSUNG_USBPHY
tristate
help
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index 98c545e..227fba5 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_OMAP_CONTROL_USB)+= 
phy-omap-control.o
 obj-$(CONFIG_AM335X_CONTROL_USB)   += phy-am335x-control.o
 obj-$(CONFIG_AM335X_PHY_USB)   += phy-am335x.o
 obj-$(CONFIG_BCM_KONA_CTRL_USB)+= phy-bcm-kona-ctrl.o
+obj-$(CONFIG_BCM_KONA_PHY_USB2)+= phy-bcm-kona-usb2.o
 obj-$(CONFIG_OMAP_USB2)+= phy-omap-usb2.o
 obj-$(CONFIG_OMAP_USB3)+= phy-omap-usb3.o
 obj-$(CONFIG_SAMSUNG_USBPHY)   += phy-samsung-usb.o
diff --git a/drivers/usb/phy/phy-bcm-kona-usb2.c 
b/drivers/usb/phy/phy-bcm-kona-usb2.c
new file mode 100644
index 000..21aee4a
--- /dev/null
+++ b/drivers/usb/phy/phy-bcm-kona-usb2.c
@@ -0,0 +1,99 @@
+/*
+ * phy-bcm-kona-control.c - Broadcom Kona USB2 Phy Driver
+ *
+ * Copyright (C) 2013 Linaro Limited
+ * Matt Porter matt.por...@linaro.org
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/module.h
+#include linux/of.h
+#include linux/platform_device.h
+
+#include bcm-kona-usb.h
+
+static int bcm_kona_phy_init(struct usb_phy *uphy)
+{
+   struct bcm_kona_usb *phy = dev_get_drvdata(uphy-dev);
+
+   bcm_kona_ctrl_usb_phy_power(phy-ctrl_dev, 1);
+
+   return 0;
+}
+
+static void bcm_kona_phy_shutdown(struct usb_phy *uphy)
+{
+   struct bcm_kona_usb *phy = dev_get_drvdata(uphy-dev);
+
+   bcm_kona_ctrl_usb_phy_power(phy-ctrl_dev, 0);
+}
+
+static int bcm_kona_usb2_probe(struct platform_device *pdev)
+{
+   struct device *dev = pdev-dev;
+   struct bcm_kona_usb *phy;
+
+   phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
+   if (!phy)
+   return -ENOMEM;
+
+   phy-ctrl_dev = bcm_kona_get_ctrl_dev();
+   if (IS_ERR(phy-ctrl_dev)) {
+   dev_dbg(pdev-dev, Failed to get control device\n);
+   return -ENODEV;
+   }
+
+   phy-dev= dev;
+   phy-phy.dev= phy-dev;
+   phy-phy.label  = bcm-kona-usb2;
+   phy-phy.init   = bcm_kona_phy_init;
+   phy-phy.shutdown   = bcm_kona_phy_shutdown;
+   phy-phy.type   = USB_PHY_TYPE_USB2;
+
+   platform_set_drvdata(pdev, phy);
+
+   usb_add_phy_dev(phy-phy);
+
+   return 0;
+}
+
+static int bcm_kona_usb2_remove(struct platform_device *pdev)
+{
+   struct bcm_kona_usb *phy = platform_get_drvdata(pdev);
+
+   usb_remove_phy(phy-phy);
+
+   return 0;
+}
+
+static const struct of_device_id bcm_kona_usb2_dt_ids[] = {
+   { .compatible = brcm,kona-usb2 },
+   { /* sentinel */ }
+};
+
+MODULE_DEVICE_TABLE(of, bcm_kona_usb2_dt_ids);
+
+static struct platform_driver bcm_kona_usb2_driver = {

[PATCH 5/5] ARM: dts: add usb udc support to bcm281xx

2013-10-07 Thread Matt Porter
Adds USB OTG/Control/PHY and clock support to BCM281xx and enables
UDC support on the bcm11351-brt and bcm28155-ap boards.

Signed-off-by: Matt Porter matt.por...@linaro.org
Reviewed-by: Markus Mayer markus.ma...@linaro.org
Reviewed-by: Tim Kryger tim.kry...@linaro.org
---
 arch/arm/boot/dts/bcm11351-brt.dts | 10 ++
 arch/arm/boot/dts/bcm11351.dtsi| 21 +
 arch/arm/boot/dts/bcm28155-ap.dts  | 12 
 3 files changed, 43 insertions(+)

diff --git a/arch/arm/boot/dts/bcm11351-brt.dts 
b/arch/arm/boot/dts/bcm11351-brt.dts
index 9d36eb4..5a269c7 100644
--- a/arch/arm/boot/dts/bcm11351-brt.dts
+++ b/arch/arm/boot/dts/bcm11351-brt.dts
@@ -43,5 +43,15 @@
status = okay;
};
 
+   usbotg@3f12 {
+   status = okay;
+   };
 
+   usbctl@3f13 {
+   status = okay;
+   };
+
+   usbphy {
+   status = okay;
+   };
 };
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
index 22aef21..1c647f2 100644
--- a/arch/arm/boot/dts/bcm11351.dtsi
+++ b/arch/arm/boot/dts/bcm11351.dtsi
@@ -227,4 +227,25 @@
#clock-cells = 0;
};
};
+
+   usbotg: usbotg@3f12 {
+   compatible = snps,dwc2;
+   reg = 0x3f12 0x1;
+   interrupts = GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH;
+   clocks = usb_otg_ahb_clk;
+   clock-names = otg;
+   snps,phy-utmi-width = 8;
+   status = disabled;
+   };
+
+   usbctl: usbctl@3f13 {
+   compatible = brcm,kona-ctrl-usb;
+   reg = 0x3f13 0x28;
+   status = disabled;
+   };
+
+   usbphy: usbphy {
+   compatible = brcm,kona-usb2;
+   status = disabled;
+   };
 };
diff --git a/arch/arm/boot/dts/bcm28155-ap.dts 
b/arch/arm/boot/dts/bcm28155-ap.dts
index 96ae67a..7b1b741 100644
--- a/arch/arm/boot/dts/bcm28155-ap.dts
+++ b/arch/arm/boot/dts/bcm28155-ap.dts
@@ -42,4 +42,16 @@
max-frequency = 4800;
status = okay;
};
+
+   usbotg@3f12 {
+   status = okay;
+   };
+
+   usbctl@3f13 {
+   status = okay;
+   };
+
+   usbphy {
+   status = okay;
+   };
 };
-- 
1.8.4

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[PATCH 3/5] usb: phy: add Broadcom Kona USB control driver

2013-10-07 Thread Matt Porter
Broadcom BCM281xx parts have a PHY control block that
operates in conjunction with the DWC2 USB OTG. This driver
exposes an API that allows control of power/reset for a
connected USB PHY.

Signed-off-by: Matt Porter matt.por...@linaro.org
Reviewed-by: Markus Mayer markus.ma...@linaro.org
Reviewed-by: Tim Kryger tim.kry...@linaro.org
---
 .../devicetree/bindings/usb/bcm-kona-usb-ctrl.txt  |  12 ++
 drivers/usb/phy/Kconfig|   5 +
 drivers/usb/phy/Makefile   |   1 +
 drivers/usb/phy/bcm-kona-usb.h |  31 +
 drivers/usb/phy/phy-bcm-kona-ctrl.c| 151 +
 5 files changed, 200 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/bcm-kona-usb-ctrl.txt
 create mode 100644 drivers/usb/phy/bcm-kona-usb.h
 create mode 100644 drivers/usb/phy/phy-bcm-kona-ctrl.c

diff --git a/Documentation/devicetree/bindings/usb/bcm-kona-usb-ctrl.txt 
b/Documentation/devicetree/bindings/usb/bcm-kona-usb-ctrl.txt
new file mode 100644
index 000..98163f6
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/bcm-kona-usb-ctrl.txt
@@ -0,0 +1,12 @@
+BROADCOM KONA USB CONTROL
+
+Required properties:
+ - compatible: brcm,kona-ctrl-usb
+ - reg: offset and length of the USB control registers
+
+Example:
+
+   usbctl: usbctl@3f13 {
+   compatible = brcm,kona-ctrl-usb;
+   reg = 0x3f13 0x28;
+   };
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index d5589f9..2b7b4f1 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -100,6 +100,11 @@ config AM335X_PHY_USB
  This driver provides PHY support for that phy which part for the
  AM335x SoC.
 
+config BCM_KONA_CTRL_USB
+   tristate
+   help
+ Enable this to support the Broadcom Kona USB control block
+
 config SAMSUNG_USBPHY
tristate
help
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index 2135e85..98c545e 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_NOP_USB_XCEIV)   += phy-generic.o
 obj-$(CONFIG_OMAP_CONTROL_USB) += phy-omap-control.o
 obj-$(CONFIG_AM335X_CONTROL_USB)   += phy-am335x-control.o
 obj-$(CONFIG_AM335X_PHY_USB)   += phy-am335x.o
+obj-$(CONFIG_BCM_KONA_CTRL_USB)+= phy-bcm-kona-ctrl.o
 obj-$(CONFIG_OMAP_USB2)+= phy-omap-usb2.o
 obj-$(CONFIG_OMAP_USB3)+= phy-omap-usb3.o
 obj-$(CONFIG_SAMSUNG_USBPHY)   += phy-samsung-usb.o
diff --git a/drivers/usb/phy/bcm-kona-usb.h b/drivers/usb/phy/bcm-kona-usb.h
new file mode 100644
index 000..4563dd6
--- /dev/null
+++ b/drivers/usb/phy/bcm-kona-usb.h
@@ -0,0 +1,31 @@
+/*
+ * bcm_kona_usb.h -- Broadcom Kona USB header file
+ *
+ * Copyright (C) 2013 Linaro Limited
+ * Matt Porter matt.por...@linaro.org
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __BCM_KONA_USB_H
+#define __BCM_KONA_USB_H
+
+#include linux/usb/phy.h
+
+struct bcm_kona_usb {
+   struct usb_phy phy;
+   struct device *dev;
+   struct device *ctrl_dev;
+};
+
+extern struct device *bcm_kona_get_ctrl_dev(void);
+extern void bcm_kona_ctrl_usb_phy_power(struct device *, int);
+
+#endif /* __BCM_KONA_USB_H */
diff --git a/drivers/usb/phy/phy-bcm-kona-ctrl.c 
b/drivers/usb/phy/phy-bcm-kona-ctrl.c
new file mode 100644
index 000..d2936b6
--- /dev/null
+++ b/drivers/usb/phy/phy-bcm-kona-ctrl.c
@@ -0,0 +1,151 @@
+/*
+ * phy-bcm-kona-ctrl.c - Broadcom Kona USB Control Driver
+ *
+ * Based on phy-omap-control.c
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
+ * Copyright (C) 2013 Linaro Limited
+ * Matt Porter matt.por...@linaro.org
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/slab.h
+#include linux/of.h
+#include linux/err.h
+#include linux/io.h
+#include linux/clk.h
+
+#include bcm-kona-usb.h
+
+#define OTGCTL_OTGSTAT2(1  31)
+#define OTGCTL_OTGSTAT1(1  30)
+#define 

[PATCH 1/5] usb: gadget: s3c-hsotg: enable build for other platforms

2013-10-07 Thread Matt Porter
Remove unused Samsung-specific machine include and Kconfig
dependency on S3C.

Signed-off-by: Matt Porter matt.por...@linaro.org
Reviewed-by: Markus Mayer markus.ma...@linaro.org
Reviewed-by: Tim Kryger tim.kry...@linaro.org
---
 drivers/usb/gadget/Kconfig | 7 +++
 drivers/usb/gadget/s3c-hsotg.c | 2 --
 2 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 48cddf3..2e69fa0 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -280,11 +280,10 @@ config USB_PXA27X
   gadget drivers to also be dynamically linked.
 
 config USB_S3C_HSOTG
-   tristate S3C HS/OtG USB Device controller
-   depends on S3C_DEV_USB_HSOTG
+   tristate Designware/S3C HS/OtG USB Device controller
help
- The Samsung S3C64XX USB2.0 high-speed gadget controller
- integrated into the S3C64XX series SoC.
+ The Designware USB2.0 high-speed gadget controller
+ integrated into the S3C64XX and BCM281xx series SoC.
 
 config USB_S3C2410
tristate S3C2410 USB Device Controller
diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c
index 6bddf1a..34d80f3 100644
--- a/drivers/usb/gadget/s3c-hsotg.c
+++ b/drivers/usb/gadget/s3c-hsotg.c
@@ -36,8 +36,6 @@
 #include linux/usb/phy.h
 #include linux/platform_data/s3c-hsotg.h
 
-#include mach/map.h
-
 #include s3c-hsotg.h
 
 static const char * const s3c_hsotg_supply_names[] = {
-- 
1.8.4

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[PATCH 0/5] USB Device Controller support for BCM281xx

2013-10-07 Thread Matt Porter
This series adds USB Device Controller support for the Broadcom
BCM281xx family of parts. BCM281xx contains a DWC2 OTG block and
s3c-hsotg is used to support UDC operation.

Parts 1-2 allows s3c-hsotg to build on non-Samsung platforms and
adds support for a configurable UTMI PHY width. s3c-hsotg is extended
to also support the dwc2 binding as that binding should describe the
hardware independently of there being two different drivers (dwc2 in
staging and s3c-hsotg) for the same device.

Parts 3-4 add a PHY control driver for the Broadcom USB control block
as well as a PHY driver that calls the exported API from the control
driver. This approach is borrowed directly from the phy-omap-control.c
driver.

Patch 5 adds the DT nodes to enable UDC support on both BCM281xx boards
in the kernel.

This series depends on the Update Kona drivers to use clocks series
(https://lkml.org/lkml/2013/10/3/645). The dependencies noted for that
series are already queued for 3.13.

Matt Porter (5):
  usb: gadget: s3c-hsotg: enable build for other platforms
  usb: gadget: s3c-hsotg: support configurable UTMI PHY width
  usb: phy: add Broadcom Kona USB control driver
  usb: phy: add Broadcom Kona USB PHY driver
  ARM: dts: add usb udc support to bcm281xx

 Documentation/devicetree/bindings/staging/dwc2.txt |   4 +
 .../devicetree/bindings/usb/bcm-kona-usb-ctrl.txt  |  12 ++
 .../devicetree/bindings/usb/bcm-kona-usb-phy.txt   |  10 ++
 arch/arm/boot/dts/bcm11351-brt.dts |  10 ++
 arch/arm/boot/dts/bcm11351.dtsi|  21 +++
 arch/arm/boot/dts/bcm28155-ap.dts  |  12 ++
 drivers/usb/gadget/Kconfig |   7 +-
 drivers/usb/gadget/s3c-hsotg.c |  20 ++-
 drivers/usb/gadget/s3c-hsotg.h |   1 +
 drivers/usb/phy/Kconfig|  12 ++
 drivers/usb/phy/Makefile   |   2 +
 drivers/usb/phy/bcm-kona-usb.h |  31 +
 drivers/usb/phy/phy-bcm-kona-ctrl.c| 151 +
 drivers/usb/phy/phy-bcm-kona-usb2.c|  99 ++
 14 files changed, 385 insertions(+), 7 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/usb/bcm-kona-usb-ctrl.txt
 create mode 100644 Documentation/devicetree/bindings/usb/bcm-kona-usb-phy.txt
 create mode 100644 drivers/usb/phy/bcm-kona-usb.h
 create mode 100644 drivers/usb/phy/phy-bcm-kona-ctrl.c
 create mode 100644 drivers/usb/phy/phy-bcm-kona-usb2.c

-- 
1.8.4

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[PATCH] ARM: dts: omap3-beagle: Adapt USB OTG to generic PHY framework

2013-10-07 Thread Roger Quadros
The generic PHY framewrok expects different properties than the
old USB PHY framework. Supply those properties.

Fixes USB OTG port on beagle after the Generic PHY framework was
merged in greg/usb-next. [1]

[1] - https://lkml.org/lkml/2013/9/27/581

Signed-off-by: Roger Quadros rog...@ti.com
---
 arch/arm/boot/dts/omap3-beagle.dts |2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/omap3-beagle.dts 
b/arch/arm/boot/dts/omap3-beagle.dts
index 7669c16..fa532aa 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -173,6 +173,8 @@
 usb_otg_hs {
interface-type = 0;
usb-phy = usb2_phy;
+   phys = usb2_phy;
+   phy-names = usb2-phy;
mode = 3;
power = 50;
 };
-- 
1.7.4.1

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Re: [PATCH] sound: usb: add support for wireless USB devices

2013-10-07 Thread Takashi Iwai
At Tue,  1 Oct 2013 14:32:15 -0500,
Thomas Pugliese wrote:
 
 This patch updates snd_usb_audio_create also support devices whose 
 speed == USB_SPEED_WIRELESS.
 
 Signed-off-by: Thomas Pugliese thomas.pugli...@gmail.com

Thanks, applied now.

(BTW, please add the maintainers explicitly to Cc at the next time.)


Takashi

 ---
  sound/usb/card.c |1 +
  1 file changed, 1 insertion(+)
 
 diff --git a/sound/usb/card.c b/sound/usb/card.c
 index 64952e2..ef76aa0 100644
 --- a/sound/usb/card.c
 +++ b/sound/usb/card.c
 @@ -349,6 +349,7 @@ static int snd_usb_audio_create(struct usb_device *dev, 
 int idx,
   case USB_SPEED_LOW:
   case USB_SPEED_FULL:
   case USB_SPEED_HIGH:
 + case USB_SPEED_WIRELESS:
   case USB_SPEED_SUPER:
   break;
   default:
 -- 
 1.7.10.4
 
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Re: [PATCH] sound: usb: support wireless devices in snd_usb_parse_datainterval

2013-10-07 Thread Takashi Iwai
At Tue,  1 Oct 2013 14:32:57 -0500,
Thomas Pugliese wrote:
 
 Hi, 
 This patch adds support for dev speed USB_SPEED_WIRELESS in 
 snd_usb_parse_datainterval which allows the usb sound core to create 
 ISO urbs with the correct number and size of buffers.
 
 Signed-off-by: Thomas Pugliese thomas.pugli...@gmail.com

Thanks, applied this one, too.


Takashi

 ---
  sound/usb/helper.c |1 +
  1 file changed, 1 insertion(+)
 
 diff --git a/sound/usb/helper.c b/sound/usb/helper.c
 index 6209024..51ed1ac 100644
 --- a/sound/usb/helper.c
 +++ b/sound/usb/helper.c
 @@ -118,6 +118,7 @@ unsigned char snd_usb_parse_datainterval(struct 
 snd_usb_audio *chip,
  {
   switch (snd_usb_get_speed(chip-dev)) {
   case USB_SPEED_HIGH:
 + case USB_SPEED_WIRELESS:
   case USB_SPEED_SUPER:
   if (get_endpoint(alts, 0)-bInterval = 1 
   get_endpoint(alts, 0)-bInterval = 4)
 -- 
 1.7.10.4
 
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Re: [PATCH] usbnet: smsc95xx: Add device tree input for MAC address

2013-10-07 Thread Ming Lei
On Mon, Oct 7, 2013 at 1:31 AM, Dan Murphy dmur...@ti.com wrote:
 On 10/06/2013 10:05 AM, Ming Lei wrote:
 On Sat, Oct 5, 2013 at 2:25 AM, Dan Murphy dmur...@ti.com wrote:
 If the smsc95xx does not have a valid MAC address stored within
 the eeprom then a random number is generated.  The MAC can also
 be set by uBoot but the smsc95xx does not have a way to read this.

 Create the binding for the smsc95xx so that uBoot can set the MAC
 and the code can retrieve the MAC from the modified DTB file.
 Suppose there are two smsc95xx usbnet devices connected to usb bus, and
 one is built-in, another is hotplug device, can your patch handle the 
 situation
 correctly?

 Look at this line in the patch below

 sprintf(of_name, %s%i, SMSC95XX_OF_NAME, dev-udev-dev.id);

 I am appending the dev ID of the device to the of_name here.  As long as 
 init_mac_address is called, the dev.id and the uBoot
 entry match then yes.

Currently, non-root-hub usb device is created and added into usb bus without
any platform(device tree) knowledge, so you can't expect the match here.

Also not mention the two smsc95xx devices may attach to two different
usb host controllers(buses).

Thanks,
-- 
Ming Lei
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[PATCH 0/1] Possibly fix USB OTG on GTA04 and N900

2013-10-07 Thread Roger Quadros
Hi,

USB OTG on these boards might be broken on Greg's usb-next branch [1]
after the Generic PHY framework and associated patches were merged.

This is a probable fix but I'm not able to test these boards. Please
give it a try and your Ack if it works. Thanks.

[1] - git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git

cheers,
-roger

Roger Quadros (1):
  ARM: dts: omap3:  Adapt USB OTG to generic PHY framework

 arch/arm/boot/dts/omap3-gta04.dts |2 ++
 arch/arm/boot/dts/omap3-n900.dts  |2 ++
 2 files changed, 4 insertions(+), 0 deletions(-)

-- 
1.7.4.1

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[PATCH 1/1] ARM: dts: omap3: Adapt USB OTG to generic PHY framework

2013-10-07 Thread Roger Quadros
The generic PHY framewrok expects different properties than the
old USB PHY framework. Supply those properties.

Fixes USB OTG port on GAT04 and N900 after the Generic PHY framework was
merged in greg/usb-next. [1]

[1] - https://lkml.org/lkml/2013/9/27/581

Signed-off-by: Roger Quadros rog...@ti.com
---
 arch/arm/boot/dts/omap3-gta04.dts |2 ++
 arch/arm/boot/dts/omap3-n900.dts  |2 ++
 2 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/omap3-gta04.dts 
b/arch/arm/boot/dts/omap3-gta04.dts
index a84684a..b9b55c9 100644
--- a/arch/arm/boot/dts/omap3-gta04.dts
+++ b/arch/arm/boot/dts/omap3-gta04.dts
@@ -131,6 +131,8 @@
 usb_otg_hs {
interface-type = 0;
usb-phy = usb2_phy;
+   phys = usb2_phy;
+   phy-names = usb2-phy;
mode = 3;
power = 50;
 };
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index d64fa04..e13b697 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -87,6 +87,8 @@
 usb_otg_hs {
interface-type = 0;
usb-phy = usb2_phy;
+   phys = usb2_phy;
+   phy-names = usb2-phy;
mode = 2;
power = 50;
 };
-- 
1.7.4.1

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Re: [PATCH] usbnet: smsc95xx: Add device tree input for MAC address

2013-10-07 Thread Dan Murphy
On 10/07/2013 06:42 AM, Ming Lei wrote:
 On Mon, Oct 7, 2013 at 1:31 AM, Dan Murphy dmur...@ti.com wrote:
 On 10/06/2013 10:05 AM, Ming Lei wrote:
 On Sat, Oct 5, 2013 at 2:25 AM, Dan Murphy dmur...@ti.com wrote:
 If the smsc95xx does not have a valid MAC address stored within
 the eeprom then a random number is generated.  The MAC can also
 be set by uBoot but the smsc95xx does not have a way to read this.

 Create the binding for the smsc95xx so that uBoot can set the MAC
 and the code can retrieve the MAC from the modified DTB file.
 Suppose there are two smsc95xx usbnet devices connected to usb bus, and
 one is built-in, another is hotplug device, can your patch handle the 
 situation
 correctly?
 Look at this line in the patch below

 sprintf(of_name, %s%i, SMSC95XX_OF_NAME, dev-udev-dev.id);

 I am appending the dev ID of the device to the of_name here.  As long as 
 init_mac_address is called, the dev.id and the uBoot
 entry match then yes.
 Currently, non-root-hub usb device is created and added into usb bus without
 any platform(device tree) knowledge, so you can't expect the match here.

That is correct.  Platform/dev tree will have no concept of the PnP USB dongle 
therefore there should be no entry in either.

I will need to test this issue with a PnP usb-ethernet dongle.

Dan




 Also not mention the two smsc95xx devices may attach to two different
 usb host controllers(buses).

 Thanks,


-- 
--
Dan Murphy

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Re: [PATCH 1/1] ARM: dts: omap3: Adapt USB OTG to generic PHY framework

2013-10-07 Thread Sebastian Andrzej Siewior
On 10/07/2013 03:28 PM, Roger Quadros wrote:
 The generic PHY framewrok expects different properties than the
 old USB PHY framework. Supply those properties.
 
 Fixes USB OTG port on GAT04 and N900 after the Generic PHY framework was
 merged in greg/usb-next. [1]

Would it be much pain (and do we want this at all) to add a fallback
into the kernel or at least a printk pointing out to update the .dts
for two releases or so? So the user does not need to spent hours to
figure out why it suddenly stopped working.

Sebastian
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Re: how to trigger function in usb_device_pm_ops

2013-10-07 Thread yoma sophian
hi alan:

2013/10/2 Alan Stern st...@rowland.harvard.edu:
 On Wed, 2 Oct 2013, yoma sophian wrote:

 hi alan:

 2013/10/2 Alan Stern st...@rowland.harvard.edu:
  On Wed, 2 Oct 2013, yoma sophian wrote:
 
  1. in susped, we will gate our ehci clk
  in resumt, we need to release clk gating to let ehci control work.
  and above are platform specific behavior need to do
  there seems no such place to do above 2 things.
 
  You don't do these things in the USB suspend routine; you do them in
  the controller suspend routine.  For example, take a look at
  s5p_ehci_suspend() and s5p_ehci_resume() in ehci-s5p.c.
 I found what you mentioned.
 1. When will platform register dev_pm_ops be called? Is it called
 before or after usb_device_pm_ops ?

 The platform suspend routine is called after the USB suspend routine.
 The platform resume routine is called before the USB resume routine.
I found some driver register
a. platform_driver-suspend/resume
instead of
b. platform_driver-driver-pm-suspend/resume

is there any difference between above a) and b)?



 2. in ehci-s5p.c, it create a .of_match_table.
 Under what circumstance, the match will happen?
 That mean how could I make sure the .pm I register in
 platform_driver will be matched and activated in the feature?

 The of_match_table entry is used during probe.  It matters only for
 drivers that use Open Firmware (i.e., Device Tree).

  2. in ehci_bus_resume, which handle ehci go back from both 
  suspend/hibernate.
  This function handle ehci basic register default setting, such as
  re-init operational registers and restore CMD_RUN, framelist size, and
  irq threshold

 Why don't we put handle basic register default setting, such as
 re-init operational registers and restore CMD_RUN, framelist size, and
 irq threshold as pci_suspend and pci_resume like xhci does?

 Some of those things could indeed be moved from ehci_bus_resume to
 ehci_resume.  Not CMD_RUN, though.

 However, xHCI is fundamentally different from EHCI.  A single xHCI
 controller manages two physically independent buses: a SuperSpeed bus
 and a full/low/high-speed bus.  An EHCI controller, on the other hand,
 manages only one bus.  Therefore the drivers need to be somewhat
 different.
Is that the reason why we register 2 HCDs in xhci driver?
if so, how driver decide to use which hcd when Super/Non-Super speed
devices plug in?


 That mean ehci_bus_resume will handle both usb port resume and
 system hibernate jobs. But xhci_bus_resume only handle usb port
 resume, right?

 No.  ehci_bus_resume and xhci_bus_resume both handle bus resume jobs,
 whereas ehci_resume and xhci_resume both handle controller resume jobs.

 Bus suspend means putting an entire USB bus into low-power mode.  In
 particular, it means the controller should stop sending packets
 (even SOF packets).

 Controller suspend means putting the controller itself into low-power
 mode.

 System sleep (which includes system suspend and system hibernate)
 involves both sorts of job: bus suspend/resume _and_ controller
 suspend/resume.
If we are doing hibernate for example, why we still need to put
bus/controller suspend?
it should be fine if we just reset it and re-initialize it when
hibernate happen.
After all, OS is power down in hibernate, right?

Many thanks for your kind help,
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Re: [PATCH 1/1] ARM: dts: omap3: Adapt USB OTG to generic PHY framework

2013-10-07 Thread Roger Quadros
On 10/07/2013 04:40 PM, Sebastian Andrzej Siewior wrote:
 On 10/07/2013 03:28 PM, Roger Quadros wrote:
 The generic PHY framewrok expects different properties than the
 old USB PHY framework. Supply those properties.

 Fixes USB OTG port on GAT04 and N900 after the Generic PHY framework was
 merged in greg/usb-next. [1]
 
 Would it be much pain (and do we want this at all) to add a fallback
 into the kernel or at least a printk pointing out to update the .dts
 for two releases or so? So the user does not need to spent hours to
 figure out why it suddenly stopped working.
 

I agree with you. 

Also, figuring out which kernel configs to enable for
USB OTG to work on OMAP is a pain in itself to the user.

cheers,
-roger

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Re: how to trigger function in usb_device_pm_ops

2013-10-07 Thread Alan Stern
On Mon, 7 Oct 2013, yoma sophian wrote:

  1. When will platform register dev_pm_ops be called? Is it called
  before or after usb_device_pm_ops ?
 
  The platform suspend routine is called after the USB suspend routine.
  The platform resume routine is called before the USB resume routine.
 I found some driver register
 a. platform_driver-suspend/resume
 instead of
 b. platform_driver-driver-pm-suspend/resume
 
 is there any difference between above a) and b)?

platform_driver-suspend/resume is deprecated.  You should use 
driver-pm-suspend/resume for new code.

  However, xHCI is fundamentally different from EHCI.  A single xHCI
  controller manages two physically independent buses: a SuperSpeed bus
  and a full/low/high-speed bus.  An EHCI controller, on the other hand,
  manages only one bus.  Therefore the drivers need to be somewhat
  different.
 Is that the reason why we register 2 HCDs in xhci driver?

Yes, it is.

 if so, how driver decide to use which hcd when Super/Non-Super speed
 devices plug in?

Simple: When a SuperSpeed device plugs in, the driver uses the 
SuperSpeed hcd.  When a non-SuperSpeed device plugs in, the driver uses 
the non-SuperSpeed hcd.  :-)

 If we are doing hibernate for example, why we still need to put
 bus/controller suspend?
 it should be fine if we just reset it and re-initialize it when
 hibernate happen.
 After all, OS is power down in hibernate, right?

Remember, it's possible that the hibernate transition might fail.  If 
it does fail, we want the controller to return to the same state it had 
before, not to be reset.

Alan Stern

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[PATCH] usb: wusbcore: preserve endianness of cached descriptors

2013-10-07 Thread Thomas Pugliese
Do not overwrite the multi-byte fields of usb_wa_descriptor with their 
cpu format values after reading the descriptor.  Leave the values as 
__le16 and swap on use.  This is more consistent with other uses of USB 
descriptors.

Signed-off-by: Thomas Pugliese thomas.pugli...@gmail.com
---
 drivers/usb/host/hwa-hc.c   |   10 +++---
 drivers/usb/wusbcore/wa-rpipe.c |2 +-
 include/linux/usb/wusb-wa.h |6 +++---
 3 files changed, 7 insertions(+), 11 deletions(-)

diff --git a/drivers/usb/host/hwa-hc.c b/drivers/usb/host/hwa-hc.c
index e58b924..e5fb3cf 100644
--- a/drivers/usb/host/hwa-hc.c
+++ b/drivers/usb/host/hwa-hc.c
@@ -570,14 +570,10 @@ found:
goto error;
}
wa-wa_descr = wa_descr = (struct usb_wa_descriptor *) hdr;
-   /* Make LE fields CPU order */
-   wa_descr-bcdWAVersion = le16_to_cpu(wa_descr-bcdWAVersion);
-   wa_descr-wNumRPipes = le16_to_cpu(wa_descr-wNumRPipes);
-   wa_descr-wRPipeMaxBlock = le16_to_cpu(wa_descr-wRPipeMaxBlock);
-   if (wa_descr-bcdWAVersion  0x0100)
+   if (le16_to_cpu(wa_descr-bcdWAVersion)  0x0100)
dev_warn(dev, Wire Adapter v%d.%d newer than groked v1.0\n,
-wa_descr-bcdWAVersion  0xff00  8,
-wa_descr-bcdWAVersion  0x00ff);
+le16_to_cpu(wa_descr-bcdWAVersion)  0xff00  8,
+le16_to_cpu(wa_descr-bcdWAVersion)  0x00ff);
result = 0;
 error:
return result;
diff --git a/drivers/usb/wusbcore/wa-rpipe.c b/drivers/usb/wusbcore/wa-rpipe.c
index 554b16b..a76e2d9 100644
--- a/drivers/usb/wusbcore/wa-rpipe.c
+++ b/drivers/usb/wusbcore/wa-rpipe.c
@@ -479,7 +479,7 @@ error:
  */
 int wa_rpipes_create(struct wahc *wa)
 {
-   wa-rpipes = wa-wa_descr-wNumRPipes;
+   wa-rpipes = le16_to_cpu(wa-wa_descr-wNumRPipes);
wa-rpipe_bm = kzalloc(BITS_TO_LONGS(wa-rpipes)*sizeof(unsigned long),
   GFP_KERNEL);
if (wa-rpipe_bm == NULL)
diff --git a/include/linux/usb/wusb-wa.h b/include/linux/usb/wusb-wa.h
index 9ae7e29..c125713 100644
--- a/include/linux/usb/wusb-wa.h
+++ b/include/linux/usb/wusb-wa.h
@@ -279,11 +279,11 @@ struct wa_xfer_result {
 struct usb_wa_descriptor {
u8  bLength;
u8  bDescriptorType;
-   u16 bcdWAVersion;
+   __le16  bcdWAVersion;
u8  bNumPorts;  /* don't use!! */
u8  bmAttributes;   /* Reserved == 0 */
-   u16 wNumRPipes;
-   u16 wRPipeMaxBlock;
+   __le16  wNumRPipes;
+   __le16  wRPipeMaxBlock;
u8  bRPipeBlockSize;
u8  bPwrOn2PwrGood;
u8  bNumMMCIEs;
-- 
1.7.10.4

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Re: New USB core API to change interval and max packet size

2013-10-07 Thread Hans de Goede

Hi,

On 10/02/2013 08:39 PM, Sarah Sharp wrote:

On Wed, Oct 02, 2013 at 10:22:52AM -0400, Alan Stern wrote:


snip


We should consider this before rushing into a new API.


Yes, I agree. :)  That's why I'd like to see some cases in the media
drivers code where it could benefit from changing the interval or
maxpacket size, so that we can see what use cases we have.  Mauro, can
you point is to places in drivers that would need this?


Allow me to jump in here. As you may remember I pointed out the media
side of this in the ubs-mini summit during the 2nd plumbers conference
in Portland.

I don't know about any media drivers which want to change interval, but
it make sense that there are those who will want to do that too, esp in
the hid area.

I can give 2 examples who want to change the maxpacketsize in media
land. Both for quite old usb-1 webcam chipsets. The manufacturers of
these chip-sets decided that having X alt-settings was too limiting, so
they have only 2. Alt 0 with no isoc endpoints, and alt 1 with 1 isoc
endpoint with a maxpacketsize of 1023. This means that if these device
somehow end up sharing usb-1 bandwidth with anything else (through
say 1 single tt usb-2 hub) they eat up all the periodic bandwidth, or
try to and fail.

Technically these devices actually have an almost unlimited number of
alt-settings, as they have a register through which the maxpacketsize
they will actually use can be configured.

Since we don't always need the full 1000 (interval 1) * 1023 bytes /
second bandwidth their alt-setting 1 gives us, currently their drivers
employ the following hack:

alt = gspca_dev-dev-actconfig-intf_cache[0]-altsetting[1];
alt-endpoint[0].desc.wMaxPacketSize = cpu_to_le16(packet_size);

Before calling usb_set_interface(), so that they can start streaming
successfully even though the full usb-1 bandwidth which their alt1
descriptor claims it needs is not available, at least on ohci and ehci
this hack has that result, not sure if it works for xhci too (I can test
if people are interested).

For people who want to actually see the code for this admittedly ugly
hack, see:

drivers/media/usb/gspca/xirlink_cit.c

and:

drivers/media/usb/gspca/stv06xx/stv06xx.c

Note that their are several other chipsets which have a maxpacketsize
register too. But their descriptors do properly contain multiple
alt-settings with different maxpacketsizes (for the benefit of the OS
I assume), so all we do their is simply write the current wMaxPacketSize
to the register see ie: drivers/media/usb/gspca/ov519.c at line 3500 ,
technically we could use the discussed functionality there too, to do
finer grained bandwidth management but I don't really see a need for this.




In particular, do we want to go around changing single endpoints, one
at a time?  Or do we want to change all the endpoints in an interface
at once?

Given that a change to one endpoint may require the entire schedule to
be recomputed, it seems to make more sense to do all of them at once.
For example, drivers could call a routine to set the desired endpoint
parameters, and then the new parameters could take effect when the
driver calls usb_set_interface().


I think it makes sense to change several endpoints, and then ask the
host to recompute the schedule.  Perhaps the driver could issue several
calls to usb_change_ep_bandwidth and then ask the USB core to update the
host's schedule?

I'm not sure that usb_set_interface() is the right function for the new
parameters to take effect.  What if the driver is trying to modify the
current alt setting?  Would they need to call usb_set_interface() again?


What the 2 media drivers in question currently do is:

1) Determine an optimal wMaxPacketSize for the resolution + framerate
userspace has selected (so one where we can actually reach the framerate
with no framedrop or image degradation due to over aggressive compression).
Also determine a minimum wMaxPacketSize, below which streaming simply
won't work reliabe, even with frame drop, etc.
2) Put the wMaxPacketSize in the intf_cache for the alt1 alt-setting
3) Try a usb_set_interface(dev, iface, 1)
4) If 3). fails, reduce wMaxPacketSize in the intf_cache for the alt1 
alt-setting
by 100 bytes, until we hit the minimum, then goto 3, or bail if the last
try was with the minimum already.

They are basically doing the same as other webcam drivers, except that
other drivers determine an optimal and minimum alt-setting with which
to work and then try set_interface with alt-settings with decreasing
wMaxPacketSize, where as these drivers keep retrying with the same
alt-setting, while changing the wMaxPacketSize of that alt-setting.

So from a media (specifically webcam driver) pov, the suggested approach
of first calling usb_change_ep_bandwidth 1 or more times, and then calling
usb_set_interface makes a lot of sense.

Note that in the hid case however where we are likely talking about
cases where the descriptors say something stupid like poll this mouse
8000 

[PATCH 2/2] xhci: fix last valid endpoint when dropping an endpoint

2013-10-07 Thread Xenia Ragiadakou
The previous patch on the endpoint reset uses the already implemented function
xhci_drop_endpoint() to reduce code duplication. However, the way that xhci
updates the last valid endpoint in the Input Slot Context, when an endpoint
is dropped, can lead to incosistent value for the last valid endpoint.
That can happen when the endpoint to be reset has index smaller than the
current last valid endpoint. In that case the last valid endpoint will end up
being updated with a smaller value and if there are valid endpoints with index
higher than the index of the reset endpoint, the xHC will consider them as
invalid and the transactions to these endpoints will break.

This patch updates the last valid endpoint with the index of the first not
disabled endpoint, starting from the current last valid endpoint and skipping
the dropped endpoint.

Signed-off-by: Xenia Ragiadakou burzalod...@gmail.com
---
 drivers/usb/host/xhci.c | 22 +++---
 1 file changed, 15 insertions(+), 7 deletions(-)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index e6300b5..97670f5 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -1547,7 +1547,7 @@ int xhci_drop_endpoint(struct usb_hcd *hcd, struct 
usb_device *udev,
struct xhci_container_ctx *in_ctx, *out_ctx;
struct xhci_input_control_ctx *ctrl_ctx;
struct xhci_slot_ctx *slot_ctx;
-   unsigned int last_ctx;
+   unsigned int last_ep_index;
unsigned int ep_index;
struct xhci_ep_ctx *ep_ctx;
u32 drop_flag;
@@ -1598,13 +1598,21 @@ int xhci_drop_endpoint(struct usb_hcd *hcd, struct 
usb_device *udev,
ctrl_ctx-add_flags = cpu_to_le32(~drop_flag);
new_add_flags = le32_to_cpu(ctrl_ctx-add_flags);
 
-   last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx-add_flags));
+   slot_ctx = xhci_get_slot_ctx(xhci, out_ctx);
+   last_ep_index = LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx-dev_info));
slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
-   /* Update the last valid endpoint context, if we deleted the last one */
-   if ((le32_to_cpu(slot_ctx-dev_info)  LAST_CTX_MASK) 
-   LAST_CTX(last_ctx)) {
-   slot_ctx-dev_info = cpu_to_le32(~LAST_CTX_MASK);
-   slot_ctx-dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
+   for (; last_ep_index = 0; --last_ep_index) {
+   /* skip the dropped endpoint's index */
+   if (last_ep_index == ep_index)
+   continue;
+   ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, last_ep_index);
+   if ((ep_ctx-ep_info  cpu_to_le32(EP_STATE_MASK)) !=
+   cpu_to_le32(EP_STATE_DISABLED)) {
+   slot_ctx-dev_info = cpu_to_le32(~LAST_CTX_MASK);
+   slot_ctx-dev_info |=
+   cpu_to_le32(LAST_CTX(last_ep_index + 1));
+   break;
+   }
}
new_slot_info = le32_to_cpu(slot_ctx-dev_info);
 
-- 
1.8.3.4

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[PATCH 1/2] xhci: fix reset for not halted endpoints

2013-10-07 Thread Xenia Ragiadakou
If a Reset Endpoint command is issued for an endpoint that is not in
the Halted state, xHC does nothing. Since the current implementation of
xhci_endpoint_reset() aborts any resets that address not halted endpoints,
the synchronization between the host-side and device-side toggle or sequence
number is lost.
This patch attempts to fix this issue by dropping and readding the endpoint
in order to enforce xHC to reset its internal toggle/sequence number.

Four new functions have been introduced to prevent xhci_endpoint_reset() from
becoming huge.

xhci_unlink_urbs(xhci, ring):
unlinks the urbs from the endpoint's rings

xhci_stop_endpoint_for_config(xhci, udev, ep index):
brings the endpoint to the Stopped state and calls xhci_unlink_urbs
to unlink any queued urbs

xhci_reset_ep0(xhci, udev, ep):
calls xhci_stop_endpoint_for_config to stop the endpoint and then
reinitializes the ring and input context for the default control
endpoint and issues an Evaluate Context command to reset xHC toggle

xhci_reset_not_halted_ep(xhci, udev, ep):
calls xhci_stop_endpoint_for_config and if the endpoint to be reset is
the endpoint 0 calls xhci_reset_ep0, otherwise reinitializes the
endpoint rings and input context and then drops and readds the endpoint
issueing a Configure Endpoint

Also, this patch introduces a new trace event for debugging output contexts
during the process of resetting the endpoint. At this early stage, it is
useful for debugging the xhci_reset_not_halted_ep() and it may be removed
later when further testing and revisioning show that the function works as
expected.

Signed-off-by: Xenia Ragiadakou burzalod...@gmail.com
---

This patch needs to be tested further because I did not find a satisfying
way to test it. I would appreciate if the device driver writers that had
problems with the xhci reset endpoint in the past could test it and let me
know if it fixes the problem or not.

 drivers/usb/host/xhci-ring.c  |  17 +++-
 drivers/usb/host/xhci-trace.h |   6 ++
 drivers/usb/host/xhci.c   | 210 +-
 drivers/usb/host/xhci.h   |   3 +
 4 files changed, 233 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index faff6fc..f62131b 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -433,6 +433,10 @@ static void ring_doorbell_for_active_rings(struct xhci_hcd 
*xhci,
 
ep = xhci-devs[slot_id]-eps[ep_index];
 
+   /* If there is a pending configuration, don't ring the doorbell yet */
+   if (ep-ep_state  EP_CONFIG_PENDING)
+   return;
+
/* A ring has pending URBs if its TD list is not empty */
if (!(ep-ep_state  EP_HAS_STREAMS)) {
if (ep-ring  !(list_empty(ep-ring-td_list)))
@@ -715,8 +719,8 @@ static void xhci_stop_watchdog_timer_in_irq(struct xhci_hcd 
*xhci,
 }
 
 /* Must be called with xhci-lock held in interrupt context */
-static void xhci_giveback_urb_in_irq(struct xhci_hcd *xhci,
-   struct xhci_td *cur_td, int status)
+void xhci_giveback_urb_in_irq(struct xhci_hcd *xhci, struct xhci_td *cur_td,
+   int status)
 {
struct usb_hcd *hcd;
struct urb  *urb;
@@ -788,6 +792,8 @@ static void xhci_handle_cmd_stop_ep(struct xhci_hcd *xhci, 
int slot_id,
xhci_stop_watchdog_timer_in_irq(xhci, ep);
ep-stopped_td = NULL;
ep-stopped_trb = NULL;
+   if (ep-ep_state  EP_CONFIG_PENDING)
+   goto signal_completion;
ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
return;
}
@@ -881,6 +887,13 @@ remove_finished_td:
return;
} while (cur_td != last_unlinked_td);
 
+signal_completion:
+   /* signal the completion for the Stop Endpoint command */
+   if (ep-ep_state  EP_CONFIG_PENDING) {
+   virt_dev = xhci-devs[slot_id];
+   handle_cmd_in_cmd_wait_list(xhci, virt_dev, event);
+   }
+
/* Return to the event handler with xhci-lock re-acquired */
 }
 
diff --git a/drivers/usb/host/xhci-trace.h b/drivers/usb/host/xhci-trace.h
index 132abda..1f8b3fb 100644
--- a/drivers/usb/host/xhci-trace.h
+++ b/drivers/usb/host/xhci-trace.h
@@ -113,6 +113,12 @@ DEFINE_EVENT(xhci_log_ctx, xhci_address_ctx,
TP_ARGS(xhci, ctx, ep_num)
 );
 
+DEFINE_EVENT(xhci_log_ctx, xhci_resetep_ctx,
+   TP_PROTO(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx,
+unsigned int ep_num),
+   TP_ARGS(xhci, ctx, ep_num)
+);
+
 DECLARE_EVENT_CLASS(xhci_log_event,
TP_PROTO(void *trb_va, struct xhci_generic_trb *ev),
TP_ARGS(trb_va, ev),
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 9f22ddf..e6300b5 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -2873,6 +2873,210 @@ void 

[PATCH] usb: wusbcore: serialize access to the HWA data out endpoint

2013-10-07 Thread Thomas Pugliese
This patch serializes access to the HWA data transfer out (DTO) 
endpoint.  This prevents a situation where two transfer requests being 
sent concurrently to separate downstream endpoints could interleave 
their transfer request and transfer data packets causing data 
corruption.  The transfer processing code will now attempt to acquire 
the DTO resource before sending a transfer to the HWA.  If it cannot 
acquire the resource, the RPIPE that the transfer is assigned to will 
be placed on a waiting list.  When the DTO resource is released, the 
actor releasing the resource will serivce the RPIPEs that are waiting.

Signed-off-by: Thomas Pugliese thomas.pugli...@gmail.com
---
 drivers/usb/wusbcore/wa-hc.h|   10 ++-
 drivers/usb/wusbcore/wa-rpipe.c |9 ++-
 drivers/usb/wusbcore/wa-xfer.c  |  154 +++
 3 files changed, 152 insertions(+), 21 deletions(-)

diff --git a/drivers/usb/wusbcore/wa-hc.h b/drivers/usb/wusbcore/wa-hc.h
index b44aca3..41afaa6 100644
--- a/drivers/usb/wusbcore/wa-hc.h
+++ b/drivers/usb/wusbcore/wa-hc.h
@@ -117,6 +117,7 @@ struct wa_rpipe {
struct wahc *wa;
spinlock_t seg_lock;
struct list_head seg_list;
+   struct list_head list_node;
atomic_t segs_available;
u8 buffer[1];   /* For reads/writes on USB */
 };
@@ -183,7 +184,8 @@ struct wahc {
 
u16 rpipes;
unsigned long *rpipe_bm;/* rpipe usage bitmap */
-   spinlock_t rpipe_bm_lock;   /* protect rpipe_bm */
+   struct list_head rpipe_delayed_list;/* delayed RPIPES. */
+   spinlock_t rpipe_lock;  /* protect rpipe_bm and delayed list */
struct mutex rpipe_mutex;   /* assigning resources to endpoints */
 
/*
@@ -201,6 +203,8 @@ struct wahc {
void *dti_buf;
size_t dti_buf_size;
 
+   unsigned long dto_in_use;   /* protect dto endoint serialization. */
+
s32 status; /* For reading status */
 
struct list_head xfer_list;
@@ -253,7 +257,8 @@ static inline void wa_nep_disarm(struct wahc *wa)
 /* RPipes */
 static inline void wa_rpipe_init(struct wahc *wa)
 {
-   spin_lock_init(wa-rpipe_bm_lock);
+   INIT_LIST_HEAD(wa-rpipe_delayed_list);
+   spin_lock_init(wa-rpipe_lock);
mutex_init(wa-rpipe_mutex);
 }
 
@@ -270,6 +275,7 @@ static inline void wa_init(struct wahc *wa)
spin_lock_init(wa-xfer_list_lock);
INIT_WORK(wa-xfer_enqueue_work, wa_urb_enqueue_run);
INIT_WORK(wa-xfer_error_work, wa_process_errored_transfers_run);
+   wa-dto_in_use = 0;
atomic_set(wa-xfer_id_count, 1);
 }
 
diff --git a/drivers/usb/wusbcore/wa-rpipe.c b/drivers/usb/wusbcore/wa-rpipe.c
index a76e2d9..1ed068a 100644
--- a/drivers/usb/wusbcore/wa-rpipe.c
+++ b/drivers/usb/wusbcore/wa-rpipe.c
@@ -143,17 +143,18 @@ static void rpipe_init(struct wa_rpipe *rpipe)
kref_init(rpipe-refcnt);
spin_lock_init(rpipe-seg_lock);
INIT_LIST_HEAD(rpipe-seg_list);
+   INIT_LIST_HEAD(rpipe-list_node);
 }
 
 static unsigned rpipe_get_idx(struct wahc *wa, unsigned rpipe_idx)
 {
unsigned long flags;
 
-   spin_lock_irqsave(wa-rpipe_bm_lock, flags);
+   spin_lock_irqsave(wa-rpipe_lock, flags);
rpipe_idx = find_next_zero_bit(wa-rpipe_bm, wa-rpipes, rpipe_idx);
if (rpipe_idx  wa-rpipes)
set_bit(rpipe_idx, wa-rpipe_bm);
-   spin_unlock_irqrestore(wa-rpipe_bm_lock, flags);
+   spin_unlock_irqrestore(wa-rpipe_lock, flags);
 
return rpipe_idx;
 }
@@ -162,9 +163,9 @@ static void rpipe_put_idx(struct wahc *wa, unsigned 
rpipe_idx)
 {
unsigned long flags;
 
-   spin_lock_irqsave(wa-rpipe_bm_lock, flags);
+   spin_lock_irqsave(wa-rpipe_lock, flags);
clear_bit(rpipe_idx, wa-rpipe_bm);
-   spin_unlock_irqrestore(wa-rpipe_bm_lock, flags);
+   spin_unlock_irqrestore(wa-rpipe_lock, flags);
 }
 
 void rpipe_destroy(struct kref *_rpipe)
diff --git a/drivers/usb/wusbcore/wa-xfer.c b/drivers/usb/wusbcore/wa-xfer.c
index 2dba8b6..2bc6c80 100644
--- a/drivers/usb/wusbcore/wa-xfer.c
+++ b/drivers/usb/wusbcore/wa-xfer.c
@@ -107,6 +107,7 @@ enum wa_seg_status {
 };
 
 static void wa_xfer_delayed_run(struct wa_rpipe *);
+static int __wa_xfer_delayed_run(struct wa_rpipe *rpipe, int *dto_waiting);
 
 /*
  * Life cycle governed by 'struct urb' (the refcount of the struct is
@@ -204,6 +205,59 @@ static void wa_xfer_put(struct wa_xfer *xfer)
 }
 
 /*
+ * Try to get exclusive access to the DTO endpoint resource.  Return true
+ * if successful.
+ */
+static inline int __wa_dto_try_get(struct wahc *wa)
+{
+   return (test_and_set_bit(0, wa-dto_in_use) == 0);
+}
+
+/* Release the DTO endpoint resource. */
+static inline void __wa_dto_put(struct wahc *wa)
+{
+   clear_bit_unlock(0, wa-dto_in_use);
+}
+
+/* Service RPIPEs that are waiting on the DTO resource. */
+static void wa_check_for_delayed_rpipes(struct wahc *wa)
+{
+   unsigned long 

Re: [PATCH v5 11/15] usb/gadget: f_mass_storage: convert to new function interface with backward compatibility

2013-10-07 Thread Michal Nazarewicz
On Thu, Oct 03 2013, Andrzej Pietrasiewicz wrote:
 Converting mass storage to the new function interface requires converting
 the USB mass storage's function code and its users.
 This patch converts the f_mass_storage.c to the new function interface.
 The file is now compiled into a separate usb_f_mass_storage.ko module.
 The old function interface is provided by means of a preprocessor conditional
 directives. After all users are converted, the old interface can be removed.

 Signed-off-by: Andrzej Pietrasiewicz andrze...@samsung.com
 Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com

Acked-by: Michal Nazarewicz min...@mina86.com

 diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
 index d90a0b0..4a86b0c 100644
 --- a/drivers/usb/gadget/Makefile
 +++ b/drivers/usb/gadget/Makefile
 @@ -2627,11 +2628,17 @@ void fsg_common_get(struct fsg_common *common)
  {
   kref_get(common-ref);
  }
 +#ifndef USB_FMS_INCLUDED
 +EXPORT_SYMBOL(fsg_common_get);
 +#endif

Perhaps instead of checking it each time, define
a EXPORT_SYMBOL_GPL_IF_MODULE macro and when the macro is defined
provide a comment explaining why it is here?

  
  void fsg_common_put(struct fsg_common *common)
  {
   kref_put(common-ref, fsg_common_release);
  }
 +#ifndef USB_FMS_INCLUDED
 +EXPORT_SYMBOL(fsg_common_put);
 +#endif
  
  /* check if fsg_num_buffers is within a valid range */
  static inline int fsg_num_buffers_validate(unsigned int fsg_num_buffers)
  int fsg_common_set_nluns(struct fsg_common *common, int nluns)
  {

 @@ -3146,6 +3186,21 @@ static int fsg_bind(struct usb_configuration *c, 
 struct usb_function *f)
   unsignedmax_burst;
   int ret;
  
 +#ifndef USB_FMS_INCLUDED
 + struct fsg_opts *opts;
 + opts = container_of(f-fi, struct fsg_opts, func_inst);
 + if (!opts-no_configfs) {
 + ret = fsg_common_set_cdev(fsg-common, c-cdev,
 +   fsg-common-can_stall);
 + if (ret)
 + return ret;
 + fsg_common_set_inquiry_string(fsg-common, 0, 0);
 + ret = fsg_common_run_thread(fsg-common);
 + if (ret)
 + return ret;
 + }
 +#endif
 +
   fsg-gadget = gadget;
  
   /* New interface */
 @@ -3197,7 +3252,27 @@ autoconf_fail:
   return -ENOTSUPP;
  }
  
 -/** ADD FUNCTION **/
 +/** ALLOCATE FUNCTION */
 +
 +#ifdef USB_FMS_INCLUDED
 +
 +static void old_fsg_unbind(struct usb_configuration *c, struct usb_function 
 *f)

Perhaps __deprecated?  Also, why name change?

 +{
 + struct fsg_dev  *fsg = fsg_from_func(f);
 + struct fsg_common   *common = fsg-common;
 +
 + DBG(fsg, unbind\n);
 + if (fsg-common-fsg == fsg) {
 + fsg-common-new_fsg = NULL;
 + raise_exception(fsg-common, FSG_STATE_CONFIG_CHANGE);
 + /* FIXME: make interruptible or killable somehow? */
 + wait_event(common-fsg_wait, common-fsg != fsg);
 + }
 +
 + fsg_common_put(common);
 + usb_free_all_descriptors(fsg-function);
 + kfree(fsg);
 +}
  
  static int fsg_bind_config(struct usb_composite_dev *cdev,
  struct usb_configuration *c,

 @@ -3234,6 +3309,111 @@ static int fsg_bind_config(struct usb_composite_dev 
 *cdev,
   return rc;
  }
  
 +#else
 +
 +static void fsg_free_inst(struct usb_function_instance *fi)
 +{
 + struct fsg_opts *opts;
 +
 + opts = container_of(fi, struct fsg_opts, func_inst);
 + fsg_common_put(opts-common);
 + kfree(opts);
 +}
 +
 +static struct usb_function_instance *fsg_alloc_inst(void)
 +{
 + struct fsg_opts *opts;
 + int ret;

Perhaps call it “rc”, since technically it's not return value from the
function.

 +
 + opts = kzalloc(sizeof(*opts), GFP_KERNEL);
 + if (!opts)
 + return ERR_PTR(-ENOMEM);
 + opts-func_inst.free_func_inst = fsg_free_inst;
 + opts-common = fsg_common_setup(opts-common, false);
 + if (IS_ERR(opts-common)) {
 + ret = PTR_ERR(opts-common);
 + goto release_opts;
 + }
 + ret = fsg_common_set_nluns(opts-common, FSG_MAX_LUNS);
 + if (ret)
 + goto release_opts;
 +
 + ret = fsg_common_set_num_buffers(opts-common,
 +  CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS);
 + if (ret)
 + goto release_luns;
 +
 + pr_info(FSG_DRIVER_DESC , version:  FSG_DRIVER_VERSION \n);
 +
 + return opts-func_inst;
 +
 +release_luns:
 + kfree(opts-common-luns);
 +release_opts:
 + kfree(opts);
 + return ERR_PTR(ret);
 +}


 +static void fsg_unbind(struct usb_configuration *c, struct usb_function *f)
 +{
 + struct fsg_dev  *fsg = fsg_from_func(f);
 + struct fsg_common   *common = fsg-common;
 +
 + DBG(fsg, unbind\n);
 +

[PATCH] HID: logitech - lg2ff: Add IDs for Formula Vibration Feedback Wheel

2013-10-07 Thread Anssi Hannula
From: Elias Vanderstuyft elias@gmail.com

Add USB IDs for Logitech Formula Vibration Feedback Wheel (046d:ca04).

The lg2ff force feedback subdriver is used for vibration and
HID_GD_MULTIAXIS is set to avoid deadzone like other Logitech wheels.

Kconfig description etc are also updated accordingly.

Signed-off-by: Elias Vanderstuyft elias@gmail.com
[anssi.hann...@iki.fi: added description and CCs]
Signed-off-by: Anssi Hannula anssi.hann...@iki.fi
Cc: Simon Wood si...@mungewell.org
Cc: sta...@vger.kernel.org
---

Simon, does this look OK to you, or do you think it should be an lg4ff
device? Though I guess lg2ff is better than nothing even in that case.

Jiri, lets see if we get a comment from Simon before applying.

I added CC to stable since it is just ID additions (plus description
stuff), but feel free to drop that if you think it is not appropriate.


 drivers/hid/Kconfig | 8 +---
 drivers/hid/hid-core.c  | 1 +
 drivers/hid/hid-ids.h   | 1 +
 drivers/hid/hid-lg.c| 3 +++
 drivers/hid/hid-lg2ff.c | 2 +-
 5 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/hid/Kconfig b/drivers/hid/Kconfig
index 71b70e3..42c2a8b 100644
--- a/drivers/hid/Kconfig
+++ b/drivers/hid/Kconfig
@@ -368,12 +368,14 @@ config LOGITECH_FF
  force feedback.
 
 config LOGIRUMBLEPAD2_FF
-   bool Logitech RumblePad/Rumblepad 2 force feedback support
+   bool Logitech force feedback support (variant 2)
depends on HID_LOGITECH
select INPUT_FF_MEMLESS
help
- Say Y here if you want to enable force feedback support for Logitech
- RumblePad and Rumblepad 2 devices.
+ Say Y here if you want to enable force feedback support for:
+ - Logitech RumblePad
+ - Logitech Rumblepad 2
+ - Logitech Formula Vibration Feedback Wheel
 
 config LOGIG940_FF
bool Logitech Flight System G940 force feedback support
diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c
index b8470b1..037915f 100644
--- a/drivers/hid/hid-core.c
+++ b/drivers/hid/hid-core.c
@@ -1752,6 +1752,7 @@ static const struct hid_device_id 
hid_have_special_driver[] = {
{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 
USB_DEVICE_ID_LOGITECH_FLIGHT_SYSTEM_G940) },
{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 
USB_DEVICE_ID_LOGITECH_MOMO_WHEEL) },
{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 
USB_DEVICE_ID_LOGITECH_MOMO_WHEEL2) },
+   { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 
USB_DEVICE_ID_LOGITECH_VIBRATION_WHEEL) },
{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 
USB_DEVICE_ID_LOGITECH_DFP_WHEEL) },
{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 
USB_DEVICE_ID_LOGITECH_DFGT_WHEEL) },
{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 
USB_DEVICE_ID_LOGITECH_G25_WHEEL) },
diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
index e60e8d5..0ff958b 100644
--- a/drivers/hid/hid-ids.h
+++ b/drivers/hid/hid-ids.h
@@ -570,6 +570,7 @@
 #define USB_DEVICE_ID_DINOVO_EDGE  0xc714
 #define USB_DEVICE_ID_DINOVO_MINI  0xc71f
 #define USB_DEVICE_ID_LOGITECH_MOMO_WHEEL2 0xca03
+#define USB_DEVICE_ID_LOGITECH_VIBRATION_WHEEL 0xca04
 
 #define USB_VENDOR_ID_LUMIO0x202e
 #define USB_DEVICE_ID_CRYSTALTOUCH 0x0006
diff --git a/drivers/hid/hid-lg.c b/drivers/hid/hid-lg.c
index 6f12ecd..c2c7dab 100644
--- a/drivers/hid/hid-lg.c
+++ b/drivers/hid/hid-lg.c
@@ -492,6 +492,7 @@ static int lg_input_mapped(struct hid_device *hdev, struct 
hid_input *hi,
case USB_DEVICE_ID_LOGITECH_G27_WHEEL:
case USB_DEVICE_ID_LOGITECH_WII_WHEEL:
case USB_DEVICE_ID_LOGITECH_MOMO_WHEEL2:
+   case USB_DEVICE_ID_LOGITECH_VIBRATION_WHEEL:
field-application = HID_GD_MULTIAXIS;
break;
default:
@@ -639,6 +640,8 @@ static const struct hid_device_id lg_devices[] = {
.driver_data = LG_NOGET | LG_FF4 },
{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 
USB_DEVICE_ID_LOGITECH_MOMO_WHEEL2),
.driver_data = LG_FF4 },
+   { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 
USB_DEVICE_ID_LOGITECH_VIBRATION_WHEEL),
+   .driver_data = LG_FF2 },
{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 
USB_DEVICE_ID_LOGITECH_G25_WHEEL),
.driver_data = LG_FF4 },
{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 
USB_DEVICE_ID_LOGITECH_DFGT_WHEEL),
diff --git a/drivers/hid/hid-lg2ff.c b/drivers/hid/hid-lg2ff.c
index 1a42eaa..0e3fb1a 100644
--- a/drivers/hid/hid-lg2ff.c
+++ b/drivers/hid/hid-lg2ff.c
@@ -95,7 +95,7 @@ int lg2ff_init(struct hid_device *hid)
 
hid_hw_request(hid, report, HID_REQ_SET_REPORT);
 
-   hid_info(hid, Force feedback for Logitech RumblePad/Rumblepad 2 by 
Anssi Hannula anssi.hann...@gmail.com\n);
+   hid_info(hid, Force feedback for Logitech variant 2 rumble devices by 
Anssi Hannula anssi.hann...@gmail.com\n);
 
return 0;
 }
-- 
1.8.1.5

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Re: [PATCH] HID: logitech - lg2ff: Add IDs for Formula Vibration Feedback Wheel

2013-10-07 Thread Anssi Hannula
07.10.2013 20:48, si...@mungewell.org kirjoitti:
 From: Elias Vanderstuyft elias@gmail.com

 Add USB IDs for Logitech Formula Vibration Feedback Wheel (046d:ca04).

 The lg2ff force feedback subdriver is used for vibration and
 HID_GD_MULTIAXIS is set to avoid deadzone like other Logitech wheels.

 Kconfig description etc are also updated accordingly.

 Signed-off-by: Elias Vanderstuyft elias@gmail.com
 [anssi.hann...@iki.fi: added description and CCs]
 Signed-off-by: Anssi Hannula anssi.hann...@iki.fi
 Cc: Simon Wood si...@mungewell.org
 Cc: sta...@vger.kernel.org
 ---

 Simon, does this look OK to you, or do you think it should be an lg4ff
 device? Though I guess lg2ff is better than nothing even in that case.

 Jiri, lets see if we get a comment from Simon before applying.

 
 I've cc'ed Michal as he contributed a lot to lg4ff and is looking at
 improving ff-memless.
 
 I am unfamiliar with this wheel (180' rotation, bungee cord for autocenter
 and rumble motors - or so google tells me...), it's not listed on
 Wikipedia (hint, hint):
 http://en.wikipedia.org/wiki/Racing_wheel
 
 At present lg4ff does not support RUMBLE effects (only CONSTANT and
 AUTOCENTER), so lg2ff seems a sensible place. The only minor concern I
 would have is any confusion from the descriptions in Kconfig.
 
 I didn't build, but think that the patch looks OK to commit.
 
 For the other wheels we have re-written the HID descriptors to split
 brake/accel into seperate axis. Do you know whether this is possible for
 this wheel too?

Elias noted earlier that it is configurable in Windows at least, so that
might be the case. We didn't look at the HID descriptors, though, but
feel free to work with him to see if it is possible :)

 Thanks for your patch,
 Simon.
 
 Signed-off-by: Simon Wood si...@mungewell.org

-- 
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[PATCH v2 0/5] usb: xhci: change default enumeration scheme and trivial cleanups

2013-10-07 Thread Dan Williams
Changes since v1 [1]:
1/ Patch 4: updated after testing (discussed here [2]) to disable new
   scheme enumeration for usb3 devices

2/ Patch 4: cleaned up a compile warning

3/ Patch 5: [new] when debugging it is nice to know if the failed command
   was a context setup address device BSR=1 or an address setup
   address device BSR=0

4/ Patch 1, 2, 3: unchanged

[1]: http://marc.info/?l=linux-usbm=137997896602457w=2
[2]: http://marc.info/?l=linux-usbm=138074667626129w=2

This Set is against usb-next as of cccd3a25 usb: wusbcore: fix build warning
on 64-bit builds

---

Dan Williams (5):
  usb: hub_activate kill an 'else'
  usb: xhci: kill a conditional when toggling cycle
  usb: xhci: remove the unused -address field
  usb: xhci: change enumeration scheme to 'new scheme' by default
  usb: xhci: clarify logging in xhci_setup_device


 drivers/usb/core/hub.c   |   54 +-
 drivers/usb/host/xhci-pci.c  |1 +
 drivers/usb/host/xhci-plat.c |1 +
 drivers/usb/host/xhci-ring.c |8 +++---
 drivers/usb/host/xhci.c  |   51 +++-
 drivers/usb/host/xhci.h  |   13 --
 include/linux/usb/hcd.h  |2 ++
 7 files changed, 90 insertions(+), 40 deletions(-)
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[PATCH v2 2/5] usb: xhci: kill a conditional when toggling cycle

2013-10-07 Thread Dan Williams
Perform an unconditional toggle of the cycle bit with 'xor'.

Signed-off-by: Dan Williams dan.j.willi...@intel.com
---

No change since v1

 drivers/usb/host/xhci-ring.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 6bfbd80ec2b9..46d7fb8de990 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -178,7 +178,7 @@ static void inc_deq(struct xhci_hcd *xhci, struct xhci_ring 
*ring)
if (ring-type == TYPE_EVENT 
last_trb_on_last_seg(xhci, ring,
ring-deq_seg, ring-dequeue)) {
-   ring-cycle_state = (ring-cycle_state ? 0 : 1);
+   ring-cycle_state ^= 1;
}
ring-deq_seg = ring-deq_seg-next;
ring-dequeue = ring-deq_seg-trbs;

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[PATCH v2 1/5] usb: hub_activate kill an 'else'

2013-10-07 Thread Dan Williams
Remove a few extra lines and make it clear that all implementations
disable the port by sharing the same line of code.

Acked-by: Alan Stern st...@rowland.harvard.edu
Signed-off-by: Dan Williams dan.j.willi...@intel.com
---

No change since v1

 drivers/usb/core/hub.c |   11 ---
 1 files changed, 4 insertions(+), 7 deletions(-)

diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index 2159f820b159..c2c5f5adb464 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -1112,16 +1112,13 @@ static void hub_activate(struct usb_hub *hub, enum 
hub_activation_type type)
/*
 * USB3 protocol ports will automatically transition
 * to Enabled state when detect an USB3.0 device attach.
-* Do not disable USB3 protocol ports.
+* Do not disable USB3 protocol ports, just pretend
+* power was lost
 */
-   if (!hub_is_superspeed(hdev)) {
+   portstatus = ~USB_PORT_STAT_ENABLE;
+   if (!hub_is_superspeed(hdev))
usb_clear_port_feature(hdev, port1,
   USB_PORT_FEAT_ENABLE);
-   portstatus = ~USB_PORT_STAT_ENABLE;
-   } else {
-   /* Pretend that power was lost for USB3 devs */
-   portstatus = ~USB_PORT_STAT_ENABLE;
-   }
}
 
/* Clear status-change flags; we'll debounce later */

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[PATCH v2 3/5] usb: xhci: remove the unused -address field

2013-10-07 Thread Dan Williams
Only used for debug output, so we don't need to save it.

Signed-off-by: Dan Williams dan.j.willi...@intel.com
---

No change since v1

 drivers/usb/host/xhci.c |   10 ++
 drivers/usb/host/xhci.h |2 --
 2 files changed, 2 insertions(+), 10 deletions(-)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 1e36dbb48366..d05ff362ddc7 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -3709,9 +3709,6 @@ disable_slot:
  * the device).
  * We should be protected by the usb_address0_mutex in khubd's hub_port_init, 
so
  * we should only issue and wait on one address command at the same time.
- *
- * We add one to the device address issued by the hardware because the USB core
- * uses address 1 for the root hubs (even though they're not really devices).
  */
 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
 {
@@ -3856,16 +3853,13 @@ int xhci_address_device(struct usb_hcd *hcd, struct 
usb_device *udev)
slot_ctx = xhci_get_slot_ctx(xhci, virt_dev-out_ctx);
trace_xhci_address_ctx(xhci, virt_dev-out_ctx,
slot_ctx-dev_info  27);
-   /* Use kernel assigned address for devices; store xHC assigned
-* address locally. */
-   virt_dev-address = (le32_to_cpu(slot_ctx-dev_state)  DEV_ADDR_MASK)
-   + 1;
/* Zero the input context control for later use */
ctrl_ctx-add_flags = 0;
ctrl_ctx-drop_flags = 0;
 
xhci_dbg_trace(xhci, trace_xhci_dbg_address,
-   Internal device address = %d, virt_dev-address);
+  Internal device address = %d,
+  le32_to_cpu(slot_ctx-dev_state)  DEV_ADDR_MASK);
 
return 0;
 }
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 289fbfbae746..5f9dc1c1b538 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -934,8 +934,6 @@ struct xhci_virt_device {
/* Rings saved to ensure old alt settings can be re-instated */
struct xhci_ring**ring_cache;
int num_rings_cached;
-   /* Store xHC assigned device address */
-   int address;
 #defineXHCI_MAX_RINGS_CACHED   31
struct xhci_virt_ep eps[31];
struct completion   cmd_completion;

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modeswitch? LTE vodafone K5150 (hilink) 12d1 1f16 ; 12d1 1575 cdc_ether

2013-10-07 Thread Thomas Schäfer
Hi,

The vodafone K5150 is a LTE device, default is hilink mode.
This works under Linux 3.7 in the same way as it under windows vista does.

[ 248.255172] usb 1-1: new high-speed USB device number 3 using ehci_hcd
[ 248.518600] usb 1-1: New USB device found, idVendor=12d1, idProduct=1f16
[ 248.518621] usb 1-1: New USB device strings: Mfr=5, Product=4, 
SerialNumber=7
[ 248.518635] usb 1-1: Product: K5150
[ 248.518647] usb 1-1: Manufacturer: Vodafone (Huawei)
[ 248.518658] usb 1-1: SerialNumber: 
[ 248.568343] Initializing USB Mass Storage driver...
[ 248.569941] scsi4 : usb-storage 1-1:1.0
[ 248.570636] usbcore: registered new interface driver usb-storage
[ 248.570646] USB Mass Storage support registered.
[ 248.711564] usb 1-1: USB disconnect, device number 3
[ 249.215161] usb 1-1: new high-speed USB device number 4 using ehci_hcd
[ 249.411707] usb 1-1: New USB device found, idVendor=12d1, idProduct=1575
[ 249.411722] usb 1-1: New USB device strings: Mfr=5, Product=4, 
SerialNumber=0
[ 249.411732] usb 1-1: Product: K5150
[ 249.411741] usb 1-1: Manufacturer: Vodafone (Huawei)
[ 249.494478] cdc_ether 1-1:1.0 eth1: register 'cdc_ether' at 
usb-:00:1d.7-1, CDC Ethernet Device, 58:2c:80:13:92:63
[ 249.494624] usbcore: registered new interface driver cdc_ether
[ 249.515786] systemd-udevd[1212]: renamed network interface eth1 to eth2
[ 249.875661] NET: Registered protocol family 17

Under Linux 3.11 (or may be earlier) this device stops working. Possibly the 
switch-function has been removed from the kernel, but udev/usb-modeswitch does 
not know about.

May be someone can suggest/provide a switch-sequence.

[ 187.632182] usb 1-1: new high-speed USB device number 3 using ehci-pci
[ 187.887782] usb 1-1: New USB device found, idVendor=12d1, idProduct=1f16
[ 187.887798] usb 1-1: New USB device strings: Mfr=5, Product=4, 
SerialNumber=7
[ 187.887809] usb 1-1: Product: K5150
[ 187.887818] usb 1-1: Manufacturer: Vodafone (Huawei)
[ 187.887827] usb 1-1: SerialNumber: 
[ 187.940114] usb-storage 1-1:1.0: USB Mass Storage device detected
[ 187.940357] scsi4 : usb-storage 1-1:1.0
[ 187.940669] usbcore: registered new interface driver usb-storage
[ 188.960983] scsi 4:0:0:0: CD-ROM Vodafone Storage(Huawei) 2.31 PQ: 0 ANSI: 2
[ 188.961902] scsi 4:0:0:0: Attached scsi generic sg1 type 5
[ 189.001945] sr0: scsi-1 drive
[ 189.001956] cdrom: Uniform CD-ROM driver Revision: 3.20
[ 189.003335] sr 4:0:0:0: Attached scsi CD-ROM sr0


Simply eject /dev/sr0 doesn't work.


Regards,
Thomas

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Re: [PATCH] HID: logitech - lg2ff: Add IDs for Formula Vibration Feedback Wheel

2013-10-07 Thread simon
 From: Elias Vanderstuyft elias@gmail.com

 Add USB IDs for Logitech Formula Vibration Feedback Wheel (046d:ca04).

 The lg2ff force feedback subdriver is used for vibration and
 HID_GD_MULTIAXIS is set to avoid deadzone like other Logitech wheels.

 Kconfig description etc are also updated accordingly.

 Signed-off-by: Elias Vanderstuyft elias@gmail.com
 [anssi.hann...@iki.fi: added description and CCs]
 Signed-off-by: Anssi Hannula anssi.hann...@iki.fi
 Cc: Simon Wood si...@mungewell.org
 Cc: sta...@vger.kernel.org
 ---

 Simon, does this look OK to you, or do you think it should be an lg4ff
 device? Though I guess lg2ff is better than nothing even in that case.

 Jiri, lets see if we get a comment from Simon before applying.


I've cc'ed Michal as he contributed a lot to lg4ff and is looking at
improving ff-memless.

I am unfamiliar with this wheel (180' rotation, bungee cord for autocenter
and rumble motors - or so google tells me...), it's not listed on
Wikipedia (hint, hint):
http://en.wikipedia.org/wiki/Racing_wheel

At present lg4ff does not support RUMBLE effects (only CONSTANT and
AUTOCENTER), so lg2ff seems a sensible place. The only minor concern I
would have is any confusion from the descriptions in Kconfig.

I didn't build, but think that the patch looks OK to commit.

For the other wheels we have re-written the HID descriptors to split
brake/accel into seperate axis. Do you know whether this is possible for
this wheel too?

Thanks for your patch,
Simon.

Signed-off-by: Simon Wood si...@mungewell.org


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[PATCH v2 5/5] xhci: clarify logging in xhci_setup_device

2013-10-07 Thread Dan Williams
Specify whether we are only performing the context setup portion of the
'address device' command, or the full operation issuing 'SetAddress'
on the wire.

Signed-off-by: Dan Williams dan.j.willi...@intel.com
---

New in v2

 drivers/usb/host/xhci.c |   22 --
 1 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index b08369ed2f87..5282fdb1bfb7 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -3713,6 +3713,7 @@ disable_slot:
 static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
 enum xhci_setup_dev setup)
 {
+   const char *act = setup == SETUP_CONTEXT_ONLY ? context : address;
unsigned long flags;
int timeleft;
struct xhci_virt_device *virt_dev;
@@ -3788,8 +3789,8 @@ static int xhci_setup_device(struct usb_hcd *hcd, struct 
usb_device *udev,
 * command on a timeout.
 */
if (timeleft = 0) {
-   xhci_warn(xhci, %s while waiting for address device command\n,
-   timeleft == 0 ? Timeout : Signal);
+   xhci_warn(xhci, %s while waiting for setup %s command\n,
+ timeleft == 0 ? Timeout : Signal, act);
/* cancel the address device command */
ret = xhci_cancel_cmd(xhci, NULL, cmd_trb);
if (ret  0)
@@ -3800,26 +3801,27 @@ static int xhci_setup_device(struct usb_hcd *hcd, 
struct usb_device *udev,
switch (virt_dev-cmd_status) {
case COMP_CTX_STATE:
case COMP_EBADSLT:
-   xhci_err(xhci, Setup ERROR: address device command for slot 
%d.\n,
-   udev-slot_id);
+   xhci_err(xhci, Setup ERROR: setup %s command for slot %d.\n,
+act, udev-slot_id);
ret = -EINVAL;
break;
case COMP_TX_ERR:
-   dev_warn(udev-dev, Device not responding to set address.\n);
+   dev_warn(udev-dev, Device not responding to setup %s.\n, 
act);
ret = -EPROTO;
break;
case COMP_DEV_ERR:
-   dev_warn(udev-dev, ERROR: Incompatible device for address 
-   device command.\n);
+   dev_warn(udev-dev,
+ERROR: Incompatible device for setup %s command\n, 
act);
ret = -ENODEV;
break;
case COMP_SUCCESS:
xhci_dbg_trace(xhci, trace_xhci_dbg_address,
-   Successful Address Device command);
+  Successful setup %s command, act);
break;
default:
-   xhci_err(xhci, ERROR: unexpected command completion 
-   code 0x%x.\n, virt_dev-cmd_status);
+   xhci_err(xhci,
+ERROR: unexpected setup %s command completion code 
0x%x.\n,
+act, virt_dev-cmd_status);
xhci_dbg(xhci, Slot ID %d Output Context:\n, udev-slot_id);
xhci_dbg_ctx(xhci, virt_dev-out_ctx, 2);
trace_xhci_address_ctx(xhci, virt_dev-out_ctx, 1);

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Re: [PATCH v2 4/5] usb: xhci: change enumeration scheme to 'new scheme' by default

2013-10-07 Thread Alan Stern
On Mon, 7 Oct 2013, Dan Williams wrote:

 Change the default enumeration scheme for xhci attached USB  3 devices
 from:

Careful about the distinction between USB-3 and SuperSpeed.  They 
aren't synonymous.

Reset
SetAddress [xhci address-device BSR = 0]
GetDescriptor(8)
GetDescriptor(18)
 
 ...to:
 
Reset
[xhci address-device BSR = 1]
GetDescriptor(64)
Reset
SetAddress [xhci address-device BSR = 0]
GetDescriptor(8)
GetDescriptor(18)

This description isn't right.  The new scheme skips the 
Get-Descriptor(8) step entirely.  It goes directly from the second 
reset to Get-Descriptor(18).

 ...as some devices misbehave when encountering a SetAddress command
 prior to GetDescriptor.  There are known legacy devices that require
 this scheme, but testing has found at least one USB3 device that fails
 enumeration when presented with this ordering.  For now, follow the ehci
 case and enable 'new scheme' by default for USB  3 devices.
 
 To support this enumeration scheme on xhci the AddressDevice operation
 needs to be performed twice.  The first instance of the command enables
 the HC's device and slot context info for the device, but omits sending
 the device a SetAddress command (BSR == block set address request).
 Then, after GetDescriptor completes, follow up with the full
 AddressDevice+SetAddress operation.
 
 As mentioned before, this ordering of events with USB3 devices causes an
 extra state transition to be exposed to xhci.  Previously USB3 devices
 would transition directly from 'enabled' to 'addressed' and never need
 to underrun responses to 'get descriptor'. We do see the 64-byte
 descriptor fetch the correct data, but the following 8-byte descriptor
 read after the reset gets:

Are you sure you don't mean 18-byte instead of 8-byte?

 bLength= 0
 bDescriptorType= 0
 bcdUSB = 0
 bDeviceClass   = 0
 bDeviceSubClass= 0
 bDeviceProtocol= 0
 bMaxPacketSize0= 9
 
 instead of:
 
 bLength= 12
 bDescriptorType= 1
 bcdUSB = 300
 bDeviceClass   = 0
 bDeviceSubClass= 0
 bDeviceProtocol= 0
 bMaxPacketSize0= 9
 
 which results in the discovery process looping until falling back to
 'old scheme' enumeration.

In any case, I agree that sticking with the old scheme for SuperSpeed 
devices is a good idea, because that's most likely to be what other 
OS's use (since it is what the hardware supports most directly).

Alan Stern


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Re: [PATCH] HID: logitech - lg2ff: Add IDs for Formula Vibration Feedback Wheel

2013-10-07 Thread simon
 I don't really know what you need for the HID descriptors, but I thought
 maybe I should post usbmon output when plugging in the wheel:

I'm not sure I can do anything with that file. It would be great if you
could dump/attach the report descriptor file. This can be found in the
/sys folder structure under the USB ID for your device.

ie. for my Sony Dual Shock controller
--
simon@simon-virtual-machine:/sys/bus/usb/devices/1-1:1.0/0003:054C:0268.0001$
hexdump -C report_descriptor
  05 01 09 04 a1 01 a1 02  85 01 75 08 95 01 15 00 
|..u.|
0010  26 ff 00 81 03 75 01 95  13 15 00 25 01 35 00 45 
|u.%.5.E|
0020  01 05 09 19 01 29 13 81  02 75 01 95 0d 06 00 ff 
|.)...u..|
0030  81 03 15 00 26 ff 00 05  01 09 01 a1 00 75 08 95 
|u..|
0040  04 35 00 46 ff 00 09 30  09 31 09 32 09 35 81 02 
|.5.F...0.1.2.5..|
0050  c0 05 01 95 13 09 01 81  02 95 0c 81 01 75 10 95 
|.u..|
0060  04 26 ff 03 46 ff 03 09  01 81 02 c0 a1 02 85 02 
|...F...|
0070  75 08 95 30 09 01 b1 02  c0 a1 02 85 ee 75 08 95 
|u..0.u..|
0080  30 09 01 b1 02 c0 a1 02  85 ef 75 08 95 30 09 01 
|0.u..0..|
0090  b1 02 c0 c0   ||
0094
--

To confirm which bits of the HID stream actually change when the pedals
are pushed you could run the command as root.
--
$ hexdump -v -e '17/1 %02x  \n'  /dev/hidraw0
--

You'll have to change the '17' to match the actual number of bytes your
wheel sends, when you get it right the columns of values will change
'nicely' as you steer/depress the pedals/etc.

I'm expecting to see one column (or two adjacent if the bits don't align)
change as you press the brake/etc. If you can send a small capture showing
values changing for each of brake and accel that should be enough
information.

When we know where the data is, we can tell Linux's HID system which bits
to interpret as Y and Z axis.

Cheers,
Simon


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Re: [PATCH v2 4/5] usb: xhci: change enumeration scheme to 'new scheme' by default

2013-10-07 Thread Dan Williams
On Mon, Oct 7, 2013 at 12:41 PM, Alan Stern st...@rowland.harvard.edu wrote:
 On Mon, 7 Oct 2013, Dan Williams wrote:

 Change the default enumeration scheme for xhci attached USB  3 devices
 from:

 Careful about the distinction between USB-3 and SuperSpeed.  They
 aren't synonymous.

Ok, my mistake, that should read xhci attached non-SuperSpeed USB
devices, which is what the code does.


Reset
SetAddress [xhci address-device BSR = 0]
GetDescriptor(8)
GetDescriptor(18)

 ...to:

Reset
[xhci address-device BSR = 1]
GetDescriptor(64)
Reset
SetAddress [xhci address-device BSR = 0]
GetDescriptor(8)
GetDescriptor(18)

 This description isn't right.  The new scheme skips the
 Get-Descriptor(8) step entirely.  It goes directly from the second
 reset to Get-Descriptor(18).

Yes, copy paste error when I added the BSR annotations, had it right in v1


 ...as some devices misbehave when encountering a SetAddress command
 prior to GetDescriptor.  There are known legacy devices that require
 this scheme, but testing has found at least one USB3 device that fails
 enumeration when presented with this ordering.  For now, follow the ehci
 case and enable 'new scheme' by default for USB  3 devices.

Follows that this should be non-SuperSpeed devices as well.


 To support this enumeration scheme on xhci the AddressDevice operation
 needs to be performed twice.  The first instance of the command enables
 the HC's device and slot context info for the device, but omits sending
 the device a SetAddress command (BSR == block set address request).
 Then, after GetDescriptor completes, follow up with the full
 AddressDevice+SetAddress operation.

 As mentioned before, this ordering of events with USB3 devices causes an

SuperSpeed.

 extra state transition to be exposed to xhci.  Previously USB3 devices
 would transition directly from 'enabled' to 'addressed' and never need
 to underrun responses to 'get descriptor'. We do see the 64-byte
 descriptor fetch the correct data, but the following 8-byte descriptor
 read after the reset gets:

 Are you sure you don't mean 18-byte instead of 8-byte?

Yes, 18.


 bLength= 0
 bDescriptorType= 0
 bcdUSB = 0
 bDeviceClass   = 0
 bDeviceSubClass= 0
 bDeviceProtocol= 0
 bMaxPacketSize0= 9

 instead of:

 bLength= 12
 bDescriptorType= 1
 bcdUSB = 300
 bDeviceClass   = 0
 bDeviceSubClass= 0
 bDeviceProtocol= 0
 bMaxPacketSize0= 9

 which results in the discovery process looping until falling back to
 'old scheme' enumeration.

 In any case, I agree that sticking with the old scheme for SuperSpeed
 devices is a good idea, because that's most likely to be what other
 OS's use (since it is what the hardware supports most directly).

Thanks for that.

--
Dan
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Re: XHCI: Handling of Zero length packet in data stage

2013-10-07 Thread Alan Stern
On Mon, 7 Oct 2013, Sarah Sharp wrote:

 On Thu, Oct 03, 2013 at 07:18:42PM -, hema...@codeaurora.org wrote:
   On Thu, Oct 03, 2013 at 06:00:50PM -, hema...@codeaurora.org wrote:
   We have devices which require to send zero length packet in data stage
   to
   host in certain cases. We were not seeing any issue when we were using
   ehci based controller. When we switched to XHCI here is what we are
   observing:-
  
   For IN DATA dir control xfer XHCI sets ISP so xhci updates actual_length
   for short packet in data stage using event-transfer_len.
  
   But for data packets not short xhci directly uses
   urb-transfer_buffer_length as actual_length.This is done assuming data
   stage will never have zero length (short packet) data packet. Once
   Device
   sends zero length packet in data stage
   ISP triggers and actual_length is updated with value 0. Then later in
   status stage (since urb-actual_length is zero) driver incorrectly sets
   actual_length with urb-transfer_buffer_length.
 
 What should urb-actual_length be set to instead?  The device sent zero
 bytes in the data stage and urb-transfer_buffer_length *is* zero, so it

No, urb-transfer_buffer_length  0.  That's the point.

If I understand the OP correctly, he is saying that a 0-length response
to (for example) an 8-byte control-in transfer will end up with
urb-actual_length set to 8 rather than 0.

 makes sense that urb-actual_length would be set to zero.

Alan Stern

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Re: modeswitch? LTE vodafone K5150 (hilink) 12d1 1f16 ; 12d1 1575 cdc_ether

2013-10-07 Thread Greg KH
On Mon, Oct 07, 2013 at 09:00:49PM +0200, Thomas Schäfer wrote:
 Hi,
 
 The vodafone K5150 is a LTE device, default is hilink mode.
 This works under Linux 3.7 in the same way as it under windows vista does.
 
 [ 248.255172] usb 1-1: new high-speed USB device number 3 using ehci_hcd
 [ 248.518600] usb 1-1: New USB device found, idVendor=12d1, idProduct=1f16
 [ 248.518621] usb 1-1: New USB device strings: Mfr=5, Product=4, 
 SerialNumber=7
 [ 248.518635] usb 1-1: Product: K5150
 [ 248.518647] usb 1-1: Manufacturer: Vodafone (Huawei)
 [ 248.518658] usb 1-1: SerialNumber: 
 [ 248.568343] Initializing USB Mass Storage driver...
 [ 248.569941] scsi4 : usb-storage 1-1:1.0
 [ 248.570636] usbcore: registered new interface driver usb-storage
 [ 248.570646] USB Mass Storage support registered.
 [ 248.711564] usb 1-1: USB disconnect, device number 3
 [ 249.215161] usb 1-1: new high-speed USB device number 4 using ehci_hcd
 [ 249.411707] usb 1-1: New USB device found, idVendor=12d1, idProduct=1575
 [ 249.411722] usb 1-1: New USB device strings: Mfr=5, Product=4, 
 SerialNumber=0
 [ 249.411732] usb 1-1: Product: K5150
 [ 249.411741] usb 1-1: Manufacturer: Vodafone (Huawei)
 [ 249.494478] cdc_ether 1-1:1.0 eth1: register 'cdc_ether' at 
 usb-:00:1d.7-1, CDC Ethernet Device, 58:2c:80:13:92:63
 [ 249.494624] usbcore: registered new interface driver cdc_ether
 [ 249.515786] systemd-udevd[1212]: renamed network interface eth1 to eth2
 [ 249.875661] NET: Registered protocol family 17
 
 Under Linux 3.11 (or may be earlier) this device stops working. Possibly the 
 switch-function has been removed from the kernel, but udev/usb-modeswitch 
 does 
 not know about.

Have you verified that the latest version of usb-modeswitch doesn't fix
this issue?  I think I've seen reports that it does, but it would be
good if you could test that out and verify it.

thanks,

greg k-h
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[PATCH 0/3] Add USBHS support to Lager

2013-10-07 Thread Valentine Barshak
This patch set adds internal USB PHY support to RCAR Gen2 SoC, and
also enables USBHS for the Lager board.

The patches apply fine to the renesas-devel-20131004 tag of the renesas.git.

The first patch also applies fine to the usb.git at kernel.org.
It adds RCAR Gen2 phy driver, which is used to configure the shared USB
channels 0/2 and to control USBHS internal PHY.
All the drivers that use the shared USB channels (USBHS/USBSS/PCI USB host)
should acquire the USB phy first to set proper channel configuration.

The other two patches add USBHS support to Lager board, which requires
RCAR Gen2 phy driver.

Valentine Barshak (3):
  usb: phy: Add RCAR Gen2 USB phy
  arm: shmobile: r8a7790: Add USBHS clock support
  arm: shmobile: lager: Add USBHS support

 arch/arm/mach-shmobile/board-lager.c| 106 +
 arch/arm/mach-shmobile/clock-r8a7790.c  |   4 +
 drivers/usb/phy/Kconfig |  14 ++
 drivers/usb/phy/Makefile|   1 +
 drivers/usb/phy/phy-rcar-gen2-usb.c | 271 
 include/linux/platform_data/usb-rcar-gen2-phy.h |  22 ++
 6 files changed, 418 insertions(+)
 create mode 100644 drivers/usb/phy/phy-rcar-gen2-usb.c
 create mode 100644 include/linux/platform_data/usb-rcar-gen2-phy.h

-- 
1.8.3.1

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[PATCH 1/3] usb: phy: Add RCAR Gen2 USB phy

2013-10-07 Thread Valentine Barshak
This adds RCAR Gen2 USB phy support. The driver configures
USB channels 0/2, which are shared between PCI USB hosts and
USBHS/USBSS devices. It also controls internal USBHS phy.

Signed-off-by: Valentine Barshak valentine.bars...@cogentembedded.com
---
 drivers/usb/phy/Kconfig |  13 ++
 drivers/usb/phy/Makefile|   1 +
 drivers/usb/phy/phy-rcar-gen2-usb.c | 271 
 include/linux/platform_data/usb-rcar-gen2-phy.h |  22 ++
 4 files changed, 307 insertions(+)
 create mode 100644 drivers/usb/phy/phy-rcar-gen2-usb.c
 create mode 100644 include/linux/platform_data/usb-rcar-gen2-phy.h

diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index d5589f9..297062c 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -214,6 +214,19 @@ config USB_RCAR_PHY
  To compile this driver as a module, choose M here: the
  module will be called phy-rcar-usb.
 
+config USB_RCAR_GEN2_PHY
+   tristate Renesas R-Car Gen2 USB PHY support
+   depends on ARCH_R8A7790 || ARCH_R8A7791
+   select USB_PHY
+   help
+ Say Y here to add support for the Renesas R-Car Gen2 USB PHY driver.
+ It is typically used to control internal USB PHY for USBHS,
+ and to configure shared USB channels 0 and 2.
+ This driver supports R8A7790 and R8A7791.
+
+ To compile this driver as a module, choose M here: the
+ module will be called phy-rcar-gen2-usb.
+
 config USB_ULPI
bool Generic ULPI Transceiver Driver
depends on ARM
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index 2135e85..8c5b147 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -29,5 +29,6 @@ obj-$(CONFIG_USB_MSM_OTG) += phy-msm-usb.o
 obj-$(CONFIG_USB_MV_OTG)   += phy-mv-usb.o
 obj-$(CONFIG_USB_MXS_PHY)  += phy-mxs-usb.o
 obj-$(CONFIG_USB_RCAR_PHY) += phy-rcar-usb.o
+obj-$(CONFIG_USB_RCAR_GEN2_PHY)+= phy-rcar-gen2-usb.o
 obj-$(CONFIG_USB_ULPI) += phy-ulpi.o
 obj-$(CONFIG_USB_ULPI_VIEWPORT)+= phy-ulpi-viewport.o
diff --git a/drivers/usb/phy/phy-rcar-gen2-usb.c 
b/drivers/usb/phy/phy-rcar-gen2-usb.c
new file mode 100644
index 000..b7b2102
--- /dev/null
+++ b/drivers/usb/phy/phy-rcar-gen2-usb.c
@@ -0,0 +1,271 @@
+/*
+ * Renesas R-Car Gen2 USB phy driver
+ *
+ * Copyright (C) 2013 Renesas Solutions Corp.
+ * Copyright (C) 2013 Cogent Embedded, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/clk.h
+#include linux/delay.h
+#include linux/io.h
+#include linux/usb/otg.h
+#include linux/platform_data/usb-rcar-gen2-phy.h
+#include linux/platform_device.h
+#include linux/spinlock.h
+#include linux/module.h
+
+struct rcar_gen2_usb_phy_priv {
+   struct usb_phy phy;
+   void __iomem *base;
+   struct clk *clk;
+   spinlock_t lock;
+   int usecount;
+   u32 ugctrl2;
+};
+
+#define usb_phy_to_priv(p) container_of(p, struct rcar_gen2_usb_phy_priv, phy)
+
+/* Low Power Status register */
+#define USBHS_LPSTS_REG0x02
+#define USBHS_LPSTS_SUSPM  (1  14)
+
+/* USB General control register */
+#define USBHS_UGCTRL_REG   0x80
+#define USBHS_UGCTRL_CONNECT   (1  2)
+#define USBHS_UGCTRL_PLLRESET  (1  0)
+
+/* USB General control register 2 */
+#define USBHS_UGCTRL2_REG  0x84
+#define USBHS_UGCTRL2_USB0_PCI (1  4)
+#define USBHS_UGCTRL2_USB0_HS  (3  4)
+#define USBHS_UGCTRL2_USB2_PCI (0  31)
+#define USBHS_UGCTRL2_USB2_SS  (1  31)
+
+/* USB General status register */
+#define USBHS_UGSTS_REG0x88
+#define USBHS_UGSTS_LOCK   (3  8)
+
+/* Setup USB channels */
+static void __rcar_gen2_usb_phy_setup(struct rcar_gen2_usb_phy_priv *priv)
+{
+   u32 val;
+
+   clk_prepare_enable(priv-clk);
+
+   /* Set USB channels in the USBHS UGCTRL2 register */
+   val = ioread32(priv-base);
+   val = ~(USBHS_UGCTRL2_USB0_HS | USBHS_UGCTRL2_USB2_SS);
+   val |= priv-ugctrl2;
+   iowrite32(val, priv-base);
+}
+
+/* Disable USBHS internal phy */
+static int __rcar_gen2_usbhs_phy_enable(void __iomem *base)
+{
+   u32 val;
+   int i;
+
+   /* USBHS PHY power on */
+   val = ioread32(base + USBHS_UGCTRL_REG);
+   val = ~USBHS_UGCTRL_PLLRESET;
+   iowrite32(val, base + USBHS_UGCTRL_REG);
+
+   val = ioread16(base + USBHS_LPSTS_REG);
+   val |= USBHS_LPSTS_SUSPM;
+   iowrite16(val, base + USBHS_LPSTS_REG);
+
+   for (i = 0; i  20; i++) {
+   val = ioread32(base + USBHS_UGSTS_REG);
+   if ((val  USBHS_UGSTS_LOCK) == USBHS_UGSTS_LOCK) {
+   val = ioread32(base + 

[PATCH 2/3] arm: shmobile: r8a7790: Add USBHS clock support

2013-10-07 Thread Valentine Barshak
This adds USBHS clock support.

Signed-off-by: Valentine Barshak valentine.bars...@cogentembedded.com
---
 arch/arm/mach-shmobile/clock-r8a7790.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c 
b/arch/arm/mach-shmobile/clock-r8a7790.c
index a64f965..7bb2796 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -186,6 +186,7 @@ enum {
MSTP813,
MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
MSTP717, MSTP716,
+   MSTP704,
MSTP522,
MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
@@ -208,6 +209,7 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP720] = SH_CLK_MSTP32(p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
[MSTP717] = SH_CLK_MSTP32(zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
[MSTP716] = SH_CLK_MSTP32(zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
+   [MSTP704] = SH_CLK_MSTP32(mp_clk, SMSTPCR7, 4, 0), /* HSUSB */
[MSTP522] = SH_CLK_MSTP32(extal_clk, SMSTPCR5, 22, 0), /* Thermal */
[MSTP315] = SH_CLK_MSTP32(div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* 
MMC0 */
[MSTP314] = SH_CLK_MSTP32(div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* 
SDHI0 */
@@ -296,6 +298,8 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID(ee22.mmcif, mstp_clks[MSTP305]),
CLKDEV_DEV_ID(sh_mmcif.1, mstp_clks[MSTP305]),
CLKDEV_DEV_ID(sh_cmt.0, mstp_clks[MSTP124]),
+   CLKDEV_DEV_ID(renesas_usbhs, mstp_clks[MSTP704]),
+   CLKDEV_ICK_ID(usbhs, usb_phy_rcar_gen2, mstp_clks[MSTP704]),
 };
 
 #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31) \
-- 
1.8.3.1

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[PATCH 3/3] arm: shmobile: lager: Add USBHS support

2013-10-07 Thread Valentine Barshak
This adds USBHS PHY and registers USBHS device if the driver is enabled.

Signed-off-by: Valentine Barshak valentine.bars...@cogentembedded.com
---
 arch/arm/mach-shmobile/board-lager.c | 106 +++
 1 file changed, 106 insertions(+)

diff --git a/arch/arm/mach-shmobile/board-lager.c 
b/arch/arm/mach-shmobile/board-lager.c
index a8d3ce6..15a98ac 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -18,6 +18,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  */
 
+#include linux/clk.h
 #include linux/gpio.h
 #include linux/gpio_keys.h
 #include linux/input.h
@@ -29,11 +30,14 @@
 #include linux/pinctrl/machine.h
 #include linux/platform_data/gpio-rcar.h
 #include linux/platform_data/rcar-du.h
+#include linux/platform_data/usb-rcar-gen2-phy.h
 #include linux/platform_device.h
 #include linux/phy.h
 #include linux/regulator/fixed.h
 #include linux/regulator/machine.h
 #include linux/sh_eth.h
+#include linux/usb/phy.h
+#include linux/usb/renesas_usbhs.h
 #include mach/common.h
 #include mach/irqs.h
 #include mach/r8a7790.h
@@ -165,6 +169,98 @@ static const struct resource ether_resources[] __initconst 
= {
DEFINE_RES_IRQ(gic_spi(162)),
 };
 
+/* USBHS */
+#if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
+static const struct resource usbhs_resources[] __initconst = {
+   DEFINE_RES_MEM(0xe659, 0x100),
+   DEFINE_RES_IRQ(gic_spi(107)),
+};
+
+struct usbhs_private {
+   struct renesas_usbhs_platform_info info;
+   struct usb_phy *phy;
+};
+
+#define usbhs_get_priv(pdev) \
+   container_of(renesas_usbhs_get_info(pdev), struct usbhs_private, info)
+
+static int usbhs_power_ctrl(struct platform_device *pdev,
+   void __iomem *base, int enable)
+{
+   struct usbhs_private *priv = usbhs_get_priv(pdev);
+
+   if (!priv-phy)
+   return -ENODEV;
+
+   return usb_phy_set_suspend(priv-phy, !enable);
+}
+
+static int usbhs_hardware_init(struct platform_device *pdev)
+{
+   struct usbhs_private *priv = usbhs_get_priv(pdev);
+   struct usb_phy *phy;
+
+   phy = usb_get_phy(USB_PHY_TYPE_USB2);
+   if (IS_ERR(phy))
+   return PTR_ERR(phy);
+
+   priv-phy = phy;
+   return usb_phy_init(priv-phy);
+}
+
+static int usbhs_hardware_exit(struct platform_device *pdev)
+{
+   struct usbhs_private *priv = usbhs_get_priv(pdev);
+
+   if (!priv-phy)
+   return 0;
+
+   usb_phy_shutdown(priv-phy);
+   usb_put_phy(priv-phy);
+   priv-phy = NULL;
+   return 0;
+}
+
+static int usbhs_get_id(struct platform_device *pdev)
+{
+   return USBHS_GADGET;
+}
+
+static struct usbhs_private usbhs_priv __initdata = {
+   .info = {
+   .platform_callback = {
+   .power_ctrl = usbhs_power_ctrl,
+   .hardware_init  = usbhs_hardware_init,
+   .hardware_exit  = usbhs_hardware_exit,
+   .get_id = usbhs_get_id,
+   },
+   .driver_param = {
+   .buswait_bwait  = 4,
+   },
+   }
+};
+
+#define lager_register_usbhs() \
+   platform_device_register_resndata(platform_bus,\
+ renesas_usbhs, -1,  \
+ usbhs_resources,  \
+ ARRAY_SIZE(usbhs_resources),  \
+ usbhs_priv.info, \
+ sizeof(usbhs_priv.info))
+#else  /* CONFIG_USB_RENESAS_USBHS_UDC */
+#define lager_register_usbhs()
+#endif /* CONFIG_USB_RENESAS_USBHS_UDC */
+
+/* USBHS PHY */
+static const struct rcar_gen2_phy_platform_data usbhs_phy_pdata __initconst = {
+   .chan0_pci = 0, /* Channel 0 is USBHS */
+   .chan2_pci = 1, /* Channel 2 is PCI USB */
+};
+
+static const struct resource usbhs_phy_resources[] __initconst = {
+   DEFINE_RES_MEM(0xe6590100, 0x100),
+};
+
 static const struct pinctrl_map lager_pinctrl_map[] = {
/* DU (CN10: ARGB0, CN13: LVDS) */
PIN_MAP_MUX_GROUP_DEFAULT(rcar-du-r8a7790, pfc-r8a7790,
@@ -193,6 +289,9 @@ static const struct pinctrl_map lager_pinctrl_map[] = {
  eth_rmii, eth),
PIN_MAP_MUX_GROUP_DEFAULT(r8a7790-ether, pfc-r8a7790,
  intc_irq0, intc),
+   /* USB0 */
+   PIN_MAP_MUX_GROUP_DEFAULT(renesas_usbhs, pfc-r8a7790,
+ usb0, usb0),
 };
 
 static void __init lager_add_standard_devices(void)
@@ -221,6 +320,13 @@ static void __init lager_add_standard_devices(void)
  ARRAY_SIZE(ether_resources),
  ether_pdata, sizeof(ether_pdata));
 
+   

Allocation failure of USB URB in interrupt

2013-10-07 Thread jonsm...@gmail.com
Is this USB driver out of DMA zone space? There seems to be plenty of
memory around.
How do you fix something like this?

-- Forwarded message --
From: Stefan Monnier monn...@iro.umontreal.ca
Date: Mon, Oct 7, 2013 at 6:44 PM
Subject: [linux-sunxi] Re: Daily (or so) freezes of Mele A2000
To: linux-su...@googlegroups.com


 My Mele A2000 (which is up 24/7, used mostly as a server) freezes on
 a regular basis, sometimes once a day.

Also it turns out that I haven't been able to reproduce the freeze so
easily with the internal wifi (the wifi itself seems to get wedged such
that wpa_supplicant thinks it properly associates with the WPA
access-point, but no packet passes through (no DHCP, obviously, but
nothing on tcpdump either).  Taking the interface down and back up gets
it back into working order).  So, with the internal wifi, the problem
seems to be more squarely in the proprietary driver, tho I also get
a backtrace about a page allocation failure (but of order:2, see
backtrace below).


Stefan


Non-fatal backtrace with the internal rtc8188cus wifi, which repeats
a few times and then stops.

[87304.96] emacs: page allocation failure: order:2, mode:0x4020
[87304.96] [c0014bb8] (unwind_backtrace+0x0/0x124) from
[c00c5698] (warn_alloc_failed+0xfc/0x124)
[87304.96] [c00c5698] (warn_alloc_failed+0xfc/0x124) from
[c00c7e94] (__alloc_pages_nodemask+0x684/0x774)
[87304.96] [c00c7e94] (__alloc_pages_nodemask+0x684/0x774) from
[c00c7fa4] (__get_free_pages+0x20/0x34)
[87304.96] [c00c7fa4] (__get_free_pages+0x20/0x34) from
[c00f2fb4] (kmalloc_order_trace+0x28/0x90)
[87304.96] [c00f2fb4] (kmalloc_order_trace+0x28/0x90) from
[c031509c] (alloc_temp_buffer+0x14/0x30)
[87304.96] [c031509c] (alloc_temp_buffer+0x14/0x30) from
[c031528c] (sunxi_hcd_map_urb_for_dma+0x5c/0x17c)
[87304.96] [c031528c] (sunxi_hcd_map_urb_for_dma+0x5c/0x17c)
from [c02fa8c4] (usb_hcd_submit_urb+0x600/0x768)
[87304.96] [c02fa8c4] (usb_hcd_submit_urb+0x600/0x768) from
[bf03779c] (usb_read_port+0x1a4/0x1e0 [8192cu])
[87304.96] [bf03779c] (usb_read_port+0x1a4/0x1e0 [8192cu]) from
[bf00cab0] (_rtw_read_port+0x44/0x48 [8192cu])
[87304.96] [bf00cab0] (_rtw_read_port+0x44/0x48 [8192cu]) from
[bf037914] (usb_read_port_complete+0x13c/0x1d8 [8192cu])
[87304.96] [bf037914] (usb_read_port_complete+0x13c/0x1d8
[8192cu]) from [c02f9458] (usb_hcd_giveback_urb+0x9c/0xf4)
[87304.96] [c02f9458] (usb_hcd_giveback_urb+0x9c/0xf4) from
[c030afa8] (ehci_urb_done+0x8c/0x90)
[87304.96] [c030afa8] (ehci_urb_done+0x8c/0x90) from
[c030b060] (qh_completions+0xb4/0x4bc)
[87304.96] [c030b060] (qh_completions+0xb4/0x4bc) from
[c030f6cc] (ehci_work+0xc4/0x1dc)
[87304.96] [c030f6cc] (ehci_work+0xc4/0x1dc) from [c030ff90]
(ehci_irq+0x310/0x374)
[87304.96] [c030ff90] (ehci_irq+0x310/0x374) from [c02f8950]
(usb_hcd_irq+0x34/0x4c)
[87304.96] [c02f8950] (usb_hcd_irq+0x34/0x4c) from [c0092b68]
(handle_irq_event_percpu+0x5c/0x220)
[87304.96] [c0092b68] (handle_irq_event_percpu+0x5c/0x220) from
[c0092d5c] (handle_irq_event+0x30/0x40)
[87304.96] [c0092d5c] (handle_irq_event+0x30/0x40) from
[c00951a4] (handle_level_irq+0xbc/0xcc)
[87304.96] [c00951a4] (handle_level_irq+0xbc/0xcc) from
[c0092580] (generic_handle_irq+0x28/0x38)
[87304.96] [c0092580] (generic_handle_irq+0x28/0x38) from
[c000f064] (handle_IRQ+0x68/0x8c)
[87304.96] [c000f064] (handle_IRQ+0x68/0x8c) from [c04c7e70]
(__irq_usr+0x30/0x100)
[87304.96] Mem-info:
[87304.96] Normal per-cpu:
[87304.96] CPU0: hi:  186, btch:  31 usd: 120
[87304.96] active_anon:2555 inactive_anon:6084 isolated_anon:0
[87304.96]  active_file:49945 inactive_file:51786 isolated_file:0
[87304.96]  unevictable:0 dirty:45 writeback:0 unstable:0
[87304.96]  free:1656 slab_reclaimable:5250 slab_unreclaimable:2861
[87304.96]  mapped:2882 shmem:47 pagetables:351 bounce:0
[87304.96] Normal free:6624kB min:2884kB low:3604kB high:4324kB
active_anon:10220kB inactive_anon:24336kB active_file:199780kB
inactive_file:207144kB unevictable:0kB isolated(anon):0kB
isolated(file):0kB present:520192kB mlocked:0kB dirty:180kB
writeback:0kB mapped:11528kB shmem:188kB slab_reclaimable:21000kB
slab_unreclaimable:11444kB kernel_stack:1128kB pagetables:1404kB
unstable:0kB bounce:0kB writeback_tmp:0kB pages_scanned:0
all_unreclaimable? no
[87304.96] lowmem_reserve[]: 0 0 0
[87304.96] Normal: 884*4kB 382*8kB 2*16kB 0*32kB 0*64kB 0*128kB
0*256kB 0*512kB 0*1024kB 0*2048kB 0*4096kB = 6624kB
[87304.96] 101945 total pagecache pages
[87304.96] 167 pages in swap cache
[87304.96] Swap cache stats: add 808, delete 641, find 941/964
[87304.96] Free swap  = 1046116kB
[87304.96] Total swap = 1048572kB
[87304.96] 131072 pages of RAM
[87304.96] 2117 free pages
[87304.96] 8335 reserved pages
[87304.96] 5795 slab pages
[87304.96] 60689 pages shared
[87304.96] 167 pages swap cached

--
You received 

Re: [PATCH 0/3] Add USBHS support to Lager

2013-10-07 Thread Simon Horman
On Tue, Oct 08, 2013 at 03:27:00AM +0400, Valentine Barshak wrote:
 This patch set adds internal USB PHY support to RCAR Gen2 SoC, and
 also enables USBHS for the Lager board.
 
 The patches apply fine to the renesas-devel-20131004 tag of the renesas.git.
 
 The first patch also applies fine to the usb.git at kernel.org.
 It adds RCAR Gen2 phy driver, which is used to configure the shared USB
 channels 0/2 and to control USBHS internal PHY.
 All the drivers that use the shared USB channels (USBHS/USBSS/PCI USB host)
 should acquire the USB phy first to set proper channel configuration.
 
 The other two patches add USBHS support to Lager board, which requires
 RCAR Gen2 phy driver.

Hi Morimoto-san,

I could you review this series?

My assumption is that in the current form the first patch will
go through the USB tree while the latter patches will subsequently
go through (my) renesas tree.

 Valentine Barshak (3):
   usb: phy: Add RCAR Gen2 USB phy
   arm: shmobile: r8a7790: Add USBHS clock support
   arm: shmobile: lager: Add USBHS support
 
  arch/arm/mach-shmobile/board-lager.c| 106 +
  arch/arm/mach-shmobile/clock-r8a7790.c  |   4 +
  drivers/usb/phy/Kconfig |  14 ++
  drivers/usb/phy/Makefile|   1 +
  drivers/usb/phy/phy-rcar-gen2-usb.c | 271 
 
  include/linux/platform_data/usb-rcar-gen2-phy.h |  22 ++
  6 files changed, 418 insertions(+)
  create mode 100644 drivers/usb/phy/phy-rcar-gen2-usb.c
  create mode 100644 include/linux/platform_data/usb-rcar-gen2-phy.h
 
 -- 
 1.8.3.1
 
 --
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[PATCH 1/1] usb: chipidea: udc: Fix calling spin_lock_irqsave at sleep context

2013-10-07 Thread Peter Chen
Fixing the below dump:

root@freescale ~$ modprobe g_serial
g_serial gadget: Gadget Serial v2.4
g_serial gadget: g_serial ready
BUG: sleeping function called from invalid context at 
/home/b29397/work/projects/upstream/usb/usb/drivers/base/power/runtime.c:952
in_atomic(): 1, irqs_disabled(): 128, pid: 805, name: modprobe
2 locks held by modprobe/805:
 #0:  (udc_lock){+.+.+.}, at: [7f000a74] usb_gadget_probe_driver+0x44/0xb4 
[udc_core]
 #1:  ((ci-lock)-rlock){..}, at: [7f033488] ci_udc_start+0x94/0x110 
[ci_hdrc]
irq event stamp: 3878
hardirqs last  enabled at (3877): [806b6720] 
_raw_spin_unlock_irqrestore+0x40/0x6c
hardirqs last disabled at (3878): [806b6474] _raw_spin_lock_irqsave+0x2c/0xa8
softirqs last  enabled at (3872): [8002ec0c] __do_softirq+0x1c8/0x2e8
softirqs last disabled at (3857): [8002f180] irq_exit+0xbc/0x110
CPU: 0 PID: 805 Comm: modprobe Not tainted 3.11.0-next-20130910+ #85
[80016b94] (unwind_backtrace+0x0/0xf8) from [80012e0c] 
(show_stack+0x20/0x24)
[80012e0c] (show_stack+0x20/0x24) from [806af554] (dump_stack+0x9c/0xc4)
[806af554] (dump_stack+0x9c/0xc4) from [8005940c] (__might_sleep+0xf4/0x134)
[8005940c] (__might_sleep+0xf4/0x134) from [803a04a4] 
(__pm_runtime_resume+0x94/0xa0)
[803a04a4] (__pm_runtime_resume+0x94/0xa0) from [7f0334a4] 
(ci_udc_start+0xb0/0x110 [ci_hdrc])
[7f0334a4] (ci_udc_start+0xb0/0x110 [ci_hdrc]) from [7f0009b4] 
(udc_bind_to_driver+0x5c/0xd8 [udc_core])
[7f0009b4] (udc_bind_to_driver+0x5c/0xd8 [udc_core]) from [7f000ab0] 
(usb_gadget_probe_driver+0x80/0xb4 [udc_core])
[7f000ab0] (usb_gadget_probe_driver+0x80/0xb4 [udc_core]) from [7f008618] 
(usb_composite_probe+0xac/0xd8 [libcomposite])
[7f008618] (usb_composite_probe+0xac/0xd8 [libcomposite]) from [7f04b168] 
(init+0x8c/0xb4 [g_serial])
[7f04b168] (init+0x8c/0xb4 [g_serial]) from [800088e8] 
(do_one_initcall+0x108/0x16c)
[800088e8] (do_one_initcall+0x108/0x16c) from [8008e518] 
(load_module+0x1b00/0x20a4)
[8008e518] (load_module+0x1b00/0x20a4) from [8008eba8] 
(SyS_init_module+0xec/0x100)
[8008eba8] (SyS_init_module+0xec/0x100) from [8000ec40] 
(ret_fast_syscall+0x0/0x48)

Signed-off-by: Peter Chen peter.c...@freescale.com
---
 drivers/usb/chipidea/udc.c |7 +++
 1 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
index 2bb7d18..7bee4a8 100644
--- a/drivers/usb/chipidea/udc.c
+++ b/drivers/usb/chipidea/udc.c
@@ -1636,23 +1636,22 @@ static int ci_udc_start(struct usb_gadget *gadget,
retval = usb_ep_enable(ci-ep0in-ep);
if (retval)
return retval;
-   spin_lock_irqsave(ci-lock, flags);
 
ci-driver = driver;
pm_runtime_get_sync(ci-gadget.dev);
if (ci-vbus_active) {
+   spin_lock_irqsave(ci-lock, flags);
hw_device_reset(ci, USBMODE_CM_DC);
} else {
pm_runtime_put_sync(ci-gadget.dev);
-   goto done;
+   return retval;
}
 
retval = hw_device_state(ci, ci-ep0out-qh.dma);
+   spin_unlock_irqrestore(ci-lock, flags);
if (retval)
pm_runtime_put_sync(ci-gadget.dev);
 
- done:
-   spin_unlock_irqrestore(ci-lock, flags);
return retval;
 }
 
-- 
1.7.1


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Re: [PATCH 2/3] arm: shmobile: r8a7790: Add USBHS clock support

2013-10-07 Thread Kuninori Morimoto

Hi Valentine

 @@ -296,6 +298,8 @@ static struct clk_lookup lookups[] = {
   CLKDEV_DEV_ID(ee22.mmcif, mstp_clks[MSTP305]),
   CLKDEV_DEV_ID(sh_mmcif.1, mstp_clks[MSTP305]),
   CLKDEV_DEV_ID(sh_cmt.0, mstp_clks[MSTP124]),
 + CLKDEV_DEV_ID(renesas_usbhs, mstp_clks[MSTP704]),
 + CLKDEV_ICK_ID(usbhs, usb_phy_rcar_gen2, mstp_clks[MSTP704]),

This case, you can use

CLKDEV_DEV_ID(usb_phy_rcar_gen2, mstp_clks[MSTP704]),

and no clk_get() is needed.
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Re: [PATCH 1/3] usb: phy: Add RCAR Gen2 USB phy

2013-10-07 Thread Kuninori Morimoto

Hi Valentine

Thank you for your patch

 +/* Setup USB channels */
 +static void __rcar_gen2_usb_phy_setup(struct rcar_gen2_usb_phy_priv *priv)
 +{
 + u32 val;
 +
 + clk_prepare_enable(priv-clk);
 +
 + /* Set USB channels in the USBHS UGCTRL2 register */
 + val = ioread32(priv-base);
 + val = ~(USBHS_UGCTRL2_USB0_HS | USBHS_UGCTRL2_USB2_SS);
 + val |= priv-ugctrl2;
 + iowrite32(val, priv-base);
 +}

From my point of view, if you use clk_enable() on setup(),
then, it is easy to read if it has exit() or similar name function
which calls clk_disable()

 +static int rcar_gen2_usb_phy_set_suspend(struct usb_phy *phy, int suspend)
 +{
 + struct rcar_gen2_usb_phy_priv *priv = usb_phy_to_priv(phy);
 + unsigned long flags;
 + int retval;
 +
 + spin_lock_irqsave(priv-lock, flags);
 + if (suspend) {
 + /* Suspend USBHS internal phy */
 + retval = __rcar_gen2_usbhs_phy_disable(priv-base);
 + /*
 +  * If nothing else is using USB channel 0/2
 +  * disable the clocks as well
 +  */
 + if (priv-usecount == 1) {
 + clk_disable_unprepare(priv-clk);
 + priv-usecount--;
 + }
 + } else {
 + /*
 +  * Enable the clock and setup USB channels
 +  * if needed.
 +  */
 + if (!priv-usecount) {
 + priv-usecount++;
 + __rcar_gen2_usb_phy_setup(priv);
 + }
 + /* Resume USBHS internal phy */
 + retval = __rcar_gen2_usbhs_phy_enable(priv-base);
 + }

Are these usecount++/usecount-- position correct ?

 +static int rcar_gen2_usb_phy_probe(struct platform_device *pdev)
 +{
 + struct device *dev = pdev-dev;
 + struct rcar_gen2_phy_platform_data *pdata;
 + struct rcar_gen2_usb_phy_priv *priv;
 + struct resource *res;
 + void __iomem *base;
 + struct clk *clk;
 + int retval;
 +
 + pdata = dev_get_platdata(pdev-dev);
 + if (!pdata) {
 + dev_err(dev, No platform data\n);
 + return -EINVAL;
 + }
 +
 + clk = devm_clk_get(pdev-dev, usbhs);
 + if (IS_ERR(clk)) {
 + dev_err(pdev-dev, Can't get the clock\n);
 + return PTR_ERR(clk);
 + }

This case (if you use usb_phy_rcar_gen2 driver),
you can use pm_runtime_xxx instead of clk_get/enable/disable()

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Re: [PATCH 3/3] arm: shmobile: lager: Add USBHS support

2013-10-07 Thread Kuninori Morimoto

Hi Valentine

 This adds USBHS PHY and registers USBHS device if the driver is enabled.
 
 Signed-off-by: Valentine Barshak valentine.bars...@cogentembedded.com
 ---
(snip)
 +/* USBHS */
 +#if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
 +static const struct resource usbhs_resources[] __initconst = {
 + DEFINE_RES_MEM(0xe659, 0x100),
 + DEFINE_RES_IRQ(gic_spi(107)),
 +};

Why it needs #if IS_ENABLED() ?
I guess nothing happen if renesas_usbhs driver
registered without CONFIG_USB_RENESAS_USBHS_UDC.
But am I misunderstanding ?
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Re: [PATCH v2 1/1] usb: gadget: f_fs: Add support for SuperSpeed Mode

2013-10-07 Thread Manu Gautam
On 10/2/2013 10:06 AM, Manu Gautam wrote:
 On 10/1/2013 8:07 PM, Felipe Balbi wrote:
 Hi,

 On Mon, Sep 30, 2013 at 02:31:50PM +0530, Manu Gautam wrote:
 On 9/28/2013 1:52 AM, Paul Zimmerman wrote:
 From: linux-usb-ow...@vger.kernel.org 
 [mailto:linux-usb-ow...@vger.kernel.org] On Behalf Of Manu Gautam
 Sent: Thursday, September 26, 2013 12:08 AM

 On 9/26/2013 2:10 AM, Felipe Balbi wrote:

 On Tue, Sep 24, 2013 at 03:00:20PM +0530, Manu Gautam wrote:
 Hi Felipe,

 I wanted to mention one point with respect to this patch: Below
 changes in the functionfs.h to add ss_count (super speed descriptors
 count) in desc_header (which is passed from userspace) make the driver
 incompatible with existing userspace applications compiled against old
 header file. Let me know if that is acceptable.  We are using this
 driver with Android for adbd (android debug bridge) and these changes
 are required to support adb over Super Speed controllers e.g. DWC3
 along with changed in adbd to pass SS EP and companion descriptors.

 Good you mentioned, it saves me the trouble of reviewing this patch :-)

 It's not acceptable to break userspace ABI at all. If you want
 SuperSpeed support on function fs, we need to figure out a way to do so
 without breaking userspace.

 This might mean adding a separate userspace interface to be used with
 superspeed. While at that, we might want to add a few bytes of reserved,
 unused space in our structures for situations where we need to add more
 data into it, just to make it slightly future proof.


 Thanks for your reply.
 As you suggested we can have a different interface for super speed
 which would be optional to workaround ABI compatibility issue.
 Let me know if below interface looks fine to you, I will then implement
 accordingly:

 Just a suggestion: Instead of a new interface for SuperSpeed, why not
 just add the new fields to the end of the ffs_data struct? And have the
 functions that copy the struct to/from userspace check the 'len' value
 passed in, and only handle the SuperSpeed stuff if the length indicates
 it is new userspace?


 Initially I thought on similar lines but then adding a new interface for
 SS looked cleaner to me. But, your suggestion also make sense as we can
 avoid extra system call and the same interface can be extended later.
 One more thing we can do is to add a magic number after hs_desc (i.e. at
 the end of existing ffs_data) to specify that ss_descriptors are following.
 This can be used by kernel driver to check if userspace is trying pass
 ss desc only or some invalid data. 
 Felipe: Your recommendation on this?

 We need to have some more people look at this. I remember there were
 always some concerns about Chris architecture when doing such changes.

 
 Can you please add appropriate folks to this thread who can check this as
 well?
 

I have CC'ed  Michal and Andrzej as they have contributed to this driver.
Followed is the interface enhancement that I am suggesting:

diff --git a/include/uapi/linux/usb/functionfs.h 
b/include/uapi/linux/usb/functionfs.h
index d6b0128..0f8f7be 100644
--- a/include/uapi/linux/usb/functionfs.h
+++ b/include/uapi/linux/usb/functionfs.h
@@ -13,6 +13,7 @@ enum {
FUNCTIONFS_STRINGS_MAGIC = 2
 };

+#define FUNCTIONFS_SS_DESC_MAGIC 0x0055DE5C

 #ifndef __KERNEL__

@@ -50,7 +51,11 @@ struct usb_functionfs_descs_head {
  * |  12 | hs_count  | LE32 | number of high-speed descriptors |
  * |  16 | fs_descrs | Descriptor[] | list of full-speed descriptors   |
  * | | hs_descrs | Descriptor[] | list of high-speed descriptors   |
+ * | | ss_magic  | LE32 | FUNCTIONFS_SS_DESC_MAGIC |
+ * | | ss_count  | LE32 | number of super-speed descriptors|
+ * | | ss_descrs | Descriptor[] | list of super-speed descriptors  |
  *
+ * ss_magic: if present then it implies that SS_DESCs are also present
  * descs are just valid USB descriptors and have the following format:
  *
  * | off | name| type | description  |



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