Re: [PATCH 3/3] usb: ohci-at91: use device managed clk retrieval
Hello Alan, On 03/12/2013 16:32, Alan Stern wrote: On Tue, 3 Dec 2013, Nicolas Ferre wrote: On 03/12/2013 15:07, Boris BREZILLON : Replace clk_get calls by devm_clk_get calls. Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com Tested-by: Robert Nelson robertcnel...@gmail.com Acked-by: Nicolas Ferre nicolas.fe...@atmel.com Thanks Boris for these fixes. Alan, Greg, can you take the whole series as fixes for 3.13? Signed-off-by: Alan Stern st...@rowland.harvard.edu Sorry, but I forgot to add your Signed-off-by in the 2nd version of this series. The patches look fine to me. But only the 1/3 patch fixes a bug; the others merely change the resource management. Do you want me to split this series ? 1) the 1st patch that should be merged in 3.13 2) patches 2 to 4 that might be applied later Best Regards, Boris Alan Stern -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 10/10] usb: chipidea: imx: Enable CI_HDRC_IMX_EHCI_QUIRK
On 12/04/2013 02:40 AM, Peter Chen wrote:
There are some re-work for this serial, I will do it.
But I don't get your mean why it needs to squash into another patch?
Let's look at the code again:
- if (imx_platform_flag-flags CI_HDRC_IMX_SUPPORT_RUNTIME_PM)
+ if (imx_platform_flag-flags CI_HDRC_IMX_SUPPORT_RUNTIME_PM) {
pdata.flags |= CI_HDRC_SUPPORTS_RUNTIME_PM;
data-supports_runtime_pm = true;
}
Without that patch, the driver will not compile.
before:
if ()
/* code */
}
after:
if () {
/* code */
}
Marc
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Re: [PATCH 1/4] usb: chipidea: msm: Add device tree binding information
Hi Peter,
Thank you for reviewing this patch.
On Wed, 2013-12-04 at 13:40 +0800, Peter Chen wrote:
On Mon, Nov 11, 2013 at 03:35:34PM +0200, Ivan T. Ivanov wrote:
From: Ivan T. Ivanov iiva...@mm-sol.com
Please add something in commit log
Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
Cc: devicet...@vger.kernel.org
---
.../devicetree/bindings/usb/msm-hsusb.txt | 16
1 file changed, 16 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/msm-hsusb.txt
b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
index 5ea26c6..0a85eba 100644
--- a/Documentation/devicetree/bindings/usb/msm-hsusb.txt
+++ b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
@@ -15,3 +15,19 @@ Example EHCI controller device node:
usb-phy = usb_otg;
};
+CI13xxx (Chipidea) USB controllers
+
We have already renamed ci13xxx to ci_hdrc.
Yes, but the chip is still CI13XXX. Freescale documentations is also
referring to actual chip family.
+Required properties:
+- compatible: should contain qcom,ci-hdrc
+- reg: offset and length of the register set in the
memory map
+- interrupts: interrupt-specifier for the controller interrupt.
+- usb-phy: phandle for the PHY device
+- dr_mode: Sould be peripheral
+
Please keep alignment for reg
It looks aligned in editor with smart-tab support.
Regards,
Ivan
Peter
+ gadget@f9a55000 {
+ compatible = qcom,ci-hdrc;
+ reg = 0xf9a55000 0x400;
+ dr_mode = peripheral;
+ interrupts = 0 134 0;
+ usb-phy = usb_otg;
+ };
\ No newline at end of file
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[PATCH 2/2] arm: nspire: modify device tree to use the nspire-usb driver
From: Daniel Tang dt.ta...@gmail.com
This patch adds the needed compatible key to the device tree for TI-Nspires.
Signed-off-by: Daniel Tang dt.ta...@gmail.com
---
arch/arm/boot/dts/nspire.dtsi |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/nspire.dtsi b/arch/arm/boot/dts/nspire.dtsi
index a22ffe6..baf7153 100644
--- a/arch/arm/boot/dts/nspire.dtsi
+++ b/arch/arm/boot/dts/nspire.dtsi
@@ -65,6 +65,7 @@
};
usb0: usb@B000 {
+ compatible = lsi,nspire-usb;
reg = 0xB000 0x1000;
interrupts = 8;
};
--
1.7.10.4
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Re: [PATCH 4/4] usb: chipidea: msm: Use USB PHY API to control PHY state
Hi Peter,
On Wed, 2013-12-04 at 13:37 +0800, Peter Chen wrote:
On Mon, Nov 11, 2013 at 04:36:09PM +0200, Ivan T. Ivanov wrote:
Hi Peter,
On Mon, 2013-11-11 at 21:59 +0800, Peter Chen wrote:
On Mon, Nov 11, 2013 at 03:35:37PM +0200, Ivan T. Ivanov wrote:
From: Ivan T. Ivanov iiva...@mm-sol.com
PHY drivers keep track of the current state of the hardware,
so don't change PHY settings under it.
Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
drivers/usb/chipidea/ci_hdrc_msm.c |9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c
b/drivers/usb/chipidea/ci_hdrc_msm.c
index e9624f3..338b209 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -20,13 +20,11 @@
static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned
event)
{
struct device *dev = ci-gadget.dev.parent;
- int val;
switch (event) {
case CI_HDRC_CONTROLLER_RESET_EVENT:
dev_dbg(dev, CI_HDRC_CONTROLLER_RESET_EVENT
received\n);
- writel(0, USB_AHBBURST);
- writel(0, USB_AHBMODE);
+ usb_phy_init(ci-transceiver);
It will reset the PHY, but your comment is don't change PHY settings
under it
:-). This function is exported by PHY drivers, so they will know how
to handle this change.
break;
case CI_HDRC_CONTROLLER_STOPPED_EVENT:
dev_dbg(dev, CI_HDRC_CONTROLLER_STOPPED_EVENT
received\n);
@@ -34,10 +32,7 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc
*ci, unsigned event)
* Put the transceiver in non-driving mode. Otherwise
host
* may not detect soft-disconnection.
*/
- val = usb_phy_io_read(ci-transceiver, ULPI_FUNC_CTRL);
- val = ~ULPI_FUNC_CTRL_OPMODE_MASK;
- val |= ULPI_FUNC_CTRL_OPMODE_NONDRIVING;
- usb_phy_io_write(ci-transceiver, val, ULPI_FUNC_CTRL);
+ usb_phy_notify_disconnect(ci-transceiver,
USB_SPEED_UNKNOWN);
Where you have implemented .notify_disconnect?
I have not found it at your phy driver.
Yep, I will post PHY driver changes shortly. Meanwhile this should
not break existing board file based platforms, because not of them
could be compiled (HTC Dream, Halibut Board) and DT based platforms
are sill work in progress.
Hi Ivan, I am going to apply this msm chipidea patchset, but the change
in this file is different with its original meaning.
What did you mean?
CI_HDRC_CONTROLLER_RESET_EVENT - usb_phy_init()
Take wherever actions are needed to put device in known state. ?
CI_HDRC_CONTROLLER_STOPPED_EVENT - usb_phy_notify_disconnect()
Emitted after ci-driver-disconnect(ci-gadget);
Probably I am missing something.
Have you
tested at existing platforms?
I have 8074 based DragonBoard which I used for testing.
CV Test Suite engine Chapter 9 tests are passing except
Halt Endpoint Test.
Regards,
Ivan
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Re: [PATCH 3/3] usb: phy-generic: Add ULPI VBUS support
Hi Chris,
On Wed, Dec 04, 2013 at 03:16:21PM +0800, Chris Ruehl wrote:
On Tuesday, December 03, 2013 04:15 PM, Heikki Krogerus wrote:
On Mon, Dec 02, 2013 at 03:05:19PM +0800, Chris Ruehl wrote:
@@ -154,6 +164,27 @@ int usb_phy_gen_create_phy(struct device *dev, struct
usb_phy_gen_xceiv *nop,
{
int err;
+ if (nop-ulpi_vbus 0) {
+ unsigned int flags = 0;
+
+ if (nop-ulpi_vbus 0x1)
+ flags |= ULPI_OTG_DRVVBUS;
+ if (nop-ulpi_vbus 0x2)
+ flags |= ULPI_OTG_DRVVBUS_EXT;
+ if (nop-ulpi_vbus 0x4)
+ flags |= ULPI_OTG_EXTVBUSIND;
+ if (nop-ulpi_vbus 0x8)
+ flags |= ULPI_OTG_CHRGVBUS;
+
+ nop-ulpi = otg_ulpi_create(ulpi_viewport_access_ops, flags);
+ if (!nop-ulpi) {
+ dev_err(dev, Failed create ULPI Phy\n);
+ return -ENOMEM;
+ }
+ dev_dbg(dev, Create ULPI Phy\n);
+ nop-ulpi-io_priv = nop-viewport;
+ }
This is so wrong. You are registering one kind of usb phy driver from
an other. Change drivers/usb/phy/ulpi.c to be a platform device. The
whole flag system in it is pretty horrid. While you are at it, change
that so it sets the values based on boolean flags from OF properties
or platform data.
NAK for the whole set.
Heikki,
Thanks for your comments, even not much positive to me.. any how.
My intention on the horrid path was to reduce kernel code where
one of_read32 vs. four of_boolean. And mentioned logic is simple.
But that's history.
I should probable explain why I have problems with them. First of all,
things like driving the vbus should be a function that can be called
from upper layers. struct usb_otg has the set_vbus hook for that. You
can call it for example from your host controller's init routine. I'm
assuming you have a host controller since you are driving vbus.
You don't need to set the ULPI_OTG_CHRGVBUS. It's used for the VBUS
pulsing of SRP, which btw. is not anymore supported in OTGEH2.0 spec,
so just don't use that bit even if you want to start SRP.
The only of_booleans you should need are for the DRV_VBUS_EXT and
USE_EXT_VBUS_IND. In my case I could not use even those. My controller
provides it's own control for them, so even if I set them to my ULPI
phy, the controller would simply override the values.
Secondly, why those silly flags in the first place. Those flags are
just bits in the registers. It would have been much easier and cleaner
to deliver a small struct with default values for the registers
instead.
On my way to find a solution for my board I'd look around and found using of
phy-ulpi.c functions in phy-tegra-usb.c and don't mind to use them too.
OK, IC. I have not followed what is happening with USB in linux for a
while.
The whole otg_ulpi_create() thing, and the flags with it, were
originally planned to be used from platform code. It's evil and it
should have never been accepted into upstream kernel. The time it was
introduced I was on vacation and nobody else seemed to care :(. All I
was able to do was to protest afterwards.
I accept your NAK and will work on a patch to make phy-ulpi.c
working as platform device.
Last question to you. What you don't like on the patch to support
chip-select gpio of my patch-set.. I ask because you NAK the whole
set.
I really need the ChipSelect function to make my hardware work!
OK, I did not explain my problem with that patch. I'm sorry about
that. It also looks like I made wrong assumption with it. I thought
that your phy (is was ISP1504 right) is just like isp1704 that I have
worked with. On isp1704 you only have the chip_sel pin (no reset pin),
so I thought you can not have any reason to add handler for an other
gpio to this driver. After a quick look at isp1504 data sheet, it
looks like you have both reset and chip_sel pins on it, which I guess
are both connected to gpios on your platform.
So I don't have a problem with that. Though I'm not sure is this
driver the right place to handle things like these gpios, which are
pretty phy specific, in the first place. The phy-generic was
originally meant to be pure NOP phy driver.
One comment about how to handle the gpios. You should move to the new
gpio descriptor API. The legacy gpio API is now just a wrapper on top
of it.
Chris
Thanks,
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Re: [PATCH v2 0/3] ARM: OMAP2+: USB Host bug fixes for 3.13 rc
On 2013-12-03 16:25, Roger Quadros wrote: Hi, This is a follow up solution to the original series in [1] The first patch fixes the OMAP4 Panda USB detection problems on 3.13-rc1 with u-boot v2013.10. The remaining 2 patches are required if SOFTRESET needs to be done for the USB Host module on OMAP3 platforms. Patch 2 fixes the hwmod RESET logic to prevent multiple SOFTRESETs being issued to the modules. This multiple SOFTRESET was causing problems with OMAP3 USB Host module. On Beagleboard C4 this is seen as failure to mount NFS root over external USB to Ethernet device. This might be the reason why HWMOD_INIT_NO_RESET was used for the OMAP USB host module in OMAP3 hwmod data and just carried forward in OMAP4 and OMAP5 hwmod data as well. cheers, -roger Tested on Panda and Beagle xM. Works fine for me. Tomi signature.asc Description: OpenPGP digital signature
Re: [PATCH] usb: phy-tegra-usb.c: wrong pointer check for remap UTMI
On Wed, Dec 04, 2013 at 10:02:44AM +0800, Chris Ruehl wrote: usb: phy-tegra-usb.c: wrong pointer check for remap UTMI A wrong pointer was used to test the result of devm_ioremap() Signed-off-by: Chris Ruehl chris.ru...@gtsys.com.hk Acked-by: Venu Byravarasu vbyravar...@nvidia.com --- drivers/usb/phy/phy-tegra-usb.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Thierry Reding tred...@nvidia.com pgpztN5vkmcF9.pgp Description: PGP signature
[PATCH v2 3/4] dt: exynos5420: Enable support for USB 3.0 PHY controller
Add device tree nodes for USB 3.0 PHY present alongwith
USB 3.0 controller Exynos 5420 SoC. This phy driver is
based on generic phy framework.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
arch/arm/boot/dts/exynos5420.dtsi | 20
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm/boot/dts/exynos5420.dtsi
index 09aa06c..a88ab00 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -31,6 +31,8 @@
i2c1 = i2c_1;
i2c2 = i2c_2;
i2c3 = i2c_3;
+ usb3phy0 = usb3_phy0;
+ usb3phy1 = usb3_phy1;
};
cpus {
@@ -310,4 +312,22 @@
clocks = clock 431, clock 143;
clock-names = mixer, sclk_hdmi;
};
+
+ usbphy@1210 {
+ compatible = samsung,exynos5420-usb3phy;
+ reg = 0x1210 0x100;
+ clocks = clock 366, clock 1, clock 152;
+ clock-names = phy, usb3phy_refclk, usb30_sclk_100m;
+ samsung,syscon-phandle = pmu_syscon;
+ #phy-cells = 0;
+ };
+
+ usbphy@1250 {
+ compatible = samsung,exynos5420-usb3phy;
+ reg = 0x1250 0x100;
+ clocks = clock 367, clock 1, clock 153;
+ clock-names = phy, usb3phy_refclk, usb30_sclk_100m;
+ samsung,syscon-phandle = pmu_syscon;
+ #phy-cells = 0;
+ };
};
--
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[PATCH v2 0/4] Add Exynos5 USB 3.0 phy driver based on generic PHY framework
Adding a phy driver for USB 3.0 PHY controller present on Exynos5 series of SoCs alongwith DWC3 controller for USB 3.0 operations. Few functions used in this driver to translate ref clock rate are common to Kamil's usb2.0 phy driver [1]. So we can figure out how to re-use them across these drivers. Theses patches are based on usb-next branch and tested with Kishon's patches for adapting DWC3 to generic phy framework, [2] on smdk5250 as well as smdk5420 board. [1] [PATCH v3 1/3] phy: Add new Exynos USB PHY driver https://lkml.org/lkml/2013/11/5/272 [2] [PATCH v2 1/7] usb: dwc3: get usb_phy only if the platform indicates the presence of PHY's (http://www.spinics.net/lists/linux-usb/msg95733.html) [PATCH v2 2/7] usb: dwc3: adapt dwc3 core to use Generic PHY Framework (http://www.spinics.net/lists/linux-usb/msg95734.html) Changed from RFC patch-set: 1) fixes in documentation file - added provision for syscon interface for using PMU register. - added clock names and description - modified description style for 'compatible property' - made usb30_sclk as additional clock rather then making it optional, since it is actually an additional clock for Exynos5420 Soc. 2) fixes in phy-exynos5-usb3 driver file - removed unnecessary #ifndef around KHZ and MHZ definitions - removed 'samsung_cpu_type', 'usb3phy_state' enums; and merged necessary necessary from 'usb3phy_instance' structure to 'usb3phy_driver'. - changed name 'sclk_usbphy30' to 'usb30_sclk_100m' since this is the name indicated as input to the PHY block; and also added (!IS_ERR()) check for using usb30_sclk. - removed unnecessary 'state' check code. - moved 'of_device_id' structure definitions before 'probe()' to avoid unnecessary declaration. - added (pdev-dev.of_node == NULL) check at the starting of probe() - moved 'devm_of_phy_provider_register()' call to end of the probe(). - removed 'label' for usb3drd phy. - corrected macros definition 'PHYCLKRST_MPLL_MULTIPLIER_50M_REF' from 0x02 to 0x32 after confirming same from PHY's data sheet. - replaced pmu register handling, used for power-isolation, with syscon interface api's. - added '.init' and '.exit' callbacks and using them for one time PHY-initialization and deinitialization. - Filtering out the PHY 'power-on' and 'power-off' sequence to '.power_on and .power_off callbacks. - Removed drivers/usb/phy/phy-samsung-usb3.c driver and related code. 3) fixes in dt files - added reference for 'samsung,syscon-phandle' to used for PMU register. - removed second register field which was earlier used for PMU. Vivek Gautam (4): phy: Add new Exynos5 USB 3.0 PHY driver dt: exynos5250: Enable support for generic USB 3.0 phy dt: exynos5420: Enable support for USB 3.0 PHY controller dt: exynos5420: Enable support for DWC3 controller .../devicetree/bindings/phy/samsung-phy.txt| 43 ++ arch/arm/boot/dts/exynos5250.dtsi | 16 +- arch/arm/boot/dts/exynos5420.dtsi | 54 ++ drivers/phy/Kconfig|8 + drivers/phy/Makefile |1 + drivers/phy/phy-exynos5-usb3.c | 545 drivers/usb/phy/Kconfig| 10 +- drivers/usb/phy/Makefile |1 - drivers/usb/phy/phy-samsung-usb.h | 80 --- drivers/usb/phy/phy-samsung-usb3.c | 350 - 10 files changed, 658 insertions(+), 450 deletions(-) create mode 100644 drivers/phy/phy-exynos5-usb3.c delete mode 100644 drivers/usb/phy/phy-samsung-usb3.c -- 1.7.6.5 -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 4/4] dt: exynos5420: Enable support for DWC3 controller
Add device tree nodes for DWC3 controller present on
Exynos 5420 SoC, to enable support for USB 3.0.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
arch/arm/boot/dts/exynos5420.dtsi | 38 +++-
1 files changed, 36 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm/boot/dts/exynos5420.dtsi
index a88ab00..0554a68 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -313,7 +313,24 @@
clock-names = mixer, sclk_hdmi;
};
- usbphy@1210 {
+ usb@1200 {
+ compatible = samsung,exynos5250-dwusb3;
+ clocks = clock 366;
+ clock-names = usbdrd30;
+ #address-cells = 1;
+ #size-cells = 1;
+ ranges;
+
+ dwc3 {
+ compatible = synopsys,dwc3;
+ reg = 0x1200 0x1;
+ interrupts = 0 72 0;
+ phys = usb3_phy0;
+ phy-names = usb3-phy;
+ };
+ };
+
+ usb3_phy0: usbphy@1210 {
compatible = samsung,exynos5420-usb3phy;
reg = 0x1210 0x100;
clocks = clock 366, clock 1, clock 152;
@@ -322,7 +339,24 @@
#phy-cells = 0;
};
- usbphy@1250 {
+ usb@1240 {
+ compatible = samsung,exynos5250-dwusb3;
+ clocks = clock 367;
+ clock-names = usbdrd30;
+ #address-cells = 1;
+ #size-cells = 1;
+ ranges;
+
+ dwc3 {
+ compatible = synopsys,dwc3;
+ reg = 0x1240 0x1;
+ interrupts = 0 73 0;
+ phys = usb3_phy1;
+ phy-names = usb3-phy;
+ };
+ };
+
+ usb3_phy1: usbphy@1250 {
compatible = samsung,exynos5420-usb3phy;
reg = 0x1250 0x100;
clocks = clock 367, clock 1, clock 153;
--
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[PATCH v2 1/4] phy: Add new Exynos5 USB 3.0 PHY driver
Add a new driver for the USB 3.0 PHY on Exynos5 series of SoCs.
The new driver uses the generic PHY framework and will interact
with DWC3 controller present on Exynos5 series of SoCs.
Thereby, removing old phy-samsung-usb3 driver and related code
used untill now which was based on usb/phy framework.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
.../devicetree/bindings/phy/samsung-phy.txt| 43 ++
drivers/phy/Kconfig|8 +
drivers/phy/Makefile |1 +
drivers/phy/phy-exynos5-usb3.c | 545
drivers/usb/phy/Kconfig| 10 +-
drivers/usb/phy/Makefile |1 -
drivers/usb/phy/phy-samsung-usb.h | 80 ---
drivers/usb/phy/phy-samsung-usb3.c | 350 -
8 files changed, 598 insertions(+), 440 deletions(-)
create mode 100644 drivers/phy/phy-exynos5-usb3.c
delete mode 100644 drivers/usb/phy/phy-samsung-usb3.c
diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt
b/Documentation/devicetree/bindings/phy/samsung-phy.txt
index c0fccaa..bcd95dd 100644
--- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
+++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
@@ -20,3 +20,46 @@ Required properties:
- compatible : should be samsung,exynos5250-dp-video-phy;
- reg : offset and length of the Display Port PHY register set;
- #phy-cells : from the generic PHY bindings, must be 0;
+
+Samsung Exynos5 SoC series USB 3.0 PHY controller
+--
+
+Required properties:
+- compatible : Should be set to one of the following supported values:
+ - samsung,exynos5250-usb3phy - for exynos5250 SoC,
+ - samsung,exynos5420-usb3phy - for exynos5420 SoC.
+- reg : Register offset and length of USB 3.0 PHY register set;
+- clocks: Clock IDs array as required by the controller
+- clock-names: names of clocks correseponding to IDs in the clock property;
+ Required clocks:
+ - phy: main PHY clock (same as USB 3.0 controller IP clock),
+used for register access.
+ - usb3phy_refclk: PHY's reference clock (usually crystal clock),
associated
+ by phy name, used to determine bit values for clock
+ settings register.
+ Additional clock required for Exynos5420:
+ - usb30_sclk_100m: Additional special clock used for PHY operation
+ depicted as 'sclk_usbphy30' in CMU of Exynos5420.
+- samsung,syscon-phandle: phandle for syscon interface, which is used to
+ control pmu registers for power isolation.
+- #phy-cells : from the generic PHY bindings, must be 0;
+
+Example:
+ usb3_phy: usbphy@1210 {
+ compatible = samsung,exynos5250-usb3phy;
+ reg = 0x1210 0x100;
+ clocks = clock 286, clock 1;
+ clock-names = phy, usb3phy_refclk;
+ samsung,syscon-phandle = pmu_syscon;
+ #phy-cells = 0;
+ };
+
+- aliases: For SoCs like Exynos5420 having multiple USB PHY controllers,
+ 'usb3_phy' nodes should have numbered alias in the aliases node,
+ in the form of usb3phyN, N = 0, 1... (depending on number of
+ controllers).
+Example:
+ aliases {
+ usb3phy0 = usb3_phy0;
+ usb3phy1 = usb3_phy1;
+ };
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index a344f3d..67e9045 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -51,4 +51,12 @@ config PHY_EXYNOS_DP_VIDEO
help
Support for Display Port PHY found on Samsung EXYNOS SoCs.
+config PHY_EXYNOS5_USB3
+ tristate Exynos5 SoC series USB 3.0 PHY driver
+ depends on ARCH_EXYNOS5
+ select GENERIC_PHY
+ select MFD_SYSCON
+ help
+ Enable USB 3.0 PHY support for Exynos 5 SoC series
+
endmenu
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index d0caae9..9c06a61 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -7,3 +7,4 @@ obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO) += phy-exynos-dp-video.o
obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO)+= phy-exynos-mipi-video.o
obj-$(CONFIG_OMAP_USB2)+= phy-omap-usb2.o
obj-$(CONFIG_TWL4030_USB) += phy-twl4030-usb.o
+obj-$(CONFIG_PHY_EXYNOS5_USB3) += phy-exynos5-usb3.o
diff --git a/drivers/phy/phy-exynos5-usb3.c b/drivers/phy/phy-exynos5-usb3.c
new file mode 100644
index 000..2bafc9d
--- /dev/null
+++ b/drivers/phy/phy-exynos5-usb3.c
@@ -0,0 +1,545 @@
+/*
+ * Samsung EXYNOS5 SoC series USB 3.0 PHY driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Author: Vivek Gautam gautam.vi...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free
[PATCH RESEND] dma: cppi41: only allocate descriptor memory once
cdd-cd and cdd-descs_phys are allocated DESCS_AREAS times from
init_descs() and freed as often from purge_descs(). This doesn't cause
any trouble as DESCS_AREAS is ensured to be 1, but it looks wrong to
do the (de)allocation inside the loop.
While at it, remove the intermediate variable mem_decs (I guess it was
only there to make the code comply to the 80-chars CodingSytle rule).
Signed-off-by: Daniel Mack zon...@gmail.com
---
Hi Vinod,
Hi Sebastian,
I know we discussed that patch before, but AFAIR, there was no
conclusion. Could we have another look please?
As mentioned, I still think the current code looks wrong, even though it
doesn't harm because DESCS_AREAS is always 1, as ensured by
BUILD_BUG_ON(DESCS_AREAS != 1).
Still, calling dma_{alloc,free}_coherent inside the loop without the
loop variable anywhere in the assigned pointer really smells like
a memory leak or double-free, respectively, doesn't it? :)
Many thanks,
Daniel
drivers/dma/cppi41.c | 25 ++---
1 file changed, 10 insertions(+), 15 deletions(-)
diff --git a/drivers/dma/cppi41.c b/drivers/dma/cppi41.c
index c29dacf..896252f 100644
--- a/drivers/dma/cppi41.c
+++ b/drivers/dma/cppi41.c
@@ -719,13 +719,12 @@ static void purge_descs(struct device *dev, struct
cppi41_dd *cdd)
mem_decs = ALLOC_DECS_NUM * sizeof(struct cppi41_desc);
for (i = 0; i DESCS_AREAS; i++) {
-
cppi_writel(0, cdd-qmgr_mem + QMGR_MEMBASE(i));
cppi_writel(0, cdd-qmgr_mem + QMGR_MEMCTRL(i));
-
- dma_free_coherent(dev, mem_decs, cdd-cd,
- cdd-descs_phys);
}
+
+ dma_free_coherent(dev, ALLOC_DECS_NUM * sizeof(struct cppi41_desc),
+ cdd-cd, cdd-descs_phys);
}
static void disable_sched(struct cppi41_dd *cdd)
@@ -747,8 +746,7 @@ static void deinit_cppi41(struct device *dev, struct
cppi41_dd *cdd)
static int init_descs(struct device *dev, struct cppi41_dd *cdd)
{
- unsigned int desc_size;
- unsigned int mem_decs;
+ unsigned int desc_size = sizeof(struct cppi41_desc);
int i;
u32 reg;
u32 idx;
@@ -757,28 +755,25 @@ static int init_descs(struct device *dev, struct
cppi41_dd *cdd)
(sizeof(struct cppi41_desc) - 1));
BUILD_BUG_ON(sizeof(struct cppi41_desc) 32);
BUILD_BUG_ON(ALLOC_DECS_NUM 32);
+ BUILD_BUG_ON(DESCS_AREAS != 1);
- desc_size = sizeof(struct cppi41_desc);
- mem_decs = ALLOC_DECS_NUM * desc_size;
+ cdd-cd = dma_alloc_coherent(dev, ALLOC_DECS_NUM * desc_size,
+cdd-descs_phys, GFP_KERNEL);
+ if (!cdd-cd)
+ return -ENOMEM;
idx = 0;
for (i = 0; i DESCS_AREAS; i++) {
-
reg = idx QMGR_MEMCTRL_IDX_SH;
reg |= (ilog2(desc_size) - 5) QMGR_MEMCTRL_DESC_SH;
reg |= ilog2(ALLOC_DECS_NUM) - 5;
- BUILD_BUG_ON(DESCS_AREAS != 1);
- cdd-cd = dma_alloc_coherent(dev, mem_decs,
- cdd-descs_phys, GFP_KERNEL);
- if (!cdd-cd)
- return -ENOMEM;
-
cppi_writel(cdd-descs_phys, cdd-qmgr_mem + QMGR_MEMBASE(i));
cppi_writel(reg, cdd-qmgr_mem + QMGR_MEMCTRL(i));
idx += ALLOC_DECS_NUM;
}
+
return 0;
}
--
1.8.4.2
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Re: [PATCH 1/2] usb: chipidea: fix mistake in device tree binding of nspire-usb to use vendor name 'lsi' instead of SoC name 'zevio'
On Wed, Dec 04, 2013 at 09:20:07AM +, dt.ta...@gmail.com wrote: From: Daniel Tang dt.ta...@gmail.com The SoC name was mistakenly used instead of the vendor name in the device tree binding for nspire-usb. This patch fixes this before the driver becomes widely adopted. How widely adopted is it so far? I can't see the binding in mainline yet. Signed-off-by: Daniel Tang dt.ta...@gmail.com --- Documentation/devicetree/bindings/usb/ci-hdrc-nspire.txt |4 ++-- drivers/usb/chipidea/ci_hdrc_nspire.c|2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-nspire.txt b/Documentation/devicetree/bindings/usb/ci-hdrc-nspire.txt index 5ba8e90..ef1fcbf 100644 --- a/Documentation/devicetree/bindings/usb/ci-hdrc-nspire.txt +++ b/Documentation/devicetree/bindings/usb/ci-hdrc-nspire.txt @@ -1,7 +1,7 @@ * TI-Nspire USB OTG Controller Required properties: -- compatible: Should be zevio,nspire-usb +- compatible: Should be lsi,nspire-usb Surely this should be lsi,zevio-usb, matching the lsi,zevio-timer binding? Thanks, Mark. -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: 3.13-rc2 phy-twl4030-usb.c - Timeout setting T2 HSUSB PHY DPLL
+Kishon On 12/03/2013 11:33 PM, Belisko Marek wrote: Hi, current 3.13-rcX break usb support on gta04 board (similar to beagleboard) when booting via board file. In console we can see messages: [ 5227.287841] twl4030_usb twl4030_usb: Timeout setting T2 HSUSB PHY DPLL clock [ 5232.936096] omap_musb_mailbox: musb core is not yet ready [ 5233.958160] twl4030_usb twl4030_usb: Timeout setting T2 HSUSB PHY DPLL clock [ 5235.058227] twl4030_usb twl4030_usb: Timeout setting T2 HSUSB PHY DPLL clock Any pointer what could cause that? (in 3.12 usb works fine) BR, marek -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 2/4] dt: exynos5250: Enable support for generic USB 3.0 phy
Hi,
Does the old phy-samsung-usb3 driver currently work on Exynos5250? If yes,
then this patch should be merged with patch #1 to preserve bisectability.
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung RD Institute Poland
Samsung Electronics
On Wednesday, December 04, 2013 03:39:05 PM Vivek Gautam wrote:
Update device tree bindings for DWC3 controller and
USB 3.0 phy present on Exynos 5250 SoC, to start using
the phy driver based on generic phy framework.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
arch/arm/boot/dts/exynos5250.dtsi | 16 ++--
1 files changed, 6 insertions(+), 10 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 9db5047..7444717 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -475,22 +475,18 @@
compatible = synopsys,dwc3;
reg = 0x1200 0x1;
interrupts = 0 72 0;
- usb-phy = usb2_phy usb3_phy;
+ phys = usb3_phy;
+ phy-names = usb3-phy;
};
};
usb3_phy: usbphy@1210 {
compatible = samsung,exynos5250-usb3phy;
reg = 0x1210 0x100;
- clocks = clock 1, clock 286;
- clock-names = ext_xtal, usbdrd30;
- #address-cells = 1;
- #size-cells = 1;
- ranges;
-
- usbphy-sys {
- reg = 0x10040704 0x8;
- };
+ clocks = clock 286, clock 1;
+ clock-names = phy, usb3phy_refclk;
+ samsung,syscon-phandle = pmu_syscon;
+ #phy-cells = 0;
};
usb@1211 {
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Re: [PATCH RESEND] dma: cppi41: only allocate descriptor memory once
On Wed, Dec 04, 2013 at 11:21 +0100, Daniel Mack wrote: While at it, remove the intermediate variable mem_decs (I guess it was only there to make the code comply to the 80-chars CodingSytle rule). purge_descs() still has a (now unused) mem_decs intermediate variable. Regards, Steve -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 10/10] usb: chipidea: imx: Enable CI_HDRC_IMX_EHCI_QUIRK
On Wed, Dec 04, 2013 at 09:33:26AM +0100, Marc Kleine-Budde wrote:
On 12/04/2013 02:40 AM, Peter Chen wrote:
There are some re-work for this serial, I will do it.
But I don't get your mean why it needs to squash into another patch?
Let's look at the code again:
- if (imx_platform_flag-flags CI_HDRC_IMX_SUPPORT_RUNTIME_PM)
+ if (imx_platform_flag-flags CI_HDRC_IMX_SUPPORT_RUNTIME_PM) {
pdata.flags |= CI_HDRC_SUPPORTS_RUNTIME_PM;
data-supports_runtime_pm = true;
}
Without that patch, the driver will not compile.
before:
if ()
/* code */
}
after:
if () {
/* code */
}
Marc
--
Oh, thanks. I need to sqhash [7/10] and [10/10]
--
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Re: [PATCH 4/4] usb: chipidea: msm: Use USB PHY API to control PHY state
On Wed, Dec 04, 2013 at 11:35:54AM +0200, Ivan T. Ivanov wrote:
Hi Peter,
On Wed, 2013-12-04 at 13:37 +0800, Peter Chen wrote:
On Mon, Nov 11, 2013 at 04:36:09PM +0200, Ivan T. Ivanov wrote:
Hi Peter,
On Mon, 2013-11-11 at 21:59 +0800, Peter Chen wrote:
On Mon, Nov 11, 2013 at 03:35:37PM +0200, Ivan T. Ivanov wrote:
From: Ivan T. Ivanov iiva...@mm-sol.com
PHY drivers keep track of the current state of the hardware,
so don't change PHY settings under it.
Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
drivers/usb/chipidea/ci_hdrc_msm.c |9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c
b/drivers/usb/chipidea/ci_hdrc_msm.c
index e9624f3..338b209 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -20,13 +20,11 @@
static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned
event)
{
struct device *dev = ci-gadget.dev.parent;
- int val;
switch (event) {
case CI_HDRC_CONTROLLER_RESET_EVENT:
dev_dbg(dev, CI_HDRC_CONTROLLER_RESET_EVENT
received\n);
- writel(0, USB_AHBBURST);
- writel(0, USB_AHBMODE);
+ usb_phy_init(ci-transceiver);
It will reset the PHY, but your comment is don't change PHY settings
under it
:-). This function is exported by PHY drivers, so they will know how
to handle this change.
break;
case CI_HDRC_CONTROLLER_STOPPED_EVENT:
dev_dbg(dev, CI_HDRC_CONTROLLER_STOPPED_EVENT
received\n);
@@ -34,10 +32,7 @@ static void ci_hdrc_msm_notify_event(struct
ci_hdrc *ci, unsigned event)
* Put the transceiver in non-driving mode. Otherwise
host
* may not detect soft-disconnection.
*/
- val = usb_phy_io_read(ci-transceiver, ULPI_FUNC_CTRL);
- val = ~ULPI_FUNC_CTRL_OPMODE_MASK;
- val |= ULPI_FUNC_CTRL_OPMODE_NONDRIVING;
- usb_phy_io_write(ci-transceiver, val, ULPI_FUNC_CTRL);
+ usb_phy_notify_disconnect(ci-transceiver,
USB_SPEED_UNKNOWN);
Where you have implemented .notify_disconnect?
I have not found it at your phy driver.
Yep, I will post PHY driver changes shortly. Meanwhile this should
not break existing board file based platforms, because not of them
could be compiled (HTC Dream, Halibut Board) and DT based platforms
are sill work in progress.
Hi Ivan, I am going to apply this msm chipidea patchset, but the change
in this file is different with its original meaning.
What did you mean?
CI_HDRC_CONTROLLER_RESET_EVENT - usb_phy_init()
Take wherever actions are needed to put device in known state. ?
At current code, it only sets two AHB parameters which should be only related
to controller but your patch init the whole PHY, look at msm_otg_reset,
it does many other things, like phy reset, controller reset, etc.
Does the partial otg fsm at msm_otg_sm_work will be called or not? If it is
not called, then, it is OK you just use msm_otg_reset here.
CI_HDRC_CONTROLLER_STOPPED_EVENT - usb_phy_notify_disconnect()
Emitted after ci-driver-disconnect(ci-gadget);
I just see your [PATCH v4 14/15] usb: phy: msm: Handle disconnect events,
then, it is ok now. By the way, do I need to wait your phy patches are queued,
otherwise, it may not work?
Probably I am missing something.
Have you
tested at existing platforms?
I have 8074 based DragonBoard which I used for testing.
CV Test Suite engine Chapter 9 tests are passing except
Halt Endpoint Test.
I mean with your patch, the old non-dt platform can work or not?
--
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Peter Chen
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Re: [PATCH 1/2] usb: chipidea: fix mistake in device tree binding of nspire-usb to use vendor name 'lsi' instead of SoC name 'zevio'
On Wed, Dec 04, 2013 at 08:20:07PM +1100, dt.ta...@gmail.com wrote:
From: Daniel Tang dt.ta...@gmail.com
The SoC name was mistakenly used instead of the vendor name in the
device tree binding for nspire-usb.
This patch fixes this before the driver becomes widely adopted.
Signed-off-by: Daniel Tang dt.ta...@gmail.com
---
Documentation/devicetree/bindings/usb/ci-hdrc-nspire.txt |4 ++--
drivers/usb/chipidea/ci_hdrc_nspire.c|2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-nspire.txt
b/Documentation/devicetree/bindings/usb/ci-hdrc-nspire.txt
index 5ba8e90..ef1fcbf 100644
--- a/Documentation/devicetree/bindings/usb/ci-hdrc-nspire.txt
+++ b/Documentation/devicetree/bindings/usb/ci-hdrc-nspire.txt
@@ -1,7 +1,7 @@
* TI-Nspire USB OTG Controller
Required properties:
-- compatible: Should be zevio,nspire-usb
+- compatible: Should be lsi,nspire-usb
lsi is vendor name, what are zevio and nspire?
Usually, the compatible string should be vendor_name,soc_name-module_name
- reg: Should contain registers location and length
- interrupts: Should contain controller interrupt
@@ -11,7 +11,7 @@ Recommended properies:
Examples:
usb0: usb@B000 {
reg = 0xB000 0x1000;
- compatible = zevio,nspire-usb;
+ compatible = lsi,nspire-usb;
interrupts = 8;
vbus-supply = vbus_reg;
};
diff --git a/drivers/usb/chipidea/ci_hdrc_nspire.c
b/drivers/usb/chipidea/ci_hdrc_nspire.c
index 517ce41..c5c2dde 100644
--- a/drivers/usb/chipidea/ci_hdrc_nspire.c
+++ b/drivers/usb/chipidea/ci_hdrc_nspire.c
@@ -52,7 +52,7 @@ static int ci_hdrc_nspire_remove(struct platform_device
*pdev)
}
static const struct of_device_id ci_hdrc_nspire_dt_ids[] = {
- { .compatible = zevio,nspire-usb, },
+ { .compatible = lsi,nspire-usb, },
{ /* sentinel */ }
};
--
1.7.10.4
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--
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Peter Chen
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Re: [PATCH v2 1/2] usb: chipidea: usbmisc: Add support for i.MX27/i.MX31 CPUs
On Tue, Nov 26, 2013 at 07:36:49PM +0400, Alexander Shiyan wrote:
This adds i.MX27 and i.MX31 as the next user of the usbmisc driver.
Signed-off-by: Alexander Shiyan shc_w...@mail.ru
---
drivers/usb/chipidea/usbmisc_imx.c | 42
++
1 file changed, 42 insertions(+)
diff --git a/drivers/usb/chipidea/usbmisc_imx.c
b/drivers/usb/chipidea/usbmisc_imx.c
index 8a1094b..4381c5a6 100644
--- a/drivers/usb/chipidea/usbmisc_imx.c
+++ b/drivers/usb/chipidea/usbmisc_imx.c
@@ -21,6 +21,10 @@
#define MX25_USB_PHY_CTRL_OFFSET 0x08
#define MX25_BM_EXTERNAL_VBUS_DIVIDERBIT(23)
+#define MX27_H1_PM_BIT BIT(8)
+#define MX27_H2_PM_BIT BIT(16)
+#define MX27_OTG_PM_BIT BIT(24)
+
#define MX53_USB_OTG_PHY_CTRL_0_OFFSET 0x08
#define MX53_USB_UH2_CTRL_OFFSET 0x14
#define MX53_USB_UH3_CTRL_OFFSET 0x18
@@ -68,6 +72,36 @@ static int usbmisc_imx25_post(struct imx_usbmisc_data
*data)
return 0;
}
+static int usbmisc_imx27_init(struct imx_usbmisc_data *data)
+{
+ unsigned long flags;
+ u32 val;
+
+ switch (data-index) {
+ case 0:
+ val = MX27_OTG_PM_BIT;
+ break;
+ case 1:
+ val = MX27_H1_PM_BIT;
+ break;
+ case 2:
+ val = MX27_H2_PM_BIT;
+ break;
+ default:
+ return -EINVAL;
+ };
+
+ spin_lock_irqsave(usbmisc-lock, flags);
+ if (data-disable_oc)
+ val = readl(usbmisc-base) | val;
+ else
+ val = readl(usbmisc-base) ~val;
+ writel(val, usbmisc-base);
+ spin_unlock_irqrestore(usbmisc-lock, flags);
+
+ return 0;
+}
+
static int usbmisc_imx53_init(struct imx_usbmisc_data *data)
{
void __iomem *reg = NULL;
@@ -128,6 +162,10 @@ static const struct usbmisc_ops imx25_usbmisc_ops = {
.post = usbmisc_imx25_post,
};
+static const struct usbmisc_ops imx27_usbmisc_ops = {
+ .init = usbmisc_imx27_init,
+};
+
static const struct usbmisc_ops imx53_usbmisc_ops = {
.init = usbmisc_imx53_init,
};
@@ -162,6 +200,10 @@ static const struct of_device_id usbmisc_imx_dt_ids[] = {
.data = imx25_usbmisc_ops,
},
{
+ .compatible = fsl,imx27-usbmisc,
+ .data = imx27_usbmisc_ops,
+ },
+ {
.compatible = fsl,imx53-usbmisc,
.data = imx53_usbmisc_ops,
},
--
1.8.3.2
Applied, thanks.
--
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Re: [PATCH v2 2/2] usb: chipidea: usbmisc: Add support for i.MX51 CPU
On Tue, Nov 26, 2013 at 07:36:50PM +0400, Alexander Shiyan wrote:
This adds i.MX51 as the next user of the usbmisc driver.
Functionality is similar to i.MX53, so at this stage simply
reuse existing i.MX53 calls.
Signed-off-by: Alexander Shiyan shc_w...@mail.ru
---
drivers/usb/chipidea/usbmisc_imx.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/usb/chipidea/usbmisc_imx.c
b/drivers/usb/chipidea/usbmisc_imx.c
index 4381c5a6..cd061ab 100644
--- a/drivers/usb/chipidea/usbmisc_imx.c
+++ b/drivers/usb/chipidea/usbmisc_imx.c
@@ -204,6 +204,10 @@ static const struct of_device_id usbmisc_imx_dt_ids[] = {
.data = imx27_usbmisc_ops,
},
{
+ .compatible = fsl,imx51-usbmisc,
+ .data = imx53_usbmisc_ops,
+ },
+ {
.compatible = fsl,imx53-usbmisc,
.data = imx53_usbmisc_ops,
},
--
1.8.3.2
Applied, thanks.
--
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Re: [PATCH RFC 1/4] phy: Add new Exynos5 USB 3.0 PHY driver
Hi Vivek, On Wednesday 20 November 2013 09:14 PM, Kishon Vijay Abraham I wrote: Hi, On Wednesday 20 November 2013 03:02 PM, Vivek Gautam wrote: On Wed, Nov 20, 2013 at 2:34 PM, Kishon Vijay Abraham I kis...@ti.com wrote: On Wednesday 20 November 2013 02:27 PM, Vivek Gautam wrote: Hi Kishon, On Mon, Nov 11, 2013 at 4:41 PM, Kishon Vijay Abraham I kis...@ti.com wrote: Hi, sorry for the delayed response. On Wednesday 06 November 2013 05:37 AM, Jingoo Han wrote: On Wednesday, November 06, 2013 2:58 AM, Vivek Gautam wrote: On Tue, Nov 5, 2013 at 5:33 PM, Jingoo Han jg1@samsung.com wrote: [.] USB3.0 PHY consists of two blocks such as 3.0 block and 2.0 block. This USB3.0 PHY can support UTMI+ and PIPE3 interface for 3.0 block and 2.0 block, respectively. Conclusion: 1) USB2.0 PHY: USB2.0 HOST, USB2.0 Device Base address: 0x1213 2) USB3.0 PHY: USB3.0 DRD (3.0 HOST 3.0 Device) Base address: 0x1210 2.0 block(UTMI+) 3.0 block(PIPE3) And this is of course the PHY used by DWC3 controller, which works at both High speed as well as Super Speed. Right ? Right. While 3.0 block(PIPE3) can be used for Super Speed, 2.0 block(UTMI+) can be used for High speed. It should then come under *single IP muliple PHY* category similar to what Sylwester has done. Do you mean that i should be including PHY IDs for UTMI+ phy and PIPE3 phy present in this PHY block ? AFAICS the two phys (UTMI+ and PIPE3) do not really have separate registers to program, and that's the reason we program the entire PHY in a shot. you mean you program the same set of bits for UTMI+ and PIPE3? No, looking closely into PHY datasheet as well as Exynos5250 manual, i can see that UTMI+ and PIPE3 phys have separate bit settings. So i think we should be able to segregate the two PHYs (UTMI+ and PIPE3). Pardon me for my earlier observations. no problem.. Let me clarify more with our h/w team also on this and then i will confirm with this. Did you get more information on this? Thanks Kishon -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 04/10] usb: dwc3: use quirks to know if a particualr platform doesn't have PHY
Hi guys, Kishon, sorry I did not see this v3 set. On Mon, Nov 25, 2013 at 03:31:24PM +0530, Kishon Vijay Abraham I wrote: There can be systems which does not have an external phy, so get phy only if no quirks are added that indicates the PHY is not present. Introduced two quirk flags to indicate the *absence* of usb2 phy and usb3 phy. Also remove checking if return value is -ENXIO since it's now changed to always enable usb_phy layer. Can you guys explain why is something like this needed? Like with clocks and gpios, the device drivers shouldn't need to care any more if the platform has the phys or not. -ENODEV tells you your platform does not have them, so go ahead and continue when getting the phy. I just tested removing the phy registering from dwc3-pci.c and all I had to do was to add IS_ERR(phy) checks where the old usb phys were used and everything worked fine? What am I missing? Br, -- heikki -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/3] usb: ohci-at91: use device managed clk retrieval
On Wed, 4 Dec 2013, boris brezillon wrote: The patches look fine to me. But only the 1/3 patch fixes a bug; the others merely change the resource management. Do you want me to split this series ? 1) the 1st patch that should be merged in 3.13 2) patches 2 to 4 that might be applied later That probably would make Greg happier. Alan Stern -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] usb: core: Abort deauthorization if unsetting configuration fails
On Tue, 3 Dec 2013, Julius Werner wrote: usb_deauthorize_device() tries to unset the configuration of a USB device and then unconditionally blows away the configuration descriptors with usb_destroy_configuration(). This is bad if the usb_set_configuration() call failed before the configuration could be correctly unset, since pointers like udev-actconfig can keep pointing to the now invalid memory. We have encountered hard to reproduce crashes from devices disconnected during suspend due to this, where khubd's disconnect handling races with userspace tools that change authorization on resume. This patch ensures that usb_deauthorize_device() aborts when usb_set_configuration() fails, and the underlying status code (such as ENODEV) is returned to userspace. I don't like this approach at all. It should always be possible to deauthorize a device, no matter what. Instead, how about changing usb_set_configuration() so that it will never fail when the new config is -1? Except perhaps for -ENODEV errors (the device has been disconnected), which usb_deauthorize_device() could check for. Alan Stern -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v6 1/3] usb: ehci: add freescale imx28 special write register method
On Wed, Dec 04, 2013 at 07:10:42AM +, Peter Chen wrote: On Tue, Nov 26, 2013 at 08:11:26PM +0800, Peter Chen wrote: According to Freescale imx28 Errata, ENGR119653 USB: ARM to USB register error issue, All USB register write operations must use the ARM SWP instruction. So, we implement a special ehci_write for imx28. Discussion for it at below: http://marc.info/?l=linux-usbm=137996395529294w=2 Signed-off-by: Peter Chen peter.c...@freescale.com Acked-by: Alan Stern st...@rowland.harvard.edu Signed-off-by: Marc Kleine-Budde m...@pengutronix.de --- drivers/usb/host/ehci.h | 18 +- 1 files changed, 17 insertions(+), 1 deletions(-) Hi Greg, will you apply this patch to your 3.13-rcX? I will take the other two at this patchset. Hi Greg, if possible, I can apply this patch. The compile error will occur if I only apply the [2/3] and [3/3]. Ok, that's fine with me, please do so. greg k-h -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/3] usb: ohci-at91: use device managed clk retrieval
On 13-12-04 04:21 PM, Alan Stern wrote: On Wed, 4 Dec 2013, boris brezillon wrote: The patches look fine to me. But only the 1/3 patch fixes a bug; the others merely change the resource management. Do you want me to split this series ? 1) the 1st patch that should be merged in 3.13 2) patches 2 to 4 that might be applied later That probably would make Greg happier. Putting my initial reporter hat on, USB OHCI is completely broken in lk 3.13.0 rc1 and rc2 for AT91 family members. So it is difficult to make the situation worse. IMO the whole 4 patches should go in, since it only impacts that family. Also the kernel is more than a month away from release. Perhaps the naysayers should be looking around for whatever else the of/irq: Pass trigger type in IRQ resource flags patch has broken. Doug Gilbert -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/3] usb: ohci-at91: use device managed clk retrieval
2013/12/4 Douglas Gilbert dgilb...@interlog.com: On 13-12-04 04:21 PM, Alan Stern wrote: On Wed, 4 Dec 2013, boris brezillon wrote: The patches look fine to me. But only the 1/3 patch fixes a bug; the others merely change the resource management. Do you want me to split this series ? 1) the 1st patch that should be merged in 3.13 2) patches 2 to 4 that might be applied later That probably would make Greg happier. Putting my initial reporter hat on, USB OHCI is completely broken in lk 3.13.0 rc1 and rc2 for AT91 family members. So it is difficult to make the situation worse. IMO the whole 4 patches should go in, since it only impacts that family. Also the kernel is more than a month away from release. Perhaps the naysayers should be looking around for whatever else the of/irq: Pass trigger type in IRQ resource flags patch has broken. ...or rather whatever brokenness it has uncovered. Best regards, Tomasz -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH RESEND] dma: cppi41: only allocate descriptor memory once
On 12/04/2013 12:51 PM, Steve Cotton wrote: On Wed, Dec 04, 2013 at 11:21 +0100, Daniel Mack wrote: While at it, remove the intermediate variable mem_decs (I guess it was only there to make the code comply to the 80-chars CodingSytle rule). purge_descs() still has a (now unused) mem_decs intermediate variable. You're right. Thanks for spotting it. I'll send a v2. Daniel -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH RESEND v2] dma: cppi41: only allocate descriptor memory once
cdd-cd and cdd-descs_phys are allocated DESCS_AREAS times from
init_descs() and freed as often from purge_descs(). This leads to both
memory leaks and double-frees.
Fix this by pulling the calls to dma_{alloc,free}_coherent() out of the
loops.
While at it, remove the intermediate variable mem_decs (I guess it was
only there to make the code comply to the 80-chars CodingSytle rule).
Signed-off-by: Daniel Mack zon...@gmail.com
---
drivers/dma/cppi41.c | 28 ++--
1 file changed, 10 insertions(+), 18 deletions(-)
diff --git a/drivers/dma/cppi41.c b/drivers/dma/cppi41.c
index c29dacf..ca908c6 100644
--- a/drivers/dma/cppi41.c
+++ b/drivers/dma/cppi41.c
@@ -713,19 +713,15 @@ err:
static void purge_descs(struct device *dev, struct cppi41_dd *cdd)
{
- unsigned int mem_decs;
int i;
- mem_decs = ALLOC_DECS_NUM * sizeof(struct cppi41_desc);
-
for (i = 0; i DESCS_AREAS; i++) {
-
cppi_writel(0, cdd-qmgr_mem + QMGR_MEMBASE(i));
cppi_writel(0, cdd-qmgr_mem + QMGR_MEMCTRL(i));
-
- dma_free_coherent(dev, mem_decs, cdd-cd,
- cdd-descs_phys);
}
+
+ dma_free_coherent(dev, ALLOC_DECS_NUM * sizeof(struct cppi41_desc),
+ cdd-cd, cdd-descs_phys);
}
static void disable_sched(struct cppi41_dd *cdd)
@@ -747,8 +743,7 @@ static void deinit_cppi41(struct device *dev, struct
cppi41_dd *cdd)
static int init_descs(struct device *dev, struct cppi41_dd *cdd)
{
- unsigned int desc_size;
- unsigned int mem_decs;
+ unsigned int desc_size = sizeof(struct cppi41_desc);
int i;
u32 reg;
u32 idx;
@@ -757,28 +752,25 @@ static int init_descs(struct device *dev, struct
cppi41_dd *cdd)
(sizeof(struct cppi41_desc) - 1));
BUILD_BUG_ON(sizeof(struct cppi41_desc) 32);
BUILD_BUG_ON(ALLOC_DECS_NUM 32);
+ BUILD_BUG_ON(DESCS_AREAS != 1);
- desc_size = sizeof(struct cppi41_desc);
- mem_decs = ALLOC_DECS_NUM * desc_size;
+ cdd-cd = dma_alloc_coherent(dev, ALLOC_DECS_NUM * desc_size,
+cdd-descs_phys, GFP_KERNEL);
+ if (!cdd-cd)
+ return -ENOMEM;
idx = 0;
for (i = 0; i DESCS_AREAS; i++) {
-
reg = idx QMGR_MEMCTRL_IDX_SH;
reg |= (ilog2(desc_size) - 5) QMGR_MEMCTRL_DESC_SH;
reg |= ilog2(ALLOC_DECS_NUM) - 5;
- BUILD_BUG_ON(DESCS_AREAS != 1);
- cdd-cd = dma_alloc_coherent(dev, mem_decs,
- cdd-descs_phys, GFP_KERNEL);
- if (!cdd-cd)
- return -ENOMEM;
-
cppi_writel(cdd-descs_phys, cdd-qmgr_mem + QMGR_MEMBASE(i));
cppi_writel(reg, cdd-qmgr_mem + QMGR_MEMCTRL(i));
idx += ALLOC_DECS_NUM;
}
+
return 0;
}
--
1.8.4.2
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Re: [PATCH RESEND v2] dma: cppi41: only allocate descriptor memory once
* Daniel Mack | 2013-12-04 18:22:24 [+0100]:
cdd-cd and cdd-descs_phys are allocated DESCS_AREAS times from
init_descs() and freed as often from purge_descs(). This leads to both
memory leaks and double-frees.
Fix this by pulling the calls to dma_{alloc,free}_coherent() out of the
loops.
While at it, remove the intermediate variable mem_decs (I guess it was
only there to make the code comply to the 80-chars CodingSytle rule).
Signed-off-by: Daniel Mack zon...@gmail.com
We talked about this. I prefer to remove the loop and DESCS_AREAS
instead of putting build bug on != 1. If someone decides to use 2 (what
I doubt) I will still want to call dma_alloc_coherent twice for to small
regions (instead one huge).
I will provide a patch some time for this unless you decide to do so…
Sebastian
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Re: [PATCH RESEND v2] dma: cppi41: only allocate descriptor memory once
On 12/04/2013 07:58 PM, Sebastian Andrzej Siewior wrote:
* Daniel Mack | 2013-12-04 18:22:24 [+0100]:
cdd-cd and cdd-descs_phys are allocated DESCS_AREAS times from
init_descs() and freed as often from purge_descs(). This leads to both
memory leaks and double-frees.
Fix this by pulling the calls to dma_{alloc,free}_coherent() out of the
loops.
While at it, remove the intermediate variable mem_decs (I guess it was
only there to make the code comply to the 80-chars CodingSytle rule).
Signed-off-by: Daniel Mack zon...@gmail.com
We talked about this. I prefer to remove the loop and DESCS_AREAS
instead of putting build bug on != 1. If someone decides to use 2 (what
I doubt) I will still want to call dma_alloc_coherent twice for to small
regions (instead one huge).
I will provide a patch some time for this unless you decide to do so…
Alright. Thanks then :)
Daniel
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Re: [PATCH RESEND v2] dma: cppi41: only allocate descriptor memory once
On 12/04/2013 07:58 PM, Sebastian Andrzej Siewior wrote:
* Daniel Mack | 2013-12-04 18:22:24 [+0100]:
cdd-cd and cdd-descs_phys are allocated DESCS_AREAS times from
init_descs() and freed as often from purge_descs(). This leads to both
memory leaks and double-frees.
Fix this by pulling the calls to dma_{alloc,free}_coherent() out of the
loops.
While at it, remove the intermediate variable mem_decs (I guess it was
only there to make the code comply to the 80-chars CodingSytle rule).
Signed-off-by: Daniel Mack zon...@gmail.com
We talked about this. I prefer to remove the loop and DESCS_AREAS
instead of putting build bug on != 1. If someone decides to use 2 (what
I doubt) I will still want to call dma_alloc_coherent twice for to small
regions (instead one huge).
I will provide a patch some time for this unless you decide to do so…
Sorry - what I wanted to say is: Ok, I'll cook up a patch, thanks :)
Daniel
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[PATCH v2 2/5] usb: phy: Add keystone usb phy driver
Add Keystone platform USB PHY driver support. Current main purpose
of this driver is to enable the PHY reference clock gate on the
Keystone SoC. Otherwise it is a nop PHY.
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Felipe Balbi ba...@ti.com
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Signed-off-by: WingMan Kwok w-kw...@ti.com
---
drivers/usb/phy/Kconfig| 10 +++
drivers/usb/phy/Makefile |1 +
drivers/usb/phy/phy-keystone.c | 142
3 files changed, 153 insertions(+)
create mode 100644 drivers/usb/phy/phy-keystone.c
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 08e2f39..c6792f43 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -40,6 +40,16 @@ config ISP1301_OMAP
This driver can also be built as a module. If so, the module
will be called isp1301_omap.
+config KEYSTONE_USB_PHY
+ tristate Keystone USB PHY Driver
+ depends on ARCH_KEYSTONE
+ select USB_PHY
+ select NOP_USB_XCEIV
+ help
+ Enable this to support Keystone USB phy. This driver provides
+ interface to interact with USB 2.0 and USB 3.0 PHY that is part
+ of the Keystone SOC.
+
config MV_U3D_PHY
bool Marvell USB 3.0 PHY controller Driver
depends on CPU_MMP3
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index 022c1da..311b47b 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -30,3 +30,4 @@ obj-$(CONFIG_USB_RCAR_PHY)+= phy-rcar-usb.o
obj-$(CONFIG_USB_RCAR_GEN2_PHY)+= phy-rcar-gen2-usb.o
obj-$(CONFIG_USB_ULPI) += phy-ulpi.o
obj-$(CONFIG_USB_ULPI_VIEWPORT)+= phy-ulpi-viewport.o
+obj-$(CONFIG_KEYSTONE_USB_PHY) += phy-keystone.o
diff --git a/drivers/usb/phy/phy-keystone.c b/drivers/usb/phy/phy-keystone.c
new file mode 100644
index 000..e025eb2
--- /dev/null
+++ b/drivers/usb/phy/phy-keystone.c
@@ -0,0 +1,142 @@
+/*
+ * phy-keystone - USB PHY, talking to dwc3 controller in Keystone.
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * Author: WingMan Kwok w-kw...@ti.com
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/usb/usb_phy_gen_xceiv.h
+#include linux/io.h
+#include linux/of.h
+
+#include phy-generic.h
+
+/* USB PHY control register offsets */
+#define USB_PHY_CTL_UTMI 0x
+#define USB_PHY_CTL_PIPE 0x0004
+#define USB_PHY_CTL_PARAM_10x0008
+#define USB_PHY_CTL_PARAM_20x000c
+#define USB_PHY_CTL_CLOCK 0x0010
+#define USB_PHY_CTL_PLL0x0014
+
+#define PHY_REF_SSP_EN BIT(29)
+
+struct keystone_usbphy {
+ struct usb_phy_gen_xceivusb_phy_gen;
+ void __iomem*phy_ctrl;
+};
+
+static inline u32 keystone_usbphy_readl(void __iomem *base, u32 offset)
+{
+ return readl(base + offset);
+}
+
+static inline void keystone_usbphy_writel(void __iomem *base,
+ u32 offset, u32 value)
+{
+ writel(value, base + offset);
+}
+
+static int keystone_usbphy_init(struct usb_phy *phy)
+{
+ struct keystone_usbphy *k_phy = dev_get_drvdata(phy-dev);
+ u32 val;
+
+ val = keystone_usbphy_readl(k_phy-phy_ctrl, USB_PHY_CTL_CLOCK);
+ keystone_usbphy_writel(k_phy-phy_ctrl, USB_PHY_CTL_CLOCK,
+ val | PHY_REF_SSP_EN);
+ udelay(20);
+ return 0;
+}
+
+static void keystone_usbphy_shutdown(struct usb_phy *phy)
+{
+ struct keystone_usbphy *k_phy = dev_get_drvdata(phy-dev);
+ u32 val;
+
+ val = keystone_usbphy_readl(k_phy-phy_ctrl, USB_PHY_CTL_CLOCK);
+ keystone_usbphy_writel(k_phy-phy_ctrl, USB_PHY_CTL_CLOCK,
+ val = ~PHY_REF_SSP_EN);
+}
+
+static int keystone_usbphy_probe(struct platform_device *pdev)
+{
+ struct device *dev = pdev-dev;
+ struct keystone_usbphy *k_phy;
+ struct resource *res;
+ int ret;
+
+ k_phy = devm_kzalloc(dev, sizeof(*k_phy), GFP_KERNEL);
+ if (!k_phy)
+ return -ENOMEM;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(dev, missing usb phy resource\n);
+ return -EINVAL;
+ }
+
+ k_phy-phy_ctrl =
[PATCH v2 3/5] ARM: dts: keystone: Add usb phy devicetree bindings
Added device tree support for TI's Keystone USB PHY driver and updated the
Documentation with device tree binding information.
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: WingMan Kwok w-kw...@ti.com
---
.../devicetree/bindings/usb/keystone-phy.txt | 19 +++
arch/arm/boot/dts/keystone.dtsi|7 +++
2 files changed, 26 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/keystone-phy.txt
diff --git a/Documentation/devicetree/bindings/usb/keystone-phy.txt
b/Documentation/devicetree/bindings/usb/keystone-phy.txt
new file mode 100644
index 000..300830d
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/keystone-phy.txt
@@ -0,0 +1,19 @@
+TI Keystone USB PHY
+
+Required properties:
+ - compatible: should be ti,keystone-usbphy.
+ - #address-cells, #size-cells : should be '1' if the device has sub-nodes
+ with 'reg' property.
+ - reg : Address and length of the usb phy control register set.
+
+The main purpose of this PHY driver is to enable the USB PHY reference clock
+gate on the Keystone SOC for both the USB2 and USB3 PHY. Otherwise it is just
+an NOP PHY driver. Hence this node is referenced as both the usb2 and usb3
+phy node in the USB Glue layer driver node.
+
+usb_phy: usb_phy@2620738 {
+ compatible = ti,keystone-usbphy;
+ #address-cells = 1;
+ #size-cells = 1;
+ reg = 0x2620738 32;
+};
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index f6d6d9e..d497d9e 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -181,5 +181,12 @@
interrupts = GIC_SPI 300 IRQ_TYPE_EDGE_RISING;
clocks = clkspi;
};
+
+ usb_phy: usb_phy@2620738 {
+ compatible = ti,keystone-usbphy;
+ #address-cells = 1;
+ #size-cells = 1;
+ reg = 0x2620738 32;
+ };
};
};
--
1.7.9.5
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[PATCH v2 5/5] ARM: keystone: defconfig: enable USB support
Enable the USB support (Host mode only) on TI's Keystone platform. It also enables the support of usb mass storage, FAT and Ext4 filesystems to test rootfs mount over an USB disk. Cc: Santosh Shilimkar santosh.shilim...@ti.com Signed-off-by: WingMan Kwok w-kw...@ti.com --- arch/arm/configs/keystone_defconfig | 20 +++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/arm/configs/keystone_defconfig b/arch/arm/configs/keystone_defconfig index 9943e5d..a018244 100644 --- a/arch/arm/configs/keystone_defconfig +++ b/arch/arm/configs/keystone_defconfig @@ -115,6 +115,8 @@ CONFIG_MTD_UBI=y CONFIG_PROC_DEVICETREE=y CONFIG_BLK_DEV_LOOP=y CONFIG_EEPROM_AT24=y +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y CONFIG_NETDEVICES=y CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y @@ -129,10 +131,24 @@ CONFIG_SPI_DAVINCI=y CONFIG_SPI_SPIDEV=y # CONFIG_HWMON is not set CONFIG_WATCHDOG=y -# CONFIG_USB_SUPPORT is not set +CONFIG_USB=y +CONFIG_USB_DEBUG=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_MON=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_DEBUG=y +CONFIG_USB_DWC3_VERBOSE=y +CONFIG_KEYSTONE_USB_PHY=y CONFIG_DMADEVICES=y CONFIG_COMMON_CLK_DEBUG=y CONFIG_MEMORY=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_NTFS_FS=y CONFIG_TMPFS=y CONFIG_JFFS2_FS=y CONFIG_JFFS2_FS_WBUF_VERIFY=y @@ -144,6 +160,8 @@ CONFIG_ROOT_NFS=y CONFIG_NFSD=y CONFIG_NFSD_V3=y CONFIG_NFSD_V3_ACL=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y CONFIG_PRINTK_TIME=y CONFIG_DEBUG_SHIRQ=y CONFIG_DEBUG_INFO=y -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/5] usb: dwc3: Add Keystone specific glue layer
Add Keystone platform specific glue layer to support
USB3 Host mode.
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Felipe Balbi ba...@ti.com
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Signed-off-by: WingMan Kwok w-kw...@ti.com
---
drivers/usb/dwc3/Kconfig |7 ++
drivers/usb/dwc3/Makefile|1 +
drivers/usb/dwc3/dwc3-keystone.c | 210 ++
3 files changed, 218 insertions(+)
create mode 100644 drivers/usb/dwc3/dwc3-keystone.c
diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index 70fc430..e2c730f 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -70,6 +70,13 @@ config USB_DWC3_PCI
One such PCIe-based platform is Synopsys' PCIe HAPS model of
this IP.
+config USB_DWC3_KEYSTONE
+ tristate Texas Instruments Keystone2 Platforms
+ default USB_DWC3
+ help
+ Support of USB2/3 functionality in TI Keystone2 platforms.
+ Say 'Y' or 'M' here if you have one such device
+
comment Debugging features
config USB_DWC3_DEBUG
diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
index dd17601..10ac3e7 100644
--- a/drivers/usb/dwc3/Makefile
+++ b/drivers/usb/dwc3/Makefile
@@ -32,3 +32,4 @@ endif
obj-$(CONFIG_USB_DWC3_OMAP)+= dwc3-omap.o
obj-$(CONFIG_USB_DWC3_EXYNOS) += dwc3-exynos.o
obj-$(CONFIG_USB_DWC3_PCI) += dwc3-pci.o
+obj-$(CONFIG_USB_DWC3_KEYSTONE)+= dwc3-keystone.o
diff --git a/drivers/usb/dwc3/dwc3-keystone.c b/drivers/usb/dwc3/dwc3-keystone.c
new file mode 100644
index 000..d3c0dc5
--- /dev/null
+++ b/drivers/usb/dwc3/dwc3-keystone.c
@@ -0,0 +1,210 @@
+/**
+ * dwc3-keystone.c - Keystone Specific Glue layer
+ *
+ * Copyright (C) 2010-2013 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Author: WingMan Kwok w-kw...@ti.com
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/clk.h
+#include linux/module.h
+#include linux/kernel.h
+#include linux/interrupt.h
+#include linux/spinlock.h
+#include linux/platform_device.h
+#include linux/dma-mapping.h
+#include linux/io.h
+#include linux/of_platform.h
+
+/* USBSS register offsets */
+#define USBSS_REVISION 0x
+#define USBSS_SYSCONFIG0x0010
+#define USBSS_IRQ_EOI 0x0018
+#define USBSS_IRQSTATUS_RAW_0 0x0020
+#define USBSS_IRQSTATUS_0 0x0024
+#define USBSS_IRQENABLE_SET_0 0x0028
+#define USBSS_IRQENABLE_CLR_0 0x002c
+
+/* IRQ register bits */
+#define USBSS_IRQ_EOI_LINE(n) BIT(n)
+#define USBSS_IRQ_EVENT_ST BIT(0)
+#define USBSS_IRQ_COREIRQ_EN BIT(0)
+#define USBSS_IRQ_COREIRQ_CLR BIT(0)
+
+static u64 kdwc3_dma_mask;
+
+struct dwc3_keystone {
+ spinlock_t lock;
+ struct device *dev;
+ struct clk *clk;
+ void __iomem*usbss;
+};
+
+static inline u32 kdwc3_readl(void __iomem *base, u32 offset)
+{
+ return readl(base + offset);
+}
+
+static inline void kdwc3_writel(void __iomem *base, u32 offset, u32 value)
+{
+ writel(value, base + offset);
+}
+
+static void kdwc3_enable_irqs(struct dwc3_keystone *kdwc)
+{
+ u32 val;
+
+ val = kdwc3_readl(kdwc-usbss, USBSS_IRQENABLE_SET_0);
+ val = USBSS_IRQ_COREIRQ_EN;
+ kdwc3_writel(kdwc-usbss, USBSS_IRQENABLE_SET_0, val);
+}
+
+static void kdwc3_disable_irqs(struct dwc3_keystone *kdwc)
+{
+ u32 val;
+
+ val = kdwc3_readl(kdwc-usbss, USBSS_IRQENABLE_SET_0);
+ val = ~USBSS_IRQ_COREIRQ_EN;
+ kdwc3_writel(kdwc-usbss, USBSS_IRQENABLE_SET_0, val);
+}
+
+static irqreturn_t dwc3_keystone_interrupt(int irq, void *_kdwc)
+{
+ struct dwc3_keystone*kdwc = _kdwc;
+
+ spin_lock(kdwc-lock);
+ kdwc3_writel(kdwc-usbss, USBSS_IRQENABLE_CLR_0, USBSS_IRQ_COREIRQ_CLR);
+ kdwc3_writel(kdwc-usbss, USBSS_IRQSTATUS_0, USBSS_IRQ_EVENT_ST);
+ kdwc3_writel(kdwc-usbss, USBSS_IRQENABLE_SET_0, USBSS_IRQ_COREIRQ_EN);
+ kdwc3_writel(kdwc-usbss, USBSS_IRQ_EOI, USBSS_IRQ_EOI_LINE(0));
+ spin_unlock(kdwc-lock);
+
+ return IRQ_HANDLED;
+}
+
+static int kdwc3_probe(struct platform_device *pdev)
+{
+ struct device_node *node = pdev-dev.of_node;
+ struct device *dev = pdev-dev;
+ struct dwc3_keystone*kdwc;
+ struct resource *res;
+ int error, irq;
+
+ kdwc = devm_kzalloc(dev, sizeof(*kdwc), GFP_KERNEL);
+ if (!kdwc)
+ return -ENOMEM;
+
+
[PATCH v2 4/5] ARM: dts: keystone: Add usb devicetree bindings
Added device tree support for TI's Keystone USB driver and updated the
Documentation with device tree binding information.
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: WingMan Kwok w-kw...@ti.com
---
.../devicetree/bindings/usb/keystone-usb.txt | 41
arch/arm/boot/dts/keystone.dtsi| 18 +
2 files changed, 59 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/keystone-usb.txt
diff --git a/Documentation/devicetree/bindings/usb/keystone-usb.txt
b/Documentation/devicetree/bindings/usb/keystone-usb.txt
new file mode 100644
index 000..ac2c7cc
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/keystone-usb.txt
@@ -0,0 +1,41 @@
+TI Keystone Soc USB Controller
+
+DWC3 GLUE
+
+Required properties:
+ - compatible: should be ti,keystone-dwc3.
+ - #address-cells, #size-cells : should be '1' if the device has sub-nodes
+ with 'reg' property.
+ - reg : Address and length of the register set for the USB subsystem on
+ the SOC.
+ - interrupts : The irq number of this device that is used to interrupt the
+ MPU.
+ - ranges: allows valid 1:1 translation between child's address space and
+ parent's address space.
+ - clocks: Clock IDs array as required by the controller.
+ - clock-names: names of clocks correseponding to IDs in the clock property.
+
+Sub-nodes:
+The dwc3 core should be added as subnode to Keystone DWC3 glue.
+- dwc3 :
+ The binding details of dwc3 can be found in:
+ Documentation/devicetree/bindings/usb/dwc3.txt
+
+Example:
+ usb: usb@268 {
+ compatible = ti,keystone-dwc3;
+ #address-cells = 1;
+ #size-cells = 1;
+ reg = 0x268 0x1;
+ clocks = clkusb;
+ clock-names = usb;
+ interrupts = GIC_SPI 393 IRQ_TYPE_EDGE_RISING;
+ ranges;
+
+ dwc3@269 {
+ compatible = synopsys,dwc3;
+ reg = 0x269 0x7;
+ interrupts = GIC_SPI 393 IRQ_TYPE_EDGE_RISING;
+ usb-phy = usb_phy, usb_phy;
+ };
+ };
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index d497d9e..0911bb7 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -188,5 +188,23 @@
#size-cells = 1;
reg = 0x2620738 32;
};
+
+ usb: usb@268 {
+ compatible = ti,keystone-dwc3;
+ #address-cells = 1;
+ #size-cells = 1;
+ reg = 0x268 0x1;
+ clocks = clkusb;
+ clock-names = usb;
+ interrupts = GIC_SPI 393 IRQ_TYPE_EDGE_RISING;
+ ranges;
+
+ dwc3@269 {
+ compatible = synopsys,dwc3;
+ reg = 0x269 0x7;
+ interrupts = GIC_SPI 393 IRQ_TYPE_EDGE_RISING;
+ usb-phy = usb_phy, usb_phy;
+ };
+ };
};
};
--
1.7.9.5
--
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[PATCH v2 0/5] Kesytone II USB support
Here is the updated version of the series which addresses comments from earlier version [1]. The PHY register programming is moved to a separate PHY driver. Series adds USB host support for Keystone SOCs. Keystone SOCs uses dwc3 hardware IP implementation. On Keystone II platforms, we use no-op phy driver. All three patches are posted together just for completeness. Only first patch is expected to go via usb tree and other two via linux-keystone tree. Patchset are tested on Keystone II EVM with USB2.0 and USB3.0 flash drives. Cc: Santosh Shilimkar santosh.shilim...@ti.com WingMan Kwok (5): usb: dwc3: Add Keystone specific glue layer usb: phy: Add keystone usb phy driver ARM: dts: keystone: Add usb phy devicetree bindings ARM: dts: keystone: Add usb devicetree bindings ARM: keystone: defconfig: enable USB support .../devicetree/bindings/usb/keystone-phy.txt | 19 ++ .../devicetree/bindings/usb/keystone-usb.txt | 41 arch/arm/boot/dts/keystone.dtsi| 25 +++ arch/arm/configs/keystone_defconfig| 20 +- drivers/usb/dwc3/Kconfig |7 + drivers/usb/dwc3/Makefile |1 + drivers/usb/dwc3/dwc3-keystone.c | 210 drivers/usb/phy/Kconfig| 10 + drivers/usb/phy/Makefile |1 + drivers/usb/phy/phy-keystone.c | 142 + 10 files changed, 475 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/usb/keystone-phy.txt create mode 100644 Documentation/devicetree/bindings/usb/keystone-usb.txt create mode 100644 drivers/usb/dwc3/dwc3-keystone.c create mode 100644 drivers/usb/phy/phy-keystone.c [1] http://www.spinics.net/lists/linux-usb/msg98166.html -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: usb hub disconnects all devices
On Wed, 4 Dec 2013, Kumar Gokhare wrote: Hi Alan, Thanks for your response. It seems that in my case, the root hub is getting this disconnect event which is disconnecting all devices. Could you point me which kernel module raises these event and if any debugs I can turn on in the kernel configs to more info ? The modules are ehci-hcd and usbcore. There isn't much info to get other than what you have already seen. For instance, it looks like you already have CONFIG_USB_DEBUG enabled. 7[ 1493.733245] tegra-ehci tegra-ehci.2: GetStatus port 1 status c00100a POWER sig=se0 PEC CSC This message is from the ehci-hcd driver. It says that the hardware's port status value is 0xc00100a, which means no connection, connect change (i.e., there was a disconnection), and enable change. 7[ 1493.733297] hub 1-0:1.0: port 1, status 0100, change 0003, 12 Mb/s 6[ 1493.733329] usb 1-1: USB disconnect, address 2 These messages are from the hub driver in usbcore. They mean that the hub driver saw the disconnect status from the EHCI hardware, and it took the appropriate action. I know I shouldn't expect much support for such an old kernel, but would be grateful if you can give me some pointers. I'm glad to help, but I don't think you will solve this in software. Alan Stern -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [3.8-rc3 - 3.8-rc4 regression] Re: [PATCH] module, async: async_synchronize_full() on module init iff async is used
On Tue, Dec 3, 2013 at 9:19 AM, Tejun Heo t...@kernel.org wrote:
Hello,
On Tue, Dec 03, 2013 at 08:28:43AM -0600, Josh Hunt wrote:
You're right. Thanks for pointing this out. I did not realize there
was a bug in the init script. The version of initramfs-tools I was
using had the following bug:
https://bugs.launchpad.net/ubuntu/+source/initramfs-tools/+bug/1215911
Updating to 0.99ubuntu13.4 of initramfs-tools resolved my boot hangs.
I did try using the workaround as suggested by Linus. In my setup the
dm_init() code was hit, however it still appeared to be too late at
times. I also tried moving the call to async_synchronize_full() above
the for loop and it still had the same issue (patch attached.) Out of
around 10 reboot tests it failed to find root 1 or 2 times.
The ubuntu scripts don't ever actually call do_mount() if it can't
find the device. It seems to rely on some udev functionality to tell
it when the device is present, and if that fails it just bails out.
This change has introduced a regression. However, I only noticed it
b/c my init script had a bug which caused it not to wait around for
the device to appear.
Hmmm so, read the bug report, digged and asked around a bit.
Here's the root problem - ubuntu's initramfs uses a tool to wait for
the root device which uses libudev to listen for the device event;
unfortunately, its rx buffer is not set large enough and the receiver
isn't fast enough, which means that netlink broadcast messages from
the kernel can overrun the buffer. When that happens, it sets an
error on the socket, so the next recv fails with -ENOBUFS. If that
happens, the wait for root aborts immediately and initramfs proceeds
to mount non-existent root device.
The only thing which changes by these patches is the timing of events.
The problem likely wasn't as exposed before because things were slow
enough so that either the messages could be consumed fast enough or
there's enough delay between libata module load and the root device
wait hiding the bug in the wait logic.
So, yeah, it's a full blown timing bug. I'm not sure what we can do
to work around from kernel side except for randomly slowing things
down or forcefully enlarging rx buffer size. There really is no
interlocking to take advantage of. :(
So there used to be a call to async_synchronize_full() in
ata_host_register(), but it was removed by
f29d3b23238e1955a8094e038c72546e99308e61 as part of some fastboot
changes. Adding it back (in the attached patch) seems to resolve the
issue when using the broken initrd. I'm guessing adding it back isn't
an option, but I wanted to point it out.
--
Josh
Index: b/drivers/ata/libata-core.c
===
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -6181,12 +6181,14 @@ int ata_host_register(struct ata_host *h
/* perform each probe asynchronously */
for (i = 0; i host-n_ports; i++) {
struct ata_port *ap = host-ports[i];
async_schedule(async_port_probe, ap);
}
+ async_synchronize_full();
+
return 0;
err_tadd:
while (--i = 0) {
ata_tport_delete(host-ports[i]);
}
Re: [GIT pull for 3.14 v3] xhci streams and uas fixes + usbfs streams support
On Mon, Nov 18, 2013 at 03:39:05PM +0100, Hans de Goede wrote: Hi Sarah et al, Hi Hans, Here is v3 of my patch-series / pull-req for you to pull into your xhci tree for 3.14. I was just about to start testing the code I merged from you, when I realized the last round of patches didn't Cc the usb-storage mailing list or Matthew Dharm. Since four of the patches interact with usb-storage, it would be good to get his ACK on those: https://git.kernel.org/cgit/linux/kernel/git/sarah/xhci.git/commit/?h=for-usb-next-queueid=07f652720e3f https://git.kernel.org/cgit/linux/kernel/git/sarah/xhci.git/commit/?h=for-usb-next-queueid=dda9e7db4e29 https://git.kernel.org/cgit/linux/kernel/git/sarah/xhci.git/commit/?h=for-usb-next-queueid=91a4c4b94a40 https://git.kernel.org/cgit/linux/kernel/git/sarah/xhci.git/commit/?h=for-usb-next-queueid=326aff723f82 Matthew, any objections to these patches? Do you want Hans to resend the entire 70 patch set to the USB storage mailing list, or do you think sending it to the USB mailing list was good enough? Sarah Sharp New this version is that the uas: Use proper packet size when submitting reponse urbs patch has been dropped. As Gerd rightfully pointed out we won't know if we get a sense or response iu on the status endpoint when using usb-2, so the urb must be large enough to receive the largest iu type, which is the sense iu. So the old code was correct. The following changes since commit 7d49f0bac41ee9b012af1efe2f725d91a87a8fe9: USB: Maintainers change for usb serial drivers (2013-10-31 08:53:52 -0700) are available in the git repository at: git://linuxtv.org/hgoede/gspca.git usb-next-for-sarah for you to fetch changes up to 8d0f187e6c19ed23e7df4b2f0b943ee784c7f1b2: uas: Remove comment about registering a uas scsi controller for each usb bus (2013-11-18 15:13:35 +0100) Gerd Hoffmann (6): xhci: fix usb3 streams uas: properly reinitialize in uas_eh_bus_reset_handler uas: make work list per-device uas: add dead request list uas: replace BUG_ON() + WARN_ON() with WARN_ON_ONCE() uas: remove BROKEN Hans de Goede (62): xhci: Free streams when they are still allocated on a set_interface call xhci: Check size rather then number of streams when allocating stream ctxs xhci: For streams the css flag most be read from the stream-ctx on ep stop xhci: Set SCT field for Set TR dequeue on streams xhci: For streams the dequeue ptr must be read from the stream ctx xhci: use usb_ss_max_streams in xhci_check_streams_endpoint usb-core: Fix usb_free_streams return value documentation usb-core: Move USB_MAXENDPOINTS definitions to usb.h usb-core: Track if an endpoint has streams usb-core: Free bulk streams on interface release usbfs: Kill urbs on interface before doing a set_interface usbfs: proc_do_submiturb use a local variable for number_of_packets usbfs: Add support for bulk stream ids usbfs: Add ep_to_host_endpoint helper function usbfs: Add support for allocating / freeing streams uas: Urbs must be anchored before submitting them uas: Properly set interface to altsetting 0 on probe failure uas: Avoid unnecessary unlock / lock calls around unlink_data_urbs uas: uas_alloc_cmd_urb: drop unused stream_id parameter uas: Fix uas not working when plugged into an ehci port uas: Fix reset locking uas: Fix reset handling for externally triggered reset uas: s/response_ui/response_iu/ uas: Fix response iu struct definition uas: Pack iu struct definitions uas: Use all available stream ids uas: Add a uas_find_uas_alt_setting helper function uas: Move uas detect code to uas-detect.h xhci: xhci_mem_cleanup: make sure cmd_ring_reserved_trbs really is 0 xhci: The trb_address_map radix tree expects 1KB segment memory aligment xhci: Handle MaxPSASize == 0 usb: Clear host_endpoint-streams when implicitly freeing streams usb: Reset USB-3 devices on USB-3 link bounce uas: Add the posibilty to blacklist uas devices from using the uas driver usb-storage: Don't bind to uas devices if the uas driver is enabled usb-storage: Modify and export adjust_quirks so that it can be used by uas uas: Honor no-uas quirk set in usb-storage's quirks module parameter uas: Add uas_find_endpoints() helper function uas: Fix bounds check in uas_find_endpoints uas: Move uas_find_endpoints to uas-detect.h uas: Drop fixed endpoint config handling uas: Verify endpoint descriptors from uas_use_uas_driver() uas: Not being able to alloc streams when connected through usb-3 is an error uas: task_mgmt: Kill the sense-urb if we fail to submit the cmd urb uas: Don't allow more then one
Re: [PATCH] usb: hub: Use correct reset for wedged USB3 devices that are NOTATTACHED
On Tue, Nov 19, 2013 at 02:53:22PM +, Cortes, Alexis wrote: Hi Sarah, Sorry for my delayed response, I just saw your e-mail (it got filtered somehow). About your question: actually I'm not sure, I'll have to check that to confirm it. I'll get back to you with an answer as soon as I have it. Ping, Alexis: any info on this question? Sarah Sharp -Original Message- From: Sarah Sharp [mailto:sarah.a.sh...@linux.intel.com] Sent: Thursday, November 14, 2013 5:31 PM To: Alan Stern Cc: Julius Werner; Greg Kroah-Hartman; LKML; linux-usb@vger.kernel.org; Benson Leung; Vincent Palatin; Cortes, Alexis Subject: Re: [PATCH] usb: hub: Use correct reset for wedged USB3 devices that are NOTATTACHED On Thu, Nov 07, 2013 at 10:32:33AM -0500, Alan Stern wrote: On Wed, 6 Nov 2013, Julius Werner wrote: What if the device is in USB_STATE_SUSPENDED? I'm not sure that is possible at that point in hub_events(), I don't know of a way that could lead to this situation. I could still add the check just to be sure if you want it, though. I don't know either. But Sarah has said that ports can spontaneously go into Compliance Mode for no apparent reason. If that can happen, maybe it can happen while the port is in U3 and the device is suspended. In such cases, though, you'd need to do a reset-resume rather than a simple reset. Looking at commits c3897aa5386faba77e5bbdf94902a1658d3a5b11 and 71c731a296f1b08a3724bd1b514b64f1bda87a23, it seems that the TI host controllers' ports can go into compliance mode only when a device is inserted. Once the device is link trained by the redriver, the port shouldn't go into compliance mode. So we should never see compliance mode on a port with an attached USB device in suspend. Alex, can you confirm that the TI host's port won't go into compliance mode while a connected device is suspended? Not at all. If a device is unplugged, its state changes to NOTATTACHED before the driver is unbound. During that time, the driver will see all its URBs failing, so it may very well try to reset the device. (For example, usbhid behaves like this.) That isn't a bug. Oh, okay, I wasn't quite sure how that plays together. Would you think it's still valuable to print it out (maybe as dev_info() instead of dev_warn()) instead of just silently ignoring the reset request? It would have certainly been useful for me to find this problem faster, but I can take it out again if you think it would result in too much noise. I think keeping dev_dbg() is best. If you're searching for the solution to a problem, you should have debugging enabled and so you ought to see the message. Alan Stern -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT pull for 3.14 v3] xhci streams and uas fixes + usbfs streams support
I'm okay with these patches. No need to resend to the USB Storage list, tho I would appreciate such in the future. Acked-By: Matthew Dharm mdharm-...@one-eyed-alien.net Matt On Wed, Dec 4, 2013 at 3:58 PM, Sarah Sharp sarah.a.sh...@linux.intel.com wrote: On Mon, Nov 18, 2013 at 03:39:05PM +0100, Hans de Goede wrote: Hi Sarah et al, Hi Hans, Here is v3 of my patch-series / pull-req for you to pull into your xhci tree for 3.14. I was just about to start testing the code I merged from you, when I realized the last round of patches didn't Cc the usb-storage mailing list or Matthew Dharm. Since four of the patches interact with usb-storage, it would be good to get his ACK on those: https://git.kernel.org/cgit/linux/kernel/git/sarah/xhci.git/commit/?h=for-usb-next-queueid=07f652720e3f https://git.kernel.org/cgit/linux/kernel/git/sarah/xhci.git/commit/?h=for-usb-next-queueid=dda9e7db4e29 https://git.kernel.org/cgit/linux/kernel/git/sarah/xhci.git/commit/?h=for-usb-next-queueid=91a4c4b94a40 https://git.kernel.org/cgit/linux/kernel/git/sarah/xhci.git/commit/?h=for-usb-next-queueid=326aff723f82 Matthew, any objections to these patches? Do you want Hans to resend the entire 70 patch set to the USB storage mailing list, or do you think sending it to the USB mailing list was good enough? Sarah Sharp New this version is that the uas: Use proper packet size when submitting reponse urbs patch has been dropped. As Gerd rightfully pointed out we won't know if we get a sense or response iu on the status endpoint when using usb-2, so the urb must be large enough to receive the largest iu type, which is the sense iu. So the old code was correct. The following changes since commit 7d49f0bac41ee9b012af1efe2f725d91a87a8fe9: USB: Maintainers change for usb serial drivers (2013-10-31 08:53:52 -0700) are available in the git repository at: git://linuxtv.org/hgoede/gspca.git usb-next-for-sarah for you to fetch changes up to 8d0f187e6c19ed23e7df4b2f0b943ee784c7f1b2: uas: Remove comment about registering a uas scsi controller for each usb bus (2013-11-18 15:13:35 +0100) Gerd Hoffmann (6): xhci: fix usb3 streams uas: properly reinitialize in uas_eh_bus_reset_handler uas: make work list per-device uas: add dead request list uas: replace BUG_ON() + WARN_ON() with WARN_ON_ONCE() uas: remove BROKEN Hans de Goede (62): xhci: Free streams when they are still allocated on a set_interface call xhci: Check size rather then number of streams when allocating stream ctxs xhci: For streams the css flag most be read from the stream-ctx on ep stop xhci: Set SCT field for Set TR dequeue on streams xhci: For streams the dequeue ptr must be read from the stream ctx xhci: use usb_ss_max_streams in xhci_check_streams_endpoint usb-core: Fix usb_free_streams return value documentation usb-core: Move USB_MAXENDPOINTS definitions to usb.h usb-core: Track if an endpoint has streams usb-core: Free bulk streams on interface release usbfs: Kill urbs on interface before doing a set_interface usbfs: proc_do_submiturb use a local variable for number_of_packets usbfs: Add support for bulk stream ids usbfs: Add ep_to_host_endpoint helper function usbfs: Add support for allocating / freeing streams uas: Urbs must be anchored before submitting them uas: Properly set interface to altsetting 0 on probe failure uas: Avoid unnecessary unlock / lock calls around unlink_data_urbs uas: uas_alloc_cmd_urb: drop unused stream_id parameter uas: Fix uas not working when plugged into an ehci port uas: Fix reset locking uas: Fix reset handling for externally triggered reset uas: s/response_ui/response_iu/ uas: Fix response iu struct definition uas: Pack iu struct definitions uas: Use all available stream ids uas: Add a uas_find_uas_alt_setting helper function uas: Move uas detect code to uas-detect.h xhci: xhci_mem_cleanup: make sure cmd_ring_reserved_trbs really is 0 xhci: The trb_address_map radix tree expects 1KB segment memory aligment xhci: Handle MaxPSASize == 0 usb: Clear host_endpoint-streams when implicitly freeing streams usb: Reset USB-3 devices on USB-3 link bounce uas: Add the posibilty to blacklist uas devices from using the uas driver usb-storage: Don't bind to uas devices if the uas driver is enabled usb-storage: Modify and export adjust_quirks so that it can be used by uas uas: Honor no-uas quirk set in usb-storage's quirks module parameter uas: Add uas_find_endpoints() helper function uas: Fix bounds check in uas_find_endpoints uas: Move uas_find_endpoints to uas-detect.h uas: Drop fixed endpoint config
[PATCH 1/1] usb: doc: rename ci13xxx-imx.txt to ci-hdrc-imx.txt
We have already renamed the file name, change doc name at this
patch.
Cc: devicet...@vger.kernel.org
Cc: linux-...@vger.kernel.org
Signed-off-by: Peter Chen peter.c...@freescale.com
---
.../usb/{ci13xxx-imx.txt = ci-hdrc-imx.txt} |0
1 files changed, 0 insertions(+), 0 deletions(-)
rename Documentation/devicetree/bindings/usb/{ci13xxx-imx.txt =
ci-hdrc-imx.txt} (100%)
diff --git a/Documentation/devicetree/bindings/usb/ci13xxx-imx.txt
b/Documentation/devicetree/bindings/usb/ci-hdrc-imx.txt
similarity index 100%
rename from Documentation/devicetree/bindings/usb/ci13xxx-imx.txt
rename to Documentation/devicetree/bindings/usb/ci-hdrc-imx.txt
--
1.7.8
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[PATCH 1/1] usb: doc: rename ci13xxx-imx.txt to ci-hdrc-imx.txt
We have already renamed the file name, change doc name at this
patch.
Cc: devicet...@vger.kernel.org
Cc: linux-...@vger.kernel.org
Signed-off-by: Peter Chen peter.c...@freescale.com
---
.../usb/{ci13xxx-imx.txt = ci-hdrc-imx.txt} |0
1 files changed, 0 insertions(+), 0 deletions(-)
rename Documentation/devicetree/bindings/usb/{ci13xxx-imx.txt =
ci-hdrc-imx.txt} (100%)
diff --git a/Documentation/devicetree/bindings/usb/ci13xxx-imx.txt
b/Documentation/devicetree/bindings/usb/ci-hdrc-imx.txt
similarity index 100%
rename from Documentation/devicetree/bindings/usb/ci13xxx-imx.txt
rename to Documentation/devicetree/bindings/usb/ci-hdrc-imx.txt
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Re: [PATCH] USB: cdc-acm: Added support for the Lenovo RD02-D400 USB Modem
On Tue, Dec 03, 2013 at 02:18:57PM +0100, David Cluytens wrote: Signed-off-by: David Cluytens david.cluyt...@gmail.com --- drivers/usb/class/cdc-acm.c | 2 ++ 1 file changed, 2 insertions(+) Yeah, that finally worked ! Now applied, thanks. greg k-h -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v6 11/17] USB: fsl-mph-dr-of: adjust for OF based clock lookup
On Sat, Nov 30, 2013 at 11:51:31PM +0100, Gerhard Sittig wrote: after device tree based clock lookup became available, the peripheral driver need no longer construct clock names which include the component index -- remove the usb%d_clk template, always use ipg instead Cc: Greg Kroah-Hartman gre...@linuxfoundation.org Cc: linux-usb@vger.kernel.org Signed-off-by: Gerhard Sittig g...@denx.de --- Acked-by: Greg Kroah-Hartman gre...@linuxfoundation.org -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/3] usb: phy-generic: Add ULPI VBUS support
On Wednesday, December 04, 2013 05:49 PM, Heikki Krogerus wrote:
Hi Chris,
On Wed, Dec 04, 2013 at 03:16:21PM +0800, Chris Ruehl wrote:
On Tuesday, December 03, 2013 04:15 PM, Heikki Krogerus wrote:
On Mon, Dec 02, 2013 at 03:05:19PM +0800, Chris Ruehl wrote:
@@ -154,6 +164,27 @@ int usb_phy_gen_create_phy(struct device *dev, struct
usb_phy_gen_xceiv *nop,
{
int err;
+ if (nop-ulpi_vbus 0) {
+ unsigned int flags = 0;
+
+ if (nop-ulpi_vbus 0x1)
+ flags |= ULPI_OTG_DRVVBUS;
+ if (nop-ulpi_vbus 0x2)
+ flags |= ULPI_OTG_DRVVBUS_EXT;
+ if (nop-ulpi_vbus 0x4)
+ flags |= ULPI_OTG_EXTVBUSIND;
+ if (nop-ulpi_vbus 0x8)
+ flags |= ULPI_OTG_CHRGVBUS;
+
+ nop-ulpi = otg_ulpi_create(ulpi_viewport_access_ops, flags);
+ if (!nop-ulpi) {
+ dev_err(dev, Failed create ULPI Phy\n);
+ return -ENOMEM;
+ }
+ dev_dbg(dev, Create ULPI Phy\n);
+ nop-ulpi-io_priv = nop-viewport;
+ }
This is so wrong. You are registering one kind of usb phy driver from
an other. Change drivers/usb/phy/ulpi.c to be a platform device. The
whole flag system in it is pretty horrid. While you are at it, change
that so it sets the values based on boolean flags from OF properties
or platform data.
NAK for the whole set.
Heikki,
Thanks for your comments, even not much positive to me.. any how.
My intention on the horrid path was to reduce kernel code where
one of_read32 vs. four of_boolean. And mentioned logic is simple.
But that's history.
I should probable explain why I have problems with them. First of all,
things like driving the vbus should be a function that can be called
from upper layers. struct usb_otg has the set_vbus hook for that. You
can call it for example from your host controller's init routine. I'm
assuming you have a host controller since you are driving vbus.
My platform is Freescale imx27 and the host controller the ChipIdea, where I
have already send some patches for. I uses the set_vbus it in the wrong place
nop-ulpi-otg-set_vbus(nop-ulpi-otg,true); (phy-generic:usb_gen_phy_init())
and now I start to understand where is the issue. I must tell chipidea to init
the vbus using the platform
You don't need to set the ULPI_OTG_CHRGVBUS. It's used for the VBUS
pulsing of SRP, which btw. is not anymore supported in OTGEH2.0 spec,
so just don't use that bit even if you want to start SRP.
OK, got it. Test it right away, yes my USB still works great even I omit the
flag. The reason I introduced it was the fact that plat-mxc/isp1504xc.c of the
2.6.22 with the freescale patches set this flag.
The only of_booleans you should need are for the DRV_VBUS_EXT and
USE_EXT_VBUS_IND. In my case I could not use even those. My controller
provides it's own control for them, so even if I set them to my ULPI
phy, the controller would simply override the values.
Secondly, why those silly flags in the first place. Those flags are
just bits in the registers. It would have been much easier and cleaner
to deliver a small struct with default values for the registers
instead.
On my way to find a solution for my board I'd look around and found using of
phy-ulpi.c functions in phy-tegra-usb.c and don't mind to use them too.
OK, IC. I have not followed what is happening with USB in linux for a
while.
The whole otg_ulpi_create() thing, and the flags with it, were
originally planned to be used from platform code. It's evil and it
should have never been accepted into upstream kernel. The time it was
introduced I was on vacation and nobody else seemed to care :(. All I
was able to do was to protest afterwards.
Checked!
I accept your NAK and will work on a patch to make phy-ulpi.c
working as platform device.
Last question to you. What you don't like on the patch to support
chip-select gpio of my patch-set.. I ask because you NAK the whole
set.
I really need the ChipSelect function to make my hardware work!
OK, I did not explain my problem with that patch. I'm sorry about
that. It also looks like I made wrong assumption with it. I thought
that your phy (is was ISP1504 right) is just like isp1704 that I have
worked with. On isp1704 you only have the chip_sel pin (no reset pin),
so I thought you can not have any reason to add handler for an other
gpio to this driver. After a quick look at isp1504 data sheet, it
looks like you have both reset and chip_sel pins on it, which I guess
are both connected to gpios on your platform.
Yes 1504, and my hardware guys make otg using the chipselect with gpio
and the usbh2 is fixed selected via pull down resistor.
So I don't have a problem with that. Though I'm not sure is this
driver the right place to handle things like these gpios, which are
pretty phy specific, in the first place.
Re: [PATCH] usb: core: Abort deauthorization if unsetting configuration fails
Instead, how about changing usb_set_configuration() so that it will never fail when the new config is -1? Except perhaps for -ENODEV errors (the device has been disconnected), which usb_deauthorize_device() could check for. Yes, that should work as well. It's really just one autoresume and one disable_lpm that can fail in that case so it shouldn't be too intrusive. I would prefer not to special-case ENODEV though, no need to add more complexity than necessary. I will write up a new version for that tomorrow. -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/2] usb: chipidea: fix mistake in device tree binding of nspire-usb to use vendor name 'lsi' instead of SoC name 'zevio'
Hi,
On 05/12/2013, at 12:44 AM, Peter Chen peter.c...@freescale.com wrote:
lsi is vendor name, what are zevio and nspire?
Usually, the compatible string should be vendor_name,soc_name-module_name
Because this port uses documentation from reverse engineering, it's difficult
to work out what is SoC specific and what is device specific. The SoC is Zevio
but the driver is written for the TI-Nspire.
If it's usually vendor_name,soc_name-module_name, I'll fix up this patch with
zevio instead of nspire (and it'll be more consistent with the other drivers).
- reg: Should contain registers location and length
- interrupts: Should contain controller interrupt
@@ -11,7 +11,7 @@ Recommended properies:
Examples:
usb0: usb@B000 {
reg = 0xB000 0x1000;
-compatible = zevio,nspire-usb;
+compatible = lsi,nspire-usb;
interrupts = 8;
vbus-supply = vbus_reg;
};
diff --git a/drivers/usb/chipidea/ci_hdrc_nspire.c
b/drivers/usb/chipidea/ci_hdrc_nspire.c
index 517ce41..c5c2dde 100644
--- a/drivers/usb/chipidea/ci_hdrc_nspire.c
+++ b/drivers/usb/chipidea/ci_hdrc_nspire.c
@@ -52,7 +52,7 @@ static int ci_hdrc_nspire_remove(struct platform_device
*pdev)
}
static const struct of_device_id ci_hdrc_nspire_dt_ids[] = {
-{ .compatible = zevio,nspire-usb, },
+{ .compatible = lsi,nspire-usb, },
{ /* sentinel */ }
};
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Best Regards,
Peter Chen
Cheers,
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Re: [PATCH 1/2] usb: chipidea: fix mistake in device tree binding of nspire-usb to use vendor name 'lsi' instead of SoC name 'zevio'
Hi, On 04/12/2013, at 11:18 PM, Mark Rutland mark.rutl...@arm.com wrote: Required properties: -- compatible: Should be zevio,nspire-usb +- compatible: Should be lsi,nspire-usb Surely this should be lsi,zevio-usb, matching the lsi,zevio-timer binding? You're right. I'll fix up the patch and send it back in. Thanks, Mark. Cheers, Daniel Tang -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 04/10] usb: dwc3: use quirks to know if a particualr platform doesn't have PHY
Hi, On Wednesday 04 December 2013 08:10 PM, Heikki Krogerus wrote: Hi guys, Kishon, sorry I did not see this v3 set. On Mon, Nov 25, 2013 at 03:31:24PM +0530, Kishon Vijay Abraham I wrote: There can be systems which does not have an external phy, so get phy only if no quirks are added that indicates the PHY is not present. Introduced two quirk flags to indicate the *absence* of usb2 phy and usb3 phy. Also remove checking if return value is -ENXIO since it's now changed to always enable usb_phy layer. Can you guys explain why is something like this needed? Like with clocks and gpios, the device drivers shouldn't need to care any more if the platform has the phys or not. -ENODEV tells you your platform Shouldn't we report if a particular platform needs a PHY and not able to get it. How will a user know if a particular controller is not working because it's not able to get and initialize the PHYs? Don't you think in such cases it's better to fail (and return from probe) because the controller will not work anyway without the PHY? Thanks Kishon -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] usb: chipidea: fix device tree binding for zevio/nspire usb driver
From: Daniel Tang dt.ta...@gmail.com
The device tree binding chosen for the nspire-usb driver was inappropriate and
should be renamed to lsi,zevio-usb.
References to nspire have been replaced with zevio (the SoC name)
Signed-off-by: Daniel Tang dt.ta...@gmail.com
---
.../devicetree/bindings/usb/ci-hdrc-nspire.txt | 17 -
.../devicetree/bindings/usb/ci-hdrc-zevio.txt | 17 +
drivers/usb/chipidea/Makefile |2 +-
drivers/usb/chipidea/ci_hdrc_nspire.c | 72
drivers/usb/chipidea/ci_hdrc_zevio.c | 72
5 files changed, 90 insertions(+), 90 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/usb/ci-hdrc-nspire.txt
create mode 100644 Documentation/devicetree/bindings/usb/ci-hdrc-zevio.txt
delete mode 100644 drivers/usb/chipidea/ci_hdrc_nspire.c
create mode 100644 drivers/usb/chipidea/ci_hdrc_zevio.c
diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-nspire.txt
b/Documentation/devicetree/bindings/usb/ci-hdrc-nspire.txt
deleted file mode 100644
index ef1fcbf..000
--- a/Documentation/devicetree/bindings/usb/ci-hdrc-nspire.txt
+++ /dev/null
@@ -1,17 +0,0 @@
-* TI-Nspire USB OTG Controller
-
-Required properties:
-- compatible: Should be lsi,nspire-usb
-- reg: Should contain registers location and length
-- interrupts: Should contain controller interrupt
-
-Recommended properies:
-- vbus-supply: regulator for vbus
-
-Examples:
- usb0: usb@B000 {
- reg = 0xB000 0x1000;
- compatible = lsi,nspire-usb;
- interrupts = 8;
- vbus-supply = vbus_reg;
- };
diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-zevio.txt
b/Documentation/devicetree/bindings/usb/ci-hdrc-zevio.txt
new file mode 100644
index 000..b6c3b5c
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/ci-hdrc-zevio.txt
@@ -0,0 +1,17 @@
+* TI-Nspire USB OTG Controller
+
+Required properties:
+- compatible: Should be lsi,zevio-usb
+- reg: Should contain registers location and length
+- interrupts: Should contain controller interrupt
+
+Recommended properies:
+- vbus-supply: regulator for vbus
+
+Examples:
+ usb0: usb@B000 {
+ reg = 0xB000 0x1000;
+ compatible = lsi,zevio-usb;
+ interrupts = 8;
+ vbus-supply = vbus_reg;
+ };
diff --git a/drivers/usb/chipidea/Makefile b/drivers/usb/chipidea/Makefile
index 245ea4d..7635407 100644
--- a/drivers/usb/chipidea/Makefile
+++ b/drivers/usb/chipidea/Makefile
@@ -10,7 +10,7 @@ ci_hdrc-$(CONFIG_USB_CHIPIDEA_DEBUG) += debug.o
# Glue/Bridge layers go here
obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc_msm.o
-obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc_nspire.o
+obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc_zevio.o
# PCI doesn't provide stubs, need to check
ifneq ($(CONFIG_PCI),)
diff --git a/drivers/usb/chipidea/ci_hdrc_nspire.c
b/drivers/usb/chipidea/ci_hdrc_nspire.c
deleted file mode 100644
index c5c2dde..000
--- a/drivers/usb/chipidea/ci_hdrc_nspire.c
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * Copyright (C) 2013 Daniel Tang tan...@tangrs.id.au
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2, as
- * published by the Free Software Foundation.
- *
- * Based off drivers/usb/chipidea/ci_hdrc_msm.c
- *
- */
-
-#include linux/module.h
-#include linux/platform_device.h
-#include linux/usb/gadget.h
-#include linux/usb/chipidea.h
-
-#include ci.h
-
-static struct ci_hdrc_platform_data ci_hdrc_nspire_platdata = {
- .name = ci_hdrc_nspire,
- .flags = CI_HDRC_REGS_SHARED,
- .capoffset = DEF_CAPOFFSET,
-};
-
-static int ci_hdrc_nspire_probe(struct platform_device *pdev)
-{
- struct platform_device *ci_pdev;
-
- dev_dbg(pdev-dev, ci_hdrc_nspire_probe\n);
-
- ci_pdev = ci_hdrc_add_device(pdev-dev,
- pdev-resource, pdev-num_resources,
- ci_hdrc_nspire_platdata);
-
- if (IS_ERR(ci_pdev)) {
- dev_err(pdev-dev, ci_hdrc_add_device failed!\n);
- return PTR_ERR(ci_pdev);
- }
-
- platform_set_drvdata(pdev, ci_pdev);
-
- return 0;
-}
-
-static int ci_hdrc_nspire_remove(struct platform_device *pdev)
-{
- struct platform_device *ci_pdev = platform_get_drvdata(pdev);
-
- ci_hdrc_remove_device(ci_pdev);
-
- return 0;
-}
-
-static const struct of_device_id ci_hdrc_nspire_dt_ids[] = {
- { .compatible = lsi,nspire-usb, },
- { /* sentinel */ }
-};
-
-static struct platform_driver ci_hdrc_nspire_driver = {
- .probe = ci_hdrc_nspire_probe,
- .remove = ci_hdrc_nspire_remove,
- .driver = {
- .name =
[PATCH 0/7] Chipidea Fix for 3.13-rc2
Hi Greg, This patchset includes chipidea fixes for 3.13-rc2, the mainly fixes include add correct imx28 write register method, fixing un-initialized variable, etc. Chris Ruehl (2): usb: chipidea: Fix Internal error: : 808 [#1] ARM related to STS flag usb: chipidea: put hw_phymode_configure before ci_usb_phy_init Fabio Estevam (1): usb: chipidea: host: Only disable the vbus regulator if it is not NULL Peter Chen (4): usb: chipidea: fix nobody cared IRQ when booting with host role usb: ehci: add freescale imx28 special write register method usb: chipidea: add freescale imx28 special write register method usb: chipidea: imx: set CI_HDRC_IMX28_WRITE_FIX for imx28 drivers/usb/chipidea/ci.h | 26 -- drivers/usb/chipidea/ci_hdrc_imx.c | 32 ++-- drivers/usb/chipidea/core.c| 18 +- drivers/usb/chipidea/host.c|4 +++- drivers/usb/chipidea/udc.c |3 --- drivers/usb/host/ehci.h| 18 +- include/linux/usb/chipidea.h |1 + 7 files changed, 84 insertions(+), 18 deletions(-) -- 1.7.8 -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/7] usb: chipidea: host: Only disable the vbus regulator if it is not NULL
From: Fabio Estevam fabio.este...@freescale.com Commit 40ed51a4b (usb: chipidea: host: add vbus regulator control) introduced a smatch complaint because regulator_disable() is called without checking whether ci-platdata-reg_vbus is not NULL. Fix this by adding the check. This patch is needed for 3.12 stable Cc: stable sta...@vger.kernel.org Reported-by: Dan Carpenter dan.carpen...@oracle.com Signed-off-by: Fabio Estevam fabio.este...@freescale.com Signed-off-by: Peter Chen peter.c...@freescale.com --- drivers/usb/chipidea/host.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c index 59e6020..526cd77 100644 --- a/drivers/usb/chipidea/host.c +++ b/drivers/usb/chipidea/host.c @@ -88,7 +88,8 @@ static int host_start(struct ci_hdrc *ci) return ret; disable_reg: - regulator_disable(ci-platdata-reg_vbus); + if (ci-platdata-reg_vbus) + regulator_disable(ci-platdata-reg_vbus); put_hcd: usb_put_hcd(hcd); -- 1.7.8 -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 7/7] usb: chipidea: put hw_phymode_configure before ci_usb_phy_init
From: Chris Ruehl chris.ru...@gtsys.com.hk
hw_phymode_configure configures the PORTSC registers and allow the
following phy_inits to operate on the right parameters. This fix a problem
where the UPLI (ISP1504) could not be detected, because the Viewport was not
available and read the viewport return 0's only.
Signed-off-by: Chris Ruehl chris.ru...@gtsys.com.hk
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/chipidea/core.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 1677fed..20ed5e2 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -565,6 +565,8 @@ static int ci_hdrc_probe(struct platform_device *pdev)
return -ENODEV;
}
+ hw_phymode_configure(ci);
+
ret = ci_usb_phy_init(ci);
if (ret) {
dev_err(dev, unable to init phy: %d\n, ret);
@@ -582,8 +584,6 @@ static int ci_hdrc_probe(struct platform_device *pdev)
ci_get_otg_capable(ci);
- hw_phymode_configure(ci);
-
dr_mode = ci-platdata-dr_mode;
/* initialize role(s) before the interrupt is requested */
if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_HOST) {
--
1.7.8
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[PATCH 2/7] usb: chipidea: fix nobody cared IRQ when booting with host role
If we connect Male-A-To-Male-A cable between otg-host and host pc,
the ci-vbus_active is set wrongly, and cause the controller run
at peripheral mode when we load gadget module (ci_udc_start will be run),
but the software runs at host mode due to id = 0. The ehci_irq
can't handle suspend (USBi_SLI) interrupt which is enabled for
peripheral mode, it causes no one will handle irq error.
This patch is needed for 3.12 stable
Cc: stable sta...@vger.kernel.org
Acked-by: Michael Grzeschik m...@pengutronix.de
Reported-by: Marc Kleine-Budde m...@pengutronix.de
Tested-by: Marc Kleine-Budde m...@pengutronix.de
Signed-off-by: Marc Kleine-Budde m...@pengutronix.de
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/chipidea/core.c |4
drivers/usb/chipidea/udc.c |3 ---
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 5d8981c..6e73f8c 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -642,6 +642,10 @@ static int ci_hdrc_probe(struct platform_device *pdev)
: CI_ROLE_GADGET;
}
+ /* only update vbus status for peripheral */
+ if (ci-role == CI_ROLE_GADGET)
+ ci_handle_vbus_change(ci);
+
ret = ci_role_start(ci, ci-role);
if (ret) {
dev_err(dev, can't start %s role\n, ci_role(ci)-name);
diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
index b34c819..69d20fb 100644
--- a/drivers/usb/chipidea/udc.c
+++ b/drivers/usb/chipidea/udc.c
@@ -1795,9 +1795,6 @@ static int udc_start(struct ci_hdrc *ci)
pm_runtime_no_callbacks(ci-gadget.dev);
pm_runtime_enable(ci-gadget.dev);
- /* Update ci-vbus_active */
- ci_handle_vbus_change(ci);
-
return retval;
destroy_eps:
--
1.7.8
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[PATCH 6/7] usb: chipidea: Fix Internal error: : 808 [#1] ARM related to STS flag
From: Chris Ruehl chris.ru...@gtsys.com.hk
* init the sts flag to 0 (missed)
* fix write the real bit not sts value
* Set PORTCS_STS and DEVLC_STS only if sts = 1
Signed-off-by: Chris Ruehl chris.ru...@gtsys.com.hk
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/chipidea/core.c |8 +---
1 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 5efdc9b..1677fed 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -242,7 +242,7 @@ static int hw_device_init(struct ci_hdrc *ci, void __iomem
*base)
static void hw_phymode_configure(struct ci_hdrc *ci)
{
- u32 portsc, lpm, sts;
+ u32 portsc, lpm, sts = 0;
switch (ci-platdata-phy_mode) {
case USBPHY_INTERFACE_MODE_UTMI:
@@ -272,10 +272,12 @@ static void hw_phymode_configure(struct ci_hdrc *ci)
if (ci-hw_bank.lpm) {
hw_write(ci, OP_DEVLC, DEVLC_PTS(7) | DEVLC_PTW, lpm);
- hw_write(ci, OP_DEVLC, DEVLC_STS, sts);
+ if (sts)
+ hw_write(ci, OP_DEVLC, DEVLC_STS, DEVLC_STS);
} else {
hw_write(ci, OP_PORTSC, PORTSC_PTS(7) | PORTSC_PTW, portsc);
- hw_write(ci, OP_PORTSC, PORTSC_STS, sts);
+ if (sts)
+ hw_write(ci, OP_PORTSC, PORTSC_STS, PORTSC_STS);
}
}
--
1.7.8
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[PATCH 3/7] usb: ehci: add freescale imx28 special write register method
According to Freescale imx28 Errata, ENGR119653 USB: ARM to USB
register error issue, All USB register write operations must
use the ARM SWP instruction. So, we implement a special ehci_write
for imx28.
Discussion for it at below:
http://marc.info/?l=linux-usbm=137996395529294w=2
Signed-off-by: Peter Chen peter.c...@freescale.com
Acked-by: Alan Stern st...@rowland.harvard.edu
Signed-off-by: Marc Kleine-Budde m...@pengutronix.de
Tested-by: Marc Kleine-Budde m...@pengutronix.de
---
drivers/usb/host/ehci.h | 18 +-
1 files changed, 17 insertions(+), 1 deletions(-)
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index e8f41c5..4a320ab 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -225,6 +225,7 @@ struct ehci_hcd { /* one per controller */
unsignedhas_synopsys_hc_bug:1; /* Synopsys HC */
unsignedframe_index_bug:1; /* MosChip (AKA NetMos) */
unsignedneed_oc_pp_cycle:1; /* MPC834X port power */
+ unsignedimx28_write_fix:1; /* For Freescale i.MX28 */
/* required for usb32 quirk */
#define OHCI_CTRL_HCFS (3 6)
@@ -728,6 +729,18 @@ static inline unsigned int ehci_readl(const struct
ehci_hcd *ehci,
#endif
}
+#ifdef CONFIG_SOC_IMX28
+static inline void imx28_ehci_writel(const unsigned int val,
+ volatile __u32 __iomem *addr)
+{
+ __asm__ (swp %0, %0, [%1] : : r(val), r(addr));
+}
+#else
+static inline void imx28_ehci_writel(const unsigned int val,
+ volatile __u32 __iomem *addr)
+{
+}
+#endif
static inline void ehci_writel(const struct ehci_hcd *ehci,
const unsigned int val, __u32 __iomem *regs)
{
@@ -736,7 +749,10 @@ static inline void ehci_writel(const struct ehci_hcd *ehci,
writel_be(val, regs) :
writel(val, regs);
#else
- writel(val, regs);
+ if (IS_ENABLED(CONFIG_SOC_IMX28) ehci-imx28_write_fix)
+ imx28_ehci_writel(val, regs);
+ else
+ writel(val, regs);
#endif
}
--
1.7.8
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[PATCH 4/7] usb: chipidea: add freescale imx28 special write register method
According to Freescale imx28 Errata, ENGR119653 USB: ARM to USB
register error issue, All USB register write operations must
use the ARM SWP instruction. So, we implement special hw_write
and hw_test_and_clear for imx28.
Discussion for it at below:
http://marc.info/?l=linux-usbm=137996395529294w=2
Signed-off-by: Peter Chen peter.c...@freescale.com
Signed-off-by: Marc Kleine-Budde m...@pengutronix.de
Tested-by: Marc Kleine-Budde m...@pengutronix.de
---
drivers/usb/chipidea/ci.h| 26 --
drivers/usb/chipidea/core.c |2 ++
drivers/usb/chipidea/host.c |1 +
include/linux/usb/chipidea.h |1 +
4 files changed, 28 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
index 1c94fc5..f66bc24 100644
--- a/drivers/usb/chipidea/ci.h
+++ b/drivers/usb/chipidea/ci.h
@@ -135,6 +135,7 @@ struct hw_bank {
* @id_event: indicates there is an id event, and handled at ci_otg_work
* @b_sess_valid_event: indicates there is a vbus event, and handled
* at ci_otg_work
+ * @imx28_write_fix: Freescale imx28 needs swp instruction for writing
*/
struct ci_hdrc {
struct device *dev;
@@ -173,6 +174,7 @@ struct ci_hdrc {
struct dentry *debugfs;
boolid_event;
boolb_sess_valid_event;
+ boolimx28_write_fix;
};
static inline struct ci_role_driver *ci_role(struct ci_hdrc *ci)
@@ -253,6 +255,26 @@ static inline u32 hw_read(struct ci_hdrc *ci, enum
ci_hw_regs reg, u32 mask)
return ioread32(ci-hw_bank.regmap[reg]) mask;
}
+#ifdef CONFIG_SOC_IMX28
+static inline void imx28_ci_writel(u32 val, volatile void __iomem *addr)
+{
+ __asm__ (swp %0, %0, [%1] : : r(val), r(addr));
+}
+#else
+static inline void imx28_ci_writel(u32 val, volatile void __iomem *addr)
+{
+}
+#endif
+
+static inline void __hw_write(struct ci_hdrc *ci, u32 val,
+ void __iomem *addr)
+{
+ if (IS_ENABLED(CONFIG_SOC_IMX28) ci-imx28_write_fix)
+ imx28_ci_writel(val, addr);
+ else
+ iowrite32(val, addr);
+}
+
/**
* hw_write: writes to a hw register
* @reg: register index
@@ -266,7 +288,7 @@ static inline void hw_write(struct ci_hdrc *ci, enum
ci_hw_regs reg,
data = (ioread32(ci-hw_bank.regmap[reg]) ~mask)
| (data mask);
- iowrite32(data, ci-hw_bank.regmap[reg]);
+ __hw_write(ci, data, ci-hw_bank.regmap[reg]);
}
/**
@@ -281,7 +303,7 @@ static inline u32 hw_test_and_clear(struct ci_hdrc *ci,
enum ci_hw_regs reg,
{
u32 val = ioread32(ci-hw_bank.regmap[reg]) mask;
- iowrite32(val, ci-hw_bank.regmap[reg]);
+ __hw_write(ci, val, ci-hw_bank.regmap[reg]);
return val;
}
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 6e73f8c..5efdc9b 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -554,6 +554,8 @@ static int ci_hdrc_probe(struct platform_device *pdev)
ci-dev = dev;
ci-platdata = dev-platform_data;
+ ci-imx28_write_fix = !!(ci-platdata-flags
+ CI_HDRC_IMX28_WRITE_FIX);
ret = hw_device_init(ci, base);
if (ret 0) {
diff --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c
index 526cd77..a8ac6c1 100644
--- a/drivers/usb/chipidea/host.c
+++ b/drivers/usb/chipidea/host.c
@@ -65,6 +65,7 @@ static int host_start(struct ci_hdrc *ci)
ehci-caps = ci-hw_bank.cap;
ehci-has_hostpc = ci-hw_bank.lpm;
ehci-has_tdi_phy_lpm = ci-hw_bank.lpm;
+ ehci-imx28_write_fix = ci-imx28_write_fix;
if (ci-platdata-reg_vbus) {
ret = regulator_enable(ci-platdata-reg_vbus);
diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h
index 7d39967..708bd11 100644
--- a/include/linux/usb/chipidea.h
+++ b/include/linux/usb/chipidea.h
@@ -24,6 +24,7 @@ struct ci_hdrc_platform_data {
* but otg is not supported (no register otgsc).
*/
#define CI_HDRC_DUAL_ROLE_NOT_OTG BIT(4)
+#define CI_HDRC_IMX28_WRITE_FIXBIT(5)
enum usb_dr_modedr_mode;
#define CI_HDRC_CONTROLLER_RESET_EVENT 0
#define CI_HDRC_CONTROLLER_STOPPED_EVENT 1
--
1.7.8
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[PATCH 5/7] usb: chipidea: imx: set CI_HDRC_IMX28_WRITE_FIX for imx28
Due to imx28 needs ARM swp instruction for writing, we set
CI_HDRC_IMX28_WRITE_FIX for imx28.
Signed-off-by: Peter Chen peter.c...@freescale.com
Signed-off-by: Marc Kleine-Budde m...@pengutronix.de
Tested-by: Marc Kleine-Budde m...@pengutronix.de
---
drivers/usb/chipidea/ci_hdrc_imx.c | 32 ++--
1 files changed, 26 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/chipidea/ci_hdrc_imx.c
b/drivers/usb/chipidea/ci_hdrc_imx.c
index bb5d976..c00f772 100644
--- a/drivers/usb/chipidea/ci_hdrc_imx.c
+++ b/drivers/usb/chipidea/ci_hdrc_imx.c
@@ -23,6 +23,26 @@
#include ci.h
#include ci_hdrc_imx.h
+#define CI_HDRC_IMX_IMX28_WRITE_FIX BIT(0)
+
+struct ci_hdrc_imx_platform_flag {
+ unsigned int flags;
+};
+
+static const struct ci_hdrc_imx_platform_flag imx27_usb_data = {
+};
+
+static const struct ci_hdrc_imx_platform_flag imx28_usb_data = {
+ .flags = CI_HDRC_IMX_IMX28_WRITE_FIX,
+};
+
+static const struct of_device_id ci_hdrc_imx_dt_ids[] = {
+ { .compatible = fsl,imx28-usb, .data = imx28_usb_data},
+ { .compatible = fsl,imx27-usb, .data = imx27_usb_data},
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, ci_hdrc_imx_dt_ids);
+
struct ci_hdrc_imx_data {
struct usb_phy *phy;
struct platform_device *ci_pdev;
@@ -82,6 +102,9 @@ static int ci_hdrc_imx_probe(struct platform_device *pdev)
CI_HDRC_DISABLE_STREAMING,
};
int ret;
+ const struct of_device_id *of_id =
+ of_match_device(ci_hdrc_imx_dt_ids, pdev-dev);
+ const struct ci_hdrc_imx_platform_flag *imx_platform_flag = of_id-data;
data = devm_kzalloc(pdev-dev, sizeof(*data), GFP_KERNEL);
if (!data) {
@@ -115,6 +138,9 @@ static int ci_hdrc_imx_probe(struct platform_device *pdev)
pdata.phy = data-phy;
+ if (imx_platform_flag-flags CI_HDRC_IMX_IMX28_WRITE_FIX)
+ pdata.flags |= CI_HDRC_IMX28_WRITE_FIX;
+
ret = dma_coerce_mask_and_coherent(pdev-dev, DMA_BIT_MASK(32));
if (ret)
goto err_clk;
@@ -173,12 +199,6 @@ static int ci_hdrc_imx_remove(struct platform_device *pdev)
return 0;
}
-static const struct of_device_id ci_hdrc_imx_dt_ids[] = {
- { .compatible = fsl,imx27-usb, },
- { /* sentinel */ }
-};
-MODULE_DEVICE_TABLE(of, ci_hdrc_imx_dt_ids);
-
static struct platform_driver ci_hdrc_imx_driver = {
.probe = ci_hdrc_imx_probe,
.remove = ci_hdrc_imx_remove,
--
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Re: [PATCH v3 04/10] usb: dwc3: use quirks to know if a particualr platform doesn't have PHY
Hi, On Thu, Dec 05, 2013 at 12:04:46PM +0530, Kishon Vijay Abraham I wrote: On Wednesday 04 December 2013 08:10 PM, Heikki Krogerus wrote: On Mon, Nov 25, 2013 at 03:31:24PM +0530, Kishon Vijay Abraham I wrote: There can be systems which does not have an external phy, so get phy only if no quirks are added that indicates the PHY is not present. Introduced two quirk flags to indicate the *absence* of usb2 phy and usb3 phy. Also remove checking if return value is -ENXIO since it's now changed to always enable usb_phy layer. Can you guys explain why is something like this needed? Like with clocks and gpios, the device drivers shouldn't need to care any more if the platform has the phys or not. -ENODEV tells you your platform Shouldn't we report if a particular platform needs a PHY and not able to get it. How will a user know if a particular controller is not working because it's not able to get and initialize the PHYs? Don't you think in such cases it's better to fail (and return from probe) because the controller will not work anyway without the PHY? My point is that you do not need to separately tell this to the driver like you do with the quirks (if you did, then you would need to fix your framework and not hack the drivers). Like I said, ENODEV tells you that there is no phy on this platform for you, allowing you to safely continue. If your phy driver is not loaded, the framework already returns EPROBE_DEFER, right. Any other error when getting the phy you can consider critical. They are the errors telling you that you do need a phy on this platform, but something actually went wrong when getting it. Those quirks should always be avoided, and I don't see any use for them here. Thanks Kishon Thanks, -- heikki -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
