Re: [PATCH 02/12] usb: phy-mxs: Enable IC fixes for mx6 SoC serial

2013-10-14 Thread Shawn Guo
On Sat, Oct 12, 2013 at 05:09:36PM +0800, Peter Chen wrote:
 After adding IC fixes bits, some PHY bugs are fixed by
 IC logic.
 
 Signed-off-by: Peter Chen peter.c...@freescale.com
 ---
  drivers/usb/phy/phy-mxs-usb.c |   10 ++
  1 files changed, 10 insertions(+), 0 deletions(-)
 
 diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
 index 87ba429..831b13e 100644
 --- a/drivers/usb/phy/phy-mxs-usb.c
 +++ b/drivers/usb/phy/phy-mxs-usb.c
 @@ -29,6 +29,10 @@
  #define HW_USBPHY_CTRL_SET   0x34
  #define HW_USBPHY_CTRL_CLR   0x38
  
 +#define HW_USBPHY_IP 0x90
 +#define HW_USBPHY_IP_SET 0x94
 +#define HW_USBPHY_IP_CLR 0x98
 +
  #define BM_USBPHY_CTRL_SFTRSTBIT(31)
  #define BM_USBPHY_CTRL_CLKGATE   BIT(30)
  #define BM_USBPHY_CTRL_ENAUTOSET_USBCLKS BIT(26)
 @@ -40,6 +44,8 @@
  #define BM_USBPHY_CTRL_ENUTMILEVEL2  BIT(14)
  #define BM_USBPHY_CTRL_ENHOSTDISCONDETECTBIT(1)
  
 +#define BM_USBPHY_IP_FIX   (BIT(17) | BIT(18))
 +
  #define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
  
  enum imx_phy_type {
 @@ -118,6 +124,10 @@ static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
   BM_USBPHY_CTRL_ENUTMILEVEL3,
  base + HW_USBPHY_CTRL_SET);
  
 + /* Enable IC solution */
 + if (is_mx6q_phy(mxs_phy) || is_mx6sl_phy(mxs_phy))

Am I missing any dependency/patches here?  Where were is_mx6q_phy() and
is_mx6sl_phy() introduced?

Shawn

 + writel(BM_USBPHY_IP_FIX, base + HW_USBPHY_IP_SET);
 +
   return 0;
  }
  
 -- 
 1.7.1
 
 

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Re: [PATCH 02/12] usb: phy-mxs: Enable IC fixes for mx6 SoC serial

2013-10-14 Thread Peter Chen
On Mon, Oct 14, 2013 at 05:09:55PM +0800, Shawn Guo wrote:
 On Sat, Oct 12, 2013 at 05:09:36PM +0800, Peter Chen wrote:
  After adding IC fixes bits, some PHY bugs are fixed by
  IC logic.
  
  Signed-off-by: Peter Chen peter.c...@freescale.com
  ---
   drivers/usb/phy/phy-mxs-usb.c |   10 ++
   1 files changed, 10 insertions(+), 0 deletions(-)
  
  diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
  index 87ba429..831b13e 100644
  --- a/drivers/usb/phy/phy-mxs-usb.c
  +++ b/drivers/usb/phy/phy-mxs-usb.c
  @@ -29,6 +29,10 @@
   #define HW_USBPHY_CTRL_SET 0x34
   #define HW_USBPHY_CTRL_CLR 0x38
   
  +#define HW_USBPHY_IP   0x90
  +#define HW_USBPHY_IP_SET   0x94
  +#define HW_USBPHY_IP_CLR   0x98
  +
   #define BM_USBPHY_CTRL_SFTRST  BIT(31)
   #define BM_USBPHY_CTRL_CLKGATE BIT(30)
   #define BM_USBPHY_CTRL_ENAUTOSET_USBCLKS   BIT(26)
  @@ -40,6 +44,8 @@
   #define BM_USBPHY_CTRL_ENUTMILEVEL2BIT(14)
   #define BM_USBPHY_CTRL_ENHOSTDISCONDETECT  BIT(1)
   
  +#define BM_USBPHY_IP_FIX   (BIT(17) | BIT(18))
  +
   #define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
   
   enum imx_phy_type {
  @@ -118,6 +124,10 @@ static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
  BM_USBPHY_CTRL_ENUTMILEVEL3,
 base + HW_USBPHY_CTRL_SET);
   
  +   /* Enable IC solution */
  +   if (is_mx6q_phy(mxs_phy) || is_mx6sl_phy(mxs_phy))
 
 Am I missing any dependency/patches here?  Where were is_mx6q_phy() and
 is_mx6sl_phy() introduced?
 
 Shawn
 
  +   writel(BM_USBPHY_IP_FIX, base + HW_USBPHY_IP_SET);
  +
  return 0;
   }
   
  -- 
  1.7.1
  
  

Oh, sorry. I forget to put below one to this serial.
Will do at v2

http://marc.info/?l=linux-usbm=137871552016298w=2

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Peter Chen

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Re: [PATCH 02/12] usb: phy-mxs: Enable IC fixes for mx6 SoC serial

2013-10-14 Thread Shawn Guo
On Mon, Oct 14, 2013 at 05:09:56PM +0800, Peter Chen wrote:
 Oh, sorry. I forget to put below one to this serial.
 Will do at v2
 
 http://marc.info/?l=linux-usbm=137871552016298w=2

Remember to document the new compatible strings in bindings doc.

Shawn

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Re: [PATCH 02/12] usb: phy-mxs: Enable IC fixes for mx6 SoC serial

2013-10-14 Thread Peter Chen
On Mon, Oct 14, 2013 at 05:29:21PM +0800, Shawn Guo wrote:
 On Mon, Oct 14, 2013 at 05:09:56PM +0800, Peter Chen wrote:
  Oh, sorry. I forget to put below one to this serial.
  Will do at v2
  
  http://marc.info/?l=linux-usbm=137871552016298w=2
 
 Remember to document the new compatible strings in bindings doc.
 

Will do, thanks

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Best Regards,
Peter Chen

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Re: [PATCH 02/12] usb: phy-mxs: Enable IC fixes for mx6 SoC serial

2013-10-13 Thread Peter Chen
On Sat, Oct 12, 2013 at 11:38:16AM +0200, Marek Vasut wrote:
 Hi,
 
  After adding IC fixes bits, some PHY bugs are fixed by
  IC logic.
 
 Can you please elaborate what those bits do exactly ? They seem like a magic 
 stuff to me thus far, which is not exactly helpful . I can't find them in the 
 datasheet either.
 

Yes, these bits are added at late TO verion for i.mx 6, and these TO versions
will be for mass production, unfortunately, the related doc update may be 
forgotten.

These two bits are related to two PHY bugs, two PHY bugs are still existed
at mx28 and mx23, one bug is fixed at mx6dq and mx6dl, and both of two
bugs are fixed at later mx6 (like mx6sololite and later SoCs), but the IC
fixes are not enabled by default, it needs software opens it.

-- 

Best Regards,
Peter Chen

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Re: [PATCH 02/12] usb: phy-mxs: Enable IC fixes for mx6 SoC serial

2013-10-13 Thread Marek Vasut
Dear Peter Chen,

 On Sat, Oct 12, 2013 at 11:38:16AM +0200, Marek Vasut wrote:
  Hi,
  
   After adding IC fixes bits, some PHY bugs are fixed by
   IC logic.
  
  Can you please elaborate what those bits do exactly ? They seem like a
  magic stuff to me thus far, which is not exactly helpful . I can't find
  them in the datasheet either.
 
 Yes, these bits are added at late TO verion for i.mx 6, and these TO
 versions will be for mass production, unfortunately, the related doc
 update may be forgotten.
 
 These two bits are related to two PHY bugs, two PHY bugs are still existed
 at mx28 and mx23, one bug is fixed at mx6dq and mx6dl, and both of two
 bugs are fixed at later mx6 (like mx6sololite and later SoCs), but the IC
 fixes are not enabled by default, it needs software opens it.

Sure, I get it. But what exactly does that bit do? Can you add a proper (and 
likely beefy) comment into the code to supplement the missing parts in the 
datasheet?

Best regards,
Marek Vasut
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Re: [PATCH 02/12] usb: phy-mxs: Enable IC fixes for mx6 SoC serial

2013-10-13 Thread Peter Chen
On Mon, Oct 14, 2013 at 04:07:10AM +0200, Marek Vasut wrote:
 Dear Peter Chen,
 
  On Sat, Oct 12, 2013 at 11:38:16AM +0200, Marek Vasut wrote:
   Hi,
   
After adding IC fixes bits, some PHY bugs are fixed by
IC logic.
   
   Can you please elaborate what those bits do exactly ? They seem like a
   magic stuff to me thus far, which is not exactly helpful . I can't find
   them in the datasheet either.
  
  Yes, these bits are added at late TO verion for i.mx 6, and these TO
  versions will be for mass production, unfortunately, the related doc
  update may be forgotten.
  
  These two bits are related to two PHY bugs, two PHY bugs are still existed
  at mx28 and mx23, one bug is fixed at mx6dq and mx6dl, and both of two
  bugs are fixed at later mx6 (like mx6sololite and later SoCs), but the IC
  fixes are not enabled by default, it needs software opens it.
 
 Sure, I get it. But what exactly does that bit do? Can you add a proper (and 
 likely beefy) comment into the code to supplement the missing parts in the 
 datasheet?

OK, I will add them at v2.

-- 

Best Regards,
Peter Chen

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[PATCH 02/12] usb: phy-mxs: Enable IC fixes for mx6 SoC serial

2013-10-12 Thread Peter Chen
After adding IC fixes bits, some PHY bugs are fixed by
IC logic.

Signed-off-by: Peter Chen peter.c...@freescale.com
---
 drivers/usb/phy/phy-mxs-usb.c |   10 ++
 1 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
index 87ba429..831b13e 100644
--- a/drivers/usb/phy/phy-mxs-usb.c
+++ b/drivers/usb/phy/phy-mxs-usb.c
@@ -29,6 +29,10 @@
 #define HW_USBPHY_CTRL_SET 0x34
 #define HW_USBPHY_CTRL_CLR 0x38
 
+#define HW_USBPHY_IP   0x90
+#define HW_USBPHY_IP_SET   0x94
+#define HW_USBPHY_IP_CLR   0x98
+
 #define BM_USBPHY_CTRL_SFTRST  BIT(31)
 #define BM_USBPHY_CTRL_CLKGATE BIT(30)
 #define BM_USBPHY_CTRL_ENAUTOSET_USBCLKS   BIT(26)
@@ -40,6 +44,8 @@
 #define BM_USBPHY_CTRL_ENUTMILEVEL2BIT(14)
 #define BM_USBPHY_CTRL_ENHOSTDISCONDETECT  BIT(1)
 
+#define BM_USBPHY_IP_FIX   (BIT(17) | BIT(18))
+
 #define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
 
 enum imx_phy_type {
@@ -118,6 +124,10 @@ static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
BM_USBPHY_CTRL_ENUTMILEVEL3,
   base + HW_USBPHY_CTRL_SET);
 
+   /* Enable IC solution */
+   if (is_mx6q_phy(mxs_phy) || is_mx6sl_phy(mxs_phy))
+   writel(BM_USBPHY_IP_FIX, base + HW_USBPHY_IP_SET);
+
return 0;
 }
 
-- 
1.7.1


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Re: [PATCH 02/12] usb: phy-mxs: Enable IC fixes for mx6 SoC serial

2013-10-12 Thread Marek Vasut
Hi,

 After adding IC fixes bits, some PHY bugs are fixed by
 IC logic.

Can you please elaborate what those bits do exactly ? They seem like a magic 
stuff to me thus far, which is not exactly helpful . I can't find them in the 
datasheet either.

 Signed-off-by: Peter Chen peter.c...@freescale.com
 ---
  drivers/usb/phy/phy-mxs-usb.c |   10 ++
  1 files changed, 10 insertions(+), 0 deletions(-)
 
 diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
 index 87ba429..831b13e 100644
 --- a/drivers/usb/phy/phy-mxs-usb.c
 +++ b/drivers/usb/phy/phy-mxs-usb.c
 @@ -29,6 +29,10 @@
  #define HW_USBPHY_CTRL_SET   0x34
  #define HW_USBPHY_CTRL_CLR   0x38
 
 +#define HW_USBPHY_IP 0x90
 +#define HW_USBPHY_IP_SET 0x94
 +#define HW_USBPHY_IP_CLR 0x98
 +
  #define BM_USBPHY_CTRL_SFTRSTBIT(31)
  #define BM_USBPHY_CTRL_CLKGATE   BIT(30)
  #define BM_USBPHY_CTRL_ENAUTOSET_USBCLKS BIT(26)
 @@ -40,6 +44,8 @@
  #define BM_USBPHY_CTRL_ENUTMILEVEL2  BIT(14)
  #define BM_USBPHY_CTRL_ENHOSTDISCONDETECTBIT(1)
 
 +#define BM_USBPHY_IP_FIX   (BIT(17) | BIT(18))
 +
  #define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
 
  enum imx_phy_type {
 @@ -118,6 +124,10 @@ static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
   BM_USBPHY_CTRL_ENUTMILEVEL3,
  base + HW_USBPHY_CTRL_SET);
 
 + /* Enable IC solution */
 + if (is_mx6q_phy(mxs_phy) || is_mx6sl_phy(mxs_phy))
 + writel(BM_USBPHY_IP_FIX, base + HW_USBPHY_IP_SET);
 +
   return 0;
  }

Best regards,
Marek Vasut
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