Re: [PATCH 1/7] clk: gxbb: expose USB clocks

2016-09-08 Thread Kevin Hilman 
Stephen Boyd  writes:

> On 09/04, Martin Blumenstingl wrote:
>> USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
>> dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
>> Expose these clocks to DT and comment out in clk driver.
>> 
>> Signed-off-by: Jerome Brunet 
>> Signed-off-by: Martin Blumenstingl 
>> ---
>
> Assuming authorship is resolved:
>
> Acked-by: Stephen Boyd 

After some clarification from Jerome (Martin is the primary author),
I've applied this, with the SoB order swapped.

Kevin
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Re: [PATCH 1/7] clk: gxbb: expose USB clocks

2016-09-07 Thread Kevin Hilman 
On Wed, Sep 7, 2016 at 3:14 PM, Stephen Boyd  wrote:
> On 09/07, Martin Blumenstingl wrote:
>> On Wed, Sep 7, 2016 at 2:33 AM, Stephen Boyd  wrote:
>> > On 09/04, Martin Blumenstingl wrote:
>> >> USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
>> >> dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
>> >> Expose these clocks to DT and comment out in clk driver.
>> >>
>> >> Signed-off-by: Jerome Brunet 
>> >> Signed-off-by: Martin Blumenstingl 
>> >
>> > Is authorship correct on this patch? Did Jerome author it
>> > instead?
>> We (Jerome and I) have both worked on this patch, that's why you have
>> two signed-off-by's.
>> Or is this simply about the order (author = from address should be
>> listed first)?
>
> Yes. Typically author is listed first in the signed-off-by chain.
>

And if you use git-format-patch + git-send-email, there would also be a

From: Jerome Brunet 

at the beginning so that when it gets applied by the maintainer,
authorship is correct.

Kevin
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Re: [PATCH 1/7] clk: gxbb: expose USB clocks

2016-09-07 Thread Stephen Boyd 
On 09/07, Martin Blumenstingl wrote:
> On Wed, Sep 7, 2016 at 2:33 AM, Stephen Boyd  wrote:
> > On 09/04, Martin Blumenstingl wrote:
> >> USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
> >> dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
> >> Expose these clocks to DT and comment out in clk driver.
> >>
> >> Signed-off-by: Jerome Brunet 
> >> Signed-off-by: Martin Blumenstingl 
> >
> > Is authorship correct on this patch? Did Jerome author it
> > instead?
> We (Jerome and I) have both worked on this patch, that's why you have
> two signed-off-by's.
> Or is this simply about the order (author = from address should be
> listed first)?

Yes. Typically author is listed first in the signed-off-by chain.

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Re: [PATCH 1/7] clk: gxbb: expose USB clocks

2016-09-07 Thread Martin Blumenstingl 
On Wed, Sep 7, 2016 at 2:33 AM, Stephen Boyd  wrote:
> On 09/04, Martin Blumenstingl wrote:
>> USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
>> dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
>> Expose these clocks to DT and comment out in clk driver.
>>
>> Signed-off-by: Jerome Brunet 
>> Signed-off-by: Martin Blumenstingl 
>
> Is authorship correct on this patch? Did Jerome author it
> instead?
We (Jerome and I) have both worked on this patch, that's why you have
two signed-off-by's.
Or is this simply about the order (author = from address should be
listed first)?


Regards,
Martin
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Re: [PATCH 1/7] clk: gxbb: expose USB clocks

2016-09-07 Thread Stephen Boyd 
On 09/04, Martin Blumenstingl wrote:
> USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
> dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
> Expose these clocks to DT and comment out in clk driver.
> 
> Signed-off-by: Jerome Brunet 
> Signed-off-by: Martin Blumenstingl 
> ---

Assuming authorship is resolved:

Acked-by: Stephen Boyd 

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Re: [PATCH 1/7] clk: gxbb: expose USB clocks

2016-09-06 Thread Stephen Boyd 
On 09/04, Martin Blumenstingl wrote:
> USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
> dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
> Expose these clocks to DT and comment out in clk driver.
> 
> Signed-off-by: Jerome Brunet 
> Signed-off-by: Martin Blumenstingl 

Is authorship correct on this patch? Did Jerome author it
instead?

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[PATCH 1/7] clk: gxbb: expose USB clocks

2016-09-04 Thread Martin Blumenstingl 
USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
Expose these clocks to DT and comment out in clk driver.

Signed-off-by: Jerome Brunet 
Signed-off-by: Martin Blumenstingl 
---
 drivers/clk/meson/gxbb.h  | 10 +-
 include/dt-bindings/clock/gxbb-clkc.h |  5 +
 2 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h
index 3606e875..c66df2d 100644
--- a/drivers/clk/meson/gxbb.h
+++ b/drivers/clk/meson/gxbb.h
@@ -218,12 +218,12 @@
 #define CLKID_AIU47
 #define CLKID_UART1  48
 #define CLKID_G2D49
-#define CLKID_USB0   50
-#define CLKID_USB1   51
+/* CLKID_USB0 */
+/* CLKID_USB1 */
 #define CLKID_RESET  52
 #define CLKID_NAND   53
 #define CLKID_DOS_PARSER 54
-#define CLKID_USB55
+/* CLKID_USB */
 #define CLKID_VDIN1  56
 #define CLKID_AHB_ARB0   57
 #define CLKID_EFUSE  58
@@ -232,8 +232,8 @@
 #define CLKID_AHB_CTRL_BUS   61
 #define CLKID_HDMI_INTR_SYNC 62
 #define CLKID_HDMI_PCLK  63
-#define CLKID_USB1_DDR_BRIDGE64
-#define CLKID_USB0_DDR_BRIDGE65
+/* CLKID_USB1_DDR_BRIDGE */
+/* CLKID_USB0_DDR_BRIDGE */
 #define CLKID_MMC_PCLK   66
 #define CLKID_DVIN   67
 #define CLKID_UART2  68
diff --git a/include/dt-bindings/clock/gxbb-clkc.h 
b/include/dt-bindings/clock/gxbb-clkc.h
index 244ea6e..a03463f 100644
--- a/include/dt-bindings/clock/gxbb-clkc.h
+++ b/include/dt-bindings/clock/gxbb-clkc.h
@@ -10,6 +10,11 @@
 #define CLKID_CLK8112
 #define CLKID_MPLL215
 #define CLKID_ETH  36
+#define CLKID_USB0 50
+#define CLKID_USB1 51
+#define CLKID_USB  55
+#define CLKID_USB1_DDR_BRIDGE  64
+#define CLKID_USB0_DDR_BRIDGE  65
 #define CLKID_SD_EMMC_A94
 #define CLKID_SD_EMMC_B95
 #define CLKID_SD_EMMC_C96
-- 
2.9.3

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