Re: [PATCH v5 5/8] gpio: gpio-wcove: Use first level PMIC GPIO irq

[Andy Shevchenko]

On Thu, Jun 1, 2017 at 1:37 AM,
 wrote:
> From: Kuppuswamy Sathyanarayanan 
>
> PMIC mfd driver only exports first level irq for GPIO device.
> But currently we are reading the irqs from the second level irq
> chip, So this patch fixes this issue by adding support to use
> first level PMIC GPIO irq.
>

Shouldn't be this squashed to patch 4?

> Signed-off-by: Kuppuswamy Sathyanarayanan 
> 
> Acked-by: Linus Walleij 
> ---
>  drivers/gpio/gpio-wcove.c | 14 +-
>  1 file changed, 13 insertions(+), 1 deletion(-)
>
> Changes since v1:
>  * used correct mask for GPIO0 and GPIO1 interrupts
>
> Changes since v2:
>  * Rebased on top of latest release.
>  * Removed IRQ0 and IRQ1 mask defines.
>
> Changes since v3:
>  * None
>
> diff --git a/drivers/gpio/gpio-wcove.c b/drivers/gpio/gpio-wcove.c
> index 7b1bc20..bba7704 100644
> --- a/drivers/gpio/gpio-wcove.c
> +++ b/drivers/gpio/gpio-wcove.c
> @@ -401,7 +401,7 @@ static int wcove_gpio_probe(struct platform_device *pdev)
> if (!wg)
> return -ENOMEM;
>
> -   wg->regmap_irq_chip = pmic->irq_chip_data_level2;
> +   wg->regmap_irq_chip = pmic->irq_chip_data;
>
> platform_set_drvdata(pdev, wg);
>
> @@ -449,6 +449,18 @@ static int wcove_gpio_probe(struct platform_device *pdev)
>
> gpiochip_set_nested_irqchip(>chip, _irqchip, virq);
>
> +   /* Enable GPIO0 interrupts */
> +   ret = regmap_update_bits(wg->regmap, IRQ_MASK_BASE, GPIO_IRQ0_MASK,
> +0x00);
> +   if (ret)
> +   return ret;
> +
> +   /* Enable GPIO1 interrupts */
> +   ret = regmap_update_bits(wg->regmap, IRQ_MASK_BASE + 1, 
> GPIO_IRQ1_MASK,
> +0x00);
> +   if (ret)
> +   return ret;
> +
> return 0;
>  }
>
> --
> 2.7.4
>



-- 
With Best Regards,
Andy Shevchenko
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[PATCH v5 5/8] gpio: gpio-wcove: Use first level PMIC GPIO irq

[sathyanarayanan . kuppuswamy]

From: Kuppuswamy Sathyanarayanan 

PMIC mfd driver only exports first level irq for GPIO device.
But currently we are reading the irqs from the second level irq
chip, So this patch fixes this issue by adding support to use
first level PMIC GPIO irq.

Signed-off-by: Kuppuswamy Sathyanarayanan 

Acked-by: Linus Walleij 
---
 drivers/gpio/gpio-wcove.c | 14 +-
 1 file changed, 13 insertions(+), 1 deletion(-)

Changes since v1:
 * used correct mask for GPIO0 and GPIO1 interrupts

Changes since v2: 
 * Rebased on top of latest release.
 * Removed IRQ0 and IRQ1 mask defines.

Changes since v3:
 * None

diff --git a/drivers/gpio/gpio-wcove.c b/drivers/gpio/gpio-wcove.c
index 7b1bc20..bba7704 100644
--- a/drivers/gpio/gpio-wcove.c
+++ b/drivers/gpio/gpio-wcove.c
@@ -401,7 +401,7 @@ static int wcove_gpio_probe(struct platform_device *pdev)
if (!wg)
return -ENOMEM;
 
-   wg->regmap_irq_chip = pmic->irq_chip_data_level2;
+   wg->regmap_irq_chip = pmic->irq_chip_data;
 
platform_set_drvdata(pdev, wg);
 
@@ -449,6 +449,18 @@ static int wcove_gpio_probe(struct platform_device *pdev)
 
gpiochip_set_nested_irqchip(>chip, _irqchip, virq);
 
+   /* Enable GPIO0 interrupts */
+   ret = regmap_update_bits(wg->regmap, IRQ_MASK_BASE, GPIO_IRQ0_MASK,
+0x00);
+   if (ret)
+   return ret;
+
+   /* Enable GPIO1 interrupts */
+   ret = regmap_update_bits(wg->regmap, IRQ_MASK_BASE + 1, GPIO_IRQ1_MASK,
+0x00);
+   if (ret)
+   return ret;
+
return 0;
 }
 
-- 
2.7.4

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