Re: Renesas upd7202 (xhci): can't setup

2015-08-06 Thread Jean-Francois SIMON
Mathias,

 Does changing the delay time in the busyloop make a difference?

We have found that this was a hardware problem in our design.
-jfs
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Re: Renesas upd7202 (xhci): can't setup

2015-07-20 Thread Mathias Nyman
On 15.07.2015 14:54, Jean-Francois SIMON wrote:
 Hi,
 
 We have designed a h/w system with the Renesas USB 3.0 upd7202 controller.
 We are seeing that sometimes xhci initialization fails with a can't
 setup error message.
 As a result lsusb doesn't report the USB3.0 ports.
 
 Adding traces to the kernel we could see that this is happening in
 xhci_reset() -- xhci_handshake() sequence, where xhci_handshake exits
 in time out. (I tried to increase the time out value by 10 times..it
 didn't help)

Does changing the delay time in the busyloop make a difference?
Just thinking that as you have some complicated pci setup and try to
read a pci register in a busyloop every microsecond it could cause issues.

something like:

@@ -71,8 +71,8 @@ int xhci_handshake(void __iomem *ptr, u32 mask, u32 done, int 
usec)
result = mask;
if (result == done)
return 0;
-   udelay(1);
-   usec--;
+   udelay(10);
+   usec -= 10;


I also see that there are some bus auto-suspend messages, do you have the patch 
that
prevents suspend while xhci is in between loading usb2 and usb3 buses:

commit bcffae7708eb8352f44dc510b326541fe43a02a4
xhci: Prevent runtime pm from autosuspending during initialization


-Mathias


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Renesas upd7202 (xhci): can't setup

2015-07-15 Thread Jean-Francois SIMON
Hi,

We have designed a h/w system with the Renesas USB 3.0 upd7202 controller.
We are seeing that sometimes xhci initialization fails with a can't
setup error message.
As a result lsusb doesn't report the USB3.0 ports.

Adding traces to the kernel we could see that this is happening in
xhci_reset() -- xhci_handshake() sequence, where xhci_handshake exits
in time out. (I tried to increase the time out value by 10 times..it
didn't help)

This is happening on Centos 6.5 using Centos kernel
2.6.32-431.el6.x86_64. Now I know it is very old and I apologize. But
I have limited access to the system, and that is what it is configured
with currently. But we had the opportunity to quickly load latest
fedora 22 (kernel is 4.0) and the same problem happens.

Here is what dmesg says:

uhci_hcd: USB Universal Host Controller Interface driver
xhci_hcd :94:00.0: PCI INT A - GSI 64 (level, low) - IRQ 64
xhci_hcd :94:00.0: setting latency timer to 64
xhci_hcd :94:00.0: xHCI Host Controller
xhci_hcd :94:00.0: new USB bus registered, assigned bus number 15
usb usb13: bus auto-suspend
xhci_hcd :94:00.0: // Halt the HC
xhci_hcd :94:00.0: Resetting HCD
xhci_hcd :94:00.0: // Reset the HC
usb usb14: bus auto-suspend

(xhci_handshake: exits in time out)

xhci_hcd :94:00.0: can't setup
xhci_hcd :94:00.0: USB bus 15 deregistered
xhci_hcd :94:00.0: PCI INT A disabled
xhci_hcd :94:00.0: init :94:00.0 fail, -110
xhci_hcd: probe of :94:00.0 failed with error -110


As you can see for below, the PCI-e hierarchy includes a
PEX8624--PEX8606- (OPTICAL LINK)-PEX8509--UPD7202.

The upd7202 is remote. There is a optical link between the 8606 and the 8509.
The upd7202 is located in a remote enclosure that has its own power
supply. That means  it doesn't get powered at the same time the main
PCI-e fabric is powered. This is probably a key factor in the error.

   84:08.0 PCI bridge: PLX Technology, Inc. PEX 8624 24-lane, 6-Port
PCI Express Gen 2 (5.0 GT/s) Switch [ExpressLane] (rev bb)
  8e:00.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port
PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
8f:07.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6
Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  92:00.0 PCI bridge: PLX Technology, Inc. PEX 8509 8-lane,
8-port PCI Express Switch (rev aa)
93:01.0 PCI bridge: PLX Technology, Inc. PEX 8509 8-lane,
8-port PCI Express Switch (rev aa)
  94:00.0 USB controller: Renesas Technology Corp.
uPD720202 USB 3.0 Host Controller (rev 02)



Here some info based on lspci:



# lspci -s 8f:07.0 -vvv
8f:07.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI
Express Gen 2 (5.0 GT/s) Switch (rev ba) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop-
ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast TAbort-
TAbort- MAbort- SERR- PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=8f, secondary=92, subordinate=9a, sec-latency=0
I/O behind bridge: f000-0fff
Memory behind bridge: faf0-fb5f
Prefetchable memory behind bridge: fff0-000f
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast TAbort-
TAbort- MAbort- SERR- PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA
PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [48] MSI: Enable+ Count=1/4 Maskable+ 64bit+
Address: fee00338  Data: 
Masking: 0001  Pending: 
Capabilities: [68] Express (v2) Downstream Port (Slot+), MSI 00
DevCap:MaxPayload 512 bytes, PhantFunc 0, Latency L0s 64ns, L1 1us
ExtTag- RBE+ FLReset-
DevCtl:Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta:CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
LnkCap:Port #7, Speed 5GT/s, Width x1, ASPM L0s L1,
Latency L0 2us, L1 4us
ClockPM- Surprise+ LLActRep+ BwNot+
LnkCtl:ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta:Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk-
DLActive+ BWMgmt+ ABWMgmt-
SltCap:AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
Slot #119, PowerLimit 25.000W; Interlock- NoCompl-
SltCtl:Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt-
HPIrq- LinkChg-
Control: AttnInd Off, PwrInd Off, Power- Interlock-
SltSta:Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-