[PATCH 2/2] MAINTAINERS: add entry for mediatek usb3 DRD IP driver

[Chunfeng Yun]

Add myself as maintainer of MediaTek USB3 DRD IP driver

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 MAINTAINERS |7 +++
 1 file changed, 7 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 205d397..0f0bcc7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8472,6 +8472,13 @@ M:  Sean Wang <sean.w...@mediatek.com>
 S:  Maintained
 F:  drivers/char/hw_random/mtk-rng.c
 
+MEDIATEK USB3 DRD IP DRIVER
+M:     Chunfeng Yun <chunfeng@mediatek.com>
+L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
+L: linux-media...@lists.infradead.org (moderated for non-subscribers)
+S: Maintained
+F: drivers/usb/mtu3/
+
 MEGACHIPS STDP-GE-B850V3-FW LVDS/DP++ BRIDGES
 M: Peter Senna Tschudin <peter.se...@collabora.com>
 M: Martin Donnelly <martin.donne...@ge.com>
-- 
1.7.9.5

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[PATCH 4/4] dt-bindings: phy-mt65xx-usb: supports PCIe, SATA and rename file

[Chunfeng Yun]

add support for PCIe and SATA, also add some new compatibles.

due to phy-mt65xx-usb.txt holds the bindings for all mediatek SoCs
with T-PHY controller, change the name to phy-mtk-tphy.txt to
reflect that.

Change-Id: I2d9200d4c8768dc301a4c116fe0e9b8179d5911c
Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 .../devicetree/bindings/phy/phy-mt65xx-usb.txt |  137 ---
 .../devicetree/bindings/phy/phy-mtk-tphy.txt   |  144 
 2 files changed, 144 insertions(+), 137 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt
 create mode 100644 Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt

diff --git a/Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt 
b/Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt
deleted file mode 100644
index 0acc5a9..000
--- a/Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt
+++ /dev/null
@@ -1,137 +0,0 @@
-mt65xx USB3.0 PHY binding
---
-
-This binding describes a usb3.0 phy for mt65xx platforms of Medaitek SoC.
-
-Required properties (controller (parent) node):
- - compatible  : should be one of
- "mediatek,mt2701-u3phy"
- "mediatek,mt2712-u3phy"
- "mediatek,mt8173-u3phy"
- - clocks  : (deprecated, use port's clocks instead) a list of phandle +
- clock-specifier pairs, one for each entry in clock-names
- - clock-names : (deprecated, use port's one instead) must contain
- "u3phya_ref": for reference clock of usb3.0 analog phy.
-
-Required nodes : a sub-node is required for each port the controller
- provides. Address range information including the usual
- 'reg' property is used inside these nodes to describe
- the controller's topology.
-
-Optional properties (controller (parent) node):
- - reg : offset and length of register shared by multiple ports,
- exclude port's private register. It is needed on mt2701
- and mt8173, but not on mt2712.
-
-Required properties (port (child) node):
-- reg  : address and length of the register set for the port.
-- clocks   : a list of phandle + clock-specifier pairs, one for each
- entry in clock-names
-- clock-names  : must contain
- "ref": 48M reference clock for HighSpeed analog phy; and 26M
-   reference clock for SuperSpeed analog phy, sometimes is
-   24M, 25M or 27M, depended on platform.
-- #phy-cells   : should be 1 (See second example)
- cell after port phandle is phy type from:
-   - PHY_TYPE_USB2
-   - PHY_TYPE_USB3
-
-Example:
-
-u3phy: usb-phy@1129 {
-   compatible = "mediatek,mt8173-u3phy";
-   reg = <0 0x1129 0 0x800>;
-   #address-cells = <2>;
-   #size-cells = <2>;
-   ranges;
-   status = "okay";
-
-   u2port0: usb-phy@11290800 {
-   reg = <0 0x11290800 0 0x100>;
-   clocks = < CLK_APMIXED_REF2USB_TX>;
-   clock-names = "ref";
-   #phy-cells = <1>;
-   status = "okay";
-   };
-
-   u3port0: usb-phy@11290900 {
-   reg = <0 0x11290800 0 0x700>;
-   clocks = <>;
-   clock-names = "ref";
-   #phy-cells = <1>;
-   status = "okay";
-   };
-
-   u2port1: usb-phy@11291000 {
-   reg = <0 0x11291000 0 0x100>;
-   clocks = < CLK_APMIXED_REF2USB_TX>;
-   clock-names = "ref";
-   #phy-cells = <1>;
-   status = "okay";
-   };
-};
-
-Specifying phy control of devices
--
-
-Device nodes should specify the configuration required in their "phys"
-property, containing a phandle to the phy port node and a device type;
-phy-names for each port are optional.
-
-Example:
-
-#include 
-
-usb30: usb@1127 {
-   ...
-   phys = < PHY_TYPE_USB2>, < PHY_TYPE_USB3>;
-   phy-names = "usb2-0", "usb3-0";
-   ...
-};
-
-
-Layout differences of banks between mt8173/mt2701 and mt2712
--
-mt8173 and mt2701:
-portoffsetbank
-shared  0xSPLLC
-0x0100FMREG
-u2 port00x0800U2PHY_COM
-u3 port00x0900U3PHYD
-0x0a00U3PHYD_BANK2
-0x0b00U3PHYA
-0x0c00U3PHYA_DA
-u2 port10x1000U2PHY_COM
-u3 port10x1100U3PHYD
-0x1200U3PHYD_BANK2
-0x1300U3PHYA
-0x1400U3PHYA_DA
-u2 port20x

[PATCH 1/4] phy: phy-mt65xx-usb3: add PCIe PHY support

[Chunfeng Yun]

From: Ryder Lee <ryder@mediatek.com>

This patch adds PCIe PHY setting part.

Signed-off-by: Ryder Lee <ryder@mediatek.com>
Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/phy/phy-mt65xx-usb3.c |  220 +
 1 file changed, 202 insertions(+), 18 deletions(-)

diff --git a/drivers/phy/phy-mt65xx-usb3.c b/drivers/phy/phy-mt65xx-usb3.c
index 59b110f..8ba6905 100644
--- a/drivers/phy/phy-mt65xx-usb3.c
+++ b/drivers/phy/phy-mt65xx-usb3.c
@@ -29,7 +29,7 @@
 #define SSUSB_SIFSLV_V1_U2FREQ 0x100   /* shared by u2 phys */
 /* u2 phy bank */
 #define SSUSB_SIFSLV_V1_U2PHY_COM  0x000
-/* u3 phy banks */
+/* u3/pcie phy banks */
 #define SSUSB_SIFSLV_V1_U3PHYD 0x000
 #define SSUSB_SIFSLV_V1_U3PHYA 0x200
 
@@ -99,6 +99,23 @@
 #define P2C_RG_SESSEND BIT(4)
 #define P2C_RG_AVALID  BIT(2)
 
+#define U3P_U3_CHIP_GPIO_CTLD  0x0c
+#define P3C_REG_IP_SW_RST  BIT(31)
+#define P3C_MCU_BUS_CK_GATE_EN BIT(30)
+#define P3C_FORCE_IP_SW_RSTBIT(29)
+
+#define U3P_U3_CHIP_GPIO_CTLE  0x10
+#define P3C_RG_SWRST_U3_PHYD   BIT(25)
+#define P3C_RG_SWRST_U3_PHYD_FORCE_EN  BIT(24)
+
+#define U3P_U3_PHYA_REG0   0x000
+#define P3A_RG_CLKDRV_OFF  GENMASK(3, 2)
+#define P3A_RG_CLKDRV_OFF_VAL(x)   ((0x3 & (x)) << 2)
+
+#define U3P_U3_PHYA_REG1   0x004
+#define P3A_RG_CLKDRV_AMP  GENMASK(31, 29)
+#define P3A_RG_CLKDRV_AMP_VAL(x)   ((0x7 & (x)) << 29)
+
 #define U3P_U3_PHYA_REG6   0x018
 #define P3A_RG_TX_EIDLE_CM GENMASK(31, 28)
 #define P3A_RG_TX_EIDLE_CM_VAL(x)  ((0xf & (x)) << 28)
@@ -108,9 +125,40 @@
 #define P3A_RG_RX_DAC_MUX_VAL(x)   ((0x1f & (x)) << 1)
 
 #define U3P_U3_PHYA_DA_REG00x100
+#define P3A_RG_XTAL_EXT_PE2H   GENMASK(17, 16)
+#define P3A_RG_XTAL_EXT_PE2H_VAL(x)((0x3 & (x)) << 16)
+#define P3A_RG_XTAL_EXT_PE1H   GENMASK(13, 12)
+#define P3A_RG_XTAL_EXT_PE1H_VAL(x)((0x3 & (x)) << 12)
 #define P3A_RG_XTAL_EXT_EN_U3  GENMASK(11, 10)
 #define P3A_RG_XTAL_EXT_EN_U3_VAL(x)   ((0x3 & (x)) << 10)
 
+#define U3P_U3_PHYA_DA_REG40x108
+#define P3A_RG_PLL_DIVEN_PE2H  GENMASK(21, 19)
+#define P3A_RG_PLL_BC_PE2H GENMASK(7, 6)
+#define P3A_RG_PLL_BC_PE2H_VAL(x)  ((0x3 & (x)) << 6)
+
+#define U3P_U3_PHYA_DA_REG50x10c
+#define P3A_RG_PLL_BR_PE2H GENMASK(29, 28)
+#define P3A_RG_PLL_BR_PE2H_VAL(x)  ((0x3 & (x)) << 28)
+#define P3A_RG_PLL_IC_PE2H GENMASK(15, 12)
+#define P3A_RG_PLL_IC_PE2H_VAL(x)  ((0xf & (x)) << 12)
+
+#define U3P_U3_PHYA_DA_REG60x110
+#define P3A_RG_PLL_IR_PE2H GENMASK(19, 16)
+#define P3A_RG_PLL_IR_PE2H_VAL(x)  ((0xf & (x)) << 16)
+
+#define U3P_U3_PHYA_DA_REG70x114
+#define P3A_RG_PLL_BP_PE2H GENMASK(19, 16)
+#define P3A_RG_PLL_BP_PE2H_VAL(x)  ((0xf & (x)) << 16)
+
+#define U3P_U3_PHYA_DA_REG20   0x13c
+#define P3A_RG_PLL_DELTA1_PE2H GENMASK(31, 16)
+#define P3A_RG_PLL_DELTA1_PE2H_VAL(x)  ((0x & (x)) << 16)
+
+#define U3P_U3_PHYA_DA_REG25   0x148
+#define P3A_RG_PLL_DELTA_PE2H  GENMASK(15, 0)
+#define P3A_RG_PLL_DELTA_PE2H_VAL(x)   (0x & (x))
+
 #define U3P_U3_PHYD_LFPS1  0x00c
 #define P3D_RG_FWAKE_THGENMASK(21, 16)
 #define P3D_RG_FWAKE_TH_VAL(x) ((0x3f & (x)) << 16)
@@ -322,7 +370,7 @@ static void u3_phy_instance_init(struct mt65xx_u3phy *u3phy,
dev_dbg(u3phy->dev, "%s(%d)\n", __func__, instance->index);
 }
 
-static void phy_instance_init(struct mt65xx_u3phy *u3phy,
+static void u2_phy_instance_init(struct mt65xx_u3phy *u3phy,
struct mt65xx_phy_instance *instance)
 {
struct u2phy_banks *u2_banks = >u2_banks;
@@ -384,7 +432,7 @@ static void phy_instance_init(struct mt65xx_u3phy *u3phy,
dev_dbg(u3phy->dev, "%s(%d)\n", __func__, index);
 }
 
-static void phy_instance_power_on(struct mt65xx_u3phy *u3phy,
+static void u2_phy_instance_power_on(struct mt65xx_u3phy *u3phy,
struct mt65xx_phy_instance *instance)
 {
struct u2phy_banks *u2_banks = >u2_banks;
@@ -420,7 +468,7 @@ static void phy_instance_power_on(struct mt65xx_u3phy 
*u3phy,
dev_dbg(u3phy->dev, "%s(%d)\n", __func__, index);
 }
 
-static void phy_instance_power_off(struct mt65xx_u3phy *u3phy,
+static void u2_phy_instance_power_off(struct mt65xx_u3phy *u3phy,
struct mt65xx_phy_instance *instance)
 {
struct u2phy_banks *u2_banks = >u2_banks;
@@ -458,7 +506,7 @@ static void phy_instance_power_off(struct mt65xx_u3phy 
*u3phy,
dev_dbg(u3phy->dev, "%s(%d)\n", __func__, index);
 }
 
-static void phy_instance_exit(struct mt65xx_u3phy *u3phy,
+static

[PATCH 3/4] phy: phy-mt65xx-usb3: add mediatek directory and rename file

[Chunfeng Yun]

The driver is actually for T-PHY which supports USB3.0, PCIe and SATA,
and supports more SoCs now, but not just only for series of mt65xx SoCs,
so the name of file, data struct, functions etc with 'mt65xx' may cause
misunderstanding when new SoCs are supported. Here rename them to reflect
the real functions and also enhance readability.

And also update MAINTAINERS file to reflect the correct driver

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 MAINTAINERS|2 +-
 drivers/phy/Kconfig|9 +-
 drivers/phy/Makefile   |2 +-
 drivers/phy/mediatek/Kconfig   |   14 ++
 drivers/phy/mediatek/Makefile  |5 +
 .../{phy-mt65xx-usb3.c => mediatek/phy-mtk-tphy.c} |  264 ++--
 6 files changed, 154 insertions(+), 142 deletions(-)
 create mode 100644 drivers/phy/mediatek/Kconfig
 create mode 100644 drivers/phy/mediatek/Makefile
 rename drivers/phy/{phy-mt65xx-usb3.c => mediatek/phy-mtk-tphy.c} (81%)

diff --git a/MAINTAINERS b/MAINTAINERS
index 205d397..428e5d0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1599,7 +1599,7 @@ M:    Chunfeng Yun <chunfeng@mediatek.com>
 L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
 L: linux-media...@lists.infradead.org (moderated for non-subscribers)
 S: Maintained
-F: drivers/phy/phy-mt65xx-usb3.c
+F: drivers/phy/mediatek/phy-mtk-tphy.c
 
 ARM/MICREL KS8695 ARCHITECTURE
 M: Greg Ungerer <g...@uclinux.org>
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index c1807d4..d16704e 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -26,14 +26,6 @@ config PHY_LPC18XX_USB_OTG
  This driver is need for USB0 support on LPC18xx/43xx and takes
  care of enabling and clock setup.
 
-config PHY_MT65XX_USB3
-   tristate "Mediatek USB3.0 PHY Driver"
-   depends on ARCH_MEDIATEK && OF
-   select GENERIC_PHY
-   help
- Say 'Y' here to add support for Mediatek USB3.0 PHY driver,
- it supports multiple usb2.0 and usb3.0 ports.
-
 config PHY_PISTACHIO_USB
tristate "IMG Pistachio USB2.0 PHY driver"
depends on MACH_PISTACHIO
@@ -53,6 +45,7 @@ source "drivers/phy/amlogic/Kconfig"
 source "drivers/phy/broadcom/Kconfig"
 source "drivers/phy/hisilicon/Kconfig"
 source "drivers/phy/marvell/Kconfig"
+source "drivers/phy/mediatek/Kconfig"
 source "drivers/phy/motorola/Kconfig"
 source "drivers/phy/qualcomm/Kconfig"
 source "drivers/phy/renesas/Kconfig"
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index f252201..1c68189 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -4,12 +4,12 @@
 
 obj-$(CONFIG_GENERIC_PHY)  += phy-core.o
 obj-$(CONFIG_PHY_LPC18XX_USB_OTG)  += phy-lpc18xx-usb-otg.o
-obj-$(CONFIG_PHY_MT65XX_USB3)  += phy-mt65xx-usb3.o
 obj-$(CONFIG_PHY_XGENE)+= phy-xgene.o
 obj-$(CONFIG_PHY_PISTACHIO_USB)+= phy-pistachio-usb.o
 
 obj-$(CONFIG_ARCH_SUNXI)   += allwinner/
 obj-$(CONFIG_ARCH_MESON)   += amlogic/
+obj-$(CONFIG_ARCH_MEDIATEK)+= mediatek/
 obj-$(CONFIG_ARCH_RENESAS) += renesas/
 obj-$(CONFIG_ARCH_ROCKCHIP)+= rockchip/
 obj-$(CONFIG_ARCH_TEGRA)   += tegra/
diff --git a/drivers/phy/mediatek/Kconfig b/drivers/phy/mediatek/Kconfig
new file mode 100644
index 000..88ab4e2
--- /dev/null
+++ b/drivers/phy/mediatek/Kconfig
@@ -0,0 +1,14 @@
+#
+# Phy drivers for Mediatek devices
+#
+config PHY_MTK_TPHY
+tristate "MediaTek T-PHY Driver"
+depends on ARCH_MEDIATEK && OF
+select GENERIC_PHY
+help
+  Say 'Y' here to add support for MediaTek T-PHY driver,
+  it supports multiple usb2.0, usb3.0 ports, PCIe and
+ SATA, and meanwhile supports two version T-PHY which have
+ different banks layout, the T-PHY with shared banks between
+ multi-ports is first version, otherwise is second veriosn,
+ so you can easily distinguish them by banks layout.
diff --git a/drivers/phy/mediatek/Makefile b/drivers/phy/mediatek/Makefile
new file mode 100644
index 000..763a92e
--- /dev/null
+++ b/drivers/phy/mediatek/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for the phy drivers.
+#
+
+obj-$(CONFIG_PHY_MTK_TPHY) += phy-mtk-tphy.o
diff --git a/drivers/phy/phy-mt65xx-usb3.c b/drivers/phy/mediatek/phy-mtk-tphy.c
similarity index 81%
rename from drivers/phy/phy-mt65xx-usb3.c
rename to drivers/phy/mediatek/phy-mtk-tphy.c
index 45291c1..e3baad7 100644
--- a/drivers/phy/phy-mt65xx-usb3.c
+++ b/drivers/phy/mediatek/phy-mtk-tphy.c
@@ -38,7 +38,7 @@
 #define SSUSB_SIFSLV_V2_MISC   0x000
 #define SSUSB_SIFSLV_V2_U2FREQ 0x100

[PATCH 4/4] dt-bindings: phy-mt65xx-usb: supports PCIe, SATA and rename file

[Chunfeng Yun]

add support for PCIe and SATA, also add some new compatibles.

due to phy-mt65xx-usb.txt holds the bindings for all mediatek SoCs
with T-PHY controller, change the name to phy-mtk-tphy.txt to
reflect that.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 .../phy/{phy-mt65xx-usb.txt => phy-mtk-tphy.txt}   |   17 -
 1 file changed, 12 insertions(+), 5 deletions(-)
 rename Documentation/devicetree/bindings/phy/{phy-mt65xx-usb.txt => 
phy-mtk-tphy.txt} (88%)

diff --git a/Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt 
b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
similarity index 88%
rename from Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt
rename to Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
index 0acc5a9..faf1808 100644
--- a/Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt
+++ b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
@@ -1,13 +1,18 @@
-mt65xx USB3.0 PHY binding
+MediaTek T-PHY binding
 --
 
-This binding describes a usb3.0 phy for mt65xx platforms of Medaitek SoC.
+T-phy controller supports physical layer functionality for a number of
+controllers on MediaTek SoCs, such as, USB2.0, USB3.0, PCIe, and SATA.
 
 Required properties (controller (parent) node):
  - compatible  : should be one of
- "mediatek,mt2701-u3phy"
- "mediatek,mt2712-u3phy"
- "mediatek,mt8173-u3phy"
+ "mediatek,generic-tphy-v1"
+ "mediatek,generic-tphy-v2"
+ "mediatek,mt2701-u3phy" (deprecated)
+ "mediatek,mt2712-u3phy" (deprecated)
+ "mediatek,mt8173-u3phy";
+ make use of "mediatek,generic-tphy-v1" on mt2701 instead and
+ "mediatek,generic-tphy-v2" on mt2712 instead.
  - clocks  : (deprecated, use port's clocks instead) a list of phandle +
  clock-specifier pairs, one for each entry in clock-names
  - clock-names : (deprecated, use port's one instead) must contain
@@ -35,6 +40,8 @@ Required properties (port (child) node):
  cell after port phandle is phy type from:
- PHY_TYPE_USB2
- PHY_TYPE_USB3
+   - PHY_TYPE_PCIE
+   - PHY_TYPE_SATA
 
 Example:
 
-- 
1.7.9.5

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[PATCH 2/4] phy: phy-mt65xx-usb3: add SATA PHY support

[Chunfeng Yun]

From: Ryder Lee <ryder@mediatek.com>

This patch adds SATA setting part.

Signed-off-by: Ryder Lee <ryder@mediatek.com>
Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/phy/phy-mt65xx-usb3.c |  133 +++--
 1 file changed, 129 insertions(+), 4 deletions(-)

diff --git a/drivers/phy/phy-mt65xx-usb3.c b/drivers/phy/phy-mt65xx-usb3.c
index 8ba6905..45291c1 100644
--- a/drivers/phy/phy-mt65xx-usb3.c
+++ b/drivers/phy/phy-mt65xx-usb3.c
@@ -29,7 +29,7 @@
 #define SSUSB_SIFSLV_V1_U2FREQ 0x100   /* shared by u2 phys */
 /* u2 phy bank */
 #define SSUSB_SIFSLV_V1_U2PHY_COM  0x000
-/* u3/pcie phy banks */
+/* u3/pcie/sata phy banks */
 #define SSUSB_SIFSLV_V1_U3PHYD 0x000
 #define SSUSB_SIFSLV_V1_U3PHYA 0x200
 
@@ -199,6 +199,65 @@
 #define U3P_SR_COEF_DIVISOR1000
 #define U3P_FM_DET_CYCLE_CNT   1024
 
+/* SATA register setting */
+#define PHYD_CTRL_SIGNAL_MODE4 0x1c
+/* CDR Charge Pump P-path current adjustment */
+#define RG_CDR_BICLTD1_GEN1_MSKGENMASK(23, 20)
+#define RG_CDR_BICLTD1_GEN1_VAL(x) ((0xf & (x)) << 20)
+#define RG_CDR_BICLTD0_GEN1_MSKGENMASK(11, 8)
+#define RG_CDR_BICLTD0_GEN1_VAL(x) ((0xf & (x)) << 8)
+
+#define PHYD_DESIGN_OPTION20x24
+/* Symbol lock count selection */
+#define RG_LOCK_CNT_SEL_MSKGENMASK(5, 4)
+#define RG_LOCK_CNT_SEL_VAL(x) ((0x3 & (x)) << 4)
+
+#define PHYD_DESIGN_OPTION90x40
+/* COMWAK GAP width window */
+#define RG_TG_MAX_MSK  GENMASK(20, 16)
+#define RG_TG_MAX_VAL(x)   ((0x1f & (x)) << 16)
+/* COMINIT GAP width window */
+#define RG_T2_MAX_MSK  GENMASK(13, 8)
+#define RG_T2_MAX_VAL(x)   ((0x3f & (x)) << 8)
+/* COMWAK GAP width window */
+#define RG_TG_MIN_MSK  GENMASK(7, 5)
+#define RG_TG_MIN_VAL(x)   ((0x7 & (x)) << 5)
+/* COMINIT GAP width window */
+#define RG_T2_MIN_MSK  GENMASK(4, 0)
+#define RG_T2_MIN_VAL(x)   (0x1f & (x))
+
+#define ANA_RG_CTRL_SIGNAL10x4c
+/* TX driver tail current control for 0dB de-empahsis mdoe for Gen1 speed */
+#define RG_IDRV_0DB_GEN1_MSK   GENMASK(13, 8)
+#define RG_IDRV_0DB_GEN1_VAL(x)((0x3f & (x)) << 8)
+
+#define ANA_RG_CTRL_SIGNAL40x58
+#define RG_CDR_BICLTR_GEN1_MSK GENMASK(23, 20)
+#define RG_CDR_BICLTR_GEN1_VAL(x)  ((0xf & (x)) << 20)
+/* Loop filter R1 resistance adjustment for Gen1 speed */
+#define RG_CDR_BR_GEN2_MSK GENMASK(10, 8)
+#define RG_CDR_BR_GEN2_VAL(x)  ((0x7 & (x)) << 8)
+
+#define ANA_RG_CTRL_SIGNAL60x60
+/* I-path capacitance adjustment for Gen1 */
+#define RG_CDR_BC_GEN1_MSK GENMASK(28, 24)
+#define RG_CDR_BC_GEN1_VAL(x)  ((0x1f & (x)) << 24)
+#define RG_CDR_BIRLTR_GEN1_MSK GENMASK(4, 0)
+#define RG_CDR_BIRLTR_GEN1_VAL(x)  (0x1f & (x))
+
+#define ANA_EQ_EYE_CTRL_SIGNAL10x6c
+/* RX Gen1 LEQ tuning step */
+#define RG_EQ_DLEQ_LFI_GEN1_MSKGENMASK(11, 8)
+#define RG_EQ_DLEQ_LFI_GEN1_VAL(x) ((0xf & (x)) << 8)
+
+#define ANA_EQ_EYE_CTRL_SIGNAL40xd8
+#define RG_CDR_BIRLTD0_GEN1_MSKGENMASK(20, 16)
+#define RG_CDR_BIRLTD0_GEN1_VAL(x) ((0x1f & (x)) << 16)
+
+#define ANA_EQ_EYE_CTRL_SIGNAL50xdc
+#define RG_CDR_BIRLTD0_GEN3_MSKGENMASK(4, 0)
+#define RG_CDR_BIRLTD0_GEN3_VAL(x) (0x1f & (x))
+
 enum mt_phy_version {
MT_PHY_V1 = 1,
MT_PHY_V2,
@@ -630,6 +689,64 @@ static void pcie_phy_instance_power_off(struct 
mt65xx_u3phy *u3phy,
writel(tmp, bank->chip + U3P_U3_CHIP_GPIO_CTLE);
 }
 
+static void sata_phy_instance_init(struct mt65xx_u3phy *u3phy,
+   struct mt65xx_phy_instance *instance)
+{
+   struct u3phy_banks *u3_banks = >u3_banks;
+   void __iomem *phyd = u3_banks->phyd;
+   u32 tmp;
+
+   /* charge current adjustment */
+   tmp = readl(phyd + ANA_RG_CTRL_SIGNAL6);
+   tmp &= ~(RG_CDR_BIRLTR_GEN1_MSK | RG_CDR_BC_GEN1_MSK);
+   tmp |= RG_CDR_BIRLTR_GEN1_VAL(0x6) | RG_CDR_BC_GEN1_VAL(0x1a);
+   writel(tmp, phyd + ANA_RG_CTRL_SIGNAL6);
+
+   tmp = readl(phyd + ANA_EQ_EYE_CTRL_SIGNAL4);
+   tmp &= ~RG_CDR_BIRLTD0_GEN1_MSK;
+   tmp |= RG_CDR_BIRLTD0_GEN1_VAL(0x18);
+   writel(tmp, phyd + ANA_EQ_EYE_CTRL_SIGNAL4);
+
+   tmp = readl(phyd + ANA_EQ_EYE_CTRL_SIGNAL5);
+   tmp &= ~RG_CDR_BIRLTD0_GEN3_MSK;
+   tmp |= RG_CDR_BIRLTD0_GEN3_VAL(0x06);
+   writel(tmp, phyd + ANA_EQ_EYE_CTRL_SIGNAL5);
+
+   tmp = readl(phyd + ANA_RG_CTRL_SIGNAL4);
+   tmp &= ~(RG_CDR_BICLTR_GEN1_MSK | RG_CDR_BR_GEN2_MSK);
+   tmp |= RG_CDR_BICLTR_GEN1_VAL(0x0c) | RG_CDR_BR_GEN2_VAL(0x07);
+   writel(tmp, phyd + ANA_RG_CTRL_S

Re: [PATCH 4/4] dt-bindings: phy-mt65xx-usb: supports PCIe, SATA and rename file

[Chunfeng Yun]

hi,

I made a mistake, please ignore the patches with Change-Id, very sorry

On Thu, 2017-08-03 at 18:01 +0800, Chunfeng Yun wrote:
> add support for PCIe and SATA, also add some new compatibles.
> 
> due to phy-mt65xx-usb.txt holds the bindings for all mediatek SoCs
> with T-PHY controller, change the name to phy-mtk-tphy.txt to
> reflect that.
> 
> Change-Id: I2d9200d4c8768dc301a4c116fe0e9b8179d5911c
> Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
> ---
>  .../devicetree/bindings/phy/phy-mt65xx-usb.txt |  137 ---
>  .../devicetree/bindings/phy/phy-mtk-tphy.txt   |  144 
> 
>  2 files changed, 144 insertions(+), 137 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt
>  create mode 100644 Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt 
> b/Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt
> deleted file mode 100644
> index 0acc5a9..000
> --- a/Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt
> +++ /dev/null
> @@ -1,137 +0,0 @@
> -mt65xx USB3.0 PHY binding
> ---
> -
> -This binding describes a usb3.0 phy for mt65xx platforms of Medaitek SoC.
> -
> -Required properties (controller (parent) node):
> - - compatible: should be one of
> -   "mediatek,mt2701-u3phy"
> -   "mediatek,mt2712-u3phy"
> -   "mediatek,mt8173-u3phy"
> - - clocks: (deprecated, use port's clocks instead) a list of phandle +
> -   clock-specifier pairs, one for each entry in clock-names
> - - clock-names   : (deprecated, use port's one instead) must contain
> -   "u3phya_ref": for reference clock of usb3.0 analog phy.
> -
> -Required nodes   : a sub-node is required for each port the controller
> -   provides. Address range information including the usual
> -   'reg' property is used inside these nodes to describe
> -   the controller's topology.
> -
> -Optional properties (controller (parent) node):
> - - reg   : offset and length of register shared by multiple 
> ports,
> -   exclude port's private register. It is needed on mt2701
> -   and mt8173, but not on mt2712.
> -
> -Required properties (port (child) node):
> -- reg: address and length of the register set for the port.
> -- clocks : a list of phandle + clock-specifier pairs, one for each
> -   entry in clock-names
> -- clock-names: must contain
> -   "ref": 48M reference clock for HighSpeed analog phy; and 26M
> - reference clock for SuperSpeed analog phy, sometimes is
> - 24M, 25M or 27M, depended on platform.
> -- #phy-cells : should be 1 (See second example)
> -   cell after port phandle is phy type from:
> - - PHY_TYPE_USB2
> - - PHY_TYPE_USB3
> -
> -Example:
> -
> -u3phy: usb-phy@1129 {
> - compatible = "mediatek,mt8173-u3phy";
> - reg = <0 0x1129 0 0x800>;
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
> - status = "okay";
> -
> - u2port0: usb-phy@11290800 {
> - reg = <0 0x11290800 0 0x100>;
> - clocks = < CLK_APMIXED_REF2USB_TX>;
> - clock-names = "ref";
> - #phy-cells = <1>;
> - status = "okay";
> - };
> -
> - u3port0: usb-phy@11290900 {
> - reg = <0 0x11290800 0 0x700>;
> - clocks = <>;
> - clock-names = "ref";
> - #phy-cells = <1>;
> - status = "okay";
> - };
> -
> - u2port1: usb-phy@11291000 {
> - reg = <0 0x11291000 0 0x100>;
> - clocks = < CLK_APMIXED_REF2USB_TX>;
> - clock-names = "ref";
> - #phy-cells = <1>;
> - status = "okay";
> - };
> -};
> -
> -Specifying phy control of devices
> --
> -
> -Device nodes should specify the configuration required in their "phys"
> -property, containing a phandle to the phy port node and a device type;
> -phy-names for each port are optional.
> -
> -Example:
> -
> -#include 
> -
> -usb30: usb@1127 {
> - ...
> - phys = < PHY_TYPE_USB2>, < PHY_TYPE_USB3>;
> - phy-names =

Re: [PATCH 2/2] MAINTAINERS: add entry for mediatek usb3 DRD IP driver

[Chunfeng Yun]

On Thu, 2017-08-03 at 12:23 +0300, Felipe Balbi wrote:
> Hi,
> 
> Chunfeng Yun <chunfeng@mediatek.com> writes:
> > Add myself as maintainer of MediaTek USB3 DRD IP driver
> >
> > Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
> > ---
> >  MAINTAINERS |7 +++
> >  1 file changed, 7 insertions(+)
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 205d397..0f0bcc7 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -8472,6 +8472,13 @@ M:  Sean Wang <sean.w...@mediatek.com>
> >  S:  Maintained
> >  F:  drivers/char/hw_random/mtk-rng.c
> >  
> > +MEDIATEK USB3 DRD IP DRIVER
> > +M: Chunfeng Yun <chunfeng@mediatek.com>
> > +L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
> > +L: linux-media...@lists.infradead.org (moderated for non-subscribers)
> 
> everything USB should go to linux-usb too.
Ok, I'll add it, thanks
> 


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[PATCH 3/4] phy: phy-mt65xx-usb3: add mediatek directory and rename file

[Chunfeng Yun]

The driver is actually for T-PHY which supports USB3.0, PCIe and SATA,
and supports more SoCs now, but not just only for series of mt65xx SoCs,
so the name of file, data struct, functions etc with 'mt65xx' may cause
misunderstanding when new SoCs are supported. Here rename them to reflect
the real functions and also enhance readability.

And also update MAINTAINERS file to reflect the correct driver

Change-Id: I7ee75bde25306d017436099c59cf9088df4ea37f
Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 MAINTAINERS |2 +-
 drivers/phy/Kconfig |9 +-
 drivers/phy/Makefile|2 +-
 drivers/phy/mediatek/Kconfig|   14 +
 drivers/phy/mediatek/Makefile   |5 +
 drivers/phy/mediatek/phy-mtk-tphy.c | 1081 +++
 drivers/phy/phy-mt65xx-usb3.c   | 1081 ---
 7 files changed, 1103 insertions(+), 1091 deletions(-)
 create mode 100644 drivers/phy/mediatek/Kconfig
 create mode 100644 drivers/phy/mediatek/Makefile
 create mode 100644 drivers/phy/mediatek/phy-mtk-tphy.c
 delete mode 100644 drivers/phy/phy-mt65xx-usb3.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 205d397..428e5d0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1599,7 +1599,7 @@ M:    Chunfeng Yun <chunfeng@mediatek.com>
 L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
 L: linux-media...@lists.infradead.org (moderated for non-subscribers)
 S: Maintained
-F: drivers/phy/phy-mt65xx-usb3.c
+F: drivers/phy/mediatek/phy-mtk-tphy.c
 
 ARM/MICREL KS8695 ARCHITECTURE
 M: Greg Ungerer <g...@uclinux.org>
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index c1807d4..d16704e 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -26,14 +26,6 @@ config PHY_LPC18XX_USB_OTG
  This driver is need for USB0 support on LPC18xx/43xx and takes
  care of enabling and clock setup.
 
-config PHY_MT65XX_USB3
-   tristate "Mediatek USB3.0 PHY Driver"
-   depends on ARCH_MEDIATEK && OF
-   select GENERIC_PHY
-   help
- Say 'Y' here to add support for Mediatek USB3.0 PHY driver,
- it supports multiple usb2.0 and usb3.0 ports.
-
 config PHY_PISTACHIO_USB
tristate "IMG Pistachio USB2.0 PHY driver"
depends on MACH_PISTACHIO
@@ -53,6 +45,7 @@ source "drivers/phy/amlogic/Kconfig"
 source "drivers/phy/broadcom/Kconfig"
 source "drivers/phy/hisilicon/Kconfig"
 source "drivers/phy/marvell/Kconfig"
+source "drivers/phy/mediatek/Kconfig"
 source "drivers/phy/motorola/Kconfig"
 source "drivers/phy/qualcomm/Kconfig"
 source "drivers/phy/renesas/Kconfig"
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index f252201..1c68189 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -4,12 +4,12 @@
 
 obj-$(CONFIG_GENERIC_PHY)  += phy-core.o
 obj-$(CONFIG_PHY_LPC18XX_USB_OTG)  += phy-lpc18xx-usb-otg.o
-obj-$(CONFIG_PHY_MT65XX_USB3)  += phy-mt65xx-usb3.o
 obj-$(CONFIG_PHY_XGENE)+= phy-xgene.o
 obj-$(CONFIG_PHY_PISTACHIO_USB)+= phy-pistachio-usb.o
 
 obj-$(CONFIG_ARCH_SUNXI)   += allwinner/
 obj-$(CONFIG_ARCH_MESON)   += amlogic/
+obj-$(CONFIG_ARCH_MEDIATEK)+= mediatek/
 obj-$(CONFIG_ARCH_RENESAS) += renesas/
 obj-$(CONFIG_ARCH_ROCKCHIP)+= rockchip/
 obj-$(CONFIG_ARCH_TEGRA)   += tegra/
diff --git a/drivers/phy/mediatek/Kconfig b/drivers/phy/mediatek/Kconfig
new file mode 100644
index 000..88ab4e2
--- /dev/null
+++ b/drivers/phy/mediatek/Kconfig
@@ -0,0 +1,14 @@
+#
+# Phy drivers for Mediatek devices
+#
+config PHY_MTK_TPHY
+tristate "MediaTek T-PHY Driver"
+depends on ARCH_MEDIATEK && OF
+select GENERIC_PHY
+help
+  Say 'Y' here to add support for MediaTek T-PHY driver,
+  it supports multiple usb2.0, usb3.0 ports, PCIe and
+ SATA, and meanwhile supports two version T-PHY which have
+ different banks layout, the T-PHY with shared banks between
+ multi-ports is first version, otherwise is second veriosn,
+ so you can easily distinguish them by banks layout.
diff --git a/drivers/phy/mediatek/Makefile b/drivers/phy/mediatek/Makefile
new file mode 100644
index 000..763a92e
--- /dev/null
+++ b/drivers/phy/mediatek/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for the phy drivers.
+#
+
+obj-$(CONFIG_PHY_MTK_TPHY) += phy-mtk-tphy.o
diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c 
b/drivers/phy/mediatek/phy-mtk-tphy.c
new file mode 100644
index 000..e3baad7
--- /dev/null
+++ b/drivers/phy/mediatek/phy-mtk-tphy.c
@@ -0,0 +1,1081 @@
+/*
+ * Copyright (c) 2015 MediaTek Inc.
+ * Author: Chunfeng Yun <chunfeng@mediatek.com>
+ *
+ * This software is lice

[PATCH 1/4] phy: phy-mt65xx-usb3: add PCIe PHY support

[Chunfeng Yun]

From: Ryder Lee <ryder@mediatek.com>

This patch adds PCIe PHY setting part.

Change-Id: I112cbcdafd3deecf2c0ad17bafc8c784e1730ec4
Signed-off-by: Ryder Lee <ryder@mediatek.com>
Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/phy/phy-mt65xx-usb3.c |  220 +
 1 file changed, 202 insertions(+), 18 deletions(-)

diff --git a/drivers/phy/phy-mt65xx-usb3.c b/drivers/phy/phy-mt65xx-usb3.c
index 59b110f..8ba6905 100644
--- a/drivers/phy/phy-mt65xx-usb3.c
+++ b/drivers/phy/phy-mt65xx-usb3.c
@@ -29,7 +29,7 @@
 #define SSUSB_SIFSLV_V1_U2FREQ 0x100   /* shared by u2 phys */
 /* u2 phy bank */
 #define SSUSB_SIFSLV_V1_U2PHY_COM  0x000
-/* u3 phy banks */
+/* u3/pcie phy banks */
 #define SSUSB_SIFSLV_V1_U3PHYD 0x000
 #define SSUSB_SIFSLV_V1_U3PHYA 0x200
 
@@ -99,6 +99,23 @@
 #define P2C_RG_SESSEND BIT(4)
 #define P2C_RG_AVALID  BIT(2)
 
+#define U3P_U3_CHIP_GPIO_CTLD  0x0c
+#define P3C_REG_IP_SW_RST  BIT(31)
+#define P3C_MCU_BUS_CK_GATE_EN BIT(30)
+#define P3C_FORCE_IP_SW_RSTBIT(29)
+
+#define U3P_U3_CHIP_GPIO_CTLE  0x10
+#define P3C_RG_SWRST_U3_PHYD   BIT(25)
+#define P3C_RG_SWRST_U3_PHYD_FORCE_EN  BIT(24)
+
+#define U3P_U3_PHYA_REG0   0x000
+#define P3A_RG_CLKDRV_OFF  GENMASK(3, 2)
+#define P3A_RG_CLKDRV_OFF_VAL(x)   ((0x3 & (x)) << 2)
+
+#define U3P_U3_PHYA_REG1   0x004
+#define P3A_RG_CLKDRV_AMP  GENMASK(31, 29)
+#define P3A_RG_CLKDRV_AMP_VAL(x)   ((0x7 & (x)) << 29)
+
 #define U3P_U3_PHYA_REG6   0x018
 #define P3A_RG_TX_EIDLE_CM GENMASK(31, 28)
 #define P3A_RG_TX_EIDLE_CM_VAL(x)  ((0xf & (x)) << 28)
@@ -108,9 +125,40 @@
 #define P3A_RG_RX_DAC_MUX_VAL(x)   ((0x1f & (x)) << 1)
 
 #define U3P_U3_PHYA_DA_REG00x100
+#define P3A_RG_XTAL_EXT_PE2H   GENMASK(17, 16)
+#define P3A_RG_XTAL_EXT_PE2H_VAL(x)((0x3 & (x)) << 16)
+#define P3A_RG_XTAL_EXT_PE1H   GENMASK(13, 12)
+#define P3A_RG_XTAL_EXT_PE1H_VAL(x)((0x3 & (x)) << 12)
 #define P3A_RG_XTAL_EXT_EN_U3  GENMASK(11, 10)
 #define P3A_RG_XTAL_EXT_EN_U3_VAL(x)   ((0x3 & (x)) << 10)
 
+#define U3P_U3_PHYA_DA_REG40x108
+#define P3A_RG_PLL_DIVEN_PE2H  GENMASK(21, 19)
+#define P3A_RG_PLL_BC_PE2H GENMASK(7, 6)
+#define P3A_RG_PLL_BC_PE2H_VAL(x)  ((0x3 & (x)) << 6)
+
+#define U3P_U3_PHYA_DA_REG50x10c
+#define P3A_RG_PLL_BR_PE2H GENMASK(29, 28)
+#define P3A_RG_PLL_BR_PE2H_VAL(x)  ((0x3 & (x)) << 28)
+#define P3A_RG_PLL_IC_PE2H GENMASK(15, 12)
+#define P3A_RG_PLL_IC_PE2H_VAL(x)  ((0xf & (x)) << 12)
+
+#define U3P_U3_PHYA_DA_REG60x110
+#define P3A_RG_PLL_IR_PE2H GENMASK(19, 16)
+#define P3A_RG_PLL_IR_PE2H_VAL(x)  ((0xf & (x)) << 16)
+
+#define U3P_U3_PHYA_DA_REG70x114
+#define P3A_RG_PLL_BP_PE2H GENMASK(19, 16)
+#define P3A_RG_PLL_BP_PE2H_VAL(x)  ((0xf & (x)) << 16)
+
+#define U3P_U3_PHYA_DA_REG20   0x13c
+#define P3A_RG_PLL_DELTA1_PE2H GENMASK(31, 16)
+#define P3A_RG_PLL_DELTA1_PE2H_VAL(x)  ((0x & (x)) << 16)
+
+#define U3P_U3_PHYA_DA_REG25   0x148
+#define P3A_RG_PLL_DELTA_PE2H  GENMASK(15, 0)
+#define P3A_RG_PLL_DELTA_PE2H_VAL(x)   (0x & (x))
+
 #define U3P_U3_PHYD_LFPS1  0x00c
 #define P3D_RG_FWAKE_THGENMASK(21, 16)
 #define P3D_RG_FWAKE_TH_VAL(x) ((0x3f & (x)) << 16)
@@ -322,7 +370,7 @@ static void u3_phy_instance_init(struct mt65xx_u3phy *u3phy,
dev_dbg(u3phy->dev, "%s(%d)\n", __func__, instance->index);
 }
 
-static void phy_instance_init(struct mt65xx_u3phy *u3phy,
+static void u2_phy_instance_init(struct mt65xx_u3phy *u3phy,
struct mt65xx_phy_instance *instance)
 {
struct u2phy_banks *u2_banks = >u2_banks;
@@ -384,7 +432,7 @@ static void phy_instance_init(struct mt65xx_u3phy *u3phy,
dev_dbg(u3phy->dev, "%s(%d)\n", __func__, index);
 }
 
-static void phy_instance_power_on(struct mt65xx_u3phy *u3phy,
+static void u2_phy_instance_power_on(struct mt65xx_u3phy *u3phy,
struct mt65xx_phy_instance *instance)
 {
struct u2phy_banks *u2_banks = >u2_banks;
@@ -420,7 +468,7 @@ static void phy_instance_power_on(struct mt65xx_u3phy 
*u3phy,
dev_dbg(u3phy->dev, "%s(%d)\n", __func__, index);
 }
 
-static void phy_instance_power_off(struct mt65xx_u3phy *u3phy,
+static void u2_phy_instance_power_off(struct mt65xx_u3phy *u3phy,
struct mt65xx_phy_instance *instance)
 {
struct u2phy_banks *u2_banks = >u2_banks;
@@ -458,7 +506,7 @@ static void phy_instance_power_off(struct mt65xx_u3phy 
*u3phy,
dev_dbg(u3phy->dev, "%s(%d)\n", __func__, index);
 }
 
-static void 

[PATCH 2/4] phy: phy-mt65xx-usb3: add SATA PHY support

[Chunfeng Yun]

From: Ryder Lee <ryder@mediatek.com>

This patch adds SATA setting part.

Change-Id: Icb1fc15ebe9f6172c56a46d40c359c7cff922976
Signed-off-by: Ryder Lee <ryder@mediatek.com>
Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/phy/phy-mt65xx-usb3.c |  133 +++--
 1 file changed, 129 insertions(+), 4 deletions(-)

diff --git a/drivers/phy/phy-mt65xx-usb3.c b/drivers/phy/phy-mt65xx-usb3.c
index 8ba6905..45291c1 100644
--- a/drivers/phy/phy-mt65xx-usb3.c
+++ b/drivers/phy/phy-mt65xx-usb3.c
@@ -29,7 +29,7 @@
 #define SSUSB_SIFSLV_V1_U2FREQ 0x100   /* shared by u2 phys */
 /* u2 phy bank */
 #define SSUSB_SIFSLV_V1_U2PHY_COM  0x000
-/* u3/pcie phy banks */
+/* u3/pcie/sata phy banks */
 #define SSUSB_SIFSLV_V1_U3PHYD 0x000
 #define SSUSB_SIFSLV_V1_U3PHYA 0x200
 
@@ -199,6 +199,65 @@
 #define U3P_SR_COEF_DIVISOR1000
 #define U3P_FM_DET_CYCLE_CNT   1024
 
+/* SATA register setting */
+#define PHYD_CTRL_SIGNAL_MODE4 0x1c
+/* CDR Charge Pump P-path current adjustment */
+#define RG_CDR_BICLTD1_GEN1_MSKGENMASK(23, 20)
+#define RG_CDR_BICLTD1_GEN1_VAL(x) ((0xf & (x)) << 20)
+#define RG_CDR_BICLTD0_GEN1_MSKGENMASK(11, 8)
+#define RG_CDR_BICLTD0_GEN1_VAL(x) ((0xf & (x)) << 8)
+
+#define PHYD_DESIGN_OPTION20x24
+/* Symbol lock count selection */
+#define RG_LOCK_CNT_SEL_MSKGENMASK(5, 4)
+#define RG_LOCK_CNT_SEL_VAL(x) ((0x3 & (x)) << 4)
+
+#define PHYD_DESIGN_OPTION90x40
+/* COMWAK GAP width window */
+#define RG_TG_MAX_MSK  GENMASK(20, 16)
+#define RG_TG_MAX_VAL(x)   ((0x1f & (x)) << 16)
+/* COMINIT GAP width window */
+#define RG_T2_MAX_MSK  GENMASK(13, 8)
+#define RG_T2_MAX_VAL(x)   ((0x3f & (x)) << 8)
+/* COMWAK GAP width window */
+#define RG_TG_MIN_MSK  GENMASK(7, 5)
+#define RG_TG_MIN_VAL(x)   ((0x7 & (x)) << 5)
+/* COMINIT GAP width window */
+#define RG_T2_MIN_MSK  GENMASK(4, 0)
+#define RG_T2_MIN_VAL(x)   (0x1f & (x))
+
+#define ANA_RG_CTRL_SIGNAL10x4c
+/* TX driver tail current control for 0dB de-empahsis mdoe for Gen1 speed */
+#define RG_IDRV_0DB_GEN1_MSK   GENMASK(13, 8)
+#define RG_IDRV_0DB_GEN1_VAL(x)((0x3f & (x)) << 8)
+
+#define ANA_RG_CTRL_SIGNAL40x58
+#define RG_CDR_BICLTR_GEN1_MSK GENMASK(23, 20)
+#define RG_CDR_BICLTR_GEN1_VAL(x)  ((0xf & (x)) << 20)
+/* Loop filter R1 resistance adjustment for Gen1 speed */
+#define RG_CDR_BR_GEN2_MSK GENMASK(10, 8)
+#define RG_CDR_BR_GEN2_VAL(x)  ((0x7 & (x)) << 8)
+
+#define ANA_RG_CTRL_SIGNAL60x60
+/* I-path capacitance adjustment for Gen1 */
+#define RG_CDR_BC_GEN1_MSK GENMASK(28, 24)
+#define RG_CDR_BC_GEN1_VAL(x)  ((0x1f & (x)) << 24)
+#define RG_CDR_BIRLTR_GEN1_MSK GENMASK(4, 0)
+#define RG_CDR_BIRLTR_GEN1_VAL(x)  (0x1f & (x))
+
+#define ANA_EQ_EYE_CTRL_SIGNAL10x6c
+/* RX Gen1 LEQ tuning step */
+#define RG_EQ_DLEQ_LFI_GEN1_MSKGENMASK(11, 8)
+#define RG_EQ_DLEQ_LFI_GEN1_VAL(x) ((0xf & (x)) << 8)
+
+#define ANA_EQ_EYE_CTRL_SIGNAL40xd8
+#define RG_CDR_BIRLTD0_GEN1_MSKGENMASK(20, 16)
+#define RG_CDR_BIRLTD0_GEN1_VAL(x) ((0x1f & (x)) << 16)
+
+#define ANA_EQ_EYE_CTRL_SIGNAL50xdc
+#define RG_CDR_BIRLTD0_GEN3_MSKGENMASK(4, 0)
+#define RG_CDR_BIRLTD0_GEN3_VAL(x) (0x1f & (x))
+
 enum mt_phy_version {
MT_PHY_V1 = 1,
MT_PHY_V2,
@@ -630,6 +689,64 @@ static void pcie_phy_instance_power_off(struct 
mt65xx_u3phy *u3phy,
writel(tmp, bank->chip + U3P_U3_CHIP_GPIO_CTLE);
 }
 
+static void sata_phy_instance_init(struct mt65xx_u3phy *u3phy,
+   struct mt65xx_phy_instance *instance)
+{
+   struct u3phy_banks *u3_banks = >u3_banks;
+   void __iomem *phyd = u3_banks->phyd;
+   u32 tmp;
+
+   /* charge current adjustment */
+   tmp = readl(phyd + ANA_RG_CTRL_SIGNAL6);
+   tmp &= ~(RG_CDR_BIRLTR_GEN1_MSK | RG_CDR_BC_GEN1_MSK);
+   tmp |= RG_CDR_BIRLTR_GEN1_VAL(0x6) | RG_CDR_BC_GEN1_VAL(0x1a);
+   writel(tmp, phyd + ANA_RG_CTRL_SIGNAL6);
+
+   tmp = readl(phyd + ANA_EQ_EYE_CTRL_SIGNAL4);
+   tmp &= ~RG_CDR_BIRLTD0_GEN1_MSK;
+   tmp |= RG_CDR_BIRLTD0_GEN1_VAL(0x18);
+   writel(tmp, phyd + ANA_EQ_EYE_CTRL_SIGNAL4);
+
+   tmp = readl(phyd + ANA_EQ_EYE_CTRL_SIGNAL5);
+   tmp &= ~RG_CDR_BIRLTD0_GEN3_MSK;
+   tmp |= RG_CDR_BIRLTD0_GEN3_VAL(0x06);
+   writel(tmp, phyd + ANA_EQ_EYE_CTRL_SIGNAL5);
+
+   tmp = readl(phyd + ANA_RG_CTRL_SIGNAL4);
+   tmp &= ~(RG_CDR_BICLTR_GEN1_MSK | RG_CDR_BR_GEN2_MSK);
+   tmp |= RG_CDR_BICLTR_GEN1_VAL(0x0c) | RG_CDR_BR_GEN2_VAL(0

Re: [PATCH 1/2] usb: mtu3: add a vbus debugfs interface

[Chunfeng Yun]

On Thu, 2017-08-03 at 09:01 -0700, Greg Kroah-Hartman wrote:
> On Thu, Aug 03, 2017 at 09:00:57AM -0700, Greg Kroah-Hartman wrote:
> > On Thu, Aug 03, 2017 at 04:37:18PM +0800, Chunfeng Yun wrote:
> > > +static ssize_t ssusb_vbus_write(struct file *file,
> > > + const char __user *ubuf, size_t count, loff_t *ppos)
> > > +{
> > > + struct seq_file *sf = file->private_data;
> > > + struct ssusb_mtk *ssusb = sf->private;
> > > + struct otg_switch_mtk *otg_sx = >otg_switch;
> > > + char buf[16];
> > > +
> > > + if (copy_from_user(, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
> > > + return -EFAULT;
> > > +
> > > + if (!strncmp(buf, "on", 2)) {
> > > + ssusb_set_vbus(otg_sx, 1);
> > > + } else if (!strncmp(buf, "off", 3)) {
> > > + ssusb_set_vbus(otg_sx, 0);
> > 
> > kstrtobool() is better to use here.
Ok
> > 
> > > +static int ssusb_debugfs_init(struct ssusb_mtk *ssusb)
> > >  {
> > >   struct dentry *root;
> > >   struct dentry *file;
> > >  
> > >   root = debugfs_create_dir(dev_name(ssusb->dev), usb_debug_root);
> > >   if (IS_ERR_OR_NULL(root)) {
> > 
> > That test is wrong, you should never need to care about the return value
> > of a debugfs call.  You can always just use it in your next call (if it
> > is a dentry *), or just ignore it.
Ok, I'll just test NULL pointer, and ignore other ERROR value
> > 
> > > - if (!root)
> > > - dev_err(ssusb->dev, "create debugfs root failed\n");
> > > - return;
> > > + dev_err(ssusb->dev, "create debugfs root failed\n");
> > > + goto err_dbgfs;
> > >   }
> > >   ssusb->dbgfs_root = root;
> > >  
> > > - file = debugfs_create_file("mode", S_IRUGO | S_IWUSR, root,
> > > - ssusb, _mode_fops);
> > > - if (!file)
> > > - dev_dbg(ssusb->dev, "create debugfs mode failed\n");
> > > + file = debugfs_create_file("mode", 0644, root, ssusb, _mode_fops);
> > > + if (!file) {
> > > + dev_err(ssusb->dev, "create debugfs mode failed\n");
> > 
> > Same here, do not care, as it does not matter.  Actually, you don't even
> > need to keep the file pointer around, right?
Yes, you are right
> > 
> > > + goto err_dbgfs;
> > > + }
> > > +
> > > + file = debugfs_create_file("vbus", 0644, root, ssusb, _vbus_fops);
> > > + if (!file) {
> > 
> > Same here, you don't care if debugfs fails or not, it should never
> > affect your code flow.
Ok

Thanks a lot
> > 
> > And don't you need to remove the directory when your module/hardware is
> > removed?  I don't see that happening here as you are not saving root off
> > anywhere.
> 
> Oh nevermind, you do save it, sorry for the noise...
> 
> greg k-h


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[PATCH v2 2/2] MAINTAINERS: add entry for mediatek usb3 DRD IP driver

[Chunfeng Yun]

Add myself as maintainer of MediaTek USB3 DRD IP driver

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 MAINTAINERS |8 
 1 file changed, 8 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 205d397..0cf5e31 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8472,6 +8472,14 @@ M:  Sean Wang <sean.w...@mediatek.com>
 S:  Maintained
 F:  drivers/char/hw_random/mtk-rng.c
 
+MEDIATEK USB3 DRD IP DRIVER
+M:     Chunfeng Yun <chunfeng@mediatek.com>
+L: linux-usb@vger.kernel.org (moderated for non-subscribers)
+L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
+L: linux-media...@lists.infradead.org (moderated for non-subscribers)
+S: Maintained
+F: drivers/usb/mtu3/
+
 MEGACHIPS STDP-GE-B850V3-FW LVDS/DP++ BRIDGES
 M: Peter Senna Tschudin <peter.se...@collabora.com>
 M: Martin Donnelly <martin.donne...@ge.com>
-- 
1.7.9.5

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[PATCH v2 1/2] usb: mtu3: add a vbus debugfs interface

[Chunfeng Yun]

Provides a new vbus debugfs interface used to turn on/off vbus
regulator, it also can be used to get/put reference count of
vbus, due to sometimes we need keep it alive when manually switch
mtu3 to device mode.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/mtu3/mtu3_dr.c |   58 ++--
 1 file changed, 50 insertions(+), 8 deletions(-)

diff --git a/drivers/usb/mtu3/mtu3_dr.c b/drivers/usb/mtu3/mtu3_dr.c
index 11a0d3b..5602561 100644
--- a/drivers/usb/mtu3/mtu3_dr.c
+++ b/drivers/usb/mtu3/mtu3_dr.c
@@ -322,23 +322,65 @@ static ssize_t ssusb_mode_write(struct file *file,
.release = single_release,
 };
 
+static int ssusb_vbus_show(struct seq_file *sf, void *unused)
+{
+   struct ssusb_mtk *ssusb = sf->private;
+   struct otg_switch_mtk *otg_sx = >otg_switch;
+
+   seq_printf(sf, "vbus state: %s\n(echo on/off)\n",
+   regulator_is_enabled(otg_sx->vbus) ? "on" : "off");
+
+   return 0;
+}
+
+static int ssusb_vbus_open(struct inode *inode, struct file *file)
+{
+   return single_open(file, ssusb_vbus_show, inode->i_private);
+}
+
+static ssize_t ssusb_vbus_write(struct file *file,
+   const char __user *ubuf, size_t count, loff_t *ppos)
+{
+   struct seq_file *sf = file->private_data;
+   struct ssusb_mtk *ssusb = sf->private;
+   struct otg_switch_mtk *otg_sx = >otg_switch;
+   char buf[16];
+   bool enable;
+
+   if (copy_from_user(, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
+   return -EFAULT;
+
+   if (kstrtobool(buf, )) {
+   dev_err(ssusb->dev, "wrong setting\n");
+   return -EINVAL;
+   }
+
+   ssusb_set_vbus(otg_sx, enable);
+
+   return count;
+}
+
+static const struct file_operations ssusb_vbus_fops = {
+   .open = ssusb_vbus_open,
+   .write = ssusb_vbus_write,
+   .read = seq_read,
+   .llseek = seq_lseek,
+   .release = single_release,
+};
+
 static void ssusb_debugfs_init(struct ssusb_mtk *ssusb)
 {
struct dentry *root;
-   struct dentry *file;
 
root = debugfs_create_dir(dev_name(ssusb->dev), usb_debug_root);
-   if (IS_ERR_OR_NULL(root)) {
-   if (!root)
-   dev_err(ssusb->dev, "create debugfs root failed\n");
+   if (!root) {
+   dev_err(ssusb->dev, "create debugfs root failed\n");
return;
}
ssusb->dbgfs_root = root;
 
-   file = debugfs_create_file("mode", S_IRUGO | S_IWUSR, root,
-   ssusb, _mode_fops);
-   if (!file)
-   dev_dbg(ssusb->dev, "create debugfs mode failed\n");
+   debugfs_create_file("mode", 0644, root, ssusb, _mode_fops);
+   debugfs_create_file("vbus", 0644, root, ssusb, _vbus_fops);
 }
 
 static void ssusb_debugfs_exit(struct ssusb_mtk *ssusb)
-- 
1.7.9.5

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[PATCH v2 4/4] dt-bindings: mt8173-xhci: add generic compatible and rename file

[Chunfeng Yun]

The mt8173-xhci.txt actually holds the bindings for all mediatek
SoCs with xHCI controller, so add a generic compatible and change
the name to mediatek,mtk-xhci.txt to reflect that.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 .../usb/{mt8173-xhci.txt => mediatek,mtk-xhci.txt} |   14 +++---
 .../devicetree/bindings/usb/mediatek,mtu3.txt  |2 +-
 2 files changed, 12 insertions(+), 4 deletions(-)
 rename Documentation/devicetree/bindings/usb/{mt8173-xhci.txt => 
mediatek,mtk-xhci.txt} (85%)

diff --git a/Documentation/devicetree/bindings/usb/mt8173-xhci.txt 
b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
similarity index 85%
rename from Documentation/devicetree/bindings/usb/mt8173-xhci.txt
rename to Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
index 0acfc8a..ff21135 100644
--- a/Documentation/devicetree/bindings/usb/mt8173-xhci.txt
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
@@ -11,7 +11,11 @@ into two parts.
 
 
 Required properties:
- - compatible : should contain "mediatek,mt8173-xhci"
+ - compatible : should be "mediatek,soc-model-xhci", "mediatek,mtk-xhci",
+   soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
+   "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
+   addition, one of:
+   - "mediatek,mt8173-xhci"
  - reg : specifies physical base address and size of the registers
  - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control
  - interrupts : interrupt used by the controller
@@ -68,10 +72,14 @@ usb30: usb@1127 {
 
 In the case, xhci is added as subnode to mtu3. An example and the DT binding
 details of mtu3 can be found in:
-Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
+Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
 
 Required properties:
- - compatible : should contain "mediatek,mt8173-xhci"
+ - compatible : should be "mediatek,soc-model-xhci", "mediatek,mtk-xhci",
+   soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
+   "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
+   addition, one of:
+   - "mediatek,mt8173-xhci"
  - reg : specifies physical base address and size of the registers
  - reg-names: should be "mac" for xHCI MAC
  - interrupts : interrupt used by the host controller
diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt 
b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
index 545251e..722a029 100644
--- a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
@@ -48,7 +48,7 @@ Optional properties:
 Sub-nodes:
 The xhci should be added as subnode to mtu3 as shown in the following example
 if host mode is enabled. The DT binding details of xhci can be found in:
-Documentation/devicetree/bindings/usb/mt8173-xhci.txt
+Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
 
 Example:
 ssusb: usb@11271000 {
-- 
1.7.9.5

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[PATCH v2 3/4] dt-bindings: mt8173-mtu3: add generic compatible and rename file

[Chunfeng Yun]

The mt8173-mtu3.txt actually holds the bindings for all mediatek
SoCs with usb3 DRD IP, so add a generic compatible and change the
name to mediatek,mtu3.txt.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 .../usb/{mt8173-mtu3.txt => mediatek,mtu3.txt} |6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)
 rename Documentation/devicetree/bindings/usb/{mt8173-mtu3.txt => 
mediatek,mtu3.txt} (92%)

diff --git a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt 
b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
similarity index 92%
rename from Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
rename to Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
index 1d7c3bc..545251e 100644
--- a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
@@ -1,7 +1,11 @@
 The device node for Mediatek USB3.0 DRD controller
 
 Required properties:
- - compatible : should be "mediatek,mt8173-mtu3"
+ - compatible : should be "mediatek,soc-model-mtu3", "mediatek,mtu3",
+   soc-model is the name of SoC, such as mt8173, mt2712 etc,
+   when using "mediatek,mtu3" compatible string, you need SoC specific
+   ones in addition, one of:
+   - "mediatek,mt8173-mtu3"
  - reg : specifies physical base address and size of the registers
  - reg-names: should be "mac" for device IP and "ippc" for IP port control
  - interrupts : interrupt used by the device IP
-- 
1.7.9.5

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[PATCH v2 2/4] usb: xhci-mtk: add generic compatible string

[Chunfeng Yun]

The xhci-mtk driver is a generic driver for MediaTek xHCI IP, add
a generic compatible to avoid confusion when support new SoCs but
use a compatible with specific SoC's name "mt8173".

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/host/xhci-mtk.c |1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index 67d5dc7..8fb6065 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -795,6 +795,7 @@ static int __maybe_unused xhci_mtk_resume(struct device 
*dev)
 #ifdef CONFIG_OF
 static const struct of_device_id mtk_xhci_of_match[] = {
{ .compatible = "mediatek,mt8173-xhci"},
+   { .compatible = "mediatek,mtk-xhci"},
{ },
 };
 MODULE_DEVICE_TABLE(of, mtk_xhci_of_match);
-- 
1.7.9.5

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[PATCH v2 1/4] usb: mtu3: add generic compatible string

[Chunfeng Yun]

The mtu3 driver is a generic driver for MediaTek usb3 DRD IP, add
a generic compatible to avoid confusion when support new SoCs but
use a compatible with specific SoC's name "mt8173".

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/mtu3/mtu3_plat.c |1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/usb/mtu3/mtu3_plat.c b/drivers/usb/mtu3/mtu3_plat.c
index 0d3ebb3..088e3e6 100644
--- a/drivers/usb/mtu3/mtu3_plat.c
+++ b/drivers/usb/mtu3/mtu3_plat.c
@@ -500,6 +500,7 @@ static int __maybe_unused mtu3_resume(struct device *dev)
 
 static const struct of_device_id mtu3_of_match[] = {
{.compatible = "mediatek,mt8173-mtu3",},
+   {.compatible = "mediatek,mtu3",},
{},
 };
 
-- 
1.7.9.5

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Re: [PATCH 3/4] dt-bindings: mt8173-mtu3: add generic compatible and rename file

[Chunfeng Yun]

On Mon, 2017-08-14 at 13:23 +0200, Matthias Brugger wrote:
> 
> On 08/11/2017 09:00 AM, Chunfeng Yun wrote:
> > On Thu, 2017-08-10 at 21:54 -0500, Rob Herring wrote:
> >> On Tue, Aug 08, 2017 at 01:42:51PM +0800, Chunfeng Yun wrote:
> >>> The mt8173-mtu3.txt actually holds the bindings for all mediatek
> >>> SoCs with usb3 DRD IP, so add a generic compatible and change the
> >>> name to mtu3.txt.
> >>>
> >>> Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
> >>> ---
> >>>   .../bindings/usb/{mt8173-mtu3.txt => mtu3.txt} |6 --
> >>>   1 file changed, 4 insertions(+), 2 deletions(-)
> >>>   rename Documentation/devicetree/bindings/usb/{mt8173-mtu3.txt => 
> >>> mtu3.txt} (95%)
> >>>
> >>> diff --git a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt 
> >>> b/Documentation/devicetree/bindings/usb/mtu3.txt
> >>> similarity index 95%
> >>> rename from Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
> >>> rename to Documentation/devicetree/bindings/usb/mtu3.txt
> >>> index 1d7c3bc..832741d 100644
> >>> --- a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
> >>> +++ b/Documentation/devicetree/bindings/usb/mtu3.txt
> >>
> >> mediatek,mtu3.txt
> > Ok
> >>
> >>> @@ -1,7 +1,9 @@
> >>>   The device node for Mediatek USB3.0 DRD controller
> >>>   
> >>>   Required properties:
> >>> - - compatible : should be "mediatek,mt8173-mtu3"
> >>> + - compatible : should be one of
> >>> + "mediatek,mt8173-mtu3" (deprecated, use "mediatek,mtu3" instead),
> >>
> >> NAK. You can add generic compatibles, but you need SoC specific ones in
> >> addition.
> > It's for backward compatibility
> > 
> 
> I think backwards compatibility should be in the driver but not in the 
> binding 
> description. Apart from that device tree files will need to provide a SoC 
> specific binding apart from the generic one, for example:
> 
> "mediatek,mt8173-mtu3", "mediatek,mtu3": for mt8173
> "mediatek,mt7623-mtu3", "mediatek,mtu3": for mt6723
> 
> This is needed to cover possible bugs/features that can be found in the 
> future 
> for a specific SoC. The driver can match just against the generic binding and 
> will only implement a match against the SoC specific one if a bug/feature is 
> present.
> 
> Makes sense?
Got it, thanks a lot
> 
> Regards,
> Matthias


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Re: [PATCH 4/4] dt-bindings: mt8173-xhci: add generic compatible and rename file

[Chunfeng Yun]

On Thu, 2017-08-10 at 21:56 -0500, Rob Herring wrote:
> On Tue, Aug 08, 2017 at 01:42:52PM +0800, Chunfeng Yun wrote:
> > The mt8173-xhci.txt actually holds the bindings for all mediatek
> > SoCs with xHCI controller, so add a generic compatible and change
> > the name to xhci-mtk.txt to reflect that.
> > 
> > Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
> > ---
> >  .../bindings/usb/{mt8173-xhci.txt => xhci-mtk.txt} |   10 +++---
> >  1 file changed, 7 insertions(+), 3 deletions(-)
> >  rename Documentation/devicetree/bindings/usb/{mt8173-xhci.txt => 
> > xhci-mtk.txt} (92%)
> > 
> > diff --git a/Documentation/devicetree/bindings/usb/mt8173-xhci.txt 
> > b/Documentation/devicetree/bindings/usb/xhci-mtk.txt
> > similarity index 92%
> > rename from Documentation/devicetree/bindings/usb/mt8173-xhci.txt
> > rename to Documentation/devicetree/bindings/usb/xhci-mtk.txt
> 
> mediatek,mtk-xhci.txt
Ok
> 
> > index 0acfc8a..1ce77c7 100644
> > --- a/Documentation/devicetree/bindings/usb/mt8173-xhci.txt
> > +++ b/Documentation/devicetree/bindings/usb/xhci-mtk.txt
> > @@ -11,7 +11,9 @@ into two parts.
> >  
> >  
> >  Required properties:
> > - - compatible : should contain "mediatek,mt8173-xhci"
> > + - compatible : should be one of
> > +   "mediatek,mt8173-xhci" (deprecated, use "mediatek,xhci-mtk" instead),
> 
> NAK for same reason.
It's backward compatible
> 
> > +   "mediatek,xhci-mtk"
> 
> mediatek,mtk-xhci would be more in line with conventions.
Ok
> 
> >   - reg : specifies physical base address and size of the registers
> >   - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control
> >   - interrupts : interrupt used by the controller
> > @@ -68,10 +70,12 @@ usb30: usb@1127 {
> >  
> >  In the case, xhci is added as subnode to mtu3. An example and the DT 
> > binding
> >  details of mtu3 can be found in:
> > -Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
> > +Documentation/devicetree/bindings/usb/mtu3.txt
> >  
> >  Required properties:
> > - - compatible : should contain "mediatek,mt8173-xhci"
> > + - compatible : should be one of
> > +   "mediatek,mt8173-xhci" (deprecated, use "mediatek,xhci-mtk" instead),
> > +   "mediatek,xhci-mtk"
> >   - reg : specifies physical base address and size of the registers
> >   - reg-names: should be "mac" for xHCI MAC
> >   - interrupts : interrupt used by the host controller
> > -- 
> > 1.7.9.5
> > 


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Re: [PATCH 3/4] dt-bindings: mt8173-mtu3: add generic compatible and rename file

[Chunfeng Yun]

On Thu, 2017-08-10 at 21:54 -0500, Rob Herring wrote:
> On Tue, Aug 08, 2017 at 01:42:51PM +0800, Chunfeng Yun wrote:
> > The mt8173-mtu3.txt actually holds the bindings for all mediatek
> > SoCs with usb3 DRD IP, so add a generic compatible and change the
> > name to mtu3.txt.
> > 
> > Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
> > ---
> >  .../bindings/usb/{mt8173-mtu3.txt => mtu3.txt} |6 --
> >  1 file changed, 4 insertions(+), 2 deletions(-)
> >  rename Documentation/devicetree/bindings/usb/{mt8173-mtu3.txt => mtu3.txt} 
> > (95%)
> > 
> > diff --git a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt 
> > b/Documentation/devicetree/bindings/usb/mtu3.txt
> > similarity index 95%
> > rename from Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
> > rename to Documentation/devicetree/bindings/usb/mtu3.txt
> > index 1d7c3bc..832741d 100644
> > --- a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
> > +++ b/Documentation/devicetree/bindings/usb/mtu3.txt
> 
> mediatek,mtu3.txt
Ok
> 
> > @@ -1,7 +1,9 @@
> >  The device node for Mediatek USB3.0 DRD controller
> >  
> >  Required properties:
> > - - compatible : should be "mediatek,mt8173-mtu3"
> > + - compatible : should be one of
> > +   "mediatek,mt8173-mtu3" (deprecated, use "mediatek,mtu3" instead),
> 
> NAK. You can add generic compatibles, but you need SoC specific ones in 
> addition.
It's for backward compatibility

> 
> > +   "mediatek,mtu3"
Is it appropriate if changed to "mediatek,generic-mtu3"?

> >   - reg : specifies physical base address and size of the registers
> >   - reg-names: should be "mac" for device IP and "ippc" for IP port control
> >   - interrupts : interrupt used by the device IP
> > @@ -44,7 +46,7 @@ Optional properties:
> >  Sub-nodes:
> >  The xhci should be added as subnode to mtu3 as shown in the following 
> > example
> >  if host mode is enabled. The DT binding details of xhci can be found in:
> > -Documentation/devicetree/bindings/usb/mt8173-xhci.txt
> > +Documentation/devicetree/bindings/usb/xhci-mtk.txt
> 
> This should be in the patch that renames this file.
Ok
> 
> >  
> >  Example:
> >  ssusb: usb@11271000 {
> > -- 
> > 1.7.9.5
> > 


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Re: [RFCv2 usb-next 0/3] initialize (multiple) PHYs in xhci-plat

[Chunfeng Yun]

Hi,
On Sat, 2017-07-15 at 14:11 +0200, Martin Blumenstingl wrote:
> Hi,
> 
> On Sat, Jul 15, 2017 at 11:33 AM, Chunfeng Yun
> <chunfeng@mediatek.com> wrote:
> > Hi Martin,
> >
> > On Thu, 2017-07-13 at 12:59 +0200, Martin Blumenstingl wrote:
> >> This series is the outcome of a discussion with Felipe Balbi,
> >> see [0] and [1].
> >> The quick-summary of this is:
> >> - dwc3 already takes one USB2 and one USB3 PHY and initializes these
> >>   correct
> >> - some other HCI platform drivers (like ehci-platform.c, xhci-mtk.c and
> >>   ohci-platform.c) do not have a limitation on the number of PHYs - they
> >>   support one PHY per actual host port
> >> - Amlogic Meson GXL and GXM SoCs come with a dwc3 IP block which has two
> >>   or three USB2 ports enabled on the internal root-hub. The SoCs also
> >>   provide separate USB2 PHYs, one per port. All USB2 PHYs (which are
> >>   internally "connected" to the dwc3 roothub) need to be powered on,
> >>   otherwise USB devices cannot be enumerated (even if just one PHY is
> >>   disabled and if the device is plugged into another, enabled port)
> >>
> >> In my first attempt to get USB supported on the GXL and GXM SoCs I tried
> >> to work-around the problem that I could not pass multiple PHYs to the
> >> dwc3 controller.
> >> This was rejected by Rob Herring (which was definitely the thing to do in
> >> my opinion), see [2]
> >>
> >> This series adds a new "platform-roothub". This can be configured through
> >> devicetree by passing a child-node with "reg = <0>" to the USB
> >> controller. Additionally there has to be a child-node for each port on
> >> the root-hub. Each of the child-nodes takes a "phys" and "phy-names"
> >> property. This allows modeling the root-hub in devicetree similar to the
> >> USB device binding (documented in devicetree/bindings/usb/usb-device.txt)
> >> This avoids and backwards-compatibility problems (which was a concern
> >> regardless of the solution, see [3]) since the binding for the root-hub
> >> was previously not specified (and we're not using the "phys" property of
> >> the controller, which might have served different purposes before,
> >> depending on the drivers).
> >>
> >> Additionally this integrates the new platform-roothub into xhci-plat.c
> >> which automatically enables it for the dwc3 driver (in host-mode).
> >>
> > How to handle the phy0(one u2phy and one u3phy) when port1 support
> > dual-role mode? leave them to peripheral side as felipe suggested
> > before? If so, no port1 node for roothub, is there any problem when
> > change the port1 to host-only mode?
> on Amlogic Meson GXL we have the following IP blocks:
> - 2x USB2 PHYs, some external component has to tell them which mode
> (host/device) they should operate in
> - there is an additional (1x) USB3 PHY with built-in OTG detection logic
> 
> on Amlogic Meson GXL it could work like this:
> USB2 and USB3 phy0 can be passed to the root-hub. Additionally the
> USB2 phy0 could be passed to the USB3 PHY. The USB3 PHY would then
> tell the USB2 PHY in which mode it should operate.
> 
> please note that device mode and OTG support on Amlogic Meson GXL is
> more complicated, as it uses dwc2 and dwc3 controllers in combination:
> - dwc3 is reponsible for host-only mode
> - dwc2 is responsible for device-only mode
> - OTG detection is done by the USB3 PHY
> 
> would you mind sharing a short overview of host/device/OTG support
> works on Mediatek SoCs? I assume that the Amlogic Meson GXL
> implementation is quite special, so comparing this with another
> implementation (for example the Mediatek one) may help spotting
> potential issues.
> 
MTK's mtu3 IP supports at most 5x USB2 phys and 4x USB3 phys. They work
as following:

1. device mode works as HS only:

u2phy0 --- dual-role/OTG

u2phy1 ---|
  +  U3 host-only
u3phy0 ---|

...
u2phy4 ---|
  +  U3 host-only
u3phy3 ---|
(e.g. MT8173 supports 2x u2phys and 1x u3phy, u2phy0 can work as
dual-role mode, u2phy1 & u3phy0 are host-only)

2. device mode works as HS & SS, or host only:

u2phy0 ---|
  + dual-role or host-only
u3phy0 ---|

...
u2phy3 ---|
  + U3 host-only
u3phy3 ---|

u2phy4 --- U2 host-only
(e.g. on MT2701, u2phy0 and u3phy0 work as host-only mode)

mtu3 driver supports host-only, device-only and dual-role mode(use IDDIG
pin), and will take all phys it needed, include host-only phys; 
But if just host-only mode is supported, we can skip mtu3 driver and
make use 

Re: [RFCv2 usb-next 0/3] initialize (multiple) PHYs in xhci-plat

[Chunfeng Yun]

Hi Martin,

On Thu, 2017-07-13 at 12:59 +0200, Martin Blumenstingl wrote:
> This series is the outcome of a discussion with Felipe Balbi,
> see [0] and [1].
> The quick-summary of this is:
> - dwc3 already takes one USB2 and one USB3 PHY and initializes these
>   correct
> - some other HCI platform drivers (like ehci-platform.c, xhci-mtk.c and
>   ohci-platform.c) do not have a limitation on the number of PHYs - they
>   support one PHY per actual host port
> - Amlogic Meson GXL and GXM SoCs come with a dwc3 IP block which has two
>   or three USB2 ports enabled on the internal root-hub. The SoCs also
>   provide separate USB2 PHYs, one per port. All USB2 PHYs (which are
>   internally "connected" to the dwc3 roothub) need to be powered on,
>   otherwise USB devices cannot be enumerated (even if just one PHY is
>   disabled and if the device is plugged into another, enabled port)
> 
> In my first attempt to get USB supported on the GXL and GXM SoCs I tried
> to work-around the problem that I could not pass multiple PHYs to the
> dwc3 controller.
> This was rejected by Rob Herring (which was definitely the thing to do in
> my opinion), see [2]
> 
> This series adds a new "platform-roothub". This can be configured through
> devicetree by passing a child-node with "reg = <0>" to the USB
> controller. Additionally there has to be a child-node for each port on
> the root-hub. Each of the child-nodes takes a "phys" and "phy-names"
> property. This allows modeling the root-hub in devicetree similar to the
> USB device binding (documented in devicetree/bindings/usb/usb-device.txt)
> This avoids and backwards-compatibility problems (which was a concern
> regardless of the solution, see [3]) since the binding for the root-hub
> was previously not specified (and we're not using the "phys" property of
> the controller, which might have served different purposes before,
> depending on the drivers).
> 
> Additionally this integrates the new platform-roothub into xhci-plat.c
> which automatically enables it for the dwc3 driver (in host-mode).
> 
How to handle the phy0(one u2phy and one u3phy) when port1 support
dual-role mode? leave them to peripheral side as felipe suggested
before? If so, no port1 node for roothub, is there any problem when
change the port1 to host-only mode?
 
> 
> Changes since RFCv1 at [4]:
> - split the usb-xhci dt-binding documentation into a separate patch
> - fixed a typo ("usb-phy" -> "phys" in the dt-binding example)
> - rebased to apply against latest usb-next
> 
> 
> [0] 
> http://lists.infradead.org/pipermail/linux-amlogic/2017-January/001945.html
> [1] 
> http://lists.infradead.org/pipermail/linux-amlogic/2017-January/001947.html
> [2] 
> http://lists.infradead.org/pipermail/linux-amlogic/2016-November/001818.html
> [3] 
> http://lists.infradead.org/pipermail/linux-amlogic/2017-January/001948.html
> [4] http://marc.info/?l=linux-usb=148414866303604=2
> 
> 
> Martin Blumenstingl (3):
>   dt-bindings: usb: add the documentation for USB root-hub
>   usb: host: add a generic platform USB roothub driver
>   usb: host: xhci: plat: integrate the platform-roothub
> 
>  .../devicetree/bindings/usb/usb-roothub.txt|  46 +++
>  Documentation/devicetree/bindings/usb/usb-xhci.txt |   7 +
>  drivers/usb/host/Kconfig   |   4 +
>  drivers/usb/host/Makefile  |   2 +
>  drivers/usb/host/platform-roothub.c| 146 
> +
>  drivers/usb/host/platform-roothub.h|  14 ++
>  drivers/usb/host/xhci-plat.c   |  27 +++-
>  drivers/usb/host/xhci.h|   2 +
>  8 files changed, 247 insertions(+), 1 deletion(-)
>  create mode 100644 Documentation/devicetree/bindings/usb/usb-roothub.txt
>  create mode 100644 drivers/usb/host/platform-roothub.c
>  create mode 100644 drivers/usb/host/platform-roothub.h
> 


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Re: [RFCv2 usb-next 0/3] initialize (multiple) PHYs in xhci-plat

[Chunfeng Yun]

Hi,
On Mon, 2017-07-17 at 11:27 +0200, Martin Blumenstingl wrote:
> Hi,
> 
> On Mon, Jul 17, 2017 at 9:21 AM, Chunfeng Yun <chunfeng@mediatek.com> 
> wrote:
> > Hi,
> > On Sat, 2017-07-15 at 14:11 +0200, Martin Blumenstingl wrote:
> >> Hi,
> >>
> >> On Sat, Jul 15, 2017 at 11:33 AM, Chunfeng Yun
> >> <chunfeng@mediatek.com> wrote:
> >> > Hi Martin,
> >> >
> >> > On Thu, 2017-07-13 at 12:59 +0200, Martin Blumenstingl wrote:
> >> >> This series is the outcome of a discussion with Felipe Balbi,
> >> >> see [0] and [1].
> >> >> The quick-summary of this is:
> >> >> - dwc3 already takes one USB2 and one USB3 PHY and initializes these
> >> >>   correct
> >> >> - some other HCI platform drivers (like ehci-platform.c, xhci-mtk.c and
> >> >>   ohci-platform.c) do not have a limitation on the number of PHYs - they
> >> >>   support one PHY per actual host port
> >> >> - Amlogic Meson GXL and GXM SoCs come with a dwc3 IP block which has two
> >> >>   or three USB2 ports enabled on the internal root-hub. The SoCs also
> >> >>   provide separate USB2 PHYs, one per port. All USB2 PHYs (which are
> >> >>   internally "connected" to the dwc3 roothub) need to be powered on,
> >> >>   otherwise USB devices cannot be enumerated (even if just one PHY is
> >> >>   disabled and if the device is plugged into another, enabled port)
> >> >>
> >> >> In my first attempt to get USB supported on the GXL and GXM SoCs I tried
> >> >> to work-around the problem that I could not pass multiple PHYs to the
> >> >> dwc3 controller.
> >> >> This was rejected by Rob Herring (which was definitely the thing to do 
> >> >> in
> >> >> my opinion), see [2]
> >> >>
> >> >> This series adds a new "platform-roothub". This can be configured 
> >> >> through
> >> >> devicetree by passing a child-node with "reg = <0>" to the USB
> >> >> controller. Additionally there has to be a child-node for each port on
> >> >> the root-hub. Each of the child-nodes takes a "phys" and "phy-names"
> >> >> property. This allows modeling the root-hub in devicetree similar to the
> >> >> USB device binding (documented in 
> >> >> devicetree/bindings/usb/usb-device.txt)
> >> >> This avoids and backwards-compatibility problems (which was a concern
> >> >> regardless of the solution, see [3]) since the binding for the root-hub
> >> >> was previously not specified (and we're not using the "phys" property of
> >> >> the controller, which might have served different purposes before,
> >> >> depending on the drivers).
> >> >>
> >> >> Additionally this integrates the new platform-roothub into xhci-plat.c
> >> >> which automatically enables it for the dwc3 driver (in host-mode).
> >> >>
> >> > How to handle the phy0(one u2phy and one u3phy) when port1 support
> >> > dual-role mode? leave them to peripheral side as felipe suggested
> >> > before? If so, no port1 node for roothub, is there any problem when
> >> > change the port1 to host-only mode?
> >> on Amlogic Meson GXL we have the following IP blocks:
> >> - 2x USB2 PHYs, some external component has to tell them which mode
> >> (host/device) they should operate in
> >> - there is an additional (1x) USB3 PHY with built-in OTG detection logic
> >>
> >> on Amlogic Meson GXL it could work like this:
> >> USB2 and USB3 phy0 can be passed to the root-hub. Additionally the
> >> USB2 phy0 could be passed to the USB3 PHY. The USB3 PHY would then
> >> tell the USB2 PHY in which mode it should operate.
> >>
> >> please note that device mode and OTG support on Amlogic Meson GXL is
> >> more complicated, as it uses dwc2 and dwc3 controllers in combination:
> >> - dwc3 is reponsible for host-only mode
> >> - dwc2 is responsible for device-only mode
> >> - OTG detection is done by the USB3 PHY
> >>
> >> would you mind sharing a short overview of host/device/OTG support
> >> works on Mediatek SoCs? I assume that the Amlogic Meson GXL
> >> implementation is quite special, so comparing this with another
> >> implementation (for example the Mediatek one) may help spottin

Re: [RFCv2 usb-next 0/3] initialize (multiple) PHYs in xhci-plat

[Chunfeng Yun]

On Tue, 2017-07-18 at 10:19 +0200, Martin Blumenstingl wrote:
> Hi,
> 
> On Tue, Jul 18, 2017 at 3:40 AM, Chunfeng Yun <chunfeng@mediatek.com> 
> wrote:
> > Hi,
> > On Mon, 2017-07-17 at 11:27 +0200, Martin Blumenstingl wrote:
> >> Hi,
> >>
> >> On Mon, Jul 17, 2017 at 9:21 AM, Chunfeng Yun <chunfeng@mediatek.com> 
> >> wrote:
> >> > Hi,
> >> > On Sat, 2017-07-15 at 14:11 +0200, Martin Blumenstingl wrote:
> >> >> Hi,
> >> >>
> >> >> On Sat, Jul 15, 2017 at 11:33 AM, Chunfeng Yun
> >> >> <chunfeng@mediatek.com> wrote:
> >> >> > Hi Martin,
> >> >> >
> >> >> > On Thu, 2017-07-13 at 12:59 +0200, Martin Blumenstingl wrote:
> >> >> >> This series is the outcome of a discussion with Felipe Balbi,
> >> >> >> see [0] and [1].
> >> >> >> The quick-summary of this is:
> >> >> >> - dwc3 already takes one USB2 and one USB3 PHY and initializes these
> >> >> >>   correct
> >> >> >> - some other HCI platform drivers (like ehci-platform.c, xhci-mtk.c 
> >> >> >> and
> >> >> >>   ohci-platform.c) do not have a limitation on the number of PHYs - 
> >> >> >> they
> >> >> >>   support one PHY per actual host port
> >> >> >> - Amlogic Meson GXL and GXM SoCs come with a dwc3 IP block which has 
> >> >> >> two
> >> >> >>   or three USB2 ports enabled on the internal root-hub. The SoCs also
> >> >> >>   provide separate USB2 PHYs, one per port. All USB2 PHYs (which are
> >> >> >>   internally "connected" to the dwc3 roothub) need to be powered on,
> >> >> >>   otherwise USB devices cannot be enumerated (even if just one PHY is
> >> >> >>   disabled and if the device is plugged into another, enabled port)
> >> >> >>
> >> >> >> In my first attempt to get USB supported on the GXL and GXM SoCs I 
> >> >> >> tried
> >> >> >> to work-around the problem that I could not pass multiple PHYs to the
> >> >> >> dwc3 controller.
> >> >> >> This was rejected by Rob Herring (which was definitely the thing to 
> >> >> >> do in
> >> >> >> my opinion), see [2]
> >> >> >>
> >> >> >> This series adds a new "platform-roothub". This can be configured 
> >> >> >> through
> >> >> >> devicetree by passing a child-node with "reg = <0>" to the USB
> >> >> >> controller. Additionally there has to be a child-node for each port 
> >> >> >> on
> >> >> >> the root-hub. Each of the child-nodes takes a "phys" and "phy-names"
> >> >> >> property. This allows modeling the root-hub in devicetree similar to 
> >> >> >> the
> >> >> >> USB device binding (documented in 
> >> >> >> devicetree/bindings/usb/usb-device.txt)
> >> >> >> This avoids and backwards-compatibility problems (which was a concern
> >> >> >> regardless of the solution, see [3]) since the binding for the 
> >> >> >> root-hub
> >> >> >> was previously not specified (and we're not using the "phys" 
> >> >> >> property of
> >> >> >> the controller, which might have served different purposes before,
> >> >> >> depending on the drivers).
> >> >> >>
> >> >> >> Additionally this integrates the new platform-roothub into 
> >> >> >> xhci-plat.c
> >> >> >> which automatically enables it for the dwc3 driver (in host-mode).
> >> >> >>
> >> >> > How to handle the phy0(one u2phy and one u3phy) when port1 support
> >> >> > dual-role mode? leave them to peripheral side as felipe suggested
> >> >> > before? If so, no port1 node for roothub, is there any problem when
> >> >> > change the port1 to host-only mode?
> >> >> on Amlogic Meson GXL we have the following IP blocks:
> >> >> - 2x USB2 PHYs, some external component has to tell them which mode
> >> >> (host/device) they should operate in
> >> >> - there i

[PATCH 1/3] usb: mtu3: handle delayed status of the control transfer

[Chunfeng Yun]

Add the delayed status handling. This is used by mass storage etc to
gain some extra time to setup its internal status before it can proceed
further requests, and once the gadget is ready, it will enqueue an
empty packet which is used for synchronization.
The issue may happen on some FGPA platform with very low cpu frequency.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/mtu3/mtu3.h|2 ++
 drivers/usb/mtu3/mtu3_gadget.c |2 ++
 drivers/usb/mtu3/mtu3_gadget_ep0.c |   23 ---
 3 files changed, 24 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/mtu3/mtu3.h b/drivers/usb/mtu3/mtu3.h
index 7b6dc23..b26fffc 100644
--- a/drivers/usb/mtu3/mtu3.h
+++ b/drivers/usb/mtu3/mtu3.h
@@ -288,6 +288,7 @@ static inline struct ssusb_mtk *dev_to_ssusb(struct device 
*dev)
  * MTU3_U3_IP_SLOT_DEFAULT for U3 IP
  * @may_wakeup: means device's remote wakeup is enabled
  * @is_self_powered: is reported in device status and the config descriptor
+ * @delayed_status: true when function drivers ask for delayed status
  * @ep0_req: dummy request used while handling standard USB requests
  * for GET_STATUS and SET_SEL
  * @setup_buf: ep0 response buffer for GET_STATUS and SET_SEL requests
@@ -327,6 +328,7 @@ struct mtu3 {
unsigned u1_enable:1;
unsigned u2_enable:1;
unsigned is_u3_ip:1;
+   unsigned delayed_status:1;
 
u8 address;
u8 test_mode_nr;
diff --git a/drivers/usb/mtu3/mtu3_gadget.c b/drivers/usb/mtu3/mtu3_gadget.c
index 9dd2441..a4ad67c 100644
--- a/drivers/usb/mtu3/mtu3_gadget.c
+++ b/drivers/usb/mtu3/mtu3_gadget.c
@@ -663,6 +663,7 @@ int mtu3_gadget_setup(struct mtu3 *mtu)
mtu->g.sg_supported = 0;
mtu->g.name = MTU3_DRIVER_NAME;
mtu->is_active = 0;
+   mtu->delayed_status = false;
 
mtu3_gadget_init_eps(mtu);
 
@@ -727,4 +728,5 @@ void mtu3_gadget_reset(struct mtu3 *mtu)
mtu->address = 0;
mtu->ep0_state = MU3D_EP0_STATE_SETUP;
mtu->may_wakeup = 0;
+   mtu->delayed_status = false;
 }
diff --git a/drivers/usb/mtu3/mtu3_gadget_ep0.c 
b/drivers/usb/mtu3/mtu3_gadget_ep0.c
index 2d7427b..958d74d 100644
--- a/drivers/usb/mtu3/mtu3_gadget_ep0.c
+++ b/drivers/usb/mtu3/mtu3_gadget_ep0.c
@@ -16,6 +16,8 @@
  *
  */
 
+#include 
+
 #include "mtu3.h"
 
 /* ep0 is always mtu3->in_eps[0] */
@@ -150,6 +152,7 @@ static void ep0_stall_set(struct mtu3_ep *mep0, bool set, 
u32 pktrdy)
csr = (csr & ~EP0_SENDSTALL) | EP0_SENTSTALL;
mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr);
 
+   mtu->delayed_status = false;
mtu->ep0_state = MU3D_EP0_STATE_SETUP;
 
dev_dbg(mtu->dev, "ep0: %s STALL, ep0_state: %s\n",
@@ -656,6 +659,9 @@ static int ep0_handle_setup(struct mtu3 *mtu)
 finish:
if (mtu->test_mode) {
;   /* nothing to do */
+   } else if (handled == USB_GADGET_DELAYED_STATUS) {
+   /* handle the delay STATUS phase till receive ep_queue on ep0 */
+   mtu->delayed_status = true;
} else if (le16_to_cpu(setup.wLength) == 0) { /* no data stage */
 
mtu3_writel(mbase, U3D_EP0CSR,
@@ -775,9 +781,6 @@ static int ep0_queue(struct mtu3_ep *mep, struct 
mtu3_request *mreq)
dev_dbg(mtu->dev, "%s %s (ep0_state: %s), len#%d\n", __func__,
mep->name, decode_ep0_state(mtu), mreq->request.length);
 
-   if (!list_empty(>req_list))
-   return -EBUSY;
-
switch (mtu->ep0_state) {
case MU3D_EP0_STATE_SETUP:
case MU3D_EP0_STATE_RX: /* control-OUT data */
@@ -789,6 +792,20 @@ static int ep0_queue(struct mtu3_ep *mep, struct 
mtu3_request *mreq)
return -EINVAL;
}
 
+   if (mtu->delayed_status) {
+   u32 csr;
+
+   mtu->delayed_status = false;
+   csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS;
+   csr |= EP0_SETUPPKTRDY | EP0_DATAEND;
+   mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr);
+   /* needn't giveback the request for handling delay STATUS */
+   return 0;
+   }
+
+   if (!list_empty(>req_list))
+   return -EBUSY;
+
list_add_tail(>list, >req_list);
 
/* sequence #1, IN ... start writing the data */
-- 
1.7.9.5

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[PATCH 2/3] usb: mtu3: clear u1/u2_enable to 0 in mtu3_gadget_reset

[Chunfeng Yun]

when the device is reset by host, the status of u1_enable and
u2_enable should also be restored to default value.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/mtu3/mtu3_gadget.c |2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/usb/mtu3/mtu3_gadget.c b/drivers/usb/mtu3/mtu3_gadget.c
index a4ad67c..434fca5 100644
--- a/drivers/usb/mtu3/mtu3_gadget.c
+++ b/drivers/usb/mtu3/mtu3_gadget.c
@@ -728,5 +728,7 @@ void mtu3_gadget_reset(struct mtu3 *mtu)
mtu->address = 0;
mtu->ep0_state = MU3D_EP0_STATE_SETUP;
mtu->may_wakeup = 0;
+   mtu->u1_enable = 0;
+   mtu->u2_enable = 0;
mtu->delayed_status = false;
 }
-- 
1.7.9.5

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[PATCH 3/3] usb: mtu3: fix ip sleep auto-exit issue when enable DRD mode

[Chunfeng Yun]

Ip sleep will auto exit if vbus comparison circuit of u2 phy is
disabled when system tries to enter suspend mode, so get vbus-valid
status from mac but not from u2 phy when enable DRD mode to fix
the issue.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/mtu3/mtu3_hw_regs.h |4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/mtu3/mtu3_hw_regs.h b/drivers/usb/mtu3/mtu3_hw_regs.h
index 2123672..06b2966 100644
--- a/drivers/usb/mtu3/mtu3_hw_regs.h
+++ b/drivers/usb/mtu3/mtu3_hw_regs.h
@@ -462,10 +462,12 @@
 #define SSUSB_U3_PORT_DIS  BIT(0)
 
 /* U3D_SSUSB_U2_CTRL_0P */
+#define SSUSB_U2_PORT_VBUSVALIDBIT(9)
 #define SSUSB_U2_PORT_OTG_SEL  BIT(7)
-#define SSUSB_U2_PORT_HOST_SEL BIT(2)
+#define SSUSB_U2_PORT_HOST BIT(2)
 #define SSUSB_U2_PORT_PDN  BIT(1)
 #define SSUSB_U2_PORT_DIS  BIT(0)
+#define SSUSB_U2_PORT_HOST_SEL (SSUSB_U2_PORT_VBUSVALID | SSUSB_U2_PORT_HOST)
 
 /* U3D_SSUSB_DEV_RST_CTRL */
 #define SSUSB_DEV_SW_RST   BIT(0)
-- 
1.7.9.5

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Re: [RFCv2 usb-next 2/3] usb: host: add a generic platform USB roothub driver

[Chunfeng Yun]

On Thu, 2017-07-13 at 12:59 +0200, Martin Blumenstingl wrote:
> Many SoC platforms have separate devices for the USB PHY which are
> registered through the generic PHY framework. These PHYs have to be
> enabled to make the USB controller actually work. They also have to be
> disabled again on shutdown/suspend.
> 
> Currently (at least) the following HCI platform drivers are using custom
> code to obtain all PHYs via devicetree for the roothub/controller and
> disable/enable them when required:
> - ehci-platform.c has ehci_platform_power_{on,off}
> - xhci-mtk.c has xhci_mtk_phy_{init,exit,power_on,power_off}
> - ohci-platform.c has ohci_platform_power_{on,off}
> 
> These drivers are not using the generic devicetree USB device bindings
> yet which were only introduced recently (documentation is available in
> devicetree/bindings/usb/usb-device.txt).
> With this new driver the usb2-phy and usb3-phy can be specified directly
> in the child-node of the corresponding port of the roothub via
> devicetree. This can be extended by not just parsing PHYs (some of the
> other drivers listed above are for example also parsing a list of clocks
> as well) when required.
> 
> Signed-off-by: Martin Blumenstingl 
> ---
>  drivers/usb/host/Kconfig|   3 +
>  drivers/usb/host/Makefile   |   2 +
>  drivers/usb/host/platform-roothub.c | 146 
> 
>  drivers/usb/host/platform-roothub.h |  14 
>  4 files changed, 165 insertions(+)
>  create mode 100644 drivers/usb/host/platform-roothub.c
>  create mode 100644 drivers/usb/host/platform-roothub.h
> 
> diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
> index fa5692dec832..b8b05c786b2a 100644
> --- a/drivers/usb/host/Kconfig
> +++ b/drivers/usb/host/Kconfig
> @@ -805,6 +805,9 @@ config USB_HCD_SSB
>  
> If unsure, say N.
>  
> +config USB_PLATFORM_ROOTHUB
> + bool
> +
>  config USB_HCD_TEST_MODE
>   bool "HCD test mode support"
>   ---help---
> diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
> index cf2691fffcc0..dc817f82d632 100644
> --- a/drivers/usb/host/Makefile
> +++ b/drivers/usb/host/Makefile
> @@ -29,6 +29,8 @@ obj-$(CONFIG_USB_WHCI_HCD)  += whci/
>  
>  obj-$(CONFIG_USB_PCI)+= pci-quirks.o
>  
> +obj-$(CONFIG_USB_PLATFORM_ROOTHUB)   += platform-roothub.o
> +
>  obj-$(CONFIG_USB_EHCI_HCD)   += ehci-hcd.o
>  obj-$(CONFIG_USB_EHCI_PCI)   += ehci-pci.o
>  obj-$(CONFIG_USB_EHCI_HCD_PLATFORM)  += ehci-platform.o
> diff --git a/drivers/usb/host/platform-roothub.c 
> b/drivers/usb/host/platform-roothub.c
> new file mode 100644
> index ..84837e42b006
> --- /dev/null
> +++ b/drivers/usb/host/platform-roothub.c
> @@ -0,0 +1,146 @@
> +/*
> + * platform roothub driver - a virtual PHY device which passes all phy_*
> + * function calls to multiple (actual) PHY devices. This is comes handy when
> + * initializing all PHYs on a root-hub (to keep them all in the same state).
> + *
> + * Copyright (C) 2017 Martin Blumenstingl 
> 
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program. If not, see .
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "platform-roothub.h"
> +
> +#define ROOTHUB_PORTNUM  0
> +
> +struct platform_roothub {
> + struct phy  *phy;
> + struct list_headlist;
> +};
> +
> +static struct platform_roothub *platform_roothub_alloc(struct device *dev)
> +{
> + struct platform_roothub *roothub_entry;
> +
> + roothub_entry = devm_kzalloc(dev, sizeof(*roothub_entry), GFP_KERNEL);
> + if (!roothub_entry)
> + return ERR_PTR(-ENOMEM);
> +
> + INIT_LIST_HEAD(_entry->list);
> +
> + return roothub_entry;
> +}
> +
> +static int platform_roothub_add_phy(struct device *dev,
> + struct device_node *port_np,
> + const char *con_id, struct list_head *list)
> +{
> + struct platform_roothub *roothub_entry;
> + struct phy *phy = devm_of_phy_get(dev, port_np, con_id);
> +
> + if (IS_ERR_OR_NULL(phy)) {
> + if (!phy || PTR_ERR(phy) == -ENODEV)
> + return 0;
> + else
> + return PTR_ERR(phy);
> + }
> +
> + roothub_entry = platform_roothub_alloc(dev);
> + if (IS_ERR(roothub_entry))
> + return PTR_ERR(roothub_entry);
> +
> + roothub_entry->phy = phy;
> +
> + list_add_tail(_entry->list, list);
> +
> + return 0;
> +}
> +
> +struct platform_roothub *platform_roothub_init(struct device *dev)
> +{
> + struct device_node *roothub_np, 

Re: usb usb4-port2: cannot disable (err = -32)

[Chunfeng Yun]

Hi,

This is introduced by patch in core/hub.c:
"3bc02bc usb: hub: Move hub_port_disable() to fix warning if PM is
disabled"

When plug out a device, it try to set port to U3 state, but the
port is disabled before.

But I don't know how to fix it properly

On Thu, 2017-04-27 at 18:13 -0300, Cristian wrote:
> Hello,
> 
> My report:
> https://bugzilla.kernel.org/show_bug.cgi?id=195603
> 
> "dmesg:
> [ 3.271343] usb usb4-port2: cannot disable (err = -32)
> [ 3.271382] xhci_hcd :00:14.0: Cannot set link state.
> [ 3.271398] usb usb4-port2: cannot disable (err = -32)"
> 
> 
> Regards,


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[PATCH 2/4] usb: xhci-mtk: add generic compatible string

[Chunfeng Yun]

The xhci-mtk driver is a generic driver for MediaTek xHCI IP, add
a generic compatible to avoid confusion when support new SoCs but
use a compatible with specific SoC's name "mt8173".

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/host/xhci-mtk.c |1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index 67d5dc7..d2934b9 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -795,6 +795,7 @@ static int __maybe_unused xhci_mtk_resume(struct device 
*dev)
 #ifdef CONFIG_OF
 static const struct of_device_id mtk_xhci_of_match[] = {
{ .compatible = "mediatek,mt8173-xhci"},
+   { .compatible = "mediatek,xhci-mtk"},
{ },
 };
 MODULE_DEVICE_TABLE(of, mtk_xhci_of_match);
-- 
1.7.9.5

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[PATCH 3/4] dt-bindings: mt8173-mtu3: add generic compatible and rename file

[Chunfeng Yun]

The mt8173-mtu3.txt actually holds the bindings for all mediatek
SoCs with usb3 DRD IP, so add a generic compatible and change the
name to mtu3.txt.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 .../bindings/usb/{mt8173-mtu3.txt => mtu3.txt} |6 --
 1 file changed, 4 insertions(+), 2 deletions(-)
 rename Documentation/devicetree/bindings/usb/{mt8173-mtu3.txt => mtu3.txt} 
(95%)

diff --git a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt 
b/Documentation/devicetree/bindings/usb/mtu3.txt
similarity index 95%
rename from Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
rename to Documentation/devicetree/bindings/usb/mtu3.txt
index 1d7c3bc..832741d 100644
--- a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
+++ b/Documentation/devicetree/bindings/usb/mtu3.txt
@@ -1,7 +1,9 @@
 The device node for Mediatek USB3.0 DRD controller
 
 Required properties:
- - compatible : should be "mediatek,mt8173-mtu3"
+ - compatible : should be one of
+   "mediatek,mt8173-mtu3" (deprecated, use "mediatek,mtu3" instead),
+   "mediatek,mtu3"
  - reg : specifies physical base address and size of the registers
  - reg-names: should be "mac" for device IP and "ippc" for IP port control
  - interrupts : interrupt used by the device IP
@@ -44,7 +46,7 @@ Optional properties:
 Sub-nodes:
 The xhci should be added as subnode to mtu3 as shown in the following example
 if host mode is enabled. The DT binding details of xhci can be found in:
-Documentation/devicetree/bindings/usb/mt8173-xhci.txt
+Documentation/devicetree/bindings/usb/xhci-mtk.txt
 
 Example:
 ssusb: usb@11271000 {
-- 
1.7.9.5

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[PATCH 4/4] dt-bindings: mt8173-xhci: add generic compatible and rename file

[Chunfeng Yun]

The mt8173-xhci.txt actually holds the bindings for all mediatek
SoCs with xHCI controller, so add a generic compatible and change
the name to xhci-mtk.txt to reflect that.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 .../bindings/usb/{mt8173-xhci.txt => xhci-mtk.txt} |   10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)
 rename Documentation/devicetree/bindings/usb/{mt8173-xhci.txt => xhci-mtk.txt} 
(92%)

diff --git a/Documentation/devicetree/bindings/usb/mt8173-xhci.txt 
b/Documentation/devicetree/bindings/usb/xhci-mtk.txt
similarity index 92%
rename from Documentation/devicetree/bindings/usb/mt8173-xhci.txt
rename to Documentation/devicetree/bindings/usb/xhci-mtk.txt
index 0acfc8a..1ce77c7 100644
--- a/Documentation/devicetree/bindings/usb/mt8173-xhci.txt
+++ b/Documentation/devicetree/bindings/usb/xhci-mtk.txt
@@ -11,7 +11,9 @@ into two parts.
 
 
 Required properties:
- - compatible : should contain "mediatek,mt8173-xhci"
+ - compatible : should be one of
+   "mediatek,mt8173-xhci" (deprecated, use "mediatek,xhci-mtk" instead),
+   "mediatek,xhci-mtk"
  - reg : specifies physical base address and size of the registers
  - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control
  - interrupts : interrupt used by the controller
@@ -68,10 +70,12 @@ usb30: usb@1127 {
 
 In the case, xhci is added as subnode to mtu3. An example and the DT binding
 details of mtu3 can be found in:
-Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
+Documentation/devicetree/bindings/usb/mtu3.txt
 
 Required properties:
- - compatible : should contain "mediatek,mt8173-xhci"
+ - compatible : should be one of
+   "mediatek,mt8173-xhci" (deprecated, use "mediatek,xhci-mtk" instead),
+   "mediatek,xhci-mtk"
  - reg : specifies physical base address and size of the registers
  - reg-names: should be "mac" for xHCI MAC
  - interrupts : interrupt used by the host controller
-- 
1.7.9.5

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[PATCH 1/4] usb: mtu3: add generic compatible string

[Chunfeng Yun]

The mtu3 driver is a generic driver for MediaTek usb3 DRD IP, add
a generic compatible to avoid confusion when support new SoCs but
use a compatible with specific SoC's name "mt8173".

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/mtu3/mtu3_plat.c |1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/usb/mtu3/mtu3_plat.c b/drivers/usb/mtu3/mtu3_plat.c
index 0d3ebb3..088e3e6 100644
--- a/drivers/usb/mtu3/mtu3_plat.c
+++ b/drivers/usb/mtu3/mtu3_plat.c
@@ -500,6 +500,7 @@ static int __maybe_unused mtu3_resume(struct device *dev)
 
 static const struct of_device_id mtu3_of_match[] = {
{.compatible = "mediatek,mt8173-mtu3",},
+   {.compatible = "mediatek,mtu3",},
{},
 };
 
-- 
1.7.9.5

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[PATCH v2 3/4] phy: phy-mt65xx-usb3: add mediatek directory and rename file

[Chunfeng Yun]

The driver is actually for T-PHY which supports USB3.0, PCIe and SATA,
and supports more SoCs now, but not just only for series of mt65xx SoCs,
so the name of file, data struct, functions etc with 'mt65xx' may cause
misunderstanding when new SoCs are supported. Here rename them to reflect
the real functions and also enhance readability.

And also update MAINTAINERS file to reflect the correct driver

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 MAINTAINERS|   2 +-
 drivers/phy/Kconfig|   9 +-
 drivers/phy/Makefile   |   2 +-
 drivers/phy/mediatek/Kconfig   |  14 ++
 drivers/phy/mediatek/Makefile  |   5 +
 .../{phy-mt65xx-usb3.c => mediatek/phy-mtk-tphy.c} | 273 ++---
 6 files changed, 158 insertions(+), 147 deletions(-)
 create mode 100644 drivers/phy/mediatek/Kconfig
 create mode 100644 drivers/phy/mediatek/Makefile
 rename drivers/phy/{phy-mt65xx-usb3.c => mediatek/phy-mtk-tphy.c} (81%)

diff --git a/MAINTAINERS b/MAINTAINERS
index 205d397..428e5d0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1599,7 +1599,7 @@ M:    Chunfeng Yun <chunfeng@mediatek.com>
 L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
 L: linux-media...@lists.infradead.org (moderated for non-subscribers)
 S: Maintained
-F: drivers/phy/phy-mt65xx-usb3.c
+F: drivers/phy/mediatek/phy-mtk-tphy.c
 
 ARM/MICREL KS8695 ARCHITECTURE
 M: Greg Ungerer <g...@uclinux.org>
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index c1807d4..d16704e 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -26,14 +26,6 @@ config PHY_LPC18XX_USB_OTG
  This driver is need for USB0 support on LPC18xx/43xx and takes
  care of enabling and clock setup.
 
-config PHY_MT65XX_USB3
-   tristate "Mediatek USB3.0 PHY Driver"
-   depends on ARCH_MEDIATEK && OF
-   select GENERIC_PHY
-   help
- Say 'Y' here to add support for Mediatek USB3.0 PHY driver,
- it supports multiple usb2.0 and usb3.0 ports.
-
 config PHY_PISTACHIO_USB
tristate "IMG Pistachio USB2.0 PHY driver"
depends on MACH_PISTACHIO
@@ -53,6 +45,7 @@ source "drivers/phy/amlogic/Kconfig"
 source "drivers/phy/broadcom/Kconfig"
 source "drivers/phy/hisilicon/Kconfig"
 source "drivers/phy/marvell/Kconfig"
+source "drivers/phy/mediatek/Kconfig"
 source "drivers/phy/motorola/Kconfig"
 source "drivers/phy/qualcomm/Kconfig"
 source "drivers/phy/renesas/Kconfig"
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index f252201..1c68189 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -4,12 +4,12 @@
 
 obj-$(CONFIG_GENERIC_PHY)  += phy-core.o
 obj-$(CONFIG_PHY_LPC18XX_USB_OTG)  += phy-lpc18xx-usb-otg.o
-obj-$(CONFIG_PHY_MT65XX_USB3)  += phy-mt65xx-usb3.o
 obj-$(CONFIG_PHY_XGENE)+= phy-xgene.o
 obj-$(CONFIG_PHY_PISTACHIO_USB)+= phy-pistachio-usb.o
 
 obj-$(CONFIG_ARCH_SUNXI)   += allwinner/
 obj-$(CONFIG_ARCH_MESON)   += amlogic/
+obj-$(CONFIG_ARCH_MEDIATEK)+= mediatek/
 obj-$(CONFIG_ARCH_RENESAS) += renesas/
 obj-$(CONFIG_ARCH_ROCKCHIP)+= rockchip/
 obj-$(CONFIG_ARCH_TEGRA)   += tegra/
diff --git a/drivers/phy/mediatek/Kconfig b/drivers/phy/mediatek/Kconfig
new file mode 100644
index 000..be2a846
--- /dev/null
+++ b/drivers/phy/mediatek/Kconfig
@@ -0,0 +1,14 @@
+#
+# Phy drivers for MediaTek devices
+#
+config PHY_MTK_TPHY
+tristate "MediaTek T-PHY Driver"
+depends on ARCH_MEDIATEK && OF
+select GENERIC_PHY
+help
+  Enable this to add support for MediaTek T-PHY driver,
+  it supports physical layer functionality for usb2.0, usb3.0,
+  PCIe and SATA, and meanwhile supports two version T-PHY which
+  have different banks layout, the T-PHY with shared banks between
+  multi-ports is first version, otherwise is second veriosn,
+  so you can easily distinguish them by banks layout.
diff --git a/drivers/phy/mediatek/Makefile b/drivers/phy/mediatek/Makefile
new file mode 100644
index 000..763a92e
--- /dev/null
+++ b/drivers/phy/mediatek/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for the phy drivers.
+#
+
+obj-$(CONFIG_PHY_MTK_TPHY) += phy-mtk-tphy.o
diff --git a/drivers/phy/phy-mt65xx-usb3.c b/drivers/phy/mediatek/phy-mtk-tphy.c
similarity index 81%
rename from drivers/phy/phy-mt65xx-usb3.c
rename to drivers/phy/mediatek/phy-mtk-tphy.c
index 5e9a415..1ca7fe3 100644
--- a/drivers/phy/phy-mt65xx-usb3.c
+++ b/drivers/phy/mediatek/phy-mtk-tphy.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -38,7 +39,7 @@
 #define SSUSB_SIFSLV_V2

[PATCH v2 2/4] phy: phy-mt65xx-usb3: add SATA PHY support

[Chunfeng Yun]

From: Ryder Lee <ryder@mediatek.com>

This patch adds SATA setting part.

Signed-off-by: Ryder Lee <ryder@mediatek.com>
Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/phy/phy-mt65xx-usb3.c | 133 --
 1 file changed, 129 insertions(+), 4 deletions(-)

diff --git a/drivers/phy/phy-mt65xx-usb3.c b/drivers/phy/phy-mt65xx-usb3.c
index a9a85fa..5e9a415 100644
--- a/drivers/phy/phy-mt65xx-usb3.c
+++ b/drivers/phy/phy-mt65xx-usb3.c
@@ -29,7 +29,7 @@
 #define SSUSB_SIFSLV_V1_U2FREQ 0x100   /* shared by u2 phys */
 /* u2 phy bank */
 #define SSUSB_SIFSLV_V1_U2PHY_COM  0x000
-/* u3/pcie phy banks */
+/* u3/pcie/sata phy banks */
 #define SSUSB_SIFSLV_V1_U3PHYD 0x000
 #define SSUSB_SIFSLV_V1_U3PHYA 0x200
 
@@ -199,6 +199,65 @@
 #define U3P_SR_COEF_DIVISOR1000
 #define U3P_FM_DET_CYCLE_CNT   1024
 
+/* SATA register setting */
+#define PHYD_CTRL_SIGNAL_MODE4 0x1c
+/* CDR Charge Pump P-path current adjustment */
+#define RG_CDR_BICLTD1_GEN1_MSKGENMASK(23, 20)
+#define RG_CDR_BICLTD1_GEN1_VAL(x) ((0xf & (x)) << 20)
+#define RG_CDR_BICLTD0_GEN1_MSKGENMASK(11, 8)
+#define RG_CDR_BICLTD0_GEN1_VAL(x) ((0xf & (x)) << 8)
+
+#define PHYD_DESIGN_OPTION20x24
+/* Symbol lock count selection */
+#define RG_LOCK_CNT_SEL_MSKGENMASK(5, 4)
+#define RG_LOCK_CNT_SEL_VAL(x) ((0x3 & (x)) << 4)
+
+#define PHYD_DESIGN_OPTION90x40
+/* COMWAK GAP width window */
+#define RG_TG_MAX_MSK  GENMASK(20, 16)
+#define RG_TG_MAX_VAL(x)   ((0x1f & (x)) << 16)
+/* COMINIT GAP width window */
+#define RG_T2_MAX_MSK  GENMASK(13, 8)
+#define RG_T2_MAX_VAL(x)   ((0x3f & (x)) << 8)
+/* COMWAK GAP width window */
+#define RG_TG_MIN_MSK  GENMASK(7, 5)
+#define RG_TG_MIN_VAL(x)   ((0x7 & (x)) << 5)
+/* COMINIT GAP width window */
+#define RG_T2_MIN_MSK  GENMASK(4, 0)
+#define RG_T2_MIN_VAL(x)   (0x1f & (x))
+
+#define ANA_RG_CTRL_SIGNAL10x4c
+/* TX driver tail current control for 0dB de-empahsis mdoe for Gen1 speed */
+#define RG_IDRV_0DB_GEN1_MSK   GENMASK(13, 8)
+#define RG_IDRV_0DB_GEN1_VAL(x)((0x3f & (x)) << 8)
+
+#define ANA_RG_CTRL_SIGNAL40x58
+#define RG_CDR_BICLTR_GEN1_MSK GENMASK(23, 20)
+#define RG_CDR_BICLTR_GEN1_VAL(x)  ((0xf & (x)) << 20)
+/* Loop filter R1 resistance adjustment for Gen1 speed */
+#define RG_CDR_BR_GEN2_MSK GENMASK(10, 8)
+#define RG_CDR_BR_GEN2_VAL(x)  ((0x7 & (x)) << 8)
+
+#define ANA_RG_CTRL_SIGNAL60x60
+/* I-path capacitance adjustment for Gen1 */
+#define RG_CDR_BC_GEN1_MSK GENMASK(28, 24)
+#define RG_CDR_BC_GEN1_VAL(x)  ((0x1f & (x)) << 24)
+#define RG_CDR_BIRLTR_GEN1_MSK GENMASK(4, 0)
+#define RG_CDR_BIRLTR_GEN1_VAL(x)  (0x1f & (x))
+
+#define ANA_EQ_EYE_CTRL_SIGNAL10x6c
+/* RX Gen1 LEQ tuning step */
+#define RG_EQ_DLEQ_LFI_GEN1_MSKGENMASK(11, 8)
+#define RG_EQ_DLEQ_LFI_GEN1_VAL(x) ((0xf & (x)) << 8)
+
+#define ANA_EQ_EYE_CTRL_SIGNAL40xd8
+#define RG_CDR_BIRLTD0_GEN1_MSKGENMASK(20, 16)
+#define RG_CDR_BIRLTD0_GEN1_VAL(x) ((0x1f & (x)) << 16)
+
+#define ANA_EQ_EYE_CTRL_SIGNAL50xdc
+#define RG_CDR_BIRLTD0_GEN3_MSKGENMASK(4, 0)
+#define RG_CDR_BIRLTD0_GEN3_VAL(x) (0x1f & (x))
+
 enum mt_phy_version {
MT_PHY_V1 = 1,
MT_PHY_V2,
@@ -630,6 +689,64 @@ static void pcie_phy_instance_power_off(struct 
mt65xx_u3phy *u3phy,
writel(tmp, bank->chip + U3P_U3_CHIP_GPIO_CTLE);
 }
 
+static void sata_phy_instance_init(struct mt65xx_u3phy *u3phy,
+  struct mt65xx_phy_instance *instance)
+{
+   struct u3phy_banks *u3_banks = >u3_banks;
+   void __iomem *phyd = u3_banks->phyd;
+   u32 tmp;
+
+   /* charge current adjustment */
+   tmp = readl(phyd + ANA_RG_CTRL_SIGNAL6);
+   tmp &= ~(RG_CDR_BIRLTR_GEN1_MSK | RG_CDR_BC_GEN1_MSK);
+   tmp |= RG_CDR_BIRLTR_GEN1_VAL(0x6) | RG_CDR_BC_GEN1_VAL(0x1a);
+   writel(tmp, phyd + ANA_RG_CTRL_SIGNAL6);
+
+   tmp = readl(phyd + ANA_EQ_EYE_CTRL_SIGNAL4);
+   tmp &= ~RG_CDR_BIRLTD0_GEN1_MSK;
+   tmp |= RG_CDR_BIRLTD0_GEN1_VAL(0x18);
+   writel(tmp, phyd + ANA_EQ_EYE_CTRL_SIGNAL4);
+
+   tmp = readl(phyd + ANA_EQ_EYE_CTRL_SIGNAL5);
+   tmp &= ~RG_CDR_BIRLTD0_GEN3_MSK;
+   tmp |= RG_CDR_BIRLTD0_GEN3_VAL(0x06);
+   writel(tmp, phyd + ANA_EQ_EYE_CTRL_SIGNAL5);
+
+   tmp = readl(phyd + ANA_RG_CTRL_SIGNAL4);
+   tmp &= ~(RG_CDR_BICLTR_GEN1_MSK | RG_CDR_BR_GEN2_MSK);
+   tmp |= RG_CDR_BICLTR_GEN1_VAL(0x0c) | RG_CDR_BR_GEN2_VAL(0x07);
+   

[PATCH v2 1/4] phy: phy-mt65xx-usb3: add PCIe PHY support

[Chunfeng Yun]

From: Ryder Lee <ryder@mediatek.com>

This patch adds PCIe PHY setting part.

Signed-off-by: Ryder Lee <ryder@mediatek.com>
Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/phy/phy-mt65xx-usb3.c | 228 ++
 1 file changed, 206 insertions(+), 22 deletions(-)

diff --git a/drivers/phy/phy-mt65xx-usb3.c b/drivers/phy/phy-mt65xx-usb3.c
index 59b110f..a9a85fa 100644
--- a/drivers/phy/phy-mt65xx-usb3.c
+++ b/drivers/phy/phy-mt65xx-usb3.c
@@ -29,7 +29,7 @@
 #define SSUSB_SIFSLV_V1_U2FREQ 0x100   /* shared by u2 phys */
 /* u2 phy bank */
 #define SSUSB_SIFSLV_V1_U2PHY_COM  0x000
-/* u3 phy banks */
+/* u3/pcie phy banks */
 #define SSUSB_SIFSLV_V1_U3PHYD 0x000
 #define SSUSB_SIFSLV_V1_U3PHYA 0x200
 
@@ -99,6 +99,23 @@
 #define P2C_RG_SESSEND BIT(4)
 #define P2C_RG_AVALID  BIT(2)
 
+#define U3P_U3_CHIP_GPIO_CTLD  0x0c
+#define P3C_REG_IP_SW_RST  BIT(31)
+#define P3C_MCU_BUS_CK_GATE_EN BIT(30)
+#define P3C_FORCE_IP_SW_RSTBIT(29)
+
+#define U3P_U3_CHIP_GPIO_CTLE  0x10
+#define P3C_RG_SWRST_U3_PHYD   BIT(25)
+#define P3C_RG_SWRST_U3_PHYD_FORCE_EN  BIT(24)
+
+#define U3P_U3_PHYA_REG0   0x000
+#define P3A_RG_CLKDRV_OFF  GENMASK(3, 2)
+#define P3A_RG_CLKDRV_OFF_VAL(x)   ((0x3 & (x)) << 2)
+
+#define U3P_U3_PHYA_REG1   0x004
+#define P3A_RG_CLKDRV_AMP  GENMASK(31, 29)
+#define P3A_RG_CLKDRV_AMP_VAL(x)   ((0x7 & (x)) << 29)
+
 #define U3P_U3_PHYA_REG6   0x018
 #define P3A_RG_TX_EIDLE_CM GENMASK(31, 28)
 #define P3A_RG_TX_EIDLE_CM_VAL(x)  ((0xf & (x)) << 28)
@@ -108,9 +125,40 @@
 #define P3A_RG_RX_DAC_MUX_VAL(x)   ((0x1f & (x)) << 1)
 
 #define U3P_U3_PHYA_DA_REG00x100
+#define P3A_RG_XTAL_EXT_PE2H   GENMASK(17, 16)
+#define P3A_RG_XTAL_EXT_PE2H_VAL(x)((0x3 & (x)) << 16)
+#define P3A_RG_XTAL_EXT_PE1H   GENMASK(13, 12)
+#define P3A_RG_XTAL_EXT_PE1H_VAL(x)((0x3 & (x)) << 12)
 #define P3A_RG_XTAL_EXT_EN_U3  GENMASK(11, 10)
 #define P3A_RG_XTAL_EXT_EN_U3_VAL(x)   ((0x3 & (x)) << 10)
 
+#define U3P_U3_PHYA_DA_REG40x108
+#define P3A_RG_PLL_DIVEN_PE2H  GENMASK(21, 19)
+#define P3A_RG_PLL_BC_PE2H GENMASK(7, 6)
+#define P3A_RG_PLL_BC_PE2H_VAL(x)  ((0x3 & (x)) << 6)
+
+#define U3P_U3_PHYA_DA_REG50x10c
+#define P3A_RG_PLL_BR_PE2H GENMASK(29, 28)
+#define P3A_RG_PLL_BR_PE2H_VAL(x)  ((0x3 & (x)) << 28)
+#define P3A_RG_PLL_IC_PE2H GENMASK(15, 12)
+#define P3A_RG_PLL_IC_PE2H_VAL(x)  ((0xf & (x)) << 12)
+
+#define U3P_U3_PHYA_DA_REG60x110
+#define P3A_RG_PLL_IR_PE2H GENMASK(19, 16)
+#define P3A_RG_PLL_IR_PE2H_VAL(x)  ((0xf & (x)) << 16)
+
+#define U3P_U3_PHYA_DA_REG70x114
+#define P3A_RG_PLL_BP_PE2H GENMASK(19, 16)
+#define P3A_RG_PLL_BP_PE2H_VAL(x)  ((0xf & (x)) << 16)
+
+#define U3P_U3_PHYA_DA_REG20   0x13c
+#define P3A_RG_PLL_DELTA1_PE2H GENMASK(31, 16)
+#define P3A_RG_PLL_DELTA1_PE2H_VAL(x)  ((0x & (x)) << 16)
+
+#define U3P_U3_PHYA_DA_REG25   0x148
+#define P3A_RG_PLL_DELTA_PE2H  GENMASK(15, 0)
+#define P3A_RG_PLL_DELTA_PE2H_VAL(x)   (0x & (x))
+
 #define U3P_U3_PHYD_LFPS1  0x00c
 #define P3D_RG_FWAKE_THGENMASK(21, 16)
 #define P3D_RG_FWAKE_TH_VAL(x) ((0x3f & (x)) << 16)
@@ -322,8 +370,8 @@ static void u3_phy_instance_init(struct mt65xx_u3phy *u3phy,
dev_dbg(u3phy->dev, "%s(%d)\n", __func__, instance->index);
 }
 
-static void phy_instance_init(struct mt65xx_u3phy *u3phy,
-   struct mt65xx_phy_instance *instance)
+static void u2_phy_instance_init(struct mt65xx_u3phy *u3phy,
+struct mt65xx_phy_instance *instance)
 {
struct u2phy_banks *u2_banks = >u2_banks;
void __iomem *com = u2_banks->com;
@@ -384,8 +432,8 @@ static void phy_instance_init(struct mt65xx_u3phy *u3phy,
dev_dbg(u3phy->dev, "%s(%d)\n", __func__, index);
 }
 
-static void phy_instance_power_on(struct mt65xx_u3phy *u3phy,
-   struct mt65xx_phy_instance *instance)
+static void u2_phy_instance_power_on(struct mt65xx_u3phy *u3phy,
+struct mt65xx_phy_instance *instance)
 {
struct u2phy_banks *u2_banks = >u2_banks;
void __iomem *com = u2_banks->com;
@@ -420,8 +468,8 @@ static void phy_instance_power_on(struct mt65xx_u3phy 
*u3phy,
dev_dbg(u3phy->dev, "%s(%d)\n", __func__, index);
 }
 
-static void phy_instance_power_off(struct mt65xx_u3phy *u3phy,
-   struct mt65xx_phy_instance *instance)
+static void u2_phy_instance_power_off(struct mt65xx_u3phy *u3phy,
+ 

[PATCH v2 4/4] dt-bindings: phy-mt65xx-usb: supports PCIe, SATA and rename file

[Chunfeng Yun]

add support for PCIe and SATA, also add some new compatibles.

due to phy-mt65xx-usb.txt holds the bindings for all mediatek SoCs
with T-PHY controller, change the name to phy-mtk-tphy.txt to
reflect that.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 .../phy/{phy-mt65xx-usb.txt => phy-mtk-tphy.txt}| 17 -
 1 file changed, 12 insertions(+), 5 deletions(-)
 rename Documentation/devicetree/bindings/phy/{phy-mt65xx-usb.txt => 
phy-mtk-tphy.txt} (88%)

diff --git a/Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt 
b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
similarity index 88%
rename from Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt
rename to Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
index 0acc5a9..faf1808 100644
--- a/Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt
+++ b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
@@ -1,13 +1,18 @@
-mt65xx USB3.0 PHY binding
+MediaTek T-PHY binding
 --
 
-This binding describes a usb3.0 phy for mt65xx platforms of Medaitek SoC.
+T-phy controller supports physical layer functionality for a number of
+controllers on MediaTek SoCs, such as, USB2.0, USB3.0, PCIe, and SATA.
 
 Required properties (controller (parent) node):
  - compatible  : should be one of
- "mediatek,mt2701-u3phy"
- "mediatek,mt2712-u3phy"
- "mediatek,mt8173-u3phy"
+ "mediatek,generic-tphy-v1"
+ "mediatek,generic-tphy-v2"
+ "mediatek,mt2701-u3phy" (deprecated)
+ "mediatek,mt2712-u3phy" (deprecated)
+ "mediatek,mt8173-u3phy";
+ make use of "mediatek,generic-tphy-v1" on mt2701 instead and
+ "mediatek,generic-tphy-v2" on mt2712 instead.
  - clocks  : (deprecated, use port's clocks instead) a list of phandle +
  clock-specifier pairs, one for each entry in clock-names
  - clock-names : (deprecated, use port's one instead) must contain
@@ -35,6 +40,8 @@ Required properties (port (child) node):
  cell after port phandle is phy type from:
- PHY_TYPE_USB2
- PHY_TYPE_USB3
+   - PHY_TYPE_PCIE
+   - PHY_TYPE_SATA
 
 Example:
 
-- 
1.9.1

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Re: [PATCH 4/4] dt-bindings: phy-mt65xx-usb: supports PCIe, SATA and rename file

[Chunfeng Yun]

On Tue, 2017-08-08 at 17:44 +0530, Kishon Vijay Abraham I wrote:
> Chunfeng
> 
> On Thursday 03 August 2017 03:50 PM, Chunfeng Yun wrote:
> > hi,
> > 
> > I made a mistake, please ignore the patches with Change-Id, very sorry
> 
> No problem. However can you resend the series after fixing all checkpatch 
> warnings?
Ok
> 
> Thanks
> Kishon


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Re: [RFCv3 usb-next 2/3] usb: host: add a generic platform USB roothub driver

[Chunfeng Yun]

On Tue, 2017-08-15 at 00:45 +0200, Martin Blumenstingl wrote:
> Many SoC platforms have separate devices for the USB PHY which are
> registered through the generic PHY framework. These PHYs have to be
> enabled to make the USB controller actually work. They also have to be
> disabled again on shutdown/suspend.
> 
> Currently (at least) the following HCI platform drivers are using custom
> code to obtain all PHYs via devicetree for the roothub/controller and
> disable/enable them when required:
> - ehci-platform.c has ehci_platform_power_{on,off}
> - xhci-mtk.c has xhci_mtk_phy_{init,exit,power_on,power_off}
> - ohci-platform.c has ohci_platform_power_{on,off}
> 
> These drivers are not using the generic devicetree USB device bindings
> yet which were only introduced recently (documentation is available in
> devicetree/bindings/usb/usb-device.txt).
> With this new driver the usb2-phy and usb3-phy can be specified directly
> in the child-node of the corresponding port of the roothub via
> devicetree. This can be extended by not just parsing PHYs (some of the
> other drivers listed above are for example also parsing a list of clocks
> as well) when required.
> 
> Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com>
> ---
>  drivers/usb/host/Kconfig|   3 +
>  drivers/usb/host/Makefile   |   2 +
>  drivers/usb/host/platform-roothub.c | 180 
> 
>  drivers/usb/host/platform-roothub.h |  12 +++
>  4 files changed, 197 insertions(+)
>  create mode 100644 drivers/usb/host/platform-roothub.c
>  create mode 100644 drivers/usb/host/platform-roothub.h
> 

Tested-by: Chunfeng Yun<chunfeng@mediatek.com>


> diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
> index fa5692dec832..b8b05c786b2a 100644
> --- a/drivers/usb/host/Kconfig
> +++ b/drivers/usb/host/Kconfig
> @@ -805,6 +805,9 @@ config USB_HCD_SSB
>  
> If unsure, say N.
>  
> +config USB_PLATFORM_ROOTHUB
> + bool
> +
>  config USB_HCD_TEST_MODE
>   bool "HCD test mode support"
>   ---help---
> diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
> index cf2691fffcc0..dc817f82d632 100644
> --- a/drivers/usb/host/Makefile
> +++ b/drivers/usb/host/Makefile
> @@ -29,6 +29,8 @@ obj-$(CONFIG_USB_WHCI_HCD)  += whci/
>  
>  obj-$(CONFIG_USB_PCI)+= pci-quirks.o
>  
> +obj-$(CONFIG_USB_PLATFORM_ROOTHUB)   += platform-roothub.o
> +
>  obj-$(CONFIG_USB_EHCI_HCD)   += ehci-hcd.o
>  obj-$(CONFIG_USB_EHCI_PCI)   += ehci-pci.o
>  obj-$(CONFIG_USB_EHCI_HCD_PLATFORM)  += ehci-platform.o
> diff --git a/drivers/usb/host/platform-roothub.c 
> b/drivers/usb/host/platform-roothub.c
> new file mode 100644
> index ..70d2d97aa8b2
> --- /dev/null
> +++ b/drivers/usb/host/platform-roothub.c
> @@ -0,0 +1,180 @@
[...]


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Re: [PATCH v2 2/4] usb: xhci-mtk: add generic compatible string

[Chunfeng Yun]

Hi, Mathias

On Wed, 2017-08-16 at 14:08 +0800, Chunfeng Yun wrote:
> The xhci-mtk driver is a generic driver for MediaTek xHCI IP, add
> a generic compatible to avoid confusion when support new SoCs but
> use a compatible with specific SoC's name "mt8173".
> 
> Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
> ---
>  drivers/usb/host/xhci-mtk.c |1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
> index 67d5dc7..8fb6065 100644
> --- a/drivers/usb/host/xhci-mtk.c
> +++ b/drivers/usb/host/xhci-mtk.c
> @@ -795,6 +795,7 @@ static int __maybe_unused xhci_mtk_resume(struct device 
> *dev)
>  #ifdef CONFIG_OF
>  static const struct of_device_id mtk_xhci_of_match[] = {
>   { .compatible = "mediatek,mt8173-xhci"},
> + { .compatible = "mediatek,mtk-xhci"},
>   { },
>  };
>  MODULE_DEVICE_TABLE(of, mtk_xhci_of_match);

Do you have any comment about this patch?
Thanks.



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Re: [PATCH] usb: mtu3: cleanup with list_first_entry_or_null()

[Chunfeng Yun]

Hi,
On Sat, 2017-05-20 at 21:19 +0200, Greg Kroah-Hartman wrote:
> On Sun, May 21, 2017 at 02:05:31AM +0900, Masahiro Yamada wrote:
> > The combo of list_empty() and list_first_entry() can be replaced with
> > list_first_entry_or_null().
> > 
> > Signed-off-by: Masahiro Yamada 
> > ---
> > 
> >  drivers/usb/mtu3/mtu3.h | 8 ++--
> >  1 file changed, 2 insertions(+), 6 deletions(-)
> > 
> > diff --git a/drivers/usb/mtu3/mtu3.h b/drivers/usb/mtu3/mtu3.h
> > index aa6fd6a..7b6dc23 100644
> > --- a/drivers/usb/mtu3/mtu3.h
> > +++ b/drivers/usb/mtu3/mtu3.h
> > @@ -356,12 +356,8 @@ static inline struct mtu3_ep *to_mtu3_ep(struct usb_ep 
> > *ep)
> >  
> >  static inline struct mtu3_request *next_request(struct mtu3_ep *mep)
> >  {
> > -   struct list_head *queue = >req_list;
> > -
> > -   if (list_empty(queue))
> > -   return NULL;
> > -
> > -   return list_first_entry(queue, struct mtu3_request, list);
> > +   return list_first_entry_or_null(>req_list, struct mtu3_request,
> > +   list);
> 
> Even better, why is this an inlined function at all?  Why not just have
> it "open coded" everywhere it is used?
> 
This can avoid repeated function definition, currently it is used in
three files.

> thanks,
> 
> greg k-h


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[PATCH RESEND 2/2] phy: phy-mtk-tphy: add set_mode callback

[Chunfeng Yun]

This is used to force PHY with USB OTG function to enter a specific
mode, and override OTG IDPIN(or IDDIG) signal.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/phy/mediatek/phy-mtk-tphy.c |   39 +++
 1 file changed, 39 insertions(+)

diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c 
b/drivers/phy/mediatek/phy-mtk-tphy.c
index 721a2a1..402385f 100644
--- a/drivers/phy/mediatek/phy-mtk-tphy.c
+++ b/drivers/phy/mediatek/phy-mtk-tphy.c
@@ -96,9 +96,11 @@
 
 #define U3P_U2PHYDTM1  0x06C
 #define P2C_RG_UART_EN BIT(16)
+#define P2C_FORCE_IDDIGBIT(9)
 #define P2C_RG_VBUSVALID   BIT(5)
 #define P2C_RG_SESSEND BIT(4)
 #define P2C_RG_AVALID  BIT(2)
+#define P2C_RG_IDDIG   BIT(1)
 
 #define U3P_U3_CHIP_GPIO_CTLD  0x0c
 #define P3C_REG_IP_SW_RST  BIT(31)
@@ -585,6 +587,31 @@ static void u2_phy_instance_exit(struct mtk_tphy *tphy,
}
 }
 
+static void u2_phy_instance_set_mode(struct mtk_tphy *tphy,
+struct mtk_phy_instance *instance,
+enum phy_mode mode)
+{
+   struct u2phy_banks *u2_banks = >u2_banks;
+   u32 tmp;
+
+   tmp = readl(u2_banks->com + U3P_U2PHYDTM1);
+   switch (mode) {
+   case PHY_MODE_USB_DEVICE:
+   tmp |= P2C_FORCE_IDDIG | P2C_RG_IDDIG;
+   break;
+   case PHY_MODE_USB_HOST:
+   tmp |= P2C_FORCE_IDDIG;
+   tmp &= ~P2C_RG_IDDIG;
+   break;
+   case PHY_MODE_USB_OTG:
+   tmp &= ~(P2C_FORCE_IDDIG | P2C_RG_IDDIG);
+   break;
+   default:
+   return;
+   }
+   writel(tmp, u2_banks->com + U3P_U2PHYDTM1);
+}
+
 static void pcie_phy_instance_init(struct mtk_tphy *tphy,
struct mtk_phy_instance *instance)
 {
@@ -881,6 +908,17 @@ static int mtk_phy_exit(struct phy *phy)
return 0;
 }
 
+static int mtk_phy_set_mode(struct phy *phy, enum phy_mode mode)
+{
+   struct mtk_phy_instance *instance = phy_get_drvdata(phy);
+   struct mtk_tphy *tphy = dev_get_drvdata(phy->dev.parent);
+
+   if (instance->type == PHY_TYPE_USB2)
+   u2_phy_instance_set_mode(tphy, instance, mode);
+
+   return 0;
+}
+
 static struct phy *mtk_phy_xlate(struct device *dev,
struct of_phandle_args *args)
 {
@@ -931,6 +969,7 @@ static struct phy *mtk_phy_xlate(struct device *dev,
.exit   = mtk_phy_exit,
.power_on   = mtk_phy_power_on,
.power_off  = mtk_phy_power_off,
+   .set_mode   = mtk_phy_set_mode,
.owner  = THIS_MODULE,
 };
 
-- 
1.7.9.5

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[PATCH RESEND 1/2] phy: phy-mtk-tphy: fix NULL point of chip bank

[Chunfeng Yun]

Chip bank of version-1 is initialized as NULL, but it's used
by pcie_phy_instance_power_on/off(), so assign it a right
address.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/phy/mediatek/phy-mtk-tphy.c |3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c 
b/drivers/phy/mediatek/phy-mtk-tphy.c
index e3baad7..721a2a1 100644
--- a/drivers/phy/mediatek/phy-mtk-tphy.c
+++ b/drivers/phy/mediatek/phy-mtk-tphy.c
@@ -27,6 +27,7 @@
 /* banks shared by multiple phys */
 #define SSUSB_SIFSLV_V1_SPLLC  0x000   /* shared by u3 phys */
 #define SSUSB_SIFSLV_V1_U2FREQ 0x100   /* shared by u2 phys */
+#define SSUSB_SIFSLV_V1_CHIP   0x300   /* shared by u3 phys */
 /* u2 phy bank */
 #define SSUSB_SIFSLV_V1_U2PHY_COM  0x000
 /* u3/pcie/sata phy banks */
@@ -762,7 +763,7 @@ static void phy_v1_banks_init(struct mtk_tphy *tphy,
case PHY_TYPE_USB3:
case PHY_TYPE_PCIE:
u3_banks->spllc = tphy->sif_base + SSUSB_SIFSLV_V1_SPLLC;
-   u3_banks->chip = NULL;
+   u3_banks->chip = tphy->sif_base + SSUSB_SIFSLV_V1_CHIP;
u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD;
u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V1_U3PHYA;
break;
-- 
1.7.9.5

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Re: [PATCH RESEND 1/2] phy: phy-mtk-tphy: fix NULL point of chip bank

[Chunfeng Yun]

On Thu, 2017-09-21 at 16:23 +0530, Kishon Vijay Abraham I wrote:
> 
> On Thursday 21 September 2017 04:01 PM, Chunfeng Yun wrote:
> > Chip bank of version-1 is initialized as NULL, but it's used
> > by pcie_phy_instance_power_on/off(), so assign it a right
> > address.
> 
> merged. How was this not noticed before?

The PCIe function was tested on mt2712 with tphy-v2, and didn't notice
this issue until tested it on mt7622 with tphy-v1.

Ashamed of myself for making such a rookie mistake.
> 
> Thanks
> Kishon
> > 
> > Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
> > ---
> >  drivers/phy/mediatek/phy-mtk-tphy.c |3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c 
> > b/drivers/phy/mediatek/phy-mtk-tphy.c
> > index e3baad7..721a2a1 100644
> > --- a/drivers/phy/mediatek/phy-mtk-tphy.c
> > +++ b/drivers/phy/mediatek/phy-mtk-tphy.c
> > @@ -27,6 +27,7 @@
> >  /* banks shared by multiple phys */
> >  #define SSUSB_SIFSLV_V1_SPLLC  0x000   /* shared by u3 phys */
> >  #define SSUSB_SIFSLV_V1_U2FREQ 0x100   /* shared by u2 phys */
> > +#define SSUSB_SIFSLV_V1_CHIP   0x300   /* shared by u3 phys */
> >  /* u2 phy bank */
> >  #define SSUSB_SIFSLV_V1_U2PHY_COM  0x000
> >  /* u3/pcie/sata phy banks */
> > @@ -762,7 +763,7 @@ static void phy_v1_banks_init(struct mtk_tphy *tphy,
> > case PHY_TYPE_USB3:
> > case PHY_TYPE_PCIE:
> > u3_banks->spllc = tphy->sif_base + SSUSB_SIFSLV_V1_SPLLC;
> > -   u3_banks->chip = NULL;
> > +   u3_banks->chip = tphy->sif_base + SSUSB_SIFSLV_V1_CHIP;
> > u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD;
> > u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V1_U3PHYA;
> > break;
> > 


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Re: [PATCH v2 7/9] usb: host: modify description for MTK xHCI config

[Chunfeng Yun]

On Fri, 2017-10-13 at 13:32 +0300, Mathias Nyman wrote:
> On 13.10.2017 11:26, Chunfeng Yun wrote:
> > Due to all MediaTek SoCs with xHCI host controller use this
> > driver, remove limitation for specific SoCs
> >
> > Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
> > ---
> 
> xHCI parts of series look good to me, If Rob Herring agrees with the
> dt changes I can send it forward
Thanks a lot
> 
> -Mathias
> 


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Re: [balbi-usb:testing/next 34/43] drivers/usb/mtu3/mtu3_qmu.c:261:2: note: in expansion of macro 'dev_dbg'

[Chunfeng Yun]

On Tue, 2017-10-17 at 12:37 +0300, Felipe Balbi wrote:
> Hi,
> 
> kbuild test robot  writes:
> > tree:   https://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git 
> > testing/next
> > head:   39325b9a22301178ef684effade7c8bce04b5246
> > commit: 8706b37e87e58cd4d4dea593767d34447321610a [34/43] usb: mtu3: support 
> > 36-bit DMA address
> > config: xtensa-allyesconfig (attached as .config)
> > compiler: xtensa-linux-gcc (GCC) 4.9.0
> > reproduce:
> > wget 
> > https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
> > ~/bin/make.cross
> > chmod +x ~/bin/make.cross
> > git checkout 8706b37e87e58cd4d4dea593767d34447321610a
> > # save the attached .config to linux build tree
> > make.cross ARCH=xtensa 
> >
> > All warnings (new ones prefixed by >>):
> >
> >In file included from include/linux/printk.h:329:0,
> > from include/linux/kernel.h:13,
> > from include/asm-generic/bug.h:15,
> > from ./arch/xtensa/include/generated/asm/bug.h:1,
> > from include/linux/bug.h:4,
> > from include/linux/scatterlist.h:6,
> > from include/linux/dmapool.h:14,
> > from drivers/usb/mtu3/mtu3_qmu.c:30:
> >drivers/usb/mtu3/mtu3_qmu.c: In function 'mtu3_prepare_tx_gpd':
> >include/linux/dynamic_debug.h:74:16: warning: format '%llx' expects 
> > argument of type 'long long unsigned int', but argument 7 has type 
> > 'dma_addr_t' [-Wformat=]
> >  static struct _ddebug  __aligned(8)   \
> >^
> >include/linux/dynamic_debug.h:110:2: note: in expansion of macro 
> > 'DEFINE_DYNAMIC_DEBUG_METADATA_KEY'
> >  DEFINE_DYNAMIC_DEBUG_METADATA_KEY(name, fmt, 0, 0)
> >  ^
> >include/linux/dynamic_debug.h:132:2: note: in expansion of macro 
> > 'DEFINE_DYNAMIC_DEBUG_METADATA'
> >  DEFINE_DYNAMIC_DEBUG_METADATA(descriptor, fmt);  \
> >  ^
> >include/linux/device.h:1351:2: note: in expansion of macro 
> > 'dynamic_dev_dbg'
> >  dynamic_dev_dbg(dev, format, ##__VA_ARGS__); \
> >  ^
> >>> drivers/usb/mtu3/mtu3_qmu.c:261:2: note: in expansion of macro 'dev_dbg'
> >  dev_dbg(mep->mtu->dev, "TX-EP%d queue gpd=%p, enq=%p, qdma=%llx\n",
> >  ^
> 
> fixed it myself. Changed to %pad.
Thank you
> 


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Re: [balbi-usb:testing/next 34/43] drivers/usb/mtu3/mtu3_qmu.c:261:2: note: in expansion of macro 'dev_dbg'

[Chunfeng Yun]

On Tue, 2017-10-17 at 12:37 +0300, Felipe Balbi wrote:
> Hi,
> 
> kbuild test robot  writes:
> > tree:   https://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git 
> > testing/next
> > head:   39325b9a22301178ef684effade7c8bce04b5246
> > commit: 8706b37e87e58cd4d4dea593767d34447321610a [34/43] usb: mtu3: support 
> > 36-bit DMA address
> > config: xtensa-allyesconfig (attached as .config)
> > compiler: xtensa-linux-gcc (GCC) 4.9.0
> > reproduce:
> > wget 
> > https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
> > ~/bin/make.cross
> > chmod +x ~/bin/make.cross
> > git checkout 8706b37e87e58cd4d4dea593767d34447321610a
> > # save the attached .config to linux build tree
> > make.cross ARCH=xtensa 
> >
> > All warnings (new ones prefixed by >>):
> >
> >In file included from include/linux/printk.h:329:0,
> > from include/linux/kernel.h:13,
> > from include/asm-generic/bug.h:15,
> > from ./arch/xtensa/include/generated/asm/bug.h:1,
> > from include/linux/bug.h:4,
> > from include/linux/scatterlist.h:6,
> > from include/linux/dmapool.h:14,
> > from drivers/usb/mtu3/mtu3_qmu.c:30:
> >drivers/usb/mtu3/mtu3_qmu.c: In function 'mtu3_prepare_tx_gpd':
> >include/linux/dynamic_debug.h:74:16: warning: format '%llx' expects 
> > argument of type 'long long unsigned int', but argument 7 has type 
> > 'dma_addr_t' [-Wformat=]
> >  static struct _ddebug  __aligned(8)   \
> >^
> >include/linux/dynamic_debug.h:110:2: note: in expansion of macro 
> > 'DEFINE_DYNAMIC_DEBUG_METADATA_KEY'
> >  DEFINE_DYNAMIC_DEBUG_METADATA_KEY(name, fmt, 0, 0)
> >  ^
> >include/linux/dynamic_debug.h:132:2: note: in expansion of macro 
> > 'DEFINE_DYNAMIC_DEBUG_METADATA'
> >  DEFINE_DYNAMIC_DEBUG_METADATA(descriptor, fmt);  \
> >  ^
> >include/linux/device.h:1351:2: note: in expansion of macro 
> > 'dynamic_dev_dbg'
> >  dynamic_dev_dbg(dev, format, ##__VA_ARGS__); \
> >  ^
> >>> drivers/usb/mtu3/mtu3_qmu.c:261:2: note: in expansion of macro 'dev_dbg'
> >  dev_dbg(mep->mtu->dev, "TX-EP%d queue gpd=%p, enq=%p, qdma=%llx\n",
> >  ^
> 
> fixed it myself. Changed to %pad.
 > 261  dev_dbg(mep->mtu->dev, "TX-EP%d queue gpd=%p, enq=%p,
qdma=%llx\n",
   262  mep->epnum, gpd, enq, enq_dma);
 ^

Need add '&' before enq_dam ?
> 


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[PATCH v2 6/9] usb: xhci-mtk: add optional mcu and dma bus clocks

[Chunfeng Yun]

There are mcu_bus and dma_bus clocks needed to be controlled by
driver on some SoCs, so add them as optional ones

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/host/xhci-mtk.c |   79 ---
 drivers/usb/host/xhci-mtk.h |2 ++
 2 files changed, 62 insertions(+), 19 deletions(-)

diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index d60463c..e5caabe 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -221,6 +221,44 @@ static int xhci_mtk_ssusb_config(struct xhci_hcd_mtk *mtk)
return xhci_mtk_host_enable(mtk);
 }
 
+/* ignore the error if the clock does not exist */
+static struct clk *optional_clk_get(struct device *dev, const char *id)
+{
+   struct clk *opt_clk;
+
+   opt_clk = devm_clk_get(dev, id);
+   /* ignore error number except EPROBE_DEFER */
+   if (IS_ERR(opt_clk) && (PTR_ERR(opt_clk) != -EPROBE_DEFER))
+   opt_clk = NULL;
+
+   return opt_clk;
+}
+
+static int xhci_mtk_clks_get(struct xhci_hcd_mtk *mtk)
+{
+   struct device *dev = mtk->dev;
+
+   mtk->sys_clk = devm_clk_get(dev, "sys_ck");
+   if (IS_ERR(mtk->sys_clk)) {
+   dev_err(dev, "fail to get sys_ck\n");
+   return PTR_ERR(mtk->sys_clk);
+   }
+
+   mtk->ref_clk = optional_clk_get(dev, "ref_ck");
+   if (IS_ERR(mtk->ref_clk))
+   return PTR_ERR(mtk->ref_clk);
+
+   mtk->mcu_clk = optional_clk_get(dev, "mcu_ck");
+   if (IS_ERR(mtk->mcu_clk))
+   return PTR_ERR(mtk->mcu_clk);
+
+   mtk->dma_clk = optional_clk_get(dev, "dma_ck");
+   if (IS_ERR(mtk->dma_clk))
+   return PTR_ERR(mtk->dma_clk);
+
+   return 0;
+}
+
 static int xhci_mtk_clks_enable(struct xhci_hcd_mtk *mtk)
 {
int ret;
@@ -237,16 +275,34 @@ static int xhci_mtk_clks_enable(struct xhci_hcd_mtk *mtk)
goto sys_clk_err;
}
 
+   ret = clk_prepare_enable(mtk->mcu_clk);
+   if (ret) {
+   dev_err(mtk->dev, "failed to enable mcu_clk\n");
+   goto mcu_clk_err;
+   }
+
+   ret = clk_prepare_enable(mtk->dma_clk);
+   if (ret) {
+   dev_err(mtk->dev, "failed to enable dma_clk\n");
+   goto dma_clk_err;
+   }
+
return 0;
 
+dma_clk_err:
+   clk_disable_unprepare(mtk->mcu_clk);
+mcu_clk_err:
+   clk_disable_unprepare(mtk->sys_clk);
 sys_clk_err:
clk_disable_unprepare(mtk->ref_clk);
 ref_clk_err:
-   return -EINVAL;
+   return ret;
 }
 
 static void xhci_mtk_clks_disable(struct xhci_hcd_mtk *mtk)
 {
+   clk_disable_unprepare(mtk->dma_clk);
+   clk_disable_unprepare(mtk->mcu_clk);
clk_disable_unprepare(mtk->sys_clk);
clk_disable_unprepare(mtk->ref_clk);
 }
@@ -529,24 +585,9 @@ static int xhci_mtk_probe(struct platform_device *pdev)
return PTR_ERR(mtk->vusb33);
}
 
-   mtk->sys_clk = devm_clk_get(dev, "sys_ck");
-   if (IS_ERR(mtk->sys_clk)) {
-   dev_err(dev, "fail to get sys_ck\n");
-   return PTR_ERR(mtk->sys_clk);
-   }
-
-   /*
-* reference clock is usually a "fixed-clock", make it optional
-* for backward compatibility and ignore the error if it does
-* not exist.
-*/
-   mtk->ref_clk = devm_clk_get(dev, "ref_ck");
-   if (IS_ERR(mtk->ref_clk)) {
-   if (PTR_ERR(mtk->ref_clk) == -EPROBE_DEFER)
-   return -EPROBE_DEFER;
-
-   mtk->ref_clk = NULL;
-   }
+   ret = xhci_mtk_clks_get(mtk);
+   if (ret)
+   return ret;
 
mtk->lpm_support = of_property_read_bool(node, "usb3-lpm-capable");
/* optional property, ignore the error if it does not exist */
diff --git a/drivers/usb/host/xhci-mtk.h b/drivers/usb/host/xhci-mtk.h
index 67783a7..45ff5c6 100644
--- a/drivers/usb/host/xhci-mtk.h
+++ b/drivers/usb/host/xhci-mtk.h
@@ -126,6 +126,8 @@ struct xhci_hcd_mtk {
struct regulator *vbus;
struct clk *sys_clk;/* sys and mac clock */
struct clk *ref_clk;
+   struct clk *mcu_clk;
+   struct clk *dma_clk;
struct regmap *pericfg;
struct phy **phys;
int num_phys;
-- 
1.7.9.5

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[PATCH v2 1/9] usb: xhci-mtk: use dma_set_mask_and_coherent() in probe function

[Chunfeng Yun]

This patch uses the simpler dma_set_mask_and_coherent() instead of
doing these as separate steps

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/host/xhci-mtk.c |7 +--
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index 8fb6065..c197a6d 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -606,15 +606,10 @@ static int xhci_mtk_probe(struct platform_device *pdev)
}
 
/* Initialize dma_mask and coherent_dma_mask to 32-bits */
-   ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
+   ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
if (ret)
goto disable_clk;
 
-   if (!dev->dma_mask)
-   dev->dma_mask = >coherent_dma_mask;
-   else
-   dma_set_mask(dev, DMA_BIT_MASK(32));
-
hcd = usb_create_hcd(driver, dev, dev_name(dev));
if (!hcd) {
ret = -ENOMEM;
-- 
1.7.9.5

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[PATCH v2 3/9] usb: xhci-mtk: check clock stability of U3_MAC

[Chunfeng Yun]

This is useful to find out the root cause when the Super Speed doesn't
work. Such as when the T-PHY is switched to PCIe or SATA, and affects
Super Speed function, the check will fail.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/host/xhci-mtk.c |4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index 9502ca4..7a92bb7 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -43,6 +43,7 @@
 
 /* ip_pw_sts1 register */
 #define STS1_IP_SLEEP_STS  BIT(30)
+#define STS1_U3_MAC_RSTBIT(16)
 #define STS1_XHCI_RST  BIT(11)
 #define STS1_SYS125_RSTBIT(10)
 #define STS1_REF_RST   BIT(8)
@@ -125,6 +126,9 @@ static int xhci_mtk_host_enable(struct xhci_hcd_mtk *mtk)
check_val = STS1_SYSPLL_STABLE | STS1_REF_RST |
STS1_SYS125_RST | STS1_XHCI_RST;
 
+   if (mtk->num_u3_ports)
+   check_val |= STS1_U3_MAC_RST;
+
ret = readl_poll_timeout(>ip_pw_sts1, value,
  (check_val == (value & check_val)), 100, 2);
if (ret) {
-- 
1.7.9.5

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[PATCH v2 9/9] dt-bindings: usb: mtk-xhci: remove dummy clocks and add optional ones

[Chunfeng Yun]

Remove dummy clocks for usb wakeup and add optional ones for
MCU_BUS_CK and DMA_BUS_CK.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
Acked-by: Rob Herring <r...@kernel.org>
---
 .../devicetree/bindings/usb/mediatek,mtk-xhci.txt  |   18 --
 1 file changed, 8 insertions(+), 10 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt 
b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
index 2d9b459..3059596 100644
--- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
@@ -26,10 +26,11 @@ Required properties:
  - clocks : a list of phandle + clock-specifier pairs, one for each
entry in clock-names
  - clock-names : must contain
-   "sys_ck": for clock of xHCI MAC
-   "ref_ck": for reference clock of xHCI MAC
-   "wakeup_deb_p0": for USB wakeup debounce clock of port0
-   "wakeup_deb_p1": for USB wakeup debounce clock of port1
+   "sys_ck": controller clock used by normal mode,
+   the following ones are optional:
+   "ref_ck": reference clock used by low power mode etc,
+   "mcu_ck": mcu_bus clock for register access,
+   "dma_ck": dma_bus clock for data transfer by DMA
 
  - phys : a list of phandle + phy specifier pairs
 
@@ -57,9 +58,7 @@ usb30: usb@1127 {
clocks = < CLK_TOP_USB30_SEL>, <>,
 < CLK_PERI_USB0>,
 < CLK_PERI_USB1>;
-   clock-names = "sys_ck", "ref_ck",
- "wakeup_deb_p0",
- "wakeup_deb_p1";
+   clock-names = "sys_ck", "ref_ck";
phys = <_port0 PHY_TYPE_USB3>,
   <_port1 PHY_TYPE_USB2>;
vusb33-supply = <_vusb_reg>;
@@ -91,9 +90,8 @@ Required properties:
 
  - clocks : a list of phandle + clock-specifier pairs, one for each
entry in clock-names
- - clock-names : must be
-   "sys_ck": for clock of xHCI MAC
-   "ref_ck": for reference clock of xHCI MAC
+ - clock-names : must contain "sys_ck", and the following ones are optional:
+   "ref_ck", "mcu_ck" and "dma_ck"
 
 Optional properties:
  - vbus-supply : reference to the VBUS regulator;
-- 
1.7.9.5

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[PATCH v2 5/9] usb: xhci-mtk: remove dummy wakeup debounce clocks

[Chunfeng Yun]

The wakeup debounce clocks for each ports in fact are not
needed, so remove them.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/host/xhci-mtk.c |   33 -
 drivers/usb/host/xhci-mtk.h |2 --
 2 files changed, 35 deletions(-)

diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index 97ba51e..d60463c 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -237,25 +237,8 @@ static int xhci_mtk_clks_enable(struct xhci_hcd_mtk *mtk)
goto sys_clk_err;
}
 
-   if (mtk->wakeup_src) {
-   ret = clk_prepare_enable(mtk->wk_deb_p0);
-   if (ret) {
-   dev_err(mtk->dev, "failed to enable wk_deb_p0\n");
-   goto usb_p0_err;
-   }
-
-   ret = clk_prepare_enable(mtk->wk_deb_p1);
-   if (ret) {
-   dev_err(mtk->dev, "failed to enable wk_deb_p1\n");
-   goto usb_p1_err;
-   }
-   }
return 0;
 
-usb_p1_err:
-   clk_disable_unprepare(mtk->wk_deb_p0);
-usb_p0_err:
-   clk_disable_unprepare(mtk->sys_clk);
 sys_clk_err:
clk_disable_unprepare(mtk->ref_clk);
 ref_clk_err:
@@ -264,10 +247,6 @@ static int xhci_mtk_clks_enable(struct xhci_hcd_mtk *mtk)
 
 static void xhci_mtk_clks_disable(struct xhci_hcd_mtk *mtk)
 {
-   if (mtk->wakeup_src) {
-   clk_disable_unprepare(mtk->wk_deb_p1);
-   clk_disable_unprepare(mtk->wk_deb_p0);
-   }
clk_disable_unprepare(mtk->sys_clk);
clk_disable_unprepare(mtk->ref_clk);
 }
@@ -371,18 +350,6 @@ static int usb_wakeup_of_property_parse(struct 
xhci_hcd_mtk *mtk,
if (!mtk->wakeup_src)
return 0;
 
-   mtk->wk_deb_p0 = devm_clk_get(dev, "wakeup_deb_p0");
-   if (IS_ERR(mtk->wk_deb_p0)) {
-   dev_err(dev, "fail to get wakeup_deb_p0\n");
-   return PTR_ERR(mtk->wk_deb_p0);
-   }
-
-   mtk->wk_deb_p1 = devm_clk_get(dev, "wakeup_deb_p1");
-   if (IS_ERR(mtk->wk_deb_p1)) {
-   dev_err(dev, "fail to get wakeup_deb_p1\n");
-   return PTR_ERR(mtk->wk_deb_p1);
-   }
-
mtk->pericfg = syscon_regmap_lookup_by_phandle(dn,
"mediatek,syscon-wakeup");
if (IS_ERR(mtk->pericfg)) {
diff --git a/drivers/usb/host/xhci-mtk.h b/drivers/usb/host/xhci-mtk.h
index db55a12..67783a7 100644
--- a/drivers/usb/host/xhci-mtk.h
+++ b/drivers/usb/host/xhci-mtk.h
@@ -126,8 +126,6 @@ struct xhci_hcd_mtk {
struct regulator *vbus;
struct clk *sys_clk;/* sys and mac clock */
struct clk *ref_clk;
-   struct clk *wk_deb_p0;  /* port0's wakeup debounce clock */
-   struct clk *wk_deb_p1;
struct regmap *pericfg;
struct phy **phys;
int num_phys;
-- 
1.7.9.5

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[PATCH v2 2/9] usb: xhci-mtk: use ports count from xhci in xhci_mtk_sch_init()

[Chunfeng Yun]

Make use of ports count from xhci but not from ippc in
xhci_mtk_sch_init()

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/host/xhci-mtk-sch.c |3 ++-
 drivers/usb/host/xhci-mtk.c |3 ---
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/host/xhci-mtk-sch.c b/drivers/usb/host/xhci-mtk-sch.c
index 6e7ddf6..bfc51bc 100644
--- a/drivers/usb/host/xhci-mtk-sch.c
+++ b/drivers/usb/host/xhci-mtk-sch.c
@@ -287,12 +287,13 @@ static bool need_bw_sch(struct usb_host_endpoint *ep,
 
 int xhci_mtk_sch_init(struct xhci_hcd_mtk *mtk)
 {
+   struct xhci_hcd *xhci = hcd_to_xhci(mtk->hcd);
struct mu3h_sch_bw_info *sch_array;
int num_usb_bus;
int i;
 
/* ss IN and OUT are separated */
-   num_usb_bus = mtk->num_u3_ports * 2 + mtk->num_u2_ports;
+   num_usb_bus = xhci->num_usb3_ports * 2 + xhci->num_usb2_ports;
 
sch_array = kcalloc(num_usb_bus, sizeof(*sch_array), GFP_KERNEL);
if (sch_array == NULL)
diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index c197a6d..9502ca4 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -492,7 +492,6 @@ static void xhci_mtk_quirks(struct device *dev, struct 
xhci_hcd *xhci)
 /* called during probe() after chip reset completes */
 static int xhci_mtk_setup(struct usb_hcd *hcd)
 {
-   struct xhci_hcd *xhci = hcd_to_xhci(hcd);
struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
int ret;
 
@@ -507,8 +506,6 @@ static int xhci_mtk_setup(struct usb_hcd *hcd)
return ret;
 
if (usb_hcd_is_primary_hcd(hcd)) {
-   mtk->num_u3_ports = xhci->num_usb3_ports;
-   mtk->num_u2_ports = xhci->num_usb2_ports;
ret = xhci_mtk_sch_init(mtk);
if (ret)
return ret;
-- 
1.7.9.5

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[PATCH v2 4/9] usb: xhci-mtk: support option to disable usb3 ports

[Chunfeng Yun]

Add support to disable specific usb3 ports, it's useful when
usb3 phy is shared with PCIe or SATA, because we should disable
the corresponding usb3 port if the phy is used by PCIe or SATA.
Sometimes it's helpful to analyse and solve problems.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/host/xhci-mtk.c |   18 +++---
 drivers/usb/host/xhci-mtk.h |1 +
 2 files changed, 16 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index 7a92bb7..97ba51e 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -92,6 +92,7 @@ static int xhci_mtk_host_enable(struct xhci_hcd_mtk *mtk)
 {
struct mu3c_ippc_regs __iomem *ippc = mtk->ippc_regs;
u32 value, check_val;
+   int u3_ports_disabed = 0;
int ret;
int i;
 
@@ -103,8 +104,13 @@ static int xhci_mtk_host_enable(struct xhci_hcd_mtk *mtk)
value &= ~CTRL1_IP_HOST_PDN;
writel(value, >ip_pw_ctr1);
 
-   /* power on and enable all u3 ports */
+   /* power on and enable u3 ports except skipped ones */
for (i = 0; i < mtk->num_u3_ports; i++) {
+   if ((0x1 << i) & mtk->u3p_dis_msk) {
+   u3_ports_disabed++;
+   continue;
+   }
+
value = readl(>u3_ctrl_p[i]);
value &= ~(CTRL_U3_PORT_PDN | CTRL_U3_PORT_DIS);
value |= CTRL_U3_PORT_HOST_SEL;
@@ -126,7 +132,7 @@ static int xhci_mtk_host_enable(struct xhci_hcd_mtk *mtk)
check_val = STS1_SYSPLL_STABLE | STS1_REF_RST |
STS1_SYS125_RST | STS1_XHCI_RST;
 
-   if (mtk->num_u3_ports)
+   if (mtk->num_u3_ports > u3_ports_disabed)
check_val |= STS1_U3_MAC_RST;
 
ret = readl_poll_timeout(>ip_pw_sts1, value,
@@ -149,8 +155,11 @@ static int xhci_mtk_host_disable(struct xhci_hcd_mtk *mtk)
if (!mtk->has_ippc)
return 0;
 
-   /* power down all u3 ports */
+   /* power down u3 ports except skipped ones */
for (i = 0; i < mtk->num_u3_ports; i++) {
+   if ((0x1 << i) & mtk->u3p_dis_msk)
+   continue;
+
value = readl(>u3_ctrl_p[i]);
value |= CTRL_U3_PORT_PDN;
writel(value, >u3_ctrl_p[i]);
@@ -573,6 +582,9 @@ static int xhci_mtk_probe(struct platform_device *pdev)
}
 
mtk->lpm_support = of_property_read_bool(node, "usb3-lpm-capable");
+   /* optional property, ignore the error if it does not exist */
+   of_property_read_u32(node, "mediatek,u3p-dis-msk",
+>u3p_dis_msk);
 
ret = usb_wakeup_of_property_parse(mtk, node);
if (ret)
diff --git a/drivers/usb/host/xhci-mtk.h b/drivers/usb/host/xhci-mtk.h
index 3aa5e1d..db55a12 100644
--- a/drivers/usb/host/xhci-mtk.h
+++ b/drivers/usb/host/xhci-mtk.h
@@ -121,6 +121,7 @@ struct xhci_hcd_mtk {
bool has_ippc;
int num_u2_ports;
int num_u3_ports;
+   int u3p_dis_msk;
struct regulator *vusb33;
struct regulator *vbus;
struct clk *sys_clk;/* sys and mac clock */
-- 
1.7.9.5

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[PATCH v2 8/9] dt-bindings: usb: mtk-xhci: add a optional property to disable u3ports

[Chunfeng Yun]

Add a new optional property to disable u3ports

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 .../devicetree/bindings/usb/mediatek,mtk-xhci.txt  |2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt 
b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
index 5611a2e..2d9b459 100644
--- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
@@ -38,6 +38,8 @@ Optional properties:
mode;
  - mediatek,syscon-wakeup : phandle to syscon used to access USB wakeup
control register, it depends on "mediatek,wakeup-src".
+ - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
+   bit1 for u3port1, ... etc;
  - vbus-supply : reference to the VBUS regulator;
  - usb3-lpm-capable : supports USB3.0 LPM
  - pinctrl-names : a pinctrl state named "default" must be defined
-- 
1.7.9.5

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[PATCH v2 7/9] usb: host: modify description for MTK xHCI config

[Chunfeng Yun]

Due to all MediaTek SoCs with xHCI host controller use this
driver, remove limitation for specific SoCs

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/host/Kconfig |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index fa5692d..bc09a2e 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -45,12 +45,12 @@ config USB_XHCI_PLATFORM
  If unsure, say N.
 
 config USB_XHCI_MTK
-   tristate "xHCI support for Mediatek MT65xx/MT7621"
+   tristate "xHCI support for MediaTek SoCs"
select MFD_SYSCON
depends on (MIPS && SOC_MT7621) || ARCH_MEDIATEK || COMPILE_TEST
---help---
  Say 'Y' to enable the support for the xHCI host controller
- found in Mediatek MT65xx SoCs.
+ found in MediaTek SoCs.
  If unsure, say N.
 
 config USB_XHCI_MVEBU
-- 
1.7.9.5

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[PATCH v2 12/13] dt-bindings: usb: mtu3: remove dummy clocks and add optional ones

[Chunfeng Yun]

Remove dummy clocks for usb wakeup and add optional ones for
mcu_bus and dma_bus bus.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 .../devicetree/bindings/usb/mediatek,mtu3.txt  |   10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt 
b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
index 7c611d1..49c982b 100644
--- a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
@@ -14,9 +14,9 @@ Required properties:
  - vusb33-supply : regulator of USB avdd3.3v
  - clocks : a list of phandle + clock-specifier pairs, one for each
entry in clock-names
- - clock-names : must contain "sys_ck" and "ref_ck" for clock of controller;
-   "wakeup_deb_p0" and "wakeup_deb_p1" are optional, they are
-   depends on "mediatek,enable-wakeup"
+ - clock-names : must contain "sys_ck" for clock of controller,
+   the following clocks are optional:
+   "ref_ck", "mcu_ck" and "dam_ck";
  - phys : a list of phandle + phy specifier pairs
  - dr_mode : should be one of "host", "peripheral" or "otg",
refer to usb/generic.txt
@@ -65,9 +65,7 @@ ssusb: usb@11271000 {
clocks = < CLK_TOP_USB30_SEL>, <>,
 < CLK_PERI_USB0>,
 < CLK_PERI_USB1>;
-   clock-names = "sys_ck", "ref_ck",
- "wakeup_deb_p0",
- "wakeup_deb_p1";
+   clock-names = "sys_ck", "ref_ck";
vusb33-supply = <_vusb_reg>;
vbus-supply = <_p0_vbus>;
extcon = <_usb>;
-- 
1.7.9.5

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[PATCH v2 11/13] dt-bindings: usb: mtu3: add a optional property to disable u3ports

[Chunfeng Yun]

Add a new optional property to disable u3ports

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 .../devicetree/bindings/usb/mediatek,mtu3.txt  |2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt 
b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
index 49f5476..7c611d1 100644
--- a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
@@ -44,6 +44,8 @@ Optional properties:
  - mediatek,enable-wakeup : supports ip sleep wakeup used by host mode
  - mediatek,syscon-wakeup : phandle to syscon used to access USB wakeup
control register, it depends on "mediatek,enable-wakeup".
+ - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
+   bit1 for u3port1, ... etc;
 
 Sub-nodes:
 The xhci should be added as subnode to mtu3 as shown in the following example
-- 
1.7.9.5

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[PATCH v2 05/13] usb: mtu3: support 36-bit DMA address

[Chunfeng Yun]

add support for 36-bit DMA address

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/mtu3/mtu3.h |   17 ++-
 drivers/usb/mtu3/mtu3_core.c|   34 -
 drivers/usb/mtu3/mtu3_hw_regs.h |   10 
 drivers/usb/mtu3/mtu3_qmu.c |  102 ---
 4 files changed, 142 insertions(+), 21 deletions(-)

diff --git a/drivers/usb/mtu3/mtu3.h b/drivers/usb/mtu3/mtu3.h
index 2795294..ef2dc92 100644
--- a/drivers/usb/mtu3/mtu3.h
+++ b/drivers/usb/mtu3/mtu3.h
@@ -46,6 +46,9 @@
 #defineMU3D_EP_RXCR1(epnum)(U3D_RX1CSR1 + (((epnum) - 1) * 0x10))
 #defineMU3D_EP_RXCR2(epnum)(U3D_RX1CSR2 + (((epnum) - 1) * 0x10))
 
+#define USB_QMU_TQHIAR(epnum)  (U3D_TXQHIAR1 + (((epnum) - 1) * 0x4))
+#define USB_QMU_RQHIAR(epnum)  (U3D_RXQHIAR1 + (((epnum) - 1) * 0x4))
+
 #define USB_QMU_RQCSR(epnum)   (U3D_RXQCSR1 + (((epnum) - 1) * 0x10))
 #define USB_QMU_RQSAR(epnum)   (U3D_RXQSAR1 + (((epnum) - 1) * 0x10))
 #define USB_QMU_RQCPR(epnum)   (U3D_RXQCPR1 + (((epnum) - 1) * 0x10))
@@ -138,23 +141,33 @@ struct mtu3_fifo_info {
  * Checksum value is calculated over the 16 bytes of the GPD by default;
  * @data_buf_len (RX ONLY): This value indicates the length of
  * the assigned data buffer
+ * @tx_ext_addr (TX ONLY): [3:0] are 4 extension bits of @buffer,
+ * [7:4] are 4 extension bits of @next_gpd
  * @next_gpd: Physical address of the next GPD
  * @buffer: Physical address of the data buffer
  * @buf_len:
  * (TX): This value indicates the length of the assigned data buffer
  * (RX): The total length of data received
  * @ext_len: reserved
+ * @rx_ext_addr(RX ONLY): [3:0] are 4 extension bits of @buffer,
+ * [7:4] are 4 extension bits of @next_gpd
  * @ext_flag:
  * bit5 (TX ONLY): Zero Length Packet (ZLP),
  */
 struct qmu_gpd {
__u8 flag;
__u8 chksum;
-   __le16 data_buf_len;
+   union {
+   __le16 data_buf_len;
+   __le16 tx_ext_addr;
+   };
__le32 next_gpd;
__le32 buffer;
__le16 buf_len;
-   __u8 ext_len;
+   union {
+   __u8 ext_len;
+   __u8 rx_ext_addr;
+   };
__u8 ext_flag;
 } __packed;
 
diff --git a/drivers/usb/mtu3/mtu3_core.c b/drivers/usb/mtu3/mtu3_core.c
index 9475798..cd4528f 100644
--- a/drivers/usb/mtu3/mtu3_core.c
+++ b/drivers/usb/mtu3/mtu3_core.c
@@ -17,6 +17,7 @@
  *
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -759,7 +760,31 @@ static void mtu3_hw_exit(struct mtu3 *mtu)
mtu3_mem_free(mtu);
 }
 
-/*-*/
+/**
+ * we set 32-bit DMA mask by default, here check whether the controller
+ * supports 36-bit DMA or not, if it does, set 36-bit DMA mask.
+ */
+static int mtu3_set_dma_mask(struct mtu3 *mtu)
+{
+   struct device *dev = mtu->dev;
+   bool is_36bit = false;
+   int ret = 0;
+   u32 value;
+
+   value = mtu3_readl(mtu->mac_base, U3D_MISC_CTRL);
+   if (value & DMA_ADDR_36BIT) {
+   is_36bit = true;
+   ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(36));
+   /* If set 36-bit DMA mask fails, fall back to 32-bit DMA mask */
+   if (ret) {
+   is_36bit = false;
+   ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
+   }
+   }
+   dev_info(dev, "dma mask: %s bits\n", is_36bit ? "36" : "32");
+
+   return ret;
+}
 
 int ssusb_gadget_init(struct ssusb_mtk *ssusb)
 {
@@ -820,6 +845,12 @@ int ssusb_gadget_init(struct ssusb_mtk *ssusb)
return ret;
}
 
+   ret = mtu3_set_dma_mask(mtu);
+   if (ret) {
+   dev_err(dev, "mtu3 set dma_mask failed:%d\n", ret);
+   goto dma_mask_err;
+   }
+
ret = devm_request_irq(dev, mtu->irq, mtu3_irq, 0, dev_name(dev), mtu);
if (ret) {
dev_err(dev, "request irq %d failed!\n", mtu->irq);
@@ -845,6 +876,7 @@ int ssusb_gadget_init(struct ssusb_mtk *ssusb)
 gadget_err:
device_init_wakeup(dev, false);
 
+dma_mask_err:
 irq_err:
mtu3_hw_exit(mtu);
ssusb->u3d = NULL;
diff --git a/drivers/usb/mtu3/mtu3_hw_regs.h b/drivers/usb/mtu3/mtu3_hw_regs.h
index 06b2966..b605975 100644
--- a/drivers/usb/mtu3/mtu3_hw_regs.h
+++ b/drivers/usb/mtu3/mtu3_hw_regs.h
@@ -58,6 +58,8 @@
 #define U3D_QCR1   (SSUSB_DEV_BASE + 0x0404)
 #define U3D_QCR2   (SSUSB_DEV_BASE + 0x0408)
 #define U3D_QCR3   (SSUSB_DEV_BASE + 0x040C)
+#define U3D_TXQHIAR1   (SSUSB_DEV_BASE + 0x0484)
+#define U3D_RXQHIAR1   (SSUSB_DEV_BASE + 0x04C4)
 
 #define U3D_TXQCSR1(SSUSB_DEV_BASE + 0x0510)
 #define U3D_TXQSAR1(SSUSB_DEV_BASE + 0x0514)
@@ -189,6 +191,13 @@
 #define QMU_RX_COZ(x)  (BIT(16)

[PATCH v2 06/13] usb: mtu3: use FORCE/RG_IDDIG to implement manual DRD switch

[Chunfeng Yun]

In order to keep manual DRD switch independent on IDDIG interrupt,
make use of FORCE/RG_IDDIG instead of IDDIG EINT interrupt to
implement manual DRD switch function.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/mtu3/mtu3.h |   18 
 drivers/usb/mtu3/mtu3_dr.c  |   61 +--
 drivers/usb/mtu3/mtu3_dr.h  |6 
 drivers/usb/mtu3/mtu3_host.c|5 
 drivers/usb/mtu3/mtu3_hw_regs.h |2 ++
 drivers/usb/mtu3/mtu3_plat.c|   38 ++--
 6 files changed, 74 insertions(+), 56 deletions(-)

diff --git a/drivers/usb/mtu3/mtu3.h b/drivers/usb/mtu3/mtu3.h
index ef2dc92..b0c2b5d 100644
--- a/drivers/usb/mtu3/mtu3.h
+++ b/drivers/usb/mtu3/mtu3.h
@@ -115,6 +115,19 @@ enum mtu3_g_ep0_state {
 };
 
 /**
+ * MTU3_DR_FORCE_NONE: automatically switch host and periperal mode
+ * by IDPIN signal.
+ * MTU3_DR_FORCE_HOST: force to enter host mode and override OTG
+ * IDPIN signal.
+ * MTU3_DR_FORCE_DEVICE: force to enter peripheral mode.
+ */
+enum mtu3_dr_force_mode {
+   MTU3_DR_FORCE_NONE = 0,
+   MTU3_DR_FORCE_HOST,
+   MTU3_DR_FORCE_DEVICE,
+};
+
+/**
  * @base: the base address of fifo
  * @limit: the bitmap size in bits
  * @bitmap: fifo bitmap in unit of @MTU3_EP_FIFO_UNIT
@@ -196,7 +209,6 @@ struct mtu3_gpd_ring {
 *  xHCI driver initialization, it's necessary for system bootup
 *  as device.
 * @is_u3_drd: whether port0 supports usb3.0 dual-role device or not
-* @id_*: used to maually switch between host and device modes by idpin
 * @manual_drd_enabled: it's true when supports dual-role device by debugfs
 *  to switch host/device modes depending on user input.
 */
@@ -207,10 +219,6 @@ struct otg_switch_mtk {
struct notifier_block id_nb;
struct delayed_work extcon_reg_dwork;
bool is_u3_drd;
-   /* dual-role switch by debugfs */
-   struct pinctrl *id_pinctrl;
-   struct pinctrl_state *id_float;
-   struct pinctrl_state *id_ground;
bool manual_drd_enabled;
 };
 
diff --git a/drivers/usb/mtu3/mtu3_dr.c b/drivers/usb/mtu3/mtu3_dr.c
index 5602561..ec442cd 100644
--- a/drivers/usb/mtu3/mtu3_dr.c
+++ b/drivers/usb/mtu3/mtu3_dr.c
@@ -261,21 +261,22 @@ static void extcon_register_dwork(struct work_struct 
*work)
  * depending on user input.
  * This is useful in special cases, such as uses TYPE-A receptacle but also
  * wants to support dual-role mode.
- * It generates cable state changes by pulling up/down IDPIN and
- * notifies driver to switch mode by "extcon-usb-gpio".
- * NOTE: when use MICRO receptacle, should not enable this interface.
  */
 static void ssusb_mode_manual_switch(struct ssusb_mtk *ssusb, int to_host)
 {
struct otg_switch_mtk *otg_sx = >otg_switch;
 
-   if (to_host)
-   pinctrl_select_state(otg_sx->id_pinctrl, otg_sx->id_ground);
-   else
-   pinctrl_select_state(otg_sx->id_pinctrl, otg_sx->id_float);
+   if (to_host) {
+   ssusb_set_force_mode(ssusb, MTU3_DR_FORCE_HOST);
+   ssusb_set_mailbox(otg_sx, MTU3_VBUS_OFF);
+   ssusb_set_mailbox(otg_sx, MTU3_ID_GROUND);
+   } else {
+   ssusb_set_force_mode(ssusb, MTU3_DR_FORCE_DEVICE);
+   ssusb_set_mailbox(otg_sx, MTU3_ID_FLOAT);
+   ssusb_set_mailbox(otg_sx, MTU3_VBUS_VALID);
+   }
 }
 
-
 static int ssusb_mode_show(struct seq_file *sf, void *unused)
 {
struct ssusb_mtk *ssusb = sf->private;
@@ -388,17 +389,45 @@ static void ssusb_debugfs_exit(struct ssusb_mtk *ssusb)
debugfs_remove_recursive(ssusb->dbgfs_root);
 }
 
+void ssusb_set_force_mode(struct ssusb_mtk *ssusb,
+ enum mtu3_dr_force_mode mode)
+{
+   u32 value;
+
+   value = mtu3_readl(ssusb->ippc_base, SSUSB_U2_CTRL(0));
+   switch (mode) {
+   case MTU3_DR_FORCE_DEVICE:
+   value |= SSUSB_U2_PORT_FORCE_IDDIG | SSUSB_U2_PORT_RG_IDDIG;
+   break;
+   case MTU3_DR_FORCE_HOST:
+   value |= SSUSB_U2_PORT_FORCE_IDDIG;
+   value &= ~SSUSB_U2_PORT_RG_IDDIG;
+   break;
+   case MTU3_DR_FORCE_NONE:
+   value &= ~(SSUSB_U2_PORT_FORCE_IDDIG | SSUSB_U2_PORT_RG_IDDIG);
+   break;
+   default:
+   return;
+   }
+   mtu3_writel(ssusb->ippc_base, SSUSB_U2_CTRL(0), value);
+}
+
 int ssusb_otg_switch_init(struct ssusb_mtk *ssusb)
 {
struct otg_switch_mtk *otg_sx = >otg_switch;
 
-   INIT_DELAYED_WORK(_sx->extcon_reg_dwork, extcon_register_dwork);
-
-   if (otg_sx->manual_drd_enabled)
+   if (otg_sx->manual_drd_enabled) {
ssusb_debugfs_init(ssusb);
-
-   /* It is enough to delay 1s for waiting for host initialization */
-   schedule_delayed_work(_sx->extcon_reg_dwork, HZ);
+ 

[PATCH v2 10/13] usb: mtu3: set otg_sel for u2port only if works as dual-role mode

[Chunfeng Yun]

When set otg_sel(SSUSB_U2_PORT_OTG_SEL) for u2port which supports
dual-role mode, the controller will automatically switch mode
between host and device according to IDDIG signal. But if the
u2port only supports device mode, and no IDDIG pin is provided,
setting otg_sel may cause failure of detection by host.
So set it only for dual-role mode.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/mtu3/mtu3_core.c |9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/mtu3/mtu3_core.c b/drivers/usb/mtu3/mtu3_core.c
index 67f7a30..7c149a7 100644
--- a/drivers/usb/mtu3/mtu3_core.c
+++ b/drivers/usb/mtu3/mtu3_core.c
@@ -115,7 +115,9 @@ static int mtu3_device_enable(struct mtu3 *mtu)
mtu3_clrbits(ibase, SSUSB_U2_CTRL(0),
(SSUSB_U2_PORT_DIS | SSUSB_U2_PORT_PDN |
SSUSB_U2_PORT_HOST_SEL));
-   mtu3_setbits(ibase, SSUSB_U2_CTRL(0), SSUSB_U2_PORT_OTG_SEL);
+
+   if (mtu->ssusb->dr_mode == USB_DR_MODE_OTG)
+   mtu3_setbits(ibase, SSUSB_U2_CTRL(0), SSUSB_U2_PORT_OTG_SEL);
 
return ssusb_check_clocks(mtu->ssusb, check_clk);
 }
@@ -130,7 +132,10 @@ static void mtu3_device_disable(struct mtu3 *mtu)
 
mtu3_setbits(ibase, SSUSB_U2_CTRL(0),
SSUSB_U2_PORT_DIS | SSUSB_U2_PORT_PDN);
-   mtu3_clrbits(ibase, SSUSB_U2_CTRL(0), SSUSB_U2_PORT_OTG_SEL);
+
+   if (mtu->ssusb->dr_mode == USB_DR_MODE_OTG)
+   mtu3_clrbits(ibase, SSUSB_U2_CTRL(0), SSUSB_U2_PORT_OTG_SEL);
+
mtu3_setbits(ibase, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN);
 }
 
-- 
1.7.9.5

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[PATCH v2 07/13] usb: mtu3: add support for usb3.1 IP

[Chunfeng Yun]

Support SuperSpeedPlus for usb3.1 device IP

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/mtu3/mtu3.h|1 +
 drivers/usb/mtu3/mtu3_core.c   |   14 +++---
 drivers/usb/mtu3/mtu3_gadget.c |3 ++-
 drivers/usb/mtu3/mtu3_gadget_ep0.c |   16 
 drivers/usb/mtu3/mtu3_hw_regs.h|1 +
 5 files changed, 23 insertions(+), 12 deletions(-)

diff --git a/drivers/usb/mtu3/mtu3.h b/drivers/usb/mtu3/mtu3.h
index b0c2b5d..d80e4e8 100644
--- a/drivers/usb/mtu3/mtu3.h
+++ b/drivers/usb/mtu3/mtu3.h
@@ -94,6 +94,7 @@ enum mtu3_speed {
MTU3_SPEED_FULL = 1,
MTU3_SPEED_HIGH = 3,
MTU3_SPEED_SUPER = 4,
+   MTU3_SPEED_SUPER_PLUS = 5,
 };
 
 /**
diff --git a/drivers/usb/mtu3/mtu3_core.c b/drivers/usb/mtu3/mtu3_core.c
index cd4528f..67f7a30 100644
--- a/drivers/usb/mtu3/mtu3_core.c
+++ b/drivers/usb/mtu3/mtu3_core.c
@@ -237,7 +237,7 @@ void mtu3_ep_stall_set(struct mtu3_ep *mep, bool set)
 
 void mtu3_dev_on_off(struct mtu3 *mtu, int is_on)
 {
-   if (mtu->is_u3_ip && (mtu->max_speed == USB_SPEED_SUPER))
+   if (mtu->is_u3_ip && mtu->max_speed >= USB_SPEED_SUPER)
mtu3_ss_func_set(mtu, is_on);
else
mtu3_hs_softconn_set(mtu, is_on);
@@ -547,6 +547,9 @@ static void mtu3_set_speed(struct mtu3 *mtu)
mtu3_clrbits(mbase, U3D_USB3_CONFIG, USB3_EN);
/* HS/FS detected by HW */
mtu3_setbits(mbase, U3D_POWER_MANAGEMENT, HS_ENABLE);
+   } else if (mtu->max_speed == USB_SPEED_SUPER) {
+   mtu3_clrbits(mtu->ippc_base, SSUSB_U3_CTRL(0),
+SSUSB_U3_PORT_SSP_SPEED);
}
 
dev_info(mtu->dev, "max_speed: %s\n",
@@ -624,6 +627,10 @@ static irqreturn_t mtu3_link_isr(struct mtu3 *mtu)
udev_speed = USB_SPEED_SUPER;
maxpkt = 512;
break;
+   case MTU3_SPEED_SUPER_PLUS:
+   udev_speed = USB_SPEED_SUPER_PLUS;
+   maxpkt = 512;
+   break;
default:
udev_speed = USB_SPEED_UNKNOWN;
break;
@@ -825,14 +832,15 @@ int ssusb_gadget_init(struct ssusb_mtk *ssusb)
case USB_SPEED_FULL:
case USB_SPEED_HIGH:
case USB_SPEED_SUPER:
+   case USB_SPEED_SUPER_PLUS:
break;
default:
dev_err(dev, "invalid max_speed: %s\n",
usb_speed_string(mtu->max_speed));
/* fall through */
case USB_SPEED_UNKNOWN:
-   /* default as SS */
-   mtu->max_speed = USB_SPEED_SUPER;
+   /* default as SSP */
+   mtu->max_speed = USB_SPEED_SUPER_PLUS;
break;
}
 
diff --git a/drivers/usb/mtu3/mtu3_gadget.c b/drivers/usb/mtu3/mtu3_gadget.c
index 434fca5..b495471 100644
--- a/drivers/usb/mtu3/mtu3_gadget.c
+++ b/drivers/usb/mtu3/mtu3_gadget.c
@@ -89,6 +89,7 @@ static int mtu3_ep_enable(struct mtu3_ep *mep)
 
switch (mtu->g.speed) {
case USB_SPEED_SUPER:
+   case USB_SPEED_SUPER_PLUS:
if (usb_endpoint_xfer_int(desc) ||
usb_endpoint_xfer_isoc(desc)) {
interval = desc->bInterval;
@@ -456,7 +457,7 @@ static int mtu3_gadget_wakeup(struct usb_gadget *gadget)
return  -EOPNOTSUPP;
 
spin_lock_irqsave(>lock, flags);
-   if (mtu->g.speed == USB_SPEED_SUPER) {
+   if (mtu->g.speed >= USB_SPEED_SUPER) {
mtu3_setbits(mtu->mac_base, U3D_LINK_POWER_CONTROL, UX_EXIT);
} else {
mtu3_setbits(mtu->mac_base, U3D_POWER_MANAGEMENT, RESUME);
diff --git a/drivers/usb/mtu3/mtu3_gadget_ep0.c 
b/drivers/usb/mtu3/mtu3_gadget_ep0.c
index 958d74d..020b253 100644
--- a/drivers/usb/mtu3/mtu3_gadget_ep0.c
+++ b/drivers/usb/mtu3/mtu3_gadget_ep0.c
@@ -212,8 +212,8 @@ static int ep0_set_sel(struct mtu3 *mtu, struct 
usb_ctrlrequest *setup)
case USB_RECIP_DEVICE:
result[0] = mtu->is_self_powered << USB_DEVICE_SELF_POWERED;
result[0] |= mtu->may_wakeup << USB_DEVICE_REMOTE_WAKEUP;
-   /* superspeed only */
-   if (mtu->g.speed == USB_SPEED_SUPER) {
+
+   if (mtu->g.speed >= USB_SPEED_SUPER) {
result[0] |= mtu->u1_enable << USB_DEV_STAT_U1_ENABLED;
result[0] |= mtu->u2_enable << USB_DEV_STAT_U2_ENABLED;
}
@@ -329,8 +329,8 @@ static int ep0_handle_feature_dev(struct mtu3 *mtu,
handled = handle_test_mode(mtu, setup);
break;
case USB_DEVICE_U1_ENABLE:
-   if (mtu->g.speed != USB_SPEED_SUPER ||
-   mtu->g.state != USB_STATE_CONFIGURED)
+   if (mtu->g.spe

[PATCH v2 13/13] dt-bindings: usb: mtu3: remove optional pinctrls

[Chunfeng Yun]

Remove optional pinctrls due to using FORCE/RG_IDDIG to implement
manual switch function.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 .../devicetree/bindings/usb/mediatek,mtu3.txt  |7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt 
b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
index 49c982b..b2271d8 100644
--- a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
@@ -30,9 +30,10 @@ Optional properties:
when supports dual-role mode.
  - vbus-supply : reference to the VBUS regulator, needed when supports
dual-role mode.
- - pinctl-names : a pinctrl state named "default" must be defined,
-   "id_float" and "id_ground" are optinal which depends on
-   "mediatek,enable-manual-drd"
+ - pinctrl-names : a pinctrl state named "default" is optional, and need be
+   defined if auto drd switch is enabled, that means the property dr_mode
+   is set as "otg", and meanwhile the property "mediatek,enable-manual-drd"
+   is not set.
  - pinctrl-0 : pin control group
See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
 
-- 
1.7.9.5

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[PATCH v2 09/13] usb: mtu3: set invalid dr_mode as dual-role mode

[Chunfeng Yun]

Treat dr_mode of USB_DR_MODE_UNKNOWN as USB_DR_MODE_OTG to
enhance functional robustness.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/mtu3/mtu3_plat.c |6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/mtu3/mtu3_plat.c b/drivers/usb/mtu3/mtu3_plat.c
index 7ca81f4e..9ff3357 100644
--- a/drivers/usb/mtu3/mtu3_plat.c
+++ b/drivers/usb/mtu3/mtu3_plat.c
@@ -283,10 +283,8 @@ static int get_ssusb_rscs(struct platform_device *pdev, 
struct ssusb_mtk *ssusb)
return PTR_ERR(ssusb->ippc_base);
 
ssusb->dr_mode = usb_get_dr_mode(dev);
-   if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN) {
-   dev_err(dev, "dr_mode is error\n");
-   return -EINVAL;
-   }
+   if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN)
+   ssusb->dr_mode = USB_DR_MODE_OTG;
 
if (ssusb->dr_mode == USB_DR_MODE_PERIPHERAL)
return 0;
-- 
1.7.9.5

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[PATCH v2 08/13] usb: mtu3: get optional vbus for host only mode

[Chunfeng Yun]

When dr_mode is set as USB_DR_MODE_HOST, it's better to try to
get optional vbus, this can increase flexibility, although we
can set vbus as always on for regulator or put it in host driver
to turn it on.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/mtu3/mtu3_plat.c |8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/mtu3/mtu3_plat.c b/drivers/usb/mtu3/mtu3_plat.c
index 1e473b0..7ca81f4e 100644
--- a/drivers/usb/mtu3/mtu3_plat.c
+++ b/drivers/usb/mtu3/mtu3_plat.c
@@ -300,10 +300,6 @@ static int get_ssusb_rscs(struct platform_device *pdev, 
struct ssusb_mtk *ssusb)
of_property_read_u32(node, "mediatek,u3p-dis-msk",
 >u3p_dis_msk);
 
-   if (ssusb->dr_mode != USB_DR_MODE_OTG)
-   return 0;
-
-   /* if dual-role mode is supported */
vbus = devm_regulator_get(>dev, "vbus");
if (IS_ERR(vbus)) {
dev_err(dev, "failed to get vbus\n");
@@ -311,6 +307,10 @@ static int get_ssusb_rscs(struct platform_device *pdev, 
struct ssusb_mtk *ssusb)
}
otg_sx->vbus = vbus;
 
+   if (ssusb->dr_mode == USB_DR_MODE_HOST)
+   return 0;
+
+   /* if dual-role mode is supported */
otg_sx->is_u3_drd = of_property_read_bool(node, "mediatek,usb3-drd");
otg_sx->manual_drd_enabled =
of_property_read_bool(node, "enable-manual-drd");
-- 
1.7.9.5

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[PATCH v2 01/13] usb: mtu3: fix error return code in ssusb_gadget_init()

[Chunfeng Yun]

When failing to get IRQ number, platform_get_irq() may return
-EPROBE_DEFER, but we ignore it and always return -ENODEV,
so fix it.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/mtu3/mtu3_core.c |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/mtu3/mtu3_core.c b/drivers/usb/mtu3/mtu3_core.c
index 99c65b0..9475798 100644
--- a/drivers/usb/mtu3/mtu3_core.c
+++ b/drivers/usb/mtu3/mtu3_core.c
@@ -774,9 +774,9 @@ int ssusb_gadget_init(struct ssusb_mtk *ssusb)
return -ENOMEM;
 
mtu->irq = platform_get_irq(pdev, 0);
-   if (mtu->irq <= 0) {
+   if (mtu->irq < 0) {
dev_err(dev, "fail to get irq number\n");
-   return -ENODEV;
+   return mtu->irq;
}
dev_info(dev, "irq %d\n", mtu->irq);
 
-- 
1.7.9.5

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[PATCH v2 04/13] usb: mtu3: add optional mcu and dma bus clocks

[Chunfeng Yun]

There are mcu_bus and dma_bus clocks needed to be turned on/off by
driver on some SoCs, so add them as optional ones

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/mtu3/mtu3.h  |5 ++
 drivers/usb/mtu3/mtu3_plat.c |  121 --
 2 files changed, 86 insertions(+), 40 deletions(-)

diff --git a/drivers/usb/mtu3/mtu3.h b/drivers/usb/mtu3/mtu3.h
index 6d3278e..2795294 100644
--- a/drivers/usb/mtu3/mtu3.h
+++ b/drivers/usb/mtu3/mtu3.h
@@ -206,6 +206,9 @@ struct otg_switch_mtk {
  * @ippc_base: register base address of IP Power and Clock interface (IPPC)
  * @vusb33: usb3.3V shared by device/host IP
  * @sys_clk: system clock of mtu3, shared by device/host IP
+ * @ref_clk: reference clock
+ * @mcu_clk: mcu_bus_ck clock for AHB bus etc
+ * @dma_clk: dma_bus_ck clock for AXI bus etc
  * @dr_mode: works in which mode:
  * host only, device only or dual-role mode
  * @u2_ports: number of usb2.0 host ports
@@ -226,6 +229,8 @@ struct ssusb_mtk {
struct regulator *vusb33;
struct clk *sys_clk;
struct clk *ref_clk;
+   struct clk *mcu_clk;
+   struct clk *dma_clk;
/* otg */
struct otg_switch_mtk otg_switch;
enum usb_dr_mode dr_mode;
diff --git a/drivers/usb/mtu3/mtu3_plat.c b/drivers/usb/mtu3/mtu3_plat.c
index 9edad30..fb89920 100644
--- a/drivers/usb/mtu3/mtu3_plat.c
+++ b/drivers/usb/mtu3/mtu3_plat.c
@@ -110,15 +110,9 @@ static void ssusb_phy_power_off(struct ssusb_mtk *ssusb)
phy_power_off(ssusb->phys[i]);
 }
 
-static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
+static int ssusb_clks_enable(struct ssusb_mtk *ssusb)
 {
-   int ret = 0;
-
-   ret = regulator_enable(ssusb->vusb33);
-   if (ret) {
-   dev_err(ssusb->dev, "failed to enable vusb33\n");
-   goto vusb33_err;
-   }
+   int ret;
 
ret = clk_prepare_enable(ssusb->sys_clk);
if (ret) {
@@ -132,6 +126,52 @@ static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
goto ref_clk_err;
}
 
+   ret = clk_prepare_enable(ssusb->mcu_clk);
+   if (ret) {
+   dev_err(ssusb->dev, "failed to enable mcu_clk\n");
+   goto mcu_clk_err;
+   }
+
+   ret = clk_prepare_enable(ssusb->dma_clk);
+   if (ret) {
+   dev_err(ssusb->dev, "failed to enable dma_clk\n");
+   goto dma_clk_err;
+   }
+
+   return 0;
+
+dma_clk_err:
+   clk_disable_unprepare(ssusb->mcu_clk);
+mcu_clk_err:
+   clk_disable_unprepare(ssusb->ref_clk);
+ref_clk_err:
+   clk_disable_unprepare(ssusb->sys_clk);
+sys_clk_err:
+   return ret;
+}
+
+static void ssusb_clks_disable(struct ssusb_mtk *ssusb)
+{
+   clk_disable_unprepare(ssusb->dma_clk);
+   clk_disable_unprepare(ssusb->mcu_clk);
+   clk_disable_unprepare(ssusb->ref_clk);
+   clk_disable_unprepare(ssusb->sys_clk);
+}
+
+static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
+{
+   int ret = 0;
+
+   ret = regulator_enable(ssusb->vusb33);
+   if (ret) {
+   dev_err(ssusb->dev, "failed to enable vusb33\n");
+   goto vusb33_err;
+   }
+
+   ret = ssusb_clks_enable(ssusb);
+   if (ret)
+   goto clks_err;
+
ret = ssusb_phy_init(ssusb);
if (ret) {
dev_err(ssusb->dev, "failed to init phy\n");
@@ -149,20 +189,16 @@ static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
 phy_err:
ssusb_phy_exit(ssusb);
 phy_init_err:
-   clk_disable_unprepare(ssusb->ref_clk);
-ref_clk_err:
-   clk_disable_unprepare(ssusb->sys_clk);
-sys_clk_err:
+   ssusb_clks_disable(ssusb);
+clks_err:
regulator_disable(ssusb->vusb33);
 vusb33_err:
-
return ret;
 }
 
 static void ssusb_rscs_exit(struct ssusb_mtk *ssusb)
 {
-   clk_disable_unprepare(ssusb->sys_clk);
-   clk_disable_unprepare(ssusb->ref_clk);
+   ssusb_clks_disable(ssusb);
regulator_disable(ssusb->vusb33);
ssusb_phy_power_off(ssusb);
ssusb_phy_exit(ssusb);
@@ -203,6 +239,19 @@ static int get_iddig_pinctrl(struct ssusb_mtk *ssusb)
return 0;
 }
 
+/* ignore the error if the clock does not exist */
+static struct clk *get_optional_clk(struct device *dev, const char *id)
+{
+   struct clk *opt_clk;
+
+   opt_clk = devm_clk_get(dev, id);
+   /* ignore error number except EPROBE_DEFER */
+   if (IS_ERR(opt_clk) && (PTR_ERR(opt_clk) != -EPROBE_DEFER))
+   opt_clk = NULL;
+
+   return opt_clk;
+}
+
 static int get_ssusb_rscs(struct platform_device *pdev, struct ssusb_mtk 
*ssusb)
 {
struct device_node *node = pdev->dev.of_node;
@@ -225,18 +274,17 @@ static int get_ssusb_rscs(struct platform_device *pdev, 
struct ssusb_mtk *ssusb)
return PTR_ERR(ssusb->

[PATCH v2 02/13] usb: mtu3: support option to disable usb3 ports

[Chunfeng Yun]

Add support to disable specific usb3 ports, it's useful when
usb3 phy is shared with PCIe or SATA, because we should disable
the corresponding usb3 port if the phy is used by PCIe or SATA.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/mtu3/mtu3.h  |3 +++
 drivers/usb/mtu3/mtu3_host.c |   16 +---
 drivers/usb/mtu3/mtu3_plat.c |8 ++--
 3 files changed, 22 insertions(+), 5 deletions(-)

diff --git a/drivers/usb/mtu3/mtu3.h b/drivers/usb/mtu3/mtu3.h
index b26fffc..112723d 100644
--- a/drivers/usb/mtu3/mtu3.h
+++ b/drivers/usb/mtu3/mtu3.h
@@ -210,6 +210,8 @@ struct otg_switch_mtk {
  * host only, device only or dual-role mode
  * @u2_ports: number of usb2.0 host ports
  * @u3_ports: number of usb3.0 host ports
+ * @u3p_dis_msk: mask of disabling usb3 ports, for example, bit0==1 to
+ * disable u3port0, bit1==1 to disable u3port1,... etc
  * @dbgfs_root: only used when supports manual dual-role switch via debugfs
  * @wakeup_en: it's true when supports remote wakeup in host mode
  * @wk_deb_p0: port0's wakeup debounce clock
@@ -232,6 +234,7 @@ struct ssusb_mtk {
bool is_host;
int u2_ports;
int u3_ports;
+   int u3p_dis_msk;
struct dentry *dbgfs_root;
/* usb wakeup for host mode */
bool wakeup_en;
diff --git a/drivers/usb/mtu3/mtu3_host.c b/drivers/usb/mtu3/mtu3_host.c
index e42d308..4dd9508 100644
--- a/drivers/usb/mtu3/mtu3_host.c
+++ b/drivers/usb/mtu3/mtu3_host.c
@@ -151,6 +151,7 @@ int ssusb_host_enable(struct ssusb_mtk *ssusb)
void __iomem *ibase = ssusb->ippc_base;
int num_u3p = ssusb->u3_ports;
int num_u2p = ssusb->u2_ports;
+   int u3_ports_disabed;
u32 check_clk;
u32 value;
int i;
@@ -158,8 +159,14 @@ int ssusb_host_enable(struct ssusb_mtk *ssusb)
/* power on host ip */
mtu3_clrbits(ibase, U3D_SSUSB_IP_PW_CTRL1, SSUSB_IP_HOST_PDN);
 
-   /* power on and enable all u3 ports */
+   /* power on and enable u3 ports except skipped ones */
+   u3_ports_disabed = 0;
for (i = 0; i < num_u3p; i++) {
+   if ((0x1 << i) & ssusb->u3p_dis_msk) {
+   u3_ports_disabed++;
+   continue;
+   }
+
value = mtu3_readl(ibase, SSUSB_U3_CTRL(i));
value &= ~(SSUSB_U3_PORT_PDN | SSUSB_U3_PORT_DIS);
value |= SSUSB_U3_PORT_HOST_SEL;
@@ -175,7 +182,7 @@ int ssusb_host_enable(struct ssusb_mtk *ssusb)
}
 
check_clk = SSUSB_XHCI_RST_B_STS;
-   if (num_u3p)
+   if (num_u3p > u3_ports_disabed)
check_clk = SSUSB_U3_MAC_RST_B_STS;
 
return ssusb_check_clocks(ssusb, check_clk);
@@ -190,8 +197,11 @@ int ssusb_host_disable(struct ssusb_mtk *ssusb, bool 
suspend)
int ret;
int i;
 
-   /* power down and disable all u3 ports */
+   /* power down and disable u3 ports except skipped ones */
for (i = 0; i < num_u3p; i++) {
+   if ((0x1 << i) & ssusb->u3p_dis_msk)
+   continue;
+
value = mtu3_readl(ibase, SSUSB_U3_CTRL(i));
value |= SSUSB_U3_PORT_PDN;
value |= suspend ? 0 : SSUSB_U3_PORT_DIS;
diff --git a/drivers/usb/mtu3/mtu3_plat.c b/drivers/usb/mtu3/mtu3_plat.c
index 088e3e6..9edad30 100644
--- a/drivers/usb/mtu3/mtu3_plat.c
+++ b/drivers/usb/mtu3/mtu3_plat.c
@@ -276,6 +276,10 @@ static int get_ssusb_rscs(struct platform_device *pdev, 
struct ssusb_mtk *ssusb)
if (ret)
return ret;
 
+   /* optional property, ignore the error if it does not exist */
+   of_property_read_u32(node, "mediatek,u3p-dis-msk",
+>u3p_dis_msk);
+
if (ssusb->dr_mode != USB_DR_MODE_OTG)
return 0;
 
@@ -304,8 +308,8 @@ static int get_ssusb_rscs(struct platform_device *pdev, 
struct ssusb_mtk *ssusb)
}
}
 
-   dev_info(dev, "dr_mode: %d, is_u3_dr: %d\n",
-   ssusb->dr_mode, otg_sx->is_u3_drd);
+   dev_info(dev, "dr_mode: %d, is_u3_dr: %d, u3p_dis_msk:%x\n",
+   ssusb->dr_mode, otg_sx->is_u3_drd, ssusb->u3p_dis_msk);
 
return 0;
 }
-- 
1.7.9.5

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[PATCH v2 03/13] usb: mtu3: remove dummy wakeup debounce clocks

[Chunfeng Yun]

The wakeup debounce clocks for each ports in fact are not
needed, so remove them.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/mtu3/mtu3.h  |4 ---
 drivers/usb/mtu3/mtu3_host.c |   57 +++---
 2 files changed, 4 insertions(+), 57 deletions(-)

diff --git a/drivers/usb/mtu3/mtu3.h b/drivers/usb/mtu3/mtu3.h
index 112723d..6d3278e 100644
--- a/drivers/usb/mtu3/mtu3.h
+++ b/drivers/usb/mtu3/mtu3.h
@@ -214,8 +214,6 @@ struct otg_switch_mtk {
  * disable u3port0, bit1==1 to disable u3port1,... etc
  * @dbgfs_root: only used when supports manual dual-role switch via debugfs
  * @wakeup_en: it's true when supports remote wakeup in host mode
- * @wk_deb_p0: port0's wakeup debounce clock
- * @wk_deb_p1: it's optional, and depends on port1 is supported or not
  */
 struct ssusb_mtk {
struct device *dev;
@@ -238,8 +236,6 @@ struct ssusb_mtk {
struct dentry *dbgfs_root;
/* usb wakeup for host mode */
bool wakeup_en;
-   struct clk *wk_deb_p0;
-   struct clk *wk_deb_p1;
struct regmap *pericfg;
 };
 
diff --git a/drivers/usb/mtu3/mtu3_host.c b/drivers/usb/mtu3/mtu3_host.c
index 4dd9508..edcc591 100644
--- a/drivers/usb/mtu3/mtu3_host.c
+++ b/drivers/usb/mtu3/mtu3_host.c
@@ -79,20 +79,6 @@ int ssusb_wakeup_of_property_parse(struct ssusb_mtk *ssusb,
if (!ssusb->wakeup_en)
return 0;
 
-   ssusb->wk_deb_p0 = devm_clk_get(dev, "wakeup_deb_p0");
-   if (IS_ERR(ssusb->wk_deb_p0)) {
-   dev_err(dev, "fail to get wakeup_deb_p0\n");
-   return PTR_ERR(ssusb->wk_deb_p0);
-   }
-
-   if (of_property_read_bool(dn, "wakeup_deb_p1")) {
-   ssusb->wk_deb_p1 = devm_clk_get(dev, "wakeup_deb_p1");
-   if (IS_ERR(ssusb->wk_deb_p1)) {
-   dev_err(dev, "fail to get wakeup_deb_p1\n");
-   return PTR_ERR(ssusb->wk_deb_p1);
-   }
-   }
-
ssusb->pericfg = syscon_regmap_lookup_by_phandle(dn,
"mediatek,syscon-wakeup");
if (IS_ERR(ssusb->pericfg)) {
@@ -103,36 +89,6 @@ int ssusb_wakeup_of_property_parse(struct ssusb_mtk *ssusb,
return 0;
 }
 
-static int ssusb_wakeup_clks_enable(struct ssusb_mtk *ssusb)
-{
-   int ret;
-
-   ret = clk_prepare_enable(ssusb->wk_deb_p0);
-   if (ret) {
-   dev_err(ssusb->dev, "failed to enable wk_deb_p0\n");
-   goto usb_p0_err;
-   }
-
-   ret = clk_prepare_enable(ssusb->wk_deb_p1);
-   if (ret) {
-   dev_err(ssusb->dev, "failed to enable wk_deb_p1\n");
-   goto usb_p1_err;
-   }
-
-   return 0;
-
-usb_p1_err:
-   clk_disable_unprepare(ssusb->wk_deb_p0);
-usb_p0_err:
-   return -EINVAL;
-}
-
-static void ssusb_wakeup_clks_disable(struct ssusb_mtk *ssusb)
-{
-   clk_disable_unprepare(ssusb->wk_deb_p1);
-   clk_disable_unprepare(ssusb->wk_deb_p0);
-}
-
 static void host_ports_num_get(struct ssusb_mtk *ssusb)
 {
u32 xhci_cap;
@@ -286,19 +242,14 @@ void ssusb_host_exit(struct ssusb_mtk *ssusb)
 
 int ssusb_wakeup_enable(struct ssusb_mtk *ssusb)
 {
-   int ret = 0;
-
-   if (ssusb->wakeup_en) {
-   ret = ssusb_wakeup_clks_enable(ssusb);
+   if (ssusb->wakeup_en)
ssusb_wakeup_ip_sleep_en(ssusb);
-   }
-   return ret;
+
+   return 0;
 }
 
 void ssusb_wakeup_disable(struct ssusb_mtk *ssusb)
 {
-   if (ssusb->wakeup_en) {
+   if (ssusb->wakeup_en)
ssusb_wakeup_ip_sleep_dis(ssusb);
-   ssusb_wakeup_clks_disable(ssusb);
-   }
 }
-- 
1.7.9.5

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Re: [PATCH 07/12] usb: mtu3: add support for usb3.1 IP

[Chunfeng Yun]

On Thu, 2017-09-28 at 08:17 +0800, Chunfeng Yun wrote:
> Support SuperSpeedPlus for usb3.1 device IP
> 
> Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
> ---
>  drivers/usb/mtu3/mtu3.h|1 +
>  drivers/usb/mtu3/mtu3_core.c   |   14 +++---
>  drivers/usb/mtu3/mtu3_gadget.c |3 ++-
>  drivers/usb/mtu3/mtu3_gadget_ep0.c |   16 
>  drivers/usb/mtu3/mtu3_hw_regs.h|1 +
>  5 files changed, 23 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/usb/mtu3/mtu3.h b/drivers/usb/mtu3/mtu3.h
> index b0c2b5d..d80e4e8 100644
> --- a/drivers/usb/mtu3/mtu3.h
> +++ b/drivers/usb/mtu3/mtu3.h
> @@ -94,6 +94,7 @@ enum mtu3_speed {
>   MTU3_SPEED_FULL = 1,
>   MTU3_SPEED_HIGH = 3,
>   MTU3_SPEED_SUPER = 4,
> + MTU3_SPEED_SUPER_PLUS = 5,
>  };
>  
>  /**
> diff --git a/drivers/usb/mtu3/mtu3_core.c b/drivers/usb/mtu3/mtu3_core.c
> index cd4528f..67f7a30 100644
> --- a/drivers/usb/mtu3/mtu3_core.c
> +++ b/drivers/usb/mtu3/mtu3_core.c
> @@ -237,7 +237,7 @@ void mtu3_ep_stall_set(struct mtu3_ep *mep, bool set)
>  
>  void mtu3_dev_on_off(struct mtu3 *mtu, int is_on)
>  {
> - if (mtu->is_u3_ip && (mtu->max_speed == USB_SPEED_SUPER))
> + if (mtu->is_u3_ip && mtu->max_speed >= USB_SPEED_SUPER)
>   mtu3_ss_func_set(mtu, is_on);
>   else
>   mtu3_hs_softconn_set(mtu, is_on);
> @@ -547,6 +547,9 @@ static void mtu3_set_speed(struct mtu3 *mtu)
>   mtu3_clrbits(mbase, U3D_USB3_CONFIG, USB3_EN);
>   /* HS/FS detected by HW */
>   mtu3_setbits(mbase, U3D_POWER_MANAGEMENT, HS_ENABLE);
> + } else if (mtu->max_speed == USB_SPEED_SUPER) {
> + mtu3_clrbits(mtu->ippc_base, SSUSB_U3_CTRL(0),
> +  SSUSB_U3_PORT_SSP_SPEED);
>   }
>  
>   dev_info(mtu->dev, "max_speed: %s\n",
> @@ -624,6 +627,10 @@ static irqreturn_t mtu3_link_isr(struct mtu3 *mtu)
>   udev_speed = USB_SPEED_SUPER;
>   maxpkt = 512;
>   break;
> + case MTU3_SPEED_SUPER_PLUS:
> + udev_speed = USB_SPEED_SUPER_PLUS;
> + maxpkt = 512;
> + break;
>   default:
>   udev_speed = USB_SPEED_UNKNOWN;
>   break;
> @@ -825,14 +832,15 @@ int ssusb_gadget_init(struct ssusb_mtk *ssusb)
>   case USB_SPEED_FULL:
>   case USB_SPEED_HIGH:
>   case USB_SPEED_SUPER:
> + case USB_SPEED_SUPER_PLUS:
>   break;
>   default:
>   dev_err(dev, "invalid max_speed: %s\n",
>   usb_speed_string(mtu->max_speed));
>   /* fall through */
>   case USB_SPEED_UNKNOWN:
> - /* default as SS */
> - mtu->max_speed = USB_SPEED_SUPER;
> + /* default as SSP */
> + mtu->max_speed = USB_SPEED_SUPER_PLUS;
>   break;
>   }
>  
> diff --git a/drivers/usb/mtu3/mtu3_gadget.c b/drivers/usb/mtu3/mtu3_gadget.c
> index 434fca5..b495471 100644
> --- a/drivers/usb/mtu3/mtu3_gadget.c
> +++ b/drivers/usb/mtu3/mtu3_gadget.c
> @@ -89,6 +89,7 @@ static int mtu3_ep_enable(struct mtu3_ep *mep)
>  
>   switch (mtu->g.speed) {
>   case USB_SPEED_SUPER:
> + case USB_SPEED_SUPER_PLUS:
>   if (usb_endpoint_xfer_int(desc) ||
>   usb_endpoint_xfer_isoc(desc)) {
>   interval = desc->bInterval;
> @@ -456,7 +457,7 @@ static int mtu3_gadget_wakeup(struct usb_gadget *gadget)
>   return  -EOPNOTSUPP;
>  
>   spin_lock_irqsave(>lock, flags);
> - if (mtu->g.speed == USB_SPEED_SUPER) {
> + if (mtu->g.speed >= USB_SPEED_SUPER) {
>   mtu3_setbits(mtu->mac_base, U3D_LINK_POWER_CONTROL, UX_EXIT);
>   } else {
>   mtu3_setbits(mtu->mac_base, U3D_POWER_MANAGEMENT, RESUME);
> diff --git a/drivers/usb/mtu3/mtu3_gadget_ep0.c 
> b/drivers/usb/mtu3/mtu3_gadget_ep0.c
> index 958d74d..1ca77e8 100644
> --- a/drivers/usb/mtu3/mtu3_gadget_ep0.c
> +++ b/drivers/usb/mtu3/mtu3_gadget_ep0.c
> @@ -212,8 +212,8 @@ static int ep0_set_sel(struct mtu3 *mtu, struct 
> usb_ctrlrequest *setup)
>   case USB_RECIP_DEVICE:
>   result[0] = mtu->is_self_powered << USB_DEVICE_SELF_POWERED;
>   result[0] |= mtu->may_wakeup << USB_DEVICE_REMOTE_WAKEUP;
> - /* superspeed only */
> - if (mtu->g.speed == USB_SPEED_SUPER) {
> +
> + if (mtu->g.speed >= USB_SPEED_SUPER) {
>   result[0] |= mtu->u1

[PATCH 11/12] dt-bindings: usb: mtu3: remove dummy clocks and add optional ones

[Chunfeng Yun]

Remove dummy clocks for usb wakeup and add optional ones for
mcu_bus and dma_bus bus.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 .../devicetree/bindings/usb/mediatek,mtu3.txt  |   10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt 
b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
index 7c611d1..49c982b 100644
--- a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
@@ -14,9 +14,9 @@ Required properties:
  - vusb33-supply : regulator of USB avdd3.3v
  - clocks : a list of phandle + clock-specifier pairs, one for each
entry in clock-names
- - clock-names : must contain "sys_ck" and "ref_ck" for clock of controller;
-   "wakeup_deb_p0" and "wakeup_deb_p1" are optional, they are
-   depends on "mediatek,enable-wakeup"
+ - clock-names : must contain "sys_ck" for clock of controller,
+   the following clocks are optional:
+   "ref_ck", "mcu_ck" and "dam_ck";
  - phys : a list of phandle + phy specifier pairs
  - dr_mode : should be one of "host", "peripheral" or "otg",
refer to usb/generic.txt
@@ -65,9 +65,7 @@ ssusb: usb@11271000 {
clocks = < CLK_TOP_USB30_SEL>, <>,
 < CLK_PERI_USB0>,
 < CLK_PERI_USB1>;
-   clock-names = "sys_ck", "ref_ck",
- "wakeup_deb_p0",
- "wakeup_deb_p1";
+   clock-names = "sys_ck", "ref_ck";
vusb33-supply = <_vusb_reg>;
vbus-supply = <_p0_vbus>;
extcon = <_usb>;
-- 
1.7.9.5

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[PATCH 12/12] dt-bindings: usb: mtu3: remove optional pinctrls

[Chunfeng Yun]

Remove optional pinctrls due to using FORCE/RG_IDDIG to implement
manual switch function.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 .../devicetree/bindings/usb/mediatek,mtu3.txt  |7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt 
b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
index 49c982b..b2271d8 100644
--- a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
@@ -30,9 +30,10 @@ Optional properties:
when supports dual-role mode.
  - vbus-supply : reference to the VBUS regulator, needed when supports
dual-role mode.
- - pinctl-names : a pinctrl state named "default" must be defined,
-   "id_float" and "id_ground" are optinal which depends on
-   "mediatek,enable-manual-drd"
+ - pinctrl-names : a pinctrl state named "default" is optional, and need be
+   defined if auto drd switch is enabled, that means the property dr_mode
+   is set as "otg", and meanwhile the property "mediatek,enable-manual-drd"
+   is not set.
  - pinctrl-0 : pin control group
See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
 
-- 
1.7.9.5

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[PATCH 10/12] dt-bindings: usb: mtu3: add a optional property to disable u3ports

[Chunfeng Yun]

Add a new optional property to disable u3ports

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 .../devicetree/bindings/usb/mediatek,mtu3.txt  |2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt 
b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
index 49f5476..7c611d1 100644
--- a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
@@ -44,6 +44,8 @@ Optional properties:
  - mediatek,enable-wakeup : supports ip sleep wakeup used by host mode
  - mediatek,syscon-wakeup : phandle to syscon used to access USB wakeup
control register, it depends on "mediatek,enable-wakeup".
+ - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
+   bit1 for u3port1, ... etc;
 
 Sub-nodes:
 The xhci should be added as subnode to mtu3 as shown in the following example
-- 
1.7.9.5

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[PATCH next 1/2] phy: phy-mtk-tphy: fix NULL point of chip bank

[Chunfeng Yun]

Chip bank of version-1 is initialized as NULL, but it's used
by pcie_phy_instance_power_on/off(), so assign it a right
address.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/phy/mediatek/phy-mtk-tphy.c |3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c 
b/drivers/phy/mediatek/phy-mtk-tphy.c
index 1ca7fe3..a440de9 100644
--- a/drivers/phy/mediatek/phy-mtk-tphy.c
+++ b/drivers/phy/mediatek/phy-mtk-tphy.c
@@ -28,6 +28,7 @@
 /* banks shared by multiple phys */
 #define SSUSB_SIFSLV_V1_SPLLC  0x000   /* shared by u3 phys */
 #define SSUSB_SIFSLV_V1_U2FREQ 0x100   /* shared by u2 phys */
+#define SSUSB_SIFSLV_V1_CHIP   0x300   /* shared by u3 phys */
 /* u2 phy bank */
 #define SSUSB_SIFSLV_V1_U2PHY_COM  0x000
 /* u3/pcie/sata phy banks */
@@ -763,7 +764,7 @@ static void phy_v1_banks_init(struct mtk_tphy *tphy,
case PHY_TYPE_USB3:
case PHY_TYPE_PCIE:
u3_banks->spllc = tphy->sif_base + SSUSB_SIFSLV_V1_SPLLC;
-   u3_banks->chip = NULL;
+   u3_banks->chip = tphy->sif_base + SSUSB_SIFSLV_V1_CHIP;
u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD;
u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V1_U3PHYA;
break;
-- 
1.7.9.5

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[PATCH next 2/2] phy: phy-mtk-tphy: add set_mode callback

[Chunfeng Yun]

This is used to force PHY with USB OTG function to enter a specific
mode, and override OTG VBUS and ID signals.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/phy/mediatek/phy-mtk-tphy.c |   39 +++
 1 file changed, 39 insertions(+)

diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c 
b/drivers/phy/mediatek/phy-mtk-tphy.c
index a440de9..9549450 100644
--- a/drivers/phy/mediatek/phy-mtk-tphy.c
+++ b/drivers/phy/mediatek/phy-mtk-tphy.c
@@ -97,9 +97,11 @@
 
 #define U3P_U2PHYDTM1  0x06C
 #define P2C_RG_UART_EN BIT(16)
+#define P2C_FORCE_IDDIGBIT(9)
 #define P2C_RG_VBUSVALID   BIT(5)
 #define P2C_RG_SESSEND BIT(4)
 #define P2C_RG_AVALID  BIT(2)
+#define P2C_RG_IDDIG   BIT(1)
 
 #define U3P_U3_CHIP_GPIO_CTLD  0x0c
 #define P3C_REG_IP_SW_RST  BIT(31)
@@ -586,6 +588,31 @@ static void u2_phy_instance_exit(struct mtk_tphy *tphy,
}
 }
 
+static void u2_phy_instance_set_mode(struct mtk_tphy *tphy,
+struct mtk_phy_instance *instance,
+enum phy_mode mode)
+{
+   struct u2phy_banks *u2_banks = >u2_banks;
+   u32 tmp;
+
+   tmp = readl(u2_banks->com + U3P_U2PHYDTM1);
+   switch (mode) {
+   case PHY_MODE_USB_DEVICE:
+   tmp |= P2C_FORCE_IDDIG | P2C_RG_IDDIG;
+   break;
+   case PHY_MODE_USB_HOST:
+   tmp |= P2C_FORCE_IDDIG;
+   tmp &= ~P2C_RG_IDDIG;
+   break;
+   case PHY_MODE_USB_OTG:
+   tmp &= ~(P2C_FORCE_IDDIG | P2C_RG_IDDIG);
+   break;
+   default:
+   return;
+   }
+   writel(tmp, u2_banks->com + U3P_U2PHYDTM1);
+}
+
 static void pcie_phy_instance_init(struct mtk_tphy *tphy,
   struct mtk_phy_instance *instance)
 {
@@ -882,6 +909,17 @@ static int mtk_phy_exit(struct phy *phy)
return 0;
 }
 
+static int mtk_phy_set_mode(struct phy *phy, enum phy_mode mode)
+{
+   struct mtk_phy_instance *instance = phy_get_drvdata(phy);
+   struct mtk_tphy *tphy = dev_get_drvdata(phy->dev.parent);
+
+   if (instance->type == PHY_TYPE_USB2)
+   u2_phy_instance_set_mode(tphy, instance, mode);
+
+   return 0;
+}
+
 static struct phy *mtk_phy_xlate(struct device *dev,
 struct of_phandle_args *args)
 {
@@ -932,6 +970,7 @@ static struct phy *mtk_phy_xlate(struct device *dev,
.exit   = mtk_phy_exit,
.power_on   = mtk_phy_power_on,
.power_off  = mtk_phy_power_off,
+   .set_mode   = mtk_phy_set_mode,
.owner  = THIS_MODULE,
 };
 
-- 
1.7.9.5

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[PATCH RESEND v2 1/3] usb: xhci-mtk: add generic compatible string

[Chunfeng Yun]

The xhci-mtk driver is a generic driver for MediaTek xHCI IP, add
a generic compatible to avoid confusion when support new SoCs but
use a compatible with specific SoC's name "mt8173".

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/host/xhci-mtk.c |1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index 67d5dc7..8fb6065 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -795,6 +795,7 @@ static int __maybe_unused xhci_mtk_resume(struct device 
*dev)
 #ifdef CONFIG_OF
 static const struct of_device_id mtk_xhci_of_match[] = {
{ .compatible = "mediatek,mt8173-xhci"},
+   { .compatible = "mediatek,mtk-xhci"},
{ },
 };
 MODULE_DEVICE_TABLE(of, mtk_xhci_of_match);
-- 
1.7.9.5

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[PATCH RESEND v2 2/3] dt-bindings: mt8173-xhci: add generic compatible and rename file

[Chunfeng Yun]

The mt8173-xhci.txt actually holds the bindings for all mediatek
SoCs with xHCI controller, so add a generic compatible and change
the name to mediatek,mtk-xhci.txt to reflect that.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 .../usb/{mt8173-xhci.txt => mediatek,mtk-xhci.txt} |   14 +++---
 .../devicetree/bindings/usb/mt8173-mtu3.txt|2 +-
 2 files changed, 12 insertions(+), 4 deletions(-)
 rename Documentation/devicetree/bindings/usb/{mt8173-xhci.txt => 
mediatek,mtk-xhci.txt} (85%)

diff --git a/Documentation/devicetree/bindings/usb/mt8173-xhci.txt 
b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
similarity index 85%
rename from Documentation/devicetree/bindings/usb/mt8173-xhci.txt
rename to Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
index 0acfc8a..ff21135 100644
--- a/Documentation/devicetree/bindings/usb/mt8173-xhci.txt
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
@@ -11,7 +11,11 @@ into two parts.
 
 
 Required properties:
- - compatible : should contain "mediatek,mt8173-xhci"
+ - compatible : should be "mediatek,soc-model-xhci", "mediatek,mtk-xhci",
+   soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
+   "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
+   addition, one of:
+   - "mediatek,mt8173-xhci"
  - reg : specifies physical base address and size of the registers
  - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control
  - interrupts : interrupt used by the controller
@@ -68,10 +72,14 @@ usb30: usb@1127 {
 
 In the case, xhci is added as subnode to mtu3. An example and the DT binding
 details of mtu3 can be found in:
-Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
+Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
 
 Required properties:
- - compatible : should contain "mediatek,mt8173-xhci"
+ - compatible : should be "mediatek,soc-model-xhci", "mediatek,mtk-xhci",
+   soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
+   "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
+   addition, one of:
+   - "mediatek,mt8173-xhci"
  - reg : specifies physical base address and size of the registers
  - reg-names: should be "mac" for xHCI MAC
  - interrupts : interrupt used by the host controller
diff --git a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt 
b/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
index 1d7c3bc..b8ea394 100644
--- a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
+++ b/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
@@ -44,7 +44,7 @@ Optional properties:
 Sub-nodes:
 The xhci should be added as subnode to mtu3 as shown in the following example
 if host mode is enabled. The DT binding details of xhci can be found in:
-Documentation/devicetree/bindings/usb/mt8173-xhci.txt
+Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
 
 Example:
 ssusb: usb@11271000 {
-- 
1.7.9.5

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[PATCH RESEND v2 3/3] dt-bindings: mt8173-mtu3: add generic compatible and rename file

[Chunfeng Yun]

The mt8173-mtu3.txt actually holds the bindings for all mediatek
SoCs with usb3 DRD IP, so add a generic compatible and change the
name to mediatek,mtu3.txt.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
Acked-by: Rob Herring <r...@kernel.org>
---
 .../usb/{mt8173-mtu3.txt => mediatek,mtu3.txt} |6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)
 rename Documentation/devicetree/bindings/usb/{mt8173-mtu3.txt => 
mediatek,mtu3.txt} (92%)

diff --git a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt 
b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
similarity index 92%
rename from Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
rename to Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
index b8ea394..722a029 100644
--- a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
@@ -1,7 +1,11 @@
 The device node for Mediatek USB3.0 DRD controller
 
 Required properties:
- - compatible : should be "mediatek,mt8173-mtu3"
+ - compatible : should be "mediatek,soc-model-mtu3", "mediatek,mtu3",
+   soc-model is the name of SoC, such as mt8173, mt2712 etc,
+   when using "mediatek,mtu3" compatible string, you need SoC specific
+   ones in addition, one of:
+   - "mediatek,mt8173-mtu3"
  - reg : specifies physical base address and size of the registers
  - reg-names: should be "mac" for device IP and "ippc" for IP port control
  - interrupts : interrupt used by the device IP
-- 
1.7.9.5

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[PATCH v3 1/3] usb: xhci-mtk: add generic compatible string

[Chunfeng Yun]

The xhci-mtk driver is a generic driver for MediaTek xHCI IP, add
a generic compatible to avoid confusion when support new SoCs but
use a compatible with specific SoC's name "mt8173".

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/host/xhci-mtk.c |1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index 67d5dc7..8fb6065 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -795,6 +795,7 @@ static int __maybe_unused xhci_mtk_resume(struct device 
*dev)
 #ifdef CONFIG_OF
 static const struct of_device_id mtk_xhci_of_match[] = {
{ .compatible = "mediatek,mt8173-xhci"},
+   { .compatible = "mediatek,mtk-xhci"},
{ },
 };
 MODULE_DEVICE_TABLE(of, mtk_xhci_of_match);
-- 
1.7.9.5

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[PATCH v3 2/3] dt-bindings: mt8173-xhci: add generic compatible and rename file

[Chunfeng Yun]

The mt8173-xhci.txt actually holds the bindings for all mediatek
SoCs with xHCI controller, so add a generic compatible and change
the name to mediatek,mtk-xhci.txt to reflect that.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 .../usb/{mt8173-xhci.txt => mediatek,mtk-xhci.txt} |   14 +++---
 .../devicetree/bindings/usb/mt8173-mtu3.txt|2 +-
 2 files changed, 12 insertions(+), 4 deletions(-)
 rename Documentation/devicetree/bindings/usb/{mt8173-xhci.txt => 
mediatek,mtk-xhci.txt} (85%)

diff --git a/Documentation/devicetree/bindings/usb/mt8173-xhci.txt 
b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
similarity index 85%
rename from Documentation/devicetree/bindings/usb/mt8173-xhci.txt
rename to Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
index 0acfc8a..5611a2e 100644
--- a/Documentation/devicetree/bindings/usb/mt8173-xhci.txt
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
@@ -11,7 +11,11 @@ into two parts.
 
 
 Required properties:
- - compatible : should contain "mediatek,mt8173-xhci"
+ - compatible : should be "mediatek,-xhci", "mediatek,mtk-xhci",
+   soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
+   "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
+   addition, one of:
+   - "mediatek,mt8173-xhci"
  - reg : specifies physical base address and size of the registers
  - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control
  - interrupts : interrupt used by the controller
@@ -68,10 +72,14 @@ usb30: usb@1127 {
 
 In the case, xhci is added as subnode to mtu3. An example and the DT binding
 details of mtu3 can be found in:
-Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
+Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
 
 Required properties:
- - compatible : should contain "mediatek,mt8173-xhci"
+ - compatible : should be "mediatek,-xhci", "mediatek,mtk-xhci",
+   soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
+   "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
+   addition, one of:
+   - "mediatek,mt8173-xhci"
  - reg : specifies physical base address and size of the registers
  - reg-names: should be "mac" for xHCI MAC
  - interrupts : interrupt used by the host controller
diff --git a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt 
b/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
index 1d7c3bc..b8ea394 100644
--- a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
+++ b/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
@@ -44,7 +44,7 @@ Optional properties:
 Sub-nodes:
 The xhci should be added as subnode to mtu3 as shown in the following example
 if host mode is enabled. The DT binding details of xhci can be found in:
-Documentation/devicetree/bindings/usb/mt8173-xhci.txt
+Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
 
 Example:
 ssusb: usb@11271000 {
-- 
1.7.9.5

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[PATCH v3 3/3] dt-bindings: mt8173-mtu3: add generic compatible and rename file

[Chunfeng Yun]

The mt8173-mtu3.txt actually holds the bindings for all mediatek
SoCs with usb3 DRD IP, so add a generic compatible and change the
name to mediatek,mtu3.txt.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
Acked-by: Rob Herring <r...@kernel.org>
---
 .../usb/{mt8173-mtu3.txt => mediatek,mtu3.txt} |6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)
 rename Documentation/devicetree/bindings/usb/{mt8173-mtu3.txt => 
mediatek,mtu3.txt} (92%)

diff --git a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt 
b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
similarity index 92%
rename from Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
rename to Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
index b8ea394..838ae48 100644
--- a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
@@ -1,7 +1,11 @@
 The device node for Mediatek USB3.0 DRD controller
 
 Required properties:
- - compatible : should be "mediatek,mt8173-mtu3"
+ - compatible : should be "mediatek,-mtu3", "mediatek,mtu3",
+   soc-model is the name of SoC, such as mt8173, mt2712 etc,
+   when using "mediatek,mtu3" compatible string, you need SoC specific
+   ones in addition, one of:
+   - "mediatek,mt8173-mtu3"
  - reg : specifies physical base address and size of the registers
  - reg-names: should be "mac" for device IP and "ippc" for IP port control
  - interrupts : interrupt used by the device IP
-- 
1.7.9.5

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Re: [PATCH RESEND v2 3/3] dt-bindings: mt8173-mtu3: add generic compatible and rename file

[Chunfeng Yun]

On Tue, 2017-08-29 at 13:08 +0300, Sergei Shtylyov wrote:
> Hello!
> 
> On 8/29/2017 12:20 PM, Chunfeng Yun wrote:
> 
> > The mt8173-mtu3.txt actually holds the bindings for all mediatek
> > SoCs with usb3 DRD IP, so add a generic compatible and change the
> > name to mediatek,mtu3.txt.
> > 
> > Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
> > Acked-by: Rob Herring <r...@kernel.org>
> > ---
> >   .../usb/{mt8173-mtu3.txt => mediatek,mtu3.txt} |6 +-
> >   1 file changed, 5 insertions(+), 1 deletion(-)
> >   rename Documentation/devicetree/bindings/usb/{mt8173-mtu3.txt => 
> > mediatek,mtu3.txt} (92%)
> > 
> > diff --git a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt 
> > b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
> > similarity index 92%
> > rename from Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
> > rename to Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
> > index b8ea394..722a029 100644
> > --- a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
> > +++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
> > @@ -1,7 +1,11 @@
> >   The device node for Mediatek USB3.0 DRD controller
> >   
> >   Required properties:
> > - - compatible : should be "mediatek,mt8173-mtu3"
> > + - compatible : should be "mediatek,soc-model-mtu3", "mediatek,mtu3",
> 
> Worth enclosing soc-model in <>.
Ok, I'll modify it, thanks
> 
> > +   soc-model is the name of SoC, such as mt8173, mt2712 etc,
> > +   when using "mediatek,mtu3" compatible string, you need SoC specific
> > +   ones in addition, one of:
> > +   - "mediatek,mt8173-mtu3"
> >- reg : specifies physical base address and size of the registers
> >- reg-names: should be "mac" for device IP and "ippc" for IP port control
> >- interrupts : interrupt used by the device IP
> 
> MBR, Sergei


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Re: [PATCH 01/12] usb: mtu3: fix error return code in ssusb_gadget_init()

[Chunfeng Yun]

On Sat, 2017-09-30 at 16:00 +0300, Sergei Shtylyov wrote:
> Hello!
> 
> On 9/28/2017 3:17 AM, Chunfeng Yun wrote:
> 
> > When fail to get irq number, platform_get_irq() may return
> 
> Failing. IRQ. :-)
I'll modify it, thank you

> 
> > -EPROBE_DEFER, but we ignore it and always return -ENODEV,
> > so fix it.
> > 
> > Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
> > ---
> >   drivers/usb/mtu3/mtu3_core.c |4 ++--
> >   1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/usb/mtu3/mtu3_core.c b/drivers/usb/mtu3/mtu3_core.c
> > index 99c65b0..9475798 100644
> > --- a/drivers/usb/mtu3/mtu3_core.c
> > +++ b/drivers/usb/mtu3/mtu3_core.c
> > @@ -774,9 +774,9 @@ int ssusb_gadget_init(struct ssusb_mtk *ssusb)
> > return -ENOMEM;
> >   
> > mtu->irq = platform_get_irq(pdev, 0);
> > -   if (mtu->irq <= 0) {
> > +   if (mtu->irq < 0) {
> 
> This is good as the function no longer returns 0 on error. Even when it 
> did, 0 could mean a valid IRQ as well...
> 
> > dev_err(dev, "fail to get irq number\n");
> > -   return -ENODEV;
> > +   return mtu->irq;
> > }
> > dev_info(dev, "irq %d\n", mtu->irq);
> >   
> 
> MBR, Sergei


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Re: [PATCH 10/12] dt-bindings: usb: mtu3: add a optional property to disable u3ports

[Chunfeng Yun]

On Thu, 2017-10-05 at 17:31 -0500, Rob Herring wrote:
> On Thu, Sep 28, 2017 at 08:17:18AM +0800, Chunfeng Yun wrote:
> > Add a new optional property to disable u3ports
> > 
> > Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
> > ---
> >  .../devicetree/bindings/usb/mediatek,mtu3.txt  |2 ++
> >  1 file changed, 2 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt 
> > b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
> > index 49f5476..7c611d1 100644
> > --- a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
> > +++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
> > @@ -44,6 +44,8 @@ Optional properties:
> >   - mediatek,enable-wakeup : supports ip sleep wakeup used by host mode
> >   - mediatek,syscon-wakeup : phandle to syscon used to access USB wakeup
> > control register, it depends on "mediatek,enable-wakeup".
> > + - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
> > +   bit1 for u3port1, ... etc;
> 
> How does this relate to the XHCI change? Same comment applies.

There is a upper layer called IPPC (IP Power and Clock interface) shared
by device IP and host IP (xHCI) to control power and clock of each port.
So I can disable or enable xCHI's ports by IPPC indirectly.


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Re: [PATCH 12/12] dt-bindings: usb: mtu3: remove optional pinctrls

[Chunfeng Yun]

On Thu, 2017-10-05 at 17:33 -0500, Rob Herring wrote:
> On Thu, Sep 28, 2017 at 08:17:20AM +0800, Chunfeng Yun wrote:
> > Remove optional pinctrls due to using FORCE/RG_IDDIG to implement
> > manual switch function.
> 
> Another not backwards compatible change. Please explain why that is 
> okay.
The old way of manual switch function uses the IDDIG pin (IDPIN) to
switch mode between device and host indirectly by pulling up or pulling
down it by driver. But there is a limitation, when the IDDIG pin is
connected to the ground, the driver can't pull it up anymore, so it will
fail when the receptacle is micro type.
And there is no such limitation through FORCE/RG_IDDIG, because when the
FORCE_IDDIG is set, the staus of RG_IDDIG is given higher priority than
IDDIG pin. So it is okay no matter whether id_float and id_ground pins
are provided or not.
 
> 
> > 
> > Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
> > ---
> >  .../devicetree/bindings/usb/mediatek,mtu3.txt  |7 ---
> >  1 file changed, 4 insertions(+), 3 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt 
> > b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
> > index 49c982b..b2271d8 100644
> > --- a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
> > +++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
> > @@ -30,9 +30,10 @@ Optional properties:
> > when supports dual-role mode.
> >   - vbus-supply : reference to the VBUS regulator, needed when supports
> > dual-role mode.
> > - - pinctl-names : a pinctrl state named "default" must be defined,
> > -   "id_float" and "id_ground" are optinal which depends on
> > -   "mediatek,enable-manual-drd"
> > + - pinctrl-names : a pinctrl state named "default" is optional, and need be
> > +   defined if auto drd switch is enabled, that means the property dr_mode
> > +   is set as "otg", and meanwhile the property "mediatek,enable-manual-drd"
> > +   is not set.
> >   - pinctrl-0 : pin control group
> > See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
> >  
> > -- 
> > 1.7.9.5
> > 


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Re: [PATCH 8/9] dt-bindings: usb: mtk-xhci: add a optional property to disable u3ports

[Chunfeng Yun]

On Thu, 2017-10-05 at 17:16 -0500, Rob Herring wrote:
> On Wed, Sep 27, 2017 at 05:23:04PM +0800, Chunfeng Yun wrote:
> > Add a new optional property to disable u3ports
> > 
> > Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
> > ---
> >  .../devicetree/bindings/usb/mediatek,mtk-xhci.txt  |2 ++
> >  1 file changed, 2 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt 
> > b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
> > index 5611a2e..2d9b459 100644
> > --- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
> > +++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
> > @@ -38,6 +38,8 @@ Optional properties:
> > mode;
> >   - mediatek,syscon-wakeup : phandle to syscon used to access USB wakeup
> > control register, it depends on "mediatek,wakeup-src".
> > + - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
> > +   bit1 for u3port1, ... etc;
> 
> I think you should have child nodes for ports and use "status" to 
> disable them (or omit them). IIRC, the common USB bus binding already 
> defines ports.
I survey it to see whether it can replace the current way

thanks
> 
> >   - vbus-supply : reference to the VBUS regulator;
> >   - usb3-lpm-capable : supports USB3.0 LPM
> >   - pinctrl-names : a pinctrl state named "default" must be defined
> > -- 
> > 1.7.9.5
> > 


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[PATCH 3/9] usb: xhci-mtk: check clock stability of U3_MAC

[Chunfeng Yun]

This is useful to find out the root cause when the Super Speed doesn't
work. Such as when the T-PHY is switched to PCIe or SATA, and affects
Super Speed function, the check will fail.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/host/xhci-mtk.c |4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index 9502ca4..7a92bb7 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -43,6 +43,7 @@
 
 /* ip_pw_sts1 register */
 #define STS1_IP_SLEEP_STS  BIT(30)
+#define STS1_U3_MAC_RSTBIT(16)
 #define STS1_XHCI_RST  BIT(11)
 #define STS1_SYS125_RSTBIT(10)
 #define STS1_REF_RST   BIT(8)
@@ -125,6 +126,9 @@ static int xhci_mtk_host_enable(struct xhci_hcd_mtk *mtk)
check_val = STS1_SYSPLL_STABLE | STS1_REF_RST |
STS1_SYS125_RST | STS1_XHCI_RST;
 
+   if (mtk->num_u3_ports)
+   check_val |= STS1_U3_MAC_RST;
+
ret = readl_poll_timeout(>ip_pw_sts1, value,
  (check_val == (value & check_val)), 100, 2);
if (ret) {
-- 
1.7.9.5

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[PATCH 6/9] usb: xhci-mtk: add optional mcu and dma bus clocks

[Chunfeng Yun]

There are mcu_bus and dma_bus clocks needed to be controlled by
driver on some SoCs, so add them as optional ones

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/host/xhci-mtk.c |   79 ---
 drivers/usb/host/xhci-mtk.h |2 ++
 2 files changed, 62 insertions(+), 19 deletions(-)

diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index d60463c..e5caabe 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -221,6 +221,44 @@ static int xhci_mtk_ssusb_config(struct xhci_hcd_mtk *mtk)
return xhci_mtk_host_enable(mtk);
 }
 
+/* ignore the error if the clock does not exist */
+static struct clk *optional_clk_get(struct device *dev, const char *id)
+{
+   struct clk *opt_clk;
+
+   opt_clk = devm_clk_get(dev, id);
+   /* ignore error number except EPROBE_DEFER */
+   if (IS_ERR(opt_clk) && (PTR_ERR(opt_clk) != -EPROBE_DEFER))
+   opt_clk = NULL;
+
+   return opt_clk;
+}
+
+static int xhci_mtk_clks_get(struct xhci_hcd_mtk *mtk)
+{
+   struct device *dev = mtk->dev;
+
+   mtk->sys_clk = devm_clk_get(dev, "sys_ck");
+   if (IS_ERR(mtk->sys_clk)) {
+   dev_err(dev, "fail to get sys_ck\n");
+   return PTR_ERR(mtk->sys_clk);
+   }
+
+   mtk->ref_clk = optional_clk_get(dev, "ref_ck");
+   if (IS_ERR(mtk->ref_clk))
+   return PTR_ERR(mtk->ref_clk);
+
+   mtk->mcu_clk = optional_clk_get(dev, "mcu_ck");
+   if (IS_ERR(mtk->mcu_clk))
+   return PTR_ERR(mtk->mcu_clk);
+
+   mtk->dma_clk = optional_clk_get(dev, "dma_ck");
+   if (IS_ERR(mtk->dma_clk))
+   return PTR_ERR(mtk->dma_clk);
+
+   return 0;
+}
+
 static int xhci_mtk_clks_enable(struct xhci_hcd_mtk *mtk)
 {
int ret;
@@ -237,16 +275,34 @@ static int xhci_mtk_clks_enable(struct xhci_hcd_mtk *mtk)
goto sys_clk_err;
}
 
+   ret = clk_prepare_enable(mtk->mcu_clk);
+   if (ret) {
+   dev_err(mtk->dev, "failed to enable mcu_clk\n");
+   goto mcu_clk_err;
+   }
+
+   ret = clk_prepare_enable(mtk->dma_clk);
+   if (ret) {
+   dev_err(mtk->dev, "failed to enable dma_clk\n");
+   goto dma_clk_err;
+   }
+
return 0;
 
+dma_clk_err:
+   clk_disable_unprepare(mtk->mcu_clk);
+mcu_clk_err:
+   clk_disable_unprepare(mtk->sys_clk);
 sys_clk_err:
clk_disable_unprepare(mtk->ref_clk);
 ref_clk_err:
-   return -EINVAL;
+   return ret;
 }
 
 static void xhci_mtk_clks_disable(struct xhci_hcd_mtk *mtk)
 {
+   clk_disable_unprepare(mtk->dma_clk);
+   clk_disable_unprepare(mtk->mcu_clk);
clk_disable_unprepare(mtk->sys_clk);
clk_disable_unprepare(mtk->ref_clk);
 }
@@ -529,24 +585,9 @@ static int xhci_mtk_probe(struct platform_device *pdev)
return PTR_ERR(mtk->vusb33);
}
 
-   mtk->sys_clk = devm_clk_get(dev, "sys_ck");
-   if (IS_ERR(mtk->sys_clk)) {
-   dev_err(dev, "fail to get sys_ck\n");
-   return PTR_ERR(mtk->sys_clk);
-   }
-
-   /*
-* reference clock is usually a "fixed-clock", make it optional
-* for backward compatibility and ignore the error if it does
-* not exist.
-*/
-   mtk->ref_clk = devm_clk_get(dev, "ref_ck");
-   if (IS_ERR(mtk->ref_clk)) {
-   if (PTR_ERR(mtk->ref_clk) == -EPROBE_DEFER)
-   return -EPROBE_DEFER;
-
-   mtk->ref_clk = NULL;
-   }
+   ret = xhci_mtk_clks_get(mtk);
+   if (ret)
+   return ret;
 
mtk->lpm_support = of_property_read_bool(node, "usb3-lpm-capable");
/* optional property, ignore the error if it does not exist */
diff --git a/drivers/usb/host/xhci-mtk.h b/drivers/usb/host/xhci-mtk.h
index 67783a7..45ff5c6 100644
--- a/drivers/usb/host/xhci-mtk.h
+++ b/drivers/usb/host/xhci-mtk.h
@@ -126,6 +126,8 @@ struct xhci_hcd_mtk {
struct regulator *vbus;
struct clk *sys_clk;/* sys and mac clock */
struct clk *ref_clk;
+   struct clk *mcu_clk;
+   struct clk *dma_clk;
struct regmap *pericfg;
struct phy **phys;
int num_phys;
-- 
1.7.9.5

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[PATCH 8/9] dt-bindings: usb: mtk-xhci: add a optional property to disable u3ports

[Chunfeng Yun]

Add a new optional property to disable u3ports

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 .../devicetree/bindings/usb/mediatek,mtk-xhci.txt  |2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt 
b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
index 5611a2e..2d9b459 100644
--- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
@@ -38,6 +38,8 @@ Optional properties:
mode;
  - mediatek,syscon-wakeup : phandle to syscon used to access USB wakeup
control register, it depends on "mediatek,wakeup-src".
+ - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
+   bit1 for u3port1, ... etc;
  - vbus-supply : reference to the VBUS regulator;
  - usb3-lpm-capable : supports USB3.0 LPM
  - pinctrl-names : a pinctrl state named "default" must be defined
-- 
1.7.9.5

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[PATCH 9/9] dt-bindings: usb: mtk-xhci: remove dummy clocks and add optional ones

[Chunfeng Yun]

Remove dummy clocks for usb wakeup and add optional ones for
MCU_BUS_CK and DMA_BUS_CK.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 .../devicetree/bindings/usb/mediatek,mtk-xhci.txt  |   18 --
 1 file changed, 8 insertions(+), 10 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt 
b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
index 2d9b459..3059596 100644
--- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
@@ -26,10 +26,11 @@ Required properties:
  - clocks : a list of phandle + clock-specifier pairs, one for each
entry in clock-names
  - clock-names : must contain
-   "sys_ck": for clock of xHCI MAC
-   "ref_ck": for reference clock of xHCI MAC
-   "wakeup_deb_p0": for USB wakeup debounce clock of port0
-   "wakeup_deb_p1": for USB wakeup debounce clock of port1
+   "sys_ck": controller clock used by normal mode,
+   the following ones are optional:
+   "ref_ck": reference clock used by low power mode etc,
+   "mcu_ck": mcu_bus clock for register access,
+   "dma_ck": dma_bus clock for data transfer by DMA
 
  - phys : a list of phandle + phy specifier pairs
 
@@ -57,9 +58,7 @@ usb30: usb@1127 {
clocks = < CLK_TOP_USB30_SEL>, <>,
 < CLK_PERI_USB0>,
 < CLK_PERI_USB1>;
-   clock-names = "sys_ck", "ref_ck",
- "wakeup_deb_p0",
- "wakeup_deb_p1";
+   clock-names = "sys_ck", "ref_ck";
phys = <_port0 PHY_TYPE_USB3>,
   <_port1 PHY_TYPE_USB2>;
vusb33-supply = <_vusb_reg>;
@@ -91,9 +90,8 @@ Required properties:
 
  - clocks : a list of phandle + clock-specifier pairs, one for each
entry in clock-names
- - clock-names : must be
-   "sys_ck": for clock of xHCI MAC
-   "ref_ck": for reference clock of xHCI MAC
+ - clock-names : must contain "sys_ck", and the following ones are optional:
+   "ref_ck", "mcu_ck" and "dma_ck"
 
 Optional properties:
  - vbus-supply : reference to the VBUS regulator;
-- 
1.7.9.5

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[PATCH 7/9] usb: host: modify description for MTK xHCI config

[Chunfeng Yun]

Due to all MediaTek SoCs with xHCI host controller use this
driver, remove limitation for specific SoCs

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/host/Kconfig |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index fa5692d..bc09a2e 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -45,12 +45,12 @@ config USB_XHCI_PLATFORM
  If unsure, say N.
 
 config USB_XHCI_MTK
-   tristate "xHCI support for Mediatek MT65xx/MT7621"
+   tristate "xHCI support for MediaTek SoCs"
select MFD_SYSCON
depends on (MIPS && SOC_MT7621) || ARCH_MEDIATEK || COMPILE_TEST
---help---
  Say 'Y' to enable the support for the xHCI host controller
- found in Mediatek MT65xx SoCs.
+ found in MediaTek SoCs.
  If unsure, say N.
 
 config USB_XHCI_MVEBU
-- 
1.7.9.5

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[PATCH 5/9] usb: xhci-mtk: remove dummy wakeup debounce clocks

[Chunfeng Yun]

The wakeup debounce clocks for each ports in fact are not
needed, so remove them.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/host/xhci-mtk.c |   33 -
 drivers/usb/host/xhci-mtk.h |2 --
 2 files changed, 35 deletions(-)

diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index 97ba51e..d60463c 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -237,25 +237,8 @@ static int xhci_mtk_clks_enable(struct xhci_hcd_mtk *mtk)
goto sys_clk_err;
}
 
-   if (mtk->wakeup_src) {
-   ret = clk_prepare_enable(mtk->wk_deb_p0);
-   if (ret) {
-   dev_err(mtk->dev, "failed to enable wk_deb_p0\n");
-   goto usb_p0_err;
-   }
-
-   ret = clk_prepare_enable(mtk->wk_deb_p1);
-   if (ret) {
-   dev_err(mtk->dev, "failed to enable wk_deb_p1\n");
-   goto usb_p1_err;
-   }
-   }
return 0;
 
-usb_p1_err:
-   clk_disable_unprepare(mtk->wk_deb_p0);
-usb_p0_err:
-   clk_disable_unprepare(mtk->sys_clk);
 sys_clk_err:
clk_disable_unprepare(mtk->ref_clk);
 ref_clk_err:
@@ -264,10 +247,6 @@ static int xhci_mtk_clks_enable(struct xhci_hcd_mtk *mtk)
 
 static void xhci_mtk_clks_disable(struct xhci_hcd_mtk *mtk)
 {
-   if (mtk->wakeup_src) {
-   clk_disable_unprepare(mtk->wk_deb_p1);
-   clk_disable_unprepare(mtk->wk_deb_p0);
-   }
clk_disable_unprepare(mtk->sys_clk);
clk_disable_unprepare(mtk->ref_clk);
 }
@@ -371,18 +350,6 @@ static int usb_wakeup_of_property_parse(struct 
xhci_hcd_mtk *mtk,
if (!mtk->wakeup_src)
return 0;
 
-   mtk->wk_deb_p0 = devm_clk_get(dev, "wakeup_deb_p0");
-   if (IS_ERR(mtk->wk_deb_p0)) {
-   dev_err(dev, "fail to get wakeup_deb_p0\n");
-   return PTR_ERR(mtk->wk_deb_p0);
-   }
-
-   mtk->wk_deb_p1 = devm_clk_get(dev, "wakeup_deb_p1");
-   if (IS_ERR(mtk->wk_deb_p1)) {
-   dev_err(dev, "fail to get wakeup_deb_p1\n");
-   return PTR_ERR(mtk->wk_deb_p1);
-   }
-
mtk->pericfg = syscon_regmap_lookup_by_phandle(dn,
"mediatek,syscon-wakeup");
if (IS_ERR(mtk->pericfg)) {
diff --git a/drivers/usb/host/xhci-mtk.h b/drivers/usb/host/xhci-mtk.h
index db55a12..67783a7 100644
--- a/drivers/usb/host/xhci-mtk.h
+++ b/drivers/usb/host/xhci-mtk.h
@@ -126,8 +126,6 @@ struct xhci_hcd_mtk {
struct regulator *vbus;
struct clk *sys_clk;/* sys and mac clock */
struct clk *ref_clk;
-   struct clk *wk_deb_p0;  /* port0's wakeup debounce clock */
-   struct clk *wk_deb_p1;
struct regmap *pericfg;
struct phy **phys;
int num_phys;
-- 
1.7.9.5

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[PATCH 1/9] usb: xhci-mtk: use dma_set_mask_and_coherent() in probe function

[Chunfeng Yun]

This patch uses the simpler dma_set_mask_and_coherent() instead of
doing these as separate steps

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/host/xhci-mtk.c |7 +--
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index 8fb6065..c197a6d 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -606,15 +606,10 @@ static int xhci_mtk_probe(struct platform_device *pdev)
}
 
/* Initialize dma_mask and coherent_dma_mask to 32-bits */
-   ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
+   ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
if (ret)
goto disable_clk;
 
-   if (!dev->dma_mask)
-   dev->dma_mask = >coherent_dma_mask;
-   else
-   dma_set_mask(dev, DMA_BIT_MASK(32));
-
hcd = usb_create_hcd(driver, dev, dev_name(dev));
if (!hcd) {
ret = -ENOMEM;
-- 
1.7.9.5

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[PATCH 2/9] usb: xhci-mtk: use ports count from xhci in xhci_mtk_sch_init()

[Chunfeng Yun]

Make use of ports count from xhci but not from ippc in
xhci_mtk_sch_init()

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/host/xhci-mtk-sch.c |3 ++-
 drivers/usb/host/xhci-mtk.c |3 ---
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/host/xhci-mtk-sch.c b/drivers/usb/host/xhci-mtk-sch.c
index 6e7ddf6..bfc51bc 100644
--- a/drivers/usb/host/xhci-mtk-sch.c
+++ b/drivers/usb/host/xhci-mtk-sch.c
@@ -287,12 +287,13 @@ static bool need_bw_sch(struct usb_host_endpoint *ep,
 
 int xhci_mtk_sch_init(struct xhci_hcd_mtk *mtk)
 {
+   struct xhci_hcd *xhci = hcd_to_xhci(mtk->hcd);
struct mu3h_sch_bw_info *sch_array;
int num_usb_bus;
int i;
 
/* ss IN and OUT are separated */
-   num_usb_bus = mtk->num_u3_ports * 2 + mtk->num_u2_ports;
+   num_usb_bus = xhci->num_usb3_ports * 2 + xhci->num_usb2_ports;
 
sch_array = kcalloc(num_usb_bus, sizeof(*sch_array), GFP_KERNEL);
if (sch_array == NULL)
diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index c197a6d..9502ca4 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -492,7 +492,6 @@ static void xhci_mtk_quirks(struct device *dev, struct 
xhci_hcd *xhci)
 /* called during probe() after chip reset completes */
 static int xhci_mtk_setup(struct usb_hcd *hcd)
 {
-   struct xhci_hcd *xhci = hcd_to_xhci(hcd);
struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
int ret;
 
@@ -507,8 +506,6 @@ static int xhci_mtk_setup(struct usb_hcd *hcd)
return ret;
 
if (usb_hcd_is_primary_hcd(hcd)) {
-   mtk->num_u3_ports = xhci->num_usb3_ports;
-   mtk->num_u2_ports = xhci->num_usb2_ports;
ret = xhci_mtk_sch_init(mtk);
if (ret)
return ret;
-- 
1.7.9.5

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[PATCH 4/9] usb: xhci-mtk: support option to disable usb3 ports

[Chunfeng Yun]

Add support to disable specific usb3 ports, it's useful when
usb3 phy is shared with PCIe or SATA, because we should disable
the corresponding usb3 port if the phy is used by PCIe or SATA.
Sometimes it's helpful to analyse and solve problems.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/host/xhci-mtk.c |   18 +++---
 drivers/usb/host/xhci-mtk.h |1 +
 2 files changed, 16 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index 7a92bb7..97ba51e 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -92,6 +92,7 @@ static int xhci_mtk_host_enable(struct xhci_hcd_mtk *mtk)
 {
struct mu3c_ippc_regs __iomem *ippc = mtk->ippc_regs;
u32 value, check_val;
+   int u3_ports_disabed = 0;
int ret;
int i;
 
@@ -103,8 +104,13 @@ static int xhci_mtk_host_enable(struct xhci_hcd_mtk *mtk)
value &= ~CTRL1_IP_HOST_PDN;
writel(value, >ip_pw_ctr1);
 
-   /* power on and enable all u3 ports */
+   /* power on and enable u3 ports except skipped ones */
for (i = 0; i < mtk->num_u3_ports; i++) {
+   if ((0x1 << i) & mtk->u3p_dis_msk) {
+   u3_ports_disabed++;
+   continue;
+   }
+
value = readl(>u3_ctrl_p[i]);
value &= ~(CTRL_U3_PORT_PDN | CTRL_U3_PORT_DIS);
value |= CTRL_U3_PORT_HOST_SEL;
@@ -126,7 +132,7 @@ static int xhci_mtk_host_enable(struct xhci_hcd_mtk *mtk)
check_val = STS1_SYSPLL_STABLE | STS1_REF_RST |
STS1_SYS125_RST | STS1_XHCI_RST;
 
-   if (mtk->num_u3_ports)
+   if (mtk->num_u3_ports > u3_ports_disabed)
check_val |= STS1_U3_MAC_RST;
 
ret = readl_poll_timeout(>ip_pw_sts1, value,
@@ -149,8 +155,11 @@ static int xhci_mtk_host_disable(struct xhci_hcd_mtk *mtk)
if (!mtk->has_ippc)
return 0;
 
-   /* power down all u3 ports */
+   /* power down u3 ports except skipped ones */
for (i = 0; i < mtk->num_u3_ports; i++) {
+   if ((0x1 << i) & mtk->u3p_dis_msk)
+   continue;
+
value = readl(>u3_ctrl_p[i]);
value |= CTRL_U3_PORT_PDN;
writel(value, >u3_ctrl_p[i]);
@@ -573,6 +582,9 @@ static int xhci_mtk_probe(struct platform_device *pdev)
}
 
mtk->lpm_support = of_property_read_bool(node, "usb3-lpm-capable");
+   /* optional property, ignore the error if it does not exist */
+   of_property_read_u32(node, "mediatek,u3p-dis-msk",
+>u3p_dis_msk);
 
ret = usb_wakeup_of_property_parse(mtk, node);
if (ret)
diff --git a/drivers/usb/host/xhci-mtk.h b/drivers/usb/host/xhci-mtk.h
index 3aa5e1d..db55a12 100644
--- a/drivers/usb/host/xhci-mtk.h
+++ b/drivers/usb/host/xhci-mtk.h
@@ -121,6 +121,7 @@ struct xhci_hcd_mtk {
bool has_ippc;
int num_u2_ports;
int num_u3_ports;
+   int u3p_dis_msk;
struct regulator *vusb33;
struct regulator *vbus;
struct clk *sys_clk;/* sys and mac clock */
-- 
1.7.9.5

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[PATCH 08/12] usb: mtu3: get optional vbus for host only mode

[Chunfeng Yun]

When dr_mode is set as USB_DR_MODE_HOST, it's better to try to
get optional vbus, this can increase flexibility, although we
can set vbus as always on for regulator or put it in host driver
to turn it on.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/mtu3/mtu3_plat.c |8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/mtu3/mtu3_plat.c b/drivers/usb/mtu3/mtu3_plat.c
index 1e473b0..7ca81f4e 100644
--- a/drivers/usb/mtu3/mtu3_plat.c
+++ b/drivers/usb/mtu3/mtu3_plat.c
@@ -300,10 +300,6 @@ static int get_ssusb_rscs(struct platform_device *pdev, 
struct ssusb_mtk *ssusb)
of_property_read_u32(node, "mediatek,u3p-dis-msk",
 >u3p_dis_msk);
 
-   if (ssusb->dr_mode != USB_DR_MODE_OTG)
-   return 0;
-
-   /* if dual-role mode is supported */
vbus = devm_regulator_get(>dev, "vbus");
if (IS_ERR(vbus)) {
dev_err(dev, "failed to get vbus\n");
@@ -311,6 +307,10 @@ static int get_ssusb_rscs(struct platform_device *pdev, 
struct ssusb_mtk *ssusb)
}
otg_sx->vbus = vbus;
 
+   if (ssusb->dr_mode == USB_DR_MODE_HOST)
+   return 0;
+
+   /* if dual-role mode is supported */
otg_sx->is_u3_drd = of_property_read_bool(node, "mediatek,usb3-drd");
otg_sx->manual_drd_enabled =
of_property_read_bool(node, "enable-manual-drd");
-- 
1.7.9.5

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[PATCH 09/12] usb: mtu3: set invalid dr_mode as dual-role mode

[Chunfeng Yun]

Treat dr_mode of USB_DR_MODE_UNKNOWN as USB_DR_MODE_OTG to
enhance functional robustness.

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/mtu3/mtu3_plat.c |6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/mtu3/mtu3_plat.c b/drivers/usb/mtu3/mtu3_plat.c
index 7ca81f4e..9ff3357 100644
--- a/drivers/usb/mtu3/mtu3_plat.c
+++ b/drivers/usb/mtu3/mtu3_plat.c
@@ -283,10 +283,8 @@ static int get_ssusb_rscs(struct platform_device *pdev, 
struct ssusb_mtk *ssusb)
return PTR_ERR(ssusb->ippc_base);
 
ssusb->dr_mode = usb_get_dr_mode(dev);
-   if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN) {
-   dev_err(dev, "dr_mode is error\n");
-   return -EINVAL;
-   }
+   if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN)
+   ssusb->dr_mode = USB_DR_MODE_OTG;
 
if (ssusb->dr_mode == USB_DR_MODE_PERIPHERAL)
return 0;
-- 
1.7.9.5

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[PATCH 05/12] usb: mtu3: support 36-bit DMA address

[Chunfeng Yun]

add support for 36-bit DMA address

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/mtu3/mtu3.h |   17 ++-
 drivers/usb/mtu3/mtu3_core.c|   34 -
 drivers/usb/mtu3/mtu3_hw_regs.h |   10 
 drivers/usb/mtu3/mtu3_qmu.c |  102 ---
 4 files changed, 142 insertions(+), 21 deletions(-)

diff --git a/drivers/usb/mtu3/mtu3.h b/drivers/usb/mtu3/mtu3.h
index 2795294..ef2dc92 100644
--- a/drivers/usb/mtu3/mtu3.h
+++ b/drivers/usb/mtu3/mtu3.h
@@ -46,6 +46,9 @@
 #defineMU3D_EP_RXCR1(epnum)(U3D_RX1CSR1 + (((epnum) - 1) * 0x10))
 #defineMU3D_EP_RXCR2(epnum)(U3D_RX1CSR2 + (((epnum) - 1) * 0x10))
 
+#define USB_QMU_TQHIAR(epnum)  (U3D_TXQHIAR1 + (((epnum) - 1) * 0x4))
+#define USB_QMU_RQHIAR(epnum)  (U3D_RXQHIAR1 + (((epnum) - 1) * 0x4))
+
 #define USB_QMU_RQCSR(epnum)   (U3D_RXQCSR1 + (((epnum) - 1) * 0x10))
 #define USB_QMU_RQSAR(epnum)   (U3D_RXQSAR1 + (((epnum) - 1) * 0x10))
 #define USB_QMU_RQCPR(epnum)   (U3D_RXQCPR1 + (((epnum) - 1) * 0x10))
@@ -138,23 +141,33 @@ struct mtu3_fifo_info {
  * Checksum value is calculated over the 16 bytes of the GPD by default;
  * @data_buf_len (RX ONLY): This value indicates the length of
  * the assigned data buffer
+ * @tx_ext_addr (TX ONLY): [3:0] are 4 extension bits of @buffer,
+ * [7:4] are 4 extension bits of @next_gpd
  * @next_gpd: Physical address of the next GPD
  * @buffer: Physical address of the data buffer
  * @buf_len:
  * (TX): This value indicates the length of the assigned data buffer
  * (RX): The total length of data received
  * @ext_len: reserved
+ * @rx_ext_addr(RX ONLY): [3:0] are 4 extension bits of @buffer,
+ * [7:4] are 4 extension bits of @next_gpd
  * @ext_flag:
  * bit5 (TX ONLY): Zero Length Packet (ZLP),
  */
 struct qmu_gpd {
__u8 flag;
__u8 chksum;
-   __le16 data_buf_len;
+   union {
+   __le16 data_buf_len;
+   __le16 tx_ext_addr;
+   };
__le32 next_gpd;
__le32 buffer;
__le16 buf_len;
-   __u8 ext_len;
+   union {
+   __u8 ext_len;
+   __u8 rx_ext_addr;
+   };
__u8 ext_flag;
 } __packed;
 
diff --git a/drivers/usb/mtu3/mtu3_core.c b/drivers/usb/mtu3/mtu3_core.c
index 9475798..cd4528f 100644
--- a/drivers/usb/mtu3/mtu3_core.c
+++ b/drivers/usb/mtu3/mtu3_core.c
@@ -17,6 +17,7 @@
  *
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -759,7 +760,31 @@ static void mtu3_hw_exit(struct mtu3 *mtu)
mtu3_mem_free(mtu);
 }
 
-/*-*/
+/**
+ * we set 32-bit DMA mask by default, here check whether the controller
+ * supports 36-bit DMA or not, if it does, set 36-bit DMA mask.
+ */
+static int mtu3_set_dma_mask(struct mtu3 *mtu)
+{
+   struct device *dev = mtu->dev;
+   bool is_36bit = false;
+   int ret = 0;
+   u32 value;
+
+   value = mtu3_readl(mtu->mac_base, U3D_MISC_CTRL);
+   if (value & DMA_ADDR_36BIT) {
+   is_36bit = true;
+   ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(36));
+   /* If set 36-bit DMA mask fails, fall back to 32-bit DMA mask */
+   if (ret) {
+   is_36bit = false;
+   ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
+   }
+   }
+   dev_info(dev, "dma mask: %s bits\n", is_36bit ? "36" : "32");
+
+   return ret;
+}
 
 int ssusb_gadget_init(struct ssusb_mtk *ssusb)
 {
@@ -820,6 +845,12 @@ int ssusb_gadget_init(struct ssusb_mtk *ssusb)
return ret;
}
 
+   ret = mtu3_set_dma_mask(mtu);
+   if (ret) {
+   dev_err(dev, "mtu3 set dma_mask failed:%d\n", ret);
+   goto dma_mask_err;
+   }
+
ret = devm_request_irq(dev, mtu->irq, mtu3_irq, 0, dev_name(dev), mtu);
if (ret) {
dev_err(dev, "request irq %d failed!\n", mtu->irq);
@@ -845,6 +876,7 @@ int ssusb_gadget_init(struct ssusb_mtk *ssusb)
 gadget_err:
device_init_wakeup(dev, false);
 
+dma_mask_err:
 irq_err:
mtu3_hw_exit(mtu);
ssusb->u3d = NULL;
diff --git a/drivers/usb/mtu3/mtu3_hw_regs.h b/drivers/usb/mtu3/mtu3_hw_regs.h
index 06b2966..b605975 100644
--- a/drivers/usb/mtu3/mtu3_hw_regs.h
+++ b/drivers/usb/mtu3/mtu3_hw_regs.h
@@ -58,6 +58,8 @@
 #define U3D_QCR1   (SSUSB_DEV_BASE + 0x0404)
 #define U3D_QCR2   (SSUSB_DEV_BASE + 0x0408)
 #define U3D_QCR3   (SSUSB_DEV_BASE + 0x040C)
+#define U3D_TXQHIAR1   (SSUSB_DEV_BASE + 0x0484)
+#define U3D_RXQHIAR1   (SSUSB_DEV_BASE + 0x04C4)
 
 #define U3D_TXQCSR1(SSUSB_DEV_BASE + 0x0510)
 #define U3D_TXQSAR1(SSUSB_DEV_BASE + 0x0514)
@@ -189,6 +191,13 @@
 #define QMU_RX_COZ(x)  (BIT(16)

[PATCH 04/12] usb: mtu3: add optional mcu and dma bus clocks

[Chunfeng Yun]

There are mcu_bus and dma_bus clocks needed to be turned on/off by
driver on some SoCs, so add them as optional ones

Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com>
---
 drivers/usb/mtu3/mtu3.h  |5 ++
 drivers/usb/mtu3/mtu3_plat.c |  121 --
 2 files changed, 86 insertions(+), 40 deletions(-)

diff --git a/drivers/usb/mtu3/mtu3.h b/drivers/usb/mtu3/mtu3.h
index 6d3278e..2795294 100644
--- a/drivers/usb/mtu3/mtu3.h
+++ b/drivers/usb/mtu3/mtu3.h
@@ -206,6 +206,9 @@ struct otg_switch_mtk {
  * @ippc_base: register base address of IP Power and Clock interface (IPPC)
  * @vusb33: usb3.3V shared by device/host IP
  * @sys_clk: system clock of mtu3, shared by device/host IP
+ * @ref_clk: reference clock
+ * @mcu_clk: mcu_bus_ck clock for AHB bus etc
+ * @dma_clk: dma_bus_ck clock for AXI bus etc
  * @dr_mode: works in which mode:
  * host only, device only or dual-role mode
  * @u2_ports: number of usb2.0 host ports
@@ -226,6 +229,8 @@ struct ssusb_mtk {
struct regulator *vusb33;
struct clk *sys_clk;
struct clk *ref_clk;
+   struct clk *mcu_clk;
+   struct clk *dma_clk;
/* otg */
struct otg_switch_mtk otg_switch;
enum usb_dr_mode dr_mode;
diff --git a/drivers/usb/mtu3/mtu3_plat.c b/drivers/usb/mtu3/mtu3_plat.c
index 9edad30..fb89920 100644
--- a/drivers/usb/mtu3/mtu3_plat.c
+++ b/drivers/usb/mtu3/mtu3_plat.c
@@ -110,15 +110,9 @@ static void ssusb_phy_power_off(struct ssusb_mtk *ssusb)
phy_power_off(ssusb->phys[i]);
 }
 
-static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
+static int ssusb_clks_enable(struct ssusb_mtk *ssusb)
 {
-   int ret = 0;
-
-   ret = regulator_enable(ssusb->vusb33);
-   if (ret) {
-   dev_err(ssusb->dev, "failed to enable vusb33\n");
-   goto vusb33_err;
-   }
+   int ret;
 
ret = clk_prepare_enable(ssusb->sys_clk);
if (ret) {
@@ -132,6 +126,52 @@ static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
goto ref_clk_err;
}
 
+   ret = clk_prepare_enable(ssusb->mcu_clk);
+   if (ret) {
+   dev_err(ssusb->dev, "failed to enable mcu_clk\n");
+   goto mcu_clk_err;
+   }
+
+   ret = clk_prepare_enable(ssusb->dma_clk);
+   if (ret) {
+   dev_err(ssusb->dev, "failed to enable dma_clk\n");
+   goto dma_clk_err;
+   }
+
+   return 0;
+
+dma_clk_err:
+   clk_disable_unprepare(ssusb->mcu_clk);
+mcu_clk_err:
+   clk_disable_unprepare(ssusb->ref_clk);
+ref_clk_err:
+   clk_disable_unprepare(ssusb->sys_clk);
+sys_clk_err:
+   return ret;
+}
+
+static void ssusb_clks_disable(struct ssusb_mtk *ssusb)
+{
+   clk_disable_unprepare(ssusb->dma_clk);
+   clk_disable_unprepare(ssusb->mcu_clk);
+   clk_disable_unprepare(ssusb->ref_clk);
+   clk_disable_unprepare(ssusb->sys_clk);
+}
+
+static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
+{
+   int ret = 0;
+
+   ret = regulator_enable(ssusb->vusb33);
+   if (ret) {
+   dev_err(ssusb->dev, "failed to enable vusb33\n");
+   goto vusb33_err;
+   }
+
+   ret = ssusb_clks_enable(ssusb);
+   if (ret)
+   goto clks_err;
+
ret = ssusb_phy_init(ssusb);
if (ret) {
dev_err(ssusb->dev, "failed to init phy\n");
@@ -149,20 +189,16 @@ static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
 phy_err:
ssusb_phy_exit(ssusb);
 phy_init_err:
-   clk_disable_unprepare(ssusb->ref_clk);
-ref_clk_err:
-   clk_disable_unprepare(ssusb->sys_clk);
-sys_clk_err:
+   ssusb_clks_disable(ssusb);
+clks_err:
regulator_disable(ssusb->vusb33);
 vusb33_err:
-
return ret;
 }
 
 static void ssusb_rscs_exit(struct ssusb_mtk *ssusb)
 {
-   clk_disable_unprepare(ssusb->sys_clk);
-   clk_disable_unprepare(ssusb->ref_clk);
+   ssusb_clks_disable(ssusb);
regulator_disable(ssusb->vusb33);
ssusb_phy_power_off(ssusb);
ssusb_phy_exit(ssusb);
@@ -203,6 +239,19 @@ static int get_iddig_pinctrl(struct ssusb_mtk *ssusb)
return 0;
 }
 
+/* ignore the error if the clock does not exist */
+static struct clk *get_optional_clk(struct device *dev, const char *id)
+{
+   struct clk *opt_clk;
+
+   opt_clk = devm_clk_get(dev, id);
+   /* ignore error number except EPROBE_DEFER */
+   if (IS_ERR(opt_clk) && (PTR_ERR(opt_clk) != -EPROBE_DEFER))
+   opt_clk = NULL;
+
+   return opt_clk;
+}
+
 static int get_ssusb_rscs(struct platform_device *pdev, struct ssusb_mtk 
*ssusb)
 {
struct device_node *node = pdev->dev.of_node;
@@ -225,18 +274,17 @@ static int get_ssusb_rscs(struct platform_device *pdev, 
struct ssusb_mtk *ssusb)
return PTR_ERR(ssusb->