Re: [linux-yocto] [PATCH] usb: dwc2: combine platform specific data for Intel Agilex and Stratix10

2023-07-17 Thread Meng Li via lists.yoctoproject.org 
Hi Bruce,

Sorry! I send the wrong patch, it is the old one.
Please discard this patch. I will send the new one in later.

Thanks,
LImeng

> -Original Message-
> From: linux-yocto@lists.yoctoproject.org 
> On Behalf Of Meng Li via lists.yoctoproject.org
> Sent: Tuesday, July 18, 2023 11:50 AM
> To: bruce.ashfi...@gmail.com
> Cc: linux-yocto@lists.yoctoproject.org
> Subject: [linux-yocto] [PATCH] usb: dwc2: combine platform specific data for
> Intel Agilex and Stratix10
> 
> Intel Stratix10 is very the same with Agilex platform, the DWC2 IP on the 
> Stratix
> platform also does not support clock-gating. So, based on commit
> 3d8d3504d233("usb: dwc2: Add platform specific data for Intel's Agilex"),
> combine platform specific data for Intel Agilex and
> Stratix10 together. In additional, in order to avoid breaking the old device 
> tree,
> keep compatible string "intel,socfpga-agilex-hsotg" unchanged.
> 
> Signed-off-by: Meng Li 
> ---
>  Documentation/devicetree/bindings/usb/dwc2.yaml   | 2 ++
>  arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 4 ++--
>  drivers/usb/dwc2/params.c | 6 --
>  3 files changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml
> b/Documentation/devicetree/bindings/usb/dwc2.yaml
> index dc4988c0009c..c98ca98d5033 100644
> --- a/Documentation/devicetree/bindings/usb/dwc2.yaml
> +++ b/Documentation/devicetree/bindings/usb/dwc2.yaml
> @@ -51,6 +51,7 @@ properties:
>- amlogic,meson-gxbb-usb
>- amlogic,meson-g12a-usb
>- intel,socfpga-agilex-hsotg
> +  - intel,socfpga-hsotg
>- const: snps,dwc2
>- const: amcc,dwc-otg
>- const: apm,apm82181-dwc-otg
> @@ -64,6 +65,7 @@ properties:
>- const: snps,dwc2
>- const: samsung,s3c6400-hsotg
>- const: intel,socfpga-agilex-hsotg
> +  - const: intel,socfpga-hsotg
> 
>reg:
>  maxItems: 1
> diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> index ea788a920eab..c5a51636f657 100644
> --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> @@ -490,7 +490,7 @@ usbphy0: usbphy@0 {
>   };
> 
>   usb0: usb@ffb0 {
> - compatible = "snps,dwc2";
> + compatible = "intel,socfpga-hsotg", "snps,dwc2";
>   reg = <0xffb0 0x4>;
>   interrupts = <0 93 4>;
>   phys = <>;
> @@ -504,7 +504,7 @@ usb0: usb@ffb0 {
>   };
> 
>   usb1: usb@ffb4 {
> - compatible = "snps,dwc2";
> + compatible = "intel,socfpga-hsotg", "snps,dwc2";
>   reg = <0xffb4 0x4>;
>   interrupts = <0 94 4>;
>   phys = <>;
> diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c index
> 8eab5f38b110..6bb27a24e9e1 100644
> --- a/drivers/usb/dwc2/params.c
> +++ b/drivers/usb/dwc2/params.c
> @@ -93,7 +93,7 @@ static void dwc2_set_s3c6400_params(struct dwc2_hsotg
> *hsotg)
>   p->phy_utmi_width = 8;
>  }
> 
> -static void dwc2_set_socfpga_agilex_params(struct dwc2_hsotg *hsotg)
> +static void dwc2_set_socfpga_params(struct dwc2_hsotg *hsotg)
>  {
>   struct dwc2_core_params *p = >params;
> 
> @@ -266,7 +266,9 @@ const struct of_device_id dwc2_of_match_table[] = {
>   { .compatible = "st,stm32mp15-hsotg",
> .data = dwc2_set_stm32mp15_hsotg_params },
>   { .compatible = "intel,socfpga-agilex-hsotg",
> -   .data = dwc2_set_socfpga_agilex_params },
> +   .data = dwc2_set_socfpga_params },
> + { .compatible = "intel,socfpga-hsotg",
> +   .data = dwc2_set_socfpga_params },
>   {},
>  };
>  MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
> --
> 2.34.1


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[linux-yocto] [PATCH] usb: dwc2: combine platform specific data for Intel Agilex and Stratix10

2023-07-17 Thread Meng Li via lists.yoctoproject.org 
Intel Stratix10 is very the same with Agilex platform, the DWC2 IP on
the Stratix platform also does not support clock-gating. So, based on
commit 3d8d3504d233("usb: dwc2: Add platform specific data for
Intel's Agilex"), combine platform specific data for Intel Agilex and
Stratix10 together. In additional, in order to avoid breaking the old
device tree, keep compatible string "intel,socfpga-agilex-hsotg" unchanged.

Signed-off-by: Meng Li 
---
 Documentation/devicetree/bindings/usb/dwc2.yaml   | 2 ++
 arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 4 ++--
 drivers/usb/dwc2/params.c | 6 --
 3 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml 
b/Documentation/devicetree/bindings/usb/dwc2.yaml
index dc4988c0009c..c98ca98d5033 100644
--- a/Documentation/devicetree/bindings/usb/dwc2.yaml
+++ b/Documentation/devicetree/bindings/usb/dwc2.yaml
@@ -51,6 +51,7 @@ properties:
   - amlogic,meson-gxbb-usb
   - amlogic,meson-g12a-usb
   - intel,socfpga-agilex-hsotg
+  - intel,socfpga-hsotg
   - const: snps,dwc2
   - const: amcc,dwc-otg
   - const: apm,apm82181-dwc-otg
@@ -64,6 +65,7 @@ properties:
   - const: snps,dwc2
   - const: samsung,s3c6400-hsotg
   - const: intel,socfpga-agilex-hsotg
+  - const: intel,socfpga-hsotg
 
   reg:
 maxItems: 1
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi 
b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index ea788a920eab..c5a51636f657 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -490,7 +490,7 @@ usbphy0: usbphy@0 {
};
 
usb0: usb@ffb0 {
-   compatible = "snps,dwc2";
+   compatible = "intel,socfpga-hsotg", "snps,dwc2";
reg = <0xffb0 0x4>;
interrupts = <0 93 4>;
phys = <>;
@@ -504,7 +504,7 @@ usb0: usb@ffb0 {
};
 
usb1: usb@ffb4 {
-   compatible = "snps,dwc2";
+   compatible = "intel,socfpga-hsotg", "snps,dwc2";
reg = <0xffb4 0x4>;
interrupts = <0 94 4>;
phys = <>;
diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index 8eab5f38b110..6bb27a24e9e1 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -93,7 +93,7 @@ static void dwc2_set_s3c6400_params(struct dwc2_hsotg *hsotg)
p->phy_utmi_width = 8;
 }
 
-static void dwc2_set_socfpga_agilex_params(struct dwc2_hsotg *hsotg)
+static void dwc2_set_socfpga_params(struct dwc2_hsotg *hsotg)
 {
struct dwc2_core_params *p = >params;
 
@@ -266,7 +266,9 @@ const struct of_device_id dwc2_of_match_table[] = {
{ .compatible = "st,stm32mp15-hsotg",
  .data = dwc2_set_stm32mp15_hsotg_params },
{ .compatible = "intel,socfpga-agilex-hsotg",
- .data = dwc2_set_socfpga_agilex_params },
+ .data = dwc2_set_socfpga_params },
+   { .compatible = "intel,socfpga-hsotg",
+ .data = dwc2_set_socfpga_params },
{},
 };
 MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
-- 
2.34.1


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[linux-yocto] [PATCH] usb: dwc2: combine platform specific data for Intel Agilex and Stratix10

2023-07-16 Thread Meng Li via lists.yoctoproject.org 
Intel Stratix10 is very the same with Agilex platform, the DWC2 IP on
the Stratix platform also does not support clock-gating. So, based on
commit 3d8d3504d233("usb: dwc2: Add platform specific data for
Intel's Agilex"), combine platform specific data for Intel Agilex and
Stratix10 together. In additional, in order to avoid breaking the old
device tree, keep compatible string "intel,socfpga-agilex-hsotg" unchanged.

Signed-off-by: Meng Li 
---
 Documentation/devicetree/bindings/usb/dwc2.yaml   | 2 ++
 arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 4 ++--
 drivers/usb/dwc2/params.c | 6 --
 3 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml 
b/Documentation/devicetree/bindings/usb/dwc2.yaml
index dc4988c0009c..c98ca98d5033 100644
--- a/Documentation/devicetree/bindings/usb/dwc2.yaml
+++ b/Documentation/devicetree/bindings/usb/dwc2.yaml
@@ -51,6 +51,7 @@ properties:
   - amlogic,meson-gxbb-usb
   - amlogic,meson-g12a-usb
   - intel,socfpga-agilex-hsotg
+  - intel,socfpga-hsotg
   - const: snps,dwc2
   - const: amcc,dwc-otg
   - const: apm,apm82181-dwc-otg
@@ -64,6 +65,7 @@ properties:
   - const: snps,dwc2
   - const: samsung,s3c6400-hsotg
   - const: intel,socfpga-agilex-hsotg
+  - const: intel,socfpga-hsotg
 
   reg:
 maxItems: 1
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi 
b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index ea788a920eab..c5a51636f657 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -490,7 +490,7 @@ usbphy0: usbphy@0 {
};
 
usb0: usb@ffb0 {
-   compatible = "snps,dwc2";
+   compatible = "intel,socfpga-hsotg", "snps,dwc2";
reg = <0xffb0 0x4>;
interrupts = <0 93 4>;
phys = <>;
@@ -504,7 +504,7 @@ usb0: usb@ffb0 {
};
 
usb1: usb@ffb4 {
-   compatible = "snps,dwc2";
+   compatible = "intel,socfpga-hsotg", "snps,dwc2";
reg = <0xffb4 0x4>;
interrupts = <0 94 4>;
phys = <>;
diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index 8eab5f38b110..6bb27a24e9e1 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -93,7 +93,7 @@ static void dwc2_set_s3c6400_params(struct dwc2_hsotg *hsotg)
p->phy_utmi_width = 8;
 }
 
-static void dwc2_set_socfpga_agilex_params(struct dwc2_hsotg *hsotg)
+static void dwc2_set_socfpga_params(struct dwc2_hsotg *hsotg)
 {
struct dwc2_core_params *p = >params;
 
@@ -266,7 +266,9 @@ const struct of_device_id dwc2_of_match_table[] = {
{ .compatible = "st,stm32mp15-hsotg",
  .data = dwc2_set_stm32mp15_hsotg_params },
{ .compatible = "intel,socfpga-agilex-hsotg",
- .data = dwc2_set_socfpga_agilex_params },
+ .data = dwc2_set_socfpga_params },
+   { .compatible = "intel,socfpga-hsotg",
+ .data = dwc2_set_socfpga_params },
{},
 };
 MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
-- 
2.34.1


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