[linux-yocto] USB mouse is not working in Yocto image

2016-02-16 Thread winiston 
Dear, 

I have created the qt4e-demo-image using poky. It was successfully created. But 
USB mouse is not working. 

What could be the problem? How do I enable USB host & X11 features in my distro 
?

Host system : Ubuntu 14.04
Target machine : AM437x-evm

If you need any more details, please let me know.

Regards,
Winiston.P
Futura Automation Pvt Ltd.

Ph :91-80-28375290 / 28375295
Fax :91-80-28375291



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linux-yocto@yoctoproject.org
https://lists.yoctoproject.org/listinfo/linux-yocto

[linux-yocto] [PATCH 3/7] pca9685: PCA9685 PWM and GPIO multi-function device.

2016-02-16 Thread Saul Wold 
From: Josef Ahmad 

There is also a driver for the same chip in drivers/pwm. This version
has support for setting the output in GPIO mode in addition to the PWM
mode.

Upstream-status: Forward-ported from Intel IOT Develper Kit Quark BSP

Signed-off-by: Ismo Puustinen 
---
 drivers/mfd/Kconfig   |  10 ++
 drivers/mfd/Makefile  |   2 +
 drivers/mfd/pca9685-core.c| 308 ++
 drivers/mfd/pca9685-gpio.c| 108 
 drivers/mfd/pca9685-pwm.c | 262 +
 drivers/mfd/pca9685.h | 110 
 include/linux/platform_data/pca9685.h |  51 ++
 7 files changed, 851 insertions(+)
 create mode 100644 drivers/mfd/pca9685-core.c
 create mode 100644 drivers/mfd/pca9685-gpio.c
 create mode 100644 drivers/mfd/pca9685-pwm.c
 create mode 100644 drivers/mfd/pca9685.h
 create mode 100644 include/linux/platform_data/pca9685.h

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index d5ad04d..a7983b2 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -334,6 +334,16 @@ config MFD_INTEL_MSIC
  Passage) chip. This chip embeds audio, battery, GPIO, etc.
  devices used in Intel Medfield platforms.
 
+config MFD_PCA9685
+   tristate "NPX Semiconductors PCA9685 (PWM/GPIO) driver"
+   depends on GPIOLIB && I2C && PWM
+   select REGMAP_I2C
+   help
+ NPX PCA9685 I2C-bus PWM controller with GPIO output interface support.
+ The I2C-bus LED controller provides 16-channel, 12-bit PWM Fm+.
+ Additionally, the driver allows the channels to be configured as GPIO
+ interface (output only).
+
 config MFD_IPAQ_MICRO
bool "Atmel Micro ASIC (iPAQ h3100/h3600/h3700) Support"
depends on SA1100_H3100 || SA1100_H3600
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 0e5cfeb..d043a1b 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -138,6 +138,8 @@ obj-$(CONFIG_MFD_DB8500_PRCMU)  += db8500-prcmu.o
 obj-$(CONFIG_AB8500_CORE)  += ab8500-core.o ab8500-sysctrl.o
 obj-$(CONFIG_MFD_TIMBERDALE)+= timberdale.o
 obj-$(CONFIG_PMIC_ADP5520) += adp5520.o
+pca9685-objs   := pca9685-core.o pca9685-gpio.o pca9685-pwm.o
+obj-$(CONFIG_MFD_PCA9685)  += pca9685.o
 obj-$(CONFIG_MFD_KEMPLD)   += kempld-core.o
 obj-$(CONFIG_MFD_INTEL_QUARK_I2C_GPIO) += intel_quark_i2c_gpio.o
 obj-$(CONFIG_LPC_SCH)  += lpc_sch.o
diff --git a/drivers/mfd/pca9685-core.c b/drivers/mfd/pca9685-core.c
new file mode 100644
index 000..3f63b6d
--- /dev/null
+++ b/drivers/mfd/pca9685-core.c
@@ -0,0 +1,308 @@
+/*
+ * Driver for NPX PCA9685 I2C-bus PWM controller with GPIO output interface
+ * support.
+ *
+ * Copyright(c) 2013-2015 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The I2C-bus LED controller provides 16-channel, 12-bit PWM Fm+.
+ * Additionally, the driver allows the channels to be configured as GPIO
+ * interface (output only).
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "pca9685.h"
+
+static unsigned int en_invrt;
+module_param(en_invrt, uint, 0);
+MODULE_PARM_DESC(en_invrt, "Enable output logic state inverted mode");
+
+static unsigned int en_open_dr;
+module_param(en_open_dr, uint, 0);
+MODULE_PARM_DESC(en_open_dr,
+   "The outputs are configured with an open-drain structure");
+
+static int gpio_base = -1; /*  requests dynamic ID allocation */
+module_param(gpio_base, int, 0);
+MODULE_PARM_DESC(gpio_base, "GPIO base number");
+
+static unsigned int pwm_period = PWM_PERIOD_DEF; /* PWM clock period */
+module_param(pwm_period, uint, 0);
+MODULE_PARM_DESC(pwm_period, "PWM clock period (nanoseconds)");
+
+static bool pca9685_register_volatile(struct device *dev, unsigned int reg)
+{
+   if (unlikely(reg == PCA9685_MODE1))
+   return true;
+   else
+   return false;
+}
+
+static struct regmap_config pca9685_regmap_i2c_config = {
+   .reg_bits = 8,
+   .val_bits = 8,
+   .max_register = PCA9685_NUMREGS,
+   .volatile_reg = pca9685_register_volatile,
+   .cache_type   = REGCACHE_RBTREE,
+};
+
+ssize_t pca9685_pwm_period_sysfs_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+   struct pca9685 *pca = dev_get_drvdata(dev);
+
+   return

[linux-yocto] [PATCH 1/7] acpi: added a custom DSDT file.

2016-02-16 Thread Saul Wold 
From: Ismo Puustinen 

The file has fixed GPIO IRQ assignment and moved SPI devices to be under
the SPI bus in the ACPI definitions as assumed by ACPI version 5.

Upstream-status: Inappropriate, custom firmware

Signed-off-by: Ismo Puustinen 
---
 include/DSDT.hex | 1191 ++
 1 file changed, 1191 insertions(+)
 create mode 100644 include/DSDT.hex

diff --git a/include/DSDT.hex b/include/DSDT.hex
new file mode 100644
index 000..b1e2960
--- /dev/null
+++ b/include/DSDT.hex
@@ -0,0 +1,1191 @@
+/*
+ * Copyright (c) 2013 Intel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, 
this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 
LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * 
+ * Intel ACPI Component Architecture
+ * ASL+ Optimizing Compiler version 20150515-64
+ * Copyright (c) 2000 - 2015 Intel Corporation
+ * 
+ * Compilation of "dsdt-fixed-spi.dsl" - Wed Sep 23 12:49:37 2015
+ * 
+ * C source code output
+ * AML code block contains 0x23F5 bytes
+ *
+ */
+unsigned char AmlCode[] =
+{
+0x44,0x53,0x44,0x54,0xF5,0x23,0x00,0x00,  /* "DSDT.#.." */
+0x01,0xD3,0x49,0x4E,0x54,0x45,0x4C,0x20,  /* 0008"..INTEL " */
+0x51,0x75,0x61,0x72,0x6B,0x4E,0x63,0x53,  /* 0010"QuarkNcS" */
+0x03,0x00,0x00,0x00,0x49,0x4E,0x54,0x4C,  /* 0018"INTL" */
+0x15,0x05,0x15,0x20,0x08,0x47,0x50,0x49,  /* 0020"... .GPI" */
+0x43,0x00,0x5B,0x80,0x44,0x42,0x47,0x30,  /* 0028"C.[.DBG0" */
+0x01,0x0A,0x80,0x01,0x5B,0x81,0x0B,0x44,  /* 0030"[..D" */
+0x42,0x47,0x30,0x01,0x49,0x4F,0x38,0x30,  /* 0038"BG0.IO80" */
+0x08,0x5B,0x80,0x41,0x43,0x4D,0x53,0x01,  /* 0040".[.ACMS." */
+0x0A,0x72,0x0A,0x02,0x5B,0x81,0x10,0x41,  /* 0048".r..[..A" */
+0x43,0x4D,0x53,0x01,0x49,0x4E,0x44,0x58,  /* 0050"CMS.INDX" */
+0x08,0x44,0x41,0x54,0x41,0x08,0x5B,0x80,  /* 0058".DATA.[." */
+0x4D,0x4E,0x56,0x53,0x00,0x0C,0x90,0x8C,  /* 0060"MNVS" */
+0x1C,0x0F,0x0B,0x00,0x02,0x5B,0x81,0x45,  /* 0068".[.E" */
+0x07,0x4D,0x4E,0x56,0x53,0x01,0x4F,0x53,  /* 0070".MNVS.OS" */
+0x54,0x50,0x20,0x43,0x46,0x47,0x44,0x20,  /* 0078"TP CFGD " */
+0x48,0x50,0x45,0x41,0x20,0x50,0x31,0x42,  /* 0080"HPEA P1B" */
+0x42,0x20,0x50,0x42,0x41,0x42,0x20,0x47,  /* 0088"B PBAB G" */
+0x50,0x30,0x42,0x20,0x47,0x50,0x41,0x42,  /* 0090"P0B GPAB" */
+0x20,0x53,0x4D,0x42,0x42,0x20,0x4E,0x52,  /* 0098" SMBB NR" */
+0x56,0x31,0x20,0x57,0x44,0x54,0x42,0x20,  /* 00A0"V1 WDTB " */
+0x48,0x50,0x54,0x42,0x20,0x48,0x50,0x54,  /* 00A8"HPTB HPT" */
+0x53,0x20,0x50,0x45,0x58,0x42,0x20,0x50,  /* 00B0"S PEXB P" */
+0x45,0x58,0x53,0x20,0x52,0x43,0x42,0x42,  /* 00B8"EXS RCBB" */
+0x20,0x52,0x43,0x42,0x53,0x20,0x41,0x50,  /* 00C0" RCBS AP" */
+0x43,0x42,0x20,0x41,0x50,0x43,0x53,0x20,  /* 00C8"CB APCS " */
+0x54,0x50,0x4D,0x50,0x20,0x44,0x42,0x47,  /* 00D0"TPMP DBG" */
+0x50,0x20,0x50,0x54,0x59,0x50,0x20,0x41,  /* 00D8"P PTYP A" */
+0x4C,0x54,0x53,0x20,0x5B,0x80,0x47,0x50,  /* 00E0"LTS [.GP" */
+0x45,0x42,0x01,0x0B,0x00,0x11,0x0A,0x40,  /* 00E8"EB.@" */
+0x5B,0x81,0x13,0x47,0x50,0x45,0x42,0x00,  /* 00F0"[..GPEB." */
+0x00,0x40,0x08,0x53,0x4D,0x49,0x45,0x20,  /* 00F8".@.SMIE " */
+0x53,0x4D,0x49,0x53,0x20,0x10,0x12,0x5F,  /* 0100"SMIS .._" */
+0x50,0x52,0x5F,0x5B,0x83,0x0B,0x43,0x50,  /* 0108"PR_[..CP" */
+0x55,0x30,0x01,0x10,0x10,0x00,0x00,0x06,  /* 0110"U0.." */
+

[linux-yocto] [PATCH 5/7] staging:iio: add support for ADC1x8s102.

2016-02-16 Thread Saul Wold 
From: Todor Minchev 

Original author is Bogdan Pricop .

Upstream-status: Forward-ported from Intel IOT Develper Kit Quark BSP

Signed-off-by: Ismo Puustinen 
---
 drivers/staging/iio/adc/Kconfig  |  13 ++
 drivers/staging/iio/adc/Makefile |   1 +
 drivers/staging/iio/adc/adc1x8s102.c | 387 +++
 include/linux/platform_data/adc1x8s102.h |  30 +++
 4 files changed, 431 insertions(+)
 create mode 100644 drivers/staging/iio/adc/adc1x8s102.c
 create mode 100644 include/linux/platform_data/adc1x8s102.h

diff --git a/drivers/staging/iio/adc/Kconfig b/drivers/staging/iio/adc/Kconfig
index d0016ce..7d295a6 100644
--- a/drivers/staging/iio/adc/Kconfig
+++ b/drivers/staging/iio/adc/Kconfig
@@ -115,4 +115,17 @@ config SPEAR_ADC
 
  To compile this driver as a module, choose M here: the
  module will be called spear_adc.
+
+config ADC1x8S102
+   tristate "Texas Instruments ADC1x8S102 driver"
+   depends on SPI
+   select IIO_BUFFER
+   select IIO_TRIGGERED_BUFFER
+   help
+   Say yes here to build support for Texas Instruments ADC1x8S102 
ADC.
+   Provides direct access via sysfs.
+
+   To compile this driver as a module, choose M here: the module 
will
+   be called adc1x8s102
+
 endmenu
diff --git a/drivers/staging/iio/adc/Makefile b/drivers/staging/iio/adc/Makefile
index 1c4277d..3fe3880 100644
--- a/drivers/staging/iio/adc/Makefile
+++ b/drivers/staging/iio/adc/Makefile
@@ -15,3 +15,4 @@ obj-$(CONFIG_AD7280) += ad7280a.o
 obj-$(CONFIG_LPC32XX_ADC) += lpc32xx_adc.o
 obj-$(CONFIG_MXS_LRADC) += mxs-lradc.o
 obj-$(CONFIG_SPEAR_ADC) += spear_adc.o
+obj-$(CONFIG_ADC1x8S102) += adc1x8s102.o
diff --git a/drivers/staging/iio/adc/adc1x8s102.c 
b/drivers/staging/iio/adc/adc1x8s102.c
new file mode 100644
index 000..52472e2
--- /dev/null
+++ b/drivers/staging/iio/adc/adc1x8s102.c
@@ -0,0 +1,387 @@
+/*
+ * ADC1x8S102 SPI ADC driver
+ *
+ * Copyright(c) 2013 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * This IIO device driver is is designed to work with the following
+ * analog to digital converters from Texas Instruments:
+ *  ADC108S102
+ *  ADC128S102
+ * The communication with ADC chip is via the SPI bus (mode 3).
+ */
+
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+/*
+ * Defining the ADC resolution being 12 bits, we can use the same driver for
+ * both ADC108S102 (10 bits resolution) and ADC128S102 (12 bits resolution)
+ * chips. The ADC108S102 effectively returns a 12-bit result with the 2
+ * least-significant bits unset.
+ */
+#define ADC1x8S102_BITS12
+#define ADC1x8S102_MAX_CHANNELS8
+
+/* 16-bit SPI command format:
+ *   [15:14] Ignored
+ *   [13:11] 3-bit channel address
+ *   [10:0]  Ignored
+ */
+#define ADC1x8S102_CMD(ch) (((ch) << (8)) << (3))
+
+/*
+ * 16-bit SPI response format:
+ *   [15:12] Zeros
+ *   [11:0]  12-bit ADC sample (for ADC108S102, [1:0] will always be 0).
+ */
+#define ADC1x8S102_RES_DATA(res)   (res & ((1 << ADC1x8S102_BITS) - 1))
+
+struct adc1x8s102_state {
+   struct spi_device   *spi;
+   struct regulator*reg;
+   u16 ext_vin;
+   /* SPI transfer used by triggered buffer handler*/
+   struct spi_transfer ring_xfer;
+   /* SPI transfer used by direct scan */
+   struct spi_transfer scan_single_xfer;
+   /* SPI message used by ring_xfer SPI transfer */
+   struct spi_message  ring_msg;
+   /* SPI message used by scan_single_xfer SPI transfer */
+   struct spi_message  scan_single_msg;
+
+   /* SPI message buffers:
+*  tx_buf: |C0|C1|C2|C3|C4|C5|C6|C7|XX|
+*  rx_buf: |XX|R0|R1|R2|R3|R4|R5|R6|R7|tt|tt|tt|tt|
+*
+*  tx_buf: 8 channel read commands, plus 1 dummy command
+*  rx_buf: 1 dummy response, 8 channel responses, plus 64-bit timestamp
+*/
+   __be16  rx_buf[13] cacheline_aligned;
+   __be16  tx_buf[9];
+
+};
+
+#define ADC1X8S102_V_CHAN(index)   \
+   {   \
+   .type = IIO_VOLTAGE,\
+   .indexed = 1,

[linux-yocto] [PATCH 7/7] gpio-pca953x: add "drive" property.

2016-02-16 Thread Saul Wold 
From: Ismo Puustinen 

Galileo gen 2 has support for setting GPIO modes. Expose these
properties through the GPIO sysfs interface. This approach is bit hacky,
since it changes the interface semantics.

The original patch was by Josef Ahmad  and
made on top of kernel 3.8.

Upstream-status: Forward-ported from Intel IOT Develper Kit Quark BSP

Signed-off-by: Ismo Puustinen 
---
 drivers/gpio/gpio-pca953x.c   | 57 +++
 drivers/gpio/gpiolib-sysfs.c  | 78 +++
 drivers/gpio/gpiolib.c| 18 ++
 drivers/gpio/gpiolib.h|  7 +++-
 include/asm-generic/gpio.h|  5 +++
 include/linux/gpio.h  | 10 ++
 include/linux/gpio/consumer.h | 11 ++
 include/linux/gpio/driver.h   |  2 ++
 8 files changed, 180 insertions(+), 8 deletions(-)

diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index 0227cde..8f49bd6 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -39,6 +39,9 @@
 #define PCA957X_MSK6
 #define PCA957X_INTS   7
 
+#define PCA953X_PUPD_EN35
+#define PCA953X_PUPD_SEL   36
+
 #define PCA_GPIO_MASK  0x00FF
 #define PCA_INT0x0100
 #define PCA953X_TYPE   0x1000
@@ -374,6 +377,43 @@ exit:
mutex_unlock(>i2c_lock);
 }
 
+static int pca953x_gpio_set_drive(struct gpio_chip *gc,
+unsigned off, unsigned mode)
+{
+   struct pca953x_chip *chip;
+   int ret = 0;
+   int val;
+
+   chip = container_of(gc, struct pca953x_chip, gpio_chip);
+
+   if (chip->chip_type != PCA953X_TYPE)
+   return -EINVAL;
+
+   mutex_lock(>i2c_lock);
+
+   switch (mode) {
+   case GPIOF_DRIVE_PULLUP:
+   ret = pca953x_write_single(chip, PCA953X_PUPD_EN, 1, off) ||
+   pca953x_write_single(chip, PCA953X_PUPD_SEL, 1, 
off);
+   break;
+   case GPIOF_DRIVE_PULLDOWN:
+   ret = pca953x_write_single(chip, PCA953X_PUPD_EN, 1, off) ||
+   pca953x_write_single(chip, PCA953X_PUPD_SEL, 0, 
off);
+   break;
+   case GPIOF_DRIVE_STRONG:
+   case GPIOF_DRIVE_HIZ:
+   ret = pca953x_read_single(chip, PCA953X_PUPD_EN, , off) ||
+   pca953x_write_single(chip, PCA953X_PUPD_EN, 0, 
off) ||
+   pca953x_write_single(chip, PCA953X_PUPD_SEL, 
val, off);
+   break;
+   default:
+   ret = -EINVAL;
+   }
+
+   mutex_unlock(>i2c_lock);
+   return ret;
+}
+
 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
 {
struct gpio_chip *gc;
@@ -392,6 +432,9 @@ static void pca953x_setup_gpio(struct pca953x_chip *chip, 
int gpios)
gc->dev = >client->dev;
gc->owner = THIS_MODULE;
gc->names = chip->names;
+
+   if (chip->chip_type == PCA953X_TYPE)
+   gc->set_drive = pca953x_gpio_set_drive;
 }
 
 #ifdef CONFIG_GPIO_PCA953X_IRQ
@@ -548,7 +591,7 @@ static irqreturn_t pca953x_irq_handler(int irq, void *devid)
 }
 
 static int pca953x_irq_setup(struct pca953x_chip *chip,
-int irq_base)
+int irq_base)
 {
struct i2c_client *client = chip->client;
int ret, i, offset = 0;
@@ -591,10 +634,10 @@ static int pca953x_irq_setup(struct pca953x_chip *chip,
}
 
ret =  gpiochip_irqchip_add(>gpio_chip,
-   _irq_chip,
-   irq_base,
-   handle_simple_irq,
-   IRQ_TYPE_NONE);
+   _irq_chip,
+   irq_base,
+   handle_simple_irq,
+   IRQ_TYPE_NONE);
if (ret) {
dev_err(>dev,
"could not connect irqchip to gpiochip\n");
@@ -607,7 +650,7 @@ static int pca953x_irq_setup(struct pca953x_chip *chip,
 
 #else /* CONFIG_GPIO_PCA953X_IRQ */
 static int pca953x_irq_setup(struct pca953x_chip *chip,
-int irq_base)
+int irq_base)
 {
struct i2c_client *client = chip->client;
 
@@ -628,7 +671,7 @@ static int device_pca953x_init(struct pca953x_chip *chip, 
u32 invert)
goto out;
 
ret = pca953x_read_regs(chip, PCA953X_DIRECTION,
-  chip->reg_direction);
+  chip->reg_direction);
if (ret)
goto out;
 
diff --git a/drivers/gpio/gpiolib-sysfs.c b/drivers/gpio/gpiolib-sysfs.c
index af3bc7a..4f90f69

[linux-yocto] [PATCH 2/7] gpio: pca953x: provide GPIO base based on _UID

2016-02-16 Thread Saul Wold 
From: Andy Shevchenko 

Custom kernel for Intel Galileo Gen2 provides and moreover libmraa relies on
the continuous GPIO space. To do such we have to configure GPIO base per each
GPIO expander. The only value we can use is the ACPI _UID.

Signed-off-by: Andy Shevchenko 

Upstream-status: Inappropriate, custom code for legacy userspace
---
 drivers/gpio/gpio-pca953x.c | 44 +---
 1 file changed, 37 insertions(+), 7 deletions(-)

diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index 32a56d5..0227cde 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -76,12 +76,6 @@ static const struct i2c_device_id pca953x_id[] = {
 };
 MODULE_DEVICE_TABLE(i2c, pca953x_id);
 
-static const struct acpi_device_id pca953x_acpi_ids[] = {
-   { "INT3491", 16 | PCA953X_TYPE | PCA_INT, },
-   { }
-};
-MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
-
 #define MAX_BANK 5
 #define BANK_SZ 8
 
@@ -108,6 +102,35 @@ struct pca953x_chip {
unsigned long driver_data;
 };
 
+struct pca953x_info {
+   kernel_ulong_t driver_data;
+   void (*setup)(struct pca953x_chip *chip);
+};
+
+static void pca953x_setup_int3491(struct pca953x_chip *chip)
+{
+   struct acpi_device *adev = ACPI_COMPANION(>client->dev);
+   unsigned int uid;
+
+   if (kstrtouint(acpi_device_uid(adev), 0, ) || !uid--)
+   return;
+
+   chip->gpio_start = 8 /* sch_gpio */ +
+  8 /* gpio-dwapb */ +
+ 16 /* pca9535 */ * uid;
+}
+
+static const struct pca953x_info pca953x_info_int3491 = {
+   .driver_data = 16 | PCA953X_TYPE | PCA_INT,
+   .setup = pca953x_setup_int3491,
+};
+
+static const struct acpi_device_id pca953x_acpi_ids[] = {
+   { "INT3491",  (kernel_ulong_t)_info_int3491 },
+   { }
+};
+MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
+
 static inline struct pca953x_chip *to_pca(struct gpio_chip *gc)
 {
return container_of(gc, struct pca953x_chip, gpio_chip);
@@ -679,12 +702,19 @@ static int pca953x_probe(struct i2c_client *client,
chip->driver_data = id->driver_data;
} else {
const struct acpi_device_id *id;
+   const struct pca953x_info *info;
 
id = acpi_match_device(pca953x_acpi_ids, >dev);
if (!id)
return -ENODEV;
 
-   chip->driver_data = id->driver_data;
+   info = (struct pca953x_info *)id->driver_data;
+   if (!info)
+   return -ENODEV;
+
+   chip->driver_data = info->driver_data;
+   if (info->setup)
+   info->setup(chip);
}
 
chip->chip_type = PCA_CHIP_TYPE(chip->driver_data);
-- 
2.5.0

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[linux-yocto] [PATCH 4/7] spi-pxa2xx: fixed ACPI-based enumeration of SPI devices.

2016-02-16 Thread Saul Wold 
From: Ismo Puustinen 

Slave devices were not enumerated by ACPI data because the ACPI handle
for the spi-pxa2xx controller was NULL if it was itself enumerated by
PCI.

Upstream-status: Inappropriate, real fix forthcoming

Signed-off-by: Ismo Puustinen 
---
 drivers/spi/spi-pxa2xx-pci.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/spi/spi-pxa2xx-pci.c b/drivers/spi/spi-pxa2xx-pci.c
index fa7399e..c5a7111 100644
--- a/drivers/spi/spi-pxa2xx-pci.c
+++ b/drivers/spi/spi-pxa2xx-pci.c
@@ -170,6 +170,7 @@ static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
memset(, 0, sizeof(pi));
pi.parent = >dev;
pi.name = "pxa2xx-spi";
+   pi.fwnode = dev->dev.fwnode;
pi.id = ssp->port_id;
pi.data = _pdata;
pi.size_data = sizeof(spi_pdata);
-- 
2.5.0

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[linux-yocto] [PATCH 0/7] Galileo Patches - non-upstreamed

2016-02-16 Thread Saul Wold 
Bruce,

This is  this is a set of patches for 4.1, there is another similar 
that I will be sending shortly for 4.4. The only difference between 
the 4.1 and 4.4 patch set is 07/07 gpio-pca953x does not apply to 4.4,
the other 6 do

These patches are mostly targeted to Galileo Gen2 and deal with the
SPI/PWN/GPIO devices.

If we need to put these in a Galiloe branch vs standard/base, let 
me know how to proceed.

Sau!

Andy Shevchenko (1):
  gpio: pca953x: provide GPIO base based on _UID

Ismo Puustinen (4):
  acpi: added a custom DSDT file.
  spi-pxa2xx: fixed ACPI-based enumeration of SPI devices.
  adc1x8s102: support ACPI-based enumeration.
  gpio-pca953x: add "drive" property.

Josef Ahmad (1):
  pca9685: PCA9685 PWM and GPIO multi-function device.

Todor Minchev (1):
  staging:iio: add support for ADC1x8s102.

 drivers/gpio/gpio-pca953x.c  |  101 ++-
 drivers/gpio/gpiolib-sysfs.c |   78 ++
 drivers/gpio/gpiolib.c   |   18 +
 drivers/gpio/gpiolib.h   |7 +-
 drivers/mfd/Kconfig  |   10 +
 drivers/mfd/Makefile |2 +
 drivers/mfd/pca9685-core.c   |  308 
 drivers/mfd/pca9685-gpio.c   |  108 +++
 drivers/mfd/pca9685-pwm.c|  262 +++
 drivers/mfd/pca9685.h|  110 +++
 drivers/spi/spi-pxa2xx-pci.c |1 +
 drivers/staging/iio/adc/Kconfig  |   13 +
 drivers/staging/iio/adc/Makefile |1 +
 drivers/staging/iio/adc/adc1x8s102.c |  437 +++
 include/DSDT.hex | 1191 ++
 include/asm-generic/gpio.h   |5 +
 include/linux/gpio.h |   10 +
 include/linux/gpio/consumer.h|   11 +
 include/linux/gpio/driver.h  |2 +
 include/linux/platform_data/adc1x8s102.h |   30 +
 include/linux/platform_data/pca9685.h|   51 ++
 21 files changed, 2741 insertions(+), 15 deletions(-)
 create mode 100644 drivers/mfd/pca9685-core.c
 create mode 100644 drivers/mfd/pca9685-gpio.c
 create mode 100644 drivers/mfd/pca9685-pwm.c
 create mode 100644 drivers/mfd/pca9685.h
 create mode 100644 drivers/staging/iio/adc/adc1x8s102.c
 create mode 100644 include/DSDT.hex
 create mode 100644 include/linux/platform_data/adc1x8s102.h
 create mode 100644 include/linux/platform_data/pca9685.h

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Re: [linux-yocto] [PATCH v2 00/12] intel-common: add intel-developer-drivers.scc to preempt-rt BSPS

2016-02-16 Thread Sullivan, California L 
On 02/12/2016 07:48 PM, Paul Gortmaker wrote:
> [[PATCH v2 00/12] intel-common: add intel-developer-drivers.scc to preempt-rt 
> BSPS] On 12/02/2016 (Fri 17:42) California Sullivan wrote:
>
>> Since we include the developer ktype we should include developer drivers.
>>
>> Signed-off-by: California Sullivan 
>> ---
>>  bsp/intel-common/intel-core2-32-preempt-rt.scc  | 1 +
>>  bsp/intel-common/intel-corei7-64-preempt-rt.scc | 1 +
>>  2 files changed, 2 insertions(+)
>>
>> diff --git a/bsp/intel-common/intel-core2-32-preempt-rt.scc 
>> b/bsp/intel-common/intel-core2-32-preempt-rt.scc
>> index 08c2ba4..b9be439 100644
>> --- a/bsp/intel-common/intel-core2-32-preempt-rt.scc
>> +++ b/bsp/intel-common/intel-core2-32-preempt-rt.scc
>> @@ -5,4 +5,5 @@ define KARCH i386
>>  include ktypes/preempt-rt/preempt-rt.scc
>>  include intel-common-drivers.scc
>>  include intel-common-drivers-32.scc
>> +include intel-developer-drivers.scc
> I can't tell for sure, because all patches came out with the bogus
> number of 00/12, but mutt shows this patch ahead of the patch that
> actually created intel-developer-drivers.scc ; it has to be after
> or you'll break bisection.
>
> P.
> --
Yeap, I borked the numbering when adding v2 to the subject line. Sorry
about that.

---
Cal

>
>>  include intel-core2-32.scc
>> diff --git a/bsp/intel-common/intel-corei7-64-preempt-rt.scc 
>> b/bsp/intel-common/intel-corei7-64-preempt-rt.scc
>> index 386931c..bee6bba 100644
>> --- a/bsp/intel-common/intel-corei7-64-preempt-rt.scc
>> +++ b/bsp/intel-common/intel-corei7-64-preempt-rt.scc
>> @@ -4,4 +4,5 @@ define KARCH x86_64
>>  
>>  include ktypes/preempt-rt/preempt-rt.scc
>>  include intel-common-drivers.scc
>> +include intel-developer-drivers.scc
>>  include intel-corei7-64.scc
>> -- 
>> 2.5.0
>>

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Re: [linux-yocto] [PATCH 0/3] Backport Capabilities Patches to 4.1

2016-02-16 Thread Saul Wold 
On Tue, 2016-02-16 at 09:38 -0500, Bruce Ashfield wrote:
> On 16-02-11 11:16 AM, Saul Wold wrote:
> > 
> > Add the Capabilities support that some projects would like to use
> > in the linux-yocto-4.1 kernel.
> > 
> > These 3 are all upstream in 4.3 or later
> 
> I've staged the patches, and pushed them out. SRCREV updates to
> follow
> shortly (preferably after the 4.4 issues with PAT are sorted out).
> 
I am also working on the final set of Galileo Gen2 patches that are not
backportes, doing build and test currently.

Sau!

> Bruce
> 
> > 
> > Thanks
> > Sau!
> > 
> > 
> > Andy Lutomirski (3):
> >    capabilities: ambient capabilities
> >    selftests/capabilities: Add tests for capability evolution
> >    capabilities: add a securebit to disable PR_CAP_AMBIENT_RAISE
> > 
> >   fs/proc/array.c|   5 +-
> >   include/linux/cred.h   |   8 +
> >   include/uapi/linux/prctl.h |   7 +
> >   include/uapi/linux/securebits.h|  11 +-
> >   kernel/user_namespace.c|   1 +
> >   security/commoncap.c   | 103 -
> >   security/keys/process_keys.c   |   1 +
> >   tools/testing/selftests/capabilities/.gitignore|   2 +
> >   tools/testing/selftests/capabilities/Makefile  |  18 +
> >   tools/testing/selftests/capabilities/test_execve.c | 427
> > +
> >   .../testing/selftests/capabilities/validate_cap.c  |  73 
> >   11 files changed, 644 insertions(+), 12 deletions(-)
> >   create mode 100644
> > tools/testing/selftests/capabilities/.gitignore
> >   create mode 100644 tools/testing/selftests/capabilities/Makefile
> >   create mode 100644
> > tools/testing/selftests/capabilities/test_execve.c
> >   create mode 100644
> > tools/testing/selftests/capabilities/validate_cap.c
> > 
> 
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Re: [linux-yocto] [PATCH 0/3] Backport Capabilities Patches to 4.1

2016-02-16 Thread Bruce Ashfield 

On 16-02-11 11:16 AM, Saul Wold wrote:


Add the Capabilities support that some projects would like to use
in the linux-yocto-4.1 kernel.

These 3 are all upstream in 4.3 or later


I've staged the patches, and pushed them out. SRCREV updates to follow
shortly (preferably after the 4.4 issues with PAT are sorted out).

Bruce



Thanks
Sau!


Andy Lutomirski (3):
   capabilities: ambient capabilities
   selftests/capabilities: Add tests for capability evolution
   capabilities: add a securebit to disable PR_CAP_AMBIENT_RAISE

  fs/proc/array.c|   5 +-
  include/linux/cred.h   |   8 +
  include/uapi/linux/prctl.h |   7 +
  include/uapi/linux/securebits.h|  11 +-
  kernel/user_namespace.c|   1 +
  security/commoncap.c   | 103 -
  security/keys/process_keys.c   |   1 +
  tools/testing/selftests/capabilities/.gitignore|   2 +
  tools/testing/selftests/capabilities/Makefile  |  18 +
  tools/testing/selftests/capabilities/test_execve.c | 427 +
  .../testing/selftests/capabilities/validate_cap.c  |  73 
  11 files changed, 644 insertions(+), 12 deletions(-)
  create mode 100644 tools/testing/selftests/capabilities/.gitignore
  create mode 100644 tools/testing/selftests/capabilities/Makefile
  create mode 100644 tools/testing/selftests/capabilities/test_execve.c
  create mode 100644 tools/testing/selftests/capabilities/validate_cap.c



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