Re: [linux-yocto] [PATCH] ARM: dts: am335x-boneblack: configure i2c1 and 2

2016-06-01 Thread Bruce Ashfield

On 2016-06-01 9:27 PM, Yong Li wrote:

Thanks Nishanth!

Hi Bruce, based on the discussion, please merge the
5d1a2961adf906f965b00eb8059fd2e0585e0e09 from
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git.


While that is a better upstream reference, the patch didn't cherry
pick cleanly into the 4.4 kernel.

Have you tried that same cherry pick ?

Regardless if the patch does come over cleanly, knowing that it worked
in a run time test would be better.

Bruce



Regarding I2C1 support, let me try to find/submit another patch.

Thanks,
Yong

2016-06-02 3:22 GMT+08:00 Bruce Ashfield :

On 2016-06-01 02:33 PM, Nishanth Menon wrote:


On 06/01/2016 01:29 PM, Bruce Ashfield wrote:


On 2016-05-31 10:43 PM, Li, Yong B wrote:


Thanks Nishanth for your information. I find the 5d1a2961adf9 commit in
linux-omap. It seems to me that it only enables the I2C2 bus. Is it correct?
We want to enable both the I2C1 and I2C2 buses for external i2c devices.



As long as it works for what you need (i.e. you've tested it), and
the patch is from some public repo that I can refernece. I'm ok
with merging it.


Hi Bruce, the original source for the patch is
https://github.com/nmenon/powertool/blob/master/kernel-patches/0001-v3.15.0-ARM-dts-am335x-boneblack-configure-i2c1-and-2.patch



That's fine with me, can you update the commit log and re-submit the
patch ? Preferably with a short summary of how you tested the change
as well.




the patch was created by me on an ancient kernel previously because
there was no dt overlay support. neither i2c1 nor i2c2 are necessary
for BBB to function. as the original author of the patch, I have to
request a NAK. it was specifically done for a power measurement tool
that i had written which runs on BBB (it uses i2c to read INA226
measurement IC)



Aha! Thanks for the history.

We definitely want/need the modern support for the buses and addons.
So I'll drop this merge.

Bruce








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Re: [linux-yocto] [PATCH] ARM: dts: am335x-boneblack: configure i2c1 and 2

2016-06-01 Thread Yong Li
Thanks Nishanth!

Hi Bruce, based on the discussion, please merge the
5d1a2961adf906f965b00eb8059fd2e0585e0e09 from
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git.

Regarding I2C1 support, let me try to find/submit another patch.

Thanks,
Yong

2016-06-02 3:22 GMT+08:00 Bruce Ashfield :
> On 2016-06-01 02:33 PM, Nishanth Menon wrote:
>>
>> On 06/01/2016 01:29 PM, Bruce Ashfield wrote:
>>>
>>> On 2016-05-31 10:43 PM, Li, Yong B wrote:

 Thanks Nishanth for your information. I find the 5d1a2961adf9 commit in
 linux-omap. It seems to me that it only enables the I2C2 bus. Is it 
 correct?
 We want to enable both the I2C1 and I2C2 buses for external i2c devices.

>>>
>>> As long as it works for what you need (i.e. you've tested it), and
>>> the patch is from some public repo that I can refernece. I'm ok
>>> with merging it.
>>>
 Hi Bruce, the original source for the patch is
 https://github.com/nmenon/powertool/blob/master/kernel-patches/0001-v3.15.0-ARM-dts-am335x-boneblack-configure-i2c1-and-2.patch
>>>
>>>
>>> That's fine with me, can you update the commit log and re-submit the
>>> patch ? Preferably with a short summary of how you tested the change
>>> as well.
>>
>>
>>
>> the patch was created by me on an ancient kernel previously because
>> there was no dt overlay support. neither i2c1 nor i2c2 are necessary
>> for BBB to function. as the original author of the patch, I have to
>> request a NAK. it was specifically done for a power measurement tool
>> that i had written which runs on BBB (it uses i2c to read INA226
>> measurement IC)
>
>
> Aha! Thanks for the history.
>
> We definitely want/need the modern support for the buses and addons.
> So I'll drop this merge.
>
> Bruce
>
>>
>>
>
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Re: [linux-yocto] [PATCH] ARM: dts: am335x-boneblack: configure i2c1 and 2

2016-06-01 Thread Bruce Ashfield

On 2016-05-31 10:43 PM, Li, Yong B wrote:

Thanks Nishanth for your information. I find the 5d1a2961adf9 commit in 
linux-omap. It seems to me that it only enables the I2C2 bus. Is it correct? We 
want to enable both the I2C1 and I2C2 buses for external i2c devices.



As long as it works for what you need (i.e. you've tested it), and
the patch is from some public repo that I can refernece. I'm ok
with merging it.


Hi Bruce, the original source for the patch is 
https://github.com/nmenon/powertool/blob/master/kernel-patches/0001-v3.15.0-ARM-dts-am335x-boneblack-configure-i2c1-and-2.patch


That's fine with me, can you update the commit log and re-submit the
patch ? Preferably with a short summary of how you tested the change
as well.

Bruce



Thanks,
Yong
-Original Message-
From: Nishanth Menon [mailto:n...@ti.com]
Sent: Wednesday, June 1, 2016 2:42 AM
To: Ashfield, Bruce (Wind River) ; Li, Yong B 
; linux-yocto@yoctoproject.org; s...@linux.intel.com; Wold, Saul 

Cc: sdliy...@gmail.com
Subject: Re: [PATCH] ARM: dts: am335x-boneblack: configure i2c1 and 2

On 05/31/2016 12:36 PM, Bruce Ashfield wrote:

On 2016-05-31 3:00 AM, Yong Li wrote:

From: Nishanth Menon 

Configure i2c1 and 2 at 400KHz.

Signed-off-by: Nishanth Menon 

Upstream-status: Inappropriate, not author


Since you aren't the author, is there a public link that you can
reference for the source of the patch ?

We should have that, so we can show that it is unmodified as part of
the merge, and for tracking purposes.



If you folks want to support Capes, you might be better off picking up upstream 
commit for the same.

5d1a2961adf9 ARM: dts: Beaglebone i2c definitions


The patch was probably done on earlier kernel, I cannot see this on TI product 
4.1/4.4 kernels

--
Regards,
Nishanth Menon



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Re: [linux-yocto] [PULL REQUEST] add standard/bxt-rebase branch

2016-06-01 Thread Tom Zanussi
On 06/01/2016 12:24 PM, Bruce Ashfield wrote:
> On 2016-06-01 1:21 PM, Tom Zanussi wrote:
>> On 06/01/2016 11:57 AM, Bruce Ashfield wrote:
>>> On 2016-06-01 12:56 PM, Tom Zanussi wrote:
 On 06/01/2016 11:50 AM, Bruce Ashfield wrote:
> On 2016-06-01 11:36 AM, Saul Wold wrote:
>> On Tue, 2016-05-31 at 23:31 -0400, Bruce Ashfield wrote:
>>>
>>> On 2016-05-31 6:24 PM, Ranostay, Matt wrote:


 This pull request is for adding the standard/bxt-rebase branch with
 has various backports from 4.6 and 4.5, which are have an
 unacceptable risk of breaking other platforms.
 This is based on standard/intel and will be rebased. Thus nobody
 should expect the history to be linear.
>>> Seems sane to me.
>>>
>>> One minor question though. To keep the branch naming and inheritance
>>> sane, I'd create this as standard/intel/bxt-rebase
>>>
>>> Any objections ?
>>>
>> This is actually what I had asked for (standard/intel/bxt-rebase)
>> so no
>> objections here.
>
> And crap. I wasn't thinking clearly when I created standard/intel,
> that
> now needs to become standard/intel/base.
>
> We'll run into the git fetch not being able to update local copies of
> the repo (unless they are full cleared).
>
> I typically do create these as /base .. but forgot this time.
>
> Tom: we need to coordinate KBRANCH updates .. how did you want to do
> that ?
>

 Hmm, I thought the plan was to have a standard/intel based on
 standard/base, which is what we have...

 All this rebase stuff should be based on standard/intel, right?
>>>
>>> Yep, and if we want to show that inheritance properly, it shouldbve
>>> standard/intel/ .. that's the kicker.
>>>
>>
>> So why can't we do something like standard/intel-rebase-branch based on
>> standard/intel and avoid the problem, since these are supposed to be
>> temporary one-off staging branches anyway?
> 
> I could live with standard/intel-rebase, it doesn't exactly match the
> inheritance notation .. but it is close enough.
> 

I think that's fine - the original intent was to have standard/intel,
standard/preempt/intel, etc, be THE common Intel branches for all (or
all who wanted to be) Intel BSPs to be based off of.

It wasn't until later that it became apparent that some BSPs would
temporarily have a need for even more half-baked patches than could even
go into standard/*/intel, and the -rebase idea was introduced.

So to me it doesn't seem appropriate for the half-baked stuff to drive
the overall cleanliness of the branch layout... But then it's not up to
me - the whole scheme was introduced to make it easier to satisfy our
'customers' who would benefit from the more timely (if possibly
less-baked) platform support.  If anyone objects to the intel-rebase vs
intel/rebase scheme, please speak up...

Tom


> I've made a note to generate all future repos with /base
> 
> Bruce
> 
>>
>> Tom
>>
>>> Bruce
>>>

 Tom


> Bruce
>
>>
>> Sau!
>>
>>>
>>> Bruce
>>>



 The following changes since commit
 53e84104c5e68eb468823dd0d262a64623d01a55:

   mmc: mmc: Fix partition switch timeout for some eMMCs (2016-05-
 19
 17:15:25 -0700)

 are available in the git repository at:

   git://sandbox.sakoman.com/linux-yocto-4.4.git standard/bxt-rebase

 for you to fetch changes up to
 1203930e034957e1fc9e0c4842ecd7922d5e0897:

   [UPSTREAM] ASoC: skylake: added WARN_ON invalid dsp (2016-05-27
 17:21:19 -0700)

 
 Aaron Plattner (1):
   ALSA: hda - Add new GPU codec ID 0x10de0083 to snd-hda

 Adrian Hunter (4):
   mmc: core: Add a facility to "pause" re-tuning
   mmc: block: Pause re-tuning while switched to the RPMB
 partition
   mmc: block: Always switch back to main area after RPMB access
   mmc: sdhci-pci: Remove MMC_CAP_BUS_WIDTH_TEST for Intel
 controller

 Alan (1):
   ASoC: Intel: Skylake: fix pointer scaling

 Alan Cox (1):
   ASoC: Intel: Skylake: remove bogus comparison of an array
 with NULL

 Alex Dai (2):
   drm/i915/guc: Add GuC css header parser
   drm/i915/guc: Clean up locks in GuC

 Alex Goins (2):
   i915: wait for fence in mmio_flip_work_func
   i915: wait for fence in prepare_plane_fb

 Ander Conselvan de Oliveira (10):
   drm/i915: Don't pass *DP around to link training functions
   drm/i915: Split write of pattern to DP reg from
 intel_dp_set_link_train

Re: [linux-yocto] [PULL REQUEST] add standard/bxt-rebase branch

2016-06-01 Thread Bruce Ashfield

On 2016-06-01 1:21 PM, Tom Zanussi wrote:

On 06/01/2016 11:57 AM, Bruce Ashfield wrote:

On 2016-06-01 12:56 PM, Tom Zanussi wrote:

On 06/01/2016 11:50 AM, Bruce Ashfield wrote:

On 2016-06-01 11:36 AM, Saul Wold wrote:

On Tue, 2016-05-31 at 23:31 -0400, Bruce Ashfield wrote:


On 2016-05-31 6:24 PM, Ranostay, Matt wrote:



This pull request is for adding the standard/bxt-rebase branch with
has various backports from 4.6 and 4.5, which are have an
unacceptable risk of breaking other platforms.
This is based on standard/intel and will be rebased. Thus nobody
should expect the history to be linear.

Seems sane to me.

One minor question though. To keep the branch naming and inheritance
sane, I'd create this as standard/intel/bxt-rebase

Any objections ?


This is actually what I had asked for (standard/intel/bxt-rebase) so no
objections here.


And crap. I wasn't thinking clearly when I created standard/intel, that
now needs to become standard/intel/base.

We'll run into the git fetch not being able to update local copies of
the repo (unless they are full cleared).

I typically do create these as /base .. but forgot this time.

Tom: we need to coordinate KBRANCH updates .. how did you want to do
that ?



Hmm, I thought the plan was to have a standard/intel based on
standard/base, which is what we have...

All this rebase stuff should be based on standard/intel, right?


Yep, and if we want to show that inheritance properly, it shouldbve
standard/intel/ .. that's the kicker.



So why can't we do something like standard/intel-rebase-branch based on
standard/intel and avoid the problem, since these are supposed to be
temporary one-off staging branches anyway?


I could live with standard/intel-rebase, it doesn't exactly match the
inheritance notation .. but it is close enough.

I've made a note to generate all future repos with /base

Bruce



Tom


Bruce



Tom



Bruce



Sau!



Bruce





The following changes since commit
53e84104c5e68eb468823dd0d262a64623d01a55:

  mmc: mmc: Fix partition switch timeout for some eMMCs (2016-05-
19
17:15:25 -0700)

are available in the git repository at:

  git://sandbox.sakoman.com/linux-yocto-4.4.git standard/bxt-rebase

for you to fetch changes up to
1203930e034957e1fc9e0c4842ecd7922d5e0897:

  [UPSTREAM] ASoC: skylake: added WARN_ON invalid dsp (2016-05-27
17:21:19 -0700)


Aaron Plattner (1):
  ALSA: hda - Add new GPU codec ID 0x10de0083 to snd-hda

Adrian Hunter (4):
  mmc: core: Add a facility to "pause" re-tuning
  mmc: block: Pause re-tuning while switched to the RPMB
partition
  mmc: block: Always switch back to main area after RPMB access
  mmc: sdhci-pci: Remove MMC_CAP_BUS_WIDTH_TEST for Intel
controller

Alan (1):
  ASoC: Intel: Skylake: fix pointer scaling

Alan Cox (1):
  ASoC: Intel: Skylake: remove bogus comparison of an array
with NULL

Alex Dai (2):
  drm/i915/guc: Add GuC css header parser
  drm/i915/guc: Clean up locks in GuC

Alex Goins (2):
  i915: wait for fence in mmio_flip_work_func
  i915: wait for fence in prepare_plane_fb

Ander Conselvan de Oliveira (10):
  drm/i915: Don't pass *DP around to link training functions
  drm/i915: Split write of pattern to DP reg from
intel_dp_set_link_train
  drm/i915 Call get_adjust_train() from clock recovery and
channel eq
  drm/i915: Move register write into
intel_dp_set_signal_levels()
  drm/i915: Move generic link training code to a separate file
  drm/i915: Create intel_dp->prepare_link_retrain() hook
  drm/i915: Make intel_dp_source_supports_hbr2() take an
intel_dp pointer
  drm/i915: Fix SKL i_boost level
  drm/i915: Don't do edp panel detection in g4x_dp_detect()
  drm/i915: Remove platform specific *_dp_detect() functions

Andreas Ziegler (1):
  drm/i915: Remove select to deleted STOP_MACHINE from Kconfig

Animesh Manna (4):
  drm/i915/skl: Making DC6 entry is the last call in suspend
flow.
  drm/i915/gen9: csr_init after runtime pm enable
  drm/i915/gen9: Use flush_work to synchronize with dmc loader
  drm/i915/skl: Removed assert for csr-fw-loading check during
disabling dc6

Arun Siluvery (1):
  Revert "drm/i915: Initialize HWS page address after GPU
reset"

Bamvor Jian Zhang (1):
  gpiolib: make comment consistent with code

Chris Wilson (11):
  drm/i915: Map the ringbuffer using WB on LLC machines
  drm/i915: Report context GTT size
  drm/i915: Add soft-pinning API for execbuffer
  drm/i915: Recover all available ringbuffer space following
reset
  drm/i915: Serialise updates to GGTT with access through GGTT
on Braswell
  drm/i915: Fix RPS pointer passed from wait_ioctl to
i915_wait_request
  drm/i915: Add soft-pinning API for execbuffer
  drm/i915: Pin the ifbdev for the info->system_base GGTT
mmapping
  drm/i915: Move Braswell stop_machine GGTT insertion
workaround
  

Re: [linux-yocto] [PULL REQUEST] add standard/bxt-rebase branch

2016-06-01 Thread Tom Zanussi
On 06/01/2016 11:57 AM, Bruce Ashfield wrote:
> On 2016-06-01 12:56 PM, Tom Zanussi wrote:
>> On 06/01/2016 11:50 AM, Bruce Ashfield wrote:
>>> On 2016-06-01 11:36 AM, Saul Wold wrote:
 On Tue, 2016-05-31 at 23:31 -0400, Bruce Ashfield wrote:
>
> On 2016-05-31 6:24 PM, Ranostay, Matt wrote:
>>
>>
>> This pull request is for adding the standard/bxt-rebase branch with
>> has various backports from 4.6 and 4.5, which are have an
>> unacceptable risk of breaking other platforms.
>> This is based on standard/intel and will be rebased. Thus nobody
>> should expect the history to be linear.
> Seems sane to me.
>
> One minor question though. To keep the branch naming and inheritance
> sane, I'd create this as standard/intel/bxt-rebase
>
> Any objections ?
>
 This is actually what I had asked for (standard/intel/bxt-rebase) so no
 objections here.
>>>
>>> And crap. I wasn't thinking clearly when I created standard/intel, that
>>> now needs to become standard/intel/base.
>>>
>>> We'll run into the git fetch not being able to update local copies of
>>> the repo (unless they are full cleared).
>>>
>>> I typically do create these as /base .. but forgot this time.
>>>
>>> Tom: we need to coordinate KBRANCH updates .. how did you want to do
>>> that ?
>>>
>>
>> Hmm, I thought the plan was to have a standard/intel based on
>> standard/base, which is what we have...
>>
>> All this rebase stuff should be based on standard/intel, right?
> 
> Yep, and if we want to show that inheritance properly, it shouldbve
> standard/intel/ .. that's the kicker.
> 

So why can't we do something like standard/intel-rebase-branch based on
standard/intel and avoid the problem, since these are supposed to be
temporary one-off staging branches anyway?

Tom

> Bruce
> 
>>
>> Tom
>>
>>
>>> Bruce
>>>

 Sau!

>
> Bruce
>
>>
>>
>>
>> The following changes since commit
>> 53e84104c5e68eb468823dd0d262a64623d01a55:
>>
>>   mmc: mmc: Fix partition switch timeout for some eMMCs (2016-05-
>> 19
>> 17:15:25 -0700)
>>
>> are available in the git repository at:
>>
>>   git://sandbox.sakoman.com/linux-yocto-4.4.git standard/bxt-rebase
>>
>> for you to fetch changes up to
>> 1203930e034957e1fc9e0c4842ecd7922d5e0897:
>>
>>   [UPSTREAM] ASoC: skylake: added WARN_ON invalid dsp (2016-05-27
>> 17:21:19 -0700)
>>
>> 
>> Aaron Plattner (1):
>>   ALSA: hda - Add new GPU codec ID 0x10de0083 to snd-hda
>>
>> Adrian Hunter (4):
>>   mmc: core: Add a facility to "pause" re-tuning
>>   mmc: block: Pause re-tuning while switched to the RPMB
>> partition
>>   mmc: block: Always switch back to main area after RPMB access
>>   mmc: sdhci-pci: Remove MMC_CAP_BUS_WIDTH_TEST for Intel
>> controller
>>
>> Alan (1):
>>   ASoC: Intel: Skylake: fix pointer scaling
>>
>> Alan Cox (1):
>>   ASoC: Intel: Skylake: remove bogus comparison of an array
>> with NULL
>>
>> Alex Dai (2):
>>   drm/i915/guc: Add GuC css header parser
>>   drm/i915/guc: Clean up locks in GuC
>>
>> Alex Goins (2):
>>   i915: wait for fence in mmio_flip_work_func
>>   i915: wait for fence in prepare_plane_fb
>>
>> Ander Conselvan de Oliveira (10):
>>   drm/i915: Don't pass *DP around to link training functions
>>   drm/i915: Split write of pattern to DP reg from
>> intel_dp_set_link_train
>>   drm/i915 Call get_adjust_train() from clock recovery and
>> channel eq
>>   drm/i915: Move register write into
>> intel_dp_set_signal_levels()
>>   drm/i915: Move generic link training code to a separate file
>>   drm/i915: Create intel_dp->prepare_link_retrain() hook
>>   drm/i915: Make intel_dp_source_supports_hbr2() take an
>> intel_dp pointer
>>   drm/i915: Fix SKL i_boost level
>>   drm/i915: Don't do edp panel detection in g4x_dp_detect()
>>   drm/i915: Remove platform specific *_dp_detect() functions
>>
>> Andreas Ziegler (1):
>>   drm/i915: Remove select to deleted STOP_MACHINE from Kconfig
>>
>> Animesh Manna (4):
>>   drm/i915/skl: Making DC6 entry is the last call in suspend
>> flow.
>>   drm/i915/gen9: csr_init after runtime pm enable
>>   drm/i915/gen9: Use flush_work to synchronize with dmc loader
>>   drm/i915/skl: Removed assert for csr-fw-loading check during
>> disabling dc6
>>
>> Arun Siluvery (1):
>>   Revert "drm/i915: Initialize HWS page address after GPU
>> reset"
>>
>> Bamvor Jian Zhang (1):
>>   gpiolib: make comment consistent with code
>>
>> Chris Wilson (11):
>>   drm/i915: Map the ringbuffer 

Re: [linux-yocto] [PULL REQUEST] add standard/bxt-rebase branch

2016-06-01 Thread Ranostay, Matt
Nope that seems sane to me.

Thanks,

Matt

-Original Message-
From: Bruce Ashfield [mailto:bruce.ashfi...@windriver.com] 
Sent: Tuesday, May 31, 2016 8:31 PM
To: Ranostay, Matt 
Cc: linux-yocto@yoctoproject.org
Subject: Re: [PULL REQUEST] add standard/bxt-rebase branch

On 2016-05-31 6:24 PM, Ranostay, Matt wrote:
> This pull request is for adding the standard/bxt-rebase branch with has 
> various backports from 4.6 and 4.5, which are have an unacceptable risk of 
> breaking other platforms.
> This is based on standard/intel and will be rebased. Thus nobody should 
> expect the history to be linear.

Seems sane to me.

One minor question though. To keep the branch naming and inheritance
sane, I'd create this as standard/intel/bxt-rebase

Any objections ?

Bruce

>
> The following changes since commit 53e84104c5e68eb468823dd0d262a64623d01a55:
>
>   mmc: mmc: Fix partition switch timeout for some eMMCs (2016-05-19 17:15:25 
> -0700)
>
> are available in the git repository at:
>
>   git://sandbox.sakoman.com/linux-yocto-4.4.git standard/bxt-rebase
>
> for you to fetch changes up to 1203930e034957e1fc9e0c4842ecd7922d5e0897:
>
>   [UPSTREAM] ASoC: skylake: added WARN_ON invalid dsp (2016-05-27 17:21:19 
> -0700)
>
> 
> Aaron Plattner (1):
>   ALSA: hda - Add new GPU codec ID 0x10de0083 to snd-hda
>
> Adrian Hunter (4):
>   mmc: core: Add a facility to "pause" re-tuning
>   mmc: block: Pause re-tuning while switched to the RPMB partition
>   mmc: block: Always switch back to main area after RPMB access
>   mmc: sdhci-pci: Remove MMC_CAP_BUS_WIDTH_TEST for Intel controller
>
> Alan (1):
>   ASoC: Intel: Skylake: fix pointer scaling
>
> Alan Cox (1):
>   ASoC: Intel: Skylake: remove bogus comparison of an array with NULL
>
> Alex Dai (2):
>   drm/i915/guc: Add GuC css header parser
>   drm/i915/guc: Clean up locks in GuC
>
> Alex Goins (2):
>   i915: wait for fence in mmio_flip_work_func
>   i915: wait for fence in prepare_plane_fb
>
> Ander Conselvan de Oliveira (10):
>   drm/i915: Don't pass *DP around to link training functions
>   drm/i915: Split write of pattern to DP reg from intel_dp_set_link_train
>   drm/i915 Call get_adjust_train() from clock recovery and channel eq
>   drm/i915: Move register write into intel_dp_set_signal_levels()
>   drm/i915: Move generic link training code to a separate file
>   drm/i915: Create intel_dp->prepare_link_retrain() hook
>   drm/i915: Make intel_dp_source_supports_hbr2() take an intel_dp pointer
>   drm/i915: Fix SKL i_boost level
>   drm/i915: Don't do edp panel detection in g4x_dp_detect()
>   drm/i915: Remove platform specific *_dp_detect() functions
>
> Andreas Ziegler (1):
>   drm/i915: Remove select to deleted STOP_MACHINE from Kconfig
>
> Animesh Manna (4):
>   drm/i915/skl: Making DC6 entry is the last call in suspend flow.
>   drm/i915/gen9: csr_init after runtime pm enable
>   drm/i915/gen9: Use flush_work to synchronize with dmc loader
>   drm/i915/skl: Removed assert for csr-fw-loading check during disabling 
> dc6
>
> Arun Siluvery (1):
>   Revert "drm/i915: Initialize HWS page address after GPU reset"
>
> Bamvor Jian Zhang (1):
>   gpiolib: make comment consistent with code
>
> Chris Wilson (11):
>   drm/i915: Map the ringbuffer using WB on LLC machines
>   drm/i915: Report context GTT size
>   drm/i915: Add soft-pinning API for execbuffer
>   drm/i915: Recover all available ringbuffer space following reset
>   drm/i915: Serialise updates to GGTT with access through GGTT on Braswell
>   drm/i915: Fix RPS pointer passed from wait_ioctl to i915_wait_request
>   drm/i915: Add soft-pinning API for execbuffer
>   drm/i915: Pin the ifbdev for the info->system_base GGTT mmapping
>   drm/i915: Move Braswell stop_machine GGTT insertion workaround
>   drm/i915: Allow i915_gem_object_get_page() on userptr as well
>   drm/i915: Balance assert_rpm_wakelock_held() for !IS_ENABLED(CONFIG_PM)
>
> Damien Lespiau (4):
>   drm/i915/skl: Store and print the DMC firmware version we load
>   drm/i915/skl: Print the DMC firmware status in debugfs
>   drm/i915/skl: Expose DC5/DC6 entry counts
>   drm/i915: Make turning on/off PW1 and Misc I/O part of the init/fini 
> sequences
>
> Damien.Horsley (1):
>   ASoC: Add SOC_DOUBLE_STS macro
>
> Dan Carpenter (3):
>   ASoC: Intel: Skylake: Fix a couple signedness bugs
>   ASoC: Intel: Skylake: pointer math issue
>   ASoC: Intel: sst: fix a loop timeout in sst_hsw_stream_reset()
>
> Daniel Stone (2):
>   drm/i915/pm: Unstatic power_domain_str
>   drm/i915/pm: Print offending domain in refcount failure
>
> Daniel Vetter (25):
>   drm/i915: Fix formatting for gen8_cs_irq_handler
>   drm/i915: Update DRIVER_DATE to 20151023
>   Revert 

Re: [linux-yocto] [PULL REQUEST] add standard/bxt-rebase branch

2016-06-01 Thread Bruce Ashfield

On 2016-06-01 12:56 PM, Tom Zanussi wrote:

On 06/01/2016 11:50 AM, Bruce Ashfield wrote:

On 2016-06-01 11:36 AM, Saul Wold wrote:

On Tue, 2016-05-31 at 23:31 -0400, Bruce Ashfield wrote:


On 2016-05-31 6:24 PM, Ranostay, Matt wrote:



This pull request is for adding the standard/bxt-rebase branch with
has various backports from 4.6 and 4.5, which are have an
unacceptable risk of breaking other platforms.
This is based on standard/intel and will be rebased. Thus nobody
should expect the history to be linear.

Seems sane to me.

One minor question though. To keep the branch naming and inheritance
sane, I'd create this as standard/intel/bxt-rebase

Any objections ?


This is actually what I had asked for (standard/intel/bxt-rebase) so no
objections here.


And crap. I wasn't thinking clearly when I created standard/intel, that
now needs to become standard/intel/base.

We'll run into the git fetch not being able to update local copies of
the repo (unless they are full cleared).

I typically do create these as /base .. but forgot this time.

Tom: we need to coordinate KBRANCH updates .. how did you want to do that ?



Hmm, I thought the plan was to have a standard/intel based on
standard/base, which is what we have...

All this rebase stuff should be based on standard/intel, right?


Yep, and if we want to show that inheritance properly, it shouldbve
standard/intel/ .. that's the kicker.

Bruce



Tom



Bruce



Sau!



Bruce





The following changes since commit
53e84104c5e68eb468823dd0d262a64623d01a55:

  mmc: mmc: Fix partition switch timeout for some eMMCs (2016-05-
19
17:15:25 -0700)

are available in the git repository at:

  git://sandbox.sakoman.com/linux-yocto-4.4.git standard/bxt-rebase

for you to fetch changes up to
1203930e034957e1fc9e0c4842ecd7922d5e0897:

  [UPSTREAM] ASoC: skylake: added WARN_ON invalid dsp (2016-05-27
17:21:19 -0700)


Aaron Plattner (1):
  ALSA: hda - Add new GPU codec ID 0x10de0083 to snd-hda

Adrian Hunter (4):
  mmc: core: Add a facility to "pause" re-tuning
  mmc: block: Pause re-tuning while switched to the RPMB
partition
  mmc: block: Always switch back to main area after RPMB access
  mmc: sdhci-pci: Remove MMC_CAP_BUS_WIDTH_TEST for Intel
controller

Alan (1):
  ASoC: Intel: Skylake: fix pointer scaling

Alan Cox (1):
  ASoC: Intel: Skylake: remove bogus comparison of an array
with NULL

Alex Dai (2):
  drm/i915/guc: Add GuC css header parser
  drm/i915/guc: Clean up locks in GuC

Alex Goins (2):
  i915: wait for fence in mmio_flip_work_func
  i915: wait for fence in prepare_plane_fb

Ander Conselvan de Oliveira (10):
  drm/i915: Don't pass *DP around to link training functions
  drm/i915: Split write of pattern to DP reg from
intel_dp_set_link_train
  drm/i915 Call get_adjust_train() from clock recovery and
channel eq
  drm/i915: Move register write into
intel_dp_set_signal_levels()
  drm/i915: Move generic link training code to a separate file
  drm/i915: Create intel_dp->prepare_link_retrain() hook
  drm/i915: Make intel_dp_source_supports_hbr2() take an
intel_dp pointer
  drm/i915: Fix SKL i_boost level
  drm/i915: Don't do edp panel detection in g4x_dp_detect()
  drm/i915: Remove platform specific *_dp_detect() functions

Andreas Ziegler (1):
  drm/i915: Remove select to deleted STOP_MACHINE from Kconfig

Animesh Manna (4):
  drm/i915/skl: Making DC6 entry is the last call in suspend
flow.
  drm/i915/gen9: csr_init after runtime pm enable
  drm/i915/gen9: Use flush_work to synchronize with dmc loader
  drm/i915/skl: Removed assert for csr-fw-loading check during
disabling dc6

Arun Siluvery (1):
  Revert "drm/i915: Initialize HWS page address after GPU
reset"

Bamvor Jian Zhang (1):
  gpiolib: make comment consistent with code

Chris Wilson (11):
  drm/i915: Map the ringbuffer using WB on LLC machines
  drm/i915: Report context GTT size
  drm/i915: Add soft-pinning API for execbuffer
  drm/i915: Recover all available ringbuffer space following
reset
  drm/i915: Serialise updates to GGTT with access through GGTT
on Braswell
  drm/i915: Fix RPS pointer passed from wait_ioctl to
i915_wait_request
  drm/i915: Add soft-pinning API for execbuffer
  drm/i915: Pin the ifbdev for the info->system_base GGTT
mmapping
  drm/i915: Move Braswell stop_machine GGTT insertion
workaround
  drm/i915: Allow i915_gem_object_get_page() on userptr as well
  drm/i915: Balance assert_rpm_wakelock_held() for
!IS_ENABLED(CONFIG_PM)

Damien Lespiau (4):
  drm/i915/skl: Store and print the DMC firmware version we
load
  drm/i915/skl: Print the DMC firmware status in debugfs
  drm/i915/skl: Expose DC5/DC6 entry counts
  drm/i915: Make turning on/off PW1 and Misc I/O part of the
init/fini sequences

Damien.Horsley (1):
  ASoC: Add SOC_DOUBLE_STS 

Re: [linux-yocto] [PULL REQUEST] add standard/bxt-rebase branch

2016-06-01 Thread Tom Zanussi
On 06/01/2016 11:50 AM, Bruce Ashfield wrote:
> On 2016-06-01 11:36 AM, Saul Wold wrote:
>> On Tue, 2016-05-31 at 23:31 -0400, Bruce Ashfield wrote:
>>>
>>> On 2016-05-31 6:24 PM, Ranostay, Matt wrote:


 This pull request is for adding the standard/bxt-rebase branch with
 has various backports from 4.6 and 4.5, which are have an
 unacceptable risk of breaking other platforms.
 This is based on standard/intel and will be rebased. Thus nobody
 should expect the history to be linear.
>>> Seems sane to me.
>>>
>>> One minor question though. To keep the branch naming and inheritance
>>> sane, I'd create this as standard/intel/bxt-rebase
>>>
>>> Any objections ?
>>>
>> This is actually what I had asked for (standard/intel/bxt-rebase) so no
>> objections here.
> 
> And crap. I wasn't thinking clearly when I created standard/intel, that
> now needs to become standard/intel/base.
> 
> We'll run into the git fetch not being able to update local copies of
> the repo (unless they are full cleared).
> 
> I typically do create these as /base .. but forgot this time.
> 
> Tom: we need to coordinate KBRANCH updates .. how did you want to do that ?
> 

Hmm, I thought the plan was to have a standard/intel based on
standard/base, which is what we have...

All this rebase stuff should be based on standard/intel, right?

Tom


> Bruce
> 
>>
>> Sau!
>>
>>>
>>> Bruce
>>>



 The following changes since commit
 53e84104c5e68eb468823dd0d262a64623d01a55:

   mmc: mmc: Fix partition switch timeout for some eMMCs (2016-05-
 19
 17:15:25 -0700)

 are available in the git repository at:

   git://sandbox.sakoman.com/linux-yocto-4.4.git standard/bxt-rebase

 for you to fetch changes up to
 1203930e034957e1fc9e0c4842ecd7922d5e0897:

   [UPSTREAM] ASoC: skylake: added WARN_ON invalid dsp (2016-05-27
 17:21:19 -0700)

 
 Aaron Plattner (1):
   ALSA: hda - Add new GPU codec ID 0x10de0083 to snd-hda

 Adrian Hunter (4):
   mmc: core: Add a facility to "pause" re-tuning
   mmc: block: Pause re-tuning while switched to the RPMB
 partition
   mmc: block: Always switch back to main area after RPMB access
   mmc: sdhci-pci: Remove MMC_CAP_BUS_WIDTH_TEST for Intel
 controller

 Alan (1):
   ASoC: Intel: Skylake: fix pointer scaling

 Alan Cox (1):
   ASoC: Intel: Skylake: remove bogus comparison of an array
 with NULL

 Alex Dai (2):
   drm/i915/guc: Add GuC css header parser
   drm/i915/guc: Clean up locks in GuC

 Alex Goins (2):
   i915: wait for fence in mmio_flip_work_func
   i915: wait for fence in prepare_plane_fb

 Ander Conselvan de Oliveira (10):
   drm/i915: Don't pass *DP around to link training functions
   drm/i915: Split write of pattern to DP reg from
 intel_dp_set_link_train
   drm/i915 Call get_adjust_train() from clock recovery and
 channel eq
   drm/i915: Move register write into
 intel_dp_set_signal_levels()
   drm/i915: Move generic link training code to a separate file
   drm/i915: Create intel_dp->prepare_link_retrain() hook
   drm/i915: Make intel_dp_source_supports_hbr2() take an
 intel_dp pointer
   drm/i915: Fix SKL i_boost level
   drm/i915: Don't do edp panel detection in g4x_dp_detect()
   drm/i915: Remove platform specific *_dp_detect() functions

 Andreas Ziegler (1):
   drm/i915: Remove select to deleted STOP_MACHINE from Kconfig

 Animesh Manna (4):
   drm/i915/skl: Making DC6 entry is the last call in suspend
 flow.
   drm/i915/gen9: csr_init after runtime pm enable
   drm/i915/gen9: Use flush_work to synchronize with dmc loader
   drm/i915/skl: Removed assert for csr-fw-loading check during
 disabling dc6

 Arun Siluvery (1):
   Revert "drm/i915: Initialize HWS page address after GPU
 reset"

 Bamvor Jian Zhang (1):
   gpiolib: make comment consistent with code

 Chris Wilson (11):
   drm/i915: Map the ringbuffer using WB on LLC machines
   drm/i915: Report context GTT size
   drm/i915: Add soft-pinning API for execbuffer
   drm/i915: Recover all available ringbuffer space following
 reset
   drm/i915: Serialise updates to GGTT with access through GGTT
 on Braswell
   drm/i915: Fix RPS pointer passed from wait_ioctl to
 i915_wait_request
   drm/i915: Add soft-pinning API for execbuffer
   drm/i915: Pin the ifbdev for the info->system_base GGTT
 mmapping
   drm/i915: Move Braswell stop_machine GGTT insertion
 workaround
   drm/i915: Allow i915_gem_object_get_page() on userptr as well
   

Re: [linux-yocto] [PATCH 0/4] Intel Axxia updates to linux-yocto-4.1

2016-06-01 Thread Bruce Ashfield

On 2016-06-01 11:12 AM, Daniel Dragomir wrote:

Hello Bruce!

This series of patches brings improvements for FEMAC and AXXIA drivers
and add a new Device Tree for a new development board named Victoria.

NOTE: All the following patches are for both axxia branches:
standard/axxia/base and standard/preempt-rt/axxia/base,



These look fine to me.

Merged.

Bruce


Axxia internal tag: 1.29

Thank you,
Daniel Dragomir

John Jacques (4):
  axxia: Remove Unused EDAC Driver File
  drivers/i2c: Add a Lock to the Axxia Driver
  drivers/net: Update the LSI FEMAC Driver for Axxia
  axxia: Add a Device Tree for the Victoria Axxia Development Board

 arch/arm64/boot/dts/intel/Makefile |   1 +
 arch/arm64/boot/dts/intel/axm5616-victoria.dts | 122 +++
 drivers/edac/axxia_edac.c  | 461 -
 drivers/i2c/busses/i2c-axxia.c |   9 +
 drivers/net/ethernet/lsi/lsi_acp_net.c |   6 +-
 5 files changed, 137 insertions(+), 462 deletions(-)
 create mode 100644 arch/arm64/boot/dts/intel/axm5616-victoria.dts
 delete mode 100644 drivers/edac/axxia_edac.c



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Re: [linux-yocto] [PULL REQUEST] add standard/bxt-rebase branch

2016-06-01 Thread Saul Wold
On Tue, 2016-05-31 at 23:31 -0400, Bruce Ashfield wrote:
> 
> On 2016-05-31 6:24 PM, Ranostay, Matt wrote:
> > 
> > 
> > This pull request is for adding the standard/bxt-rebase branch with
> > has various backports from 4.6 and 4.5, which are have an
> > unacceptable risk of breaking other platforms.
> > This is based on standard/intel and will be rebased. Thus nobody
> > should expect the history to be linear.
> Seems sane to me.
> 
> One minor question though. To keep the branch naming and inheritance
> sane, I'd create this as standard/intel/bxt-rebase
> 
> Any objections ?
> 
This is actually what I had asked for (standard/intel/bxt-rebase) so no
objections here.

Sau!

> 
> Bruce
> 
> > 
> > 
> > 
> > The following changes since commit
> > 53e84104c5e68eb468823dd0d262a64623d01a55:
> > 
> >   mmc: mmc: Fix partition switch timeout for some eMMCs (2016-05-
> > 19 
> > 17:15:25 -0700)
> > 
> > are available in the git repository at:
> > 
> >   git://sandbox.sakoman.com/linux-yocto-4.4.git standard/bxt-rebase
> > 
> > for you to fetch changes up to
> > 1203930e034957e1fc9e0c4842ecd7922d5e0897:
> > 
> >   [UPSTREAM] ASoC: skylake: added WARN_ON invalid dsp (2016-05-27
> > 17:21:19 -0700)
> > 
> > 
> > Aaron Plattner (1):
> >   ALSA: hda - Add new GPU codec ID 0x10de0083 to snd-hda
> > 
> > Adrian Hunter (4):
> >   mmc: core: Add a facility to "pause" re-tuning
> >   mmc: block: Pause re-tuning while switched to the RPMB
> > partition
> >   mmc: block: Always switch back to main area after RPMB access
> >   mmc: sdhci-pci: Remove MMC_CAP_BUS_WIDTH_TEST for Intel
> > controller
> > 
> > Alan (1):
> >   ASoC: Intel: Skylake: fix pointer scaling
> > 
> > Alan Cox (1):
> >   ASoC: Intel: Skylake: remove bogus comparison of an array
> > with NULL
> > 
> > Alex Dai (2):
> >   drm/i915/guc: Add GuC css header parser
> >   drm/i915/guc: Clean up locks in GuC
> > 
> > Alex Goins (2):
> >   i915: wait for fence in mmio_flip_work_func
> >   i915: wait for fence in prepare_plane_fb
> > 
> > Ander Conselvan de Oliveira (10):
> >   drm/i915: Don't pass *DP around to link training functions
> >   drm/i915: Split write of pattern to DP reg from
> > intel_dp_set_link_train
> >   drm/i915 Call get_adjust_train() from clock recovery and
> > channel eq
> >   drm/i915: Move register write into
> > intel_dp_set_signal_levels()
> >   drm/i915: Move generic link training code to a separate file
> >   drm/i915: Create intel_dp->prepare_link_retrain() hook
> >   drm/i915: Make intel_dp_source_supports_hbr2() take an
> > intel_dp pointer
> >   drm/i915: Fix SKL i_boost level
> >   drm/i915: Don't do edp panel detection in g4x_dp_detect()
> >   drm/i915: Remove platform specific *_dp_detect() functions
> > 
> > Andreas Ziegler (1):
> >   drm/i915: Remove select to deleted STOP_MACHINE from Kconfig
> > 
> > Animesh Manna (4):
> >   drm/i915/skl: Making DC6 entry is the last call in suspend
> > flow.
> >   drm/i915/gen9: csr_init after runtime pm enable
> >   drm/i915/gen9: Use flush_work to synchronize with dmc loader
> >   drm/i915/skl: Removed assert for csr-fw-loading check during
> > disabling dc6
> > 
> > Arun Siluvery (1):
> >   Revert "drm/i915: Initialize HWS page address after GPU
> > reset"
> > 
> > Bamvor Jian Zhang (1):
> >   gpiolib: make comment consistent with code
> > 
> > Chris Wilson (11):
> >   drm/i915: Map the ringbuffer using WB on LLC machines
> >   drm/i915: Report context GTT size
> >   drm/i915: Add soft-pinning API for execbuffer
> >   drm/i915: Recover all available ringbuffer space following
> > reset
> >   drm/i915: Serialise updates to GGTT with access through GGTT
> > on Braswell
> >   drm/i915: Fix RPS pointer passed from wait_ioctl to
> > i915_wait_request
> >   drm/i915: Add soft-pinning API for execbuffer
> >   drm/i915: Pin the ifbdev for the info->system_base GGTT
> > mmapping
> >   drm/i915: Move Braswell stop_machine GGTT insertion
> > workaround
> >   drm/i915: Allow i915_gem_object_get_page() on userptr as well
> >   drm/i915: Balance assert_rpm_wakelock_held() for
> > !IS_ENABLED(CONFIG_PM)
> > 
> > Damien Lespiau (4):
> >   drm/i915/skl: Store and print the DMC firmware version we
> > load
> >   drm/i915/skl: Print the DMC firmware status in debugfs
> >   drm/i915/skl: Expose DC5/DC6 entry counts
> >   drm/i915: Make turning on/off PW1 and Misc I/O part of the
> > init/fini sequences
> > 
> > Damien.Horsley (1):
> >   ASoC: Add SOC_DOUBLE_STS macro
> > 
> > Dan Carpenter (3):
> >   ASoC: Intel: Skylake: Fix a couple signedness bugs
> >   ASoC: Intel: Skylake: pointer math issue
> >   ASoC: Intel: sst: fix a loop timeout in
> > sst_hsw_stream_reset()
> > 
> > Daniel Stone (2):
> >   drm/i915/pm: Unstatic power_domain_str
> >   

[linux-yocto] [PATCH 3/4] drivers/net: Update the LSI FEMAC Driver for Axxia

2016-06-01 Thread Daniel Dragomir
From: John Jacques 

The driver was calling free_irq() without first calling
disable_irq() to synchronize pending and active handlers.
This commit adds a call to disable_irq().

A previous version of this commit got removed when
b53c950 was applied.

Signed-off-by: John Jacques 
---
 drivers/net/ethernet/lsi/lsi_acp_net.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/lsi/lsi_acp_net.c 
b/drivers/net/ethernet/lsi/lsi_acp_net.c
index 610ec8a..f73f983 100644
--- a/drivers/net/ethernet/lsi/lsi_acp_net.c
+++ b/drivers/net/ethernet/lsi/lsi_acp_net.c
@@ -991,8 +991,12 @@ static int appnic_stop(struct net_device *dev)
 
pr_info("%s: Stopping the interface.\n", LSI_DRV_NAME);
 
-   /* Disable all device interrupts. */
+   /* Disable interrupts. Note that disable_irq() will wait for
+* any interrupt handlers that are currently executing to
+* complete.
+*/
write_mac(0, APPNIC_DMA_INTERRUPT_ENABLE);
+   disable_irq(dev->irq);
free_irq(dev->irq, dev);
 
/* Indicate to the OS that no more packets should be sent.  */
-- 
1.9.1

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[linux-yocto] [PATCH 2/4] drivers/i2c: Add a Lock to the Axxia Driver

2016-06-01 Thread Daniel Dragomir
From: John Jacques 

Signed-off-by: John Jacques 
---
 drivers/i2c/busses/i2c-axxia.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/drivers/i2c/busses/i2c-axxia.c b/drivers/i2c/busses/i2c-axxia.c
index 6c84826..598cc4e 100644
--- a/drivers/i2c/busses/i2c-axxia.c
+++ b/drivers/i2c/busses/i2c-axxia.c
@@ -127,6 +127,8 @@ struct axxia_i2c_dev {
int irq;
/* current i2c bus clock rate */
u32 bus_clk_rate;
+   /* transaction lock */
+   struct mutex i2c_lock;
 };
 
 static void
@@ -406,6 +408,8 @@ axxia_i2c_xfer_msg(struct axxia_i2c_dev *idev, struct 
i2c_msg *msg)
if (msg->len == 0 || msg->len > 255)
return -EINVAL;
 
+   mutex_lock(>i2c_lock);
+
idev->msg  = msg;
idev->msg_xfrd = 0;
idev->msg_err  = 0;
@@ -476,14 +480,17 @@ axxia_i2c_xfer_msg(struct axxia_i2c_dev *idev, struct 
i2c_msg *msg)
if (ret == 0) {
dev_warn(idev->dev, "xfer timeout (%#x)\n", msg->addr);
axxia_i2c_init(idev);
+   mutex_unlock(>i2c_lock);
return -ETIMEDOUT;
}
 
if (unlikely(idev->msg_err != 0)) {
axxia_i2c_init(idev);
+   mutex_unlock(>i2c_lock);
return -EIO;
}
 
+   mutex_unlock(>i2c_lock);
return 0;
 }
 
@@ -600,6 +607,8 @@ axxia_i2c_probe(struct platform_device *pdev)
idev->adapter.dev.parent = >dev;
idev->adapter.dev.of_node = pdev->dev.of_node;
 
+   mutex_init(>i2c_lock);
+
ret = i2c_add_adapter(>adapter);
if (ret) {
dev_err(>dev, "Failed to add I2C adapter\n");
-- 
1.9.1

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[linux-yocto] [PATCH 1/4] axxia: Remove Unused EDAC Driver File

2016-06-01 Thread Daniel Dragomir
From: John Jacques 

Signed-off-by: John Jacques 
---
 drivers/edac/axxia_edac.c | 461 --
 1 file changed, 461 deletions(-)
 delete mode 100644 drivers/edac/axxia_edac.c

diff --git a/drivers/edac/axxia_edac.c b/drivers/edac/axxia_edac.c
deleted file mode 100644
index d638141..000
--- a/drivers/edac/axxia_edac.c
+++ /dev/null
@@ -1,461 +0,0 @@
- /*
-  * drivers/edac/axxia_edac.c
-  *
-  * EDAC Driver for Avago's Axxia 5500
-  *
-  * Copyright (C) 2010 LSI Inc.
-  *
-  * This program is free software; you can redistribute it and/or modify
-  * it under the terms of the GNU General Public License as published by
-  * the Free Software Foundation; either version 2 of the License, or
-  * (at your option) any later version.
-  *
-  * This program is distributed in the hope that it will be useful,
-  * but WITHOUT ANY WARRANTY; without even the implied warranty of
-  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-  * GNU General Public License for more details.
-  *
-  * You should have received a copy of the GNU General Public License
-  * along with this program; if not, write to the Free Software
-  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-  *
-  */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include "edac_core.h"
-#include "edac_module.h"
-
-#define LSI_EDAC_MOD_STR "lsi_edac"
-#define CORES_PER_CLUSTER 4
-
-/* Private structure for common edac device */
-struct lsi_edac_dev_info {
-   void __iomem *vbase;
-   struct platform_device *pdev;
-   char *ctl_name;
-   char *blk_name;
-   int edac_idx;
-   u32 sm0_region;
-   u32 sm1_region;
-   void __iomem *apb2ser3_region;
-   void __iomem *dickens_L3[8];
-   struct edac_device_ctl_info *edac_dev;
-   void (*init)(struct lsi_edac_dev_info *dev_info);
-   void (*exit)(struct lsi_edac_dev_info *dev_info);
-   void (*check)(struct edac_device_ctl_info *edac_dev);
-};
-
-static void lsi_error_init(struct lsi_edac_dev_info *dev_info)
-{
-}
-
-static void lsi_error_exit(struct lsi_edac_dev_info *dev_info)
-{
-}
-
-void log_cpumerrsr(void *edac)
-{
-   struct edac_device_ctl_info *edac_dev =
-   (struct edac_device_ctl_info *)edac;
-   u32 tmp1, tmp2, count0, count1;
-   unsigned long setVal;
-   int i;
-   struct lsi_edac_dev_info *dev_info;
-
-   dev_info = (struct lsi_edac_dev_info *) edac_dev->pvt_info;
-
-   /* Read cp15 for CPUMERRSR counts */
-   asm volatile("mrrc\tp15, 0, %0, %1, c15" : "=r"(tmp1),
-   "=r"(tmp2));
-   if (tmp1 & 0x8000) {
-   count0 = (tmp2) & 0x00ff;
-   count1 = ((tmp2) & 0xff00) >> 8;
-
-   /* increment correctable error counts */
-   for (i = 0; i < count0+count1; i++) {
-   edac_device_handle_ce(edac_dev, 0,
-   raw_smp_processor_id(), edac_dev->ctl_name);
-   }
-
-   /* Clear the valid bit */
-   tmp1 = 0x8000;
-   tmp2 = 0;
-   asm volatile("mcrr\tp15, 0, %0, %1, c15" : : "r"(tmp1),
-   "r"(tmp2));
-   }
-   if (tmp2 & 0x8000) {
-   setVal = readl(dev_info->apb2ser3_region + 0xdc);
-   /* set bit 3 in pscratch reg */
-   setVal = (setVal) | (0x1 << 3);
-   writel(setVal, dev_info->apb2ser3_region + 0xdc);
-   pr_info("CPU uncorrectable error\n");
-   machine_restart(NULL);
-   }
-}
-
-
-/* Check for CPU Errors */
-static void lsi_cpu_error_check(struct edac_device_ctl_info *edac_dev)
-{
-   /* execute on current cpu */
-   log_cpumerrsr(edac_dev);
-
-   /* send ipis to execute on other cpus */
-   smp_call_function(log_cpumerrsr, edac_dev, 1);
-
-}
-
-void log_l2merrsr(void *edac)
-{
-   struct edac_device_ctl_info *edac_dev =
-   (struct edac_device_ctl_info *)edac;
-   u32 tmp1, tmp2, count0, count1;
-   unsigned long setVal;
-   int i;
-   struct lsi_edac_dev_info *dev_info;
-
-   dev_info = (struct lsi_edac_dev_info *) edac_dev->pvt_info;
-
-   /* Read cp15 for L2MERRSR counts */
-   asm volatile("mrrc\tp15, 1, %0, %1, c15" : "=r"(tmp1),
-   "=r"(tmp2));
-   if (tmp1 & 0x8000) {
-   count0 = (tmp2) & 0x00ff;
-   count1 = ((tmp2) & 0xff00) >> 8;
-
-   /* increment correctable error counts */
-   for (i = 0; i < count0+count1; i++) {
-   edac_device_handle_ce(edac_dev, 0,
-   raw_smp_processor_id()/CORES_PER_CLUSTER,
-   edac_dev->ctl_name);
-   }
-
-