Re: OF compatible MTD platform RAM driver ?
On Monday 31 March 2008 00:39, Segher Boessenkool wrote: For RAMs we need something to indicate that it's memory but intended for secondary storage, not as main memory. How it is intended to be used is not a property of the hardware, so that information doesn't belong in the device tree at all. The Linux platform code should handle this, I imagine. There must be some reason why it is not intended to be used as main memory. Presumably it has something different about it compared to normal RAM, and that difference could perfectly well be expressed in the device tree. Sure, that's a different thing. It might sit on a bus that doesn't do cache coherency, or maybe it's just slow (or sits on a slow bus). All these things can be usefully expressed in the device tree (but typically are not, it is left to the client code to know this stuff implicitly). It's still the (platform) probe code its responsibility to figure out what (if anything) to do with any device. And main memory is probed differently (via /chosen/memory, for example) anyway. Well, actually, Linux searches for all nodes with device_type memory, which should work fine as well [*]. So, all in all, I think we should just give these auxiliary memory devices a name of ram c.q. rom, and some reg, and that should be all that is needed: the main memory probe stuff won't consider these nodes, and the (platform) device probe code can do whatever it wants (create mtd devices, I guess). Ok, I get your point. I'll prepare a new documentation patch; changes to physmap_of.c will go away. If I understand you correctly, there should be no compatible property on the ram and rom devices. Should the non-volatile, slow and static ram properties still be expressed in the device tree ? -- Laurent Pinchart CSE Semaphore Belgium Chaussée de Bruxelles, 732A B-1410 Waterloo Belgium T +32 (2) 387 42 59 F +32 (2) 387 42 75 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCHv2 2/3] ep8248e: Reference SMC parameter RAM base in the device tree.
On Friday 28 March 2008 19:07, Scott Wood wrote: Laurent Pinchart wrote: On Friday 28 March 2008 18:11, Scott Wood wrote: Laurent Pinchart wrote: Locating the end of the muram isn't as straightforward as it could be. As the current code already uses the beginning of the muram to store the BDs and data buffers, should I really bother locating the end or can I store the SMC parameter ram at the beginning as well ? Maybe, but the end would be safer. What's the problem with finding the end? That requires manual parsing of all the cells in the reg property. The device-tree API doesn't provide a way to get the length of a property, Sure it does. Do a getprop with an insufficiently large buffer, and it tells you how much you really need. :-) Ok thanks. so I'll have to use a big enough pre-allocated buffer. I'm also not sure if resources are guaranteed to be sorted in increasing order. Ah, good point. This doesn't make finding the end of the muram really difficult. I was just wondering if the increased code complexity was worth it, especially seeing how the cpm_serial code in the boot wrapper seem quite unstable. Unstable in what way? I was refering to the virtual-reg (non-)issue I mentionned below. I'm not familiar with the boot wrapper code so I'm sometimes not very confident in my assumptions, but isn't the handling of the virtual-reg property in cpm_console_init broken ? Not as far as I can see. If I'm not mistaken, getprop will return the address and size of the first resource and not the addresses of the first two resources. No, it'll get as much of the virtual-reg property as will fit in the buffer. There's no size in virtual-reg. Ah right. Sorry about the misunderstanding. What is virtual-reg used for ? To report the virtual address without requiring a device tree walk ? Does it provide any information that dt_xlate_reg can't find ? Yes, it tells you the virtual address when it's not an identity mapping. It's not currently used on CPM platforms, but might be used down the road with a QE device on 85xx. Will the virtual-reg property on the muram node list the addresses of all muram chunks or the address of the first chunk only ? Even the end of the first reg resource would be OK. If I use the end of the first resource, can I assume it spans 0x - 0x8000 to set the default tx BD address in Kconfig ? No, especially seeing as it doesn't on any existing boards. :-) I still need a default value :-) It obviously won't work for all boards. You could set the default to just before 0x2000 with board-specific exceptions, though. We're getting a bit lost. I'll try to summarize the discussion. - The muram node has a reg property that lists the offsets and sizes of all muram chunks, and an optional virtual-reg property that lists the virtual address of all chunks/the first chunk only. - From the above information I can locate a section of muram at the end of the first chunk (easy) or at the end of the muram (not really difficult, just a bit more complex, especially if chunks are not sorted by their start address). - Kconfig needs a default address for the tx BD. This depends on the allocation strategy (end of first chunk vs. end of last chunk). Is there some consistent default across QE devices ? -- Laurent Pinchart CSE Semaphore Belgium Chaussée de Bruxelles, 732A B-1410 Waterloo Belgium T +32 (2) 387 42 59 F +32 (2) 387 42 75 pgpl4GQ0cQTU2.pgp Description: PGP signature ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Using FEC on a MPC5200 with default PHY configuration
Hello, is it possible to use the FEC on a MPC5200 with the default hardware PHY configuration. I mean running the link with a default speed without handling or even touching the PHY like U-Boot does. I removed the PHY entries from the DTS file and disabled CONFIG_FEC_MPC52xx_MDIO but it did not work. Any help is appreciated, TIA. Wolfgang. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Using FEC on a MPC5200 with default PHY configuration
Wolfgang Grandegger wrote: Hello, is it possible to use the FEC on a MPC5200 with the default hardware PHY configuration. I mean running the link with a default speed without handling or even touching the PHY like U-Boot does. I removed the PHY entries from the DTS file and disabled CONFIG_FEC_MPC52xx_MDIO but it did not work. To be more precise, I want to support a 3-Port managed switch with PHY from Micrel using the direct switch link. TIA. Wolfgang. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] powerpc: Fix deadlock with mmu_hash_lock in hash_page_sync
-Original Message- From: Benjamin Herrenschmidt [mailto:[EMAIL PROTECTED] Sent: Monday, March 31, 2008 0:49 To: [EMAIL PROTECTED] Cc: linuxppc-dev@ozlabs.org; Gilad Ben-Yossef; Paul Mackerras Subject: [PATCH] powerpc: Fix deadlock with mmu_hash_lock in hash_page_sync hash_page_sync() takes and releases the low level mmu hash lock in order to sync with other processors disposing of page tables. Because that lock can be needed to service hash misses triggered by interrupt handler, taking it must be done with interrupts off. However, hash_page_sync() appear to be called with interrupts enabled, thus causing occasional deadlocks. We fix it by making sure hash_page_sync() masks interrupts while holding the lock. Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED] --- Please test and report asap thought it's probably too late for 2.6.25, it can still go into stable later on. Thank you for the quick acknowledgment and patch. Patch works well. Thanks, Gaash ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] powerpc/pseries/xcis: ansify
Al Viro [EMAIL PROTECTED] wrote: Signed-off-by: Al Viro [EMAIL PROTECTED] Acked-by: David Howells [EMAIL PROTECTED] ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: OF compatible MTD platform RAM driver ?
So, all in all, I think we should just give these auxiliary memory devices a name of ram c.q. rom, and some reg, and that should be all that is needed: the main memory probe stuff won't consider these nodes, and the (platform) device probe code can do whatever it wants (create mtd devices, I guess). Ok, I get your point. I'll prepare a new documentation patch; changes to physmap_of.c will go away. Thanks. If I understand you correctly, there should be no compatible property on the ram and rom devices. They aren't normally needed here, I think. Should the non-volatile, slow and static ram properties still be expressed in the device tree ? If those are useful. I'll need to see a proposed binding to form an opinion on this, it's too vague now, sorry. Segher ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH] mpc83xx SPI glitch
dont write SPMODE reg unless mode changed.
it causes SPI to go hi-z momentarily
which can cause a spike on the CLK line
this is a problem in MMC where /CS is held asserted
across multiple transactions.
Signed-off-by: Mike Hench [EMAIL PROTECTED]
---
--- linux-2.6.25-rc5.orig/drivers/spi/spi_mpc83xx.c 2008-03-10
00:22:27.0 -0500
+++ linux-2.6.25-rc5/drivers/spi/spi_mpc83xx.c 2008-03-31
07:37:37.0 -0500
@@ -147,6 +147,7 @@
if (value == BITBANG_CS_ACTIVE) {
u32 regval =
mpc83xx_spi_read_reg(mpc83xx_spi-base-mode);
+ u32 regval0 = regval;
u32 len = spi-bits_per_word;
u8 pm;
@@ -188,9 +189,16 @@
regval |= SPMODE_PM(pm);
}
- /* Turn off SPI unit prior changing mode */
- mpc83xx_spi_write_reg(mpc83xx_spi-base-mode, 0);
- mpc83xx_spi_write_reg(mpc83xx_spi-base-mode, regval);
+ // dont write reg unless mode changed.
+ // it causes SPI to go hi-z momentarily
+ // which can cause a spike on the CLK line
+ // this is a problem in MMC where /CS is held asserted
+ // across multiple transactions.
+ if(regval != regval0) {
+ /* Turn off SPI unit prior changing mode */
+ mpc83xx_spi_write_reg(mpc83xx_spi-base-mode,
0);
+ mpc83xx_spi_write_reg(mpc83xx_spi-base-mode,
regval);
+ }
if (mpc83xx_spi-activate_cs)
mpc83xx_spi-activate_cs(spi-chip_select, pol);
}
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[PATCH] Add idle power save for ppc 4xx
# HG changeset patch
# User Jerone Young [EMAIL PROTECTED]
# Date 1206969060 18000
# Node ID 10aea37177130bbe5de7bee6ec06d9010bc5da1f
# Parent 1506aa38ddabb0bf73fff3ac3f3db5f9ef6458cc
Add idle power save for ppc 4xx
This patch sets the wait state MSR when power_save is called in cpu_idle loop
for ppc4xx. This is mainly to help out virtualization solutions such as KVM.
This way the virtualization soultions are able to tell if the guest kernel is
idle.
I have tested this on hardware KVM virtual guest.
Signed-off-by: Jerone Young [EMAIL PROTECTED]
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_GENERIC_TBSYNC) += smp-tbsy
obj-$(CONFIG_GENERIC_TBSYNC) += smp-tbsync.o
obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
obj-$(CONFIG_6xx) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o
+obj-$(CONFIG_4xx) += idle_4xx.o
obj-$(CONFIG_TAU) += tau_6xx.o
obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o \
swsusp_$(CONFIG_WORD_SIZE).o
diff --git a/arch/powerpc/kernel/idle_4xx.c b/arch/powerpc/kernel/idle_4xx.c
new file mode 100644
--- /dev/null
+++ b/arch/powerpc/kernel/idle_4xx.c
@@ -0,0 +1,24 @@
+/*
+ * This file contains the power_save function for 4xx CPUs
+ *
+ * added by Jerone Young [EMAIL PROTECTED]
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include asm/processor.h
+#include asm/machdep.h
+
+void ppc4xx_idle()
+{
+ unsigned long msr_save;
+
+ /* set wait state MSR */
+ local_irq_enable();
+ msr_save = mfmsr();
+ mtmsr(msr_save|MSR_WE);
+ local_irq_disable();
+}
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -132,6 +132,10 @@ void __init machine_init(unsigned long d
if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
cpu_has_feature(CPU_FTR_CAN_NAP))
ppc_md.power_save = ppc6xx_idle;
+#endif
+
+#ifdef CONFIG_4xx
+ ppc_md.power_save = ppc4xx_idle;
#endif
if (ppc_md.progress)
diff --git a/include/asm-powerpc/machdep.h b/include/asm-powerpc/machdep.h
--- a/include/asm-powerpc/machdep.h
+++ b/include/asm-powerpc/machdep.h
@@ -266,6 +266,7 @@ extern void power4_idle(void);
extern void power4_idle(void);
extern void power4_cpu_offline_powersave(void);
extern void ppc6xx_idle(void);
+extern void ppc4xx_idle(void);
/*
* ppc_md contains a copy of the machine description structure for the
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Re: [PATCH] mpc83xx SPI glitch
Mike
I already sent a patch some time ago, it addresses this bug and
alot more. See spi-devel-general
[EMAIL PROTECTED],
I am waiting for David B. to comment/apply it. If you want to see this
in 2.6.25 I suggest you remind 'David Brownell' [EMAIL PROTECTED]
Jocke
On Mon, 2008-03-31 at 08:04 -0500, Mike Hench wrote:
dont write SPMODE reg unless mode changed.
it causes SPI to go hi-z momentarily
which can cause a spike on the CLK line
this is a problem in MMC where /CS is held asserted
across multiple transactions.
Signed-off-by: Mike Hench [EMAIL PROTECTED]
---
--- linux-2.6.25-rc5.orig/drivers/spi/spi_mpc83xx.c 2008-03-10
00:22:27.0 -0500
+++ linux-2.6.25-rc5/drivers/spi/spi_mpc83xx.c2008-03-31
07:37:37.0 -0500
@@ -147,6 +147,7 @@
if (value == BITBANG_CS_ACTIVE) {
u32 regval =
mpc83xx_spi_read_reg(mpc83xx_spi-base-mode);
+ u32 regval0 = regval;
u32 len = spi-bits_per_word;
u8 pm;
@@ -188,9 +189,16 @@
regval |= SPMODE_PM(pm);
}
- /* Turn off SPI unit prior changing mode */
- mpc83xx_spi_write_reg(mpc83xx_spi-base-mode, 0);
- mpc83xx_spi_write_reg(mpc83xx_spi-base-mode, regval);
+ // dont write reg unless mode changed.
+ // it causes SPI to go hi-z momentarily
+ // which can cause a spike on the CLK line
+ // this is a problem in MMC where /CS is held asserted
+ // across multiple transactions.
+ if(regval != regval0) {
+ /* Turn off SPI unit prior changing mode */
+ mpc83xx_spi_write_reg(mpc83xx_spi-base-mode,
0);
+ mpc83xx_spi_write_reg(mpc83xx_spi-base-mode,
regval);
+ }
if (mpc83xx_spi-activate_cs)
mpc83xx_spi-activate_cs(spi-chip_select, pol);
}
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Re: Using FEC on a MPC5200 with default PHY configuration
On Mon, Mar 31, 2008 at 3:44 AM, Wolfgang Grandegger [EMAIL PROTECTED] wrote: Wolfgang Grandegger wrote: Hello, is it possible to use the FEC on a MPC5200 with the default hardware PHY configuration. I mean running the link with a default speed without handling or even touching the PHY like U-Boot does. I removed the PHY entries from the DTS file and disabled CONFIG_FEC_MPC52xx_MDIO but it did not work. To be more precise, I want to support a 3-Port managed switch with PHY from Micrel using the direct switch link. I'm actually working on this exact problem at the moment. I'll get a patch out shortly to do so. Cheers, g. -- Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[BUG] 2.6.24.4 - kernel bug at kernel/sched.c:5154!
Hi,
The 2.6.24.4 kernel panic's while booting up on powerpc, The kernel
was compiled with allmodconfig. (please let me know if the .config
file is needed)
[0.00] Kernel command line: ro console=hvc0 rhgb quiet root=LABEL=/1
autobench_args: root=/dev/sda3 ABAT:1206964330
[0.103959] BUG: scheduling while atomic: kthreadd/2/0x0007431c
[0.104051] BUG: scheduling while atomic: kthreadd/3/0xbe118168
[0.104119] [ cut here ]
[0.104127] kernel BUG at kernel/sched.c:5154!
cpu 0x0: Vector: 700 (Program Check) at [c001be11bd70]
pc: c0070b34: .migration_thread+0x64/0x31c
lr: c0093878: .kthread+0x78/0xc4
sp: c001be11bff0
msr: 80029032
current = 0xc000ee0ed740
paca= 0xc0497500
pid = 3, comm = kthreadd
kernel BUG at kernel/sched.c:5154!
enter ? for help
[c001be11c0b0] c0093878 .kthread+0x78/0xc4
[c001be11c140] c002906c .kernel_thread+0x4c/0x68
0:mon r
R00 = 0001 R16 =
R01 = c001be11bff0 R17 =
R02 = c053ab90 R18 =
R03 = R19 = 41c0
R04 = c000ee0ed740 R20 = c0453218
R05 = R21 = 02053488
R06 = c0497500 R22 = 002c2000
R07 = c001be1181b0 R23 = c0453488
R08 = R24 = 02053218
R09 = c000ee0ed73f R25 =
R10 = fffc R26 = c05d40f8
R11 = c0497500 R27 = c05d00b0
R12 = c002906c R28 = c001be0c3ca8
R13 = c0497500 R29 = c0685c00
R14 = R30 = c04f7210
R15 = R31 = c050c788
pc = c0070b34 .migration_thread+0x64/0x31c
lr = c0093878 .kthread+0x78/0xc4
msr = 80029032 cr = 2824
ctr = c0070ad0 xer = 2004 trap = 700
0:mon t
[c001be11c0b0] c0093878 .kthread+0x78/0xc4
[c001be11c140] c002906c .kernel_thread+0x4c/0x68
0:mon S
msr = 80001032 sprg0=
pvr = 003b0200 sprg1= c0497500
dec = c4ac67ed sprg2= c0497500
sp = c001be11b620 sprg3= c0497500
toc = c053ab90 dar =
0xc0070b34 is in migration_thread (kernel/sched.c:5154).
5149{
5150int cpu = (long)data;
5151struct rq *rq;
5152
5153rq = cpu_rq(cpu);
5154BUG_ON(rq-migration_thread != current);
5155
5156set_current_state(TASK_INTERRUPTIBLE);
5157while (!kthread_should_stop()) {
5158struct migration_req *req;
--
Thanks Regards,
Kamalesh Babulal,
Linux Technology Center,
IBM, ISTL.
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Re: [PATCHv2 2/3] ep8248e: Reference SMC parameter RAM base in the device tree.
On Mon, Mar 31, 2008 at 11:08:58AM +0200, Laurent Pinchart wrote: On Friday 28 March 2008 19:07, Scott Wood wrote: Yes, it tells you the virtual address when it's not an identity mapping. It's not currently used on CPM platforms, but might be used down the road with a QE device on 85xx. Will the virtual-reg property on the muram node list the addresses of all muram chunks or the address of the first chunk only ? It should list all the chunks. If you want the size of each chunk, just look at the reg property. Even the end of the first reg resource would be OK. If I use the end of the first resource, can I assume it spans 0x - 0x8000 to set the default tx BD address in Kconfig ? No, especially seeing as it doesn't on any existing boards. :-) I still need a default value :-) It obviously won't work for all boards. Just before 0x8000 won't work for any board, because that area is reserved on CPM2. You could set the default to just before 0x2000 with board-specific exceptions, though. We're getting a bit lost. I'll try to summarize the discussion. - The muram node has a reg property that lists the offsets and sizes of all muram chunks, and an optional virtual-reg property that lists the virtual address of all chunks/the first chunk only. - From the above information I can locate a section of muram at the end of the first chunk (easy) or at the end of the muram (not really difficult, just a bit more complex, especially if chunks are not sorted by their start address). - Kconfig needs a default address for the tx BD. This depends on the allocation strategy (end of first chunk vs. end of last chunk). Is there some consistent default across QE devices ? 0x2000 minus sizeof(...) would be a good default for CPM1 and CPM2 (8280 has its first chunk go up to 0x4000, but for some reason that didn't get reflected in the dts for the one 8280 board in-tree). -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH] [POWERPC] fsldma: Use compatiable binding as spec
Documentation/powerpc/booting-without-of.txt specifies the
compatiables we should bind to for this driver (elo, eloplus).
Use these instead of the extremely specific 'mpc8540' and 'mpc8349'
compatiables.
Signed-off-by: Kumar Gala [EMAIL PROTECTED]
---
Dan, if you don't have any issue with this I'll sent it via the powerpc
tree (since its not really about functionality).
- k
drivers/dma/fsldma.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index 7269230..df16368 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -1021,11 +1021,11 @@ const u32 mpc8349_dma_ip_feature = FSL_DMA_IP_83XX |
FSL_DMA_LITTLE_ENDIAN;
static struct of_device_id of_fsl_dma_chan_ids[] = {
{
- .compatible = fsl,mpc8540-dma-channel,
+ .compatible = fsl,eloplus-dma-channel,
.data = (void *)mpc8540_dma_ip_feature,
},
{
- .compatible = fsl,mpc8349-dma-channel,
+ .compatible = fsl,elo-dma-channel,
.data = (void *)mpc8349_dma_ip_feature,
},
{}
@@ -1107,8 +1107,8 @@ err:
}
static struct of_device_id of_fsl_dma_ids[] = {
- { .compatible = fsl,mpc8540-dma, },
- { .compatible = fsl,mpc8349-dma, },
+ { .compatible = fsl,eloplus-dma, },
+ { .compatible = fsl,elo-dma, },
{}
};
--
1.5.4.1
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v5 patch to add FSL DIU framebuffer driver
Thanks for the feedback from Scott and Anton. Here is the version 5 patch. My previous patch didn't arrive at [EMAIL PROTECTED] Hopefully this issue has been fixed and more feedback from the mailing list. Regards, York ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 2/2 v5] Add DIU platform code for MPC8610HPCD
Add platform code to support Freescale DIU. The platform code includes framebuffer memory allocation, pixel format, monitor port, etc. Signed-off-by: York Sun [EMAIL PROTECTED] Signed-off-by: Timur Tabi [EMAIL PROTECTED] --- This patch addes platform support for Freescale DIU driver, targeting 2.6.26 kernel. arch/powerpc/configs/mpc8610_hpcd_defconfig | 198 +++ arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 190 -- arch/powerpc/sysdev/fsl_soc.c | 41 ++ arch/powerpc/sysdev/fsl_soc.h | 23 +++ 4 files changed, 413 insertions(+), 39 deletions(-) diff --git a/arch/powerpc/configs/mpc8610_hpcd_defconfig b/arch/powerpc/configs/mpc8610_hpcd_defconfig index 2500ef4..98cef01 100644 --- a/arch/powerpc/configs/mpc8610_hpcd_defconfig +++ b/arch/powerpc/configs/mpc8610_hpcd_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.24-rc4 -# Thu Dec 6 16:48:56 2007 +# Linux kernel version: 2.6.25-rc5 +# Tue Mar 25 16:10:42 2008 # # CONFIG_PPC64 is not set @@ -29,6 +29,7 @@ CONFIG_GENERIC_TIME=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_HARDIRQS=y +# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set CONFIG_IRQ_PER_CPU=y CONFIG_RWSEM_XCHGADD_ALGORITHM=y CONFIG_ARCH_HAS_ILOG2_U32=y @@ -65,16 +66,20 @@ CONFIG_LOCALVERSION= # CONFIG_POSIX_MQUEUE is not set # CONFIG_BSD_PROCESS_ACCT is not set # CONFIG_TASKSTATS is not set -# CONFIG_USER_NS is not set -# CONFIG_PID_NS is not set # CONFIG_AUDIT is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 # CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y # CONFIG_FAIR_GROUP_SCHED is not set +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y # CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE= # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set @@ -88,11 +93,13 @@ CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y # CONFIG_ELF_CORE is not set +CONFIG_COMPAT_BRK=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_ANON_INODES=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_VM_EVENT_COUNTERS=y @@ -100,6 +107,13 @@ CONFIG_SLUB_DEBUG=y # CONFIG_SLAB is not set CONFIG_SLUB=y # CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 @@ -122,6 +136,7 @@ CONFIG_DEFAULT_DEADLINE=y # CONFIG_DEFAULT_CFQ is not set # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED=deadline +CONFIG_CLASSIC_RCU=y # # Platform support @@ -130,14 +145,15 @@ CONFIG_DEFAULT_IOSCHED=deadline # CONFIG_PPC_82xx is not set # CONFIG_PPC_83xx is not set CONFIG_PPC_86xx=y -# CONFIG_PPC_MPC52xx is not set -# CONFIG_PPC_MPC5200 is not set +# CONFIG_PPC_MPC512x is not set +# CONFIG_PPC_MPC5121 is not set # CONFIG_PPC_CELL is not set # CONFIG_PPC_CELL_NATIVE is not set # CONFIG_PQ2ADS is not set # CONFIG_MPC8641_HPCN is not set CONFIG_MPC8610_HPCD=y CONFIG_MPC8610=y +# CONFIG_IPIC is not set CONFIG_MPIC=y # CONFIG_MPIC_WEIRD is not set # CONFIG_PPC_I8259 is not set @@ -148,7 +164,6 @@ CONFIG_MPIC=y # CONFIG_PPC_INDIRECT_IO is not set # CONFIG_GENERIC_IOMAP is not set # CONFIG_CPU_FREQ is not set -# CONFIG_CPM2 is not set # CONFIG_FSL_ULI1575 is not set # @@ -164,12 +179,16 @@ CONFIG_GENERIC_CLOCKEVENTS_BUILD=y # CONFIG_HZ_300 is not set CONFIG_HZ_1000=y CONFIG_HZ=1000 +# CONFIG_SCHED_HRTICK is not set CONFIG_PREEMPT_NONE=y # CONFIG_PREEMPT_VOLUNTARY is not set # CONFIG_PREEMPT is not set CONFIG_BINFMT_ELF=y # CONFIG_BINFMT_MISC is not set +# CONFIG_IOMMU_HELPER is not set CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_HAS_WALK_MEMORY=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y CONFIG_ARCH_FLATMEM_ENABLE=y CONFIG_ARCH_POPULATES_NODE_MAP=y CONFIG_SELECT_MEMORY_MODEL=y @@ -188,10 +207,7 @@ CONFIG_VIRT_TO_BUS=y CONFIG_PROC_DEVICETREE=y # CONFIG_CMDLINE_BOOL is not set # CONFIG_PM is not set -CONFIG_SUSPEND_UP_POSSIBLE=y -CONFIG_HIBERNATION_UP_POSSIBLE=y # CONFIG_SECCOMP is not set -# CONFIG_WANT_DEVICE_TREE is not set CONFIG_ISA_DMA_API=y # @@ -243,6 +259,7 @@ CONFIG_XFRM=y CONFIG_XFRM_USER=y # CONFIG_XFRM_SUB_POLICY is not set # CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set # CONFIG_NET_KEY is not set CONFIG_INET=y # CONFIG_IP_MULTICAST is not set @@ -311,6 +328,7 @@ CONFIG_IPV6_SIT=y # # CONFIG_NET_PKTGEN is not set # CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set # CONFIG_IRDA is not set # CONFIG_BT is not set # CONFIG_AF_RXRPC is not set @@ -357,7 +375,7 @@ CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16
[PATCH 1/2 v5] Driver for Freescale 8610 and 5121 DIU
The following features are supported:
plane 0 works as a regular frame buffer, can be accessed by /dev/fb0
plane 1 has two AOIs (area of interest), can be accessed by /dev/fb1 and
/dev/fb2
plane 2 has two AOIs, can be accessed by /dev/fb3 and /dev/fb4
Special ioctls support AOIs
All /dev/fb* can be used as regular frame buffer devices, except hardware
change can
only be made through /dev/fb0. Changing pixel clock has no effect on other fbs.
Limitation of usage of AOIs:
AOIs on the same plane can not be horizonally overlapped
AOIs have horizonal order, i.e. AOI0 should be always on top of AOI1
AOIs can not beyond phisical display area. Application should check AOI geometry
before changing physical resolution on /dev/fb0
required command line parameters to preallocate memory for frame buffer
diufb=15M
optional command line parameters to set modes and monitor
video=fslfb:[resolution][,bpp][,monitor]
Syntax:
Resolution
xres x [EMAIL PROTECTED], the -bpp and @refresh_rate are optional
eg, 1024x768, 1280x1024, 1280x1024-32, [EMAIL PROTECTED], [EMAIL PROTECTED],
[EMAIL PROTECTED]
Bpp
bpp=32, bpp=24, or bpp=16
Monitor
monitor=0, monitor=1, monitor=2
0 is DVI
1 is Single link LVDS
2 is Double link LVDS
Note: switching monitor is a board feather, not DIU feather. MPC8610HPCD has
three
monitor ports to swtich to. MPC5121ADS doesn't have additional monitor port. So
switching
monirot port for MPC5121ADS has no effect.
If compiled as a module, it takes pamameters mode, bpp, monitor with the same
syntax above.
Signed-off-by: York Sun [EMAIL PROTECTED]
Signed-off-by: Timur Tabi [EMAIL PROTECTED]
---
This patch addes new feature of Freescale DIU driver, targeting 2.6.26 kernel.
Documentation/powerpc/booting-without-of.txt | 33 +
arch/powerpc/boot/dts/mpc8610_hpcd.dts | 12 +
drivers/video/Kconfig| 10 +
drivers/video/Makefile |1 +
drivers/video/fsl-diu-fb.c | 1721 ++
drivers/video/fsl-diu-fb.h | 223
6 files changed, 2000 insertions(+), 0 deletions(-)
create mode 100644 drivers/video/fsl-diu-fb.c
create mode 100644 drivers/video/fsl-diu-fb.h
diff --git a/Documentation/powerpc/booting-without-of.txt
b/Documentation/powerpc/booting-without-of.txt
index 7b4e8a7..0c85500 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -2816,6 +2816,39 @@ platforms are moved over to use the
flattened-device-tree model.
big-endian;
};
+r) Freescale Display Interface Unit
+
+The Freescale DIU is a LCD controller, with proper hardware, it can also
+drive DVI monitors.
+
+Required properties:
+- compatible : should be fsl-diu.
+- reg : should contain at least address and length of the DIU register
+ set.
+- Interrupts : one DIU interrupt should be describe here.
+
+Example (MPC8610HPCD)
+ [EMAIL PROTECTED] {
+ compatible = fsl,diu;
+ reg = 0x2c000 100;
+ interrupts = 72 2;
+ interrupt-parent = mpic;
+ };
+
+s) Freescale on board FPGA
+
+This is the memory-mapped registers for on board FPGA.
+
+Required properities:
+- compatible : should be fsl,fpga-pixis.
+- reg : should contain the address and the lenght of the FPPGA register
+ set.
+
+Example (MPC8610HPCD)
+ [EMAIL PROTECTED] {
+ compatible = fsl,fpga-pixis;
+ reg = 0xe800 32;
+ };
More devices will be defined as this spec matures.
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index 16c947b..1f2f1e0 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -45,6 +45,11 @@
reg = 0x 0x2000; // 512M at 0x0
};
+ [EMAIL PROTECTED] {
+ compatible = fsl,fpga-pixis;
+ reg = 0xe800 32; // pixis at 0xe800
+ };
+
[EMAIL PROTECTED] {
#address-cells = 1;
#size-cells = 1;
@@ -104,6 +109,13 @@
interrupt-parent = mpic;
};
+ [EMAIL PROTECTED] {
+ compatible = fsl,diu;
+ reg = 0x2c000 100;
+ interrupts = 72 2;
+ interrupt-parent = mpic;
+ };
+
mpic: [EMAIL PROTECTED] {
clock-frequency = 0;
interrupt-controller;
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index e0b0580..d9c6be4 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -1779,6 +1779,16 @@ config FB_MBX_DEBUG
If unsure, say N.
+config FB_FSL_DIU
+ tristate Freescale DIU framebuffer support
+ depends on FB FSL_SOC
+ select
Re: [kvm-ppc-devel] [PATCH] Add idle power save for ppc 4xx
On Mon, 2008-03-31 at 08:12 -0500, Jerone Young wrote:
# HG changeset patch
# User Jerone Young [EMAIL PROTECTED]
# Date 1206969060 18000
# Node ID 10aea37177130bbe5de7bee6ec06d9010bc5da1f
# Parent 1506aa38ddabb0bf73fff3ac3f3db5f9ef6458cc
Add idle power save for ppc 4xx
This patch sets the wait state MSR when power_save is called in
cpu_idle loop for ppc4xx. This is mainly to help out virtualization
solutions such as KVM. This way the virtualization soultions are able
to tell if the guest kernel is idle.
I have tested this on hardware KVM virtual guest.
Signed-off-by: Jerone Young [EMAIL PROTECTED]
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_GENERIC_TBSYNC)+= smp-tbsy
obj-$(CONFIG_GENERIC_TBSYNC) += smp-tbsync.o
obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
obj-$(CONFIG_6xx)+= idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o
+obj-$(CONFIG_4xx)+= idle_4xx.o
obj-$(CONFIG_TAU)+= tau_6xx.o
obj-$(CONFIG_HIBERNATION)+= swsusp.o suspend.o \
swsusp_$(CONFIG_WORD_SIZE).o
diff --git a/arch/powerpc/kernel/idle_4xx.c b/arch/powerpc/kernel/idle_4xx.c
new file mode 100644
--- /dev/null
+++ b/arch/powerpc/kernel/idle_4xx.c
@@ -0,0 +1,24 @@
+/*
+ * This file contains the power_save function for 4xx CPUs
+ *
+ * added by Jerone Young [EMAIL PROTECTED]
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include asm/processor.h
+#include asm/machdep.h
+
+void ppc4xx_idle()
void ppc4xx_idle(void)
+{
+ unsigned long msr_save;
+
+ /* set wait state MSR */
+ local_irq_enable();
+ msr_save = mfmsr();
+ mtmsr(msr_save|MSR_WE);
Why don't you |MSR_WE|MSR_EE at the same time?
+ local_irq_disable();
+}
None of the other power_save() implementations need this. In fact many
of them don't even seem to return; they just loop around mtmsr.
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -132,6 +132,10 @@ void __init machine_init(unsigned long d
if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
cpu_has_feature(CPU_FTR_CAN_NAP))
ppc_md.power_save = ppc6xx_idle;
+#endif
+
+#ifdef CONFIG_4xx
+ ppc_md.power_save = ppc4xx_idle;
#endif
if (ppc_md.progress)
This belongs in the platform setup code.
--
Hollis Blanchard
IBM Linux Technology Center
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Re: [PATCH] [POWERPC] fsldma: Use compatiable binding as spec
On Mon, Mar 31, 2008 at 9:17 AM, Kumar Gala [EMAIL PROTECTED] wrote: Documentation/powerpc/booting-without-of.txt specifies the compatiables we should bind to for this driver (elo, eloplus). Use these instead of the extremely specific 'mpc8540' and 'mpc8349' compatiables. Signed-off-by: Kumar Gala [EMAIL PROTECTED] --- Dan, if you don't have any issue with this I'll sent it via the powerpc tree (since its not really about functionality). Acked-by: Dan Williams [EMAIL PROTECTED] ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 6/9] [POWERPC] prpmc2800: clean up dts properties
On Sun, Mar 30, 2008 at 09:11:28PM +1100, David Gibson wrote: On Sat, Mar 29, 2008 at 04:59:42PM -0500, Olof Johansson wrote: On Fri, Mar 28, 2008 at 04:49:00PM -0700, Dale Farnsworth wrote: From: Mark A. Greer [EMAIL PROTECTED] Remove several unused (or software config only) properties. Rename marvel node to soc. Technically, it's not an SOC, but its organization is the same as an SOC. Also, rename the block-index property to cell-index to conform to current practice. I see this rename as purely misleading. It isn't an soc, so it shouldn't be named as such. Call it system-controller or something. Pretty much any other name is better. :-) I agree. system-controller, host-bridge, north-bridge, maybe, but not soc. With current conventions, the node name is primarily for the benefit of human readers, so if it misleads it has failed entirely in its purpose. I'm convinced. I'll change it to system-controller. However, I can't resist pointing out that in the existing devtrees with a soc node, the name is also misleading. That node doesn't refer to the SOC itself, but to the part of the SOC containing the peripherals. Whether the system is implemented on one or two chips is an implementation detail irrelevant to the drivers or device tree. -Dale ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCHv3 4/4] cpm2: Reset the CPM when early debugging is not enabled.
Similarly to what is done for PQ1-based platforms, this patch resets the PQ2 Communication Processor Module in cpm2_reset() when early debugging is not enabled. This helps avoiding conflicts when the boot loader configured the CPM in an unexpected way. Signed-off-by: Laurent Pinchart [EMAIL PROTECTED] --- arch/powerpc/sysdev/cpm2.c |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/cpm2.c index 7be7112..57ed1a4 100644 --- a/arch/powerpc/sysdev/cpm2.c +++ b/arch/powerpc/sysdev/cpm2.c @@ -80,6 +80,12 @@ void __init cpm2_reset(void) /* Tell everyone where the comm processor resides. */ cpmp = cpm2_immr-im_cpm; + +#ifndef CONFIG_PPC_EARLY_DEBUG_CPM + /* Reset the CPM. +*/ + cpm_command(CPM_CR_RST, 0); +#endif } static DEFINE_SPINLOCK(cmd_lock); -- 1.5.0 -- Laurent Pinchart CSE Semaphore Belgium Chaussée de Bruxelles, 732A B-1410 Waterloo Belgium T +32 (2) 387 42 59 F +32 (2) 387 42 75 pgp8BChQLwtBd.pgp Description: PGP signature ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCHv3 3/4] ep8248e: Reference SMC parameter RAM base in the device tree.
This patch modifies the Embedded Planet EP8248E device tree to reference the
SMC paramater RAM base register instead of the parameter RAM allocated by the
boot loader.
The cpm_uart driver will allocate parameter RAM itself, making the serial port
initialisation independent of the boot loader.
The patch adds the parameter RAM allocated by the boot loader in the CPM muram
node, making it available to the kernel.
Signed-off-by: Laurent Pinchart [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/ep8248e.dts |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/boot/dts/ep8248e.dts
b/arch/powerpc/boot/dts/ep8248e.dts
index 5d2fb76..756758f 100644
--- a/arch/powerpc/boot/dts/ep8248e.dts
+++ b/arch/powerpc/boot/dts/ep8248e.dts
@@ -121,8 +121,7 @@
[EMAIL PROTECTED] {
compatible = fsl,cpm-muram-data;
- reg = 0 0x1100 0x1140
- 0xec0 0x9800 0x800;
+ reg = 0 0x2000 0x9800 0x800;
};
};
@@ -138,7 +137,7 @@
device_type = serial;
compatible = fsl,mpc8248-smc-uart,
fsl,cpm2-smc-uart;
- reg = 0x11a80 0x20 0x1100 0x40;
+ reg = 0x11a80 0x20 0x87fc 2;
interrupts = 4 8;
interrupt-parent = PIC;
fsl,cpm-brg = 7;
--
1.5.0
--
Laurent Pinchart
CSE Semaphore Belgium
Chaussée de Bruxelles, 732A
B-1410 Waterloo
Belgium
T +32 (2) 387 42 59
F +32 (2) 387 42 75
pgprSrdFgLane.pgp
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[PATCHv3 0/4] cpm2: Reset the CPM at startup and fix the cpm_uart driver accordingly.
Hi everybody, these 4 patches reset the CPM in cpm2_reset() and fix the cpm_uart driver to initialise SMC ports correctly without relying on any initialisation performed by the boot loader/wrapper. They update the boot wrapper code and the EP8248E device tree to match the new SMC registers description. -- Laurent Pinchart CSE Semaphore Belgium Chaussée de Bruxelles, 732A B-1410 Waterloo Belgium T +32 (2) 387 42 59 F +32 (2) 387 42 75 pgptoxnUKyRkU.pgp Description: PGP signature ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCHv3 1/4] cpm_uart: Allocate DPRAM memory for SMC ports on CPM2-based platforms.
This patch allocates parameter RAM for SMC serial ports without relying on
previous initialisation by a boot loader or a wrapper layer.
SMC parameter RAM on CPM2-based platforms can be allocated anywhere in the
general-purpose areas of the dual-port RAM. The current code relies on the
boot loader to allocate a section of general-purpose CPM RAM and gets the
section address from the device tree.
This patch modifies the device tree address usage to reference the SMC
parameter RAM base pointer instead of a pre-allocated RAM section and
allocates memory from the CPM dual-port RAM when initialising the SMC port.
CPM1-based platforms are not affected.
Signed-off-by: Laurent Pinchart [EMAIL PROTECTED]
---
drivers/serial/cpm_uart/cpm_uart.h |3 ++
drivers/serial/cpm_uart/cpm_uart_core.c | 19 +--
drivers/serial/cpm_uart/cpm_uart_cpm1.c | 12 +++
drivers/serial/cpm_uart/cpm_uart_cpm2.c | 52 +++
4 files changed, 76 insertions(+), 10 deletions(-)
diff --git a/drivers/serial/cpm_uart/cpm_uart.h
b/drivers/serial/cpm_uart/cpm_uart.h
index 80a7d60..5334653 100644
--- a/drivers/serial/cpm_uart/cpm_uart.h
+++ b/drivers/serial/cpm_uart/cpm_uart.h
@@ -93,6 +93,9 @@ extern struct uart_cpm_port cpm_uart_ports[UART_NR];
/* these are located in their respective files */
void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd);
+void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port,
+ struct device_node *np);
+void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram);
int cpm_uart_init_portdesc(void);
int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con);
void cpm_uart_freebuf(struct uart_cpm_port *pinfo);
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c
b/drivers/serial/cpm_uart/cpm_uart_core.c
index 1ea123c..3a44a3f 100644
--- a/drivers/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/serial/cpm_uart/cpm_uart_core.c
@@ -997,24 +997,23 @@ static int cpm_uart_init_port(struct device_node *np,
if (!mem)
return -ENOMEM;
- pram = of_iomap(np, 1);
- if (!pram) {
- ret = -ENOMEM;
- goto out_mem;
- }
-
if (of_device_is_compatible(np, fsl,cpm1-scc-uart) ||
of_device_is_compatible(np, fsl,cpm2-scc-uart)) {
pinfo-sccp = mem;
- pinfo-sccup = pram;
+ pinfo-sccup = pram = cpm_uart_map_pram(pinfo, np);
} else if (of_device_is_compatible(np, fsl,cpm1-smc-uart) ||
of_device_is_compatible(np, fsl,cpm2-smc-uart)) {
pinfo-flags |= FLAG_SMC;
pinfo-smcp = mem;
- pinfo-smcup = pram;
+ pinfo-smcup = pram = cpm_uart_map_pram(pinfo, np);
} else {
ret = -ENODEV;
- goto out_pram;
+ goto out_mem;
+ }
+
+ if (!pram) {
+ ret = -ENOMEM;
+ goto out_mem;
}
pinfo-tx_nrfifos = TX_NUM_FIFO;
@@ -1038,7 +1037,7 @@ static int cpm_uart_init_port(struct device_node *np,
return cpm_uart_request_port(pinfo-port);
out_pram:
- iounmap(pram);
+ cpm_uart_unmap_pram(pinfo, pram);
out_mem:
iounmap(mem);
return ret;
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm1.c
b/drivers/serial/cpm_uart/cpm_uart_cpm1.c
index 6ea0366..e692593 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm1.c
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm1.c
@@ -54,6 +54,18 @@ void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
{
cpm_command(port-command, cmd);
}
+
+void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port,
+ struct device_node *np)
+{
+ return of_iomap(np, 1);
+}
+
+void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram)
+{
+ iounmap(pram);
+}
+
#else
void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
{
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.c
b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
index 6291094..a4cfb0b 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm2.c
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
@@ -41,6 +41,9 @@
#include asm/io.h
#include asm/irq.h
#include asm/fs_pd.h
+#ifdef CONFIG_PPC_CPM_NEW_BINDING
+#include asm/prom.h
+#endif
#include linux/serial_core.h
#include linux/kernel.h
@@ -54,6 +57,55 @@ void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
{
cpm_command(port-command, cmd);
}
+
+void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port,
+ struct device_node *np)
+{
+ void __iomem *pram;
+ unsigned long offset;
+ struct resource res;
+ unsigned long len;
+
+ /* Don't remap parameter RAM if it has already been initialized
+* during console setup.
+*/
+ if (IS_SMC(port) port-smcup)
+ return port-smcup;
+ else if (!IS_SMC(port) port-sccup)
+
[PATCHv2] powerpc: Describe memory-mapped RAMROM chips OF bindings
Signed-off-by: Laurent Pinchart [EMAIL PROTECTED] --- Documentation/powerpc/booting-without-of.txt | 13 - 1 files changed, 12 insertions(+), 1 deletions(-) diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt index 7b4e8a7..3e1963b 100644 --- a/Documentation/powerpc/booting-without-of.txt +++ b/Documentation/powerpc/booting-without-of.txt @@ -57,7 +57,8 @@ Table of Contents n) 4xx/Axon EMAC ethernet nodes o) Xilinx IP cores p) Freescale Synchronous Serial Interface - q) USB EHCI controllers + q) USB EHCI controllers + r) Memory-mapped RAM ROM VII - Specifying interrupt information for devices 1) interrupts property @@ -2816,6 +2817,16 @@ platforms are moved over to use the flattened-device-tree model. big-endian; }; + r) Memory-mapped RAM ROM + +Dedicated RAM and ROM chips are often used as storage for temporary or +permanent data in embedded devices. Possible usage include non-volatile +storage in battery-backed SRAM, semi-permanent storage in dedicated SRAM +to preserve data accross reboots and firmware storage in dedicated ROM. + + - name : should be either ram or rom + - reg : Address range of the RAM/ROM chip + More devices will be defined as this spec matures. -- 1.5.0 -- Laurent Pinchart CSE Semaphore Belgium Chaussée de Bruxelles, 732A B-1410 Waterloo Belgium T +32 (2) 387 42 59 F +32 (2) 387 42 75 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [kvm-ppc-devel] [PATCH] Add idle power save for ppc 4xx
On Mon, 2008-03-31 at 11:27 -0500, Hollis Blanchard wrote:
On Mon, 2008-03-31 at 08:12 -0500, Jerone Young wrote:
# HG changeset patch
# User Jerone Young [EMAIL PROTECTED]
# Date 1206969060 18000
# Node ID 10aea37177130bbe5de7bee6ec06d9010bc5da1f
# Parent 1506aa38ddabb0bf73fff3ac3f3db5f9ef6458cc
Add idle power save for ppc 4xx
This patch sets the wait state MSR when power_save is called in
cpu_idle loop for ppc4xx. This is mainly to help out virtualization
solutions such as KVM. This way the virtualization soultions are able
to tell if the guest kernel is idle.
I have tested this on hardware KVM virtual guest.
Signed-off-by: Jerone Young [EMAIL PROTECTED]
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_GENERIC_TBSYNC) += smp-tbsy
obj-$(CONFIG_GENERIC_TBSYNC) += smp-tbsync.o
obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
obj-$(CONFIG_6xx) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o
+obj-$(CONFIG_4xx) += idle_4xx.o
obj-$(CONFIG_TAU) += tau_6xx.o
obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o \
swsusp_$(CONFIG_WORD_SIZE).o
diff --git a/arch/powerpc/kernel/idle_4xx.c b/arch/powerpc/kernel/idle_4xx.c
new file mode 100644
--- /dev/null
+++ b/arch/powerpc/kernel/idle_4xx.c
@@ -0,0 +1,24 @@
+/*
+ * This file contains the power_save function for 4xx CPUs
+ *
+ * added by Jerone Young [EMAIL PROTECTED]
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include asm/processor.h
+#include asm/machdep.h
+
+void ppc4xx_idle()
void ppc4xx_idle(void)
+{
+ unsigned long msr_save;
+
+ /* set wait state MSR */
+ local_irq_enable();
+ msr_save = mfmsr();
+ mtmsr(msr_save|MSR_WE);
Why don't you |MSR_WE|MSR_EE at the same time?
You technically can do this. But the question is do all 4xx cpus use
MSR_EE to enable interrupts? I can assume they do (from what I know),
but figured it would be safer to make the local_irq_enable() call.
I can change it to just set the MSR_EE bit though, since all 4xx cpus
(as far as I know) use it.
+ local_irq_disable();
+}
None of the other power_save() implementations need this. In fact many
of them don't even seem to return; they just loop around mtmsr.
Sure it can be removed. Though with the comment in the mach_dep
structure about power_save. It specifically says that interrupts are off
when it is called. So I was following it here mainly. But I can remove
the disabling of interrupts, since mtmsr is the only used under
power_save.
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -132,6 +132,10 @@ void __init machine_init(unsigned long d
if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
cpu_has_feature(CPU_FTR_CAN_NAP))
ppc_md.power_save = ppc6xx_idle;
+#endif
+
+#ifdef CONFIG_4xx
+ ppc_md.power_save = ppc4xx_idle;
#endif
if (ppc_md.progress)
This belongs in the platform setup code.
I'll move this to the 4xx platform setup code.
___
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Re: [PATCH 1/9] [POWERPC] mv64x60: change FDT compatible prefix to mrvl
On Mon, Mar 31, 2008 at 10:44:20AM +1100, David Gibson wrote: On Fri, Mar 28, 2008 at 05:47:25PM -0600, Grant Likely wrote: On Fri, Mar 28, 2008 at 5:42 PM, Dale Farnsworth [EMAIL PROTECTED] wrote: From: Dale Farnsworth [EMAIL PROTECTED] Follow the convention that compatible names are prefixed by the vendor's stock ticker symbol. For Marvell Technology Group Ltd., that's MRVL. Signed-off-by: Dale Farnsworth [EMAIL PROTECTED] Acked-by: Mark A. Greer [EMAIL PROTECTED] Are there any boards in the wild using the old string? If so are does changing this string risk complicating upgrades to a new kernel version? In particular are there any pre-flattened-tree real-OF systems in the wild using marvell as the vendor prefix (there might be Apple or IBM systems out there with Marvell PHYs for example). It's difficult to prove a negative. However, I've seen no evidence of such systems. When Mark invented the marvell, prefix, it wasn't based on existing practice. However, I believe that the Genesi Pegasos board uses OF and has a Marvell bridge chip. They may have copied the marvell, prefix. Matt, can you check whether any of the Genesi boards contain device node descriptions for the Marvel 64[34]60, and let us know what prefix is used in their compatible properties? Thanks, -Dale ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCHv3 2/4] cpm-serial: Relocate CPM buffer descriptors and SMC parameter ram.
This patch relocates the buffer descriptors and the SMC parameter RAM at the
end of the first CPM muram chunk, as described in the device tree. This allows
device trees to stop excluding SMC parameter ram allocated by the boot loader
from the CPM muram node.
Signed-off-by: Laurent Pinchart [EMAIL PROTECTED]
---
arch/powerpc/Kconfig.debug |2 +-
arch/powerpc/boot/cpm-serial.c | 132 ++--
2 files changed, 87 insertions(+), 47 deletions(-)
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index db7cc34..a86d8d8 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -269,7 +269,7 @@ config PPC_EARLY_DEBUG_CPM_ADDR
hex CPM UART early debug transmit descriptor address
depends on PPC_EARLY_DEBUG_CPM
default 0xfa202008 if PPC_EP88XC
- default 0xf008 if CPM2
+ default 0xf0001ff8 if CPM2
default 0xff002008 if CPM1
help
This specifies the address of the transmit descriptor
diff --git a/arch/powerpc/boot/cpm-serial.c b/arch/powerpc/boot/cpm-serial.c
index 28296fa..8d02b2d 100644
--- a/arch/powerpc/boot/cpm-serial.c
+++ b/arch/powerpc/boot/cpm-serial.c
@@ -11,6 +11,7 @@
#include types.h
#include io.h
#include ops.h
+#include page.h
struct cpm_scc {
u32 gsmrl;
@@ -42,6 +43,22 @@ struct cpm_param {
u16 tbase;
u8 rfcr;
u8 tfcr;
+ u16 mrblr;
+ u32 rstate;
+ u8 res1[4];
+ u16 rbptr;
+ u8 res2[6];
+ u32 tstate;
+ u8 res3[4];
+ u16 tbptr;
+ u8 res4[6];
+ u16 maxidl;
+ u16 idlc;
+ u16 brkln;
+ u16 brkec;
+ u16 brkcr;
+ u16 rmask;
+ u8 res5[4];
};
struct cpm_bd {
@@ -54,10 +71,10 @@ static void *cpcr;
static struct cpm_param *param;
static struct cpm_smc *smc;
static struct cpm_scc *scc;
-struct cpm_bd *tbdf, *rbdf;
+static struct cpm_bd *tbdf, *rbdf;
static u32 cpm_cmd;
-static u8 *muram_start;
-static u32 muram_offset;
+static void *cbd_addr;
+static u32 cbd_offset;
static void (*do_cmd)(int op);
static void (*enable_port)(void);
@@ -119,20 +136,25 @@ static int cpm_serial_open(void)
out_8(param-rfcr, 0x10);
out_8(param-tfcr, 0x10);
-
- rbdf = (struct cpm_bd *)muram_start;
- rbdf-addr = (u8 *)(rbdf + 2);
+ out_be16(param-mrblr, 1);
+ out_be16(param-maxidl, 0);
+ out_be16(param-brkec, 0);
+ out_be16(param-brkln, 0);
+ out_be16(param-brkcr, 0);
+
+ rbdf = cbd_addr;
+ rbdf-addr = (u8 *)rbdf - 1;
rbdf-sc = 0xa000;
rbdf-len = 1;
tbdf = rbdf + 1;
- tbdf-addr = (u8 *)(rbdf + 2) + 1;
+ tbdf-addr = (u8 *)rbdf - 2;
tbdf-sc = 0x2000;
tbdf-len = 1;
sync();
- out_be16(param-rbase, muram_offset);
- out_be16(param-tbase, muram_offset + sizeof(struct cpm_bd));
+ out_be16(param-rbase, cbd_offset);
+ out_be16(param-tbase, cbd_offset + sizeof(struct cpm_bd));
do_cmd(CPM_CMD_INIT_RX_TX);
@@ -173,12 +195,31 @@ static unsigned char cpm_serial_getc(void)
return c;
}
+static int cpm_get_virtual_address(void *devp, void **addr, int ncells)
+{
+ unsigned long xaddr;
+ int n;
+
+ n = getprop(devp, virtual-reg, addr, ncells * sizeof *addr);
+ if (n ncells * sizeof *addr) {
+ for (n = 0; n ncells; n++) {
+ if (!dt_xlate_reg(devp, n, xaddr, NULL))
+ return -1;
+
+ addr[n] = (void*)xaddr;
+ }
+ }
+
+ return ncells;
+}
+
int cpm_console_init(void *devp, struct serial_console_data *scdp)
{
- void *reg_virt[2];
- int is_smc = 0, is_cpm2 = 0, n;
- unsigned long reg_phys;
+ void *reg[2];
void *parent, *muram;
+ void *muram_addr;
+ int is_smc = 0, is_cpm2 = 0;
+ unsigned long muram_offset, muram_size;
if (dt_is_compatible(devp, fsl,cpm1-smc-uart)) {
is_smc = 1;
@@ -202,63 +243,62 @@ int cpm_console_init(void *devp, struct
serial_console_data *scdp)
else
do_cmd = cpm1_cmd;
- n = getprop(devp, fsl,cpm-command, cpm_cmd, 4);
- if (n 4)
+ if (getprop(devp, fsl,cpm-command, cpm_cmd, 4) sizeof cpm_cmd)
return -1;
- n = getprop(devp, virtual-reg, reg_virt, sizeof(reg_virt));
- if (n (int)sizeof(reg_virt)) {
- for (n = 0; n 2; n++) {
- if (!dt_xlate_reg(devp, n, reg_phys, NULL))
- return -1;
-
- reg_virt[n] = (void *)reg_phys;
- }
- }
+ if (cpm_get_virtual_address(devp, reg, 2) 0)
+ return -1;
if (is_smc)
- smc = reg_virt[0];
+ smc = reg[0];
else
- scc = reg_virt[0];
+ scc = reg[0];
- param =
[PATCH] [POWERPC] Fix defconfigs so we dont set both GENRTC and RTCLIB
The new rtc subsystem conflicts with genrtc so don't enable GENRTC if RTCLIB is enabled. Signed-off-by: Kumar Gala [EMAIL PROTECTED] --- arch/powerpc/configs/mpc832x_mds_defconfig | 11 +++ arch/powerpc/configs/mpc834x_mds_defconfig | 11 +++ arch/powerpc/configs/mpc836x_mds_defconfig | 11 +++ arch/powerpc/configs/mpc8544_ds_defconfig | 11 +++ arch/powerpc/configs/mpc8568mds_defconfig | 11 +++ arch/powerpc/configs/mpc8572_ds_defconfig | 11 +++ arch/powerpc/configs/mpc85xx_defconfig | 11 +++ arch/powerpc/configs/mpc8641_hpcn_defconfig | 11 +++ arch/powerpc/configs/prpmc2800_defconfig| 11 +++ arch/powerpc/configs/storcenter_defconfig | 11 +++ 10 files changed, 30 insertions(+), 80 deletions(-) diff --git a/arch/powerpc/configs/mpc832x_mds_defconfig b/arch/powerpc/configs/mpc832x_mds_defconfig index 79d228f..50cceda 100644 --- a/arch/powerpc/configs/mpc832x_mds_defconfig +++ b/arch/powerpc/configs/mpc832x_mds_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.25-rc6 -# Mon Mar 24 08:48:16 2008 +# Linux kernel version: 2.6.25-rc7 +# Mon Mar 31 11:36:51 2008 # # CONFIG_PPC64 is not set @@ -628,8 +628,7 @@ CONFIG_LEGACY_PTY_COUNT=256 # CONFIG_IPMI_HANDLER is not set CONFIG_HW_RANDOM=y # CONFIG_NVRAM is not set -CONFIG_GEN_RTC=y -# CONFIG_GEN_RTC_X is not set +# CONFIG_GEN_RTC is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set # CONFIG_RAW_DRIVER is not set @@ -824,10 +823,6 @@ CONFIG_USB_ARCH_HAS_EHCI=y # CONFIG_EDAC is not set CONFIG_RTC_LIB=y CONFIG_RTC_CLASS=y - -# -# Conflicting RTC option has been selected, check GEN_RTC and RTC -# CONFIG_RTC_HCTOSYS=y CONFIG_RTC_HCTOSYS_DEVICE=rtc0 # CONFIG_RTC_DEBUG is not set diff --git a/arch/powerpc/configs/mpc834x_mds_defconfig b/arch/powerpc/configs/mpc834x_mds_defconfig index 9360144..b4e82c0 100644 --- a/arch/powerpc/configs/mpc834x_mds_defconfig +++ b/arch/powerpc/configs/mpc834x_mds_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.25-rc6 -# Mon Mar 24 08:48:20 2008 +# Linux kernel version: 2.6.25-rc7 +# Mon Mar 31 11:36:56 2008 # # CONFIG_PPC64 is not set @@ -571,8 +571,7 @@ CONFIG_LEGACY_PTY_COUNT=256 # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set # CONFIG_NVRAM is not set -CONFIG_GEN_RTC=y -# CONFIG_GEN_RTC_X is not set +# CONFIG_GEN_RTC is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set # CONFIG_RAW_DRIVER is not set @@ -767,10 +766,6 @@ CONFIG_USB_ARCH_HAS_EHCI=y # CONFIG_EDAC is not set CONFIG_RTC_LIB=y CONFIG_RTC_CLASS=y - -# -# Conflicting RTC option has been selected, check GEN_RTC and RTC -# CONFIG_RTC_HCTOSYS=y CONFIG_RTC_HCTOSYS_DEVICE=rtc0 # CONFIG_RTC_DEBUG is not set diff --git a/arch/powerpc/configs/mpc836x_mds_defconfig b/arch/powerpc/configs/mpc836x_mds_defconfig index 7c8b060..d50a96e 100644 --- a/arch/powerpc/configs/mpc836x_mds_defconfig +++ b/arch/powerpc/configs/mpc836x_mds_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.25-rc6 -# Mon Mar 24 08:48:21 2008 +# Linux kernel version: 2.6.25-rc7 +# Mon Mar 31 11:36:57 2008 # # CONFIG_PPC64 is not set @@ -626,8 +626,7 @@ CONFIG_LEGACY_PTY_COUNT=256 # CONFIG_IPMI_HANDLER is not set CONFIG_HW_RANDOM=y # CONFIG_NVRAM is not set -CONFIG_GEN_RTC=y -# CONFIG_GEN_RTC_X is not set +# CONFIG_GEN_RTC is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set # CONFIG_RAW_DRIVER is not set @@ -822,10 +821,6 @@ CONFIG_USB_ARCH_HAS_EHCI=y # CONFIG_EDAC is not set CONFIG_RTC_LIB=y CONFIG_RTC_CLASS=y - -# -# Conflicting RTC option has been selected, check GEN_RTC and RTC -# CONFIG_RTC_HCTOSYS=y CONFIG_RTC_HCTOSYS_DEVICE=rtc0 # CONFIG_RTC_DEBUG is not set diff --git a/arch/powerpc/configs/mpc8544_ds_defconfig b/arch/powerpc/configs/mpc8544_ds_defconfig index c75b6ae..418bcdb 100644 --- a/arch/powerpc/configs/mpc8544_ds_defconfig +++ b/arch/powerpc/configs/mpc8544_ds_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.25-rc6 -# Mon Mar 24 08:48:26 2008 +# Linux kernel version: 2.6.25-rc7 +# Mon Mar 31 11:37:03 2008 # # CONFIG_PPC64 is not set @@ -742,8 +742,7 @@ CONFIG_LEGACY_PTY_COUNT=256 # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set CONFIG_NVRAM=y -CONFIG_GEN_RTC=y -CONFIG_GEN_RTC_X=y +# CONFIG_GEN_RTC is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set # CONFIG_RAW_DRIVER is not set @@ -1209,10 +1208,6 @@ CONFIG_USB_MON=y # CONFIG_EDAC is not set CONFIG_RTC_LIB=y CONFIG_RTC_CLASS=y - -# -# Conflicting RTC option has been selected, check GEN_RTC and RTC -# CONFIG_RTC_HCTOSYS=y CONFIG_RTC_HCTOSYS_DEVICE=rtc0 # CONFIG_RTC_DEBUG is not set diff --git a/arch/powerpc/configs/mpc8568mds_defconfig
Please pull from 'for-2.6.25' branch
Please pull from 'for-2.6.25' branch of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc.git for-2.6.25 I'd like to get these minor fixes into 2.6.25. They aren't critical but extremely convenient at this point. to receive the following updates: arch/powerpc/boot/dts/mpc8377_mds.dts |4 ++-- arch/powerpc/boot/dts/mpc8377_rdb.dts |3 +-- arch/powerpc/boot/dts/mpc8378_rdb.dts |3 +-- arch/powerpc/boot/dts/mpc8379_mds.dts |8 arch/powerpc/boot/dts/mpc8379_rdb.dts |3 +-- arch/powerpc/configs/mpc832x_mds_defconfig | 11 +++ arch/powerpc/configs/mpc834x_mds_defconfig | 11 +++ arch/powerpc/configs/mpc836x_mds_defconfig | 11 +++ arch/powerpc/configs/mpc837x_rdb_defconfig | 24 +++- arch/powerpc/configs/mpc83xx_defconfig | 24 +++- arch/powerpc/configs/mpc8544_ds_defconfig | 11 +++ arch/powerpc/configs/mpc8568mds_defconfig | 11 +++ arch/powerpc/configs/mpc8572_ds_defconfig | 11 +++ arch/powerpc/configs/mpc85xx_defconfig | 11 +++ arch/powerpc/configs/mpc8641_hpcn_defconfig | 11 +++ arch/powerpc/configs/prpmc2800_defconfig| 11 +++ arch/powerpc/configs/storcenter_defconfig | 11 +++ drivers/ata/sata_fsl.c |5 + drivers/dma/fsldma.c|8 19 files changed, 90 insertions(+), 102 deletions(-) Anton Vorontsov (1): [POWERPC] 83xx: Fix wrong USB phy type in mpc837xrdb dts Kim Phillips (2): [POWERPC] 83xx: enable usb in 837x rdb and 83xx defconfigs [POWERPC] sata_fsl: reduce compatibility to fsl,pq-sata Kumar Gala (2): [POWERPC] fsldma: Use compatiable binding as spec [POWERPC] Fix defconfigs so we dont set both GENRTC and RTCLIB ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCHv2] powerpc: Describe memory-mapped RAMROM chips OF bindings
Hello. Laurent Pinchart wrote: Signed-off-by: Laurent Pinchart [EMAIL PROTECTED] --- Documentation/powerpc/booting-without-of.txt | 13 - 1 files changed, 12 insertions(+), 1 deletions(-) diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt index 7b4e8a7..3e1963b 100644 --- a/Documentation/powerpc/booting-without-of.txt +++ b/Documentation/powerpc/booting-without-of.txt @@ -57,7 +57,8 @@ Table of Contents n) 4xx/Axon EMAC ethernet nodes o) Xilinx IP cores p) Freescale Synchronous Serial Interface - q) USB EHCI controllers + q) USB EHCI controllers + r) Memory-mapped RAM ROM Memory-mapped RA/RO Memory again? Should better drop this. :-) WBR, Sergei ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] Add idle power save for ppc 4xx
On Mon, 2008-03-31 at 08:12 -0500, Jerone Young wrote:
# HG changeset patch
# User Jerone Young [EMAIL PROTECTED]
# Date 1206969060 18000
# Node ID 10aea37177130bbe5de7bee6ec06d9010bc5da1f
# Parent 1506aa38ddabb0bf73fff3ac3f3db5f9ef6458cc
Add idle power save for ppc 4xx
This patch sets the wait state MSR when power_save is called in cpu_idle loop
for ppc4xx. This is mainly to help out virtualization solutions such as KVM.
This way the virtualization soultions are able to tell if the guest kernel is
idle.
I have tested this on hardware KVM virtual guest.
I'm not overly thrilled with adding this to all of 4xx. It doesn't
actually save much power at all (1% on a project that actually measured
it with an amp meter recently) and there's really no other benefit to
doing it outside of the virtual guest case.
I'm assuming you pass a dtb to the virtual guest when you start it up.
Could you define a property in the CPU node there that can be parsed to
use the power_save function instead of always making it the default?
Signed-off-by: Jerone Young [EMAIL PROTECTED]
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_GENERIC_TBSYNC)+= smp-tbsy
obj-$(CONFIG_GENERIC_TBSYNC) += smp-tbsync.o
obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
obj-$(CONFIG_6xx)+= idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o
+obj-$(CONFIG_4xx)+= idle_4xx.o
obj-$(CONFIG_TAU)+= tau_6xx.o
obj-$(CONFIG_HIBERNATION)+= swsusp.o suspend.o \
swsusp_$(CONFIG_WORD_SIZE).o
diff --git a/arch/powerpc/kernel/idle_4xx.c b/arch/powerpc/kernel/idle_4xx.c
new file mode 100644
--- /dev/null
+++ b/arch/powerpc/kernel/idle_4xx.c
Can this be added to sysdev/ppc4xx_soc.c instead?
+#include asm/processor.h
+#include asm/machdep.h
+
+void ppc4xx_idle()
+{
+ unsigned long msr_save;
+
+ /* set wait state MSR */
+ local_irq_enable();
+ msr_save = mfmsr();
+ mtmsr(msr_save|MSR_WE);
+ local_irq_disable();
+}
I agree with Hollis on both the MSR_WE|MSR_EE and removing the
local_irq_disable changes.
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -132,6 +132,10 @@ void __init machine_init(unsigned long d
if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
cpu_has_feature(CPU_FTR_CAN_NAP))
ppc_md.power_save = ppc6xx_idle;
+#endif
+
+#ifdef CONFIG_4xx
+ ppc_md.power_save = ppc4xx_idle;
#endif
I agree this belongs in platform setup code. Finding the right spot for
it might be a bit of a challenge.
josh
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RE: [PATCHv2 2/3] ep8248e: Reference SMC parameter RAM base in thedevice tree.
Scott Wood wrote: 0x2000 minus sizeof(...) would be a good default for CPM1 and CPM2 (8280 has its first chunk go up to 0x4000, but for some reason that didn't get reflected in the dts for the one 8280 board in-tree). Except that last time I tested it, it is not from 0 - 0x4000, but the extra 0x2000 is added from offset 0x9000. So 8280 has available muram from 0 - 0x2000 and 0x9000 - 0xb000 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCHv2 2/3] ep8248e: Reference SMC parameter RAM base in thedevice tree.
Rune Torgersen wrote: Scott Wood wrote: 0x2000 minus sizeof(...) would be a good default for CPM1 and CPM2 (8280 has its first chunk go up to 0x4000, but for some reason that didn't get reflected in the dts for the one 8280 board in-tree). Except that last time I tested it, it is not from 0 - 0x4000, but the extra 0x2000 is added from offset 0x9000. So 8280 has available muram from 0 - 0x2000 and 0x9000 - 0xb000 According to the docs, it has 0 - 0x4000 and 0x9000 - 0xc000. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
RE: [PATCHv2 2/3] ep8248e: Reference SMC parameter RAM base in thedevice tree.
Scott Wood wrote: Rune Torgersen wrote: Scott Wood wrote: 0x2000 minus sizeof(...) would be a good default for CPM1 and CPM2 (8280 has its first chunk go up to 0x4000, but for some reason that didn't get reflected in the dts for the one 8280 board in-tree). Except that last time I tested it, it is not from 0 - 0x4000, but the extra 0x2000 is added from offset 0x9000. So 8280 has available muram from 0 - 0x2000 and 0x9000 - 0xb000 According to the docs, it has 0 - 0x4000 and 0x9000 - 0xc000. I tried it on out 8280 board inhouse, and any addresses from 0x2000 to 0x3fff does not work with at least the MCC's. (running ss7 with the extended ss7 microcode) If I only used 0-0x2000 and 0x9000 to 0xB000 then it is happy. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [kvm-ppc-devel] [PATCH] Add idle power save for ppc 4xx
On Mon, 31 Mar 2008 11:52:02 -0500
Jerone Young [EMAIL PROTECTED] wrote:
void ppc4xx_idle(void)
+{
+ unsigned long msr_save;
+
+ /* set wait state MSR */
+ local_irq_enable();
+ msr_save = mfmsr();
+ mtmsr(msr_save|MSR_WE);
Why don't you |MSR_WE|MSR_EE at the same time?
You technically can do this. But the question is do all 4xx cpus use
MSR_EE to enable interrupts? I can assume they do (from what I know),
They do for enabling external interrupts of normal priority. MSR_CE
might also be used/needed if someone has the watchdog enabled or has an
external device with the UIC pin mapped as a CE.
josh
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Re: [PATCH] Add idle power save for ppc 4xx
On Mon, 2008-03-31 at 13:05 -0500, Josh Boyer wrote: On Mon, 31 Mar 2008 12:07:17 -0500 Josh Boyer [EMAIL PROTECTED] wrote: On Mon, 2008-03-31 at 08:12 -0500, Jerone Young wrote: # HG changeset patch # User Jerone Young [EMAIL PROTECTED] # Date 1206969060 18000 # Node ID 10aea37177130bbe5de7bee6ec06d9010bc5da1f # Parent 1506aa38ddabb0bf73fff3ac3f3db5f9ef6458cc Add idle power save for ppc 4xx This patch sets the wait state MSR when power_save is called in cpu_idle loop for ppc4xx. This is mainly to help out virtualization solutions such as KVM. This way the virtualization soultions are able to tell if the guest kernel is idle. I have tested this on hardware KVM virtual guest. I'm not overly thrilled with adding this to all of 4xx. It doesn't actually save much power at all (1% on a project that actually measured it with an amp meter recently) and there's really no other benefit to doing it outside of the virtual guest case. I'm assuming you pass a dtb to the virtual guest when you start it up. Could you define a property in the CPU node there that can be parsed to use the power_save function instead of always making it the default? Actually, you probably don't want this as a property in the device tree. It doesn't describe hardware. A Kconfig option might be warranted though. I'll go with the Kconfig option. josh ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] Add idle power save for ppc 4xx
On Mon, 2008-03-31 at 12:07 -0500, Josh Boyer wrote:
On Mon, 2008-03-31 at 08:12 -0500, Jerone Young wrote:
# HG changeset patch
# User Jerone Young [EMAIL PROTECTED]
# Date 1206969060 18000
# Node ID 10aea37177130bbe5de7bee6ec06d9010bc5da1f
# Parent 1506aa38ddabb0bf73fff3ac3f3db5f9ef6458cc
Add idle power save for ppc 4xx
This patch sets the wait state MSR when power_save is called in cpu_idle
loop for ppc4xx. This is mainly to help out virtualization solutions such
as KVM. This way the virtualization soultions are able to tell if the guest
kernel is idle.
I have tested this on hardware KVM virtual guest.
I'm not overly thrilled with adding this to all of 4xx. It doesn't
actually save much power at all (1% on a project that actually measured
it with an amp meter recently) and there's really no other benefit to
doing it outside of the virtual guest case.
I'm assuming you pass a dtb to the virtual guest when you start it up.
Could you define a property in the CPU node there that can be parsed to
use the power_save function instead of always making it the default?
Signed-off-by: Jerone Young [EMAIL PROTECTED]
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_GENERIC_TBSYNC) += smp-tbsy
obj-$(CONFIG_GENERIC_TBSYNC) += smp-tbsync.o
obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
obj-$(CONFIG_6xx) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o
+obj-$(CONFIG_4xx) += idle_4xx.o
obj-$(CONFIG_TAU) += tau_6xx.o
obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o \
swsusp_$(CONFIG_WORD_SIZE).o
diff --git a/arch/powerpc/kernel/idle_4xx.c b/arch/powerpc/kernel/idle_4xx.c
new file mode 100644
--- /dev/null
+++ b/arch/powerpc/kernel/idle_4xx.c
Can this be added to sysdev/ppc4xx_soc.c instead?
Probably. Though the other platforms have there power_save code in
idle_platform.S files, as they are in assembly.
Also I don't appear to have ppc4xx_soc.c in my source (using
2.6.25-rc6).
+#include asm/processor.h
+#include asm/machdep.h
+
+void ppc4xx_idle()
+{
+ unsigned long msr_save;
+
+ /* set wait state MSR */
+ local_irq_enable();
+ msr_save = mfmsr();
+ mtmsr(msr_save|MSR_WE);
+ local_irq_disable();
+}
I agree with Hollis on both the MSR_WE|MSR_EE and removing the
local_irq_disable changes.
You mention adding MSR_CE in a followup email. I'll add that to and
remove local_irq_disable.
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -132,6 +132,10 @@ void __init machine_init(unsigned long d
if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
cpu_has_feature(CPU_FTR_CAN_NAP))
ppc_md.power_save = ppc6xx_idle;
+#endif
+
+#ifdef CONFIG_4xx
+ ppc_md.power_save = ppc4xx_idle;
#endif
I agree this belongs in platform setup code. Finding the right spot for
it might be a bit of a challenge.
josh
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Re: [PATCHv3 2/4] cpm-serial: Relocate CPM buffer descriptors and SMC parameter ram.
Laurent Pinchart wrote:
This patch relocates the buffer descriptors and the SMC parameter RAM at the
end of the first CPM muram chunk, as described in the device tree. This allows
device trees to stop excluding SMC parameter ram allocated by the boot loader
from the CPM muram node.
It's usually a good idea to state that something is untested if that's
the case. :-)
This patch cannot work as is.
+static int cpm_get_virtual_address(void *devp, void **addr, int ncells)
+{
+ unsigned long xaddr;
+ int n;
+
+ n = getprop(devp, virtual-reg, addr, ncells * sizeof *addr);
+ if (n ncells * sizeof *addr) {
You must cast the sizeof to a signed int; otherwise, a negative return
from getprop will be bigger than the unsigned size, and you'll return
garbage as the address.
+ for (n = 0; n ncells; n++) {
+ if (!dt_xlate_reg(devp, n, xaddr, NULL))
+ return -1;
+
+ addr[n] = (void*)xaddr;
(void *)
+ }
+ }
+
+ return ncells;
+}
This could be a generic bootwrapper function. It should return the
number of resources (ncells is a misnomer) actually found, though,
rather than failing if there are fewer than asked for. Let the caller
decide if it's fatal.
@@ -202,63 +243,62 @@ int cpm_console_init(void *devp, struct
serial_console_data *scdp)
else
do_cmd = cpm1_cmd;
- n = getprop(devp, fsl,cpm-command, cpm_cmd, 4);
- if (n 4)
+ if (getprop(devp, fsl,cpm-command, cpm_cmd, 4) sizeof cpm_cmd)
return -1;
Standard kernel style is sizeof(foo), not sizeof foo.
Plus, if you're going to replace 4 with sizeof(cpm_cmd), do it both
places. I don't really see the need, though; a cell is always 4 bytes.
- n = getprop(parent, virtual-reg, reg_virt, sizeof(reg_virt));
- if (n (int)sizeof(reg_virt)) {
- if (!dt_xlate_reg(parent, 0, reg_phys, NULL))
- return -1;
-
- reg_virt[0] = (void *)reg_phys;
- }
-
- cpcr = reg_virt[0];
+ if (cpm_get_virtual_address(devp, cpcr, 1) 0)
+ return -1;
s/devp/parent/
muram = finddevice(/soc/cpm/muram/data);
if (!muram)
return -1;
/* For bootwrapper-compatible device trees, we assume that the first
-* entry has at least 18 bytes, and that #address-cells/#data-cells
+* entry has at least 128 bytes, and that #address-cells/#data-cells
* is one for both parent and child.
*/
- n = getprop(muram, virtual-reg, reg_virt, sizeof(reg_virt));
- if (n (int)sizeof(reg_virt)) {
- if (!dt_xlate_reg(muram, 0, reg_phys, NULL))
- return -1;
+ if (cpm_get_virtual_address(devp, muram_addr, 1) 0)
+ return -1;
s/devp/muram/
+
+ if (getprop(muram, reg, reg, sizeof reg) sizeof reg)
+ return -1;
Should read into array of u32, not void *.
+ if (is_cpm2 is_smc) {
+ u16 *smc_base = (u16*)param;
(u16 *)
+ u16 pram_offset;
- muram_start = reg_virt[0];
+ pram_offset = cbd_offset - 64;
+ pram_offset = _ALIGN_DOWN(pram_offset, 64);
+ *smc_base = pram_offset;
Use out_be16().
The SMC should be stopped before you do this.
-Scott
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Re: [PATCH] Add idle power save for ppc 4xx
On Mon, 2008-03-31 at 13:23 -0500, Jerone Young wrote: diff --git a/arch/powerpc/kernel/idle_4xx.c b/arch/powerpc/kernel/idle_4xx.c new file mode 100644 --- /dev/null +++ b/arch/powerpc/kernel/idle_4xx.c Can this be added to sysdev/ppc4xx_soc.c instead? Probably. Though the other platforms have there power_save code in idle_platform.S files, as they are in assembly. No, just two of them do. Cell, pseries, and pasemi all have them under the platform directory. Also I don't appear to have ppc4xx_soc.c in my source (using 2.6.25-rc6). You're working against a very old tree, relatively speaking. Use either my for-2.6.26 branch in my git tree, or the linux-next tree. josh ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] Add idle power save for ppc 4xx
On Mon, 31 Mar 2008 13:05:18 -0500, Josh Boyer wrote: On Mon, 31 Mar 2008 12:07:17 -0500 Josh Boyer [EMAIL PROTECTED] wrote: On Mon, 2008-03-31 at 08:12 -0500, Jerone Young wrote: # HG changeset patch # User Jerone Young [EMAIL PROTECTED] # Date 1206969060 18000 # Node ID 10aea37177130bbe5de7bee6ec06d9010bc5da1f # Parent 1506aa38ddabb0bf73fff3ac3f3db5f9ef6458cc Add idle power save for ppc 4xx This patch sets the wait state MSR when power_save is called in cpu_idle loop for ppc4xx. This is mainly to help out virtualization solutions such as KVM. This way the virtualization soultions are able to tell if the guest kernel is idle. I have tested this on hardware KVM virtual guest. I'm not overly thrilled with adding this to all of 4xx. It doesn't actually save much power at all (1% on a project that actually measured it with an amp meter recently) and there's really no other benefit to doing it outside of the virtual guest case. So it slightly helps hardware, and it helps virtualization a *lot*. What's the problem? I'm assuming you pass a dtb to the virtual guest when you start it up. Could you define a property in the CPU node there that can be parsed to use the power_save function instead of always making it the default? Actually, you probably don't want this as a property in the device tree. It doesn't describe hardware. A Kconfig option might be warranted though. There will be a device tree binding for hypervisor properties, so if it's not always enabled, having a hypervisor node (for any hypervisor) in the device tree would be an indicator. Far better than a Kconfig option, at any rate. -- Hollis Blanchard IBM Linux Technology Center ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] Add idle power save for ppc 4xx
On Mon, 2008-03-31 at 19:24 +, Hollis Blanchard wrote: On Mon, 31 Mar 2008 13:05:18 -0500, Josh Boyer wrote: On Mon, 31 Mar 2008 12:07:17 -0500 Josh Boyer [EMAIL PROTECTED] wrote: On Mon, 2008-03-31 at 08:12 -0500, Jerone Young wrote: # HG changeset patch # User Jerone Young [EMAIL PROTECTED] # Date 1206969060 18000 # Node ID 10aea37177130bbe5de7bee6ec06d9010bc5da1f # Parent 1506aa38ddabb0bf73fff3ac3f3db5f9ef6458cc Add idle power save for ppc 4xx This patch sets the wait state MSR when power_save is called in cpu_idle loop for ppc4xx. This is mainly to help out virtualization solutions such as KVM. This way the virtualization soultions are able to tell if the guest kernel is idle. I have tested this on hardware KVM virtual guest. I'm not overly thrilled with adding this to all of 4xx. It doesn't actually save much power at all (1% on a project that actually measured it with an amp meter recently) and there's really no other benefit to doing it outside of the virtual guest case. So it slightly helps hardware, and it helps virtualization a *lot*. What's the problem? There's 0 publicly available documentation on exactly what Wait State Enable means other than the description for the MSR register bit in the 4xx UM. I'm a very paranoid person. Explain to me what it really provides with some kind of concrete numbers on real hardware and I'll think about it as the default. Until then, I think a Kconfig option (or DT property) is acceptable for now. I didn't say no, I just said make it optional. I'm assuming you pass a dtb to the virtual guest when you start it up. Could you define a property in the CPU node there that can be parsed to use the power_save function instead of always making it the default? Actually, you probably don't want this as a property in the device tree. It doesn't describe hardware. A Kconfig option might be warranted though. There will be a device tree binding for hypervisor properties, so if it's not always enabled, having a hypervisor node (for any hypervisor) in the device tree would be an indicator. Far better than a Kconfig option, at any rate. But you want this in the guests, right? Not the hypervisor... josh ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
cpm2.c error in cpm2_clk_setup
Hi, I found what I think is an error while looking at the above function, in the kernel pull from v2.6.25-rc7, today. The switch(target) contains a case CPM_CLK_SCC1 that sets reg and shift, and then falls through to teh CPM_CLK_SCC2 case. I'm not active in this project; I was simply looking at some code trying to find something, and stumbled across it. I'm bringing this to the list's attention because I have no way to test this, but it sure looks like an error. HTH, Regards, Matt Gessner ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] Add idle power save for ppc 4xx
On Mon, 2008-03-31 at 15:28 -0500, Josh Boyer wrote: On Mon, 2008-03-31 at 19:24 +, Hollis Blanchard wrote: On Mon, 31 Mar 2008 13:05:18 -0500, Josh Boyer wrote: On Mon, 31 Mar 2008 12:07:17 -0500 Josh Boyer [EMAIL PROTECTED] wrote: On Mon, 2008-03-31 at 08:12 -0500, Jerone Young wrote: # HG changeset patch # User Jerone Young [EMAIL PROTECTED] # Date 1206969060 18000 # Node ID 10aea37177130bbe5de7bee6ec06d9010bc5da1f # Parent 1506aa38ddabb0bf73fff3ac3f3db5f9ef6458cc Add idle power save for ppc 4xx This patch sets the wait state MSR when power_save is called in cpu_idle loop for ppc4xx. This is mainly to help out virtualization solutions such as KVM. This way the virtualization soultions are able to tell if the guest kernel is idle. I have tested this on hardware KVM virtual guest. I'm not overly thrilled with adding this to all of 4xx. It doesn't actually save much power at all (1% on a project that actually measured it with an amp meter recently) and there's really no other benefit to doing it outside of the virtual guest case. So it slightly helps hardware, and it helps virtualization a *lot*. What's the problem? There's 0 publicly available documentation on exactly what Wait State Enable means other than the description for the MSR register bit in the 4xx UM. I'm a very paranoid person. Explain to me what it really provides with some kind of concrete numbers on real hardware and I'll think about it as the default. Until then, I think a Kconfig option (or DT property) is acceptable for now. I didn't say no, I just said make it optional. You can be paranoid about all new features, and then new development ceases. Did your project that measured it report any suspicious problems? I'm assuming you pass a dtb to the virtual guest when you start it up. Could you define a property in the CPU node there that can be parsed to use the power_save function instead of always making it the default? Actually, you probably don't want this as a property in the device tree. It doesn't describe hardware. A Kconfig option might be warranted though. There will be a device tree binding for hypervisor properties, so if it's not always enabled, having a hypervisor node (for any hypervisor) in the device tree would be an indicator. Far better than a Kconfig option, at any rate. But you want this in the guests, right? Not the hypervisor... Not sure what you mean. The hypervisor will create device tree properties for the guests, so the guest could use that property to initialize the power_save hook. -- Hollis Blanchard IBM Linux Technology Center ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] Add idle power save for ppc 4xx
On Mon, 2008-03-31 at 13:19 -0500, Jerone Young wrote: On Mon, 2008-03-31 at 13:05 -0500, Josh Boyer wrote: On Mon, 31 Mar 2008 12:07:17 -0500 Josh Boyer [EMAIL PROTECTED] wrote: On Mon, 2008-03-31 at 08:12 -0500, Jerone Young wrote: # HG changeset patch # User Jerone Young [EMAIL PROTECTED] # Date 1206969060 18000 # Node ID 10aea37177130bbe5de7bee6ec06d9010bc5da1f # Parent 1506aa38ddabb0bf73fff3ac3f3db5f9ef6458cc Add idle power save for ppc 4xx This patch sets the wait state MSR when power_save is called in cpu_idle loop for ppc4xx. This is mainly to help out virtualization solutions such as KVM. This way the virtualization soultions are able to tell if the guest kernel is idle. I have tested this on hardware KVM virtual guest. I'm not overly thrilled with adding this to all of 4xx. It doesn't actually save much power at all (1% on a project that actually measured it with an amp meter recently) and there's really no other benefit to doing it outside of the virtual guest case. I'm assuming you pass a dtb to the virtual guest when you start it up. Could you define a property in the CPU node there that can be parsed to use the power_save function instead of always making it the default? Actually, you probably don't want this as a property in the device tree. It doesn't describe hardware. A Kconfig option might be warranted though. I'll go with the Kconfig option. Go with a device-tree check. The pseries kernel supports both bare-metal and hypervisor in the same kernel image, and it works out which it's running on by looking at the device-tree. This seems equivalent to me? cheers -- Michael Ellerman OzLabs, IBM Australia Development Lab wwweb: http://michael.ellerman.id.au phone: +61 2 6212 1183 (tie line 70 21183) We do not inherit the earth from our ancestors, we borrow it from our children. - S.M.A.R.T Person signature.asc Description: This is a digitally signed message part ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 6/9] [POWERPC] prpmc2800: clean up dts properties
However, I can't resist pointing out that in the existing devtrees with a soc node, the name is also misleading. That node doesn't refer to the SOC itself, but to the part of the SOC containing the peripherals. Whether the system is implemented on one or two chips is an implementation detail irrelevant to the drivers or device tree. It's not ideal to call it the-perhaps-virtual-bus-on-the-soc-that- contains-all-of-the-register-blocks-for-all-the-devices-on-the-soc- except-some either. A better name is welcome of course. Maybe it's best to name this node with the name _of_ the SoC (or host bridge, or what ever you want to call it), if that name is not too unwieldy. In general, name should be as generic as is useful, but not more generic than that, because it wouldn't be useful anymore. In any case, it's just name, it should normally only be looked at by humans. Use whatever you like best here, and don't use it in the kernel code. Segher ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 1/9] [POWERPC] mv64x60: change FDT compatible prefix to mrvl
On Mon, Mar 31, 2008 at 09:56:05AM -0700, Dale Farnsworth wrote: On Mon, Mar 31, 2008 at 10:44:20AM +1100, David Gibson wrote: On Fri, Mar 28, 2008 at 05:47:25PM -0600, Grant Likely wrote: On Fri, Mar 28, 2008 at 5:42 PM, Dale Farnsworth [EMAIL PROTECTED] wrote: From: Dale Farnsworth [EMAIL PROTECTED] Follow the convention that compatible names are prefixed by the vendor's stock ticker symbol. For Marvell Technology Group Ltd., that's MRVL. Signed-off-by: Dale Farnsworth [EMAIL PROTECTED] Acked-by: Mark A. Greer [EMAIL PROTECTED] Are there any boards in the wild using the old string? If so are does changing this string risk complicating upgrades to a new kernel version? In particular are there any pre-flattened-tree real-OF systems in the wild using marvell as the vendor prefix (there might be Apple or IBM systems out there with Marvell PHYs for example). It's difficult to prove a negative. However, I've seen no evidence of such systems. When Mark invented the marvell, prefix, it wasn't based on existing practice. However, I believe that the Genesi Pegasos board uses OF and has a Marvell bridge chip. They may have copied the marvell, prefix. Matt, can you check whether any of the Genesi boards contain device node descriptions for the Marvel 64[34]60, and let us know what prefix is used in their compatible properties? Ok, fair enough. As long as you've been duly diligent about checking for existing practice I'm happy. -- David Gibson| I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 00/11] ppc32 mm init clean and 85xx kernel reloc
This set of patches cleans up the initialization of various mmu bits on ppc32 (and a small bit on ppc64 to maintain common code) towards the goal of having an 85xx (book-e) kernel able to run at non-zero offsets. These patches exist in my master and ppc32_mm_init branch. I've dropped them from the powerpc-next as paulus wants them to go via his tree directly since they touch common code. - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 02/11] [POWERPC] Remove Kconfig option BOOT_LOAD
Nothing appears to use BOOT_LOAD so remove it as a configurable option. Signed-off-by: Kumar Gala [EMAIL PROTECTED] --- arch/powerpc/Kconfig | 16 1 files changed, 0 insertions(+), 16 deletions(-) diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 3651355..4d9ced2 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -674,22 +674,6 @@ config CONSISTENT_SIZE hex Size of consistent memory pool if CONSISTENT_SIZE_BOOL default 0x0020 if NOT_COHERENT_CACHE -config BOOT_LOAD_BOOL - bool Set the boot link/load address - depends on ADVANCED_OPTIONS !PPC_MULTIPLATFORM - help - This option allows you to set the initial load address of the zImage - or zImage.initrd file. This can be useful if you are on a board - which has a small amount of memory. - - Say N here unless you know what you are doing. - -config BOOT_LOAD - hex Link/load address for booting if BOOT_LOAD_BOOL - default 0x0040 if 40x || 8xx || 8260 - default 0x0100 if 44x - default 0x0080 - config PIN_TLB bool Pinned Kernel TLBs (860 ONLY) depends on ADVANCED_OPTIONS 8xx -- 1.5.4.1 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 03/11] [POWERPC] Provide access to arch/powerpc include path on ppc64
There does not appear to be any reason that we shouldn't just have -Iarch/$(ARCH) on both ppc32 and ppc64 builds. Signed-off-by: Kumar Gala [EMAIL PROTECTED] --- arch/powerpc/Makefile | 10 -- 1 files changed, 4 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile index ab5cfe8..43ee815 100644 --- a/arch/powerpc/Makefile +++ b/arch/powerpc/Makefile @@ -71,13 +71,11 @@ endif LDFLAGS_vmlinux:= -Bstatic -CPPFLAGS-$(CONFIG_PPC32) := -Iarch/$(ARCH) -AFLAGS-$(CONFIG_PPC32) := -Iarch/$(ARCH) CFLAGS-$(CONFIG_PPC64) := -mminimal-toc -mtraceback=none -mcall-aixdesc -CFLAGS-$(CONFIG_PPC32) := -Iarch/$(ARCH) -ffixed-r2 -mmultiple -KBUILD_CPPFLAGS+= $(CPPFLAGS-y) -KBUILD_AFLAGS += $(AFLAGS-y) -KBUILD_CFLAGS += -msoft-float -pipe $(CFLAGS-y) +CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 -mmultiple +KBUILD_CPPFLAGS+= -Iarch/$(ARCH) +KBUILD_AFLAGS += -Iarch/$(ARCH) +KBUILD_CFLAGS += -msoft-float -pipe -Iarch/$(ARCH) $(CFLAGS-y) CPP= $(CC) -E $(KBUILD_CFLAGS) CHECKFLAGS += -m$(CONFIG_WORD_SIZE) -D__powerpc__ -D__powerpc$(CONFIG_WORD_SIZE)__ -- 1.5.4.1 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 04/11 v2] [POWERPC] Remove and replace uses of PPC_MEMSTART with memstart_addr
A number of users of PPC_MEMSTART (40x, ppc_mmu_32) can just always use
0 as we don't support booting these kernels at non-zero physical addresses
since their exception vectors must be at 0 (or 0xfffx_).
For the sub-arches that support relocatable interrupt vectors (book-e) its
reasonable to have memory start at a non-zero physical address. For those
cases use the variable memstart_addr instead of the #define PPC_MEMSTART
since the only uses of PPC_MEMSTART are for initialization and in the
future we can set memstart_addr at runtime to have a relocatable kernel.
Signed-off-by: Kumar Gala [EMAIL PROTECTED]
---
Fixed warning in ppc_mmu_32.c due to align still being defined.
arch/powerpc/mm/40x_mmu.c |2 +-
arch/powerpc/mm/fsl_booke_mmu.c | 11 +--
arch/powerpc/mm/init_32.c |8
arch/powerpc/mm/mmu_decl.h |1 +
arch/powerpc/mm/pgtable_32.c|5 +++--
arch/powerpc/mm/ppc_mmu_32.c| 11 ++-
include/asm-powerpc/page_32.h |2 --
7 files changed, 16 insertions(+), 24 deletions(-)
diff --git a/arch/powerpc/mm/40x_mmu.c b/arch/powerpc/mm/40x_mmu.c
index 3899ea9..cecbbc7 100644
--- a/arch/powerpc/mm/40x_mmu.c
+++ b/arch/powerpc/mm/40x_mmu.c
@@ -97,7 +97,7 @@ unsigned long __init mmu_mapin_ram(void)
phys_addr_t p;
v = KERNELBASE;
- p = PPC_MEMSTART;
+ p = 0;
s = total_lowmem;
if (__map_without_ltlbs)
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index c93a966..3dd0c81 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
@@ -53,13 +53,12 @@
#include asm/machdep.h
#include asm/setup.h
+#include mmu_decl.h
+
extern void loadcam_entry(unsigned int index);
unsigned int tlbcam_index;
unsigned int num_tlbcam_entries;
static unsigned long __cam0, __cam1, __cam2;
-extern unsigned long total_lowmem;
-extern unsigned long __max_low_memory;
-extern unsigned long __initial_memory_limit;
#define MAX_LOW_MEMCONFIG_LOWMEM_SIZE
#define NUM_TLBCAMS(16)
@@ -165,15 +164,15 @@ void invalidate_tlbcam_entry(int index)
void __init cam_mapin_ram(unsigned long cam0, unsigned long cam1,
unsigned long cam2)
{
- settlbcam(0, PAGE_OFFSET, PPC_MEMSTART, cam0, _PAGE_KERNEL, 0);
+ settlbcam(0, PAGE_OFFSET, memstart_addr, cam0, _PAGE_KERNEL, 0);
tlbcam_index++;
if (cam1) {
tlbcam_index++;
- settlbcam(1, PAGE_OFFSET+cam0, PPC_MEMSTART+cam0, cam1,
_PAGE_KERNEL, 0);
+ settlbcam(1, PAGE_OFFSET+cam0, memstart_addr+cam0, cam1,
_PAGE_KERNEL, 0);
}
if (cam2) {
tlbcam_index++;
- settlbcam(2, PAGE_OFFSET+cam0+cam1, PPC_MEMSTART+cam0+cam1,
cam2, _PAGE_KERNEL, 0);
+ settlbcam(2, PAGE_OFFSET+cam0+cam1, memstart_addr+cam0+cam1,
cam2, _PAGE_KERNEL, 0);
}
}
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 59a725b..01a81a0 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -59,8 +59,9 @@ DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
unsigned long total_memory;
unsigned long total_lowmem;
-unsigned long ppc_memstart;
-unsigned long ppc_memoffset = PAGE_OFFSET;
+phys_addr_t memstart_addr;
+EXPORT_SYMBOL(memstart_addr);
+phys_addr_t lowmem_end_addr;
int boot_mapsize;
#ifdef CONFIG_PPC_PMAC
@@ -145,8 +146,7 @@ void __init MMU_init(void)
printk(KERN_WARNING Only using first contiguous memory
region);
}
- total_memory = lmb_end_of_DRAM();
- total_lowmem = total_memory;
+ total_lowmem = total_memory = lmb_end_of_DRAM() - memstart_addr;
#ifdef CONFIG_FSL_BOOKE
/* Freescale Book-E parts expect lowmem to be mapped by fixed TLB
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
index ebfd13d..5bc11f5 100644
--- a/arch/powerpc/mm/mmu_decl.h
+++ b/arch/powerpc/mm/mmu_decl.h
@@ -51,6 +51,7 @@ extern unsigned long __max_low_memory;
extern unsigned long __initial_memory_limit;
extern unsigned long total_memory;
extern unsigned long total_lowmem;
+extern phys_addr_t memstart_addr;
/* ...and now those things that may be slightly different between processor
* architectures. -- Dan
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index ac3390f..64c44bc 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -281,12 +281,13 @@ int map_page(unsigned long va, phys_addr_t pa, int flags)
*/
void __init mapin_ram(void)
{
- unsigned long v, p, s, f;
+ unsigned long v, s, f;
+ phys_addr_t p;
int ktext;
s = mmu_mapin_ram();
v = KERNELBASE + s;
- p = PPC_MEMSTART + s;
+ p = memstart_addr + s;
for (; s total_lowmem; s += PAGE_SIZE) {
ktext = ((char *) v = _stext (char *) v etext);
f = ktext ?_PAGE_RAM_TEXT : _PAGE_RAM;
diff --git
[PATCH 05/11] [POWERPC] Introduce lowmem_end_addr to distiguish from total_lowmem
total_lowmem represents the amount of low memory not the physical address
that low memory ends at. If the start of memory is at 0 it happends that
total_lowmem can be used as both the size and the address that lowmem
ends at. (technical its one byte beyond the end)
To make the code a bit more clear and deal with the case when the start of
memory isn't at physical 0, we introduce lowmem_end_addr that represents
one byte beyond the last physical address in the lowmem region.
Signed-off-by: Kumar Gala [EMAIL PROTECTED]
---
arch/powerpc/mm/44x_mmu.c |2 +-
arch/powerpc/mm/init_32.c |4 +++-
arch/powerpc/mm/init_64.c |2 ++
arch/powerpc/mm/mem.c | 16 +---
arch/powerpc/mm/mmu_decl.h |1 +
5 files changed, 16 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/mm/44x_mmu.c b/arch/powerpc/mm/44x_mmu.c
index 04dc087..953fb91 100644
--- a/arch/powerpc/mm/44x_mmu.c
+++ b/arch/powerpc/mm/44x_mmu.c
@@ -67,7 +67,7 @@ unsigned long __init mmu_mapin_ram(void)
/* Pin in enough TLBs to cover any lowmem not covered by the
* initial 256M mapping established in head_44x.S */
- for (addr = PPC_PIN_SIZE; addr total_lowmem;
+ for (addr = PPC_PIN_SIZE; addr lowmem_end_addr;
addr += PPC_PIN_SIZE)
ppc44x_pin_tlb(addr + PAGE_OFFSET, addr);
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 01a81a0..345a275 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -147,6 +147,7 @@ void __init MMU_init(void)
}
total_lowmem = total_memory = lmb_end_of_DRAM() - memstart_addr;
+ lowmem_end_addr = memstart_addr + total_lowmem;
#ifdef CONFIG_FSL_BOOKE
/* Freescale Book-E parts expect lowmem to be mapped by fixed TLB
@@ -157,9 +158,10 @@ void __init MMU_init(void)
if (total_lowmem __max_low_memory) {
total_lowmem = __max_low_memory;
+ lowmem_end_addr = memstart_addr + total_lowmem;
#ifndef CONFIG_HIGHMEM
total_memory = total_lowmem;
- lmb_enforce_memory_limit(total_lowmem);
+ lmb_enforce_memory_limit(lowmem_end_addr);
lmb_analyze();
#endif /* CONFIG_HIGHMEM */
}
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index abeb0eb..f18b203 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -75,6 +75,8 @@
/* max amount of RAM to use */
unsigned long __max_memory;
+phys_addr_t memstart_addr;
+
void free_initmem(void)
{
unsigned long addr;
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 60c019c..9c10b14 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -217,9 +217,11 @@ void __init do_init_bootmem(void)
unsigned long total_pages;
int boot_mapsize;
- max_pfn = total_pages = lmb_end_of_DRAM() PAGE_SHIFT;
+ max_pfn = lmb_end_of_DRAM() PAGE_SHIFT;
+ total_pages = (lmb_end_of_DRAM() - memstart_addr) PAGE_SHIFT;
#ifdef CONFIG_HIGHMEM
total_pages = total_lowmem PAGE_SHIFT;
+ max_low_pfn = lowmem_end_addr PAGE_SHIFT;
#endif
/*
@@ -245,18 +247,18 @@ void __init do_init_bootmem(void)
* present.
*/
#ifdef CONFIG_HIGHMEM
- free_bootmem_with_active_regions(0, total_lowmem PAGE_SHIFT);
+ free_bootmem_with_active_regions(0, lowmem_end_addr PAGE_SHIFT);
/* reserve the sections we're already using */
for (i = 0; i lmb.reserved.cnt; i++) {
unsigned long addr = lmb.reserved.region[i].base +
lmb_size_bytes(lmb.reserved, i) - 1;
- if (addr total_lowmem)
+ if (addr lowmem_end_addr)
reserve_bootmem(lmb.reserved.region[i].base,
lmb_size_bytes(lmb.reserved, i),
BOOTMEM_DEFAULT);
- else if (lmb.reserved.region[i].base total_lowmem) {
- unsigned long adjusted_size = total_lowmem -
+ else if (lmb.reserved.region[i].base lowmem_end_addr) {
+ unsigned long adjusted_size = lowmem_end_addr -
lmb.reserved.region[i].base;
reserve_bootmem(lmb.reserved.region[i].base,
adjusted_size, BOOTMEM_DEFAULT);
@@ -326,7 +328,7 @@ void __init paging_init(void)
(top_of_ram - total_ram) 20);
memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
#ifdef CONFIG_HIGHMEM
- max_zone_pfns[ZONE_DMA] = total_lowmem PAGE_SHIFT;
+ max_zone_pfns[ZONE_DMA] = lowmem_end_addr PAGE_SHIFT;
max_zone_pfns[ZONE_HIGHMEM] = top_of_ram PAGE_SHIFT;
#else
max_zone_pfns[ZONE_DMA] = top_of_ram PAGE_SHIFT;
@@ -381,7 +383,7 @@ void __init mem_init(void)
{
unsigned long pfn, highmem_mapnr;
-
[PATCH 06/11] [POWERPC] 85xx: Cleanup TLB initialization
* Determine the RPN we are running the kernel at runtime rather
than using compile time constant for initial TLB
* Cleanup adjust_total_lowmem() to respect memstart_addr and
be a bit more clear on variables that are sizes vs addresses.
Signed-off-by: Kumar Gala [EMAIL PROTECTED]
---
arch/powerpc/kernel/head_fsl_booke.S | 34 --
arch/powerpc/mm/fsl_booke_mmu.c | 37 ++---
2 files changed, 43 insertions(+), 28 deletions(-)
diff --git a/arch/powerpc/kernel/head_fsl_booke.S
b/arch/powerpc/kernel/head_fsl_booke.S
index d9cc2c2..9f40b3e 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -68,7 +68,9 @@ _ENTRY(_start);
mr r29,r5
mr r28,r6
mr r27,r7
+ li r25,0 /* phys kernel start (low) */
li r24,0 /* CPU number */
+ li r23,0 /* phys kernel start (high) */
/* We try to not make any assumptions about how the boot loader
* setup or used the TLBs. We invalidate all mappings from the
@@ -167,7 +169,28 @@ skpinv:addir6,r6,1 /*
Increment */
mtspr SPRN_MAS0,r7
tlbre
- /* Just modify the entry ID, EPN and RPN for the temp mapping */
+ /* grab and fixup the RPN */
+ mfspr r6,SPRN_MAS1/* extract MAS1[SIZE] */
+ rlwinm r6,r6,25,27,30
+ li r8,-1
+ addir6,r6,10
+ slw r6,r8,r6/* convert to mask */
+
+ bl 1f /* Find our address */
+1: mflrr7
+
+ mfspr r8,SPRN_MAS3
+#ifdef CONFIG_PHYS_64BIT
+ mfspr r23,SPRN_MAS7
+#endif
+ and r8,r6,r8
+ subfic r9,r6,-4096
+ and r9,r9,r7
+
+ or r25,r8,r9
+ ori r8,r25,(MAS3_SX|MAS3_SW|MAS3_SR)
+
+ /* Just modify the entry ID and EPN for the temp mapping */
lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */
mtspr SPRN_MAS0,r7
@@ -177,12 +200,10 @@ skpinv: addir6,r6,1 /*
Increment */
ori r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_4K))@l
mtspr SPRN_MAS1,r6
mfspr r6,SPRN_MAS2
- lis r7,[EMAIL PROTECTED]
+ li r7,0/* temp EPN = 0 */
rlwimi r7,r6,0,20,31
mtspr SPRN_MAS2,r7
- mfspr r6,SPRN_MAS3
- rlwimi r7,r6,0,20,31
- mtspr SPRN_MAS3,r7
+ mtspr SPRN_MAS3,r8
tlbwe
xorir6,r4,1
@@ -232,8 +253,7 @@ skpinv: addir6,r6,1 /*
Increment */
ori r6,r6,[EMAIL PROTECTED]
rlwimi r6,r7,0,20,31
mtspr SPRN_MAS2,r6
- li r7,(MAS3_SX|MAS3_SW|MAS3_SR)
- mtspr SPRN_MAS3,r7
+ mtspr SPRN_MAS3,r8
tlbwe
/* 7. Jump to KERNELBASE mapping */
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index 3dd0c81..59f6649 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
@@ -49,7 +49,6 @@
#include asm/mmu.h
#include asm/uaccess.h
#include asm/smp.h
-#include asm/bootx.h
#include asm/machdep.h
#include asm/setup.h
@@ -59,7 +58,6 @@ extern void loadcam_entry(unsigned int index);
unsigned int tlbcam_index;
unsigned int num_tlbcam_entries;
static unsigned long __cam0, __cam1, __cam2;
-#define MAX_LOW_MEMCONFIG_LOWMEM_SIZE
#define NUM_TLBCAMS(16)
@@ -195,35 +193,32 @@ unsigned long __init mmu_mapin_ram(void)
void __init
adjust_total_lowmem(void)
{
- unsigned long max_low_mem = MAX_LOW_MEM;
- unsigned long cam_max = 0x1000;
- unsigned long ram;
+ phys_addr_t max_lowmem_size = __max_low_memory;
+ phys_addr_t cam_max_size = 0x1000;
+ phys_addr_t ram;
- /* adjust CAM size to max_low_mem */
- if (max_low_mem cam_max)
- cam_max = max_low_mem;
+ /* adjust CAM size to max_lowmem_size */
+ if (max_lowmem_size cam_max_size)
+ cam_max_size = max_lowmem_size;
- /* adjust lowmem size to max_low_mem */
- if (max_low_mem total_lowmem)
- ram = max_low_mem;
- else
- ram = total_lowmem;
+ /* adjust lowmem size to max_lowmem_size */
+ ram = min(max_lowmem_size, total_lowmem);
/* Calculate CAM values */
__cam0 = 1UL 2 * (__ilog2(ram) / 2);
- if (__cam0 cam_max)
- __cam0 = cam_max;
+ if (__cam0 cam_max_size)
+ __cam0 = cam_max_size;
ram -= __cam0;
if (ram) {
__cam1 = 1UL 2 * (__ilog2(ram) / 2);
- if (__cam1 cam_max)
- __cam1 = cam_max;
+ if (__cam1 cam_max_size)
+ __cam1 = cam_max_size;
ram -= __cam1;
}
if (ram) {
__cam2 = 1UL 2
[PATCH 07/11] [POWERPC] Use lowmem_end_addr to limit lmb allocations on ppc32
Now that we have a proper variable that is the address of the top of low memory we can use it to limit the lmb allocations. Signed-off-by: Kumar Gala [EMAIL PROTECTED] --- include/asm-powerpc/lmb.h |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/asm-powerpc/lmb.h b/include/asm-powerpc/lmb.h index 028184b..6f5fdf0 100644 --- a/include/asm-powerpc/lmb.h +++ b/include/asm-powerpc/lmb.h @@ -6,8 +6,8 @@ #define LMB_DBG(fmt...) udbg_printf(fmt) #ifdef CONFIG_PPC32 -extern unsigned long __max_low_memory; -#define LMB_REAL_LIMIT __max_low_memory +extern phys_addr_t lowmem_end_addr; +#define LMB_REAL_LIMIT lowmem_end_addr #else #define LMB_REAL_LIMIT 0 #endif -- 1.5.4.1 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 08/11 v2] [POWERPC] Rename __initial_memory_limit to __initial_memory_limit_addr
We always use __initial_memory_limit as an address so rename it
to be clear.
Signed-off-by: Kumar Gala [EMAIL PROTECTED]
---
Fixed a build breakage issue on ebony due to phys_addr_t not being the type
of __initial_memory_limit_addr.
arch/powerpc/mm/fsl_booke_mmu.c |2 +-
arch/powerpc/mm/init_32.c | 10 +-
arch/powerpc/mm/mmu_decl.h |2 +-
arch/powerpc/mm/ppc_mmu_32.c|2 +-
4 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index 59f6649..ada249b 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
@@ -227,5 +227,5 @@ adjust_total_lowmem(void)
__cam0 20, __cam1 20, __cam2 20,
(total_lowmem - __cam0 - __cam1 - __cam2) 20);
__max_low_memory = __cam0 + __cam1 + __cam2;
- __initial_memory_limit = memstart_addr + __max_low_memory;
+ __initial_memory_limit_addr = memstart_addr + __max_low_memory;
}
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 345a275..2c72c39 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -96,10 +96,10 @@ int __map_without_ltlbs;
unsigned long __max_low_memory = MAX_LOW_MEM;
/*
- * limit of what is accessible with initial MMU setup -
+ * address of the limit of what is accessible with initial MMU setup -
* 256MB usually, but only 16MB on 601.
*/
-unsigned long __initial_memory_limit = 0x1000;
+phys_addr_t __initial_memory_limit_addr = (phys_addr_t)0x1000;
/*
* Check for command-line options that affect what MMU_init will do.
@@ -132,10 +132,10 @@ void __init MMU_init(void)
/* 601 can only access 16MB at the moment */
if (PVR_VER(mfspr(SPRN_PVR)) == 1)
- __initial_memory_limit = 0x0100;
+ __initial_memory_limit_addr = 0x0100;
/* 8xx can only access 8MB at the moment */
if (PVR_VER(mfspr(SPRN_PVR)) == 0x50)
- __initial_memory_limit = 0x0080;
+ __initial_memory_limit_addr = 0x0080;
/* parse args from command line */
MMU_setup();
@@ -210,7 +210,7 @@ void __init *early_get_page(void)
p = alloc_bootmem_pages(PAGE_SIZE);
} else {
p = __va(lmb_alloc_base(PAGE_SIZE, PAGE_SIZE,
- __initial_memory_limit));
+ __initial_memory_limit_addr));
}
return p;
}
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
index 67477e7..0480225 100644
--- a/arch/powerpc/mm/mmu_decl.h
+++ b/arch/powerpc/mm/mmu_decl.h
@@ -48,7 +48,7 @@ extern unsigned int num_tlbcam_entries;
extern unsigned long ioremap_bot;
extern unsigned long __max_low_memory;
-extern unsigned long __initial_memory_limit;
+extern phys_addr_t __initial_memory_limit_addr;
extern unsigned long total_memory;
extern unsigned long total_lowmem;
extern phys_addr_t memstart_addr;
diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c
index 65f915c..cef9f15 100644
--- a/arch/powerpc/mm/ppc_mmu_32.c
+++ b/arch/powerpc/mm/ppc_mmu_32.c
@@ -233,7 +233,7 @@ void __init MMU_init_hw(void)
*/
if ( ppc_md.progress ) ppc_md.progress(hash:find piece, 0x322);
Hash = __va(lmb_alloc_base(Hash_size, Hash_size,
- __initial_memory_limit));
+ __initial_memory_limit_addr));
cacheable_memzero(Hash, Hash_size);
_SDR1 = __pa(Hash) | SDR1_LOW_BITS;
--
1.5.4.1
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[PATCH 10/11] [POWERPC] Move phys_addr_t definition into asm/types.h
Moved phys_addr_t out of mmu-*.h and into asm/types.h so we can use it in
places that before would have caused recursive includes.
For example to use phys_addr_t in asm/page.h we would have included
asm/mmu.h which would have possibly included asm/mmu-hash64.h which
includes asm/page.h. Wh recursive include.
Signed-off-by: Kumar Gala [EMAIL PROTECTED]
---
include/asm-powerpc/mmu-40x.h |2 --
include/asm-powerpc/mmu-44x.h |2 --
include/asm-powerpc/mmu-8xx.h |2 --
include/asm-powerpc/mmu-fsl-booke.h |6 --
include/asm-powerpc/mmu-hash32.h|2 --
include/asm-powerpc/mmu-hash64.h|3 ---
include/asm-powerpc/types.h |7 +++
7 files changed, 7 insertions(+), 17 deletions(-)
diff --git a/include/asm-powerpc/mmu-40x.h b/include/asm-powerpc/mmu-40x.h
index 7d37f77..3d10867 100644
--- a/include/asm-powerpc/mmu-40x.h
+++ b/include/asm-powerpc/mmu-40x.h
@@ -53,8 +53,6 @@
#ifndef __ASSEMBLY__
-typedef unsigned long phys_addr_t;
-
typedef struct {
unsigned long id;
unsigned long vdso_base;
diff --git a/include/asm-powerpc/mmu-44x.h b/include/asm-powerpc/mmu-44x.h
index 62772ae..c8b02d9 100644
--- a/include/asm-powerpc/mmu-44x.h
+++ b/include/asm-powerpc/mmu-44x.h
@@ -53,8 +53,6 @@
#ifndef __ASSEMBLY__
-typedef unsigned long long phys_addr_t;
-
typedef struct {
unsigned long id;
unsigned long vdso_base;
diff --git a/include/asm-powerpc/mmu-8xx.h b/include/asm-powerpc/mmu-8xx.h
index 952bd88..9db877e 100644
--- a/include/asm-powerpc/mmu-8xx.h
+++ b/include/asm-powerpc/mmu-8xx.h
@@ -136,8 +136,6 @@
#define SPRN_M_TW 799
#ifndef __ASSEMBLY__
-typedef unsigned long phys_addr_t;
-
typedef struct {
unsigned long id;
unsigned long vdso_base;
diff --git a/include/asm-powerpc/mmu-fsl-booke.h
b/include/asm-powerpc/mmu-fsl-booke.h
index 3758000..925d93c 100644
--- a/include/asm-powerpc/mmu-fsl-booke.h
+++ b/include/asm-powerpc/mmu-fsl-booke.h
@@ -73,12 +73,6 @@
#ifndef __ASSEMBLY__
-#ifndef CONFIG_PHYS_64BIT
-typedef unsigned long phys_addr_t;
-#else
-typedef unsigned long long phys_addr_t;
-#endif
-
typedef struct {
unsigned long id;
unsigned long vdso_base;
diff --git a/include/asm-powerpc/mmu-hash32.h b/include/asm-powerpc/mmu-hash32.h
index 4bd735b..6e21ca6 100644
--- a/include/asm-powerpc/mmu-hash32.h
+++ b/include/asm-powerpc/mmu-hash32.h
@@ -84,8 +84,6 @@ typedef struct {
unsigned long vdso_base;
} mm_context_t;
-typedef unsigned long phys_addr_t;
-
#endif /* !__ASSEMBLY__ */
#endif /* _ASM_POWERPC_MMU_HASH32_H_ */
diff --git a/include/asm-powerpc/mmu-hash64.h b/include/asm-powerpc/mmu-hash64.h
index 2864fa3..0dff767 100644
--- a/include/asm-powerpc/mmu-hash64.h
+++ b/include/asm-powerpc/mmu-hash64.h
@@ -469,9 +469,6 @@ static inline unsigned long get_vsid(unsigned long context,
unsigned long ea,
VSID_MODULUS_256M)
#define KERNEL_VSID(ea)VSID_SCRAMBLE(GET_ESID(ea))
-/* Physical address used by some IO functions */
-typedef unsigned long phys_addr_t;
-
#endif /* __ASSEMBLY__ */
#endif /* _ASM_POWERPC_MMU_HASH64_H_ */
diff --git a/include/asm-powerpc/types.h b/include/asm-powerpc/types.h
index 903fd19..020db52 100644
--- a/include/asm-powerpc/types.h
+++ b/include/asm-powerpc/types.h
@@ -50,6 +50,13 @@ typedef struct {
__u32 u[4];
} __attribute__((aligned(16))) __vector128;
+/* Physical address used by some IO functions */
+#ifndef CONFIG_PHYS_64BIT
+typedef unsigned long phys_addr_t;
+#else
+typedef unsigned long long phys_addr_t;
+#endif
+
#endif /* __ASSEMBLY__ */
#ifdef __KERNEL__
--
1.5.4.1
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[PATCH 11/11] [POWERPC] 85xx: Add support for relocatble kernel (and booting at non-zero)
Added support to allow an 85xx kernel to be run from a non-zero physical address (useful for cooperative asymmetric multiprocessing situations) and kdump. The support can either be at compile time or runtime (CONFIG_RELOCATABLE). Currently we are limited to running at a physical address that is module 256M. This is due to how we map TLBs to cover lowmem and should be fixed up to allow 64M or maybe even 16M alignment in the future. All the magic for this support is accomplished by proper initializating of the kernel memory subsystem properly and ARCH_PFN_OFFSET. Signed-off-by: Kumar Gala [EMAIL PROTECTED] --- arch/powerpc/Kconfig | 69 - arch/powerpc/boot/Makefile |4 +- arch/powerpc/kernel/head_fsl_booke.S | 11 + arch/powerpc/kernel/prom.c |4 ++ arch/powerpc/kernel/setup_64.c |2 +- arch/powerpc/mm/init_32.c|4 +- arch/powerpc/mm/init_64.c|3 +- arch/powerpc/mm/mem.c|5 +- include/asm-powerpc/kdump.h |5 -- include/asm-powerpc/page.h | 43 +--- include/asm-powerpc/page_32.h|6 +++ include/asm-powerpc/pgtable-ppc32.h |5 +-- 12 files changed, 135 insertions(+), 26 deletions(-) diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 4d9ced2..42c22f7 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -619,21 +619,76 @@ config LOWMEM_SIZE hex Maximum low memory size (in bytes) if LOWMEM_SIZE_BOOL default 0x3000 +config RELOCATABLE + bool Build a relocatable kernel (EXPERIMENTAL) + depends on EXPERIMENTAL ADVANCED_OPTIONS FLATMEM FSL_BOOKE + help + This builds a kernel image that is capable of running at the + location the kernel is loaded at (some alignment restrictions may + exist). + + One use is for the kexec on panic case where the recovery kernel + must live at a different physical address than the primary + kernel. + + Note: If CONFIG_RELOCATABLE=y, then the kernel runs from the address + it has been loaded at and the compile time physical addresses + CONFIG_PHYSICAL_START is ignored. However CONFIG_PHYSICAL_START + setting can still be useful to bootwrappers that need to know the + load location of the kernel (eg. u-boot/mkimage). + +config PAGE_OFFSET_BOOL + bool Set custom page offset address + depends on ADVANCED_OPTIONS + help + This option allows you to set the kernel virtual address at which + the kernel will map low memory. This can be useful in optimizing + the virtual memory layout of the system. + + Say N here unless you know what you are doing. + +config PAGE_OFFSET + hex Virtual address of memory base if PAGE_OFFSET_BOOL + default 0xc000 + config KERNEL_START_BOOL bool Set custom kernel base address depends on ADVANCED_OPTIONS help This option allows you to set the kernel virtual address at which - the kernel will map low memory (the kernel image will be linked at - this address). This can be useful in optimizing the virtual memory - layout of the system. + the kernel will be loaded. Normally this should match PAGE_OFFSET + however there are times (like kdump) that one might not want them + to be the same. Say N here unless you know what you are doing. config KERNEL_START hex Virtual address of kernel base if KERNEL_START_BOOL + default PAGE_OFFSET if PAGE_OFFSET_BOOL + default 0xc200 if CRASH_DUMP default 0xc000 +config PHYSICAL_START_BOOL + bool Set physical address where the kernel is loaded + depends on ADVANCED_OPTIONS FLATMEM FSL_BOOKE + help + This gives the physical address where the kernel is loaded. + + Say N here unless you know what you are doing. + +config PHYSICAL_START + hex Physical address where the kernel is loaded if PHYSICAL_START_BOOL + default 0x0200 if PPC_STD_MMU CRASH_DUMP + default 0x + +config PHYSICAL_ALIGN + hex + default 0x1000 if FSL_BOOKE + help + This value puts the alignment restrictions on physical address + where kernel is loaded and run from. Kernel is compiled for an + address which meets above alignment restriction. + config TASK_SIZE_BOOL bool Set custom user task size depends on ADVANCED_OPTIONS @@ -680,9 +735,17 @@ config PIN_TLB endmenu if PPC64 +config PAGE_OFFSET + hex + default 0xc000 config KERNEL_START hex + default 0xc200 if CRASH_DUMP default 0xc000 +config PHYSICAL_START + hex + default 0x0200 if CRASH_DUMP + default 0x endif source net/Kconfig
Re: [PATCH 3/3] sata_fsl: reduce compatibility to fsl,pq-sata
On Mar 28, 2008, at 10:51 AM, Kim Phillips wrote: as prescribed in Documentation/powerpc/booting-without-of.txt. Signed-off-by: Kim Phillips [EMAIL PROTECTED] Cc: Jeff Garzik [EMAIL PROTECTED] --- arch/powerpc/boot/dts/mpc8377_mds.dts |4 ++-- arch/powerpc/boot/dts/mpc8379_mds.dts |8 drivers/ata/sata_fsl.c|5 + 3 files changed, 7 insertions(+), 10 deletions(-) applied. - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 6/9] [POWERPC] prpmc2800: clean up dts properties
On Mon, Mar 31, 2008 at 09:43:02AM -0700, Dale Farnsworth wrote: On Sun, Mar 30, 2008 at 09:11:28PM +1100, David Gibson wrote: On Sat, Mar 29, 2008 at 04:59:42PM -0500, Olof Johansson wrote: On Fri, Mar 28, 2008 at 04:49:00PM -0700, Dale Farnsworth wrote: From: Mark A. Greer [EMAIL PROTECTED] Remove several unused (or software config only) properties. Rename marvel node to soc. Technically, it's not an SOC, but its organization is the same as an SOC. Also, rename the block-index property to cell-index to conform to current practice. I see this rename as purely misleading. It isn't an soc, so it shouldn't be named as such. Call it system-controller or something. Pretty much any other name is better. :-) I agree. system-controller, host-bridge, north-bridge, maybe, but not soc. With current conventions, the node name is primarily for the benefit of human readers, so if it misleads it has failed entirely in its purpose. I'm convinced. I'll change it to system-controller. However, I can't resist pointing out that in the existing devtrees with a soc node, the name is also misleading. That node doesn't refer to the SOC itself, but to the part of the SOC containing the peripherals. Whether the system is implemented on one or two chips is an implementation detail irrelevant to the drivers or device tree. Well, quite so. It's not even all of the peripherals on the SOC, just the ones on Freescale SoCs that are relocatable by the IMMR register. Which is why 4xx SoCs don't use /soc and instead have separate nodes for the on-chip busses. However, /soc is established now, but let's not accrete it with any more badly named examples. -- David Gibson| I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] Add idle power save for ppc 4xx
On Tue, 2008-04-01 at 12:04 +1100, Michael Ellerman wrote: I'm assuming you pass a dtb to the virtual guest when you start it up. Could you define a property in the CPU node there that can be parsed to use the power_save function instead of always making it the default? Actually, you probably don't want this as a property in the device tree. It doesn't describe hardware. A Kconfig option might be warranted though. I'll go with the Kconfig option. Go with a device-tree check. The pseries kernel supports both bare-metal and hypervisor in the same kernel image, and it works out which it's running on by looking at the device-tree. This seems equivalent to me? After some back and forth on IRC, we decided on that as well. I love being right, then wrong, then right again. /me needs more sleep. josh ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] Add idle power save for ppc 4xx
On Mon, 2008-03-31 at 22:15 -0500, Josh Boyer wrote: On Tue, 2008-04-01 at 12:04 +1100, Michael Ellerman wrote: I'm assuming you pass a dtb to the virtual guest when you start it up. Could you define a property in the CPU node there that can be parsed to use the power_save function instead of always making it the default? Actually, you probably don't want this as a property in the device tree. It doesn't describe hardware. A Kconfig option might be warranted though. I'll go with the Kconfig option. Go with a device-tree check. The pseries kernel supports both bare-metal and hypervisor in the same kernel image, and it works out which it's running on by looking at the device-tree. This seems equivalent to me? After some back and forth on IRC, we decided on that as well. I love being right, then wrong, then right again. /me needs more sleep. Better to be right twice rather than once, no? cheers -- Michael Ellerman OzLabs, IBM Australia Development Lab wwweb: http://michael.ellerman.id.au phone: +61 2 6212 1183 (tie line 70 21183) We do not inherit the earth from our ancestors, we borrow it from our children. - S.M.A.R.T Person signature.asc Description: This is a digitally signed message part ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] [POWERPC] Move phys_addr_t definition into asm/types.h
Kumar Gala writes: Moved phys_addr_t out of mmu-*.h and into asm/types.h so we can use it in places that before would have caused recursive includes. For example to use phys_addr_t in asm/page.h we would have included asm/mmu.h which would have possibly included asm/mmu-hash64.h which includes asm/page.h. Wh recursive include. In general this looks fine. I wonder if you should use u64 rather than unsigned long long. Since CONFIG_PHYS_64BIT=n on 64-bit machines (which is itself somewhat counterintuitive) we will actually use unsigned long on 64-bit machines, so it matters less than I originally thought, but it would be worth explaining that in a comment and/or the commit message. Paul. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [patch 06/24] lmb: add lmb_alloc_nid()
[EMAIL PROTECTED] writes:
From: David Miller [EMAIL PROTECTED]
A variant of lmb_alloc() that tries to allocate memory on a specified NUMA
node 'nid' but falls back to normal lmb_alloc() if that fails.
...
+static u64 __init lmb_alloc_nid_unreserved(u64 start, u64 end,
+u64 size, u64 align)
+{
+ u64 base;
+ long j;
+
+ base = lmb_align_down((end - size), align);
+ while (start = base
+((j = lmb_overlaps_region(lmb.reserved, base, size)) = 0))
+ base = lmb_align_down(lmb.reserved.region[j].base - size,
+ align);
How do we know that lmb.reserved.region[j].base is = size at this
point? If it isn't, then base could end up as some extremely large
unsigned value, which would be a Bad Thing.
Paul.
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Re: [patch 06/24] lmb: add lmb_alloc_nid()
From: Paul Mackerras [EMAIL PROTECTED]
Date: Tue, 1 Apr 2008 15:15:46 +1100
[EMAIL PROTECTED] writes:
From: David Miller [EMAIL PROTECTED]
A variant of lmb_alloc() that tries to allocate memory on a specified NUMA
node 'nid' but falls back to normal lmb_alloc() if that fails.
...
+static u64 __init lmb_alloc_nid_unreserved(u64 start, u64 end,
+ u64 size, u64 align)
+{
+ u64 base;
+ long j;
+
+ base = lmb_align_down((end - size), align);
+ while (start = base
+ ((j = lmb_overlaps_region(lmb.reserved, base, size)) = 0))
+ base = lmb_align_down(lmb.reserved.region[j].base - size,
+ align);
How do we know that lmb.reserved.region[j].base is = size at this
point? If it isn't, then base could end up as some extremely large
unsigned value, which would be a Bad Thing.
The same exact issue exists in the existing code, from which this is
derived, in __lmb_alloc_base().
This situation can occur any time a region is smaller than the 'size'
argument, in both functions.
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