Re: [PATCH] [RFC] powerpc: Xilinx: adding virtex5 powerpc 440 support
John == John Linn [EMAIL PROTECTED] writes: Hi John, +config PPC_FPU + depends on XILINX_VIRTEX_5_FXT + bool Enable Xilinx Soft FPU + help +This option enables the Xilinx Soft FPU attached to the APU +interface of the PPC440 (requires DP_FULL FPU pcore). There is already a PPC_FPU option in platforms/Kconfig.cputype Is the Xilinx soft FPU compatible with the normal powerpc FPU? -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 7/14] arch/powerpc: Eliminate NULL test and memset after alloc_bootmem
From: Julia Lawall [EMAIL PROTECTED]
As noted by Akinobu Mita in patch b1fceac2b9e04d278316b2faddf276015fc06e3b,
alloc_bootmem and related functions never return NULL and always return a
zeroed region of memory. Thus a NULL test or memset after calls to these
functions is unnecessary.
A double use of sizeof is also converted to a single use of sizeof in
arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
arch/powerpc/platforms/82xx/pq2ads-pci-pic.c |8 +---
arch/powerpc/platforms/iseries/lpevents.c|1 -
arch/powerpc/platforms/powermac/nvram.c |4
arch/powerpc/sysdev/ipic.c |4
arch/powerpc/sysdev/mpic.c | 11 ++-
arch/powerpc/sysdev/qe_lib/qe_ic.c |4
arch/powerpc/sysdev/uic.c|3 ---
7 files changed, 3 insertions(+), 32 deletions(-)
This was fixed using the following semantic patch.
(http://www.emn.fr/x-info/coccinelle/)
// smpl
@@
expression E;
statement S;
@@
E =
\(alloc_bootmem\|alloc_bootmem_low\|alloc_bootmem_pages\|alloc_bootmem_low_pages\)(...)
... when != E
(
- BUG_ON (E == NULL);
|
- if (E == NULL) S
)
@@
expression E,E1;
@@
E =
\(alloc_bootmem\|alloc_bootmem_low\|alloc_bootmem_pages\|alloc_bootmem_low_pages\)(...)
... when != E
- memset(E,0,E1);
// /smpl
Signed-off-by: Julia Lawall [EMAIL PROTECTED]
---
diff -u -p a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
--- a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
+++ b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
@@ -148,11 +148,6 @@ int __init pq2ads_pci_init_irq(void)
}
priv = alloc_bootmem(sizeof(struct pq2ads_pci_pic));
- if (!priv) {
- of_node_put(np);
- ret = -ENOMEM;
- goto out_unmap_irq;
- }
/* PCI interrupt controller registers: status and mask */
priv-regs = of_iomap(np, 0);
@@ -186,9 +181,8 @@ out_unmap_regs:
iounmap(priv-regs);
out_free_bootmem:
free_bootmem((unsigned long)priv,
-sizeof(sizeof(struct pq2ads_pci_pic)));
+ sizeof(struct pq2ads_pci_pic));
of_node_put(np);
-out_unmap_irq:
irq_dispose_mapping(irq);
out:
return ret;
diff -u -p a/arch/powerpc/platforms/iseries/lpevents.c
b/arch/powerpc/platforms/iseries/lpevents.c
--- a/arch/powerpc/platforms/iseries/lpevents.c
+++ b/arch/powerpc/platforms/iseries/lpevents.c
@@ -203,7 +203,6 @@ void __init setup_hvlpevent_queue(void)
/* Allocate a page for the Event Stack. */
eventStack = alloc_bootmem_pages(IT_LP_EVENT_STACK_SIZE);
- memset(eventStack, 0, IT_LP_EVENT_STACK_SIZE);
/* Invoke the hypervisor to initialize the event stack */
HvCallEvent_setLpEventStack(0, eventStack, IT_LP_EVENT_STACK_SIZE);
diff -u -p a/arch/powerpc/platforms/powermac/nvram.c
b/arch/powerpc/platforms/powermac/nvram.c
--- a/arch/powerpc/platforms/powermac/nvram.c
+++ b/arch/powerpc/platforms/powermac/nvram.c
@@ -520,10 +520,6 @@ static int __init core99_nvram_setup(str
return -EINVAL;
}
nvram_image = alloc_bootmem(NVRAM_SIZE);
- if (nvram_image == NULL) {
- printk(KERN_ERR nvram: can't allocate ram image\n);
- return -ENOMEM;
- }
nvram_data = ioremap(addr, NVRAM_SIZE*2);
nvram_naddrs = 1; /* Make sure we get the correct case */
diff -u -p a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -726,10 +726,6 @@ struct ipic * __init ipic_init(struct de
u32 temp = 0, ret;
ipic = alloc_bootmem(sizeof(struct ipic));
- if (ipic == NULL)
- return NULL;
-
- memset(ipic, 0, sizeof(struct ipic));
ipic-irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR,
NR_IPIC_INTS,
diff -u -p a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -508,8 +508,6 @@ static void __init mpic_scan_ht_pics(str
/* Allocate fixups array */
mpic-fixups = alloc_bootmem(128 * sizeof(struct mpic_irq_fixup));
- BUG_ON(mpic-fixups == NULL);
- memset(mpic-fixups, 0, 128 * sizeof(struct mpic_irq_fixup));
/* Init spinlock */
spin_lock_init(mpic-fixup_lock);
@@ -1010,10 +1008,7 @@ struct mpic * __init mpic_alloc(struct d
u64 paddr = phys_addr;
mpic = alloc_bootmem(sizeof(struct mpic));
- if (mpic == NULL)
- return NULL;
- memset(mpic, 0, sizeof(struct mpic));
mpic-name = name;
mpic-irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR,
@@ -1076,8 +1071,6 @@ struct mpic * __init mpic_alloc(struct d
bits = intvec_top + 1;
mapsize =
Re: [2.6 patch] asm/ptrace.h userspace headers cleanup
Adrian Bunk [EMAIL PROTECTED] wrote: This patch contains the following cleanups for the asm/ptrace.h userspace headers: - include/asm-generic/Kbuild.asm already lists ptrace.h, remove the superfluous listings in the Kbuild files of the following architectures: ... - frv ... - don't expose function prototypes and macros to userspace: ... - mn10300 Acked-by: David Howells [EMAIL PROTECTED] (FRV and MN10300) ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 0/9] powerpc: Add kernel support for POWER7 VSX.
The following set of patches adds Vector Scalar Extentions (VSX) support for POWER7. Includes context switch, ptrace and signals support. Signed-off-by: Michael Neuling [EMAIL PROTECTED] --- Paulus: please consider for your 2.6.27 tree. Updates this post - Comment on VMX vs SPE as suggested by Kumar. - Fixes for core files ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
We are going to change where the floating point registers are stored
in the thread_struct, so in preparation add some macros to access the
floating point registers. Update all code to use these new macros.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
---
arch/powerpc/kernel/align.c |6 ++--
arch/powerpc/kernel/process.c|5 ++-
arch/powerpc/kernel/ptrace.c | 14 +
arch/powerpc/kernel/ptrace32.c | 14 +++--
arch/powerpc/kernel/softemu8xx.c |4 +-
arch/powerpc/math-emu/math.c | 56 +++
include/asm-powerpc/ppc_asm.h|5 ++-
include/asm-powerpc/processor.h |3 ++
8 files changed, 61 insertions(+), 46 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/kernel/align.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/align.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/align.c
@@ -366,7 +366,7 @@ static int emulate_multiple(struct pt_re
static int emulate_fp_pair(struct pt_regs *regs, unsigned char __user *addr,
unsigned int reg, unsigned int flags)
{
- char *ptr = (char *) current-thread.fpr[reg];
+ char *ptr = (char *) current-thread.TS_FPR(reg);
int i, ret;
if (!(flags F))
@@ -784,7 +784,7 @@ int fix_alignment(struct pt_regs *regs)
return -EFAULT;
}
} else if (flags F) {
- data.dd = current-thread.fpr[reg];
+ data.dd = current-thread.TS_FPR(reg);
if (flags S) {
/* Single-precision FP store requires conversion... */
#ifdef CONFIG_PPC_FPU
@@ -862,7 +862,7 @@ int fix_alignment(struct pt_regs *regs)
if (unlikely(ret))
return -EFAULT;
} else if (flags F)
- current-thread.fpr[reg] = data.dd;
+ current-thread.TS_FPR(reg) = data.dd;
else
regs-gpr[reg] = data.ll;
Index: linux-2.6-ozlabs/arch/powerpc/kernel/process.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/process.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/process.c
@@ -110,7 +110,7 @@ int dump_task_fpu(struct task_struct *ts
return 0;
flush_fp_to_thread(current);
- memcpy(fpregs, tsk-thread.fpr[0], sizeof(*fpregs));
+ memcpy(fpregs, tsk-thread.TS_FPR(0), sizeof(*fpregs));
return 1;
}
@@ -689,7 +689,8 @@ void start_thread(struct pt_regs *regs,
#endif
discard_lazy_cpu_state();
- memset(current-thread.fpr, 0, sizeof(current-thread.fpr));
+ memset(current-thread.fpr, 0,
+ sizeof(current-thread.fpr));
current-thread.fpscr.val = 0;
#ifdef CONFIG_ALTIVEC
memset(current-thread.vr, 0, sizeof(current-thread.vr));
Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c
@@ -218,10 +218,10 @@ static int fpr_get(struct task_struct *t
flush_fp_to_thread(target);
BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
-offsetof(struct thread_struct, fpr[32]));
+offsetof(struct thread_struct, TS_FPR(32)));
return user_regset_copyout(pos, count, kbuf, ubuf,
- target-thread.fpr, 0, -1);
+ target-thread.fpr, 0, -1);
}
static int fpr_set(struct task_struct *target, const struct user_regset
*regset,
@@ -231,10 +231,10 @@ static int fpr_set(struct task_struct *t
flush_fp_to_thread(target);
BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
-offsetof(struct thread_struct, fpr[32]));
+offsetof(struct thread_struct, TS_FPR(32)));
return user_regset_copyin(pos, count, kbuf, ubuf,
- target-thread.fpr, 0, -1);
+ target-thread.fpr, 0, -1);
}
@@ -728,7 +728,8 @@ long arch_ptrace(struct task_struct *chi
tmp = ptrace_get_reg(child, (int) index);
} else {
flush_fp_to_thread(child);
- tmp = ((unsigned long *)child-thread.fpr)[index -
PT_FPR0];
+ tmp = ((unsigned long *)child-thread.fpr)
+ [TS_FPRSPACING * (index - PT_FPR0)];
}
ret = put_user(tmp,(unsigned long __user *) data);
break;
@@ -755,7 +756,8 @@ long arch_ptrace(struct task_struct *chi
ret = ptrace_put_reg(child, index, data);
} else {
flush_fp_to_thread(child);
- ((unsigned long *)child-thread.fpr)[index - PT_FPR0] =
[PATCH 3/9] powerpc: Move altivec_unavailable
Move the altivec_unavailable code, to make room at 0xf40 where the vsx_unavailable exception will be. Signed-off-by: Michael Neuling [EMAIL PROTECTED] --- arch/powerpc/kernel/head_64.S |4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) Index: linux-2.6-ozlabs/arch/powerpc/kernel/head_64.S === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/head_64.S +++ linux-2.6-ozlabs/arch/powerpc/kernel/head_64.S @@ -275,7 +275,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) . = 0xf00 b performance_monitor_pSeries - STD_EXCEPTION_PSERIES(0xf20, altivec_unavailable) + . = 0xf20 + b altivec_unavailable_pSeries #ifdef CONFIG_CBE_RAS HSTD_EXCEPTION_PSERIES(0x1200, cbe_system_error) @@ -295,6 +296,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) /* moved from 0xf00 */ STD_EXCEPTION_PSERIES(., performance_monitor) + STD_EXCEPTION_PSERIES(., altivec_unavailable) /* * An interrupt came in while soft-disabled; clear EE in SRR1, ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 4/9] powerpc: Make load_up_fpu and load_up_altivec callable
Make load_up_fpu and load_up_altivec callable so they can be reused by the VSX code. Signed-off-by: Michael Neuling [EMAIL PROTECTED] --- arch/powerpc/kernel/fpu.S|2 +- arch/powerpc/kernel/head_32.S|6 -- arch/powerpc/kernel/head_64.S| 10 +++--- arch/powerpc/kernel/head_booke.h |6 -- 4 files changed, 16 insertions(+), 8 deletions(-) Index: linux-2.6-ozlabs/arch/powerpc/kernel/fpu.S === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/fpu.S +++ linux-2.6-ozlabs/arch/powerpc/kernel/fpu.S @@ -85,7 +85,7 @@ _GLOBAL(load_up_fpu) #endif /* CONFIG_SMP */ /* restore registers and return */ /* we haven't used ctr or xer or lr */ - b fast_exception_return + blr /* * giveup_fpu(tsk) Index: linux-2.6-ozlabs/arch/powerpc/kernel/head_32.S === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/head_32.S +++ linux-2.6-ozlabs/arch/powerpc/kernel/head_32.S @@ -421,8 +421,10 @@ BEGIN_FTR_SECTION b ProgramCheck END_FTR_SECTION_IFSET(CPU_FTR_FPU_UNAVAILABLE) EXCEPTION_PROLOG - bne load_up_fpu /* if from user, just load it up */ - addir3,r1,STACK_FRAME_OVERHEAD + beq 1f + bl load_up_fpu /* if from user, just load it up */ + b fast_exception_return +1: addir3,r1,STACK_FRAME_OVERHEAD EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception) /* Decrementer */ Index: linux-2.6-ozlabs/arch/powerpc/kernel/head_64.S === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/head_64.S +++ linux-2.6-ozlabs/arch/powerpc/kernel/head_64.S @@ -741,7 +741,8 @@ fp_unavailable_common: ENABLE_INTS bl .kernel_fp_unavailable_exception BUG_OPCODE -1: b .load_up_fpu +1: bl .load_up_fpu + b fast_exception_return .align 7 .globl altivec_unavailable_common @@ -749,7 +750,10 @@ altivec_unavailable_common: EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN) #ifdef CONFIG_ALTIVEC BEGIN_FTR_SECTION - bne .load_up_altivec/* if from user, just load it up */ + beq 1f + bl .load_up_altivec + b fast_exception_return +1: END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) #endif bl .save_nvgprs @@ -829,7 +833,7 @@ _STATIC(load_up_altivec) std r4,0(r3) #endif /* CONFIG_SMP */ /* restore registers and return */ - b fast_exception_return + blr #endif /* CONFIG_ALTIVEC */ /* Index: linux-2.6-ozlabs/arch/powerpc/kernel/head_booke.h === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/head_booke.h +++ linux-2.6-ozlabs/arch/powerpc/kernel/head_booke.h @@ -363,8 +363,10 @@ label: #define FP_UNAVAILABLE_EXCEPTION \ START_EXCEPTION(FloatingPointUnavailable) \ NORMAL_EXCEPTION_PROLOG; \ - bne load_up_fpu;/* if from user, just load it up */ \ - addir3,r1,STACK_FRAME_OVERHEAD; \ + beq 1f; \ + bl load_up_fpu;/* if from user, just load it up */ \ + b fast_exception_return;\ +1: addir3,r1,STACK_FRAME_OVERHEAD; \ EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception) #endif /* __HEAD_BOOKE_H__ */ ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 1/9] powerpc: Fix msr setting in 32 bit signal code
If we set the SPE MSR bit in save_user_regs we can blow away the VEC
bit. This doesn't matter in reality as they are infact the same bit
but looks bad.
Also, when we add VSX in a later patch, we need to be able to set two
separate MSR bits here.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
---
arch/powerpc/kernel/signal_32.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/kernel/signal_32.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/signal_32.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/signal_32.c
@@ -336,6 +336,8 @@ struct rt_sigframe {
static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
int sigret)
{
+ unsigned long msr = regs-msr;
+
/* Make sure floating point registers are stored in regs */
flush_fp_to_thread(current);
@@ -354,8 +356,7 @@ static int save_user_regs(struct pt_regs
return 1;
/* set MSR_VEC in the saved MSR value to indicate that
frame-mc_vregs contains valid data */
- if (__put_user(regs-msr | MSR_VEC, frame-mc_gregs[PT_MSR]))
- return 1;
+ msr |= MSR_VEC;
}
/* else assert((regs-msr MSR_VEC) == 0) */
@@ -377,8 +378,7 @@ static int save_user_regs(struct pt_regs
return 1;
/* set MSR_SPE in the saved MSR value to indicate that
frame-mc_vregs contains valid data */
- if (__put_user(regs-msr | MSR_SPE, frame-mc_gregs[PT_MSR]))
- return 1;
+ msr |= MSR_SPE;
}
/* else assert((regs-msr MSR_SPE) == 0) */
@@ -387,6 +387,8 @@ static int save_user_regs(struct pt_regs
return 1;
#endif /* CONFIG_SPE */
+ if (__put_user(msr, frame-mc_gregs[PT_MSR]))
+ return 1;
if (sigret) {
/* Set up the sigreturn trampoline: li r0,sigret; sc */
if (__put_user(0x3800UL + sigret, frame-tramp[0])
___
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[PATCH 6/9] powerpc: Add VSX CPU feature
Add a VSX CPU feature. Also add code to detect if VSX is available
from the device tree.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
Signed-off-by: Joel Schopp [EMAIL PROTECTED]
---
arch/powerpc/kernel/prom.c |4
include/asm-powerpc/cputable.h | 15 ++-
2 files changed, 18 insertions(+), 1 deletion(-)
Index: linux-2.6-ozlabs/arch/powerpc/kernel/prom.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/prom.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/prom.c
@@ -609,6 +609,10 @@ static struct feature_property {
{altivec, 0, CPU_FTR_ALTIVEC, PPC_FEATURE_HAS_ALTIVEC},
{ibm,vmx, 1, CPU_FTR_ALTIVEC, PPC_FEATURE_HAS_ALTIVEC},
#endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_VSX
+ /* Yes, this _really_ is ibm,vmx == 2 to enable VSX */
+ {ibm,vmx, 2, CPU_FTR_VSX, PPC_FEATURE_HAS_VSX},
+#endif /* CONFIG_VSX */
#ifdef CONFIG_PPC64
{ibm,dfp, 1, 0, PPC_FEATURE_HAS_DFP},
{ibm,purr, 1, CPU_FTR_PURR, 0},
Index: linux-2.6-ozlabs/include/asm-powerpc/cputable.h
===
--- linux-2.6-ozlabs.orig/include/asm-powerpc/cputable.h
+++ linux-2.6-ozlabs/include/asm-powerpc/cputable.h
@@ -27,6 +27,7 @@
#define PPC_FEATURE_HAS_DFP0x0400
#define PPC_FEATURE_POWER6_EXT 0x0200
#define PPC_FEATURE_ARCH_2_06 0x0100
+#define PPC_FEATURE_HAS_VSX0x0080
#define PPC_FEATURE_TRUE_LE0x0002
#define PPC_FEATURE_PPC_LE 0x0001
@@ -181,6 +182,7 @@ extern void do_feature_fixups(unsigned l
#define CPU_FTR_DSCR LONG_ASM_CONST(0x0002)
#define CPU_FTR_1T_SEGMENT LONG_ASM_CONST(0x0004)
#define CPU_FTR_NO_SLBIE_B LONG_ASM_CONST(0x0008)
+#define CPU_FTR_VSXLONG_ASM_CONST(0x0010)
#ifndef __ASSEMBLY__
@@ -199,6 +201,17 @@ extern void do_feature_fixups(unsigned l
#define PPC_FEATURE_HAS_ALTIVEC_COMP0
#endif
+/* We only set the VSX features if the kernel was compiled with VSX
+ * support
+ */
+#ifdef CONFIG_VSX
+#define CPU_FTR_VSX_COMP CPU_FTR_VSX
+#define PPC_FEATURE_HAS_VSX_COMP PPC_FEATURE_HAS_VSX
+#else
+#define CPU_FTR_VSX_COMP 0
+#define PPC_FEATURE_HAS_VSX_COMP0
+#endif
+
/* We only set the spe features if the kernel was compiled with spe
* support
*/
@@ -399,7 +412,7 @@ extern void do_feature_fixups(unsigned l
(CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 |\
CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 | \
CPU_FTRS_POWER7 | CPU_FTRS_CELL | CPU_FTRS_PA6T | \
- CPU_FTR_1T_SEGMENT)
+ CPU_FTR_1T_SEGMENT | CPU_FTR_VSX)
#else
enum {
CPU_FTRS_POSSIBLE =
___
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[PATCH 7/9] powerpc: Add VSX assembler code macros
This adds the macros for the VSX load/store instruction as most binutils are not going to support this for a while. Also add VSX register save/restore macros and vsr[0-63] register definitions. Signed-off-by: Michael Neuling [EMAIL PROTECTED] --- include/asm-powerpc/ppc_asm.h | 127 ++ 1 file changed, 127 insertions(+) Index: linux-2.6-ozlabs/include/asm-powerpc/ppc_asm.h === --- linux-2.6-ozlabs.orig/include/asm-powerpc/ppc_asm.h +++ linux-2.6-ozlabs/include/asm-powerpc/ppc_asm.h @@ -74,6 +74,15 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR); REST_10GPRS(22, base) #endif +/* + * Define what the VSX XX1 form instructions will look like, then add + * the 128 bit load store instructions based on that. + */ +#define VSX_XX1(xs, ra, rb)(((xs) 0x1f) 21 | ((ra) 16) | \ +((rb) 11) | (((xs) 5))) + +#define STXVD2X(xs, ra, rb).long (0x7c000798 | VSX_XX1((xs), (ra), (rb))) +#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb))) #define SAVE_2GPRS(n, base)SAVE_GPR(n, base); SAVE_GPR(n+1, base) #define SAVE_4GPRS(n, base)SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base) @@ -110,6 +119,57 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR); #define REST_16VRS(n,b,base) REST_8VRS(n,b,base); REST_8VRS(n+8,b,base) #define REST_32VRS(n,b,base) REST_16VRS(n,b,base); REST_16VRS(n+16,b,base) +/* Save the lower 32 VSRs in the thread VSR region */ +#define SAVE_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); STXVD2X(n,b,base) +#define SAVE_2VSRS(n,b,base) SAVE_VSR(n,b,base); SAVE_VSR(n+1,b,base) +#define SAVE_4VSRS(n,b,base) SAVE_2VSRS(n,b,base); SAVE_2VSRS(n+2,b,base) +#define SAVE_8VSRS(n,b,base) SAVE_4VSRS(n,b,base); SAVE_4VSRS(n+4,b,base) +#define SAVE_16VSRS(n,b,base) SAVE_8VSRS(n,b,base); SAVE_8VSRS(n+8,b,base) +#define SAVE_32VSRS(n,b,base) SAVE_16VSRS(n,b,base); SAVE_16VSRS(n+16,b,base) +#define REST_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); LXVD2X(n,b,base) +#define REST_2VSRS(n,b,base) REST_VSR(n,b,base); REST_VSR(n+1,b,base) +#define REST_4VSRS(n,b,base) REST_2VSRS(n,b,base); REST_2VSRS(n+2,b,base) +#define REST_8VSRS(n,b,base) REST_4VSRS(n,b,base); REST_4VSRS(n+4,b,base) +#define REST_16VSRS(n,b,base) REST_8VSRS(n,b,base); REST_8VSRS(n+8,b,base) +#define REST_32VSRS(n,b,base) REST_16VSRS(n,b,base); REST_16VSRS(n+16,b,base) +/* Save the upper 32 VSRs (32-63) in the thread VSX region (0-31) */ +#define SAVE_VSRU(n,b,base)li b,THREAD_VR0+(16*(n)); STXVD2X(n+32,b,base) +#define SAVE_2VSRSU(n,b,base) SAVE_VSRU(n,b,base); SAVE_VSRU(n+1,b,base) +#define SAVE_4VSRSU(n,b,base) SAVE_2VSRSU(n,b,base); SAVE_2VSRSU(n+2,b,base) +#define SAVE_8VSRSU(n,b,base) SAVE_4VSRSU(n,b,base); SAVE_4VSRSU(n+4,b,base) +#define SAVE_16VSRSU(n,b,base) SAVE_8VSRSU(n,b,base); SAVE_8VSRSU(n+8,b,base) +#define SAVE_32VSRSU(n,b,base) SAVE_16VSRSU(n,b,base); SAVE_16VSRSU(n+16,b,base) +#define REST_VSRU(n,b,base)li b,THREAD_VR0+(16*(n)); LXVD2X(n+32,b,base) +#define REST_2VSRSU(n,b,base) REST_VSRU(n,b,base); REST_VSRU(n+1,b,base) +#define REST_4VSRSU(n,b,base) REST_2VSRSU(n,b,base); REST_2VSRSU(n+2,b,base) +#define REST_8VSRSU(n,b,base) REST_4VSRSU(n,b,base); REST_4VSRSU(n+4,b,base) +#define REST_16VSRSU(n,b,base) REST_8VSRSU(n,b,base); REST_8VSRSU(n+8,b,base) +#define REST_32VSRSU(n,b,base) REST_16VSRSU(n,b,base); REST_16VSRSU(n+16,b,base) + +#ifdef CONFIG_VSX +#define REST_32FPVSRS(n,c,base) \ +BEGIN_FTR_SECTION \ + b 2f; \ +END_FTR_SECTION_IFSET(CPU_FTR_VSX);\ + REST_32FPRS(n,base);\ + b 3f; \ +2: REST_32VSRS(n,c,base); \ +3: + +#define SAVE_32FPVSRS(n,c,base) \ +BEGIN_FTR_SECTION \ + b 2f; \ +END_FTR_SECTION_IFSET(CPU_FTR_VSX);\ + SAVE_32FPRS(n,base);\ + b 3f; \ +2: SAVE_32VSRS(n,c,base); \ +3: + +#else +#define REST_32FPVSRS(n,b,base)REST_32FPRS(n, base) +#define SAVE_32FPVSRS(n,b,base)SAVE_32FPRS(n, base) +#endif + #define SAVE_EVR(n,s,base) evmergehi s,s,n; stw s,THREAD_EVR0+4*(n)(base) #define SAVE_2EVRS(n,s,base) SAVE_EVR(n,s,base); SAVE_EVR(n+1,s,base) #define SAVE_4EVRS(n,s,base) SAVE_2EVRS(n,s,base);
[PATCH 5/9] powerpc: Introduce VSX thread_struct and CONFIG_VSX
The layout of the new VSR registers and how they overlap on top of the
legacy FPR and VR registers is:
VSR doubleword 0 VSR doubleword 1
VSR[0] | FPR[0]| |
VSR[1] | FPR[1]| |
| ... | |
| ... | |
VSR[30] | FPR[30] | |
VSR[31] | FPR[31] | |
VSR[32] | VR[0]|
VSR[33] | VR[1]|
| ... |
| ... |
VSR[62] | VR[30] |
VSR[63] | VR[31] |
VSX has 64 128bit registers. The first 32 regs overlap with the FP
registers and hence extend them with and additional 64 bits. The
second 32 regs overlap with the VMX registers.
This patch introduces the thread_struct changes required to reflect
this register layout. Ptrace and signals code is updated so that the
floating point registers are correctly accessed from the thread_struct
when CONFIG_VSX is enabled.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
---
arch/powerpc/kernel/asm-offsets.c |4 ++
arch/powerpc/kernel/ptrace.c | 28 ++
arch/powerpc/kernel/signal_32.c | 59 --
arch/powerpc/kernel/signal_64.c | 32 ++--
include/asm-powerpc/processor.h | 21 -
5 files changed, 126 insertions(+), 18 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/kernel/asm-offsets.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/asm-offsets.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/asm-offsets.c
@@ -74,6 +74,10 @@ int main(void)
DEFINE(THREAD_VSCR, offsetof(struct thread_struct, vscr));
DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr));
#endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_VSX
+ DEFINE(THREAD_VSR0, offsetof(struct thread_struct, fpr));
+ DEFINE(THREAD_USED_VSR, offsetof(struct thread_struct, used_vsr));
+#endif /* CONFIG_VSX */
#ifdef CONFIG_PPC64
DEFINE(KSP_VSID, offsetof(struct thread_struct, ksp_vsid));
#else /* CONFIG_PPC64 */
Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c
@@ -215,26 +215,54 @@ static int fpr_get(struct task_struct *t
unsigned int pos, unsigned int count,
void *kbuf, void __user *ubuf)
{
+#ifdef CONFIG_VSX
+ double buf[33];
+ int i;
+#endif
flush_fp_to_thread(target);
+#ifdef CONFIG_VSX
+ /* copy to local buffer then write that out */
+ for (i = 0; i 32 ; i++)
+ buf[i] = target-thread.TS_FPR(i);
+ memcpy(buf[32], target-thread.fpscr, sizeof(double));
+ return user_regset_copyout(pos, count, kbuf, ubuf, buf, 0, -1);
+
+#else
BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
offsetof(struct thread_struct, TS_FPR(32)));
return user_regset_copyout(pos, count, kbuf, ubuf,
target-thread.fpr, 0, -1);
+#endif
}
static int fpr_set(struct task_struct *target, const struct user_regset
*regset,
unsigned int pos, unsigned int count,
const void *kbuf, const void __user *ubuf)
{
+#ifdef CONFIG_VSX
+ double buf[33];
+ int i;
+#endif
flush_fp_to_thread(target);
+#ifdef CONFIG_VSX
+ /* copy to local buffer then write that out */
+ i = user_regset_copyin(pos, count, kbuf, ubuf, buf, 0, -1);
+
[PATCH 9/9] powerpc: Add CONFIG_VSX config option
Add CONFIG_VSX config build option. Must compile with POWER4, FPU and ALTIVEC. Signed-off-by: Michael Neuling [EMAIL PROTECTED] --- arch/powerpc/platforms/Kconfig.cputype | 16 1 file changed, 16 insertions(+) Index: linux-2.6-ozlabs/arch/powerpc/platforms/Kconfig.cputype === --- linux-2.6-ozlabs.orig/arch/powerpc/platforms/Kconfig.cputype +++ linux-2.6-ozlabs/arch/powerpc/platforms/Kconfig.cputype @@ -155,6 +155,22 @@ config ALTIVEC If in doubt, say Y here. +config VSX + bool VSX Support + depends on POWER4 ALTIVEC PPC_FPU + ---help--- + + This option enables kernel support for the Vector Scaler extensions + to the PowerPC processor. The kernel currently supports saving and + restoring VSX registers, and turning on the 'VSX enable' bit so user + processes can execute VSX instructions. + + This option is only useful if you have a processor that supports + VSX (P7 and above), but does not have any affect on a non-VSX + CPUs (it does, however add code to the kernel). + + If in doubt, say Y here. + config SPE bool SPE Support depends on E200 || E500 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 8/9] powerpc: Add VSX context save/restore, ptrace and signal support
This patch extends the floating point save and restore code to use the VSX load/stores when VSX is available. This will make FP context save/restore marginally slower on FP only code, when VSX is available, as it has to load/store 128bits rather than just 64bits. Mixing FP, VMX and VSX code will get constant architected state. The signals interface is extended to enable access to VSR 0-31 doubleword 1 after discussions with tool chain maintainers. Backward compatibility is maintained. The ptrace interface is also extended to allow access to VSR 0-31 full registers. Signed-off-by: Michael Neuling [EMAIL PROTECTED] --- arch/powerpc/kernel/entry_64.S |5 + arch/powerpc/kernel/fpu.S| 16 - arch/powerpc/kernel/head_64.S| 65 +++ arch/powerpc/kernel/misc_64.S| 33 arch/powerpc/kernel/ppc32.h |1 arch/powerpc/kernel/ppc_ksyms.c |3 + arch/powerpc/kernel/process.c| 107 ++- arch/powerpc/kernel/ptrace.c | 70 + arch/powerpc/kernel/signal_32.c | 33 arch/powerpc/kernel/signal_64.c | 31 ++- arch/powerpc/kernel/traps.c | 29 ++ include/asm-powerpc/elf.h|6 +- include/asm-powerpc/ptrace.h | 12 include/asm-powerpc/reg.h|2 include/asm-powerpc/sigcontext.h | 37 + include/asm-powerpc/system.h |9 +++ 16 files changed, 451 insertions(+), 8 deletions(-) Index: linux-2.6-ozlabs/arch/powerpc/kernel/entry_64.S === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/entry_64.S +++ linux-2.6-ozlabs/arch/powerpc/kernel/entry_64.S @@ -353,6 +353,11 @@ _GLOBAL(_switch) mflrr20 /* Return to switch caller */ mfmsr r22 li r0, MSR_FP +#ifdef CONFIG_VSX +BEGIN_FTR_SECTION + orisr0,r0,[EMAIL PROTECTED] /* Disable VSX */ +END_FTR_SECTION_IFSET(CPU_FTR_VSX) +#endif /* CONFIG_VSX */ #ifdef CONFIG_ALTIVEC BEGIN_FTR_SECTION orisr0,r0,[EMAIL PROTECTED] /* Disable altivec */ Index: linux-2.6-ozlabs/arch/powerpc/kernel/fpu.S === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/fpu.S +++ linux-2.6-ozlabs/arch/powerpc/kernel/fpu.S @@ -34,6 +34,11 @@ _GLOBAL(load_up_fpu) mfmsr r5 ori r5,r5,MSR_FP +#ifdef CONFIG_VSX +BEGIN_FTR_SECTION + orisr5,r5,[EMAIL PROTECTED] +END_FTR_SECTION_IFSET(CPU_FTR_VSX) +#endif SYNC MTMSRD(r5) /* enable use of fpu now */ isync @@ -50,7 +55,7 @@ _GLOBAL(load_up_fpu) beq 1f toreal(r4) addir4,r4,THREAD/* want last_task_used_math-thread */ - SAVE_32FPRS(0, r4) + SAVE_32FPVSRS(0, r5, r4) mffsfr0 stfdfr0,THREAD_FPSCR(r4) PPC_LL r5,PT_REGS(r4) @@ -77,7 +82,7 @@ _GLOBAL(load_up_fpu) #endif lfd fr0,THREAD_FPSCR(r5) MTFSF_L(fr0) - REST_32FPRS(0, r5) + REST_32FPVSRS(0, r4, r5) #ifndef CONFIG_SMP subir4,r5,THREAD fromreal(r4) @@ -96,6 +101,11 @@ _GLOBAL(load_up_fpu) _GLOBAL(giveup_fpu) mfmsr r5 ori r5,r5,MSR_FP +#ifdef CONFIG_VSX +BEGIN_FTR_SECTION + orisr5,r5,[EMAIL PROTECTED] +END_FTR_SECTION_IFSET(CPU_FTR_VSX) +#endif SYNC_601 ISYNC_601 MTMSRD(r5) /* enable use of fpu now */ @@ -106,7 +116,7 @@ _GLOBAL(giveup_fpu) addir3,r3,THREAD/* want THREAD of task */ PPC_LL r5,PT_REGS(r3) PPC_LCMPI 0,r5,0 - SAVE_32FPRS(0, r3) + SAVE_32FPVSRS(0, r4 ,r3) mffsfr0 stfdfr0,THREAD_FPSCR(r3) beq 1f Index: linux-2.6-ozlabs/arch/powerpc/kernel/head_64.S === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/head_64.S +++ linux-2.6-ozlabs/arch/powerpc/kernel/head_64.S @@ -278,6 +278,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) . = 0xf20 b altivec_unavailable_pSeries + . = 0xf40 + b vsx_unavailable_pSeries + #ifdef CONFIG_CBE_RAS HSTD_EXCEPTION_PSERIES(0x1200, cbe_system_error) #endif /* CONFIG_CBE_RAS */ @@ -297,6 +300,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) /* moved from 0xf00 */ STD_EXCEPTION_PSERIES(., performance_monitor) STD_EXCEPTION_PSERIES(., altivec_unavailable) + STD_EXCEPTION_PSERIES(., vsx_unavailable) /* * An interrupt came in while soft-disabled; clear EE in SRR1, @@ -836,6 +840,67 @@ _STATIC(load_up_altivec) blr #endif /* CONFIG_ALTIVEC */ + .align 7 + .globl vsx_unavailable_common +vsx_unavailable_common: + EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN) +#ifdef CONFIG_VSX +BEGIN_FTR_SECTION + bne .load_up_vsx +1:
Re: [2.6 patch] asm/ptrace.h userspace headers cleanup
Adrian Bunk wrote: This patch contains the following cleanups for the asm/ptrace.h userspace headers: - xtensa: cosmetical change to remove empty #ifndef __ASSEMBLY__ #else #endif from the userspace headers Signed-off-by: Adrian Bunk [EMAIL PROTECTED] The Xtensa part also looks ok. Acked-by: Chris Zankel [EMAIL PROTECTED] Regards, -Chris ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [2.6 patch] asm/ptrace.h userspace headers cleanup
Hi, On Mon, Jun 23, 2008 at 07:48:09PM +0200, Adrian Bunk wrote: This patch contains the following cleanups for the asm/ptrace.h userspace headers: - include/asm-generic/Kbuild.asm already lists ptrace.h, remove the superfluous listings in the Kbuild files of the following architectures: - cris - frv - powerpc - x86 - don't expose function prototypes and macros to userspace: - arm - blackfin - cris - mn10300 - parisc - remove #ifdef CONFIG_'s around #define's: - blackfin - m68knommu - sh: AFAIK __SH5__ should work in both kernel and userspace, no need to leak CONFIG_SUPERH64 to userspace - xtensa: cosmetical change to remove empty #ifndef __ASSEMBLY__ #else #endif from the userspace headers Signed-off-by: Adrian Bunk [EMAIL PROTECTED] The CRIS parts look ok. Acked-by: Jesper Nilsson [EMAIL PROTECTED] /^JN - Jesper Nilsson -- Jesper Nilsson -- [EMAIL PROTECTED] ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: starting with 2.6.26-rc1 cell_defconfig fails on QS22
On Tue, Jun 24, 2008 at 09:45:32AM +1000, Jeremy Kerr wrote: Somehow I expect that I am doing something wrong, because nobody else has reported something like this yet. Seems to work fine here - just booted 945754a on a QS22 with cell_defconfig: [EMAIL PROTECTED] ~]$ cat /proc/version Linux version 2.6.26-rc7-09992-g945754a ([EMAIL PROTECTED]) (gcc version 4.1.3 20080114 (prerelease) (Debian 4.1.2-19)) #154 SMP Tue Jun 24 09:32:59 EST 2008 Reverting that commit definitely fixes the problem for you? Perhaps a binutils problem then? D'oh. I spent so much time and the solution is so easy. Thanks everybody. I have updated to binutils-2.18.50.0.6-2.ppc and now it works again on QS22 and JS21. Adrian ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 02/14] powerpc: Allow create_branch() to return errors
Michael Ellerman wrote: Currently create_branch() creates a branch instruction for you, and patches it into the call site. In some circumstances it would be nice to be able to create the instruction and patch it later, and also some code might want to check for errors in the branch creation before doing the patching. A future patch will change create_branch() to check for errors. For callers that don't care, replace create_branch() with patch_branch(), which just creates the branch and patches it directly. While we're touching all the callers, change to using unsigned int *, as this seems to match usage better. That allows (and requires) us to remove the volatile in the definition of vector in powermac/smp.c and mpc86xx_smp.c, that's correct because now that we're passing vector as an unsigned int * the compiler knows that it's value might change across the patch_branch() call. Signed-off-by: Michael Ellerman [EMAIL PROTECTED] --- 86xx bits... Acked-by: Jon Loeliger [EMAIL PROTECTED] ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 04/14] powerpc: Add ppc_function_entry() which gets the entry point for a function
On Jun 23, 2008, at 8:32 PM, Michael Ellerman wrote: Because function pointers point to different things on 32-bit vs 64- bit, add a macro that deals with dereferencing the OPD on 64-bit. The soon to be merged ftrace wants this, as well as other code I am working on. Signed-off-by: Michael Ellerman [EMAIL PROTECTED] Acked-by: Kumar Gala [EMAIL PROTECTED] - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 12/14] powerpc: Add logic to patch alternative feature sections
On Jun 23, 2008, at 8:33 PM, Michael Ellerman wrote: This patch adds the logic to patch alternative sections. This is fairly straight forward, except for branches. Relative branches that jump from inside the else section to outside of it, need to be translated as they're moved, otherwise they will jump to the wrong location. this should really be part of the 'Introduce infrastructure for feature sections with alternatives' patch. The two are really coupled (one doesn't make sense w/o the other). - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 05/14] powerpc: Add new code patching routines
On Jun 23, 2008, at 8:32 PM, Michael Ellerman wrote:
This commit adds some new routines for patching code, they will be
used
in a following commit.
Signed-off-by: Michael Ellerman [EMAIL PROTECTED]
---
arch/powerpc/lib/code-patching.c| 107 ++
+
include/asm-powerpc/code-patching.h |8 +++
2 files changed, 115 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/
code-patching.c
index 430f4c1..27957c4 100644
--- a/arch/powerpc/lib/code-patching.c
+++ b/arch/powerpc/lib/code-patching.c
@@ -41,3 +41,110 @@ unsigned int create_branch(const unsigned int
*addr,
return instruction;
}
+
+unsigned int create_cond_branch(const unsigned int *addr,
+ unsigned long target, int flags)
+{
it would be nice to have some idea what flags is suppose to be.
+ unsigned int instruction;
+ long offset;
+
+ offset = target;
+ if (! (flags BRANCH_ABSOLUTE))
+ offset = offset - (unsigned long)addr;
+
+ /* Check we can represent the target in the instruction format */
+ if (offset -0x8000 || offset 0x7FFF || offset 0x3)
+ return 0;
+
+ /* Mask out the flags and target, so they don't step on each
other. */
+ instruction = 0x4000 | (flags 0x3FF0003) | (offset 0xFFFC);
+
+ return instruction;
+}
[snip]
+unsigned int translate_branch(const unsigned int *dest, const
unsigned int *src)
+{
I'm not sure I get what this function is trying to do.
+ unsigned long target;
+
+ target = branch_target(src);
+
+ if (instr_is_branch_iform(*src))
+ return create_branch(dest, target, *src);
+ else if (instr_is_branch_bform(*src))
+ return create_cond_branch(dest, target, *src);
+
+ return 0;
+}
___
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Re: [PATCH 06/14] powerpc: Add tests of the code patching routines
On Jun 23, 2008, at 8:32 PM, Michael Ellerman wrote: Add tests of the existing code patching routines, as well as the new routines added in the last commit. The self-tests are run late in boot when CONFIG_CODE_PATCHING_SELFTEST=y, which depends on DEBUG_KERNEL=y. Signed-off-by: Michael Ellerman [EMAIL PROTECTED] Acked-by: Kumar Gala [EMAIL PROTECTED] - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 07/14] powerpc: Add PPC_NOP_INSTR, a hash define for the preferred nop instruction
On Jun 23, 2008, at 8:32 PM, Michael Ellerman wrote: A bunch of code has hard-coded the value for a nop instruction, it would be nice to have a #define for it. Signed-off-by: Michael Ellerman [EMAIL PROTECTED] Acked-by: Kumar Gala [EMAIL PROTECTED] - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 09/14] powerpc: Consolidate CPU and firmware feature fixup macros
On Jun 23, 2008, at 8:32 PM, Michael Ellerman wrote: The CPU and firmware feature fixup macros are currently spread across three files, firmware.h, cputable.h and asm-compat.h. Consolidate them into their own file, feature-fixups.h Signed-off-by: Michael Ellerman [EMAIL PROTECTED] Acked-by: Kumar Gala [EMAIL PROTECTED] - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
RE: [PATCH] [RFC] powerpc: Xilinx: adding virtex5 powerpc 440 support
Yes it is compatible with the normal powerpc FPU. Thanks, John -Original Message- From: Peter Korsgaard [mailto:[EMAIL PROTECTED] On Behalf Of Peter Korsgaard Sent: Tuesday, June 24, 2008 12:46 AM To: John Linn Cc: Josh Boyer; linuxppc-dev@ozlabs.org Subject: Re: [PATCH] [RFC] powerpc: Xilinx: adding virtex5 powerpc 440 support John == John Linn [EMAIL PROTECTED] writes: Hi John, +config PPC_FPU + depends on XILINX_VIRTEX_5_FXT + bool Enable Xilinx Soft FPU + help +This option enables the Xilinx Soft FPU attached to the APU +interface of the PPC440 (requires DP_FULL FPU pcore). There is already a PPC_FPU option in platforms/Kconfig.cputype Is the Xilinx soft FPU compatible with the normal powerpc FPU? -- Bye, Peter Korsgaard This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 01/14] powerpc: Move code patching code into arch/powerpc/lib/code-patching.c
On Jun 23, 2008, at 8:32 PM, Michael Ellerman wrote: We currently have a few routines for patching code in asm/system.h, because they didn't fit anywhere else. I'd like to clean them up a little and add some more, so first move them into a dedicated C file - they don't need to be inlined. While we're moving the code, drop create_function_call(), it's intended caller never got merged and will be replaced in future with something different. Signed-off-by: Michael Ellerman [EMAIL PROTECTED] Acked-by: Kumar Gala [EMAIL PROTECTED] - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] [RFC] powerpc: Xilinx: adding virtex5 powerpc 440 support
John == John Linn [EMAIL PROTECTED] writes: John Yes it is compatible with the normal powerpc FPU. Ahh, great - That didn't used to be the case with the earlier fpu stuff afaik. -- Bye, Peter Korsgaard ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 4/9] powerpc: Make load_up_fpu and load_up_altivec callable
On Jun 24, 2008, at 5:57 AM, Michael Neuling wrote: Make load_up_fpu and load_up_altivec callable so they can be reused by the VSX code. Signed-off-by: Michael Neuling [EMAIL PROTECTED] Acked-by: Kumar Gala [EMAIL PROTECTED] - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
On Jun 24, 2008, at 5:57 AM, Michael Neuling wrote:
We are going to change where the floating point registers are stored
in the thread_struct, so in preparation add some macros to access the
floating point registers. Update all code to use these new macros.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
---
arch/powerpc/kernel/align.c |6 ++--
arch/powerpc/kernel/process.c|5 ++-
arch/powerpc/kernel/ptrace.c | 14 +
arch/powerpc/kernel/ptrace32.c | 14 +++--
arch/powerpc/kernel/softemu8xx.c |4 +-
arch/powerpc/math-emu/math.c | 56 ++
+
include/asm-powerpc/ppc_asm.h|5 ++-
include/asm-powerpc/processor.h |3 ++
8 files changed, 61 insertions(+), 46 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c
@@ -218,10 +218,10 @@ static int fpr_get(struct task_struct *t
flush_fp_to_thread(target);
BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
-offsetof(struct thread_struct, fpr[32]));
+offsetof(struct thread_struct, TS_FPR(32)));
return user_regset_copyout(pos, count, kbuf, ubuf,
- target-thread.fpr, 0, -1);
+ target-thread.fpr, 0, -1);
is there a reason we can drop the ''? (I'm only look at this as a
textual diff, not at what the code is trying to do).
}
static int fpr_set(struct task_struct *target, const struct
user_regset *regset,
@@ -231,10 +231,10 @@ static int fpr_set(struct task_struct *t
flush_fp_to_thread(target);
BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
-offsetof(struct thread_struct, fpr[32]));
+offsetof(struct thread_struct, TS_FPR(32)));
return user_regset_copyin(pos, count, kbuf, ubuf,
- target-thread.fpr, 0, -1);
+ target-thread.fpr, 0, -1);
ditto.
}
@@ -728,7 +728,8 @@ long arch_ptrace(struct task_struct *chi
tmp = ptrace_get_reg(child, (int) index);
} else {
flush_fp_to_thread(child);
- tmp = ((unsigned long *)child-thread.fpr)[index -
PT_FPR0];
+ tmp = ((unsigned long *)child-thread.fpr)
+ [TS_FPRSPACING * (index - PT_FPR0)];
}
ret = put_user(tmp,(unsigned long __user *) data);
break;
@@ -755,7 +756,8 @@ long arch_ptrace(struct task_struct *chi
ret = ptrace_put_reg(child, index, data);
} else {
flush_fp_to_thread(child);
- ((unsigned long *)child-thread.fpr)[index - PT_FPR0] =
data;
+ ((unsigned long *)child-thread.fpr)
+ [TS_FPRSPACING * (index - PT_FPR0)] = data;
ret = 0;
}
break;
Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace32.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace32.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace32.c
@@ -64,6 +64,11 @@ static long compat_ptrace_old(struct tas
return -EPERM;
}
+/* Macros to workout the correct index for the FPR in the thread
struct */
+#define FPRNUMBER(i) (((i) - PT_FPR0) 1)
+#define FPRHALF(i) (((i) - PT_FPR0) % 2)
+#define FPRINDEX(i) TS_FPRSPACING * FPRNUMBER(i) + FPRHALF(i)
we should either use this macros in both ptrace.c and ptrace32.c or
drop them
+
long compat_arch_ptrace(struct task_struct *child, compat_long_t
request,
compat_ulong_t caddr, compat_ulong_t cdata)
{
@@ -122,7 +127,8 @@ long compat_arch_ptrace(struct task_stru
* to be an array of unsigned int (32 bits) - the
* index passed in is based on this assumption.
*/
- tmp = ((unsigned int *)child-thread.fpr)[index -
PT_FPR0];
+ tmp = ((unsigned int *)child-thread.fpr)
+ [FPRINDEX(index)];
}
ret = put_user((unsigned int)tmp, (u32 __user *)data);
break;
@@ -162,7 +168,8 @@ long compat_arch_ptrace(struct task_stru
CHECK_FULL_REGS(child-thread.regs);
if (numReg = PT_FPR0) {
flush_fp_to_thread(child);
- tmp = ((unsigned long int *)child-thread.fpr)[numReg -
PT_FPR0];
+ tmp = ((unsigned long int *)child-thread.fpr)
+ [FPRINDEX(numReg)];
} else { /* register within
Re: [PATCH 08/14] powerpc: Split out do_feature_fixups() from cputable.c
On Jun 23, 2008, at 8:32 PM, Michael Ellerman wrote: The logic to patch CPU feature sections lives in cputable.c, but these days it's used for CPU features as well as firmware features. Move it into it's own file for neatness and as preparation for some additions. While we're moving the code, we pull the loop body logic into a separate routine, and remove a comment which doesn't apply anymore. Signed-off-by: Michael Ellerman [EMAIL PROTECTED] Acked-by: Kumar Gala [EMAIL PROTECTED] - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 10/14] powerpc: Consolidate feature fixup macros for 64/32 bit
On Jun 23, 2008, at 8:32 PM, Michael Ellerman wrote: Currentl we have three versions of MAKE_FTR_SECTION_ENTRY(), the macro that generates a feature section entry. There is 64bit version, a 32bit version and version for 32bit code built with a 64bit kernel. typo in 'currentl' Rather than triplicating (?) the MAKE_FTR_SECTION_ENTRY() logic, we can move the 64bit/32bit differences into separate macros, and then only have one version of MAKE_FTR_SECTION_ENTRY(). Signed-off-by: Michael Ellerman [EMAIL PROTECTED] --- include/asm-powerpc/feature-fixups.h | 54 +++ +- 1 files changed, 13 insertions(+), 41 deletions(-) Acked-by: Kumar Gala [EMAIL PROTECTED] - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
RE: [PATCH] [RFC] powerpc: Xilinx: adding virtex5 powerpc 440 support
I put in a link to the Xilinx FPU documentation that describes it. http://www.xilinx.com/support/documentation/ip_documentation/apu_fpu_vir tex5.pdf Thanks, John -Original Message- From: Peter Korsgaard [mailto:[EMAIL PROTECTED] On Behalf Of Peter Korsgaard Sent: Tuesday, June 24, 2008 8:02 AM To: John Linn Cc: Josh Boyer; linuxppc-dev@ozlabs.org Subject: Re: [PATCH] [RFC] powerpc: Xilinx: adding virtex5 powerpc 440 support John == John Linn [EMAIL PROTECTED] writes: John Yes it is compatible with the normal powerpc FPU. Ahh, great - That didn't used to be the case with the earlier fpu stuff afaik. -- Bye, Peter Korsgaard This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 6/9] powerpc: Add VSX CPU feature
On Jun 24, 2008, at 5:57 AM, Michael Neuling wrote: Add a VSX CPU feature. Also add code to detect if VSX is available from the device tree. Signed-off-by: Michael Neuling [EMAIL PROTECTED] Signed-off-by: Joel Schopp [EMAIL PROTECTED] Acked-by: Kumar Gala [EMAIL PROTECTED] - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 9/9] powerpc: Add CONFIG_VSX config option
On Jun 24, 2008, at 5:57 AM, Michael Neuling wrote: Add CONFIG_VSX config build option. Must compile with POWER4, FPU and ALTIVEC. Signed-off-by: Michael Neuling [EMAIL PROTECTED] Acked-by: Kumar Gala [EMAIL PROTECTED] - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 03/14] powerpc: Make create_branch() return errors if the branch target is too large
On Jun 23, 2008, at 8:32 PM, Michael Ellerman wrote: If you pass a target value to create_branch() which is more than 32MB - 4, or - 32MB away from the branch site, then it's impossible to create an immediate branch. The current code doesn't check, which will lead to us creating a branch to somewhere else - which is bad. For code that cares to check we return 0, which is easy to check for, and for code that doesn't at least we'll be creating an illegal instruction, rather than a branch to some random address. Signed-off-by: Michael Ellerman [EMAIL PROTECTED] Acked-by: Kumar Gala [EMAIL PROTECTED] - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 03/19][v3] powerpc: Add memory entitlement capabilities to /proc/ppc64/lparcfg
Just a few minor nits.
+/**
+ * h_get_mpp
+ * H_GET_MPP hcall returns info in 7 parms
+ */
+int h_get_mpp(struct hvcall_mpp_data *mpp_data)
+{
+int rc;
+unsigned long retbuf[PLPAR_HCALL9_BUFSIZE];
Should be tabs instead of spaces in this function and a few others
in this patch file.
+/**
+ * parse_mpp_data
+ * Parse out data returned from h_get_mpp
+ */
+static void parse_mpp_data(struct seq_file *m)
+{
+struct hvcall_mpp_data mpp_data;
+int rc;
Same here.
+/**
+ * update_mpp
+ *
+ * Update the memory entitlement and weight for the partition. Caller
must
+ * spercify either a new entitlement or weight, not both, to be updated
+ * since the h_set_mpp call takes both entitlement and weight as
parameters.
+ */
+static ssize_t update_mpp(u64 *entitlement, u8 *weight)
+{
+struct hvcall_mpp_data mpp_data;
Tab/spacing here.
@@ -270,6 +272,20 @@
};
#define HCALL_STAT_ARRAY_SIZE((MAX_HCALL_OPCODE 2) + 1)
+struct hvcall_mpp_data {
+unsigned long entitled_mem;
+unsigned long mapped_mem;
+unsigned short group_num;
+unsigned short pool_num;
+unsigned char mem_weight;
+unsigned char unallocated_mem_weight;
+unsigned long unallocated_entitlement;/* value in bytes */
+unsigned long pool_size;
+long loan_request;
Might as well be specific here and call this a signed long.
Tab/spacing issue here as well.
--
Brian King
Linux on Power Virtualization
IBM Linux Technology Center
___
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Re: [PATCH] powerpc/QE: use arch_initcall to probe QUICC Engine GPIOs
On Jun 11, 2008, at 6:42 PM, Anton Vorontsov wrote: It was discussed that global arch_initcall() is preferred way to probe QE GPIOs, so let's use it. Signed-off-by: Anton Vorontsov [EMAIL PROTECTED] --- applied to powerpc-next. - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] [85xx] powerpc: Update pin setup for 8560ads
On Jun 11, 2008, at 7:30 PM, Vitaly Bordug wrote: Ports B and C pins programming is changed to get SCC2 UART and FCC3 ethernet work. Signed-off-by: Vitaly Bordug [EMAIL PROTECTED] --- applied to powerpc-next. - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 03/19] powerpc: Add memory entitlement capabilities to /proc/ppc64/lparcfg
v4 of this patch, updates to correct whitespace, spelling issues pointed out by
Brian King. Also made the long a signed long per Brian's suggestion.
Update /proc/ppc64/lparcfg to enable displaying of Cooperative Memory
Overcommitment statistics as reported by the H_GET_MPP hcall. This also
updates the lparcfg interface to allow setting memory entitlement and
weight.
Signed-off-by: Nathan Fontenot [EMAIL PROTECTED]
Signed-off-by: Robert Jennings [EMAIL PROTECTED]
---
arch/powerpc/kernel/lparcfg.c | 119 ++
include/asm-powerpc/hvcall.h | 18 ++
2 files changed, 136 insertions(+), 1 deletion(-)
Index: b/arch/powerpc/kernel/lparcfg.c
===
--- a/arch/powerpc/kernel/lparcfg.c
+++ b/arch/powerpc/kernel/lparcfg.c
@@ -129,6 +129,35 @@ static int iseries_lparcfg_data(struct s
/*
* Methods used to fetch LPAR data when running on a pSeries platform.
*/
+/**
+ * h_get_mpp
+ * H_GET_MPP hcall returns info in 7 parms
+ */
+int h_get_mpp(struct hvcall_mpp_data *mpp_data)
+{
+ int rc;
+ unsigned long retbuf[PLPAR_HCALL9_BUFSIZE];
+
+ rc = plpar_hcall9(H_GET_MPP, retbuf);
+
+ mpp_data-entitled_mem = retbuf[0];
+ mpp_data-mapped_mem = retbuf[1];
+
+ mpp_data-group_num = (retbuf[2] 2 * 8) 0x;
+ mpp_data-pool_num = retbuf[2] 0x;
+
+ mpp_data-mem_weight = (retbuf[3] 7 * 8) 0xff;
+ mpp_data-unallocated_mem_weight = (retbuf[3] 6 * 8) 0xff;
+ mpp_data-unallocated_entitlement = retbuf[3] 0x;
+
+ mpp_data-pool_size = retbuf[4];
+ mpp_data-loan_request = retbuf[5];
+ mpp_data-backing_mem = retbuf[6];
+
+ return rc;
+}
+EXPORT_SYMBOL(h_get_mpp);
+
/*
* H_GET_PPP hcall returns info in 4 parms.
* entitled_capacity,unallocated_capacity,
@@ -226,6 +255,44 @@ static void parse_ppp_data(struct seq_fi
seq_printf(m, unallocated_capacity=%ld\n, h_unallocated);
}
+/**
+ * parse_mpp_data
+ * Parse out data returned from h_get_mpp
+ */
+static void parse_mpp_data(struct seq_file *m)
+{
+ struct hvcall_mpp_data mpp_data;
+ int rc;
+
+ rc = h_get_mpp(mpp_data);
+ if (rc)
+ return;
+
+ seq_printf(m, entitled_memory=%ld\n, mpp_data.entitled_mem);
+
+ if (mpp_data.mapped_mem != -1)
+ seq_printf(m, mapped_entitled_memory=%ld\n,
+ mpp_data.mapped_mem);
+
+ seq_printf(m, entitled_memory_group_number=%d\n, mpp_data.group_num);
+ seq_printf(m, entitled_memory_pool_number=%d\n, mpp_data.pool_num);
+
+ seq_printf(m, entitled_memory_weight=%d\n, mpp_data.mem_weight);
+ seq_printf(m, unallocated_entitled_memory_weight=%d\n,
+ mpp_data.unallocated_mem_weight);
+ seq_printf(m, unallocated_io_mapping_entitlement=%ld\n,
+ mpp_data.unallocated_entitlement);
+
+ if (mpp_data.pool_size != -1)
+ seq_printf(m, entitled_memory_pool_size=%ld bytes\n,
+ mpp_data.pool_size);
+
+ seq_printf(m, entitled_memory_loan_request=%ld\n,
+ mpp_data.loan_request);
+
+ seq_printf(m, backing_memory=%ld bytes\n, mpp_data.backing_mem);
+}
+
#define SPLPAR_CHARACTERISTICS_TOKEN 20
#define SPLPAR_MAXLENGTH 1026*(sizeof(char))
@@ -353,6 +420,7 @@ static int pseries_lparcfg_data(struct s
/* this call handles the ibm,get-system-parameter contents */
parse_system_parameter_string(m);
parse_ppp_data(m);
+ parse_mpp_data(m);
seq_printf(m, purr=%ld\n, get_purr());
} else {/* non SPLPAR case */
@@ -416,6 +484,43 @@ static ssize_t update_ppp(u64 *entitleme
return retval;
}
+/**
+ * update_mpp
+ *
+ * Update the memory entitlement and weight for the partition. Caller must
+ * specify either a new entitlement or weight, not both, to be updated
+ * since the h_set_mpp call takes both entitlement and weight as parameters.
+ */
+static ssize_t update_mpp(u64 *entitlement, u8 *weight)
+{
+ struct hvcall_mpp_data mpp_data;
+ u64 new_entitled;
+ u8 new_weight;
+ ssize_t rc;
+
+ rc = h_get_mpp(mpp_data);
+ if (rc)
+ return rc;
+
+ if (entitlement) {
+ new_weight = mpp_data.mem_weight;
+ new_entitled = *entitlement;
+ } else if (weight) {
+ new_weight = *weight;
+ new_entitled = mpp_data.entitled_mem;
+ } else
+ return -EINVAL;
+
+ pr_debug(%s: current_entitled = %lu, current_weight = %u\n,
+__FUNCTION__, mpp_data.entitled_mem, mpp_data.mem_weight);
+
+ pr_debug(%s: new_entitled = %lu, new_weight = %u\n,
+__FUNCTION__, new_entitled, new_weight);
+
+ rc = plpar_hcall_norets(H_SET_MPP, new_entitled, new_weight);
+ return rc;
Re: [PATCH 02/14] powerpc: Allow create_branch() to return errors
On Jun 23, 2008, at 8:32 PM, Michael Ellerman wrote: Currently create_branch() creates a branch instruction for you, and patches it into the call site. In some circumstances it would be nice to be able to create the instruction and patch it later, and also some code might want to check for errors in the branch creation before doing the patching. A future patch will change create_branch() to check for errors. For callers that don't care, replace create_branch() with patch_branch(), which just creates the branch and patches it directly. While we're touching all the callers, change to using unsigned int *, as this seems to match usage better. That allows (and requires) us to remove the volatile in the definition of vector in powermac/smp.c and mpc86xx_smp.c, that's correct because now that we're passing vector as an unsigned int * the compiler knows that it's value might change across the patch_branch() call. Signed-off-by: Michael Ellerman [EMAIL PROTECTED] Acked-by: Kumar Gala [EMAIL PROTECTED] - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 1/9] powerpc: Fix msr setting in 32 bit signal code
On Jun 24, 2008, at 5:57 AM, Michael Neuling wrote: If we set the SPE MSR bit in save_user_regs we can blow away the VEC bit. This doesn't matter in reality as they are infact the same bit but looks bad. Also, when we add VSX in a later patch, we need to be able to set two separate MSR bits here. Signed-off-by: Michael Neuling [EMAIL PROTECTED] Acked-by: Kumar Gala [EMAIL PROTECTED] - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
return user_regset_copyout(pos, count, kbuf, ubuf, - target-thread.fpr, 0, -1); + target-thread.fpr, 0, -1); is there a reason we can drop the ''? Yes, .fpr is an array. C is _such_ a fun language, heh. Segher ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH] fsl-diu-fb: Update Freescale DIU driver to use page_alloc_exact()
Update the Freescale DIU driver to use page_alloc_exact() to allocate a
DMA buffer. This also eliminates the rheap-based memory allocator. We
can do this now because commit 6ccf61f9 allows us to allocate 8MB physically-
contiguous memory blocks.
Signed-off-by: Timur Tabi [EMAIL PROTECTED]
---
My other patch, Add alloc_pages_exact() and free_pages_exact(), must be
applied first, otherwise drivers/video/fsl-diu-fb.c will not compile.
drivers/video/fsl-diu-fb.c | 59 +++
1 files changed, 21 insertions(+), 38 deletions(-)
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
index 0a27853..d15d265 100644
--- a/drivers/video/fsl-diu-fb.c
+++ b/drivers/video/fsl-diu-fb.c
@@ -279,58 +279,41 @@ static struct diu_hw dr = {
static struct diu_pool pool;
-/* To allocate memory for framebuffer. First try __get_free_pages(). If it
- * fails, try rh_alloc. The reason is __get_free_pages() cannot allocate
- * very large memory (more than 4MB). We don't want to allocate all memory
- * in rheap since small memory allocation/deallocation will fragment the
- * rheap and make the furture large allocation fail.
+/**
+ * fsl_diu_alloc - allocate memory for the DIU
+ * @size: number of bytes to allocate
+ * @param: returned physical address of memory
+ *
+ * This function allocates a physically-contiguous block of memory.
*/
-
-void *fsl_diu_alloc(unsigned long size, phys_addr_t *phys)
+static void *fsl_diu_alloc(size_t size, phys_addr_t *phys)
{
void *virt;
- pr_debug(size=%lu\n, size);
+ pr_debug(size=%u\n, size);
- virt = (void *)__get_free_pages(GFP_DMA | __GFP_ZERO, get_order(size));
+ virt = alloc_pages_exact(size, GFP_DMA | __GFP_ZERO);
if (virt) {
*phys = virt_to_phys(virt);
- pr_debug(virt %p, phys=%llx\n, virt, (uint64_t) *phys);
- return virt;
- }
- if (!diu_ops.diu_mem) {
- printk(KERN_INFO %s: no diu_mem.
-To reserve more memory, put 'diufb=15M'
- in the command line\n, __func__);
- return NULL;
- }
-
- virt = (void *)rh_alloc(diu_ops.diu_rh_info, size, DIU);
- if (virt) {
- *phys = virt_to_bus(virt);
- memset(virt, 0, size);
+ pr_debug(virt=%p, phys=%llx\n, virt, (uint64_t) *phys);
}
- pr_debug(rh virt=%p phys=%lx\n, virt, *phys);
-
return virt;
}
-void fsl_diu_free(void *p, unsigned long size)
+/**
+ * fsl_diu_free - release DIU memory
+ * @virt: pointer returned by fsl_diu_alloc()
+ * @size: number of bytes allocated by fsl_diu_alloc()
+ *
+ * This function releases memory allocated by fsl_diu_alloc().
+ */
+static void fsl_diu_free(void *virt, size_t size)
{
- pr_debug(p=%p size=%lu\n, p, size);
+ pr_debug(virt=%p size=%u\n, virt, size);
- if (!p)
- return;
-
- if ((p = diu_ops.diu_mem)
- (p (diu_ops.diu_mem + diu_ops.diu_size))) {
- pr_debug(rh\n);
- rh_free(diu_ops.diu_rh_info, (unsigned long) p);
- } else {
- pr_debug(dma\n);
- free_pages((unsigned long)p, get_order(size));
- }
+ if (virt size)
+ free_pages_exact(virt, size);
}
static int fsl_diu_enable_panel(struct fb_info *info)
--
1.5.5
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Re: [PATCH 6/6] powerpc: support multiple huge page sizes
Nick Piggin wrote:
On Tue, May 13, 2008 at 12:25:27PM -0500, Jon Tollefson wrote:
Instead of using the variable mmu_huge_psize to keep track of the huge
page size we use an array of MMU_PAGE_* values. For each supported
huge page size we need to know the hugepte_shift value and have a
pgtable_cache. The hstate or an mmu_huge_psizes index is passed to
functions so that they know which huge page size they should use.
The hugepage sizes 16M and 64K are setup(if available on the
hardware) so that they don't have to be set on the boot cmd line in
order to use them. The number of 16G pages have to be specified at
boot-time though (e.g. hugepagesz=16G hugepages=5).
Signed-off-by: Jon Tollefson [EMAIL PROTECTED]
---
@@ -150,17 +191,25 @@ pte_t *huge_pte_offset(struct mm_struct *mm, unsigned
long addr)
pud_t *pu;
pmd_t *pm;
-BUG_ON(get_slice_psize(mm, addr) != mmu_huge_psize);
+unsigned int psize;
+unsigned int shift;
+unsigned long sz;
+struct hstate *hstate;
+psize = get_slice_psize(mm, addr);
+shift = mmu_psize_to_shift(psize);
+sz = ((1UL) shift);
+hstate = size_to_hstate(sz);
-addr = HPAGE_MASK;
+addr = hstate-mask;
pg = pgd_offset(mm, addr);
if (!pgd_none(*pg)) {
pu = pud_offset(pg, addr);
if (!pud_none(*pu)) {
-pm = hpmd_offset(pu, addr);
+pm = hpmd_offset(pu, addr, hstate);
if (!pmd_none(*pm))
-return hugepte_offset((hugepd_t *)pm, addr);
+return hugepte_offset((hugepd_t *)pm, addr,
+ hstate);
}
}
Hi Jon,
I just noticed in a few places like this, you might be doing more work
than really needed to get the HPAGE_MASK.
I would love to be able to simplify it.
For a first-pass conversion, this is the right way to go (just manually
replace hugepage constants with hstate- equivalents). However in this
case if you already know the page size, you should be able to work out
the shift from there, I think? That way you can avoid the size_to_hstate
call completely.
Something like the following?
+ addr = ~(sz - 1);
Is that faster then just pulling it out of hstate?
I still need to locate hstate, but I guess if the mask is calculated
this way the locate could be pushed further into the function so that it
isn't done if it isn't always needed.
Anyway, just something to consider.
Thanks,
Nick
Thank you for looking at the code.
Jon
@@ -173,16 +222,20 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned
long addr, unsigned long sz
pud_t *pu;
pmd_t *pm;
hugepd_t *hpdp = NULL;
+struct hstate *hstate;
+unsigned int psize;
+hstate = size_to_hstate(sz);
-BUG_ON(get_slice_psize(mm, addr) != mmu_huge_psize);
+psize = get_slice_psize(mm, addr);
+BUG_ON(!mmu_huge_psizes[psize]);
-addr = HPAGE_MASK;
+addr = hstate-mask;
pg = pgd_offset(mm, addr);
pu = pud_alloc(mm, pg, addr);
if (pu) {
-pm = hpmd_alloc(mm, pu, addr);
+pm = hpmd_alloc(mm, pu, addr, hstate);
if (pm)
hpdp = (hugepd_t *)pm;
}
@@ -190,10 +243,10 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned
long addr, unsigned long sz
if (! hpdp)
return NULL;
-if (hugepd_none(*hpdp) __hugepte_alloc(mm, hpdp, addr))
+if (hugepd_none(*hpdp) __hugepte_alloc(mm, hpdp, addr, psize))
return NULL;
-return hugepte_offset(hpdp, addr);
+return hugepte_offset(hpdp, addr, hstate);
}
int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep)
@@ -201,19 +254,22 @@ int huge_pmd_unshare(struct mm_struct *mm, unsigned
long *addr, pte_t *ptep)
return 0;
}
-static void free_hugepte_range(struct mmu_gather *tlb, hugepd_t *hpdp)
+static void free_hugepte_range(struct mmu_gather *tlb, hugepd_t *hpdp,
+ unsigned int psize)
{
pte_t *hugepte = hugepd_page(*hpdp);
hpdp-pd = 0;
tlb-need_flush = 1;
-pgtable_free_tlb(tlb, pgtable_free_cache(hugepte, HUGEPTE_CACHE_NUM,
+pgtable_free_tlb(tlb, pgtable_free_cache(hugepte,
+ HUGEPTE_CACHE_NUM+psize-1,
PGF_CACHENUM_MASK));
}
static void hugetlb_free_pmd_range(struct mmu_gather *tlb, pud_t *pud,
unsigned long addr, unsigned long end,
- unsigned long floor, unsigned long
ceiling)
+ unsigned long floor, unsigned long
ceiling,
+ unsigned int psize)
{
pmd_t *pmd;
unsigned long next;
@@ -225,7 +281,7 @@ static void hugetlb_free_pmd_range(struct mmu_gather
*tlb, pud_t
Graphic Card on Freescale MPC837x-rdb
HI all, Has anyone tried using a Graphic card on Freescale MPC837x-rdb board? If so I appreciate any hints and information that I can use. Many thanks in advance, Bizhan ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Graphic Card on Freescale MPC837x-rdb
On Jun 24, 2008, at 12:17 PM, Bizhan Gholikhamseh (bgholikh) wrote: HI all, Has anyone tried using a Graphic card on Freescale MPC837x-rdb board? If so I appreciate any hints and information that I can use. Nope, but you'll most likely need some form of x86 emulation for the video bios init. - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: a question of mpc8313, maybe simple
On Mon, Jun 23, 2008 at 06:13:41PM -0700, jumpingProgrammer wrote: Thanks a lot for answer my question. But i am newhand and not very clear about it. Do you mean: 1. in this case i do not need to include DMA when i make menuconfig ? The path is Device Drivers-DMA. Right, that's for independent DMA engines, such as for offloading memory-to-memory copies. 2. in this case i do not need add any DMA information in mpc8313erdb.dts? Right. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Using DMA interrupt on MPC8313
On Mon, Jun 23, 2008 at 10:54:28PM -0700, jumpingProgrammer wrote: I use this in 8313erdb.dts, but can not find DMA info in /proc/interrupts.why? Is the driver enabled, and did it call request_irq? -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH v2] Document Freescale power management nodes, and the sleep property.
Signed-off-by: Scott Wood [EMAIL PROTECTED]
---
Added the fsl,mpc8313-wakeup-timer property.
Documentation/powerpc/booting-without-of.txt | 196 --
1 files changed, 155 insertions(+), 41 deletions(-)
diff --git a/Documentation/powerpc/booting-without-of.txt
b/Documentation/powerpc/booting-without-of.txt
index b68684d..4b8faf6 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -62,6 +62,7 @@ Table of Contents
s) Freescale on board FPGA
t) Freescael MSI interrupt controller
u) Freescale General-purpose Timers Module
+ v) Freescale Power Management Controller
VII - Marvell Discovery mv64[345]6x System Controller chips
1) The /system-controller node
@@ -92,10 +93,12 @@ Table of Contents
3) OpenPIC Interrupt Controllers
4) ISA Interrupt Controllers
- VIII - Specifying GPIO information for devices
+ IX - Specifying GPIO information for devices
1) gpios property
2) gpio-controller nodes
+ X - Specifying device power management information (sleep property)
+
Appendix A - Sample SOC node for MPC8540
@@ -2967,6 +2970,64 @@ platforms are moved over to use the
flattened-device-tree model.
clock-frequency = 0;
};
+v) Freescale Power Management Controller
+
+Properties:
+- compatible: fsl,chip-pmc.
+
+ fsl,mpc8349-pmc should be listed for any chip whose PMC is
+ compatible. fsl,mpc8313-pmc should also be listed for any chip
+ whose PMC is compatible, and implies deep-sleep capability.
+
+ fsl,mpc8548-pmc should be listed for any chip whose PMC is
+ compatible. fsl,mpc8536-pmc should also be listed for any chip
+ whose PMC is compatible, and implies deep-sleep capability.
+
+ Compatibility does not include bit assigments in SCCR/PMCDR; these bit
+ assigments are indicated via the sleep specifier in each device's
+ sleep property.
+
+- reg: For devices compatible with fsl,mpc8349-pmc, the first resource
+ is the PMC block, and the second resource is the Clock Configuration
+ block.
+
+ For devices compatible with fsl,mpc8548-pmc, the first resource
+ is a 32-byte block beginning with DEVDISR.
+
+- interrupts: For fsl,mpc8349-pmc-compatible devices, the first
+ resource is the PMC block interrupt.
+
+- fsl,mpc8313-wakeup-timer: For fsl,mpc8313-pmc-compatible devices,
+ this is a phandle to an fsl,gtm node on which timer 4 can be used as
+ a wakeup source from deep sleep.
+
+Sleep specifiers:
+
+ fsl,mpc8349-pmc: Sleep specifiers consist of one cell. For each bit
+ that is set in the cell, the corresponding bit in SCCR will be saved
+ and cleared on suspend, and restored on resume. This sleep controller
+ supports disabling and resuming devices at any time.
+
+ fsl,mpc8536-pmc: Sleep specifiers consist of two cells, the second of
+ which will be ORed into PMCDR upon suspend, and cleared from PMCDR
+ upon resume. The first cell is as described for fsl,mpc8578-pmc.
+ This sleep controller only supports disabling devices during system
+ sleep, or permanently.
+
+ fsl,mpc8548-pmc: Sleep specifiers consist of one cell, which will be
+ ORed into DEVDISR upon a request for permanent device disabling. This
+ sleep controller does not support configuring devices to disable
+ during system sleep (unless supported by another compatible match), or
+ dynamically.
+
+Example:
+
+ [EMAIL PROTECTED] {
+ compatible = fsl,mpc8313-pmc, fsl,mpc8349-pmc;
+ reg = 0xb00 0x100 0xa00 0x100;
+ interrupts = 80 8;
+ };
+
VII - Marvell Discovery mv64[345]6x System Controller chips
===
@@ -3574,8 +3635,8 @@ encodings listed below:
2 = high to low edge sensitive type enabled
3 = low to high edge sensitive type enabled
-VIII - Specifying GPIO information for devices
-==
+IX - Specifying GPIO information for devices
+
1) gpios property
-
@@ -3623,6 +3684,37 @@ Example of two SOC GPIO banks defined as gpio-controller
nodes:
gpio-controller;
};
+X - Specifying Device Power Management Information (sleep property)
+===
+
+Devices on SOCs often have mechanisms for placing devices into low-power
+states that are decoupled from the devices' own register blocks. Sometimes,
+this information is more complicated than a cell-index property can
+reasonably describe. Thus, each device controlled in such a manner
+may contain a sleep property which describes these connections.
+
+The sleep property consists of one or more sleep resources, each of
+which consists of a phandle to a
RE: [PATCH] [RFC] powerpc: Xilinx: adding virtex5 powerpc 440 support
Hi Grant, It appears that you designed the simpleImage around Xilinx FPGAs. Since we have to initialize the 16550 UART in the bootstrap and there's no boot loader, were you thinking we would add the 16550 initialization to simpleboot.c? Why do we want a flat binary rather than an elf file for the target? Thanks, John From Grant's commit: This target produces a flat binary rather than an ELF file, fixes the entry point at the beginning of the image, and takes a complete device tree with no fixups needed. -Original Message- From: Josh Boyer [mailto:[EMAIL PROTECTED] Sent: Monday, June 23, 2008 7:36 PM To: John Linn Cc: linuxppc-dev@ozlabs.org Subject: Re: [PATCH] [RFC] powerpc: Xilinx: adding virtex5 powerpc 440 support On Mon, 23 Jun 2008 15:30:35 -0600 John Linn [EMAIL PROTECTED] wrote: + * + * Copyright 2007 IBM Corporation + * Based on cuboot-83xx.c, which is: + * Copyright (c) 2007 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include stddef.h +#include stdio.h +#include ops.h +#include dcr.h +#include 4xx.h +#include io.h +#include reg.h + +BSS_STACK(4096); + +#include types.h +#include gunzip_util.h +#include libfdt.h +#include ../../../include/linux/autoconf.h Ew. We've never included the CONFIG_ variables from Kconfig in the bootwrapper. It's supposed to be independent of the kernel. I'll try to better understand if we can detect the compressed device tree and if we really have to disable the APU. What's the reasoning for being independent of the kernel, maybe it's obvious to everyone but me? The intention, as I understand it, is that the wrapper utilities can be installed stand-alone and used to wrap other kernels if needs be. In practice I've not seen this happen yet, as most PowerPC kernels are built directly from the kernel source. Fedora does have a separate package for the wrapper bits, but I'm not entirely sure it's used. My understanding could be totally wrong, and if so I'll politely ask Paul or anyone else to hit me with a cluebat :). josh This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Exit points for returning from kernel mode to user mode
I am trying to understand exit points from kernel mode to user mode. I believe this happens when the scheduler is invoked, there are interrupts, exceptions, or the kernel is executing system call in process context. Is there a single function which is called in the ppc kernel when the mode is switched back to user mode ? I have linux 2.6.16.21 kernel running on a 4-way p550 IBM pSeries with POWER5 processors. Everytime before a process begins executing in user mode I want to execute a special SMT thread priority assembler instruction. What code files should I be looking at, is there one place this can be done? Any tips are appreciated.___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH] powerpc: fix ALSA options in Freescale 85xx and 86xx defconfigs
The defconfigs for Freescale 85xx and 86xx SOCs had bad choices for some audio related options. In particular, OSS emulation should be enabled, and the old ALSA API should be disabled. Signed-off-by: Timur Tabi [EMAIL PROTECTED] --- Kumar, this patch is for 2.6.27. arch/powerpc/configs/85xx/mpc8544_ds_defconfig |8 +--- arch/powerpc/configs/85xx/mpc8572_ds_defconfig |8 +--- arch/powerpc/configs/mpc85xx_defconfig |8 +--- arch/powerpc/configs/mpc8610_hpcd_defconfig|2 +- arch/powerpc/configs/mpc8641_hpcn_defconfig|8 +--- 5 files changed, 21 insertions(+), 13 deletions(-) diff --git a/arch/powerpc/configs/85xx/mpc8544_ds_defconfig b/arch/powerpc/configs/85xx/mpc8544_ds_defconfig index a9f113b..19d0864 100644 --- a/arch/powerpc/configs/85xx/mpc8544_ds_defconfig +++ b/arch/powerpc/configs/85xx/mpc8544_ds_defconfig @@ -976,10 +976,12 @@ CONFIG_SND=y CONFIG_SND_TIMER=y CONFIG_SND_PCM=y # CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y # CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y +# CONFIG_SND_SUPPORT_OLD_API is not set CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set diff --git a/arch/powerpc/configs/85xx/mpc8572_ds_defconfig b/arch/powerpc/configs/85xx/mpc8572_ds_defconfig index 53aa6f3..10f82d1 100644 --- a/arch/powerpc/configs/85xx/mpc8572_ds_defconfig +++ b/arch/powerpc/configs/85xx/mpc8572_ds_defconfig @@ -974,10 +974,12 @@ CONFIG_SND=y CONFIG_SND_TIMER=y CONFIG_SND_PCM=y # CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y # CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y +# CONFIG_SND_SUPPORT_OLD_API is not set CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig index 2075722..54937a8 100644 --- a/arch/powerpc/configs/mpc85xx_defconfig +++ b/arch/powerpc/configs/mpc85xx_defconfig @@ -982,10 +982,12 @@ CONFIG_SND=y CONFIG_SND_TIMER=y CONFIG_SND_PCM=y # CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y # CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y +# CONFIG_SND_SUPPORT_OLD_API is not set CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set diff --git a/arch/powerpc/configs/mpc8610_hpcd_defconfig b/arch/powerpc/configs/mpc8610_hpcd_defconfig index 7e5b9ce..6a582e2 100644 --- a/arch/powerpc/configs/mpc8610_hpcd_defconfig +++ b/arch/powerpc/configs/mpc8610_hpcd_defconfig @@ -938,7 +938,7 @@ CONFIG_SND_PCM=y CONFIG_SND_OSSEMUL=y CONFIG_SND_MIXER_OSS=y CONFIG_SND_PCM_OSS=y -# CONFIG_SND_PCM_OSS_PLUGINS is not set +CONFIG_SND_PCM_OSS_PLUGINS=y # CONFIG_SND_DYNAMIC_MINORS is not set # CONFIG_SND_SUPPORT_OLD_API is not set CONFIG_SND_VERBOSE_PROCFS=y diff --git a/arch/powerpc/configs/mpc8641_hpcn_defconfig b/arch/powerpc/configs/mpc8641_hpcn_defconfig index d01dcdb..1e5557d 100644 --- a/arch/powerpc/configs/mpc8641_hpcn_defconfig +++ b/arch/powerpc/configs/mpc8641_hpcn_defconfig @@ -968,10 +968,12 @@ CONFIG_SND=y CONFIG_SND_TIMER=y CONFIG_SND_PCM=y # CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y # CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y +# CONFIG_SND_SUPPORT_OLD_API is not set CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set -- 1.5.5 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 0/8][Version 2] MPC5121 Updates
The following patches contain updates for MPC5121 1/8 No change since last submission. Updates the device tree. 2/8 Adds a clock driver. Cleanup based on input from Stephen Rothwell. 3/8 No change since last submission. Adds support for generic boards. This is nearly identical to David Jander's patch but does not delete the ADS board option. ADS is not a candidate for generic since it has an on board cpld that does pci interrupt routing. 4/8 No change since last submission. Adds support for the CPLD on the MPC5121ADS board. 5/8 Cleans up pci config in arch/powerpc/Kconfig to make it less messy to add an new platform that has pci. 6/8 Moves mpc83xx_add_bridge from a/p/p/83xx/pci.c to a/p/p/sysdev/fsl_pci.c. So it can be used by other platforms using the same pci core. 7/8 Adds pci support for mpc5121 and uses mpc83xx_add_bridge. 8/8 No change since last submission (except now 8/8 instead of 6/6). Hides the pci bridge ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 3/8][Version 2] MPC5121 Add generic board support
Move shared code from mpc5121_ads.c to mpc512x_shared.c.
Add new generic board setup mpc5121_generic.c
Signed-off-by: John Rigby [EMAIL PROTECTED]
---
arch/powerpc/platforms/512x/Kconfig | 15 -
arch/powerpc/platforms/512x/Makefile |3 +-
arch/powerpc/platforms/512x/mpc5121_ads.c | 45 +---
arch/powerpc/platforms/512x/mpc5121_generic.c | 72 +
arch/powerpc/platforms/512x/mpc512x.h | 14 +
arch/powerpc/platforms/512x/mpc512x_shared.c | 66 ++
6 files changed, 168 insertions(+), 47 deletions(-)
create mode 100644 arch/powerpc/platforms/512x/mpc5121_generic.c
create mode 100644 arch/powerpc/platforms/512x/mpc512x.h
create mode 100644 arch/powerpc/platforms/512x/mpc512x_shared.c
diff --git a/arch/powerpc/platforms/512x/Kconfig
b/arch/powerpc/platforms/512x/Kconfig
index 4c0da0c..f9a04da 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -2,12 +2,10 @@ config PPC_MPC512x
bool
select FSL_SOC
select IPIC
- default n
config PPC_MPC5121
bool
select PPC_MPC512x
- default n
config MPC5121_ADS
bool Freescale MPC5121E ADS
@@ -16,4 +14,15 @@ config MPC5121_ADS
select PPC_MPC5121
help
This option enables support for the MPC5121E ADS board.
- default n
+
+config MPC5121_GENERIC
+ bool Generic support for simple MPC5121 based boards
+ depends on PPC_MULTIPLATFORM PPC32
+ select DEFAULT_UIMAGE
+ select PPC_MPC5121
+ help
+ This option enables support for simple MPC5121 based boards
+ which do not need custome platform specific setup.
+
+ Compatible boards include: Protonic LVT base boards (ZANMCU
+ and VICVT2).
diff --git a/arch/powerpc/platforms/512x/Makefile
b/arch/powerpc/platforms/512x/Makefile
index ef6c925..e6674c8 100644
--- a/arch/powerpc/platforms/512x/Makefile
+++ b/arch/powerpc/platforms/512x/Makefile
@@ -1,5 +1,6 @@
#
# Makefile for the Freescale PowerPC 512x linux kernel.
#
-obj-y := clock.o
+obj-y := clock.o mpc512x_shared.o
obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o
+obj-$(CONFIG_MPC5121_GENERIC) += mpc5121_generic.o
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c
b/arch/powerpc/platforms/512x/mpc5121_ads.c
index 50bd3a3..45bb2ef 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.c
@@ -15,7 +15,6 @@
#include linux/kernel.h
#include linux/io.h
-#include linux/irq.h
#include linux/of_platform.h
#include asm/machdep.h
@@ -23,34 +22,7 @@
#include asm/prom.h
#include asm/time.h
-/**
- * mpc512x_find_ips_freq - Find the IPS bus frequency for a device
- * @node: device node
- *
- * Returns IPS bus frequency, or 0 if the bus frequency cannot be found.
- */
-unsigned long
-mpc512x_find_ips_freq(struct device_node *node)
-{
- struct device_node *np;
- const unsigned int *p_ips_freq = NULL;
-
- of_node_get(node);
- while (node) {
- p_ips_freq = of_get_property(node, bus-frequency, NULL);
- if (p_ips_freq)
- break;
-
- np = of_get_parent(node);
- of_node_put(node);
- node = np;
- }
- if (node)
- of_node_put(node);
-
- return p_ips_freq ? *p_ips_freq : 0;
-}
-EXPORT_SYMBOL(mpc512x_find_ips_freq);
+#include mpc512x.h
static struct of_device_id __initdata of_bus_ids[] = {
{ .name = soc, },
@@ -68,20 +40,7 @@ static void __init
mpc5121_ads_declare_of_platform_devices(void)
static void __init mpc5121_ads_init_IRQ(void)
{
- struct device_node *np;
-
- np = of_find_compatible_node(NULL, NULL, fsl,ipic);
- if (!np)
- return;
-
- ipic_init(np, 0);
- of_node_put(np);
-
- /*
-* Initialize the default interrupt mapping priorities,
-* in case the boot rom changed something on us.
-*/
- ipic_set_default_priority();
+ mpc512x_init_IRQ();
}
/*
diff --git a/arch/powerpc/platforms/512x/mpc5121_generic.c
b/arch/powerpc/platforms/512x/mpc5121_generic.c
new file mode 100644
index 000..0111a98
--- /dev/null
+++ b/arch/powerpc/platforms/512x/mpc5121_generic.c
@@ -0,0 +1,72 @@
+/*
+ * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: John Rigby, [EMAIL PROTECTED]
+ *
+ * Description:
+ * MPC5121 SoC setup
+ *
+ * This is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include linux/kernel.h
+#include linux/of_platform.h
+
+#include asm/machdep.h
+#include asm/ipic.h
+#include asm/prom.h
[PATCH 4/8][Version 2] MPC5121 Add MPC5121ADS cpld support
Add a interrupt host for the interrupt
controller in the mpc5121ads cpld.
PCI interrupts are 0-7 the rest are 8-15
Touchscreen pendown irq is hardwired to irq1
All other irqs are chainged to irq0
Signed-off-by: John Rigby [EMAIL PROTECTED]
---
arch/powerpc/platforms/512x/Kconfig|1 +
arch/powerpc/platforms/512x/Makefile |2 +-
arch/powerpc/platforms/512x/mpc5121_ads.c | 14 ++-
arch/powerpc/platforms/512x/mpc5121_ads.h | 14 ++
arch/powerpc/platforms/512x/mpc5121_ads_cpld.c | 204
5 files changed, 233 insertions(+), 2 deletions(-)
create mode 100644 arch/powerpc/platforms/512x/mpc5121_ads.h
create mode 100644 arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
diff --git a/arch/powerpc/platforms/512x/Kconfig
b/arch/powerpc/platforms/512x/Kconfig
index f9a04da..0fd3b00 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -12,6 +12,7 @@ config MPC5121_ADS
depends on PPC_MULTIPLATFORM PPC32
select DEFAULT_UIMAGE
select PPC_MPC5121
+ select MPC5121_ADS_CPLD
help
This option enables support for the MPC5121E ADS board.
diff --git a/arch/powerpc/platforms/512x/Makefile
b/arch/powerpc/platforms/512x/Makefile
index e6674c8..aaa934b 100644
--- a/arch/powerpc/platforms/512x/Makefile
+++ b/arch/powerpc/platforms/512x/Makefile
@@ -2,5 +2,5 @@
# Makefile for the Freescale PowerPC 512x linux kernel.
#
obj-y := clock.o mpc512x_shared.o
-obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o
+obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o mpc5121_ads_cpld.o
obj-$(CONFIG_MPC5121_GENERIC) += mpc5121_generic.o
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c
b/arch/powerpc/platforms/512x/mpc5121_ads.c
index 45bb2ef..36805fd 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ * Copyright (C) 2007, 2008 Freescale Semiconductor, Inc. All rights reserved.
*
* Author: John Rigby, [EMAIL PROTECTED], Thur Mar 29 2007
*
@@ -23,6 +23,16 @@
#include asm/time.h
#include mpc512x.h
+#include mpc5121_ads.h
+
+static void __init mpc5121_ads_setup_arch(void)
+{
+ printk(KERN_INFO MPC5121 ADS board from Freescale Semiconductor\n);
+ /*
+* cpld regs are needed early
+*/
+ mpc5121_ads_cpld_map();
+}
static struct of_device_id __initdata of_bus_ids[] = {
{ .name = soc, },
@@ -41,6 +51,7 @@ static void __init
mpc5121_ads_declare_of_platform_devices(void)
static void __init mpc5121_ads_init_IRQ(void)
{
mpc512x_init_IRQ();
+ mpc5121_ads_cpld_pic_init();
}
/*
@@ -56,6 +67,7 @@ static int __init mpc5121_ads_probe(void)
define_machine(mpc5121_ads) {
.name = MPC5121 ADS,
.probe = mpc5121_ads_probe,
+ .setup_arch = mpc5121_ads_setup_arch,
.init = mpc5121_ads_declare_of_platform_devices,
.init_IRQ = mpc5121_ads_init_IRQ,
.get_irq= ipic_get_irq,
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.h
b/arch/powerpc/platforms/512x/mpc5121_ads.h
new file mode 100644
index 000..885992e
--- /dev/null
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.h
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __MPC512ADS_H__
+#define __MPC512ADS_H__
+extern void __init mpc5121_ads_cpld_map(void);
+extern void __init mpc5121_ads_cpld_pic_init(void);
+#endif /* __MPC512ADS_H__ */
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
new file mode 100644
index 000..a6ce805
--- /dev/null
+++ b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
@@ -0,0 +1,204 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: John Rigby, [EMAIL PROTECTED]
+ *
+ * Description:
+ * MPC5121ADS CPLD irq handling
+ *
+ * This is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#undef DEBUG
+
+#include linux/kernel.h
+#include linux/interrupt.h
+#include linux/irq.h
+#include linux/io.h
+#include asm/prom.h
+
+static struct device_node *cpld_pic_node;
+static struct irq_host *cpld_pic_host;
+
+/*
+ * Bits to ignore in the misc_status register
+ * 0x10 touch screen pendown is hard routed to irq1
+ * 0x02 pci
[PATCH 2/8][Version 2] MPC5121 clock driver
Implements the api defined in include/clk.h
Current only getting frequencies is supported
not setting.
Signed-off-by: John Rigby [EMAIL PROTECTED]
---
arch/powerpc/platforms/512x/Makefile |1 +
arch/powerpc/platforms/512x/clock.c | 720 ++
2 files changed, 721 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/platforms/512x/clock.c
diff --git a/arch/powerpc/platforms/512x/Makefile
b/arch/powerpc/platforms/512x/Makefile
index 232c89f..ef6c925 100644
--- a/arch/powerpc/platforms/512x/Makefile
+++ b/arch/powerpc/platforms/512x/Makefile
@@ -1,4 +1,5 @@
#
# Makefile for the Freescale PowerPC 512x linux kernel.
#
+obj-y := clock.o
obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o
diff --git a/arch/powerpc/platforms/512x/clock.c
b/arch/powerpc/platforms/512x/clock.c
new file mode 100644
index 000..5e0cd4c
--- /dev/null
+++ b/arch/powerpc/platforms/512x/clock.c
@@ -0,0 +1,720 @@
+/*
+ * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: John Rigby [EMAIL PROTECTED]
+ *
+ * Implements the clk api defined in include/linux/clk.h
+ *
+ *Original based on linux/arch/arm/mach-integrator/clock.c
+ *
+ *Copyright (C) 2004 ARM Limited.
+ *Written by Deep Blue Solutions Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include linux/kernel.h
+#include linux/list.h
+#include linux/errno.h
+#include linux/err.h
+#include linux/string.h
+#include linux/clk.h
+#include linux/mutex.h
+#include linux/io.h
+
+#include linux/of_platform.h
+#include asm/mpc512x.h
+
+static int clocks_initialized;
+
+#define CLK_HAS_RATE 0x1 /* has rate in MHz */
+#define CLK_HAS_CTRL 0x2 /* has control reg and bit */
+
+struct clk {
+ struct list_head node;
+ char name[32];
+ int flags;
+ struct device *dev;
+ unsigned long rate;
+ struct module *owner;
+ void (*calc) (struct clk *);
+ struct clk *parent;
+ int reg, bit; /* CLK_HAS_CTRL */
+ int div_shift; /* only used by generic_div_clk_calc */
+};
+
+static LIST_HEAD(clocks);
+static DEFINE_MUTEX(clocks_mutex);
+
+struct clk *clk_get(struct device *dev, const char *id)
+{
+ struct clk *p, *clk = ERR_PTR(-ENOENT);
+ int dev_match = 0;
+ int id_match = 0;
+
+ if (dev == NULL id == NULL)
+ return NULL;
+
+ mutex_lock(clocks_mutex);
+ list_for_each_entry(p, clocks, node) {
+ if (dev dev == p-dev)
+ dev_match++;
+ if (strcmp(id, p-name) == 0)
+ id_match++;
+ if ((dev_match || id_match) try_module_get(p-owner)) {
+ clk = p;
+ break;
+ }
+ }
+ mutex_unlock(clocks_mutex);
+
+ return clk;
+}
+EXPORT_SYMBOL(clk_get);
+
+#undef CLK_DEBUG
+#ifdef CLK_DEBUG
+void dump_clocks(void)
+{
+ struct clk *p;
+
+ mutex_lock(clocks_mutex);
+ printk(KERN_INFO CLOCKS:\n);
+ list_for_each_entry(p, clocks, node) {
+ printk(KERN_INFO %s %ld, p-name, p-rate);
+ if (p-parent)
+ printk(KERN_INFO %s %ld, p-parent-name,
+ p-parent-rate);
+ if (p-flags CLK_HAS_CTRL)
+ printk(KERN_INFO reg/bit %d/%d, p-reg, p-bit);
+ printk(\n);
+ }
+ mutex_unlock(clocks_mutex);
+}
+#defineDEBUG_CLK_DUMP() dump_clocks()
+#else
+#defineDEBUG_CLK_DUMP()
+#endif
+
+
+void clk_put(struct clk *clk)
+{
+ module_put(clk-owner);
+}
+EXPORT_SYMBOL(clk_put);
+
+#define NRPSC 12
+
+struct mpc512x_clockctl {
+ u32 spmr; /* System PLL Mode Reg */
+ u32 sccr[2];/* System Clk Ctrl Reg 1 2 */
+ u32 scfr1; /* System Clk Freq Reg 1 */
+ u32 scfr2; /* System Clk Freq Reg 2 */
+ u32 reserved;
+ u32 bcr;/* Bread Crumb Reg */
+ u32 pccr[NRPSC];/* PSC Clk Ctrl Reg 0-11 */
+ u32 spccr; /* SPDIF Clk Ctrl Reg */
+ u32 cccr; /* CFM Clk Ctrl Reg */
+ u32 dccr; /* DIU Clk Cnfg Reg */
+};
+
+struct mpc512x_clockctl __iomem *clockctl;
+
+int clk_enable(struct clk *clk)
+{
+ unsigned int mask;
+
+ if (clk-flags CLK_HAS_CTRL) {
+ mask = in_be32(clockctl-sccr[clk-reg]);
+ mask |= 1 clk-bit;
+ out_be32(clockctl-sccr[clk-reg], mask);
+ }
+ return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+ unsigned int mask;
+
+ if (clk-flags CLK_HAS_CTRL) {
+ mask = in_be32(clockctl-sccr[clk-reg]);
+
[PATCH 5/8][Version 2] powerpc: pci config cleanup
change bool PCI support if long ugly expression to bool PCI support if PPC_HAS_PCI and add select PPC_HAS_PCI to all the config nodes that were previously in the PCI if expression Signed-off-by: John Rigby [EMAIL PROTECTED] --- arch/powerpc/Kconfig |9 + arch/powerpc/platforms/52xx/Kconfig|1 + arch/powerpc/platforms/83xx/Kconfig|1 + arch/powerpc/platforms/85xx/Kconfig|2 +- arch/powerpc/platforms/86xx/Kconfig|2 ++ arch/powerpc/platforms/Kconfig |1 + arch/powerpc/platforms/Kconfig.cputype |2 ++ arch/powerpc/platforms/iseries/Kconfig |1 + arch/powerpc/platforms/ps3/Kconfig |1 + arch/powerpc/platforms/pseries/Kconfig |1 + 10 files changed, 16 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 3934e26..fa9bd91 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -542,11 +542,12 @@ config FSL_LBC config MCA bool +config PPC_HAS_PCI + bool + config PCI - bool PCI support if 40x || CPM2 || PPC_83xx || PPC_85xx || PPC_86xx \ - || PPC_MPC52xx || (EMBEDDED (PPC_PSERIES || PPC_ISERIES)) \ - || PPC_PS3 || 44x - default y if !40x !CPM2 !8xx !PPC_MPC512x !PPC_83xx \ + bool PCI support if PPC_HAS_PCI + default y if !40x !CPM2 !8xx !PPC_83xx \ !PPC_85xx !PPC_86xx default PCI_PERMEDIA if !4xx !CPM2 !8xx default PCI_QSPAN if !4xx !CPM2 8xx diff --git a/arch/powerpc/platforms/52xx/Kconfig b/arch/powerpc/platforms/52xx/Kconfig index acd2fc8..fb4b19a 100644 --- a/arch/powerpc/platforms/52xx/Kconfig +++ b/arch/powerpc/platforms/52xx/Kconfig @@ -3,6 +3,7 @@ config PPC_MPC52xx depends on PPC_MULTIPLATFORM PPC32 select FSL_SOC select PPC_CLOCK + select PPC_HAS_PCI config PPC_MPC5200_SIMPLE bool Generic support for simple MPC5200 based boards diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig index 583b0c7..ccac363 100644 --- a/arch/powerpc/platforms/83xx/Kconfig +++ b/arch/powerpc/platforms/83xx/Kconfig @@ -2,6 +2,7 @@ menuconfig MPC83xx bool 83xx Board Type depends on PPC_83xx select PPC_UDBG_16550 + select PPC_HAS_PCI select PPC_INDIRECT_PCI if MPC83xx diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index 7ff29d5..8b38ff7 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig @@ -2,8 +2,8 @@ menuconfig MPC85xx bool Machine Type depends on PPC_85xx select PPC_UDBG_16550 - select PPC_INDIRECT_PCI if PCI select MPIC + select PPC_HAS_PCI select FSL_PCI if PCI select SERIAL_8250_SHARE_IRQ if SERIAL_8250 default y diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig index 053f49a..efea617 100644 --- a/arch/powerpc/platforms/86xx/Kconfig +++ b/arch/powerpc/platforms/86xx/Kconfig @@ -28,6 +28,7 @@ endchoice config MPC8641 bool + select PPC_HAS_PCI select FSL_PCI if PCI select PPC_UDBG_16550 select MPIC @@ -35,6 +36,7 @@ config MPC8641 config MPC8610 bool + select PPC_HAS_PCI select FSL_PCI if PCI select PPC_UDBG_16550 select MPIC diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig index 87454c5..cc68ab3 100644 --- a/arch/powerpc/platforms/Kconfig +++ b/arch/powerpc/platforms/Kconfig @@ -280,6 +280,7 @@ config CPM2 depends on MPC85xx || 8260 select CPM select PPC_LIB_RHEAP + select PPC_PCI help The CPM2 (Communications Processor Module) is a coprocessor on embedded CPUs made by Freescale. Selecting this option means that diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype index f7efaa9..db8add6 100644 --- a/arch/powerpc/platforms/Kconfig.cputype +++ b/arch/powerpc/platforms/Kconfig.cputype @@ -42,12 +42,14 @@ config 40x select PPC_DCR_NATIVE select PPC_UDBG_16550 select 4xx_SOC + select PPC_HAS_PCI config 44x bool AMCC 44x select PPC_DCR_NATIVE select PPC_UDBG_16550 select 4xx_SOC + select PPC_HAS_PCI config E200 bool Freescale e200 diff --git a/arch/powerpc/platforms/iseries/Kconfig b/arch/powerpc/platforms/iseries/Kconfig index 761d9e9..c19c455 100644 --- a/arch/powerpc/platforms/iseries/Kconfig +++ b/arch/powerpc/platforms/iseries/Kconfig @@ -2,6 +2,7 @@ config PPC_ISERIES bool IBM Legacy iSeries depends on PPC_MULTIPLATFORM PPC64 select PPC_INDIRECT_IO + select PPC_HAS_PCI if EMBEDDED menu iSeries device drivers depends on PPC_ISERIES diff --git a/arch/powerpc/platforms/ps3/Kconfig b/arch/powerpc/platforms/ps3/Kconfig index
[PATCH 7/8][Version 2] MPC5121 Add PCI support
Uses mpc83xx_add_bridge in fsl_pci.c
Signed-off-by: John Rigby [EMAIL PROTECTED]
---
arch/powerpc/platforms/512x/Kconfig |2 ++
arch/powerpc/platforms/512x/mpc5121_ads.c | 10 ++
arch/powerpc/platforms/512x/mpc512x.h |1 +
arch/powerpc/sysdev/fsl_pci.c |5 +++--
4 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/512x/Kconfig
b/arch/powerpc/platforms/512x/Kconfig
index 0fd3b00..f53f49b 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -2,6 +2,8 @@ config PPC_MPC512x
bool
select FSL_SOC
select IPIC
+ select PPC_HAS_PCI
+ select FSL_PCI if PCI
config PPC_MPC5121
bool
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c
b/arch/powerpc/platforms/512x/mpc5121_ads.c
index 36805fd..3306e29 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.c
@@ -22,16 +22,26 @@
#include asm/prom.h
#include asm/time.h
+#include sysdev/fsl_pci.h
+
#include mpc512x.h
#include mpc5121_ads.h
static void __init mpc5121_ads_setup_arch(void)
{
+#ifdef CONFIG_PCI
+ struct device_node *np;
+#endif
printk(KERN_INFO MPC5121 ADS board from Freescale Semiconductor\n);
/*
* cpld regs are needed early
*/
mpc5121_ads_cpld_map();
+
+#ifdef CONFIG_PCI
+ for_each_compatible_node(np, pci, fsl,mpc5121-pci)
+ mpc83xx_add_bridge(np);
+#endif
}
static struct of_device_id __initdata of_bus_ids[] = {
diff --git a/arch/powerpc/platforms/512x/mpc512x.h
b/arch/powerpc/platforms/512x/mpc512x.h
index 789b817..be30915 100644
--- a/arch/powerpc/platforms/512x/mpc512x.h
+++ b/arch/powerpc/platforms/512x/mpc512x.h
@@ -11,4 +11,5 @@
#define __MPC512X_H__
extern unsigned long mpc512x_find_ips_freq(struct device_node *node);
extern void __init mpc512x_init_IRQ(void);
+extern int mpc512x_add_bridge(struct device_node *dev);
#endif /* __MPC512X_H__ */
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 6e6688f..a40bb8e 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -249,7 +249,7 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641D,
quirk_fsl_pcie_header);
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header);
#endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */
-#if defined(CONFIG_PPC_83xx)
+#if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x)
int __init mpc83xx_add_bridge(struct device_node *dev)
{
int len;
@@ -281,6 +281,7 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
/* MPC83xx supports up to two host controllers one at 0x8500 from
immrbar
* the other at 0x8600, we consider the 0x8500 the primary controller
+* MPC512x supports one host controller at 0x8500.
*/
/* PCI 1 */
if ((rsrc.start 0xf) == 0x8500) {
@@ -292,7 +293,7 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
primary = 0;
}
- printk(KERN_INFO Found MPC83xx PCI host bridge at 0x%016llx.
+ printk(KERN_INFO Found FSL PCI host bridge at 0x%016llx.
Firmware bus number: %d-%d\n,
(unsigned long long)rsrc.start, hose-first_busno,
hose-last_busno);
--
1.5.6.rc0.46.gd2b3
___
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Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 8/8][Version 2] MPC5121 Hide pci bridge
The class of the MPC5121 pci host bridge is PCI_CLASS_BRIDGE_OTHER
while other freescale host bridges have class set to
PCI_CLASS_PROCESSOR_POWERPC.
This patch makes fixup_hide_host_resource_fsl match
PCI_CLASS_BRIDGE_OTHER in addition to PCI_CLASS_PROCESSOR_POWERPC.
Signed-off-by: John Rigby [EMAIL PROTECTED]
---
arch/powerpc/kernel/pci_32.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 88db4ff..3d33935 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -54,11 +54,12 @@ LIST_HEAD(hose_list);
static int pci_bus_count;
static void
-fixup_hide_host_resource_fsl(struct pci_dev* dev)
+fixup_hide_host_resource_fsl(struct pci_dev *dev)
{
int i, class = dev-class 8;
- if ((class == PCI_CLASS_PROCESSOR_POWERPC)
+ if ((class == PCI_CLASS_PROCESSOR_POWERPC
+ || class == PCI_CLASS_BRIDGE_OTHER)
(dev-hdr_type == PCI_HEADER_TYPE_NORMAL)
(dev-bus-parent == NULL)) {
for (i = 0; i DEVICE_COUNT_RESOURCE; i++) {
--
1.5.6.rc0.46.gd2b3
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[PATCH 6/8][Version 2] powerpc: Move mpc83xx_add_bridge to fsl_pci.c
This allows other platforms with the same pci block like MPC5121 to use it. Signed-off-by: John Rigby [EMAIL PROTECTED] --- arch/powerpc/platforms/83xx/Kconfig |2 +- arch/powerpc/platforms/83xx/Makefile |1 - arch/powerpc/platforms/83xx/mpc831x_rdb.c |1 + arch/powerpc/platforms/83xx/mpc832x_mds.c |1 + arch/powerpc/platforms/83xx/mpc832x_rdb.c |1 + arch/powerpc/platforms/83xx/mpc834x_itx.c |1 + arch/powerpc/platforms/83xx/mpc834x_mds.c |1 + arch/powerpc/platforms/83xx/mpc836x_mds.c |1 + arch/powerpc/platforms/83xx/mpc837x_mds.c |1 + arch/powerpc/platforms/83xx/mpc837x_rdb.c |1 + arch/powerpc/platforms/83xx/mpc83xx.h |1 - arch/powerpc/platforms/83xx/pci.c | 91 - arch/powerpc/platforms/83xx/sbc834x.c |1 + arch/powerpc/sysdev/fsl_pci.c | 61 +++ arch/powerpc/sysdev/fsl_pci.h |1 + 15 files changed, 72 insertions(+), 94 deletions(-) delete mode 100644 arch/powerpc/platforms/83xx/pci.c diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig index ccac363..48810ca 100644 --- a/arch/powerpc/platforms/83xx/Kconfig +++ b/arch/powerpc/platforms/83xx/Kconfig @@ -3,7 +3,7 @@ menuconfig MPC83xx depends on PPC_83xx select PPC_UDBG_16550 select PPC_HAS_PCI - select PPC_INDIRECT_PCI + select FSL_PCI if PCI if MPC83xx diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile index 76494be..59c413c 100644 --- a/arch/powerpc/platforms/83xx/Makefile +++ b/arch/powerpc/platforms/83xx/Makefile @@ -2,7 +2,6 @@ # Makefile for the PowerPC 83xx linux kernel. # obj-y := misc.o usb.o -obj-$(CONFIG_PCI) += pci.o obj-$(CONFIG_MPC831x_RDB) += mpc831x_rdb.o obj-$(CONFIG_MPC832x_RDB) += mpc832x_rdb.o obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o diff --git a/arch/powerpc/platforms/83xx/mpc831x_rdb.c b/arch/powerpc/platforms/83xx/mpc831x_rdb.c index c4db517..a428f8d 100644 --- a/arch/powerpc/platforms/83xx/mpc831x_rdb.c +++ b/arch/powerpc/platforms/83xx/mpc831x_rdb.c @@ -19,6 +19,7 @@ #include asm/time.h #include asm/ipic.h #include asm/udbg.h +#include sysdev/fsl_pci.h #include mpc83xx.h diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.c b/arch/powerpc/platforms/83xx/mpc832x_mds.c index 6dbc6ea..dd4be4a 100644 --- a/arch/powerpc/platforms/83xx/mpc832x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc832x_mds.c @@ -36,6 +36,7 @@ #include asm/prom.h #include asm/udbg.h #include sysdev/fsl_soc.h +#include sysdev/fsl_pci.h #include asm/qe.h #include asm/qe_ic.h diff --git a/arch/powerpc/platforms/83xx/mpc832x_rdb.c b/arch/powerpc/platforms/83xx/mpc832x_rdb.c index e7f706b..f049d69 100644 --- a/arch/powerpc/platforms/83xx/mpc832x_rdb.c +++ b/arch/powerpc/platforms/83xx/mpc832x_rdb.c @@ -27,6 +27,7 @@ #include asm/qe.h #include asm/qe_ic.h #include sysdev/fsl_soc.h +#include sysdev/fsl_pci.h #include mpc83xx.h diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.c b/arch/powerpc/platforms/83xx/mpc834x_itx.c index 50e8f63..7301d77 100644 --- a/arch/powerpc/platforms/83xx/mpc834x_itx.c +++ b/arch/powerpc/platforms/83xx/mpc834x_itx.c @@ -35,6 +35,7 @@ #include asm/prom.h #include asm/udbg.h #include sysdev/fsl_soc.h +#include sysdev/fsl_pci.h #include mpc83xx.h diff --git a/arch/powerpc/platforms/83xx/mpc834x_mds.c b/arch/powerpc/platforms/83xx/mpc834x_mds.c index 2b8a0a3..30d509a 100644 --- a/arch/powerpc/platforms/83xx/mpc834x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc834x_mds.c @@ -35,6 +35,7 @@ #include asm/prom.h #include asm/udbg.h #include sysdev/fsl_soc.h +#include sysdev/fsl_pci.h #include mpc83xx.h diff --git a/arch/powerpc/platforms/83xx/mpc836x_mds.c b/arch/powerpc/platforms/83xx/mpc836x_mds.c index c2e5de6..75b80e8 100644 --- a/arch/powerpc/platforms/83xx/mpc836x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc836x_mds.c @@ -42,6 +42,7 @@ #include asm/prom.h #include asm/udbg.h #include sysdev/fsl_soc.h +#include sysdev/fsl_pci.h #include asm/qe.h #include asm/qe_ic.h diff --git a/arch/powerpc/platforms/83xx/mpc837x_mds.c b/arch/powerpc/platforms/83xx/mpc837x_mds.c index 64d17b0..be62de2 100644 --- a/arch/powerpc/platforms/83xx/mpc837x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c @@ -19,6 +19,7 @@ #include asm/ipic.h #include asm/udbg.h #include asm/prom.h +#include sysdev/fsl_pci.h #include mpc83xx.h diff --git a/arch/powerpc/platforms/83xx/mpc837x_rdb.c b/arch/powerpc/platforms/83xx/mpc837x_rdb.c index c00356b..da030af 100644 --- a/arch/powerpc/platforms/83xx/mpc837x_rdb.c +++ b/arch/powerpc/platforms/83xx/mpc837x_rdb.c @@ -17,6 +17,7 @@ #include asm/time.h #include asm/ipic.h #include asm/udbg.h +#include sysdev/fsl_pci.h #include mpc83xx.h diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/platforms/83xx/mpc83xx.h index
Re: [PATCH 8/8][Version 2] MPC5121 Hide pci bridge
Hello.
John Rigby wrote:
The class of the MPC5121 pci host bridge is PCI_CLASS_BRIDGE_OTHER
while other freescale host bridges have class set to
PCI_CLASS_PROCESSOR_POWERPC.
This patch makes fixup_hide_host_resource_fsl match
PCI_CLASS_BRIDGE_OTHER in addition to PCI_CLASS_PROCESSOR_POWERPC.
Signed-off-by: John Rigby [EMAIL PROTECTED]
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 88db4ff..3d33935 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -54,11 +54,12 @@ LIST_HEAD(hose_list);
static int pci_bus_count;
static void
-fixup_hide_host_resource_fsl(struct pci_dev* dev)
+fixup_hide_host_resource_fsl(struct pci_dev *dev)
{
int i, class = dev-class 8;
- if ((class == PCI_CLASS_PROCESSOR_POWERPC)
+ if ((class == PCI_CLASS_PROCESSOR_POWERPC
+ || class == PCI_CLASS_BRIDGE_OTHER)
Coding style nit: could you put || on the same line with first
comparison (where used to be BTW) and align the second comparison to
start under 'class'?
WBR, Sergei
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Re: Exit points for returning from kernel mode to user mode
On Tue, 2008-06-24 at 15:22 -0600, Mitesh wrote: I am trying to understand exit points from kernel mode to user mode. I believe this happens when the scheduler is invoked, there are interrupts, exceptions, or the kernel is executing system call in process context. Is there a single function which is called in the ppc kernel when the mode is switched back to user mode ? I have linux 2.6.16.21 kernel running on a 4-way p550 IBM pSeries with POWER5 processors. Everytime before a process begins executing in user mode I want to execute a special SMT thread priority assembler instruction. What code files should I be looking at, is there one place this can be done? Any tips are appreciated. You need to look for the code path that returns from an interrupt (ie. that includes system call exceptions). There are actually a few flavours of this for 64 bits: - If the interrupt is an SLB miss, this is a fairly fast path, all assembly, all in real mode. However, it doesn't have any existing code to differenciate return to userspace or return to the kernel. This is in head_64.S, function slb_miss_realmode. - There is similar code for STAB exceptions (pre-POWER4 machines) - fast_exception_return, still in head_64.S, is used for short exceptions that don't change the interrupt or scheduling status of the task, such as servicing an FP or VMX unavailable interrupt. Note that this can be used to return to the kernel as well as userspace. There is some conditional code for user (look at the virt CPU accounting bits) but it's a fair way before the actual rfid. - in entry_64.S, the main syscall exit path when there is no work (ie, no pending signal, no need to schedule, ...) which is some way after the syscall_error_cont: label. - same file, some way after the restore: label, this is the main path when returning from an interrupt (ie, all the cases not above). Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Graphic Card on Freescale MPC837x-rdb
On Tue, 2008-06-24 at 12:32 -0500, Kumar Gala wrote: On Jun 24, 2008, at 12:17 PM, Bizhan Gholikhamseh (bgholikh) wrote: HI all, Has anyone tried using a Graphic card on Freescale MPC837x-rdb board? If so I appreciate any hints and information that I can use. Nope, but you'll most likely need some form of x86 emulation for the video bios init. Yup. There's something in u-boot, though I don't know how well it works with newer cards. if it's based on x86emu tho, it might be worth looking at backporting some of the recent fixes/additions (such as bswap and rtdsc instructions support) to it. Once you get the card bootstrapped... I've been working lately with Dave Airlie to get the X radeon driver work on powerpc (ie endian fixes) on r5xx and r6xx cards. It should already work with older cards. The new cards use some interesting interface to various tables pseudo-code scripts in the cards ROM (called AtomBios) and the code for that, contributed by ATI, has serious endian bugs which I'm working on fixing as we speak. For nvidia, you can use the free nv driver which provides some level of 2D acceleration and mode setting but no more. Or you may want to try the reverse engineered nouveau drivers whose level of features might or might not suit you depending on what you need and what card model you have. There's some work on getting recent XGI cards (such has XP 10) to work as well, though there are still issues with the driver. It mostly depends on what features you need. If you can get ATI to sell you an embedded chip using one of their old families (r1xx/2xx or even 3xx) it's likely to just work provided you can bootstrap it. Finally, in the ATI case (and to some extend nVidia but I don't know how well that works), the card can also be bootstrapped without an x86 BIOS emulation using some of those scripts in the ROM. This should be working with the ATI AtomBios (r5xx/6xx) once I'm done with it, and we have some code for older ATI BIOSes too but I haven't tried it and so it might well not work (it's more tricky for various reasons). This code can fairly easily be pulled out of the X server if you want your firmware to be able to bootstrap the cards earlier. I have no info about other card vendors. Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH v2] powerpc: fix ALSA options in Freescale 85xx and 86xx defconfigs
The defconfigs for Freescale 85xx and 86xx SOCs had bad choices for some audio related options. In particular, OSS emulation should be enabled, and the old ALSA API should be disabled. Signed-off-by: Timur Tabi [EMAIL PROTECTED] --- Kumar, this version excludes the change for the 8610, which should eliminate any merge conflict. This patch is for 2.6.27. arch/powerpc/configs/85xx/mpc8544_ds_defconfig |8 +--- arch/powerpc/configs/85xx/mpc8572_ds_defconfig |8 +--- arch/powerpc/configs/mpc85xx_defconfig |8 +--- arch/powerpc/configs/mpc8641_hpcn_defconfig|8 +--- 4 files changed, 20 insertions(+), 12 deletions(-) diff --git a/arch/powerpc/configs/85xx/mpc8544_ds_defconfig b/arch/powerpc/configs/85xx/mpc8544_ds_defconfig index a9f113b..19d0864 100644 --- a/arch/powerpc/configs/85xx/mpc8544_ds_defconfig +++ b/arch/powerpc/configs/85xx/mpc8544_ds_defconfig @@ -976,10 +976,12 @@ CONFIG_SND=y CONFIG_SND_TIMER=y CONFIG_SND_PCM=y # CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y # CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y +# CONFIG_SND_SUPPORT_OLD_API is not set CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set diff --git a/arch/powerpc/configs/85xx/mpc8572_ds_defconfig b/arch/powerpc/configs/85xx/mpc8572_ds_defconfig index 53aa6f3..10f82d1 100644 --- a/arch/powerpc/configs/85xx/mpc8572_ds_defconfig +++ b/arch/powerpc/configs/85xx/mpc8572_ds_defconfig @@ -974,10 +974,12 @@ CONFIG_SND=y CONFIG_SND_TIMER=y CONFIG_SND_PCM=y # CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y # CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y +# CONFIG_SND_SUPPORT_OLD_API is not set CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig index 2075722..54937a8 100644 --- a/arch/powerpc/configs/mpc85xx_defconfig +++ b/arch/powerpc/configs/mpc85xx_defconfig @@ -982,10 +982,12 @@ CONFIG_SND=y CONFIG_SND_TIMER=y CONFIG_SND_PCM=y # CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y # CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y +# CONFIG_SND_SUPPORT_OLD_API is not set CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set diff --git a/arch/powerpc/configs/mpc8641_hpcn_defconfig b/arch/powerpc/configs/mpc8641_hpcn_defconfig index d01dcdb..1e5557d 100644 --- a/arch/powerpc/configs/mpc8641_hpcn_defconfig +++ b/arch/powerpc/configs/mpc8641_hpcn_defconfig @@ -968,10 +968,12 @@ CONFIG_SND=y CONFIG_SND_TIMER=y CONFIG_SND_PCM=y # CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y # CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y +# CONFIG_SND_SUPPORT_OLD_API is not set CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set -- 1.5.5 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH] powerpc: remove CS4270 i2c data from fsl_soc.c
The i2c_devices[] array in fsl_soc.c lists new-style I2C drivers that have
device tree nodes. The CS4270 driver is not a new-style driver, and won't be
in 2.6.27, so it should not appear in this array. Its presence in this array
blocks the old-style driver from finding the device.
This patch reverts commit 64f9b5ee17ee7974d7cc58d75221432d86960ba3.
Signed-off-by: Timur Tabi [EMAIL PROTECTED]
---
This patch is for Kumar's powerpc-next branch.
arch/powerpc/sysdev/fsl_soc.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index ca54563..97b9d44 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -433,7 +433,6 @@ static struct i2c_driver_device i2c_devices[] __initdata = {
{dallas,ds1340, ds1340},
{stm,m41t00, m41t00},
{dallas,ds1374, ds1374},
- {cirrus,cs4270, cs4270},
};
static int __init of_find_i2c_driver(struct device_node *node,
--
1.5.5
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Re: [2.6 patch] asm/ptrace.h userspace headers cleanup
Adrian Bunk writes: This patch contains the following cleanups for the asm/ptrace.h userspace headers: Acked-by: Paul Mackerras [EMAIL PROTECTED] ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Do we still need devtree_lock?
I'm trying to write a function that gets a list of all aliases
aliases {
serial0 = serial0;
serial1 = serial1;
pci0 = pci0;
pci1 = pci1;
pci2 = pci2;
};
That is, I do not know which aliases are in the /aliases node, so I need a
function that works somewhat like of_find_property(), but just returns the Nth
property instead of doing a strcmp.
I can't seem to find one, so I probably need to write one. However, I noticed
that of_find_property() uses a lock:
read_lock(devtree_lock);
for (pp = np-properties; pp != 0; pp = pp-next) {
if (of_prop_cmp(pp-name, name) == 0) {
if (lenp != 0)
*lenp = pp-length;
break;
}
}
read_unlock(devtree_lock);
But the comment for devtree_lock says this:
extern rwlock_t devtree_lock; /* temporary while merging */
Since arch/ppc is going away, does this meant that the lock can go away do?
--
Timur Tabi
Linux kernel developer at Freescale
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Re: Do we still need devtree_lock?
On Tue, 2008-06-24 at 18:13 -0500, Timur Tabi wrote:
I'm trying to write a function that gets a list of all aliases
aliases {
serial0 = serial0;
serial1 = serial1;
pci0 = pci0;
pci1 = pci1;
pci2 = pci2;
};
That is, I do not know which aliases are in the /aliases node, so I need a
function that works somewhat like of_find_property(), but just returns the Nth
property instead of doing a strcmp.
I can't seem to find one, so I probably need to write one. However, I noticed
that of_find_property() uses a lock:
read_lock(devtree_lock);
for (pp = np-properties; pp != 0; pp = pp-next) {
if (of_prop_cmp(pp-name, name) == 0) {
if (lenp != 0)
*lenp = pp-length;
break;
}
}
read_unlock(devtree_lock);
But the comment for devtree_lock says this:
extern rwlock_t devtree_lock; /* temporary while merging */
Since arch/ppc is going away, does this meant that the lock can go away do?
You wish :) That /would/ make life easier.
I think the comment just refers to the extern declaration being in
the .c file, rather than a header - ie. now that the merge is done we
should clean it up and put it in a header.
cheers
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wwweb: http://michael.ellerman.id.au
phone: +61 2 6212 1183 (tie line 70 21183)
We do not inherit the earth from our ancestors,
we borrow it from our children. - S.M.A.R.T Person
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[PATCH] Parameterize EMAC Multicast Match Handling
Various instances of the EMAC core have varying: 1) number of address
match slots, 2) width of the registers for handling address match slots,
3) number of registers for handling address match slots and 4) base
offset for those registers.
As the driver stands today, it assumes that all EMACs have 4 IAHT and
GAHT 32-bit registers, starting at offset 0x30 from the register base,
with only 16-bits of each used for a total of 64 match slots.
The 405EX(r) and 460 now use the EMAC4SYNC core rather than the EMAC4
core. This core has 8 IAHT and GAHT registers, starting at offset 0x80
from the register base, with ALL 32-bits of each used for a total of
256 match slots.
This adds macros and inlines for handling these differences based on
three parameters parsed from the device tree:
xaht-slots-shift
xaht-width-shift
xaht-base-offset
and reworks the code, where appropriate to use those macros and inlines.
EMAC/EMAC4 values are defaulted for these keys if missing, resulting in
a driver that works as today's does for all cores.
In addition the register size passed to ioremap is now taken from the
device tree:
c0 for EMAC4SYNC cores
74 for EMAC4 cores
70 for EMAC cores
rathaer than sizeof (emac_regs).
Finally, the device trees have been updated with the appropriate xaht-*
keys and values.
This has been tested on an AMCC Haleakala board such that: 1) inbound
ICMP requests to 'haleakala.local' via MDNS from both Mac OS X 10.4.11
and Ubuntu 8.04 systems as well as 2) outbound ICMP requests from
'haleakala.local' to those same systems in the '.local' domain via MDNS
now work.
Signed-off-by: Grant Erickson [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/bamboo.dts |6 +++
arch/powerpc/boot/dts/canyonlands.dts | 10 -
arch/powerpc/boot/dts/ebony.dts |6 +++
arch/powerpc/boot/dts/ep405.dts |3 ++
arch/powerpc/boot/dts/glacier.dts | 20 +--
arch/powerpc/boot/dts/haleakala.dts |5 ++-
arch/powerpc/boot/dts/katmai.dts |5 ++-
arch/powerpc/boot/dts/kilauea.dts | 10 -
arch/powerpc/boot/dts/makalu.dts | 10 -
arch/powerpc/boot/dts/rainier.dts | 10 -
arch/powerpc/boot/dts/sequoia.dts | 10 -
arch/powerpc/boot/dts/taishan.dts | 20 +--
arch/powerpc/boot/dts/walnut.dts |3 ++
arch/powerpc/boot/dts/warp.dts|3 ++
drivers/net/ibm_newemac/core.c| 55 +++--
drivers/net/ibm_newemac/core.h| 61 +
drivers/net/ibm_newemac/debug.c | 32 +++--
drivers/net/ibm_newemac/emac.h| 15 +---
18 files changed, 219 insertions(+), 65 deletions(-)
diff --git a/arch/powerpc/boot/dts/bamboo.dts b/arch/powerpc/boot/dts/bamboo.dts
index ba2521b..200a4ec 100644
--- a/arch/powerpc/boot/dts/bamboo.dts
+++ b/arch/powerpc/boot/dts/bamboo.dts
@@ -221,6 +221,9 @@
phy-map = ;
zmii-device = ZMII0;
zmii-channel = 0;
+ xaht-base-offset = 30;
+ xaht-slots-shift = 6;
+ xaht-width-shift = 4;
};
EMAC1: [EMAIL PROTECTED] {
@@ -241,6 +244,9 @@
phy-map = ;
zmii-device = ZMII0;
zmii-channel = 1;
+ xaht-base-offset = 30;
+ xaht-slots-shift = 6;
+ xaht-width-shift = 4;
};
[EMAIL PROTECTED] {
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
b/arch/powerpc/boot/dts/canyonlands.dts
index 3963412..75ff768 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -272,7 +272,7 @@
#size-cells = 0;
interrupt-map = /*Status*/ 0 UIC2 10 4
/*Wake*/ 1 UIC2 14 4;
- reg = ef600e00 70;
+ reg = ef600e00 74;
local-mac-address = []; /* Filled
in by U-Boot */
mal-device = MAL0;
mal-tx-channel = 0;
@@ -287,6 +287,9 @@
rgmii-channel = 0;
tah-device = TAH0;
tah-channel = 0;
+ xaht-base-offset = 80;
+ xaht-slots-shift = 8;
+ xaht-width-shift = 5;
has-inverted-stacr-oc;
has-new-stacr-staopc;
};
@@ -301,7 +304,7 @@
Re: [PATCH 7/9] powerpc: Add VSX assembler code macros
In message [EMAIL PROTECTED] you wrote : On Jun 24, 2008, at 5:57 AM, Michael Neuling wrote: This adds the macros for the VSX load/store instruction as most binutils are not going to support this for a while. Also add VSX register save/restore macros and vsr[0-63] register definitions. Signed-off-by: Michael Neuling [EMAIL PROTECTED] --- include/asm-powerpc/ppc_asm.h | 127 ++ 1 file changed, 127 insertions(+) Index: linux-2.6-ozlabs/include/asm-powerpc/ppc_asm.h === --- linux-2.6-ozlabs.orig/include/asm-powerpc/ppc_asm.h +++ linux-2.6-ozlabs/include/asm-powerpc/ppc_asm.h @@ -74,6 +74,15 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR); REST_10GPRS(22, base) #endif +/* + * Define what the VSX XX1 form instructions will look like, then add + * the 128 bit load store instructions based on that. + */ +#define VSX_XX1(xs, ra, rb)(((xs) 0x1f) 21 | ((ra) 16) | \ +((rb) 11) | (((xs) 5))) + +#define STXVD2X(xs, ra, rb).long (0x7c000798 | VSX_XX1((xs), (ra), (rb))) +#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb))) #define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base) #define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base) @@ -110,6 +119,57 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR); #define REST_16VRS(n,b,base)REST_8VRS(n,b,base); REST_8VRS(n +8,b,base) #define REST_32VRS(n,b,base)REST_16VRS(n,b,base); REST_16VRS(n +16,b,base) +/* Save the lower 32 VSRs in the thread VSR region */ +#define SAVE_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); STXVD2X(n,b,base) +#define SAVE_2VSRS(n,b,base) SAVE_VSR(n,b,base); SAVE_VSR(n+1,b,base ) +#define SAVE_4VSRS(n,b,base) SAVE_2VSRS(n,b,base); SAVE_2VSRS(n +2,b,base) +#define SAVE_8VSRS(n,b,base) SAVE_4VSRS(n,b,base); SAVE_4VSRS(n +4,b,base) +#define SAVE_16VSRS(n,b,base) SAVE_8VSRS(n,b,base); SAVE_8VSRS(n +8,b,base) +#define SAVE_32VSRS(n,b,base) SAVE_16VSRS(n,b,base); SAVE_16VSRS(n +16,b,base) +#define REST_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); LXVD2X(n,b,base) +#define REST_2VSRS(n,b,base) REST_VSR(n,b,base); REST_VSR(n+1,b,base ) +#define REST_4VSRS(n,b,base) REST_2VSRS(n,b,base); REST_2VSRS(n +2,b,base) +#define REST_8VSRS(n,b,base) REST_4VSRS(n,b,base); REST_4VSRS(n +4,b,base) +#define REST_16VSRS(n,b,base) REST_8VSRS(n,b,base); REST_8VSRS(n +8,b,base) +#define REST_32VSRS(n,b,base) REST_16VSRS(n,b,base); REST_16VSRS(n +16,b,base) +/* Save the upper 32 VSRs (32-63) in the thread VSX region (0-31) */ +#define SAVE_VSRU(n,b,base)li b,THREAD_VR0+(16*(n)); STXVD2X(n +32,b,base) +#define SAVE_2VSRSU(n,b,base) SAVE_VSRU(n,b,base); SAVE_VSRU(n +1,b,base) +#define SAVE_4VSRSU(n,b,base) SAVE_2VSRSU(n,b,base); SAVE_2VSRSU(n +2,b,base) +#define SAVE_8VSRSU(n,b,base) SAVE_4VSRSU(n,b,base); SAVE_4VSRSU(n +4,b,base) +#define SAVE_16VSRSU(n,b,base) SAVE_8VSRSU(n,b,base); SAVE_8VSRSU(n +8,b,base) +#define SAVE_32VSRSU(n,b,base) SAVE_16VSRSU(n,b,base); SAVE_16VSRSU(n+16,b,base) +#define REST_VSRU(n,b,base)li b,THREAD_VR0+(16*(n)); LXVD2X(n +32,b,base) +#define REST_2VSRSU(n,b,base) REST_VSRU(n,b,base); REST_VSRU(n +1,b,base) +#define REST_4VSRSU(n,b,base) REST_2VSRSU(n,b,base); REST_2VSRSU(n +2,b,base) +#define REST_8VSRSU(n,b,base) REST_4VSRSU(n,b,base); REST_4VSRSU(n +4,b,base) +#define REST_16VSRSU(n,b,base) REST_8VSRSU(n,b,base); REST_8VSRSU(n +8,b,base) +#define REST_32VSRSU(n,b,base) REST_16VSRSU(n,b,base); REST_16VSRSU(n+16,b,base) + +#ifdef CONFIG_VSX I think we should do this in fpu.S so its clearly in the code when reading it what's going on. Do you mean the section above or below this comment? +#define REST_32FPVSRS(n,c,base) \ +BEGIN_FTR_SECTION \ + b 2f; \ +END_FTR_SECTION_IFSET(CPU_FTR_VSX); \ + REST_32FPRS(n,base);\ + b 3f; \ +2: REST_32VSRS(n,c,base); \ +3: + +#define SAVE_32FPVSRS(n,c,base) \ +BEGIN_FTR_SECTION \ + b 2f; \ +END_FTR_SECTION_IFSET(CPU_FTR_VSX); \ +
[PATCH v2] Parameterize EMAC Multicast Match Handling
Various instances of the EMAC core have varying: 1) number of address
match slots, 2) width of the registers for handling address match slots,
3) number of registers for handling address match slots and 4) base
offset for those registers.
As the driver stands today, it assumes that all EMACs have 4 IAHT and
GAHT 32-bit registers, starting at offset 0x30 from the register base,
with only 16-bits of each used for a total of 64 match slots.
The 405EX(r) and 460 now use the EMAC4SYNC core rather than the EMAC4
core. This core has 8 IAHT and GAHT registers, starting at offset 0x80
from the register base, with ALL 32-bits of each used for a total of
256 match slots.
This adds macros and inlines for handling these differences based on
three parameters parsed from the device tree:
xaht-slots-shift
xaht-width-shift
xaht-base-offset
and reworks the code, where appropriate to use those macros and inlines.
EMAC/EMAC4 values are defaulted for these keys if missing, resulting in
a driver that works as today's does for all cores.
In addition the register size passed to ioremap is now taken from the
device tree:
c0 for EMAC4SYNC cores
74 for EMAC4 cores
70 for EMAC cores
rathaer than sizeof (emac_regs).
Finally, the device trees have been updated with the appropriate xaht-*
keys and values.
This has been tested on an AMCC Haleakala board such that: 1) inbound
ICMP requests to 'haleakala.local' via MDNS from both Mac OS X 10.4.11
and Ubuntu 8.04 systems as well as 2) outbound ICMP requests from
'haleakala.local' to those same systems in the '.local' domain via MDNS
now work.
Signed-off-by: Grant Erickson [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/bamboo.dts |6 +++
arch/powerpc/boot/dts/canyonlands.dts | 10 -
arch/powerpc/boot/dts/ebony.dts |6 +++
arch/powerpc/boot/dts/ep405.dts |3 ++
arch/powerpc/boot/dts/glacier.dts | 20 +--
arch/powerpc/boot/dts/haleakala.dts |5 ++-
arch/powerpc/boot/dts/katmai.dts |5 ++-
arch/powerpc/boot/dts/kilauea.dts | 10 -
arch/powerpc/boot/dts/makalu.dts | 10 -
arch/powerpc/boot/dts/rainier.dts | 10 -
arch/powerpc/boot/dts/sequoia.dts | 10 -
arch/powerpc/boot/dts/taishan.dts | 20 +--
arch/powerpc/boot/dts/walnut.dts |3 ++
arch/powerpc/boot/dts/warp.dts|3 ++
drivers/net/ibm_newemac/core.c| 55 +++--
drivers/net/ibm_newemac/core.h| 61 +
drivers/net/ibm_newemac/debug.c | 32 +++--
drivers/net/ibm_newemac/emac.h| 15 +---
18 files changed, 219 insertions(+), 65 deletions(-)
diff --git a/arch/powerpc/boot/dts/bamboo.dts b/arch/powerpc/boot/dts/bamboo.dts
index ba2521b..200a4ec 100644
--- a/arch/powerpc/boot/dts/bamboo.dts
+++ b/arch/powerpc/boot/dts/bamboo.dts
@@ -221,6 +221,9 @@
phy-map = ;
zmii-device = ZMII0;
zmii-channel = 0;
+ xaht-base-offset = 30;
+ xaht-slots-shift = 6;
+ xaht-width-shift = 4;
};
EMAC1: [EMAIL PROTECTED] {
@@ -241,6 +244,9 @@
phy-map = ;
zmii-device = ZMII0;
zmii-channel = 1;
+ xaht-base-offset = 30;
+ xaht-slots-shift = 6;
+ xaht-width-shift = 4;
};
[EMAIL PROTECTED] {
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
b/arch/powerpc/boot/dts/canyonlands.dts
index 3963412..75ff768 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -272,7 +272,7 @@
#size-cells = 0;
interrupt-map = /*Status*/ 0 UIC2 10 4
/*Wake*/ 1 UIC2 14 4;
- reg = ef600e00 70;
+ reg = ef600e00 74;
local-mac-address = []; /* Filled
in by U-Boot */
mal-device = MAL0;
mal-tx-channel = 0;
@@ -287,6 +287,9 @@
rgmii-channel = 0;
tah-device = TAH0;
tah-channel = 0;
+ xaht-base-offset = 80;
+ xaht-slots-shift = 8;
+ xaht-width-shift = 5;
has-inverted-stacr-oc;
has-new-stacr-staopc;
};
@@ -301,7 +304,7 @@
Re: [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
In message [EMAIL PROTECTED] you wrote
:
On Jun 24, 2008, at 5:57 AM, Michael Neuling wrote:
We are going to change where the floating point registers are stored
in the thread_struct, so in preparation add some macros to access the
floating point registers. Update all code to use these new macros.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
---
arch/powerpc/kernel/align.c |6 ++--
arch/powerpc/kernel/process.c|5 ++-
arch/powerpc/kernel/ptrace.c | 14 +
arch/powerpc/kernel/ptrace32.c | 14 +++--
arch/powerpc/kernel/softemu8xx.c |4 +-
arch/powerpc/math-emu/math.c | 56 ++
+
include/asm-powerpc/ppc_asm.h|5 ++-
include/asm-powerpc/processor.h |3 ++
8 files changed, 61 insertions(+), 46 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c
@@ -218,10 +218,10 @@ static int fpr_get(struct task_struct *t
flush_fp_to_thread(target);
BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
-offsetof(struct thread_struct, fpr[32]));
+offsetof(struct thread_struct, TS_FPR(32)));
return user_regset_copyout(pos, count, kbuf, ubuf,
- target-thread.fpr, 0, -1);
+ target-thread.fpr, 0, -1);
is there a reason we can drop the ''? (I'm only look at this as a
textual diff, not at what the code is trying to do).
Oops.. I'll fix.
}
static int fpr_set(struct task_struct *target, const struct
user_regset *regset,
@@ -231,10 +231,10 @@ static int fpr_set(struct task_struct *t
flush_fp_to_thread(target);
BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
-offsetof(struct thread_struct, fpr[32]));
+offsetof(struct thread_struct, TS_FPR(32)));
return user_regset_copyin(pos, count, kbuf, ubuf,
- target-thread.fpr, 0, -1);
+ target-thread.fpr, 0, -1);
ditto.
}
@@ -728,7 +728,8 @@ long arch_ptrace(struct task_struct *chi
tmp = ptrace_get_reg(child, (int) index);
} else {
flush_fp_to_thread(child);
- tmp = ((unsigned long *)child-thread.fpr)[index - PT_F
PR0];
+ tmp = ((unsigned long *)child-thread.fpr)
+ [TS_FPRSPACING * (index - PT_FPR0)];
}
ret = put_user(tmp,(unsigned long __user *) data);
break;
@@ -755,7 +756,8 @@ long arch_ptrace(struct task_struct *chi
ret = ptrace_put_reg(child, index, data);
} else {
flush_fp_to_thread(child);
- ((unsigned long *)child-thread.fpr)[index - PT_FPR0] =
data;
+ ((unsigned long *)child-thread.fpr)
+ [TS_FPRSPACING * (index - PT_FPR0)] = data;
ret = 0;
}
break;
Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace32.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace32.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace32.c
@@ -64,6 +64,11 @@ static long compat_ptrace_old(struct tas
return -EPERM;
}
+/* Macros to workout the correct index for the FPR in the thread
struct */
+#define FPRNUMBER(i) (((i) - PT_FPR0) 1)
+#define FPRHALF(i) (((i) - PT_FPR0) % 2)
+#define FPRINDEX(i) TS_FPRSPACING * FPRNUMBER(i) + FPRHALF(i)
we should either use this macros in both ptrace.c and ptrace32.c or
drop them
This set of macros is really only 32 bit specific since in ptrace 32 we
access the registers as 32 bits (hence needing two accesses to get the
full 64 bits), but in ptrace 64, we access them as 64 bit (hence only 1
access).
Theses macros are really only here to deal with the unique indexing into
the thread struct that we now need to do for ptrace 32 only (thanks to
paulus who pointed out I got this wrong first time).
The only macro here that could potentially be reused is FPRNUMER(i).
+
long compat_arch_ptrace(struct task_struct *child, compat_long_t
request,
compat_ulong_t caddr, compat_ulong_t cdata)
{
@@ -122,7 +127,8 @@ long compat_arch_ptrace(struct task_stru
* to be an array of unsigned int (32 bits) - the
* index passed in is based on this assumption.
*/
- tmp = ((unsigned int *)child-thread.fpr)[index - PT_FP
R0];
+ tmp = ((unsigned int *)child-thread.fpr)
+ [FPRINDEX(index)];
Re: [PATCH 7/9] powerpc: Add VSX assembler code macros
On Jun 24, 2008, at 7:06 PM, Michael Neuling wrote: In message [EMAIL PROTECTED] you wrote : On Jun 24, 2008, at 5:57 AM, Michael Neuling wrote: This adds the macros for the VSX load/store instruction as most binutils are not going to support this for a while. Also add VSX register save/restore macros and vsr[0-63] register definitions. Signed-off-by: Michael Neuling [EMAIL PROTECTED] --- include/asm-powerpc/ppc_asm.h | 127 ++ ++ ++ 1 file changed, 127 insertions(+) Index: linux-2.6-ozlabs/include/asm-powerpc/ppc_asm.h === --- linux-2.6-ozlabs.orig/include/asm-powerpc/ppc_asm.h +++ linux-2.6-ozlabs/include/asm-powerpc/ppc_asm.h @@ -74,6 +74,15 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR); REST_10GPRS(22, base) #endif +/* + * Define what the VSX XX1 form instructions will look like, then add + * the 128 bit load store instructions based on that. + */ +#define VSX_XX1(xs, ra, rb)(((xs) 0x1f) 21 | ((ra) 16) | \ +((rb) 11) | (((xs) 5))) + +#define STXVD2X(xs, ra, rb).long (0x7c000798 | VSX_XX1((xs), (ra), (rb))) +#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb))) #define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base) #define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base) @@ -110,6 +119,57 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR); #define REST_16VRS(n,b,base)REST_8VRS(n,b,base); REST_8VRS(n +8,b,base) #define REST_32VRS(n,b,base)REST_16VRS(n,b,base); REST_16VRS(n +16,b,base) +/* Save the lower 32 VSRs in the thread VSR region */ +#define SAVE_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); STXVD2X(n,b,base) +#define SAVE_2VSRS(n,b,base) SAVE_VSR(n,b,base); SAVE_VSR(n +1,b,base ) +#define SAVE_4VSRS(n,b,base) SAVE_2VSRS(n,b,base); SAVE_2VSRS(n +2,b,base) +#define SAVE_8VSRS(n,b,base) SAVE_4VSRS(n,b,base); SAVE_4VSRS(n +4,b,base) +#define SAVE_16VSRS(n,b,base) SAVE_8VSRS(n,b,base); SAVE_8VSRS(n +8,b,base) +#define SAVE_32VSRS(n,b,base) SAVE_16VSRS(n,b,base); SAVE_16VSRS(n +16,b,base) +#define REST_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); LXVD2X(n,b,base) +#define REST_2VSRS(n,b,base) REST_VSR(n,b,base); REST_VSR(n +1,b,base ) +#define REST_4VSRS(n,b,base) REST_2VSRS(n,b,base); REST_2VSRS(n +2,b,base) +#define REST_8VSRS(n,b,base) REST_4VSRS(n,b,base); REST_4VSRS(n +4,b,base) +#define REST_16VSRS(n,b,base) REST_8VSRS(n,b,base); REST_8VSRS(n +8,b,base) +#define REST_32VSRS(n,b,base) REST_16VSRS(n,b,base); REST_16VSRS(n +16,b,base) +/* Save the upper 32 VSRs (32-63) in the thread VSX region (0-31) */ +#define SAVE_VSRU(n,b,base)li b,THREAD_VR0+(16*(n)); STXVD2X(n +32,b,base) +#define SAVE_2VSRSU(n,b,base) SAVE_VSRU(n,b,base); SAVE_VSRU(n +1,b,base) +#define SAVE_4VSRSU(n,b,base) SAVE_2VSRSU(n,b,base); SAVE_2VSRSU(n +2,b,base) +#define SAVE_8VSRSU(n,b,base) SAVE_4VSRSU(n,b,base); SAVE_4VSRSU(n +4,b,base) +#define SAVE_16VSRSU(n,b,base) SAVE_8VSRSU(n,b,base); SAVE_8VSRSU(n +8,b,base) +#define SAVE_32VSRSU(n,b,base) SAVE_16VSRSU(n,b,base); SAVE_16VSRSU(n+16,b,base) +#define REST_VSRU(n,b,base)li b,THREAD_VR0+(16*(n)); LXVD2X(n +32,b,base) +#define REST_2VSRSU(n,b,base) REST_VSRU(n,b,base); REST_VSRU(n +1,b,base) +#define REST_4VSRSU(n,b,base) REST_2VSRSU(n,b,base); REST_2VSRSU(n +2,b,base) +#define REST_8VSRSU(n,b,base) REST_4VSRSU(n,b,base); REST_4VSRSU(n +4,b,base) +#define REST_16VSRSU(n,b,base) REST_8VSRSU(n,b,base); REST_8VSRSU(n +8,b,base) +#define REST_32VSRSU(n,b,base) REST_16VSRSU(n,b,base); REST_16VSRSU(n+16,b,base) + +#ifdef CONFIG_VSX I think we should do this in fpu.S so its clearly in the code when reading it what's going on. Do you mean the section above or below this comment? Sorry, the code below. (That does REST_32FPVSRS).. +#define REST_32FPVSRS(n,c,base) \ +BEGIN_FTR_SECTION \ + b 2f; \ +END_FTR_SECTION_IFSET(CPU_FTR_VSX); \ + REST_32FPRS(n,base);\ + b 3f; \ +2: REST_32VSRS(n,c,base); \ +3: + +#define SAVE_32FPVSRS(n,c,base) \ +BEGIN_FTR_SECTION \ + b 2f; \ +END_FTR_SECTION_IFSET(CPU_FTR_VSX); \ + SAVE_32FPRS(n,base);\ + b 3f; \ +2:
dtc: Use stdint.h types throughout dtc
Currently, dtc defines Linux-like names for various fixed-size integer
types. There's no good reason to do this; even Linux itself doesn't
use these names for externally visible things any more. This patch
replaces these with the C99 standardized type names from stdint.h.
Signed-off-by: David Gibson [EMAIL PROTECTED]
Index: dtc/dtc.h
===
--- dtc.orig/dtc.h 2008-06-25 13:47:29.0 +1000
+++ dtc/dtc.h 2008-06-25 13:48:03.0 +1000
@@ -75,11 +75,7 @@
return new;
}
-typedef uint8_t u8;
-typedef uint16_t u16;
-typedef uint32_t u32;
-typedef uint64_t u64;
-typedef u32 cell_t;
+typedef uint32_t cell_t;
#define cpu_to_be16(x) htons(x)
#define be16_to_cpu(x) ntohs(x)
@@ -144,7 +140,7 @@
struct data data_merge(struct data d1, struct data d2);
struct data data_append_cell(struct data d, cell_t word);
struct data data_append_re(struct data d, const struct fdt_reserve_entry *re);
-struct data data_append_addr(struct data d, u64 addr);
+struct data data_append_addr(struct data d, uint64_t addr);
struct data data_append_byte(struct data d, uint8_t byte);
struct data data_append_zeroes(struct data d, int len);
struct data data_append_align(struct data d, int align);
@@ -222,7 +218,7 @@
char *label;
};
-struct reserve_info *build_reserve_entry(u64 start, u64 len, char *label);
+struct reserve_info *build_reserve_entry(uint64_t start, uint64_t len, char
*label);
struct reserve_info *chain_reserve_entry(struct reserve_info *first,
struct reserve_info *list);
struct reserve_info *add_reserve_entry(struct reserve_info *list,
@@ -232,11 +228,11 @@
struct boot_info {
struct reserve_info *reservelist;
struct node *dt;/* the device tree */
- u32 boot_cpuid_phys;
+ uint32_t boot_cpuid_phys;
};
struct boot_info *build_boot_info(struct reserve_info *reservelist,
- struct node *tree, u32 boot_cpuid_phys);
+ struct node *tree, uint32_t boot_cpuid_phys);
/* Checks */
Index: dtc/data.c
===
--- dtc.orig/data.c 2008-06-25 13:48:12.0 +1000
+++ dtc/data.c 2008-06-25 13:48:18.0 +1000
@@ -262,9 +262,9 @@
return data_append_data(d, bere, sizeof(bere));
}
-struct data data_append_addr(struct data d, u64 addr)
+struct data data_append_addr(struct data d, uint64_t addr)
{
- u64 beaddr = cpu_to_be64(addr);
+ uint64_t beaddr = cpu_to_be64(addr);
return data_append_data(d, beaddr, sizeof(beaddr));
}
Index: dtc/dtc-parser.y
===
--- dtc.orig/dtc-parser.y 2008-06-25 13:49:51.0 +1000
+++ dtc/dtc-parser.y2008-06-25 13:50:13.0 +1000
@@ -39,10 +39,10 @@
char *literal;
char *labelref;
unsigned int cbase;
- u8 byte;
+ uint8_t byte;
struct data data;
- u64 addr;
+ uint64_t addr;
cell_t cell;
struct property *prop;
struct property *proplist;
Index: dtc/flattree.c
===
--- dtc.orig/flattree.c 2008-06-25 13:48:25.0 +1000
+++ dtc/flattree.c 2008-06-25 13:49:39.0 +1000
@@ -168,16 +168,16 @@
for_each_marker_of_type(m, LABEL)
emit_offset_label(f, m-ref, m-offset);
- while ((d.len - off) = sizeof(u32)) {
+ while ((d.len - off) = sizeof(uint32_t)) {
fprintf(f, \t.long\t0x%x\n,
- be32_to_cpu(*((u32 *)(d.val+off;
- off += sizeof(u32);
+ be32_to_cpu(*((uint32_t *)(d.val+off;
+ off += sizeof(uint32_t);
}
- if ((d.len - off) = sizeof(u16)) {
+ if ((d.len - off) = sizeof(uint16_t)) {
fprintf(f, \t.short\t0x%hx\n,
- be16_to_cpu(*((u16 *)(d.val+off;
- off += sizeof(u16);
+ be16_to_cpu(*((uint16_t *)(d.val+off;
+ off += sizeof(uint16_t);
}
if ((d.len - off) = 1) {
@@ -575,9 +575,9 @@
inb-ptr += len;
}
-static u32 flat_read_word(struct inbuf *inb)
+static uint32_t flat_read_word(struct inbuf *inb)
{
- u32 val;
+ uint32_t val;
assert(((inb-ptr - inb-base) % sizeof(val)) == 0);
@@ -611,7 +611,7 @@
inb-ptr += len;
- flat_realign(inb, sizeof(u32));
+ flat_realign(inb, sizeof(uint32_t));
return str;
}
@@ -628,7 +628,7 @@
flat_read_chunk(inb, d.val, len);
- flat_realign(inb, sizeof(u32));
+ flat_realign(inb, sizeof(uint32_t));
return d;
}
@@ -655,7 +655,7 @@
static struct property *flat_read_property(struct inbuf *dtbuf,
struct
[PATCH 0/9] powerpc: Add kernel support for POWER7 VSX.
The following set of patches adds Vector Scalar Extentions (VSX) support for POWER7. Includes context switch, ptrace and signals support. Signed-off-by: Michael Neuling [EMAIL PROTECTED] --- Paulus: please consider for your 2.6.27 tree. Updates this post - White space change in start_thread thanks to Paulus - thread_struct change/cleanup suggested thanks to Paulus. This also resulted in changing TS_FPRSPACING to TS_FPRWIDTH - pointer to array fix, thanks to Kumar - indexing macro fix in ptrace32 thanks to Kumar - moved SAVE/REST_32FPVSRS to where they are used in fpu.S suggested by Kumar This time for sure! ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
We are going to change where the floating point registers are stored
in the thread_struct, so in preparation add some macros to access the
floating point registers. Update all code to use these new macros.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
---
arch/powerpc/kernel/align.c |6 ++--
arch/powerpc/kernel/process.c|2 -
arch/powerpc/kernel/ptrace.c | 10 --
arch/powerpc/kernel/ptrace32.c | 14 +++--
arch/powerpc/kernel/softemu8xx.c |4 +-
arch/powerpc/math-emu/math.c | 56 +++
include/asm-powerpc/ppc_asm.h|5 ++-
include/asm-powerpc/processor.h |4 ++
8 files changed, 58 insertions(+), 43 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/kernel/align.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/align.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/align.c
@@ -366,7 +366,7 @@ static int emulate_multiple(struct pt_re
static int emulate_fp_pair(struct pt_regs *regs, unsigned char __user *addr,
unsigned int reg, unsigned int flags)
{
- char *ptr = (char *) current-thread.fpr[reg];
+ char *ptr = (char *) current-thread.TS_FPR(reg);
int i, ret;
if (!(flags F))
@@ -784,7 +784,7 @@ int fix_alignment(struct pt_regs *regs)
return -EFAULT;
}
} else if (flags F) {
- data.dd = current-thread.fpr[reg];
+ data.dd = current-thread.TS_FPR(reg);
if (flags S) {
/* Single-precision FP store requires conversion... */
#ifdef CONFIG_PPC_FPU
@@ -862,7 +862,7 @@ int fix_alignment(struct pt_regs *regs)
if (unlikely(ret))
return -EFAULT;
} else if (flags F)
- current-thread.fpr[reg] = data.dd;
+ current-thread.TS_FPR(reg) = data.dd;
else
regs-gpr[reg] = data.ll;
Index: linux-2.6-ozlabs/arch/powerpc/kernel/process.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/process.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/process.c
@@ -110,7 +110,7 @@ int dump_task_fpu(struct task_struct *ts
return 0;
flush_fp_to_thread(current);
- memcpy(fpregs, tsk-thread.fpr[0], sizeof(*fpregs));
+ memcpy(fpregs, tsk-thread.TS_FPR(0), sizeof(*fpregs));
return 1;
}
Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c
@@ -218,7 +218,7 @@ static int fpr_get(struct task_struct *t
flush_fp_to_thread(target);
BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
-offsetof(struct thread_struct, fpr[32]));
+offsetof(struct thread_struct, TS_FPR(32)));
return user_regset_copyout(pos, count, kbuf, ubuf,
target-thread.fpr, 0, -1);
@@ -231,7 +231,7 @@ static int fpr_set(struct task_struct *t
flush_fp_to_thread(target);
BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
-offsetof(struct thread_struct, fpr[32]));
+offsetof(struct thread_struct, TS_FPR(32)));
return user_regset_copyin(pos, count, kbuf, ubuf,
target-thread.fpr, 0, -1);
@@ -728,7 +728,8 @@ long arch_ptrace(struct task_struct *chi
tmp = ptrace_get_reg(child, (int) index);
} else {
flush_fp_to_thread(child);
- tmp = ((unsigned long *)child-thread.fpr)[index -
PT_FPR0];
+ tmp = ((unsigned long *)child-thread.fpr)
+ [TS_FPRWIDTH * (index - PT_FPR0)];
}
ret = put_user(tmp,(unsigned long __user *) data);
break;
@@ -755,7 +756,8 @@ long arch_ptrace(struct task_struct *chi
ret = ptrace_put_reg(child, index, data);
} else {
flush_fp_to_thread(child);
- ((unsigned long *)child-thread.fpr)[index - PT_FPR0] =
data;
+ ((unsigned long *)child-thread.fpr)
+ [TS_FPRWIDTH * (index - PT_FPR0)] = data;
ret = 0;
}
break;
Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace32.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace32.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace32.c
@@ -64,6 +64,11 @@ static long compat_ptrace_old(struct tas
return -EPERM;
}
+/* Macros to workout the correct index for the FPR in the thread struct */
[PATCH 1/9] powerpc: Fix msr setting in 32 bit signal code
If we set the SPE MSR bit in save_user_regs we can blow away the VEC
bit. This doesn't matter in reality as they are infact the same bit
but looks bad.
Also, when we add VSX in a later patch, we need to be able to set two
separate MSR bits here.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
---
arch/powerpc/kernel/signal_32.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/kernel/signal_32.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/signal_32.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/signal_32.c
@@ -336,6 +336,8 @@ struct rt_sigframe {
static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
int sigret)
{
+ unsigned long msr = regs-msr;
+
/* Make sure floating point registers are stored in regs */
flush_fp_to_thread(current);
@@ -354,8 +356,7 @@ static int save_user_regs(struct pt_regs
return 1;
/* set MSR_VEC in the saved MSR value to indicate that
frame-mc_vregs contains valid data */
- if (__put_user(regs-msr | MSR_VEC, frame-mc_gregs[PT_MSR]))
- return 1;
+ msr |= MSR_VEC;
}
/* else assert((regs-msr MSR_VEC) == 0) */
@@ -377,8 +378,7 @@ static int save_user_regs(struct pt_regs
return 1;
/* set MSR_SPE in the saved MSR value to indicate that
frame-mc_vregs contains valid data */
- if (__put_user(regs-msr | MSR_SPE, frame-mc_gregs[PT_MSR]))
- return 1;
+ msr |= MSR_SPE;
}
/* else assert((regs-msr MSR_SPE) == 0) */
@@ -387,6 +387,8 @@ static int save_user_regs(struct pt_regs
return 1;
#endif /* CONFIG_SPE */
+ if (__put_user(msr, frame-mc_gregs[PT_MSR]))
+ return 1;
if (sigret) {
/* Set up the sigreturn trampoline: li r0,sigret; sc */
if (__put_user(0x3800UL + sigret, frame-tramp[0])
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 3/9] powerpc: Move altivec_unavailable
Move the altivec_unavailable code, to make room at 0xf40 where the vsx_unavailable exception will be. Signed-off-by: Michael Neuling [EMAIL PROTECTED] --- arch/powerpc/kernel/head_64.S |4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) Index: linux-2.6-ozlabs/arch/powerpc/kernel/head_64.S === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/head_64.S +++ linux-2.6-ozlabs/arch/powerpc/kernel/head_64.S @@ -275,7 +275,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) . = 0xf00 b performance_monitor_pSeries - STD_EXCEPTION_PSERIES(0xf20, altivec_unavailable) + . = 0xf20 + b altivec_unavailable_pSeries #ifdef CONFIG_CBE_RAS HSTD_EXCEPTION_PSERIES(0x1200, cbe_system_error) @@ -295,6 +296,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) /* moved from 0xf00 */ STD_EXCEPTION_PSERIES(., performance_monitor) + STD_EXCEPTION_PSERIES(., altivec_unavailable) /* * An interrupt came in while soft-disabled; clear EE in SRR1, ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 4/9] powerpc: Make load_up_fpu and load_up_altivec callable
Make load_up_fpu and load_up_altivec callable so they can be reused by the VSX code. Signed-off-by: Michael Neuling [EMAIL PROTECTED] --- arch/powerpc/kernel/fpu.S|2 +- arch/powerpc/kernel/head_32.S|6 -- arch/powerpc/kernel/head_64.S| 10 +++--- arch/powerpc/kernel/head_booke.h |6 -- 4 files changed, 16 insertions(+), 8 deletions(-) Index: linux-2.6-ozlabs/arch/powerpc/kernel/fpu.S === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/fpu.S +++ linux-2.6-ozlabs/arch/powerpc/kernel/fpu.S @@ -85,7 +85,7 @@ _GLOBAL(load_up_fpu) #endif /* CONFIG_SMP */ /* restore registers and return */ /* we haven't used ctr or xer or lr */ - b fast_exception_return + blr /* * giveup_fpu(tsk) Index: linux-2.6-ozlabs/arch/powerpc/kernel/head_32.S === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/head_32.S +++ linux-2.6-ozlabs/arch/powerpc/kernel/head_32.S @@ -421,8 +421,10 @@ BEGIN_FTR_SECTION b ProgramCheck END_FTR_SECTION_IFSET(CPU_FTR_FPU_UNAVAILABLE) EXCEPTION_PROLOG - bne load_up_fpu /* if from user, just load it up */ - addir3,r1,STACK_FRAME_OVERHEAD + beq 1f + bl load_up_fpu /* if from user, just load it up */ + b fast_exception_return +1: addir3,r1,STACK_FRAME_OVERHEAD EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception) /* Decrementer */ Index: linux-2.6-ozlabs/arch/powerpc/kernel/head_64.S === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/head_64.S +++ linux-2.6-ozlabs/arch/powerpc/kernel/head_64.S @@ -741,7 +741,8 @@ fp_unavailable_common: ENABLE_INTS bl .kernel_fp_unavailable_exception BUG_OPCODE -1: b .load_up_fpu +1: bl .load_up_fpu + b fast_exception_return .align 7 .globl altivec_unavailable_common @@ -749,7 +750,10 @@ altivec_unavailable_common: EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN) #ifdef CONFIG_ALTIVEC BEGIN_FTR_SECTION - bne .load_up_altivec/* if from user, just load it up */ + beq 1f + bl .load_up_altivec + b fast_exception_return +1: END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) #endif bl .save_nvgprs @@ -829,7 +833,7 @@ _STATIC(load_up_altivec) std r4,0(r3) #endif /* CONFIG_SMP */ /* restore registers and return */ - b fast_exception_return + blr #endif /* CONFIG_ALTIVEC */ /* Index: linux-2.6-ozlabs/arch/powerpc/kernel/head_booke.h === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/head_booke.h +++ linux-2.6-ozlabs/arch/powerpc/kernel/head_booke.h @@ -363,8 +363,10 @@ label: #define FP_UNAVAILABLE_EXCEPTION \ START_EXCEPTION(FloatingPointUnavailable) \ NORMAL_EXCEPTION_PROLOG; \ - bne load_up_fpu;/* if from user, just load it up */ \ - addir3,r1,STACK_FRAME_OVERHEAD; \ + beq 1f; \ + bl load_up_fpu;/* if from user, just load it up */ \ + b fast_exception_return;\ +1: addir3,r1,STACK_FRAME_OVERHEAD; \ EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception) #endif /* __HEAD_BOOKE_H__ */ ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 5/9] powerpc: Introduce VSX thread_struct and CONFIG_VSX
The layout of the new VSR registers and how they overlap on top of the
legacy FPR and VR registers is:
VSR doubleword 0 VSR doubleword 1
VSR[0] | FPR[0]| |
VSR[1] | FPR[1]| |
| ... | |
| ... | |
VSR[30] | FPR[30] | |
VSR[31] | FPR[31] | |
VSR[32] | VR[0]|
VSR[33] | VR[1]|
| ... |
| ... |
VSR[62] | VR[30] |
VSR[63] | VR[31] |
VSX has 64 128bit registers. The first 32 regs overlap with the FP
registers and hence extend them with and additional 64 bits. The
second 32 regs overlap with the VMX registers.
This patch introduces the thread_struct changes required to reflect
this register layout. Ptrace and signals code is updated so that the
floating point registers are correctly accessed from the thread_struct
when CONFIG_VSX is enabled.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
---
arch/powerpc/kernel/asm-offsets.c |4 ++
arch/powerpc/kernel/ptrace.c | 29 ++
arch/powerpc/kernel/signal_32.c | 59 --
arch/powerpc/kernel/signal_64.c | 32 ++--
include/asm-powerpc/processor.h | 18 +--
5 files changed, 121 insertions(+), 21 deletions(-)
Index: linux-2.6-ozlabs/arch/powerpc/kernel/asm-offsets.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/asm-offsets.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/asm-offsets.c
@@ -74,6 +74,10 @@ int main(void)
DEFINE(THREAD_VSCR, offsetof(struct thread_struct, vscr));
DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr));
#endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_VSX
+ DEFINE(THREAD_VSR0, offsetof(struct thread_struct, fpr));
+ DEFINE(THREAD_USED_VSR, offsetof(struct thread_struct, used_vsr));
+#endif /* CONFIG_VSX */
#ifdef CONFIG_PPC64
DEFINE(KSP_VSID, offsetof(struct thread_struct, ksp_vsid));
#else /* CONFIG_PPC64 */
Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c
@@ -215,29 +215,56 @@ static int fpr_get(struct task_struct *t
unsigned int pos, unsigned int count,
void *kbuf, void __user *ubuf)
{
+#ifdef CONFIG_VSX
+ double buf[33];
+ int i;
+#endif
flush_fp_to_thread(target);
+#ifdef CONFIG_VSX
+ /* copy to local buffer then write that out */
+ for (i = 0; i 32 ; i++)
+ buf[i] = target-thread.TS_FPR(i);
+ memcpy(buf[32], target-thread.fpscr, sizeof(double));
+ return user_regset_copyout(pos, count, kbuf, ubuf, buf, 0, -1);
+
+#else
BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
offsetof(struct thread_struct, TS_FPR(32)));
return user_regset_copyout(pos, count, kbuf, ubuf,
target-thread.fpr, 0, -1);
+#endif
}
static int fpr_set(struct task_struct *target, const struct user_regset
*regset,
unsigned int pos, unsigned int count,
const void *kbuf, const void __user *ubuf)
{
+#ifdef CONFIG_VSX
+ double buf[33];
+ int i;
+#endif
flush_fp_to_thread(target);
+#ifdef CONFIG_VSX
+ /* copy to local buffer then write that out */
+ i = user_regset_copyin(pos, count, kbuf, ubuf, buf, 0, -1);
+
[PATCH 7/9] powerpc: Add VSX assembler code macros
This adds the macros for the VSX load/store instruction as most binutils are not going to support this for a while. Also add VSX register save/restore macros and vsr[0-63] register definitions. Signed-off-by: Michael Neuling [EMAIL PROTECTED] --- arch/powerpc/kernel/fpu.S | 23 + include/asm-powerpc/ppc_asm.h | 103 ++ 2 files changed, 126 insertions(+) Index: linux-2.6-ozlabs/arch/powerpc/kernel/fpu.S === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/fpu.S +++ linux-2.6-ozlabs/arch/powerpc/kernel/fpu.S @@ -24,6 +24,29 @@ #include asm/ppc_asm.h #include asm/asm-offsets.h +#ifdef CONFIG_VSX +#define REST_32FPVSRS(n,c,base) \ +BEGIN_FTR_SECTION \ + b 2f; \ +END_FTR_SECTION_IFSET(CPU_FTR_VSX);\ + REST_32FPRS(n,base);\ + b 3f; \ +2: REST_32VSRS(n,c,base); \ +3: + +#define SAVE_32FPVSRS(n,c,base) \ +BEGIN_FTR_SECTION \ + b 2f; \ +END_FTR_SECTION_IFSET(CPU_FTR_VSX);\ + SAVE_32FPRS(n,base);\ + b 3f; \ +2: SAVE_32VSRS(n,c,base); \ +3: +#else +#define REST_32FPVSRS(n,b,base)REST_32FPRS(n, base) +#define SAVE_32FPVSRS(n,b,base)SAVE_32FPRS(n, base) +#endif + /* * This task wants to use the FPU now. * On UP, disable FP for the task which had the FPU previously, Index: linux-2.6-ozlabs/include/asm-powerpc/ppc_asm.h === --- linux-2.6-ozlabs.orig/include/asm-powerpc/ppc_asm.h +++ linux-2.6-ozlabs/include/asm-powerpc/ppc_asm.h @@ -74,6 +74,15 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR); REST_10GPRS(22, base) #endif +/* + * Define what the VSX XX1 form instructions will look like, then add + * the 128 bit load store instructions based on that. + */ +#define VSX_XX1(xs, ra, rb)(((xs) 0x1f) 21 | ((ra) 16) | \ +((rb) 11) | (((xs) 5))) + +#define STXVD2X(xs, ra, rb).long (0x7c000798 | VSX_XX1((xs), (ra), (rb))) +#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb))) #define SAVE_2GPRS(n, base)SAVE_GPR(n, base); SAVE_GPR(n+1, base) #define SAVE_4GPRS(n, base)SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base) @@ -110,6 +119,33 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR); #define REST_16VRS(n,b,base) REST_8VRS(n,b,base); REST_8VRS(n+8,b,base) #define REST_32VRS(n,b,base) REST_16VRS(n,b,base); REST_16VRS(n+16,b,base) +/* Save the lower 32 VSRs in the thread VSR region */ +#define SAVE_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); STXVD2X(n,b,base) +#define SAVE_2VSRS(n,b,base) SAVE_VSR(n,b,base); SAVE_VSR(n+1,b,base) +#define SAVE_4VSRS(n,b,base) SAVE_2VSRS(n,b,base); SAVE_2VSRS(n+2,b,base) +#define SAVE_8VSRS(n,b,base) SAVE_4VSRS(n,b,base); SAVE_4VSRS(n+4,b,base) +#define SAVE_16VSRS(n,b,base) SAVE_8VSRS(n,b,base); SAVE_8VSRS(n+8,b,base) +#define SAVE_32VSRS(n,b,base) SAVE_16VSRS(n,b,base); SAVE_16VSRS(n+16,b,base) +#define REST_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); LXVD2X(n,b,base) +#define REST_2VSRS(n,b,base) REST_VSR(n,b,base); REST_VSR(n+1,b,base) +#define REST_4VSRS(n,b,base) REST_2VSRS(n,b,base); REST_2VSRS(n+2,b,base) +#define REST_8VSRS(n,b,base) REST_4VSRS(n,b,base); REST_4VSRS(n+4,b,base) +#define REST_16VSRS(n,b,base) REST_8VSRS(n,b,base); REST_8VSRS(n+8,b,base) +#define REST_32VSRS(n,b,base) REST_16VSRS(n,b,base); REST_16VSRS(n+16,b,base) +/* Save the upper 32 VSRs (32-63) in the thread VSX region (0-31) */ +#define SAVE_VSRU(n,b,base)li b,THREAD_VR0+(16*(n)); STXVD2X(n+32,b,base) +#define SAVE_2VSRSU(n,b,base) SAVE_VSRU(n,b,base); SAVE_VSRU(n+1,b,base) +#define SAVE_4VSRSU(n,b,base) SAVE_2VSRSU(n,b,base); SAVE_2VSRSU(n+2,b,base) +#define SAVE_8VSRSU(n,b,base) SAVE_4VSRSU(n,b,base); SAVE_4VSRSU(n+4,b,base) +#define SAVE_16VSRSU(n,b,base) SAVE_8VSRSU(n,b,base); SAVE_8VSRSU(n+8,b,base) +#define SAVE_32VSRSU(n,b,base) SAVE_16VSRSU(n,b,base); SAVE_16VSRSU(n+16,b,base) +#define REST_VSRU(n,b,base)li b,THREAD_VR0+(16*(n)); LXVD2X(n+32,b,base) +#define REST_2VSRSU(n,b,base) REST_VSRU(n,b,base); REST_VSRU(n+1,b,base) +#define REST_4VSRSU(n,b,base) REST_2VSRSU(n,b,base); REST_2VSRSU(n+2,b,base) +#define
[PATCH 8/9] powerpc: Add VSX context save/restore, ptrace and signal support
This patch extends the floating point save and restore code to use the VSX load/stores when VSX is available. This will make FP context save/restore marginally slower on FP only code, when VSX is available, as it has to load/store 128bits rather than just 64bits. Mixing FP, VMX and VSX code will get constant architected state. The signals interface is extended to enable access to VSR 0-31 doubleword 1 after discussions with tool chain maintainers. Backward compatibility is maintained. The ptrace interface is also extended to allow access to VSR 0-31 full registers. Signed-off-by: Michael Neuling [EMAIL PROTECTED] --- arch/powerpc/kernel/entry_64.S |5 + arch/powerpc/kernel/fpu.S| 16 - arch/powerpc/kernel/head_64.S| 65 +++ arch/powerpc/kernel/misc_64.S| 33 arch/powerpc/kernel/ppc32.h |1 arch/powerpc/kernel/ppc_ksyms.c |3 + arch/powerpc/kernel/process.c| 107 ++- arch/powerpc/kernel/ptrace.c | 70 + arch/powerpc/kernel/signal_32.c | 33 arch/powerpc/kernel/signal_64.c | 31 ++- arch/powerpc/kernel/traps.c | 29 ++ include/asm-powerpc/elf.h|6 +- include/asm-powerpc/ptrace.h | 12 include/asm-powerpc/reg.h|2 include/asm-powerpc/sigcontext.h | 37 + include/asm-powerpc/system.h |9 +++ 16 files changed, 451 insertions(+), 8 deletions(-) Index: linux-2.6-ozlabs/arch/powerpc/kernel/entry_64.S === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/entry_64.S +++ linux-2.6-ozlabs/arch/powerpc/kernel/entry_64.S @@ -353,6 +353,11 @@ _GLOBAL(_switch) mflrr20 /* Return to switch caller */ mfmsr r22 li r0, MSR_FP +#ifdef CONFIG_VSX +BEGIN_FTR_SECTION + orisr0,r0,[EMAIL PROTECTED] /* Disable VSX */ +END_FTR_SECTION_IFSET(CPU_FTR_VSX) +#endif /* CONFIG_VSX */ #ifdef CONFIG_ALTIVEC BEGIN_FTR_SECTION orisr0,r0,[EMAIL PROTECTED] /* Disable altivec */ Index: linux-2.6-ozlabs/arch/powerpc/kernel/fpu.S === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/fpu.S +++ linux-2.6-ozlabs/arch/powerpc/kernel/fpu.S @@ -57,6 +57,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX); _GLOBAL(load_up_fpu) mfmsr r5 ori r5,r5,MSR_FP +#ifdef CONFIG_VSX +BEGIN_FTR_SECTION + orisr5,r5,[EMAIL PROTECTED] +END_FTR_SECTION_IFSET(CPU_FTR_VSX) +#endif SYNC MTMSRD(r5) /* enable use of fpu now */ isync @@ -73,7 +78,7 @@ _GLOBAL(load_up_fpu) beq 1f toreal(r4) addir4,r4,THREAD/* want last_task_used_math-thread */ - SAVE_32FPRS(0, r4) + SAVE_32FPVSRS(0, r5, r4) mffsfr0 stfdfr0,THREAD_FPSCR(r4) PPC_LL r5,PT_REGS(r4) @@ -100,7 +105,7 @@ _GLOBAL(load_up_fpu) #endif lfd fr0,THREAD_FPSCR(r5) MTFSF_L(fr0) - REST_32FPRS(0, r5) + REST_32FPVSRS(0, r4, r5) #ifndef CONFIG_SMP subir4,r5,THREAD fromreal(r4) @@ -119,6 +124,11 @@ _GLOBAL(load_up_fpu) _GLOBAL(giveup_fpu) mfmsr r5 ori r5,r5,MSR_FP +#ifdef CONFIG_VSX +BEGIN_FTR_SECTION + orisr5,r5,[EMAIL PROTECTED] +END_FTR_SECTION_IFSET(CPU_FTR_VSX) +#endif SYNC_601 ISYNC_601 MTMSRD(r5) /* enable use of fpu now */ @@ -129,7 +139,7 @@ _GLOBAL(giveup_fpu) addir3,r3,THREAD/* want THREAD of task */ PPC_LL r5,PT_REGS(r3) PPC_LCMPI 0,r5,0 - SAVE_32FPRS(0, r3) + SAVE_32FPVSRS(0, r4 ,r3) mffsfr0 stfdfr0,THREAD_FPSCR(r3) beq 1f Index: linux-2.6-ozlabs/arch/powerpc/kernel/head_64.S === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/head_64.S +++ linux-2.6-ozlabs/arch/powerpc/kernel/head_64.S @@ -278,6 +278,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) . = 0xf20 b altivec_unavailable_pSeries + . = 0xf40 + b vsx_unavailable_pSeries + #ifdef CONFIG_CBE_RAS HSTD_EXCEPTION_PSERIES(0x1200, cbe_system_error) #endif /* CONFIG_CBE_RAS */ @@ -297,6 +300,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) /* moved from 0xf00 */ STD_EXCEPTION_PSERIES(., performance_monitor) STD_EXCEPTION_PSERIES(., altivec_unavailable) + STD_EXCEPTION_PSERIES(., vsx_unavailable) /* * An interrupt came in while soft-disabled; clear EE in SRR1, @@ -836,6 +840,67 @@ _STATIC(load_up_altivec) blr #endif /* CONFIG_ALTIVEC */ + .align 7 + .globl vsx_unavailable_common +vsx_unavailable_common: + EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
[PATCH 9/9] powerpc: Add CONFIG_VSX config option
Add CONFIG_VSX config build option. Must compile with POWER4, FPU and ALTIVEC. Signed-off-by: Michael Neuling [EMAIL PROTECTED] --- arch/powerpc/platforms/Kconfig.cputype | 16 1 file changed, 16 insertions(+) Index: linux-2.6-ozlabs/arch/powerpc/platforms/Kconfig.cputype === --- linux-2.6-ozlabs.orig/arch/powerpc/platforms/Kconfig.cputype +++ linux-2.6-ozlabs/arch/powerpc/platforms/Kconfig.cputype @@ -155,6 +155,22 @@ config ALTIVEC If in doubt, say Y here. +config VSX + bool VSX Support + depends on POWER4 ALTIVEC PPC_FPU + ---help--- + + This option enables kernel support for the Vector Scaler extensions + to the PowerPC processor. The kernel currently supports saving and + restoring VSX registers, and turning on the 'VSX enable' bit so user + processes can execute VSX instructions. + + This option is only useful if you have a processor that supports + VSX (P7 and above), but does not have any affect on a non-VSX + CPUs (it does, however add code to the kernel). + + If in doubt, say Y here. + config SPE bool SPE Support depends on E200 || E500 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 6/9] powerpc: Add VSX CPU feature
Add a VSX CPU feature. Also add code to detect if VSX is available
from the device tree.
Signed-off-by: Michael Neuling [EMAIL PROTECTED]
Signed-off-by: Joel Schopp [EMAIL PROTECTED]
---
arch/powerpc/kernel/prom.c |4
include/asm-powerpc/cputable.h | 15 ++-
2 files changed, 18 insertions(+), 1 deletion(-)
Index: linux-2.6-ozlabs/arch/powerpc/kernel/prom.c
===
--- linux-2.6-ozlabs.orig/arch/powerpc/kernel/prom.c
+++ linux-2.6-ozlabs/arch/powerpc/kernel/prom.c
@@ -609,6 +609,10 @@ static struct feature_property {
{altivec, 0, CPU_FTR_ALTIVEC, PPC_FEATURE_HAS_ALTIVEC},
{ibm,vmx, 1, CPU_FTR_ALTIVEC, PPC_FEATURE_HAS_ALTIVEC},
#endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_VSX
+ /* Yes, this _really_ is ibm,vmx == 2 to enable VSX */
+ {ibm,vmx, 2, CPU_FTR_VSX, PPC_FEATURE_HAS_VSX},
+#endif /* CONFIG_VSX */
#ifdef CONFIG_PPC64
{ibm,dfp, 1, 0, PPC_FEATURE_HAS_DFP},
{ibm,purr, 1, CPU_FTR_PURR, 0},
Index: linux-2.6-ozlabs/include/asm-powerpc/cputable.h
===
--- linux-2.6-ozlabs.orig/include/asm-powerpc/cputable.h
+++ linux-2.6-ozlabs/include/asm-powerpc/cputable.h
@@ -27,6 +27,7 @@
#define PPC_FEATURE_HAS_DFP0x0400
#define PPC_FEATURE_POWER6_EXT 0x0200
#define PPC_FEATURE_ARCH_2_06 0x0100
+#define PPC_FEATURE_HAS_VSX0x0080
#define PPC_FEATURE_TRUE_LE0x0002
#define PPC_FEATURE_PPC_LE 0x0001
@@ -181,6 +182,7 @@ extern void do_feature_fixups(unsigned l
#define CPU_FTR_DSCR LONG_ASM_CONST(0x0002)
#define CPU_FTR_1T_SEGMENT LONG_ASM_CONST(0x0004)
#define CPU_FTR_NO_SLBIE_B LONG_ASM_CONST(0x0008)
+#define CPU_FTR_VSXLONG_ASM_CONST(0x0010)
#ifndef __ASSEMBLY__
@@ -199,6 +201,17 @@ extern void do_feature_fixups(unsigned l
#define PPC_FEATURE_HAS_ALTIVEC_COMP0
#endif
+/* We only set the VSX features if the kernel was compiled with VSX
+ * support
+ */
+#ifdef CONFIG_VSX
+#define CPU_FTR_VSX_COMP CPU_FTR_VSX
+#define PPC_FEATURE_HAS_VSX_COMP PPC_FEATURE_HAS_VSX
+#else
+#define CPU_FTR_VSX_COMP 0
+#define PPC_FEATURE_HAS_VSX_COMP0
+#endif
+
/* We only set the spe features if the kernel was compiled with spe
* support
*/
@@ -399,7 +412,7 @@ extern void do_feature_fixups(unsigned l
(CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 |\
CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 | \
CPU_FTRS_POWER7 | CPU_FTRS_CELL | CPU_FTRS_PA6T | \
- CPU_FTR_1T_SEGMENT)
+ CPU_FTR_1T_SEGMENT | CPU_FTR_VSX)
#else
enum {
CPU_FTRS_POSSIBLE =
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
dtc: Use the same endian-conversion functions as libfdt
Currently both libfdt and dtc define a set of endian conversion macros
for accessing the device tree blob which is always big-endian. libfdt
uses names like cpu_to_fdt32() and dtc uses names like cpu_to_be32 (as
the Linux kernel). This patch switches dtc over to using the libfdt
macros (including libfdt_env.h to supply them). This has a couple of
small advantages:
- Removes some code duplication
- Will make conversion a bit easier if we ever need to produce
little-endian device tree blobs.
- dtc no longer needs to pull in netinet/in.h simply for the
ntohs() and ntohl() functions
Signed-off-by: David Gibson [EMAIL PROTECTED]
---
checks.c |2 -
data.c |8 +++
dtc.h| 17 ---
flattree.c | 66 ++-
livetree.c |2 -
treesource.c |2 -
6 files changed, 38 insertions(+), 59 deletions(-)
Index: dtc/dtc.h
===
--- dtc.orig/dtc.h 2008-06-25 14:24:51.0 +1000
+++ dtc/dtc.h 2008-06-25 14:25:35.0 +1000
@@ -30,10 +30,8 @@
#include ctype.h
#include errno.h
#include unistd.h
-#include netinet/in.h
-#include endian.h
-#include byteswap.h
+#include libfdt_env.h
#include fdt.h
#define DEFAULT_FDT_VERSION17
@@ -77,19 +75,6 @@
typedef uint32_t cell_t;
-#define cpu_to_be16(x) htons(x)
-#define be16_to_cpu(x) ntohs(x)
-
-#define cpu_to_be32(x) htonl(x)
-#define be32_to_cpu(x) ntohl(x)
-
-#if __BYTE_ORDER == __BIG_ENDIAN
-#define cpu_to_be64(x) (x)
-#define be64_to_cpu(x) (x)
-#else
-#define cpu_to_be64(x) bswap_64(x)
-#define be64_to_cpu(x) bswap_64(x)
-#endif
#define streq(a, b)(strcmp((a), (b)) == 0)
#define strneq(a, b, n)(strncmp((a), (b), (n)) == 0)
Index: dtc/checks.c
===
--- dtc.orig/checks.c 2008-06-25 14:24:51.0 +1000
+++ dtc/checks.c2008-06-25 14:25:35.0 +1000
@@ -363,7 +363,7 @@
}
phandle = get_node_phandle(dt, refnode);
- *((cell_t *)(prop-val.val + m-offset)) = cpu_to_be32(phandle);
+ *((cell_t *)(prop-val.val + m-offset)) =
cpu_to_fdt32(phandle);
}
}
CHECK(phandle_references, NULL, NULL, fixup_phandle_references, NULL, ERROR,
Index: dtc/flattree.c
===
--- dtc.orig/flattree.c 2008-06-25 14:24:51.0 +1000
+++ dtc/flattree.c 2008-06-25 14:25:35.0 +1000
@@ -170,17 +170,11 @@
while ((d.len - off) = sizeof(uint32_t)) {
fprintf(f, \t.long\t0x%x\n,
- be32_to_cpu(*((uint32_t *)(d.val+off;
+ fdt32_to_cpu(*((uint32_t *)(d.val+off;
off += sizeof(uint32_t);
}
- if ((d.len - off) = sizeof(uint16_t)) {
- fprintf(f, \t.short\t0x%hx\n,
- be16_to_cpu(*((uint16_t *)(d.val+off;
- off += sizeof(uint16_t);
- }
-
- if ((d.len - off) = 1) {
+ while ((d.len - off) = 1) {
fprintf(f, \t.byte\t0x%hhx\n, d.val[off]);
off += 1;
}
@@ -333,25 +327,25 @@
memset(fdt, 0xff, sizeof(*fdt));
- fdt-magic = cpu_to_be32(FDT_MAGIC);
- fdt-version = cpu_to_be32(vi-version);
- fdt-last_comp_version = cpu_to_be32(vi-last_comp_version);
+ fdt-magic = cpu_to_fdt32(FDT_MAGIC);
+ fdt-version = cpu_to_fdt32(vi-version);
+ fdt-last_comp_version = cpu_to_fdt32(vi-last_comp_version);
/* Reserve map should be doubleword aligned */
reserve_off = ALIGN(vi-hdr_size, 8);
- fdt-off_mem_rsvmap = cpu_to_be32(reserve_off);
- fdt-off_dt_struct = cpu_to_be32(reserve_off + reservesize);
- fdt-off_dt_strings = cpu_to_be32(reserve_off + reservesize
+ fdt-off_mem_rsvmap = cpu_to_fdt32(reserve_off);
+ fdt-off_dt_struct = cpu_to_fdt32(reserve_off + reservesize);
+ fdt-off_dt_strings = cpu_to_fdt32(reserve_off + reservesize
+ dtsize);
- fdt-totalsize = cpu_to_be32(reserve_off + reservesize + dtsize +
strsize);
+ fdt-totalsize = cpu_to_fdt32(reserve_off + reservesize + dtsize +
strsize);
if (vi-flags FTF_BOOTCPUID)
- fdt-boot_cpuid_phys = cpu_to_be32(boot_cpuid_phys);
+ fdt-boot_cpuid_phys = cpu_to_fdt32(boot_cpuid_phys);
if (vi-flags FTF_STRTABSIZE)
- fdt-size_dt_strings = cpu_to_be32(strsize);
+ fdt-size_dt_strings = cpu_to_fdt32(strsize);
if (vi-flags FTF_STRUCTSIZE)
- fdt-size_dt_struct = cpu_to_be32(dtsize);
+ fdt-size_dt_struct = cpu_to_fdt32(dtsize);
}
void dt_to_blob(FILE *f, struct boot_info *bi, int version)
@@ -385,20 +379,20 @@
* If the user asked for more
