How to use mpic timer of mpc8640d

2009-12-02 Thread Thirumalai

Hi kumar,
   I just want to know how to use the global timer of the MPC8640D on linux 
environment. I am having a Freescale HPCN evaluation board on which 
linux-2.6.21 kernel is running. How to use the timer.


Thank you
T. 


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[v10 PATCH 0/9] cpuidle: cleanup cpuidle/ introduce cpuidle to POWER

2009-12-02 Thread Arun R Bharadwaj
Hi,

This patchset introduces cpuidle infrastructure to POWER, prototyping
for pSeries, and also does a major refactoring of current x86 idle
power management and a cleanup of cpuidle infrastructure.

This patch series has been in discussion for quite a while now and
below are the links to the previous discussions.

Please consider this for inclusion into the -tip tree.

v9 -- http://lkml.org/lkml/2009/10/16/63
v8 -- http://lkml.org/lkml/2009/10/8/82
v7 -- http://lkml.org/lkml/2009/10/6/278
v6 -- http://lkml.org/lkml/2009/9/22/180
v5 -- http://lkml.org/lkml/2009/9/22/26
v4 -- http://lkml.org/lkml/2009/9/1/133
v3 -- http://lkml.org/lkml/2009/8/27/124
v2 -- http://lkml.org/lkml/2009/8/26/233
v1 -- http://lkml.org/lkml/2009/8/19/150


Change in this version:

Pavel noticed that the code which calls the cpuidle's idle
loop was repeated at many places. So this set optimizes it so
that we dont have repetition of code. The rest of the patches
are same as the earlier iteration.


arun
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[v10 PATCH 1/9]: cpuidle: Design documentation patch

2009-12-02 Thread Arun R Bharadwaj
* Arun R Bharadwaj a...@linux.vnet.ibm.com [2009-12-02 15:24:27]:

This patch adds a little information about the redesigned cpuidle
infrastructure in Documentation/cpuidle/core.txt

Signed-off-by: Arun R Bharadwaj a...@linux.vnet.ibm.com
---
 Documentation/cpuidle/core.txt |   35 +++
 1 file changed, 35 insertions(+)

Index: linux.trees.git/Documentation/cpuidle/core.txt
===
--- linux.trees.git.orig/Documentation/cpuidle/core.txt
+++ linux.trees.git/Documentation/cpuidle/core.txt
@@ -21,3 +21,38 @@ which can be used to switch governors at
 is meant for developer testing only. In normal usage, kernel picks the
 best governor based on governor ratings.
 SEE ALSO: sysfs.txt in this directory.
+
+Design:
+
+Cpuidle allows for registration of multiple sets of idle routines.
+The latest registered set is used by cpuidle governors as the current
+active set to choose the right idle state. This set is managed as a
+list and each time the newly registered set is added to the head of the
+list and made the current active set.
+
+An example of how this would work on x86 is shown below.
+
+-  -
+|  |   |   |
+| choose b/w   |   mwait is chosen |mwait  |
+| mwait, poll, |- |(current active|
+| default, c1e |   register to cpuidle |set)   |
+|  |   with mwait as the idle routine  |   |
+-  -
+
+
+-  -
+|  |   |  c1, c2, c3   |
+| ACPI |   register to cpuidle |   (current)   |
+|   discovery  |- |---|
+|  |   with c1, c2, c3 | mwait |
+|  |   as set of idle routines |   |
+-  -
+
+With this mechanism, a module can register and unregister its set of
+idle routines at run time in a clean manner.
+
+The main idle routine called inside cpu_idle() of every arch is defined in
+driver/cpuidle/cpuidle.c which would in turn call the idle routine selected
+by the governor. If the CONFIG_CPU_IDLE is disabled, the arch needs to
+provide an alternate definition for cpuidle_idle_call().
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[v10 PATCH 4/9]: x86: refactor x86 idle power management code, remove all instances of pm_idle

2009-12-02 Thread Arun R Bharadwaj
* Arun R Bharadwaj a...@linux.vnet.ibm.com [2009-12-02 15:24:27]:

This patch cleans up x86 of all instances of pm_idle.

pm_idle which was earlier called from cpu_idle() idle loop
is replaced by cpuidle_idle_call.

x86 also registers to cpuidle when the idle routine is selected,
by populating the cpuidle_device data structure for each cpu.

This is replicated for apm module and for xen, which also used pm_idle.


Signed-off-by: Arun R Bharadwaj a...@linux.vnet.ibm.com
---
 arch/x86/kernel/apm_32.c  |   46 +++-
 arch/x86/kernel/process.c |   78 +++---
 arch/x86/kernel/process_32.c  |3 +
 arch/x86/kernel/process_64.c  |3 +
 arch/x86/xen/setup.c  |   30 +++-
 drivers/acpi/processor_core.c |9 +++-
 drivers/acpi/processor_idle.c |   44 ++-
 7 files changed, 160 insertions(+), 53 deletions(-)

Index: linux.trees.git/arch/x86/kernel/process.c
===
--- linux.trees.git.orig/arch/x86/kernel/process.c
+++ linux.trees.git/arch/x86/kernel/process.c
@@ -10,6 +10,7 @@
 #include linux/clockchips.h
 #include linux/random.h
 #include linux/user-return-notifier.h
+#include linux/cpuidle.h
 #include trace/events/power.h
 #include linux/hw_breakpoint.h
 #include asm/system.h
@@ -241,12 +242,6 @@ int sys_vfork(struct pt_regs *regs)
 unsigned long boot_option_idle_override = 0;
 EXPORT_SYMBOL(boot_option_idle_override);
 
-/*
- * Powermanagement idle function, if any..
- */
-void (*pm_idle)(void);
-EXPORT_SYMBOL(pm_idle);
-
 #ifdef CONFIG_X86_32
 /*
  * This halt magic was a workaround for ancient floppy DMA
@@ -326,17 +321,15 @@ static void do_nothing(void *unused)
 }
 
 /*
- * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
- * pm_idle and update to new pm_idle value. Required while changing pm_idle
- * handler on SMP systems.
+ * cpu_idle_wait - Required while changing idle routine handler on SMP systems.
  *
- * Caller must have changed pm_idle to the new value before the call. Old
- * pm_idle value will not be used by any CPU after the return of this function.
+ * Caller must have changed idle routine to the new value before the call. Old
+ * value will not be used by any CPU after the return of this function.
  */
 void cpu_idle_wait(void)
 {
smp_mb();
-   /* kick all the CPUs so that they exit out of pm_idle */
+   /* kick all the CPUs so that they exit out of idle loop */
smp_call_function(do_nothing, NULL, 1);
 }
 EXPORT_SYMBOL_GPL(cpu_idle_wait);
@@ -515,15 +508,58 @@ static void c1e_idle(void)
default_idle();
 }
 
+static void (*local_idle)(void);
+
+#ifndef CONFIG_CPU_IDLE
+void cpuidle_idle_call(void)
+{
+   if (local_idle)
+   local_idle();
+   else
+   default_idle();
+}
+#endif
+
+DEFINE_PER_CPU(struct cpuidle_device, idle_devices);
+
+struct cpuidle_driver cpuidle_default_driver = {
+   .name = cpuidle_default,
+};
+
+static void local_idle_loop(struct cpuidle_device *dev,
+   struct cpuidle_state *st)
+{
+   local_idle();
+}
+
+static int setup_cpuidle_simple(void)
+{
+   struct cpuidle_device *dev;
+   int cpu;
+
+   if (!cpuidle_curr_driver)
+   cpuidle_register_driver(cpuidle_default_driver);
+
+   for_each_online_cpu(cpu) {
+   dev = per_cpu(idle_devices, cpu);
+   dev-cpu = cpu;
+   dev-states[0].enter = local_idle_loop;
+   dev-state_count = 1;
+   cpuidle_register_device(dev);
+   }
+   return 0;
+}
+device_initcall(setup_cpuidle_simple);
+
 void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_SMP
-   if (pm_idle == poll_idle  smp_num_siblings  1) {
+   if (local_idle == poll_idle  smp_num_siblings  1) {
printk(KERN_WARNING WARNING: polling idle and HT enabled,
 performance may degrade.\n);
}
 #endif
-   if (pm_idle)
+   if (local_idle)
return;
 
if (cpu_has(c, X86_FEATURE_MWAIT)  mwait_usable(c)) {
@@ -531,18 +567,20 @@ void __cpuinit select_idle_routine(const
 * One CPU supports mwait = All CPUs supports mwait
 */
printk(KERN_INFO using mwait in idle threads.\n);
-   pm_idle = mwait_idle;
+   local_idle = mwait_idle;
} else if (check_c1e_idle(c)) {
printk(KERN_INFO using C1E aware idle routine\n);
-   pm_idle = c1e_idle;
+   local_idle = c1e_idle;
} else
-   pm_idle = default_idle;
+   local_idle = default_idle;
+
+   return;
 }
 
 void __init init_c1e_mask(void)
 {
/* If we're using c1e_idle, we need to allocate c1e_mask. */
-   if (pm_idle == c1e_idle)
+   if (local_idle == c1e_idle)

[v10 PATCH 5/9]: POWER: enable cpuidle for POWER.

2009-12-02 Thread Arun R Bharadwaj
* Arun R Bharadwaj a...@linux.vnet.ibm.com [2009-12-02 15:24:27]:

This patch enables the cpuidle option in Kconfig for pSeries.

Currently cpuidle infrastructure is enabled only for x86 and ARM.
This code is almost completely borrowed from x86 to enable
cpuidle for pSeries.

Signed-off-by: Arun R Bharadwaj a...@linux.vnet.ibm.com
---
 arch/powerpc/Kconfig  |9 +
 arch/powerpc/include/asm/system.h |2 ++
 arch/powerpc/kernel/idle.c|   19 +++
 3 files changed, 30 insertions(+)

Index: linux.trees.git/arch/powerpc/Kconfig
===
--- linux.trees.git.orig/arch/powerpc/Kconfig
+++ linux.trees.git/arch/powerpc/Kconfig
@@ -91,6 +91,9 @@ config ARCH_HAS_ILOG2_U64
bool
default y if 64BIT
 
+config ARCH_HAS_CPU_IDLE_WAIT
+   def_bool y
+
 config GENERIC_HWEIGHT
bool
default y
@@ -247,6 +250,12 @@ source kernel/Kconfig.freezer
 source arch/powerpc/sysdev/Kconfig
 source arch/powerpc/platforms/Kconfig
 
+menu Power management options
+
+source drivers/cpuidle/Kconfig
+
+endmenu
+
 menu Kernel options
 
 config HIGHMEM
Index: linux.trees.git/arch/powerpc/include/asm/system.h
===
--- linux.trees.git.orig/arch/powerpc/include/asm/system.h
+++ linux.trees.git/arch/powerpc/include/asm/system.h
@@ -546,5 +546,7 @@ extern void account_system_vtime(struct 
 
 extern struct dentry *powerpc_debugfs_root;
 
+void cpu_idle_wait(void);
+
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_SYSTEM_H */
Index: linux.trees.git/arch/powerpc/kernel/idle.c
===
--- linux.trees.git.orig/arch/powerpc/kernel/idle.c
+++ linux.trees.git/arch/powerpc/kernel/idle.c
@@ -102,6 +102,25 @@ void cpu_idle(void)
}
 }
 
+static void do_nothing(void *unused)
+{
+}
+
+/*
+ * cpu_idle_wait - Used to ensure that all the CPUs come out of the old
+ * idle loop and start using the new idle loop.
+ * Required while changing idle handler on SMP systems.
+ * Caller must have changed idle handler to the new value before the call.
+ */
+void cpu_idle_wait(void)
+{
+   /* Ensure that new value of idle is set */
+   smp_mb();
+   /* kick all the CPUs so that they exit out of old idle routine */
+   smp_call_function(do_nothing, NULL, 1);
+}
+EXPORT_SYMBOL_GPL(cpu_idle_wait);
+
 int powersave_nap;
 
 #ifdef CONFIG_SYSCTL
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[v10 PATCH 6/9]: pSeries/cpuidle: refactor pseries idle loops

2009-12-02 Thread Arun R Bharadwaj
* Arun R Bharadwaj a...@linux.vnet.ibm.com [2009-12-02 15:24:27]:

This patch removes the routines, pseries_shared_idle_sleep and
pseries_dedicated_idle_sleep, since this is implemented as a part
of arch/powerpc/platform/pseries/processor_idle.c

Also, similar to x86, call cpuidle_idle_call from cpu_idle() idle
loop instead of ppc_md.power_save.


Signed-off-by: Arun R Bharadwaj a...@linux.vnet.ibm.com
---
 arch/powerpc/kernel/idle.c |   58 ++---
 arch/powerpc/platforms/pseries/setup.c |   89 -
 2 files changed, 30 insertions(+), 117 deletions(-)

Index: linux.trees.git/arch/powerpc/platforms/pseries/setup.c
===
--- linux.trees.git.orig/arch/powerpc/platforms/pseries/setup.c
+++ linux.trees.git/arch/powerpc/platforms/pseries/setup.c
@@ -75,9 +75,6 @@ EXPORT_SYMBOL(CMO_PageSize);
 
 int fwnmi_active;  /* TRUE if an FWNMI handler is present */
 
-static void pseries_shared_idle_sleep(void);
-static void pseries_dedicated_idle_sleep(void);
-
 static struct device_node *pSeries_mpic_node;
 
 static void pSeries_show_cpuinfo(struct seq_file *m)
@@ -297,18 +294,8 @@ static void __init pSeries_setup_arch(vo
pSeries_nvram_init();
 
/* Choose an idle loop */
-   if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
+   if (firmware_has_feature(FW_FEATURE_SPLPAR))
vpa_init(boot_cpuid);
-   if (get_lppaca()-shared_proc) {
-   printk(KERN_DEBUG Using shared processor idle loop\n);
-   ppc_md.power_save = pseries_shared_idle_sleep;
-   } else {
-   printk(KERN_DEBUG Using dedicated idle loop\n);
-   ppc_md.power_save = pseries_dedicated_idle_sleep;
-   }
-   } else {
-   printk(KERN_DEBUG Using default idle loop\n);
-   }
 
if (firmware_has_feature(FW_FEATURE_LPAR))
ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
@@ -496,80 +483,6 @@ static int __init pSeries_probe(void)
return 1;
 }
 
-
-DECLARE_PER_CPU(unsigned long, smt_snooze_delay);
-
-static void pseries_dedicated_idle_sleep(void)
-{ 
-   unsigned int cpu = smp_processor_id();
-   unsigned long start_snooze;
-   unsigned long in_purr, out_purr;
-
-   /*
-* Indicate to the HV that we are idle. Now would be
-* a good time to find other work to dispatch.
-*/
-   get_lppaca()-idle = 1;
-   get_lppaca()-donate_dedicated_cpu = 1;
-   in_purr = mfspr(SPRN_PURR);
-
-   /*
-* We come in with interrupts disabled, and need_resched()
-* has been checked recently.  If we should poll for a little
-* while, do so.
-*/
-   if (__get_cpu_var(smt_snooze_delay)) {
-   start_snooze = get_tb() +
-   __get_cpu_var(smt_snooze_delay) * tb_ticks_per_usec;
-   local_irq_enable();
-   set_thread_flag(TIF_POLLING_NRFLAG);
-
-   while (get_tb()  start_snooze) {
-   if (need_resched() || cpu_is_offline(cpu))
-   goto out;
-   ppc64_runlatch_off();
-   HMT_low();
-   HMT_very_low();
-   }
-
-   HMT_medium();
-   clear_thread_flag(TIF_POLLING_NRFLAG);
-   smp_mb();
-   local_irq_disable();
-   if (need_resched() || cpu_is_offline(cpu))
-   goto out;
-   }
-
-   cede_processor();
-
-out:
-   HMT_medium();
-   out_purr = mfspr(SPRN_PURR);
-   get_lppaca()-wait_state_cycles += out_purr - in_purr;
-   get_lppaca()-donate_dedicated_cpu = 0;
-   get_lppaca()-idle = 0;
-}
-
-static void pseries_shared_idle_sleep(void)
-{
-   /*
-* Indicate to the HV that we are idle. Now would be
-* a good time to find other work to dispatch.
-*/
-   get_lppaca()-idle = 1;
-
-   /*
-* Yield the processor to the hypervisor.  We return if
-* an external interrupt occurs (which are driven prior
-* to returning here) or if a prod occurs from another
-* processor. When returning here, external interrupts
-* are enabled.
-*/
-   cede_processor();
-
-   get_lppaca()-idle = 0;
-}
-
 static int pSeries_pci_probe_mode(struct pci_bus *bus)
 {
if (firmware_has_feature(FW_FEATURE_LPAR))
Index: linux.trees.git/arch/powerpc/kernel/idle.c
===
--- linux.trees.git.orig/arch/powerpc/kernel/idle.c
+++ linux.trees.git/arch/powerpc/kernel/idle.c
@@ -25,6 +25,7 @@
 #include linux/cpu.h
 #include linux/sysctl.h
 #include linux/tick.h
+#include linux/cpuidle.h
 
 #include asm/system.h
 #include asm/processor.h
@@ -46,6 +47,14 @@ static int __init powersave_off(char *ar
 }
 

[v10 PATCH 7/9]: POWER: add a default_idle idle loop for POWER

2009-12-02 Thread Arun R Bharadwaj
* Arun R Bharadwaj a...@linux.vnet.ibm.com [2009-12-02 15:24:27]:

In arch/powerpc/kernel/idle.c create a default_idle() routine by moving
the failover condition of the cpu_idle() idle loop. This is needed by
cpuidle infrastructure to call default_idle when other idle routines
are not yet registered. Functionality remains the same, but the code is
slightly moved around.


Signed-off-by: Arun R Bharadwaj a...@linux.vnet.ibm.com
---
 arch/powerpc/Kconfig  |3 +++
 arch/powerpc/include/asm/system.h |1 +
 arch/powerpc/kernel/idle.c|6 ++
 3 files changed, 10 insertions(+)

Index: linux.trees.git/arch/powerpc/Kconfig
===
--- linux.trees.git.orig/arch/powerpc/Kconfig
+++ linux.trees.git/arch/powerpc/Kconfig
@@ -94,6 +94,9 @@ config ARCH_HAS_ILOG2_U64
 config ARCH_HAS_CPU_IDLE_WAIT
def_bool y
 
+config ARCH_HAS_DEFAULT_IDLE
+   def_bool y
+
 config GENERIC_HWEIGHT
bool
default y
Index: linux.trees.git/arch/powerpc/include/asm/system.h
===
--- linux.trees.git.orig/arch/powerpc/include/asm/system.h
+++ linux.trees.git/arch/powerpc/include/asm/system.h
@@ -218,6 +218,7 @@ extern unsigned long klimit;
 extern void *alloc_maybe_bootmem(size_t size, gfp_t mask);
 extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
 
+extern void default_idle(void);
 extern int powersave_nap;  /* set if nap mode can be used in idle loop */
 
 /*
Index: linux.trees.git/arch/powerpc/kernel/idle.c
===
--- linux.trees.git.orig/arch/powerpc/kernel/idle.c
+++ linux.trees.git/arch/powerpc/kernel/idle.c
@@ -121,6 +121,12 @@ void cpu_idle_wait(void)
 }
 EXPORT_SYMBOL_GPL(cpu_idle_wait);
 
+void default_idle(void)
+{
+   HMT_low();
+   HMT_very_low();
+}
+
 int powersave_nap;
 
 #ifdef CONFIG_SYSCTL
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[v10 PATCH 8/9]: pSeries: implement pSeries processor idle module

2009-12-02 Thread Arun R Bharadwaj
* Arun R Bharadwaj a...@linux.vnet.ibm.com [2009-12-02 15:24:27]:

This patch creates arch/powerpc/platforms/pseries/processor_idle.c,
which implements the cpuidle infrastructure for pseries.
It implements a pseries_cpuidle_loop() which would be the main idle loop
called from cpu_idle(). It makes decision of entering either
dedicated_snooze_loop or dedicated_cede_loop for dedicated lpar and
shared_cede_loop for shared lpar processor based on the
decision taken by the cpuidle governor.

Signed-off-by: Arun R Bharadwaj a...@linux.vnet.ibm.com
---
 arch/powerpc/include/asm/system.h   |6 
 arch/powerpc/kernel/sysfs.c |2 
 arch/powerpc/platforms/pseries/Makefile |1 
 arch/powerpc/platforms/pseries/processor_idle.c |  196 
 arch/powerpc/platforms/pseries/pseries.h|6 
 5 files changed, 211 insertions(+)

Index: linux.trees.git/arch/powerpc/platforms/pseries/Makefile
===
--- linux.trees.git.orig/arch/powerpc/platforms/pseries/Makefile
+++ linux.trees.git/arch/powerpc/platforms/pseries/Makefile
@@ -26,3 +26,4 @@ obj-$(CONFIG_HCALL_STATS) += hvCall_inst
 obj-$(CONFIG_PHYP_DUMP)+= phyp_dump.o
 obj-$(CONFIG_CMM)  += cmm.o
 obj-$(CONFIG_DTL)  += dtl.o
+obj-$(CONFIG_CPU_IDLE) += processor_idle.o
Index: linux.trees.git/arch/powerpc/platforms/pseries/pseries.h
===
--- linux.trees.git.orig/arch/powerpc/platforms/pseries/pseries.h
+++ linux.trees.git/arch/powerpc/platforms/pseries/pseries.h
@@ -10,6 +10,8 @@
 #ifndef _PSERIES_PSERIES_H
 #define _PSERIES_PSERIES_H
 
+#include linux/cpuidle.h
+
 extern void __init fw_feature_init(const char *hypertas, unsigned long len);
 
 struct pt_regs;
@@ -40,4 +42,8 @@ extern unsigned long rtas_poweron_auto;
 
 extern void find_udbg_vterm(void);
 
+DECLARE_PER_CPU(unsigned long, smt_snooze_delay);
+
+extern struct cpuidle_driver pseries_idle_driver;
+
 #endif /* _PSERIES_PSERIES_H */
Index: linux.trees.git/arch/powerpc/platforms/pseries/processor_idle.c
===
--- /dev/null
+++ linux.trees.git/arch/powerpc/platforms/pseries/processor_idle.c
@@ -0,0 +1,196 @@
+/*
+ *  processor_idle - idle state cpuidle driver.
+ *  Adapted from drivers/acpi/processor_idle.c
+ *
+ *  Arun R Bharadwaj a...@linux.vnet.ibm.com
+ *
+ *  Copyright (C) 2009 IBM Corporation.
+ * ~~
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or (at
+ *  your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful, but
+ *  WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+ *
+ * ~~
+ */
+
+#include linux/kernel.h
+#include linux/module.h
+#include linux/init.h
+#include linux/moduleparam.h
+#include linux/cpuidle.h
+
+#include asm/paca.h
+#include asm/reg.h
+#include asm/system.h
+#include asm/machdep.h
+#include asm/firmware.h
+
+#include plpar_wrappers.h
+#include pseries.h
+
+MODULE_AUTHOR(Arun R Bharadwaj);
+MODULE_DESCRIPTION(pSeries Idle State Driver);
+MODULE_LICENSE(GPL);
+
+struct cpuidle_driver pseries_idle_driver = {
+   .name = pseries_idle,
+   .owner =THIS_MODULE,
+};
+
+DEFINE_PER_CPU(struct cpuidle_device, pseries_dev);
+
+#define IDLE_STATE_COUNT   2
+
+/* pSeries Idle state Flags */
+#definePSERIES_DEDICATED_SNOOZE(0x01)
+#definePSERIES_DEDICATED_CEDE  (0x02)
+#definePSERIES_SHARED_CEDE (0x03)
+
+static int pseries_idle_init(struct cpuidle_device *dev)
+{
+   return cpuidle_register_device(dev);
+}
+
+static void shared_cede_loop(void)
+{
+   get_lppaca()-idle = 1;
+   cede_processor();
+   get_lppaca()-idle = 0;
+}
+
+static void dedicated_snooze_loop(void)
+{
+   local_irq_enable();
+   set_thread_flag(TIF_POLLING_NRFLAG);
+   while (!need_resched()) {
+   ppc64_runlatch_off();
+   HMT_low();
+   HMT_very_low();
+   }
+   HMT_medium();
+   clear_thread_flag(TIF_POLLING_NRFLAG);
+   smp_mb();
+   local_irq_disable();
+}
+
+static void dedicated_cede_loop(void)
+{
+   ppc64_runlatch_off();
+   HMT_medium();
+   cede_processor();

[v10 PATCH 9/9]: POWER: Enable default_idle when power_save=off

2009-12-02 Thread Arun R Bharadwaj
* Arun R Bharadwaj a...@linux.vnet.ibm.com [2009-12-02 15:24:27]:

This patch enables default_idle when power_save=off kernel boot
option is specified.

Earlier, this was done by setting ppc_md.power_save = NULL and hence
HMT_low() and HMT_very_low() was called. Now this is defined under
default_idle() and hence by setting boot_option_idle_override = 1,
the cpuidle registration stuff does not happen and hence default_idle
is chosen in cpuidle_idle_call.

Signed-off-by: Arun R Bharadwaj a...@linux.vnet.ibm.com
---
 arch/powerpc/include/asm/processor.h|2 ++
 arch/powerpc/kernel/idle.c  |4 +++-
 arch/powerpc/platforms/pseries/processor_idle.c |5 +
 3 files changed, 10 insertions(+), 1 deletion(-)

Index: linux.trees.git/arch/powerpc/include/asm/processor.h
===
--- linux.trees.git.orig/arch/powerpc/include/asm/processor.h
+++ linux.trees.git/arch/powerpc/include/asm/processor.h
@@ -332,6 +332,8 @@ static inline unsigned long get_clean_sp
 }
 #endif
 
+extern int boot_option_idle_override;
+
 #endif /* __KERNEL__ */
 #endif /* __ASSEMBLY__ */
 #endif /* _ASM_POWERPC_PROCESSOR_H */
Index: linux.trees.git/arch/powerpc/kernel/idle.c
===
--- linux.trees.git.orig/arch/powerpc/kernel/idle.c
+++ linux.trees.git/arch/powerpc/kernel/idle.c
@@ -40,9 +40,11 @@
 #define cpu_should_die()   0
 #endif
 
+int boot_option_idle_override = 0;
+
 static int __init powersave_off(char *arg)
 {
-   ppc_md.power_save = NULL;
+   boot_option_idle_override = 1;
return 0;
 }
 __setup(powersave=off, powersave_off);
Index: linux.trees.git/arch/powerpc/platforms/pseries/processor_idle.c
===
--- linux.trees.git.orig/arch/powerpc/platforms/pseries/processor_idle.c
+++ linux.trees.git/arch/powerpc/platforms/pseries/processor_idle.c
@@ -171,6 +171,11 @@ static int __init pseries_processor_idle
int cpu;
int result;
 
+   if (boot_option_idle_override) {
+   printk(KERN_DEBUG Using default idle\n);
+   return 0;
+   }
+
result = cpuidle_register_driver(pseries_idle_driver);
 
if (result  0)
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Re: [PATCH 5/5] libata/drivers: Add pata_macio, driver Apple PowerMac/PowerBook IDE controller

2009-12-02 Thread Andreas Schwab
Benjamin Herrenschmidt b...@kernel.crashing.org writes:

 v2. Better tested now, seems to be reasonably solid.

 Addressed Tejun comments and made remove more robust vs. media-bay,
 should also fix Andreas problem.

Thanks, this works fine now, including suspend *and* resume. :-)

Andreas.

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GPG Key fingerprint = 58CA 54C7 6D53 942B 1756  01D3 44D5 214B 8276 4ED5
And now for something completely different.
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Re: [PATCH 3/5] powerpc/macio: Rework hotplug media bay support

2009-12-02 Thread Sergei Shtylyov

Hello.

Benjamin Herrenschmidt wrote:


The hotplug mediabay has tendrils deep into drivers/ide code
which makes a libata port reather difficult. In addition it's
ugly and could be done better.

This reworks the interface between the mediabay and the rest
of the world so that:

   - Any macio_driver can now have a mediabay_event callback
which will be called when that driver sits on a mediabay and
it's been either plugged or unplugged. The device type is
passed as an argument. We can now move all the IDE cruft
into the IDE driver itself

   - A check_media_bay() function can be used to take a peek
at the type of device currently in the bay if any, a cleaner
variant of the previous function with the same name.

   - A pair of lock/unlock functions are exposed to allow the
IDE driver to block the hotplug callbacks during the initial
setup and probing of the bay in order to avoid nasty race
conditions.

   - The mediabay code no longer needs to spin on the status
register of the IDE interface when it detects an IDE device,
this is done just fine by the IDE code itself

Overall, less code, simpler, and allows for another driver
than our old drivers/ide based one.

Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
  


  Some grammar/style nitpicking...


Index: linux-work/arch/powerpc/include/asm/mediabay.h
===
--- linux-work.orig/arch/powerpc/include/asm/mediabay.h 2009-12-01 
17:57:00.0 +1100
+++ linux-work/arch/powerpc/include/asm/mediabay.h  2009-12-01 
18:00:28.0 +1100
@@ -17,26 +17,31 @@
 #define MB_POWER   6   /* media bay contains a Power device (???) */
 #define MB_NO  7   /* media bay contains nothing */
 
-/* Number of bays in the machine or 0 */

-extern int media_bay_count;
+struct macio_dev;
 
-#ifdef CONFIG_BLK_DEV_IDE_PMAC

-#include linux/ide.h
+#ifdef CONFIG_PMAC_MEDIABAY
 
-int check_media_bay_by_base(unsigned long base, int what);

-/* called by IDE PMAC host driver to register IDE controller for media bay */
-int media_bay_set_ide_infos(struct device_node *which_bay, unsigned long base,
-   int irq, ide_hwif_t *hwif);
-
-int check_media_bay(struct device_node *which_bay, int what);
+/* Check the content type of the bay, returns MB_NO if the bay is still
+ * transitionning
+ */
  


  Only transitioning.

 
-int check_media_bay_by_base(unsigned long base, int what)

+int check_media_bay(struct macio_dev *baydev)
 {
-   int i;
+   struct media_bay_info* bay;
+   int id;
 
-	for (i=0; imedia_bay_count; i++)

-   if (media_bays[i].mdev  base == (unsigned long) 
media_bays[i].cd_base) {
-   if ((what == media_bays[i].content_id)  
media_bays[i].state == mb_up)
-   return 0;
-   media_bays[i].cd_index = -1;
-   return -EINVAL;
-		} 
+	if (baydev == NULL)

+   return MB_NO;
 
-	return -ENODEV;

+   /* This returns an instant snapshot, not locking, sine
  


  Only since.


Index: linux-work/drivers/block/swim3.c
===
--- linux-work.orig/drivers/block/swim3.c   2009-12-01 17:57:00.0 
+1100
+++ linux-work/drivers/block/swim3.c2009-12-01 18:00:28.0 +1100
  

[...]

@@ -303,14 +303,13 @@ static int swim3_readbit(struct floppy_s
 static void do_fd_request(struct request_queue * q)
 {
int i;
-   for(i=0;ifloppy_count;i++)
-   {
-#ifdef CONFIG_PMAC_MEDIABAY
-   if (floppy_states[i].media_bay 
-   check_media_bay(floppy_states[i].media_bay, MB_FD))
+
+   for(i=0; ifloppy_count; i++) {
  


  You could insert spaces around operators here, while at it...

MBR, Sergei


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MPC8640D second core initialization

2009-12-02 Thread Thirumalai

Hi Kumar,
   I am using 2009-06 u-boot for MPC8640D based custom board. I just 
want to know whether the second core of MPC8640D is kicked off automatically 
or will it required by the user to kick[like mpc85xx/mp.c].  Also if am 
enabling the CONFIG_MP macro and  CONFIG_NUM_CPUS as 2, then the reset 
command of the target is not  working(means board is getting hanged). I have 
mentioned the value of CONFIG_SYS_SCRATCH_VA as 0xf500.



Also when i try to boot linux using this configuration i was getting into 
kernel panic.


## Current stack ends at 0x3fa91a08
## Booting kernel from Legacy Image at 0040 ...
  Image Name:   Linux-2.6.30-dpvpx0689
  Created:  2009-12-01   4:45:09 UTC
  Image Type:   PowerPC Linux Kernel Image (gzip compressed)
  Data Size:2307361 Bytes =  2.2 MB
  Load Address: 
  Entry Point:  
  Verifying Checksum ... OK
## Flattened Device Tree blob at 0400
  Booting using the fdt blob at 0x400
  Uncompressing Kernel Image ... OK
  Loading Device Tree to 007fa000, end 007ff150 ... OK
## Transferring control to Linux (at address ) ...
  Booting using OF flat tree...
Using DPVPX0689 machine description
Total memory = 1024MB; using 2048kB for hash table (at afe0)
Linux version 2.6.30-dpvpx0689 (r...@localhost.localdomain) (gcc version 
4.0.0 (DENX ELDK 4.0 4.0.0)) #70 SMP Tue Dec 1 10:14:07 IST 2009

Found legacy serial port 0 for /s...@f600/ser...@4500
 mem=f6004500, taddr=f6004500, irq=0, clk=4, speed=0
Found legacy serial port 1 for /s...@f600/ser...@4600
 mem=f6004600, taddr=f6004600, irq=0, clk=4, speed=0
CPU maps initialized for 1 thread per core
(thread shift is 0)
console [udbg0] enabled
setup_arch: bootmem
dpvpx0689_setup_arch()
Found FSL PCI host bridge at 0xf6008000. Firmware bus number: 0-15
PCI host bridge /p...@f6008000  ranges:
MEM 0x8000..0x9fff - 0x8000
 IO 0xf800..0xfbff - 0x
Single Board Computers from Data Patterns
Ported  Developed By COTS DIVISION
arch: exit
Top of RAM: 0x4000, Total RAM: 0x4000
Memory hole size: 0MB
Zone PFN ranges:
 DMA  0x - 0x0003
 Normal   0x0003 - 0x0003
 HighMem  0x0003 - 0x0004
Movable zone start PFN for each node
early_node_map[1] active PFN ranges
   0: 0x - 0x0004
On node 0 totalpages: 262144
free_area_init_node: node 0, pgdat a047d1c0, node_mem_map a07fd000
 DMA zone: 1536 pages used for memmap
 DMA zone: 0 pages reserved
 DMA zone: 195072 pages, LIFO batch:31
 HighMem zone: 512 pages used for memmap
 HighMem zone: 65024 pages, LIFO batch:15
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 260096
Kernel command line: root=/dev/nfs rw nfsroot=10.5.18.3:/ppc/netfs/fc5fs/ 
ip=10.5.18.230:10.5.18.3:10.5.18.3:255.0.0.0:DPVPX0689:eth0:off 
console=ttyS0,115200

NR_IRQS:512
mpic: Setting up MPIC  MPIC  version 1.2 at f604, max 2 CPUs
mpic: ISU size: 256, shift: 8, mask: ff
mpic: Initializing for 256 sources
PID hash table entries: 4096 (order: 12, 16384 bytes)
time_init: decrementer frequency = 100.00 MHz
time_init: processor frequency   = 800.00 MHz
clocksource: timebase mult[280] shift[22] registered
clockevent: decrementer mult[1999] shift[16] cpu[0]
Console: colour dummy device 80x25
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
High memory: 262140k
Memory: 1031504k/1048576k available (k kernel code, 16252k reserved, 
160k data, 169k bss, 200k init)

Kernel virtual memory layout:
 * 0xfffe..0xf000  : fixmap
 * 0xff80..0xffc0  : highmem PTEs
 * 0xfe7ed000..0xff80  : early ioremap
 * 0xd100..0xfe7ed000  : vmalloc  ioremap
Calibrating delay loop... 199.68 BogoMIPS (lpj=99840)
Mount-cache hash table entries: 512
mpic: requesting IPIs ...
Processor 1 found.
clockevent: decrementer mult[1999] shift[16] cpu[1]
Brought up 2 CPUs
Unable to handle kernel paging request for data at address 0x0004
Faulting instruction address: 0xa0023e10
Oops: Kernel access of bad area, sig: 11 [#1]
SMP NR_CPUS=2 DPVPX0689
Modules linked in:
NIP: a0023e10 LR: a0023dd0 CTR: 
REGS: cf841e90 TRAP: 0300   Not tainted  (2.6.30-dpvpx0689)
MSR: 9032 EE,ME,IR,DR  CR: 24004028  XER: 2000
DAR: 0004, DSISR: 4000
TASK = cf83f930[1] 'swapper' THREAD: cf84 CPU: 0
GPR00:  cf841f40 cf83f930    cf841f50 

GPR08:   0002 a10018f4 22004082  3fee6c00 
3ff94000
GPR16: ffbf ffbf7bff    cf83a800 a10018e8 
a0491224
GPR24: a049 a04558f8  cf801f20 a1006070 a10018e8 a10018f8 


NIP [a0023e10] __build_sched_domains+0x354/0x464
LR [a0023dd0] __build_sched_domains+0x314/0x464
Call Trace:
[cf841f40] [a0023b98] __build_sched_domains+0xdc/0x464 (unreliable)
[cf841f90] [a04326ec] 

Re: [PATCH v2] ppc440spe-adma: adds updated ppc440spe adma driver

2009-12-02 Thread Anatolij Gustschin
Dan Williams dan.j.willi...@intel.com wrote:

 Anatolij Gustschin wrote:
  This patch adds new version of the PPC440SPe ADMA driver.
  
  Signed-off-by: Anatolij Gustschin ag...@denx.de
  Signed-off-by: Yuri Tikhonov y...@emcraft.com
 
 [minor] Sign-offs are typically in delivery path order, so yours would 
 appear last.

Ok, I'll fix this in the next patch version.

 [..]
   drivers/dma/ppc440spe/ppc440spe-adma.c | 5015 
  
   drivers/dma/ppc440spe/ppc440spe_adma.h |  195 +
   drivers/dma/ppc440spe/ppc440spe_dma.h  |  223 +
   drivers/dma/ppc440spe/ppc440spe_xor.h  |  110 +
 
 I belong to the school of thought that says something along the lines of 
 don't duplicate the directory path in the filename.  You seem to have 
 copied the iop-adma driver's inconsistent use of '-' and '_' let's not 
 carry that forward, i.e. looking for a changelog like:
 
drivers/dma/ppc440spe/adma.c | 5015 
drivers/dma/ppc440spe/adma.h |  195 +
drivers/dma/ppc440spe/dma.h  |  223 +
drivers/dma/ppc440spe/xor.h  |  110 +

Ok, it indeed looks much better. I think I should use 'ppc4xx' as driver
directory name now as we need to extend the driver to also support 460EX
later.

  +/**
  + * ppc440spe_adma_prep_dma_pqzero_sum - prepare CDB group for
  + * a PQ_ZERO_SUM operation
  + */
  +static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_pqzero_sum(
  +   struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src,
  +   unsigned int src_cnt, const unsigned char *scf, size_t len,
  +   enum sum_check_flags *pqres, unsigned long flags)
  +{
  +   struct ppc440spe_adma_chan *ppc440spe_chan;
  +   struct ppc440spe_adma_desc_slot *sw_desc, *iter;
  +   dma_addr_t pdest, qdest;
  +   int slot_cnt, slots_per_op, idst, dst_cnt;
  +
  +   if (unlikely(!len))
  +   return NULL;
  +   if (len  PAGE_SIZE)
  +   return NULL;
 
 This won't work, as currently we'll end up in an infinite loop in 
 async_syndrome_val() because all descriptor allocation failures are 
 assumed to be time-limited.  The code just issues any pending operations 
 and waits for descriptor resources to become available.

Yes, in the case 'len  PAGE_SIZE' this is true. I didn't look at
async_syndrome_val() code again before making this change and while
raid6 testing after this change I didn't notice any issues as passed
'len' was always equal to PAGE_SIZE. I must do this 'len' check while
looking for a suitable channel for pq_val operation so that there
will be a fallback to synchronous path in the case passed 'len' is
greater than PAGE_SIZE. I'll fix this.

 What this comes down to is that ppc440spe_adma is essentially fibbing 
 about its support for the pq_val operation.  I think a more generic 
 solution would be to advertise to the async_tx api that the driver has 
 per channel temporary buffers that can be used to store intermediate pq 
 results and let the async_tx api handle the emulation using its 
 knowledge of -max_pq.  We would also need a mechanism for the async_tx 
 api to lock out other requesters of the temporary buffer until a 
 coherent set of descriptors referencing those temporary buffers has been 
 submitted to the driver.  This would help other drivers like mv_xor 
 which has no val support and ioatdma which currently can only validate 
 up to 8 sources asynchronously.
 
 Can you clarify what ppc440spe-adma supports in this area?  It looks 
 like it has some hardware support for result checking but always needs 
 to write p and/or q somewhere?  Some devices may be able to do the final 
 comparison against the original parity values asynchronously while 
 others may need to do it synchronously in software.  These details can 
 be handled at the async_tx api level.

ppc440spe-adma supports checking against the original parity values
asynchronously using following approach:
original parity values (as passed to async_syndrome_val()) are copied to
channels temporary p and/or q buffer(s). Then the generation of the
syndrome is performed using this temporary buffer(s) as destination(s).
When DMA engine generates p and/or q parity, it always performs XOR
operation with the destination p and/or q buffer(s) content while
writing to this buffer(s). In the case that the syndrome is valid,
the destination p and/or q buffer(s) will be cleared (set to zero)
after syndrome validation. This is checked by the subsequent DMA
DATACHECK operation which compares a buffer with a data pattern and
stores the comparison result in the Completion Status FIFO. We queue
a subsequent DMA DATACHECK descriptor for this check operation. The
temporary buffers can be immediately re-used, they do not store a
result a subsequent async_tx operation depends on. I think this is
still much better than doing the validation synchronously in software.

Best 

Re: [v10 PATCH 9/9]: POWER: Enable default_idle when power_save=off

2009-12-02 Thread Daniel Walker
On Wed, 2009-12-02 at 15:33 +0530, Arun R Bharadwaj wrote:
 +int boot_option_idle_override = 0;
 + 

Doesn't need to be set to zero AFAIK, since we do a mass initialization
to zero during boot up. Did you notice some type of failure when you
didn't initialize that to zero?

(checkpatch output below..)
--

ERROR: do not initialise externals to 0 or NULL
#97: FILE: arch/powerpc/kernel/idle.c:43:
+int boot_option_idle_override = 0;

total: 1 errors, 0 warnings, 0 checks, 31 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.



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Can user set timeout for MPC 83x watchdog timer

2009-12-02 Thread Aswathi C
Hi Kumar,

I would like to know whether user can set timeout from user space for the
watchdog.
I am using MPC 8323E processor and linux-2.6.24 kernel.
If user can set, can you tell me how will it be implemented?

Regards,
Aswathi
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Can user set timeout for MPC 83x watchdog timer

2009-12-02 Thread Aswathi C
I would like to know whether user can set timeout from user space for the
watchdog.
I am using MPC 8323E processor and linux-2.6.24 kernel.
If user can set, can you tell me how will it be implemented?

Regards,
Aswathi
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MPC5121ADS PowerVR MBX driver on 2.6.31 kernel?

2009-12-02 Thread Cristian Axenie
Hi all!

I would like to know if there is someone that tested the MBX driver for the
PowerVR graphic chip in MPC5121 ?
It seems that on kernel 2.6.21 works fine but it fails on 2.6.31 !
I'm using wrlinux as the build environment !

Any opinions are welcome !

Best !
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Re: MPC5121ADS PowerVR MBX driver on 2.6.31 kernel?

2009-12-02 Thread Wolfgang Denk
Dear Cristian Axenie,

In message 9c789a000912021004l5dda0ee8r77a21764e035f...@mail.gmail.com you 
wrote:

 I would like to know if there is someone that tested the MBX driver for the
 PowerVR graphic chip in MPC5121 ?
 It seems that on kernel 2.6.21 works fine but it fails on 2.6.31 !

You probably have to rebuild it from the source code for this new
kernel version.

 I'm using wrlinux as the build environment !

Maybe you ask WRS to provide matching binaries, then? [Note that
woever provides the binaries also has to provide the sources; the
kernel is GPL after all...]

Best regards,

Wolfgang Denk

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Re: EP440XS board boot problem(Note:similart to Sequoia)

2009-12-02 Thread Wolfgang Denk
Dear Allan Wang,

In message 880531.39933...@web52905.mail.re2.yahoo.com you wrote:
 
 Thank you for your help. My answer to your questions are between the lines.
  Attached is the dts file I use.

No, there is no attachment.

 Which exact version of U-Boot are you running on this board?
 
 = version
 
 U-Boot 1.1.6 (Oct 25 2009 - 13:26:41)

Um... why don't you update? This is really historic stuff...

 What is your exact boot command?
 
 I tftp the cuImage to address 0x20 and bootm to boot.
 
 Which boot arguments do you pass to the kernel?
 
 bootargs=$(bootargs) console=ttyS0,$(baudrate)

Please provide complete answers, and not only the snippets that seem
important to you. For example, what is the $(bootargs) above?

Maybe you provide a full boot log right from reset/power on, including
the output of the printenv command on your system.

 The u-boot sets it to 115.2k. the dts file is set to 115.2k. Here is the bo
 ot parameter:
 baudrate=115200

Arghhh.. Please provide the actual output fdrom your system, not just
some parts you copy.

 What does your device tree look like?
 
 I attached my dts file.

No, it's missing.

  2. It pakics when mounting the root file system(NFS):
  (gdb) bt
  #0 panic (fmt=0xc0290e94 VFS: Unable to mount root fs on %s)
 
 So what is the %s argument here? Which sort of root file system are
 you trying to mount - NFS, ramdisk, UBIFS, ... ?
 
 I try to use NFS for the root file system.

Then you can also run a packet sniffer (like wireshark) to see if any
NFS requests actually get sent to the targte, resp. where it stops).

Best regards,

Wolfgang Denk

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Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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Re: [RFC PATCH v2 09/11] powerpc: gamecube/wii: flipper interrupt controller support

2009-12-02 Thread Benjamin Herrenschmidt
On Tue, 2009-12-01 at 20:48 +0100, Albert Herranz wrote:
 
 This -1 should be NO_IRQ too.
 I'll fix this in the next version.

No. The number you pass here is not a linux virq number, but a number in
your HW numbering space that never represents a valid IRQ. In your case
0 (NO_IRQ is deprecated anyways) is a valid HW interrupt number. However
-1 sounds good.

So your existing code is fine.

Cheers,
Ben.


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Re: Recommended functions for accessing internal registers

2009-12-02 Thread Benjamin Herrenschmidt
On Tue, 2009-12-01 at 17:44 +0100, Fortini Matteo wrote:
 I see that throughout the kernel source, internal PPC registers are 
 accessed through [in|out]_be[32|16|8]() functions. However, they are 
 translated into 3 inline assembly instructions, one of which is an 
 isync, which has a huge performance hit.
 I tried using readl_be() which seems to be the right function according 
 to the Documentation/ dir, but it is translated directly to in_be32(), 
 so no luck.
 
 Is it really necessary to use all those instructions? I know I could use 
 a (volatile u32 *) variable to avoid subsequent read/writes to be 
 optimized out, but it seems to be a deprecated use.

There are good reasons why the accessors contain those barriers. What
are you doing that would be performance critical enough for those to be
a problem ?

Cheers,
Ben.


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Re: [RFC PATCH v2 09/11] powerpc: gamecube/wii: flipper interrupt controller support

2009-12-02 Thread Albert Herranz
Benjamin Herrenschmidt wrote:
 On Tue, 2009-12-01 at 20:48 +0100, Albert Herranz wrote:
 This -1 should be NO_IRQ too.
 I'll fix this in the next version.
 
 No. The number you pass here is not a linux virq number, but a number in
 your HW numbering space that never represents a valid IRQ. In your case
 0 (NO_IRQ is deprecated anyways) is a valid HW interrupt number. However
 -1 sounds good.
 
 So your existing code is fine.
 

Oh. Good to know.
Then I need to fix the other PIC driver :)

 Cheers,
 Ben.
 

Thanks,
Albert

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RE: MPC5121ADS PowerVR MBX driver on 2.6.31 kernel?

2009-12-02 Thread Chen Hongjun-R66092
The released binary MBX driver is based on kernel 2.6.24, not on 2.6.31.
 
Regards,
Hongjun




From:
linuxppc-dev-bounces+hong-jun.chen=freescale@lists.ozlabs.org
[mailto:linuxppc-dev-bounces+hong-jun.chen=freescale@lists.ozlabs.or
g] On Behalf Of Cristian Axenie
Sent: Thursday, December 03, 2009 2:05 AM
To: linuxppc-...@ozlabs.org
Subject: MPC5121ADS PowerVR MBX driver on 2.6.31 kernel?


Hi all!

I would like to know if there is someone that tested the MBX
driver for the PowerVR graphic chip in MPC5121 ?
It seems that on kernel 2.6.21 works fine but it fails on 2.6.31
!
I'm using wrlinux as the build environment !

Any opinions are welcome !

Best !


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[PATCH] [SCSI] mpt fusion: Fix 32 bit platforms with 64 bit resources.

2009-12-02 Thread Pravin Bathija
Powerpc 44x uses 36 bit real address while the real address defined
in MPT Fusion driver is of type 32 bit. This causes ioremap to fail and 
driver
fails to initialize. This fix changes the data types representing the real
address from unsigned long 32-bit types to resource_size_t which is 64-bit. 
The
driver has been tested, the disks get discovered correctly and can do IO.

Signed-off-by: Pravin Bathija pbath...@amcc.com
Acked-by: Feng Kan f...@amcc.com
Acked-by: Fushen Chen fc...@amcc.com
Acked-by: Loc Ho l...@amcc.com
Acked-by: Tirumala Reddy Marri tma...@amcc.com
Acked-by: Victor Gallardo vgalla...@amcc.com
---
 drivers/message/fusion/mptbase.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/message/fusion/mptbase.c b/drivers/message/fusion/mptbase.c
index 5d496a9..9f14a60 100644
--- a/drivers/message/fusion/mptbase.c
+++ b/drivers/message/fusion/mptbase.c
@@ -1511,7 +1511,7 @@ mpt_mapresources(MPT_ADAPTER *ioc)
 {
u8  __iomem *mem;
int  ii;
-   unsigned longmem_phys;
+   resource_size_t  mem_phys;
unsigned longport;
u32  msize;
u32  psize;
-- 
1.5.5

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Re: [PATCH] [SCSI] mpt fusion: Fix 32 bit platforms with 64 bit resources.

2009-12-02 Thread Benjamin Herrenschmidt
On Wed, 2009-12-02 at 17:51 -0800, Pravin Bathija wrote:
 Powerpc 44x uses 36 bit real address while the real address defined
 in MPT Fusion driver is of type 32 bit. This causes ioremap to fail and 
 driver
 fails to initialize. This fix changes the data types representing the real
 address from unsigned long 32-bit types to resource_size_t which is 
 64-bit. The
 driver has been tested, the disks get discovered correctly and can do IO.
 
 Signed-off-by: Pravin Bathija pbath...@amcc.com

Acked-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---

James, this one should be good ;-)

 Acked-by: Feng Kan f...@amcc.com
 Acked-by: Fushen Chen fc...@amcc.com
 Acked-by: Loc Ho l...@amcc.com
 Acked-by: Tirumala Reddy Marri tma...@amcc.com
 Acked-by: Victor Gallardo vgalla...@amcc.com
 ---
  drivers/message/fusion/mptbase.c |2 +-
  1 files changed, 1 insertions(+), 1 deletions(-)
 
 diff --git a/drivers/message/fusion/mptbase.c 
 b/drivers/message/fusion/mptbase.c
 index 5d496a9..9f14a60 100644
 --- a/drivers/message/fusion/mptbase.c
 +++ b/drivers/message/fusion/mptbase.c
 @@ -1511,7 +1511,7 @@ mpt_mapresources(MPT_ADAPTER *ioc)
  {
   u8  __iomem *mem;
   int  ii;
 - unsigned longmem_phys;
 + resource_size_t  mem_phys;
   unsigned longport;
   u32  msize;
   u32  psize;


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Re: [RFC PATCH v3 3/3] powerpc: gamecube/wii: early debugging using usbgecko

2009-12-02 Thread Segher Boessenkool
you may want to rename the ug_ prefix, it took me a while looking  
back

and forth through the patch to convince myself it wasn't a typo.


What's wrong with ug_ ? (ug = (u)sb(g)ecko)


At first look I thought it was a typo of udbg_early_remap. I prefer  
the longer names although we could use gecko_early_remap unless the  
gecko prefix conflicts with anything else.


All these names are local to this file.  Shorter names are nicer than
longer names :-)

If there is not going to be a non usb gecko then there is no need  
to have usb in the prefix.


There already is a Gecko device that plugs into the memory card slot
as well.  It is older than the USB Gecko, and much more widespread.

It doesn't give you a serial connection, it's memory only.


Segher

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Re: [PATCH] powerpc/mm: setting mmaped page cache property through device tree

2009-12-02 Thread Segher Boessenkool
The scenario for the first case is that in a multicore system  
running

ASMP which means different OS runs on different cores.  They might
communicate through a shared memory region.  The region on every OS
need to be mapped with the same cache perperty to avoid cache  
paradox.


This isn't true.  In ASMP, you cannot usually do coherency between
the different CPUs at all.  Also, in most PowerPC implementations,


Coherency can't be achieved with proper configuration and  
management?  Why so?


Because different CPUs do not usually speak the same coherency protocol.

However, it occurred to me that what you call ASMP is actually SMP where
you run different OSes on the various cores?


it is fine if one CPU maps a memory range as coherent while another
maps it as non-coherent; sure, you have to be careful or you will


But we do want the shared region to be coherent.  So mappings should
have the same cacheability property.


No, they only need WIMG=xx1x on both sides.  Of course, IM=11 might not
be a valid combination on your particular CPU, and it probably is better
for performance to have the RAM cacheable anyway.


So make the memory known to the kernel, just tell the kernel not to
use it.  If it's normal system RAM, just put it in the memory node
and do a memreserve on it (or do something in your platform code); if
it's some other memory, do a device driver for it, map it there.


Your solution is feasible.  But the memory allocation is a software
configuration.  IMHO, it should be better and easier addressed by
changing configurations(like mem parameter) rather than the kernel
platform code which should address hardware configuration.


Either platform code or some other boot-time code, sure.

The point is, you put the RAM in the device tree, so the kernel can
know that particular range of physical address space is RAM, even
if it doesn't use it itself.


Segher

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Re: Ethernet issues with lite5200 board from linux-2.6.31

2009-12-02 Thread Yogesh Chaudhari
2009/11/30 Grant Likely grant.lik...@secretlab.ca:
 On Mon, Nov 30, 2009 at 2:50 AM, Yogesh Chaudhari mr.yog...@gmail.com wrote:
 Hello,
         I am running linux kernel with rt patch on embedded board
 based on lite5200 eval board. From linux-2.6.31 release, in which the
 mdio patch has gone inside,  the fec ethernet does not come up on this
 board. I get the following message at startup:
 mpc52xx MII bus: probed
 mdio_bus f0003000: error probing PHY at address 1


 After the bootup if I try to do a ifconfig I get the message:
 net eth2: of_phy_connect failed


 If I change the value of reg in dts file (lite5200.dts) to 0 then this
 ethernet comes up. However upto this kernel version, this was not
 required.

 Ethernet does not come up on board with original lite5200.dts file

 Is your board based on the Lite5200 or the Lite5200B?  The phys are at
 different addresses on those two revisions of the board.  There is a
 different .dts file for each board.

 phy0: ethernet-...@1 {
                                 reg = 1;
                         };

 Ethernet comes up on board with this change
 phy0: ethernet-...@1 {
                                 reg = 0;
                         };

 Some PHYs treat address 0 as the 'broadcast' address.  You need to
 fill in this field (and modify the ethernet-phy@address node name)
 to reflect the address that your phy is actually at.

 g.

 I have tried the same with the latest kernel both with and without
rt, but with the same end result. I have checked that the mpc52xx fec
driver was changed from 2.6.31 version but I am not able to point
where this error is coming up from and how changing the reg value in
dts (which is not required till previous versions) is solving this.
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[PATCH] powerpc/pseries: Track previous CPPR values to correctly EOI interrupts

2009-12-02 Thread Mark Nelson
At the moment when we EOI an interrupt we set the CPPR back to 0xFF
regardless of its previous value. This could lead to problems if we
take an interrupt with a priority of 5, but before EOIing it we get
an IPI which has a priority of 4. The problem is that at the moment
when we EOI the IPI we will set the CPPR to 0xFF, but it should
really be set back to 5 (the previous priority).

To keep track of the previous CPPR values we create the xics_cppr
structure that has an array for CPPR values and an index pointing
to the current priority. This can easily grow if new priorities get
added in the future.

This will also be useful because the partition adjunct option of
upcoming machines will update the H_XIRR hcall to accept the CPPR
as a parameter.

Signed-off-by: Mark Nelson ma...@au1.ibm.com
---
 arch/powerpc/platforms/pseries/xics.c |   48 ++
 1 file changed, 43 insertions(+), 5 deletions(-)

Index: upstream/arch/powerpc/platforms/pseries/xics.c
===
--- upstream.orig/arch/powerpc/platforms/pseries/xics.c
+++ upstream/arch/powerpc/platforms/pseries/xics.c
@@ -20,6 +20,7 @@
 #include linux/cpu.h
 #include linux/msi.h
 #include linux/of.h
+#include linux/percpu.h
 
 #include asm/firmware.h
 #include asm/io.h
@@ -46,6 +47,12 @@ static struct irq_host *xics_host;
  */
 #define IPI_PRIORITY   4
 
+/* The least favored priority */
+#define LOWEST_PRIORITY0xFF
+
+/* The number of priorities defined above */
+#define MAX_NUM_PRIORITIES 3
+
 static unsigned int default_server = 0xFF;
 static unsigned int default_distrib_server = 0;
 static unsigned int interrupt_server_size = 8;
@@ -56,6 +63,12 @@ static int ibm_set_xive;
 static int ibm_int_on;
 static int ibm_int_off;
 
+struct xics_cppr {
+   unsigned char stack[MAX_NUM_PRIORITIES];
+   int index;
+};
+
+static DEFINE_PER_CPU(struct xics_cppr, xics_cppr);
 
 /* Direct hardware low level accessors */
 
@@ -284,6 +297,16 @@ static inline unsigned int xics_xirr_vec
return xirr  0x00ff;
 }
 
+static void get_irq_update_cppr(unsigned int vec)
+{
+   struct xics_cppr *os_cppr = __get_cpu_var(xics_cppr);
+
+   if (vec == XICS_IPI)
+   os_cppr-stack[++os_cppr-index] = IPI_PRIORITY;
+   else
+   os_cppr-stack[++os_cppr-index] = DEFAULT_PRIORITY;
+}
+
 static unsigned int xics_get_irq_direct(void)
 {
unsigned int xirr = direct_xirr_info_get();
@@ -294,8 +317,10 @@ static unsigned int xics_get_irq_direct(
return NO_IRQ;
 
irq = irq_radix_revmap_lookup(xics_host, vec);
-   if (likely(irq != NO_IRQ))
+   if (likely(irq != NO_IRQ)) {
+   get_irq_update_cppr(vec);
return irq;
+   }
 
/* We don't have a linux mapping, so have rtas mask it. */
xics_mask_unknown_vec(vec);
@@ -315,8 +340,10 @@ static unsigned int xics_get_irq_lpar(vo
return NO_IRQ;
 
irq = irq_radix_revmap_lookup(xics_host, vec);
-   if (likely(irq != NO_IRQ))
+   if (likely(irq != NO_IRQ)) {
+   get_irq_update_cppr(vec);
return irq;
+   }
 
/* We don't have a linux mapping, so have RTAS mask it. */
xics_mask_unknown_vec(vec);
@@ -326,12 +353,19 @@ static unsigned int xics_get_irq_lpar(vo
return NO_IRQ;
 }
 
+static unsigned char eoi_update_and_get_cppr(void)
+{
+   struct xics_cppr *os_cppr = __get_cpu_var(xics_cppr);
+
+   return os_cppr-stack[--os_cppr-index];
+}
+
 static void xics_eoi_direct(unsigned int virq)
 {
unsigned int irq = (unsigned int)irq_map[virq].hwirq;
 
iosync();
-   direct_xirr_info_set((0xff  24) | irq);
+   direct_xirr_info_set((eoi_update_and_get_cppr()  24) | irq);
 }
 
 static void xics_eoi_lpar(unsigned int virq)
@@ -339,7 +373,7 @@ static void xics_eoi_lpar(unsigned int v
unsigned int irq = (unsigned int)irq_map[virq].hwirq;
 
iosync();
-   lpar_xirr_info_set((0xff  24) | irq);
+   lpar_xirr_info_set((eoi_update_and_get_cppr()  24) | irq);
 }
 
 static int xics_set_affinity(unsigned int virq, const struct cpumask *cpumask)
@@ -746,6 +780,10 @@ void __init xics_init_IRQ(void)
 
 static void xics_set_cpu_priority(unsigned char cppr)
 {
+   struct xics_cppr *os_cppr = __get_cpu_var(xics_cppr);
+   os_cppr-index = 0;
+   os_cppr-stack[os_cppr-index] = cppr;
+
if (firmware_has_feature(FW_FEATURE_LPAR))
lpar_cppr_info(cppr);
else
@@ -772,7 +810,7 @@ static void xics_set_cpu_giq(unsigned in
 
 void xics_setup_cpu(void)
 {
-   xics_set_cpu_priority(0xff);
+   xics_set_cpu_priority(LOWEST_PRIORITY);
 
xics_set_cpu_giq(default_distrib_server, 1);
 }
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RE: [PATCH] [SCSI] mpt fusion: Fix 32 bit platforms with 64 bit resources.

2009-12-02 Thread Desai, Kashyap

This patch looks OK. Please consider it as ACKed by me on behalf of LSI.

- Kashyap

 -Original Message-
 From: linux-scsi-ow...@vger.kernel.org [mailto:linux-scsi-
 ow...@vger.kernel.org] On Behalf Of Benjamin Herrenschmidt
 Sent: Thursday, December 03, 2009 8:30 AM
 To: Pravin Bathija
 Cc: linux-s...@vger.kernel.org; linuxppc-...@ozlabs.org;
 jwbo...@linux.vnet.ibm.com; Moore, Eric
 Subject: Re: [PATCH] [SCSI] mpt fusion: Fix 32 bit platforms with 64 bit
 resources.
 
 On Wed, 2009-12-02 at 17:51 -0800, Pravin Bathija wrote:
  Powerpc 44x uses 36 bit real address while the real address defined
  in MPT Fusion driver is of type 32 bit. This causes ioremap to fail
 and driver
  fails to initialize. This fix changes the data types representing
 the real
  address from unsigned long 32-bit types to resource_size_t which is
 64-bit. The
  driver has been tested, the disks get discovered correctly and can
 do IO.
 
  Signed-off-by: Pravin Bathija pbath...@amcc.com
 
 Acked-by: Benjamin Herrenschmidt b...@kernel.crashing.org
 ---
 
 James, this one should be good ;-)
 
  Acked-by: Feng Kan f...@amcc.com
  Acked-by: Fushen Chen fc...@amcc.com
  Acked-by: Loc Ho l...@amcc.com
  Acked-by: Tirumala Reddy Marri tma...@amcc.com
  Acked-by: Victor Gallardo vgalla...@amcc.com
  ---
   drivers/message/fusion/mptbase.c |2 +-
   1 files changed, 1 insertions(+), 1 deletions(-)
 
  diff --git a/drivers/message/fusion/mptbase.c
 b/drivers/message/fusion/mptbase.c
  index 5d496a9..9f14a60 100644
  --- a/drivers/message/fusion/mptbase.c
  +++ b/drivers/message/fusion/mptbase.c
  @@ -1511,7 +1511,7 @@ mpt_mapresources(MPT_ADAPTER *ioc)
   {
  u8  __iomem *mem;
  int  ii;
  -   unsigned longmem_phys;
  +   resource_size_t  mem_phys;
  unsigned longport;
  u32  msize;
  u32  psize;
 
 
 --
 To unsubscribe from this list: send the line unsubscribe linux-scsi in
 the body of a message to majord...@vger.kernel.org
 More majordomo info at  http://vger.kernel.org/majordomo-info.html
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Re: [PATCH] powerpc/mm: setting mmaped page cache property through device tree

2009-12-02 Thread Li Yang
On Thu, Dec 3, 2009 at 12:15 PM, Segher Boessenkool
seg...@kernel.crashing.org wrote:
 The scenario for the first case is that in a multicore system running
 ASMP which means different OS runs on different cores.  They might
 communicate through a shared memory region.  The region on every OS
 need to be mapped with the same cache perperty to avoid cache paradox.

 This isn't true.  In ASMP, you cannot usually do coherency between
 the different CPUs at all.  Also, in most PowerPC implementations,

 Coherency can't be achieved with proper configuration and management?  Why
 so?

 Because different CPUs do not usually speak the same coherency protocol.

 However, it occurred to me that what you call ASMP is actually SMP where
 you run different OSes on the various cores?


Yup.  There might be some confusion on the ASMP definition.  But with
multi-core common in the market, new ASMP system may run on SMP-like
hardware.

 it is fine if one CPU maps a memory range as coherent while another
 maps it as non-coherent; sure, you have to be careful or you will

 But we do want the shared region to be coherent.  So mappings should
 have the same cacheability property.

 No, they only need WIMG=xx1x on both sides.  Of course, IM=11 might not
 be a valid combination on your particular CPU, and it probably is better
 for performance to have the RAM cacheable anyway.

Agreed.  This patch also makes M bit configurable.


 So make the memory known to the kernel, just tell the kernel not to
 use it.  If it's normal system RAM, just put it in the memory node
 and do a memreserve on it (or do something in your platform code); if
 it's some other memory, do a device driver for it, map it there.

 Your solution is feasible.  But the memory allocation is a software
 configuration.  IMHO, it should be better and easier addressed by
 changing configurations(like mem parameter) rather than the kernel
 platform code which should address hardware configuration.

 Either platform code or some other boot-time code, sure.

 The point is, you put the RAM in the device tree, so the kernel can
 know that particular range of physical address space is RAM, even
 if it doesn't use it itself.

If device tree always pass all the memory available, we need to
implement memmap= kernel cmdline parameter for powerpc in case the
memory used isn't start at address 0.  Maybe it's better that all
these information be passed with kernel parameter rather than device
tree for cross architecture portability.  What do you think?

- Leo
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Re: MPC5121ADS PowerVR MBX driver on 2.6.31 kernel?

2009-12-02 Thread Wolfgang Denk
Dear Chen Hongjun-R66092,

In message 
3a45394fd742fa419b760bb8d398f9ede65...@zch01exm26.fsl.freescale.net you wrote:
 
 The released binary MBX driver is based on kernel 2.6.24, not on 2.6.31.

It is a GPL violation that there is no source code available for it.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Save energy:  Drive a smaller shell.
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Re: [v10 PATCH 9/9]: POWER: Enable default_idle when power_save=off

2009-12-02 Thread Arun R Bharadwaj
* Arun R Bharadwaj a...@linux.vnet.ibm.com [2009-12-02 15:33:46]:

Thanks for running checkpatch on the patch Daniel. Will fix this.

arun
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PCI interrupt question

2009-12-02 Thread Jeff Hane
Hello, 

 I'm trying to get interrupts working for my PCI device on a 460ex and
am having problem.  My ISR never triggers.

I'm new to PCI(and ppc) and LDD said that I could read the config reg
INTURRUPT_LINE to get the interrupt assigned to my PCI device.  Well,
this always reads zero. 

After reading through the code it appears that the interrupt is being
assigned after reading some information out of the device tree and then
filling in the irg in the pci_dev structure.  

I'm just looking for confirmation that I should be calling request_irq
with the irq that I found in the pci_dev struct.

thanks,
jeff


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Re: PCI interrupt question

2009-12-02 Thread Stefan Roese
Hi Jeff,

On Thursday 03 December 2009 07:21:56 Jeff Hane wrote:
  I'm trying to get interrupts working for my PCI device on a 460ex and
 am having problem.  My ISR never triggers.

Which 460EX board is this? Canyonlands or some custom board?
 
 I'm new to PCI(and ppc) and LDD said that I could read the config reg
 INTURRUPT_LINE to get the interrupt assigned to my PCI device.  Well,
 this always reads zero.
 
 After reading through the code it appears that the interrupt is being
 assigned after reading some information out of the device tree and then
 filling in the irg in the pci_dev structure.

Yes. The device tree has to describe the PCI interrupt layout.
 
 I'm just looking for confirmation that I should be calling request_irq
 with the irq that I found in the pci_dev struct.

Yes.

Canyonlands dts correctly describes the PCI interrupts assignments. If you 
have a custom 460EX board, then you probably have a different interrupt routed 
to the PCI slot. This needs to be described in your device tree file.
 
Cheers,
Stefan
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Re: [PATCH 4/5] libata/sff: Use ops-bmdma_stop instead of ata_bmdma_stop()

2009-12-02 Thread Jeff Garzik

On 12/01/2009 07:36 PM, Benjamin Herrenschmidt wrote:

In libata-sff, ata_sff_post_internal_cmd() directly calls ata_bmdma_stop()
instead of ap-ops-bmdma_stop(). This can be a problem for controllers
that use their own bmdma_stop for which the generic sff one isn't suitable

Signed-off-by: Benjamin Herrenschmidtb...@kernel.crashing.org
---

  drivers/ata/libata-sff.c |2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

--- linux-work.orig/drivers/ata/libata-sff.c2009-12-01 17:48:27.0 
+1100
+++ linux-work/drivers/ata/libata-sff.c 2009-12-01 17:48:48.0 +1100
@@ -2384,7 +2384,7 @@ void ata_sff_post_internal_cmd(struct at
ap-hsm_task_state = HSM_ST_IDLE;

if (ap-ioaddr.bmdma_addr)
-   ata_bmdma_stop(qc);
+   ap-ops-bmdma_stop(qc);

spin_unlock_irqrestore(ap-lock, flags);


applied

As we discussed, feel free to carry this in your tree as well.  git 
should be able to sort it out.


Acked-by: Jeff Garzik jgar...@redhat.com


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