Re: Problem with PCI bus rescan on 460EX

2010-03-28 Thread Felix Radensky

Hello, Kenji-san

Kenji Kaneshige wrote:

Felix Radensky wrote:

Hello, Kenji-san

Kenji Kaneshige wrote:


I misunderstood the problem.
My understanding was memory resource was not enabled even though 
Linux set
the Memory Space bit in the command register. But it was not 
correct. The
bridge memory window was marked unused and Linux didn't try to set 
Memory
Space bit in the command register. Current my understanding is as 
follows.

Please correct me if I'm still misunderstanding something.

1) Your BIOS doesn't assign any resource to the bridge if its child PCI
  hot-plug slot is not occupied.

2) At the boot time, pci_assign_unassigned_resources() try to assign
  memory resouces to the bridge using pci_bus_assign_resource(), but
  it was disabled because there are no devices require memory resource.

3) And then pci_assign_unassigned_resouces() calls pci_enable_bridge(),
  but Memory Space bit in the command register was not set because no
  memory resource are assigned to the bridge. At the same time,
  pci_dev-enable_cnt was incremented.

4) At the rescan time, pci_setup_bridge() and pci_enable_bridge() 
doesn't

  work because the bridge is already marked enabled (i.e.
  pci_dev-enable_cnt is not zero).

I don't have any concrete idea how to fix that so far, but I can say 
my idea

(pcibios_enable_device() should return an error) was wrong.


I was wandering if setting is_hotplug_bridge property for this bridge 
(e.g. via
header quirk) can be an acceptable solution. This will allow passing 
hpmemsize
kernel parameter, to specify the amount of memory to assign to the 
bridge.

I've tested this approach and it seems to work.


Looks good to me.

By the way, I think Yinghai's bridge resource reallocation patch series
might help you. It is in Jesse's PCI tree. Please take a look.

Thanks,
Kenji Kaneshige


I've tried Jesse's tree with Yinghai's patches, but they don't seem to help.
Memory for bridge is not allocated after insertion of hotplug device and
bus rescan. Attached dmesg output in case of success and failure.

Thanks.

Felix.
Linux version 2.6.33 (fe...@felix-laptop.lan) (gcc version 4.2.2) #8 Sun Mar 28 
12:04:25 IDT 2010
Found legacy serial port 0 for /plb/opb/ser...@ef600300
  mem=4ef600300, taddr=4ef600300, irq=0, clk=7407407, speed=0
Found legacy serial port 1 for /plb/opb/ser...@ef600400
  mem=4ef600400, taddr=4ef600400, irq=0, clk=7407407, speed=0
Found legacy serial port 2 for /plb/opb/ser...@ef600500
  mem=4ef600500, taddr=4ef600500, irq=0, clk=7407407, speed=0
Found legacy serial port 3 for /plb/opb/ser...@ef600600
  mem=4ef600600, taddr=4ef600600, irq=0, clk=7407407, speed=0
Top of RAM: 0x3000, Total RAM: 0x3000
Memory hole size: 0MB
Zone PFN ranges:
  DMA  0x - 0x0003
  Normal   0x0003 - 0x0003
Movable zone start PFN for each node
early_node_map[1] active PFN ranges
0: 0x - 0x0003
On node 0 totalpages: 196608
free_area_init_node: node 0, pgdat c02a84d0, node_mem_map c02e1000
  DMA zone: 1536 pages used for memmap
  DMA zone: 0 pages reserved
  DMA zone: 195072 pages, LIFO batch:31
MMU: Allocated 1088 bytes of context maps for 255 contexts
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 195072
Kernel command line: root=/dev/nfs rw nfsroot=10.0.0.10:/opt/eldk/ppc_4xxFP 
ip=10.0.0.30:10.0.0.10:10.0.0.138:255.0.0.0:smbe460:eth0:off panic=1 
console=ttyS0,115200
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Memory: 776500k/786432k available (2656k kernel code, 9932k reserved, 100k 
data, 184k bss, 132k init)
Kernel virtual memory layout:
  * 0xfffdf000..0xf000  : fixmap
  * 0xfde0..0xfe00  : consistent mem
  * 0xfde0..0xfde0  : early ioremap
  * 0xf100..0xfde0  : vmalloc  ioremap
SLUB: Genslabs=11, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
Hierarchical RCU implementation.
NR_IRQS:512 nr_irqs:512
UIC0 (32 IRQ sources) at DCR 0xc0
UIC1 (32 IRQ sources) at DCR 0xd0
  alloc irq_desc for 30 on node 0
  alloc kstat_irqs on node 0
irq: irq 30 on host /interrupt-controller0 mapped to virtual irq 30
UIC2 (32 IRQ sources) at DCR 0xe0
  alloc irq_desc for 16 on node 0
  alloc kstat_irqs on node 0
irq: irq 10 on host /interrupt-controller0 mapped to virtual irq 16
UIC3 (32 IRQ sources) at DCR 0xf0
  alloc irq_desc for 17 on node 0
  alloc kstat_irqs on node 0
irq: irq 16 on host /interrupt-controller0 mapped to virtual irq 17
time_init: decrementer frequency = 1000.12 MHz
time_init: processor frequency   = 1000.12 MHz
clocksource: timebase mult[40] shift[22] registered
clockevent: decrementer mult[8019] shift[31] cpu[0]
Mount-cache hash table entries: 512
NET: Registered protocol family 16
  alloc irq_desc for 18 on node 0
  alloc kstat_irqs on node 0
irq: irq 11 on host /interrupt-controller1 mapped to virtual irq 18
256k L2-cache enabled

Re: Problem with PCI bus rescan on 460EX

2010-03-28 Thread Benjamin Herrenschmidt
On Sun, 2010-03-28 at 12:13 +0300, Felix Radensky wrote:

 I've tried Jesse's tree with Yinghai's patches, but they don't seem to help.
 Memory for bridge is not allocated after insertion of hotplug device and
 bus rescan. Attached dmesg output in case of success and failure.

I'd recommend that for now, your platform uses a quirk to manually
resize the bridge resource to make room for future hotplug on it.

Cheers,
Ben.

 Thanks.
 
 Felix.
 plain text document attachment (success.txt)
 Linux version 2.6.33 (fe...@felix-laptop.lan) (gcc version 4.2.2) #8 Sun Mar 
 28 12:04:25 IDT 2010
 Found legacy serial port 0 for /plb/opb/ser...@ef600300
   mem=4ef600300, taddr=4ef600300, irq=0, clk=7407407, speed=0
 Found legacy serial port 1 for /plb/opb/ser...@ef600400
   mem=4ef600400, taddr=4ef600400, irq=0, clk=7407407, speed=0
 Found legacy serial port 2 for /plb/opb/ser...@ef600500
   mem=4ef600500, taddr=4ef600500, irq=0, clk=7407407, speed=0
 Found legacy serial port 3 for /plb/opb/ser...@ef600600
   mem=4ef600600, taddr=4ef600600, irq=0, clk=7407407, speed=0
 Top of RAM: 0x3000, Total RAM: 0x3000
 Memory hole size: 0MB
 Zone PFN ranges:
   DMA  0x - 0x0003
   Normal   0x0003 - 0x0003
 Movable zone start PFN for each node
 early_node_map[1] active PFN ranges
 0: 0x - 0x0003
 On node 0 totalpages: 196608
 free_area_init_node: node 0, pgdat c02a84d0, node_mem_map c02e1000
   DMA zone: 1536 pages used for memmap
   DMA zone: 0 pages reserved
   DMA zone: 195072 pages, LIFO batch:31
 MMU: Allocated 1088 bytes of context maps for 255 contexts
 Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 195072
 Kernel command line: root=/dev/nfs rw nfsroot=10.0.0.10:/opt/eldk/ppc_4xxFP 
 ip=10.0.0.30:10.0.0.10:10.0.0.138:255.0.0.0:smbe460:eth0:off panic=1 
 console=ttyS0,115200
 PID hash table entries: 4096 (order: 2, 16384 bytes)
 Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
 Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
 Memory: 776500k/786432k available (2656k kernel code, 9932k reserved, 100k 
 data, 184k bss, 132k init)
 Kernel virtual memory layout:
   * 0xfffdf000..0xf000  : fixmap
   * 0xfde0..0xfe00  : consistent mem
   * 0xfde0..0xfde0  : early ioremap
   * 0xf100..0xfde0  : vmalloc  ioremap
 SLUB: Genslabs=11, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
 Hierarchical RCU implementation.
 NR_IRQS:512 nr_irqs:512
 UIC0 (32 IRQ sources) at DCR 0xc0
 UIC1 (32 IRQ sources) at DCR 0xd0
   alloc irq_desc for 30 on node 0
   alloc kstat_irqs on node 0
 irq: irq 30 on host /interrupt-controller0 mapped to virtual irq 30
 UIC2 (32 IRQ sources) at DCR 0xe0
   alloc irq_desc for 16 on node 0
   alloc kstat_irqs on node 0
 irq: irq 10 on host /interrupt-controller0 mapped to virtual irq 16
 UIC3 (32 IRQ sources) at DCR 0xf0
   alloc irq_desc for 17 on node 0
   alloc kstat_irqs on node 0
 irq: irq 16 on host /interrupt-controller0 mapped to virtual irq 17
 time_init: decrementer frequency = 1000.12 MHz
 time_init: processor frequency   = 1000.12 MHz
 clocksource: timebase mult[40] shift[22] registered
 clockevent: decrementer mult[8019] shift[31] cpu[0]
 Mount-cache hash table entries: 512
 NET: Registered protocol family 16
   alloc irq_desc for 18 on node 0
   alloc kstat_irqs on node 0
 irq: irq 11 on host /interrupt-controller1 mapped to virtual irq 18
 256k L2-cache enabled
 PCI host bridge /plb/p...@c0ec0 (primary) ranges:
  MEM 0x000d8000..0x000d - 0x8000 
  MEM 0x000c0ee0..0x000c0eef - 0x 
   IO 0x000c0800..0x000c0800 - 0x
  Removing ISA hole at 0x000c0ee0
 4xx PCI DMA offset set to 0x
 /plb/p...@c0ec0: Legacy ISA memory support enabled
 PCI: Probing PCI hardware
 pci_bus :00: scanning bus
 pci :00:02.0: found [3388:0020] class 000604 header type 01
 pci :00:02.0: calling pcibios_fixup_resources+0x0/0xf4
 pci :00:02.0: calling fixup_ppc4xx_pci_bridge+0x0/0x154
 pci :00:02.0: calling quirk_resource_alignment+0x0/0x200
 pci :00:02.0: supports D1 D2
 pci :00:02.0: PME# supported from D0 D1 D2 D3hot
 pci :00:02.0: PME# disabled
 pci_bus :00: fixups for bus
 pci :00:02.0: scanning behind bridge, config 010100, pass 0
 pci_bus :01: scanning bus
 pci :01:00.0: found [1575:0002] class 00ff00 header type 00
 pci :01:00.0: reg 10: [mem 0x8000-0x800f]
 pci :01:00.0: reg 14: [mem 0x8400-0x87ff]
 pci :01:00.0: reg 18: [mem 0x8800-0x8bff]
 pci :01:00.0: reg 1c: [mem 0x8c00-0x8c003fff]
 pci :01:00.0: calling pcibios_fixup_resources+0x0/0xf4
 pci :01:00.0: calling fixup_ppc4xx_pci_bridge+0x0/0x154
 pci :01:00.0: calling quirk_resource_alignment+0x0/0x200
 pci_bus :01: fixups for bus
 pci :00:02.0: PCI bridge to [bus 01-01]
 pci :00:02.0:   bridge 

Re: Problem with PCI bus rescan on 460EX

2010-03-28 Thread Felix Radensky

Hi Ben,

Benjamin Herrenschmidt wrote:

On Sun, 2010-03-28 at 12:13 +0300, Felix Radensky wrote:

  

I've tried Jesse's tree with Yinghai's patches, but they don't seem to help.
Memory for bridge is not allocated after insertion of hotplug device and
bus rescan. Attached dmesg output in case of success and failure.



I'd recommend that for now, your platform uses a quirk to manually
resize the bridge resource to make room for future hotplug on it.

Cheers,
Ben.
  


I've submitted a patch to do that. See 
https://patchwork.kernel.org/patch/88769


Felix.

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question about drivers/macintosh/windfarm_pm91.c

2010-03-28 Thread Julia Lawall
The function wf_smu_remove in the file drivers/macintosh/windfarm_pm91.c 
ends with the following code:

if (wf_smu_slots_fans)
kfree(wf_smu_cpu_fans);
if (wf_smu_drive_fans)
kfree(wf_smu_cpu_fans);
if (wf_smu_cpu_fans)
kfree(wf_smu_cpu_fans);

This looks quite strange.  Is it supposed to be if (x) kfree(x); in each 
case?

julia
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Re: question about drivers/macintosh/windfarm_pm91.c

2010-03-28 Thread Benjamin Herrenschmidt
On Sun, 2010-03-28 at 17:48 +0200, Julia Lawall wrote:
 The function wf_smu_remove in the file drivers/macintosh/windfarm_pm91.c 
 ends with the following code:
 
 if (wf_smu_slots_fans)
 kfree(wf_smu_cpu_fans);
   if (wf_smu_drive_fans)
 kfree(wf_smu_cpu_fans);
 if (wf_smu_cpu_fans)
 kfree(wf_smu_cpu_fans);
 
 This looks quite strange.  Is it supposed to be if (x) kfree(x); in each 
 case?

Definitely a typo. In fact, the if () aren't even necessary. Patch
welcome :-)

Cheers,
Ben.

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Re: question about drivers/macintosh/windfarm_pm91.c

2010-03-28 Thread Julia Lawall
On Mon, 29 Mar 2010, Benjamin Herrenschmidt wrote:

 On Sun, 2010-03-28 at 17:48 +0200, Julia Lawall wrote:
  The function wf_smu_remove in the file drivers/macintosh/windfarm_pm91.c 
  ends with the following code:
  
  if (wf_smu_slots_fans)
  kfree(wf_smu_cpu_fans);
  if (wf_smu_drive_fans)
  kfree(wf_smu_cpu_fans);
  if (wf_smu_cpu_fans)
  kfree(wf_smu_cpu_fans);
  
  This looks quite strange.  Is it supposed to be if (x) kfree(x); in each 
  case?
 
 Definitely a typo. In fact, the if () aren't even necessary. Patch
 welcome :-)

I'll send something tomorrow.  I will perhaps keep the ifs, to maintain 
the style of the rest of the function.

julia
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[PATCH v2] powerpc/fsl: Add multiple MSI bank support

2010-03-28 Thread Kumar Gala
From: Lan Chunhe-B25806 b25...@freescale.com

Freescale QorIQ P4080 has three MSI banks and the original code
can not work well. This patch adds multiple MSI banks support for
Freescale processor.

Signed-off-by: Lan Chunhe-B25806 b25...@freescale.com
Signed-off-by: Roy Zang tie-fei.z...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
* Dropped check in fsl_setup_msi_irqs for NO_IRQ per Michael E's comments
* if ppc_md.setup_msi_irqs is already set treat as a -ENODEV, removed comment

 arch/powerpc/sysdev/fsl_msi.c |   40 +---
 1 files changed, 25 insertions(+), 15 deletions(-)

diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index c6e11b0..fcbecf9 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2007-2008 Freescale Semiconductor, Inc. All rights reserved.
+ * Copyright (C) 2007-2010 Freescale Semiconductor, Inc.
  *
  * Author: Tony Li tony...@freescale.com
  *Jason Jin jason@freescale.com
@@ -28,7 +28,6 @@ struct fsl_msi_feature {
u32 msiir_offset;
 };
 
-static struct fsl_msi *fsl_msi;
 
 static inline u32 fsl_msi_read(u32 __iomem *base, unsigned int reg)
 {
@@ -53,10 +52,12 @@ static struct irq_chip fsl_msi_chip = {
 static int fsl_msi_host_map(struct irq_host *h, unsigned int virq,
irq_hw_number_t hw)
 {
+   struct fsl_msi *msi_data = h-host_data;
struct irq_chip *chip = fsl_msi_chip;
 
irq_to_desc(virq)-status |= IRQ_TYPE_EDGE_FALLING;
 
+   set_irq_chip_data(virq, msi_data);
set_irq_chip_and_handler(virq, chip, handle_edge_irq);
 
return 0;
@@ -95,11 +96,12 @@ static int fsl_msi_check_device(struct pci_dev *pdev, int 
nvec, int type)
 static void fsl_teardown_msi_irqs(struct pci_dev *pdev)
 {
struct msi_desc *entry;
-   struct fsl_msi *msi_data = fsl_msi;
+   struct fsl_msi *msi_data;
 
list_for_each_entry(entry, pdev-msi_list, list) {
if (entry-irq == NO_IRQ)
continue;
+   msi_data = get_irq_chip_data(entry-irq);
set_irq_msi(entry-irq, NULL);
msi_bitmap_free_hwirqs(msi_data-bitmap,
   virq_to_hw(entry-irq), 1);
@@ -110,9 +112,10 @@ static void fsl_teardown_msi_irqs(struct pci_dev *pdev)
 }
 
 static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq,
- struct msi_msg *msg)
+   struct msi_msg *msg,
+   struct fsl_msi *fsl_msi_data)
 {
-   struct fsl_msi *msi_data = fsl_msi;
+   struct fsl_msi *msi_data = fsl_msi_data;
struct pci_controller *hose = pci_bus_to_host(pdev-bus);
u32 base = 0;
 
@@ -133,9 +136,11 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int 
nvec, int type)
unsigned int virq;
struct msi_desc *entry;
struct msi_msg msg;
-   struct fsl_msi *msi_data = fsl_msi;
+   struct fsl_msi *msi_data;
 
list_for_each_entry(entry, pdev-msi_list, list) {
+   msi_data = get_irq_chip_data(entry-irq);
+
hwirq = msi_bitmap_alloc_hwirqs(msi_data-bitmap, 1);
if (hwirq  0) {
rc = hwirq;
@@ -155,7 +160,7 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int 
nvec, int type)
}
set_irq_msi(virq, entry);
 
-   fsl_compose_msi_msg(pdev, hwirq, msg);
+   fsl_compose_msi_msg(pdev, hwirq, msg, msi_data);
write_msi_msg(virq, msg);
}
return 0;
@@ -167,7 +172,7 @@ out_free:
 static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
 {
unsigned int cascade_irq;
-   struct fsl_msi *msi_data = fsl_msi;
+   struct fsl_msi *msi_data = get_irq_chip_data(irq);
int msir_index = -1;
u32 msir_value = 0;
u32 intr_index;
@@ -192,7 +197,7 @@ static void fsl_msi_cascade(unsigned int irq, struct 
irq_desc *desc)
cascade_irq = NO_IRQ;
 
desc-status |= IRQ_INPROGRESS;
-   switch (fsl_msi-feature  FSL_PIC_IP_MASK) {
+   switch (msi_data-feature  FSL_PIC_IP_MASK) {
case FSL_PIC_IP_MPIC:
msir_value = fsl_msi_read(msi_data-msi_regs,
msir_index * 0x10);
@@ -306,15 +311,20 @@ static int __devinit fsl_of_msi_probe(struct of_device 
*dev,
if (virt_msir != NO_IRQ) {
set_irq_data(virt_msir, (void *)i);
set_irq_chained_handler(virt_msir, fsl_msi_cascade);
+   set_irq_chip_data(virt_msir, msi);
}
}
 
-   fsl_msi = msi;
-
-   WARN_ON(ppc_md.setup_msi_irqs);
-   ppc_md.setup_msi_irqs = fsl_setup_msi_irqs;
-   ppc_md.teardown_msi_irqs = fsl_teardown_msi_irqs;
-   ppc_md.msi_check_device = 

Re: Failing to get DMA working with MPC5200 (TQM5200) and CompactFlash

2010-03-28 Thread Josh Triplett
On Sat, Mar 27, 2010 at 06:44:55PM +0100, Wolfgang Denk wrote:
 In message 20100326225916.ga5...@feather you wrote:
  However, according to one of our hardware hackers, Andrew Greenberg
  (CCed), the STK5200 development breakout board for the TQM5200 *does*
  have the DMA pins wired up correctly, at least according to its
  schematic.  That doesn't guarantee that the board matches the schematic,
  of course.
 
 We tested CF cards for DMA support some time ago, and IIRC this
 included the STK5200. Situation was that only very few CF cards
 actually support DMA (even if they advertise it on the label).

How very odd and disappointing.

So a CF card might advertise DMA on its label and feature set, and
show DMA modes in hdparm's info dump, but break when actually using DMA
modes?

Do you know of any specific CF cards which *do* support DMA?

- Josh Triplett
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Re: Failing to get DMA working with MPC5200 (TQM5200) and CompactFlash

2010-03-28 Thread Josh Triplett
On Sat, Mar 27, 2010 at 02:22:08PM +0100, Albrecht Dreß wrote:
 Am 26.03.10 23:59 schrieb(en) Josh Triplett:
 [snip]
 Any other ideas for things we could check to try to track down this problem?
 
 Might your issue be related to this thread: 
 http://lists.ozlabs.org/pipermail/linuxppc-dev/2009-December/078757.html?

We have the MPC5200C rev of the board, not the MPC5200B rev which
apparently had many problems like the ones described in that thread.  I
can't rule out other crazy board errata we don't know about, though. :)

- Josh Triplett
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[PATCH v3] powerpc/fsl: Add multiple MSI bank support

2010-03-28 Thread Kumar Gala
From: Lan Chunhe-B25806 b25...@freescale.com

Freescale QorIQ P4080 has three MSI banks and the original code
can not work well. This patch adds multiple MSI banks support for
Freescale processor.

Signed-off-by: Lan Chunhe-B25806 b25...@freescale.com
Signed-off-by: Roy Zang tie-fei.z...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
v3:
* Fixed whitespace issues

v2:
* Dropped check in fsl_setup_msi_irqs for NO_IRQ per Michael E's comments
* if ppc_md.setup_msi_irqs is already set treat as a -ENODEV, removed comment

 arch/powerpc/sysdev/fsl_msi.c |   40 +---
 1 files changed, 25 insertions(+), 15 deletions(-)

diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index e094367..afbcc12 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2007-2008 Freescale Semiconductor, Inc. All rights reserved.
+ * Copyright (C) 2007-2010 Freescale Semiconductor, Inc.
  *
  * Author: Tony Li tony...@freescale.com
  *Jason Jin jason@freescale.com
@@ -28,7 +28,6 @@ struct fsl_msi_feature {
u32 msiir_offset;
 };
 
-static struct fsl_msi *fsl_msi;
 
 static inline u32 fsl_msi_read(u32 __iomem *base, unsigned int reg)
 {
@@ -53,10 +52,12 @@ static struct irq_chip fsl_msi_chip = {
 static int fsl_msi_host_map(struct irq_host *h, unsigned int virq,
irq_hw_number_t hw)
 {
+   struct fsl_msi *msi_data = h-host_data;
struct irq_chip *chip = fsl_msi_chip;
 
irq_to_desc(virq)-status |= IRQ_TYPE_EDGE_FALLING;
 
+   set_irq_chip_data(virq, msi_data);
set_irq_chip_and_handler(virq, chip, handle_edge_irq);
 
return 0;
@@ -95,11 +96,12 @@ static int fsl_msi_check_device(struct pci_dev *pdev, int 
nvec, int type)
 static void fsl_teardown_msi_irqs(struct pci_dev *pdev)
 {
struct msi_desc *entry;
-   struct fsl_msi *msi_data = fsl_msi;
+   struct fsl_msi *msi_data;
 
list_for_each_entry(entry, pdev-msi_list, list) {
if (entry-irq == NO_IRQ)
continue;
+   msi_data = get_irq_chip_data(entry-irq);
set_irq_msi(entry-irq, NULL);
msi_bitmap_free_hwirqs(msi_data-bitmap,
   virq_to_hw(entry-irq), 1);
@@ -110,9 +112,10 @@ static void fsl_teardown_msi_irqs(struct pci_dev *pdev)
 }
 
 static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq,
- struct msi_msg *msg)
+   struct msi_msg *msg,
+   struct fsl_msi *fsl_msi_data)
 {
-   struct fsl_msi *msi_data = fsl_msi;
+   struct fsl_msi *msi_data = fsl_msi_data;
struct pci_controller *hose = pci_bus_to_host(pdev-bus);
u32 base = 0;
 
@@ -133,9 +136,11 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int 
nvec, int type)
unsigned int virq;
struct msi_desc *entry;
struct msi_msg msg;
-   struct fsl_msi *msi_data = fsl_msi;
+   struct fsl_msi *msi_data;
 
list_for_each_entry(entry, pdev-msi_list, list) {
+   msi_data = get_irq_chip_data(entry-irq);
+
hwirq = msi_bitmap_alloc_hwirqs(msi_data-bitmap, 1);
if (hwirq  0) {
rc = hwirq;
@@ -155,7 +160,7 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int 
nvec, int type)
}
set_irq_msi(virq, entry);
 
-   fsl_compose_msi_msg(pdev, hwirq, msg);
+   fsl_compose_msi_msg(pdev, hwirq, msg, msi_data);
write_msi_msg(virq, msg);
}
return 0;
@@ -167,7 +172,7 @@ out_free:
 static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
 {
unsigned int cascade_irq;
-   struct fsl_msi *msi_data = fsl_msi;
+   struct fsl_msi *msi_data = get_irq_chip_data(irq);
int msir_index = -1;
u32 msir_value = 0;
u32 intr_index;
@@ -192,7 +197,7 @@ static void fsl_msi_cascade(unsigned int irq, struct 
irq_desc *desc)
cascade_irq = NO_IRQ;
 
desc-status |= IRQ_INPROGRESS;
-   switch (fsl_msi-feature  FSL_PIC_IP_MASK) {
+   switch (msi_data-feature  FSL_PIC_IP_MASK) {
case FSL_PIC_IP_MPIC:
msir_value = fsl_msi_read(msi_data-msi_regs,
msir_index * 0x10);
@@ -306,15 +311,20 @@ static int __devinit fsl_of_msi_probe(struct of_device 
*dev,
if (virt_msir != NO_IRQ) {
set_irq_data(virt_msir, (void *)i);
set_irq_chained_handler(virt_msir, fsl_msi_cascade);
+   set_irq_chip_data(virt_msir, msi);
}
}
 
-   fsl_msi = msi;
-
-   WARN_ON(ppc_md.setup_msi_irqs);
-   ppc_md.setup_msi_irqs = fsl_setup_msi_irqs;
-   ppc_md.teardown_msi_irqs = fsl_teardown_msi_irqs;

Re: question about drivers/macintosh/windfarm_pm91.c

2010-03-28 Thread Benjamin Herrenschmidt
On Sun, 2010-03-28 at 23:56 +0200, Julia Lawall wrote:
 I'll send something tomorrow.  I will perhaps keep the ifs, to
 maintain the style of the rest of the function.

Nah, remove them please or some janitor will send -another- patch :-)

Cheers,
Ben.


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Re: Problem with PCI bus rescan on 460EX

2010-03-28 Thread Yinghai Lu
On Sun, Mar 28, 2010 at 2:13 AM, Felix Radensky fe...@embedded-sol.com wrote:
 Hello, Kenji-san

 I've tried Jesse's tree with Yinghai's patches, but they don't seem to help.
 Memory for bridge is not allocated after insertion of hotplug device and
 bus rescan. Attached dmesg output in case of success and failure.

that patches only take care of pcie hotplug path...

and it calls
pci_assign_unassigned_bridge_resources(bridge)
instead of
pci_bus_assign_resources(bus)

so it doesn't check pci_is_enabled()

maybe  We can update rescan path to check if it is safe to skip the
pci_is_enabled() too.
  - no driver for those devices under that bridge are loaded.

YH
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