Re: MPC831x (and others?) NAND erase performance improvements
On Mon, 6 Dec 2010 22:15:54 -0500 Mark Mason ma...@postdiluvian.org wrote: A few months ago I ran into some performance problems involving UBI/NAND erases holding other devices off the LBC on an MPC8315. I found a solution for this, which worked well, at least with the hardware I was working with. I suspect the same problem affects other PPCs, probably including multicore devices, and maybe other architectures as well. I don't have experience with similar NAND controllers on other devices, so I'd like to explain what I found and see if someone who's more familiar with the family and/or driver can tell if this is useful. The problem cropped up when there was a lot of traffic to the NAND (Samsung K9WAGU08U1B-PIB0), with the NAND being on the LBC along with a video chip that needed constant and prompt attention. If you attach NAND to the LBC, you should not attach anything else to it which is latency-sensitive. This feature makes the LBC useless to us. Is there some workaround or plan to address this limitation? Jocke ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: Getting the IRQ number (Was: Basic driver devel questions ?)
Thanks again for your detailed answer,
I'm learning, but not as fast as my colleagues with a deadline want me to !
The platform code does that. That function create devices on the
platform bus by examining the device tree. It looks for nodes that are
compatible with the compatible strings you give it, and treats them as
busses, ie. creates devices for all child nodes of those nodes.
Is there a way to enable some debug output from it, to see what's going on ?
...hmm I had to git pull in order for this to compile your snippet.
That's really recent! Unfortunately i need to reflash my device with the
new kernel before i can begin testing my module.
It shouldn't be that recent, what kernel version were you using?
I had to go from 2.6.34 to 2.6.35, xilinx git tree.
Yes sorry, that's a cut paste bug, between the old and new style code.
No worries, I knew it was some uncompiled example.
platform_device_register() creates a device on the platform bus. You
then write a driver for that device, and register it with
platform_driver_register(), your driver then attaches to the device.
In this case though you don't need to call platform_device_register()
because the device has already been created, using the device tree (by
of_platform_bus_probe()).
OK, I'll have to remove it from my sample code below.
In general on powerpc we don't use platform_device_register() much,
instead things are described in the device tree and devices are created
for them.
platform_device_register() tends to be for cases where you can't
discover or probe a device, but you know that it exists.
When you see something in /sys/devices/plb.0/, it means that you don't need
platform_device_register, right ?
Yes, make tags, then use vim :)
Great, that works.
OK, here's the relevant part of my code, ripped directly from your sample,
with a few additions and different variable names. Why do you think
xad_driver_probe() is not being called ?
#include linux/kernel.h
#include linux/init.h
#include asm/device.h
#include linux/platform_device.h
#include linux/cdev.h // char device
#include linux/fs.h
#include linux/of.h
#include linux/interrupt.h
#define DEVNAME xps-acqui-data
#define NAME xad // This is only used for printk
#define SD {%s %d}
#define FL , __func__, __LINE__
static dev_t first;
static unsigned int count = 1;
static int my_major = 241, my_minor = 0;
// You must run mknod /dev/xad c 241 0 in a shell at least once
struct cdev *my_cdev=NULL;
struct platform_device *pdev=NULL;
typedef struct XadDevice {
struct resource *hw_region;
struct device *dev;
int irq;
} tXadDevice;
tXadDevice Xad;
// There should be something in:
// ll /sys/devices/plb.0/c980.xps-acqui-data
static const struct of_device_id xad_device_id[] = {
{ .compatible = xlnx,xps-acqui-data-3.00.a }, // Must match
the DTS
{}
};
static irqreturn_t XadIsr(int irq, void *dev_id) {
printk(KERN_INFO SD IRQ:%d\n FL, irq);
return IRQ_HANDLED;
}
///
// Platform Bus Support
///
static int xad_driver_probe(struct platform_device *device /*,
const struct of_device_id *device_id*/ ) {
struct device_node *dn = device-dev.of_node;
int rc;
pr_devel(Probing %s\n, dn-full_name);
Xad.irq = irq_of_parse_and_map(dn, 0);
rc=request_irq(Xad.irq, XadIsr, IRQF_TRIGGER_RISING | IRQF_DISABLED,
XadIsr, Xad);
if (rc) printk(KERN_INFO SD Failled IRQ request: %d\n FL, rc);
return 0;
}
static int __devexit xad_driver_remove(struct platform_device *device) {
printk(KERN_INFO SD Removing...\n FL);
return 0;
}
static struct platform_driver xad_driver = {
.probe = xad_driver_probe,
.remove = xad_driver_remove,
.driver = {
.owner = THIS_MODULE,
.name = xad-driver,
.of_match_table = xad_device_id,
},
};
///
// This section deals with the /dev/xad device
///
static int xad_open(struct inode *node, struct file *filep) {
printk (KERN_INFO SD OPENING device: %s\n FL, NAME);
return 0;
}
static int xad_release(struct inode *node, struct file *filep) {
printk (KERN_INFO SD RELEASING device: %s\n FL, NAME);
return 0;
}
static int xad_ioctl(struct inode *node, struct file *filep, unsigned int cmd,
unsigned long arg) {
printk (KERN_INFO SD IOCTL on device: %s, cmd:%d, arg:%lu\n FL, NAME, cmd,
arg);
return 0;
}
static struct file_operations fops = {
.owner = THIS_MODULE,
.open= xad_open,
.release = xad_release,
.ioctl = xad_ioctl,
};
///
// Called on insmod
static int __init xad_init(void) {
int
[PATCH] powerpc: Fix incorrect comment about interrupt stack allocation
We now allow interrupt stacks anywhere in the first segment which can be
256M or 1TB. Fix the comment.
Signed-off-by: Anton Blanchard an...@samba.org
---
Index: powerpc.git/arch/powerpc/kernel/setup_64.c
===
--- powerpc.git.orig/arch/powerpc/kernel/setup_64.c 2010-08-19
09:05:17.090741942 +1000
+++ powerpc.git/arch/powerpc/kernel/setup_64.c 2010-08-19 09:06:08.151991499
+1000
@@ -428,8 +428,8 @@ static void __init irqstack_early_init(v
unsigned int i;
/*
-* interrupt stacks must be under 256MB, we cannot afford to take
-* SLB misses on them.
+* Interrupt stacks must be in the first segment since we
+* cannot afford to take SLB misses on them.
*/
for_each_possible_cpu(i) {
softirq_ctx[i] = (struct thread_info *)
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Re: Getting the IRQ number (Was: Basic driver devel questions ?)
On Wed, 2010-12-08 at 11:18 +0100, Guillaume Dargaud wrote:
Thanks again for your detailed answer,
I'm learning, but not as fast as my colleagues with a deadline want me to !
:)
The platform code does that. That function create devices on the
platform bus by examining the device tree. It looks for nodes that are
compatible with the compatible strings you give it, and treats them as
busses, ie. creates devices for all child nodes of those nodes.
Is there a way to enable some debug output from it, to see what's going on ?
Not really, but there probably should be.
...hmm I had to git pull in order for this to compile your snippet.
That's really recent! Unfortunately i need to reflash my device with the
new kernel before i can begin testing my module.
It shouldn't be that recent, what kernel version were you using?
I had to go from 2.6.34 to 2.6.35, xilinx git tree.
Ah that is the problem I think.
Sorry I assumed you were working on mainline. In 2.6.35 you still need
to use an of_platform_driver, I'll describe below.
platform_device_register() tends to be for cases where you can't
discover or probe a device, but you know that it exists.
When you see something in /sys/devices/plb.0/, it means that you don't need
platform_device_register, right ?
That's right.
Yes, make tags, then use vim :)
Great, that works.
Cool.
OK, here's the relevant part of my code, ripped directly from your sample,
with a few additions and different variable names. Why do you think
xad_driver_probe() is not being called ?
As I said above in 2.6.35 platform drivers and of_platform drivers were
still separate. So your device is on the of_platform_bus (ie. was
discovered using the device tree), but your driver is on the
platform_bus. Yes this is very confusing.
So basically you need to change all occurrences of platform_driver to
of_platform_driver.
#include linux/kernel.h
#include linux/init.h
#include asm/device.h
#include linux/platform_device.h
#include linux/cdev.h // char device
#include linux/fs.h
#include linux/of.h
#include linux/interrupt.h
#define DEVNAME xps-acqui-data
#define NAME xad // This is only used for printk
#define SD {%s %d}
#define FL , __func__, __LINE__
static dev_t first;
static unsigned int count = 1;
static int my_major = 241, my_minor = 0;
// You must run mknod /dev/xad c 241 0 in a shell at least once
struct cdev *my_cdev=NULL;
struct platform_device *pdev=NULL;
typedef struct XadDevice {
struct resource *hw_region;
struct device *dev;
int irq;
} tXadDevice;
tXadDevice Xad;
// There should be something in:
// ll /sys/devices/plb.0/c980.xps-acqui-data
static const struct of_device_id xad_device_id[] = {
{ .compatible = xlnx,xps-acqui-data-3.00.a }, // Must match
the DTS
{}
};
static irqreturn_t XadIsr(int irq, void *dev_id) {
printk(KERN_INFO SD IRQ:%d\n FL, irq);
return IRQ_HANDLED;
}
///
// Platform Bus Support
///
static int xad_driver_probe(struct platform_device *device /*,
const struct of_device_id *device_id*/ ) {
So you need to switch the prototype here to:
static int xad_driver_probe(struct of_platform_device *ofdev,
const struct of_device_id *device_id) {
struct device_node *dn = device-dev.of_node;
int rc;
pr_devel(Probing %s\n, dn-full_name);
Xad.irq = irq_of_parse_and_map(dn, 0);
rc=request_irq(Xad.irq, XadIsr, IRQF_TRIGGER_RISING | IRQF_DISABLED,
XadIsr, Xad);
if (rc) printk(KERN_INFO SD Failled IRQ request: %d\n FL, rc);
return 0;
}
static int __devexit xad_driver_remove(struct platform_device *device) {
printk(KERN_INFO SD Removing...\n FL);
return 0;
}
static struct platform_driver xad_driver = {
Becomes of_platform_driver
.probe = xad_driver_probe,
.remove = xad_driver_remove,
.driver = {
.owner = THIS_MODULE,
.name = xad-driver,
.of_match_table = xad_device_id,
},
};
///
// This section deals with the /dev/xad device
///
static int xad_open(struct inode *node, struct file *filep) {
printk (KERN_INFO SD OPENING device: %s\n FL, NAME);
return 0;
}
static int xad_release(struct inode *node, struct file *filep) {
printk (KERN_INFO SD RELEASING device: %s\n FL, NAME);
return 0;
}
static int xad_ioctl(struct inode *node, struct file *filep, unsigned int
cmd,
unsigned long arg) {
printk (KERN_INFO SD IOCTL on device: %s, cmd:%d, arg:%lu\n FL, NAME,
cmd,
arg);
return 0;
}
static struct file_operations fops = {
[PATCH 0/4] V3 Add ability to link device blob(s) into vmlinux
From: Dirk Brandewie dirk.brande...@gmail.com
This patch set adds the ability to link device tree blobs into
vmlinux.
Patch 1 implements the changes to include/asm-generic/vmlinux.lds.h and
adds a generic rule for generating DTB objects to be linked vmlinux.
Patch 2 implements linking a DTB into an x86 image.
Patch 3-4 move {powerpc,microblaze}/boot/Makefile to use the dtc rule
in patch 1.
This patch set has been tested on x86.
Powerpc and Microblaze have been compile tested with and without patch
3 and 4 applied.
Changes from V1:
Documentation added for dtc command in Makefile.lib to
Documentation/kbuild/makefiles.txt
Separate DTB_ALIGNMENT define removed.
FORCE removed from dtc rule.
Removed hardcoded path to dts files from dtc command.
Moved %.dtb: %.dts rule to arch specific makefiles.
Patch for adding kernel command line option to pass in dtb_compat
string dropped from this set will be submitted seperately.
Changes from V2:
Rule to create assembly wrapper for blob changed to use Sam Ravnborgs
suggested implementation.
Rules in architecture specific Makefiles changed to use the cmd
function instead of the if_changed function.
Dirk Brandewie (4):
of: Add support for linking device tree blobs into vmlinux
x86/of: Add building device tree blob(s) into image.
of/powerpc: Use generic rule to build dtb's
microblaze/of: Use generic rule to build dtb's
Documentation/kbuild/makefiles.txt | 15 +++
arch/microblaze/boot/Makefile | 12 +++-
arch/powerpc/boot/Makefile |8 +++-
arch/x86/platform/ce4100/Makefile | 10 ++
include/asm-generic/vmlinux.lds.h | 13 +++--
scripts/Makefile.lib | 23 +++
6 files changed, 65 insertions(+), 16 deletions(-)
--
1.7.2.3
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[PATCH 1/4] of: Add support for linking device tree blobs into vmlinux
From: Dirk Brandewie dirk.brande...@gmail.com This patch adds support for linking device tree blob(s) into vmlinux. Modifies asm-generic/vmlinux.lds.h to add linking .dtb sections into vmlinux. To maintain compatiblity with the of/fdt driver code platforms MUST copy the blob to a non-init memory location before the kernel frees the .init.* sections in the image. Modifies scripts/Makefile.lib to add a kbuild command to compile DTS files to device tree blobs and a rule to create objects to wrap the blobs for linking. STRUCT_ALIGNMENT is defined in vmlinux.lds.h for use in the rule to create wrapper objects for the dtb in Makefile.lib. The STRUCT_ALIGN() macro in vmlinux.lds.h is modified to use the STRUCT_ALIGNMENT definition. The DTB's are placed on 32 byte boundries to allow parsing the blob with driver/of/fdt.c during early boot without having to copy the blob to get the structure alignment GCC expects. A DTB is linked in by adding the DTB object to the list of objects to be linked into vmlinux in the archtecture specific Makefile using obj-y += foo.dtb.o Signed-off-by: Dirk Brandewie dirk.brande...@gmail.com --- Documentation/kbuild/makefiles.txt | 15 +++ include/asm-generic/vmlinux.lds.h | 13 +++-- scripts/Makefile.lib | 23 +++ 3 files changed, 49 insertions(+), 2 deletions(-) diff --git a/Documentation/kbuild/makefiles.txt b/Documentation/kbuild/makefiles.txt index 0ef00bd..86e3cd0 100644 --- a/Documentation/kbuild/makefiles.txt +++ b/Documentation/kbuild/makefiles.txt @@ -1136,6 +1136,21 @@ When kbuild executes, the following steps are followed (roughly): resulting in the target file being recompiled for no obvious reason. +dtc + Create flattend device tree blob object suitable for linking + into vmlinux. Device tree blobs linked into vmlinux are placed + in an init section in the image. Platform code *must* copy the + blob to non-init memory prior to calling unflatten_device_tree(). + + Example: + #arch/x86/platform/ce4100/Makefile + clean-files := *dtb.S + + DTC_FLAGS := -p 1024 + obj-y += foo.dtb.o + + $(obj)/%.dtb: $(src)/%.dts + $(call cmd,dtc) --- 6.7 Custom kbuild commands diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h index bd69d79..05cbad0 100644 --- a/include/asm-generic/vmlinux.lds.h +++ b/include/asm-generic/vmlinux.lds.h @@ -67,7 +67,8 @@ * Align to a 32 byte boundary equal to the * alignment gcc 4.5 uses for a struct */ -#define STRUCT_ALIGN() . = ALIGN(32) +#define STRUCT_ALIGNMENT 32 +#define STRUCT_ALIGN() . = ALIGN(STRUCT_ALIGNMENT) /* The actual configuration determine if the init/exit sections * are handled as text/data or they can be discarded (which @@ -146,6 +147,13 @@ #define TRACE_SYSCALLS() #endif + +#define KERNEL_DTB() \ + STRUCT_ALIGN(); \ + VMLINUX_SYMBOL(__dtb_start) = .;\ + *(.dtb.init.rodata) \ + VMLINUX_SYMBOL(__dtb_end) = .; + /* .data section */ #define DATA_DATA \ *(.data)\ @@ -468,7 +476,8 @@ MCOUNT_REC()\ DEV_DISCARD(init.rodata)\ CPU_DISCARD(init.rodata)\ - MEM_DISCARD(init.rodata) + MEM_DISCARD(init.rodata)\ + KERNEL_DTB() #define INIT_TEXT \ *(.init.text) \ diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 4c72c11..63b287c 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -200,6 +200,29 @@ quiet_cmd_gzip = GZIP$@ cmd_gzip = (cat $(filter-out FORCE,$^) | gzip -f -9 $@) || \ (rm -f $@ ; false) +# DTC +# --- + +# Generate an assembly file to wrap the output of the device tree compiler +quiet_cmd_dt_S_dtb= DTB$@ +cmd_dt_S_dtb= \ +( \ + echo '\#include asm-generic/vmlinux.lds.h'; \ + echo '.section .dtb.init.rodata,a'; \ + echo '.balign STRUCT_ALIGNMENT';\ + echo '.global __dtb_$(*F)_begin'; \ + echo '__dtb_$(*F)_begin:'; \ + echo '.incbin $ '; \ + echo '__dtb_$(*F)_end:';\ +
[PATCH 2/4] x86/of: Add building device tree blob(s) into image.
From: Dirk Brandewie dirk.brande...@gmail.com This patch adds linking device tree blob into vmlinux. DTB's are added by adding the blob object name to list of objects to be linked into the image. Signed-off-by: Dirk Brandewie dirk.brande...@gmail.com --- arch/x86/platform/ce4100/Makefile | 10 ++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/arch/x86/platform/ce4100/Makefile b/arch/x86/platform/ce4100/Makefile index 91fc929..e5f3b7b 100644 --- a/arch/x86/platform/ce4100/Makefile +++ b/arch/x86/platform/ce4100/Makefile @@ -1 +1,11 @@ obj-$(CONFIG_X86_INTEL_CE) += ce4100.o +clean-files := *dtb.S + +ifdef CONFIG_X86_OF +### +# device tree blob +obj-$(CONFIG_X86_INTEL_CE) += ce4100.dtb.o + +$(obj)/%.dtb: $(src)/%.dts + $(call cmd,dtc) +endif -- 1.7.2.3 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 3/4] of/powerpc: Use generic rule to build dtb's
From: Dirk Brandewie dirk.brande...@gmail.com Modify arch/powerpc/boot/Makefile to use dtc command in scripts/Makefile.lib Signed-off-by: Dirk Brandewie dirk.brande...@gmail.com --- arch/powerpc/boot/Makefile |8 +++- 1 files changed, 3 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile index fae8192..96deec6 100644 --- a/arch/powerpc/boot/Makefile +++ b/arch/powerpc/boot/Makefile @@ -35,7 +35,7 @@ endif BOOTCFLAGS += -I$(obj) -I$(srctree)/$(obj) -DTS_FLAGS ?= -p 1024 +DTC_FLAGS ?= -p 1024 $(obj)/4xx.o: BOOTCFLAGS += -mcpu=405 $(obj)/ebony.o: BOOTCFLAGS += -mcpu=405 @@ -332,10 +332,8 @@ $(obj)/treeImage.%: vmlinux $(obj)/%.dtb $(wrapperbits) $(call if_changed,wrap,treeboot-$*,,$(obj)/$*.dtb) # Rule to build device tree blobs -DTC = $(objtree)/scripts/dtc/dtc - -$(obj)/%.dtb: $(dtstree)/%.dts - $(DTC) -O dtb -o $(obj)/$*.dtb -b 0 $(DTS_FLAGS) $(dtstree)/$*.dts +$(obj)/%.dtb: $(src)/dts/%.dts + $(call cmd,dtc) # If there isn't a platform selected then just strip the vmlinux. ifeq (,$(image-y)) -- 1.7.2.3 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 4/4] microblaze/of: Use generic rule to build dtb's
From: Dirk Brandewie dirk.brande...@gmail.com Modify arch/powerpc/boot/Makefile to use dtc command in scripts/Makefile.lib Signed-off-by: Dirk Brandewie dirk.brande...@gmail.com --- arch/microblaze/boot/Makefile | 12 +++- 1 files changed, 3 insertions(+), 9 deletions(-) diff --git a/arch/microblaze/boot/Makefile b/arch/microblaze/boot/Makefile index be01d78..4c4e58e 100644 --- a/arch/microblaze/boot/Makefile +++ b/arch/microblaze/boot/Makefile @@ -10,9 +10,6 @@ targets := linux.bin linux.bin.gz simpleImage.% OBJCOPYFLAGS := -O binary -# Where the DTS files live -dtstree := $(srctree)/$(src)/dts - # Ensure system.dtb exists $(obj)/linked_dtb.o: $(obj)/system.dtb @@ -51,14 +48,11 @@ $(obj)/simpleImage.%: vmlinux FORCE $(call if_changed,strip) @echo 'Kernel: $@ is ready' ' (#'`cat .version`')' -# Rule to build device tree blobs -DTC = $(objtree)/scripts/dtc/dtc # Rule to build device tree blobs -quiet_cmd_dtc = DTC $@ - cmd_dtc = $(DTC) -O dtb -o $(obj)/$*.dtb -b 0 -p 1024 $(dtstree)/$*.dts +DTC_FLAGS := -p 1024 -$(obj)/%.dtb: $(dtstree)/%.dts FORCE - $(call if_changed,dtc) +$(obj)/%.dtb: $(src)/dts/%.dts FORCE + $(call cmd,dtc) clean-files += *.dtb simpleImage.*.unstrip linux.bin.ub -- 1.7.2.3 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2] powerpc, 5200: add support for charon board
On Tue, Dec 07, 2010 at 07:58:55AM +0100, Heiko Schocher wrote: Signed-off-by: Heiko Schocher h...@denx.de Reviewed-by: Wolfram Sang w.s...@pengutronix.de -- Pengutronix e.K. | Wolfram Sang| Industrial Linux Solutions | http://www.pengutronix.de/ | signature.asc Description: Digital signature ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: Getting the IRQ number (Was: Basic driver devel questions ?)
Sorry I assumed you were working on mainline. In 2.6.35 you still need to use an of_platform_driver, I'll describe below. So basically you need to change all occurrences of platform_driver to of_platform_driver. OK, thanks, I did that, compiled and ran the driver and its test prog... no changes: xad_driver_probe() doesn't get called. ...? -- Guillaume Dargaud http://www.gdargaud.net/Antarctica/ ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: MPC831x (and others?) NAND erase performance improvements
On Wed, 8 Dec 2010 08:59:49 +0100 Joakim Tjernlund joakim.tjernl...@transmode.se wrote: On Mon, 6 Dec 2010 22:15:54 -0500 Mark Mason ma...@postdiluvian.org wrote: A few months ago I ran into some performance problems involving UBI/NAND erases holding other devices off the LBC on an MPC8315. I found a solution for this, which worked well, at least with the hardware I was working with. I suspect the same problem affects other PPCs, probably including multicore devices, and maybe other architectures as well. I don't have experience with similar NAND controllers on other devices, so I'd like to explain what I found and see if someone who's more familiar with the family and/or driver can tell if this is useful. The problem cropped up when there was a lot of traffic to the NAND (Samsung K9WAGU08U1B-PIB0), with the NAND being on the LBC along with a video chip that needed constant and prompt attention. If you attach NAND to the LBC, you should not attach anything else to it which is latency-sensitive. This feature makes the LBC useless to us. Is there some workaround or plan to address this limitation? Complain to your support or sales contact. I've complained about it in the past, and got a but pins are a limited resource! response. They need to hear that it's a problem from customers. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: MPC831x (and others?) NAND erase performance improvements
Scott Wood scottw...@freescale.com wrote on 2010/12/08 18:18:39: On Wed, 8 Dec 2010 08:59:49 +0100 Joakim Tjernlund joakim.tjernl...@transmode.se wrote: On Mon, 6 Dec 2010 22:15:54 -0500 Mark Mason ma...@postdiluvian.org wrote: A few months ago I ran into some performance problems involving UBI/NAND erases holding other devices off the LBC on an MPC8315. I found a solution for this, which worked well, at least with the hardware I was working with. I suspect the same problem affects other PPCs, probably including multicore devices, and maybe other architectures as well. I don't have experience with similar NAND controllers on other devices, so I'd like to explain what I found and see if someone who's more familiar with the family and/or driver can tell if this is useful. The problem cropped up when there was a lot of traffic to the NAND (Samsung K9WAGU08U1B-PIB0), with the NAND being on the LBC along with a video chip that needed constant and prompt attention. If you attach NAND to the LBC, you should not attach anything else to it which is latency-sensitive. This feature makes the LBC useless to us. Is there some workaround or plan to address this limitation? Complain to your support or sales contact. I've complained about it in the past, and got a but pins are a limited resource! response. They need to hear that it's a problem from customers. Done, lets see what I get in return. I think this problem will be a major obstacle for our next generation boards which will be NAND based. Jocke ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: MPC831x (and others?) NAND erase performance improvements
Joakim Tjernlund joakim.tjernl...@transmode.se wrote: Scott Wood scottw...@freescale.com wrote on 2010/12/08 18:18:39: On Wed, 8 Dec 2010 08:59:49 +0100 Joakim Tjernlund joakim.tjernl...@transmode.se wrote: On Mon, 6 Dec 2010 22:15:54 -0500 Mark Mason ma...@postdiluvian.org wrote: A few months ago I ran into some performance problems involving UBI/NAND erases holding other devices off the LBC on an MPC8315. I found a solution for this, which worked well, at least with the hardware I was working with. I suspect the same problem affects other PPCs, probably including multicore devices, and maybe other architectures as well. I don't have experience with similar NAND controllers on other devices, so I'd like to explain what I found and see if someone who's more familiar with the family and/or driver can tell if this is useful. The problem cropped up when there was a lot of traffic to the NAND (Samsung K9WAGU08U1B-PIB0), with the NAND being on the LBC along with a video chip that needed constant and prompt attention. If you attach NAND to the LBC, you should not attach anything else to it which is latency-sensitive. This feature makes the LBC useless to us. Is there some workaround or plan to address this limitation? Complain to your support or sales contact. I've complained about it in the past, and got a but pins are a limited resource! response. They need to hear that it's a problem from customers. Done, lets see what I get in return. I think this problem will be a major obstacle for our next generation boards which will be NAND based. It was a big problem, and a big surprise, for me too. The next generation of a couple of the chips on the bus have pcie, but those are noticably more expensive. Another problem I ran into was that the DMA performance from a non-incrementing address was abysmal, PIO turned out to be significantly faster. I guess internally the bus does an entire cacheline transfer for every word read from a fixed address, or something like that. I was doing DMA from a device that had only six address bits, it should have been in the middle of the bus with the bottom address pins not connected, which would have allowed incrementing address DMA. The transfer speed wasn't so much of a problem, but the longer transfers meant that there was that much less bus bandwidth for the other devices, so we wound up sacrificing CPU to get more bus bandwidth. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: Getting the IRQ number (Was: Basic driver devel questions ?)
Hi Guillaume,
Michael Ellerman wrote:
On Wed, 2010-12-08 at 11:18 +0100, Guillaume Dargaud wrote:
///
// Called on insmod
static int __init xad_init(void) {
int rc=0;
printk(KERN_INFO SD Module %s: loading...\n FL, NAME);
Are you sure that you want to have the chrdev registration here (the
following code)?
Such stuff typically goes into the probe() function. The modules's
init() just registers the driver. Furthermore your global variables
prohibit having more than one device instance using the driver.
// Deal with the device
first = MKDEV (my_major, my_minor);
register_chrdev_region(first, count, DEVNAME);
my_cdev = cdev_alloc ();
if (NULL==my_cdev) goto Err;
cdev_init(my_cdev, fops);
cdev_add (my_cdev, first, count);
printk(KERN_INFO SD Module %s: Major=%d, Minor=%d, Count=%d\n FL, NAME,
my_major, my_minor, count);
// Driver
rc = platform_driver_register(xad_driver);
Should be of_register_platform_driver()
// rc = platform_driver_probe(xad_driver, xad_driver_probe);
if (rc) goto err_plat;
I think the following function call to platform_device_register_simple()
and if() does not belong here.
As was said before, devices are registered by the (platform) bus. Your
driver module, needs to just register, well, the driver. You are doing
this above - and that's it: (of_)platform_driver_register().
// Device
pdev=platform_device_register_simple(xps-acqui-data, -1, NULL, 0);
if (IS_ERR(pdev)) {
rc = PTR_ERR(pdev);
platform_driver_unregister(xad_driver);
goto err_plat;
}
return 0;
err_plat:
unregister_chrdev_region(first, count);
Err:
printk(KERN_ERR SD Module %s: Failed loading rc=%d\n FL, NAME, rc);
return rc;
}
Joachim
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Re: MPC831x (and others?) NAND erase performance improvements
Mark Mason ma...@postdiluvian.org wrote on 2010/12/08 20:26:16: Joakim Tjernlund joakim.tjernl...@transmode.se wrote: Scott Wood scottw...@freescale.com wrote on 2010/12/08 18:18:39: On Wed, 8 Dec 2010 08:59:49 +0100 Joakim Tjernlund joakim.tjernl...@transmode.se wrote: On Mon, 6 Dec 2010 22:15:54 -0500 Mark Mason ma...@postdiluvian.org wrote: A few months ago I ran into some performance problems involving UBI/NAND erases holding other devices off the LBC on an MPC8315. I found a solution for this, which worked well, at least with the hardware I was working with. I suspect the same problem affects other PPCs, probably including multicore devices, and maybe other architectures as well. I don't have experience with similar NAND controllers on other devices, so I'd like to explain what I found and see if someone who's more familiar with the family and/or driver can tell if this is useful. The problem cropped up when there was a lot of traffic to the NAND (Samsung K9WAGU08U1B-PIB0), with the NAND being on the LBC along with a video chip that needed constant and prompt attention. If you attach NAND to the LBC, you should not attach anything else to it which is latency-sensitive. This feature makes the LBC useless to us. Is there some workaround or plan to address this limitation? Complain to your support or sales contact. I've complained about it in the past, and got a but pins are a limited resource! response. They need to hear that it's a problem from customers. Done, lets see what I get in return. I think this problem will be a major obstacle for our next generation boards which will be NAND based. It was a big problem, and a big surprise, for me too. The next generation of a couple of the chips on the bus have pcie, but those are noticably more expensive. Can you think of any workaround such as not connecting the BUSY pin at all? ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: MPC831x (and others?) NAND erase performance improvements
On Wed, 8 Dec 2010 20:57:03 +0100 Joakim Tjernlund joakim.tjernl...@transmode.se wrote: Mark Mason ma...@postdiluvian.org wrote on 2010/12/08 20:26:16: Joakim Tjernlund joakim.tjernl...@transmode.se wrote: Scott Wood scottw...@freescale.com wrote on 2010/12/08 18:18:39: On Wed, 8 Dec 2010 08:59:49 +0100 Joakim Tjernlund joakim.tjernl...@transmode.se wrote: If you attach NAND to the LBC, you should not attach anything else to it which is latency-sensitive. This feature makes the LBC useless to us. Is there some workaround or plan to address this limitation? Complain to your support or sales contact. I've complained about it in the past, and got a but pins are a limited resource! response. They need to hear that it's a problem from customers. Done, lets see what I get in return. I think this problem will be a major obstacle for our next generation boards which will be NAND based. It was a big problem, and a big surprise, for me too. The next generation of a couple of the chips on the bus have pcie, but those are noticably more expensive. Can you think of any workaround such as not connecting the BUSY pin at all? Maybe connect the busy pin to a gpio? -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 5/5] of/device: Show even unavailable nodes in procfs
Use the new raw of_get_next_child() variant so all device tree nodes
will appear in procfs.
Signed-off-by: Hollis Blanchard hollis_blanch...@mentor.com
Signed-off-by: Deepak Saxena deepak_sax...@mentor.com
---
fs/proc/proc_devtree.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/fs/proc/proc_devtree.c b/fs/proc/proc_devtree.c
index d9396a4..aa914eb 100644
--- a/fs/proc/proc_devtree.c
+++ b/fs/proc/proc_devtree.c
@@ -188,7 +188,7 @@ void proc_device_tree_add_node(struct device_node *np,
const char *p;
set_node_proc_entry(np, de);
- for (child = NULL; (child = of_get_next_child(np, child));) {
+ for (child = NULL; (child = _of_get_next_child(np, child));) {
/* Use everything after the last slash, or the full name */
p = strrchr(child-full_name, '/');
if (!p)
--
1.6.3.3
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[PATCH 1/5] of/device: Centralize checking of 'status' properties
Don't call any of_platform_driver's probe() function if the device node is not accessible (as denoted in the status property). Signed-off-by: Hollis Blanchard hollis_blanch...@mentor.com Signed-off-by: Deepak Saxena deepak_sax...@mentor.com --- arch/powerpc/platforms/83xx/suspend.c |3 --- drivers/mmc/host/sdhci-of-core.c |3 --- drivers/net/gianfar.c |2 +- drivers/net/ibm_newemac/core.c|2 +- drivers/of/platform.c |7 +-- 5 files changed, 7 insertions(+), 10 deletions(-) diff --git a/arch/powerpc/platforms/83xx/suspend.c b/arch/powerpc/platforms/83xx/suspend.c index 75ae77f..a5a54aa 100644 --- a/arch/powerpc/platforms/83xx/suspend.c +++ b/arch/powerpc/platforms/83xx/suspend.c @@ -326,9 +326,6 @@ static int pmc_probe(struct platform_device *ofdev, struct pmc_type *type = match-data; int ret = 0; - if (!of_device_is_available(np)) - return -ENODEV; - has_deep_sleep = type-has_deep_sleep; immrbase = get_immrbase(); pmc_dev = ofdev; diff --git a/drivers/mmc/host/sdhci-of-core.c b/drivers/mmc/host/sdhci-of-core.c index c51b711..51218d4 100644 --- a/drivers/mmc/host/sdhci-of-core.c +++ b/drivers/mmc/host/sdhci-of-core.c @@ -126,9 +126,6 @@ static int __devinit sdhci_of_probe(struct platform_device *ofdev, int size; int ret; - if (!of_device_is_available(np)) - return -ENODEV; - host = sdhci_alloc_host(ofdev-dev, sizeof(*of_host)); if (IS_ERR(host)) return -ENOMEM; diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c index d1bec62..9918914 100644 --- a/drivers/net/gianfar.c +++ b/drivers/net/gianfar.c @@ -620,7 +620,7 @@ static int gfar_of_init(struct platform_device *ofdev, struct net_device **pdev) unsigned int num_tx_qs, num_rx_qs; u32 *tx_queues, *rx_queues; - if (!np || !of_device_is_available(np)) + if (!np) return -ENODEV; /* parse the num of tx and rx queues */ diff --git a/drivers/net/ibm_newemac/core.c b/drivers/net/ibm_newemac/core.c index 06bb9b7..290fff2 100644 --- a/drivers/net/ibm_newemac/core.c +++ b/drivers/net/ibm_newemac/core.c @@ -2732,7 +2732,7 @@ static int __devinit emac_probe(struct platform_device *ofdev, * property here for now, but new flat device trees should set a * status property to disabled instead. */ - if (of_get_property(np, unused, NULL) || !of_device_is_available(np)) + if (of_get_property(np, unused, NULL)) return -ENODEV; /* Find ourselves in the bootlist if we are there */ diff --git a/drivers/of/platform.c b/drivers/of/platform.c index 5b4a07f..14370a0 100644 --- a/drivers/of/platform.c +++ b/drivers/of/platform.c @@ -56,7 +56,10 @@ static int platform_driver_probe_shim(struct platform_device *pdev) * come up empty. Return -EINVAL in this case so other drivers get * the chance to bind. */ match = of_match_device(pdev-dev.driver-of_match_table, pdev-dev); - return match ? ofpdrv-probe(pdev, match) : -EINVAL; + if (match of_device_is_available(pdev-dev.of_node)) + return ofpdrv-probe(pdev, match); + + return -EINVAL; } static void platform_driver_shutdown_shim(struct platform_device *pdev) @@ -142,7 +145,7 @@ static int of_platform_device_probe(struct device *dev) of_dev_get(of_dev); match = of_match_device(drv-driver.of_match_table, dev); - if (match) + if (match of_device_is_available(dev-of_node)) error = drv-probe(of_dev, match); if (error) of_dev_put(of_dev); -- 1.6.3.3 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 2/5] of/device: make for_each_node* check status properties
Some early device drivers don't actually implement a struct of_platform_driver,
and instead use the for_each_node* iterators to search for matching device
nodes. Disabled device nodes will no longer be returned by these iterators.
Signed-off-by: Hollis Blanchard hollis_blanch...@mentor.com
Signed-off-by: Deepak Saxena deepak_sax...@mentor.com
---
arch/powerpc/kernel/pci_of_scan.c |2 --
arch/powerpc/platforms/83xx/usb.c |2 +-
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 13 ++---
arch/powerpc/sysdev/fsl_pci.c |5 -
arch/powerpc/sysdev/ppc4xx_pci.c | 15 ---
drivers/of/base.c | 25 +++--
6 files changed, 26 insertions(+), 36 deletions(-)
diff --git a/arch/powerpc/kernel/pci_of_scan.c
b/arch/powerpc/kernel/pci_of_scan.c
index e751506..fa4f719 100644
--- a/arch/powerpc/kernel/pci_of_scan.c
+++ b/arch/powerpc/kernel/pci_of_scan.c
@@ -310,8 +310,6 @@ static void __devinit __of_scan_bus(struct device_node
*node,
/* Scan direct children */
for_each_child_of_node(node, child) {
pr_debug( * %s\n, child-full_name);
- if (!of_device_is_available(child))
- continue;
reg = of_get_property(child, reg, reglen);
if (reg == NULL || reglen 20)
continue;
diff --git a/arch/powerpc/platforms/83xx/usb.c
b/arch/powerpc/platforms/83xx/usb.c
index 3ba4bb7..749c70b 100644
--- a/arch/powerpc/platforms/83xx/usb.c
+++ b/arch/powerpc/platforms/83xx/usb.c
@@ -211,7 +211,7 @@ int mpc837x_usb_cfg(void)
int ret = 0;
np = of_find_compatible_node(NULL, NULL, fsl-usb2-dr);
- if (!np || !of_device_is_available(np))
+ if (!np)
return -ENODEV;
prop = of_get_property(np, phy_type, NULL);
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index aa34cac..5d1a33f 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -170,10 +170,8 @@ static void __init mpc85xx_publish_qe_devices(void)
struct device_node *np;
np = of_find_compatible_node(NULL, NULL, fsl,qe);
- if (!of_device_is_available(np)) {
- of_node_put(np);
+ if (!np)
return;
- }
of_platform_bus_probe(NULL, mpc85xx_qe_ids, NULL);
}
@@ -267,11 +265,6 @@ static void __init mpc85xx_mds_qe_init(void)
return;
}
- if (!of_device_is_available(np)) {
- of_node_put(np);
- return;
- }
-
qe_reset();
of_node_put(np);
@@ -328,10 +321,8 @@ static void __init mpc85xx_mds_qeic_init(void)
struct device_node *np;
np = of_find_compatible_node(NULL, NULL, fsl,qe);
- if (!of_device_is_available(np)) {
- of_node_put(np);
+ if (!np)
return;
- }
np = of_find_compatible_node(NULL, NULL, fsl,qe-ic);
if (!np) {
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 818f7c6..fba4ec7 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -623,11 +623,6 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
is_mpc83xx_pci = 1;
- if (!of_device_is_available(dev)) {
- pr_warning(%s: disabled by the firmware.\n,
- dev-full_name);
- return -ENODEV;
- }
pr_debug(Adding PCI host bridge %s\n, dev-full_name);
/* Fetch host bridge registers address */
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index 156aa7d..cf2adec 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -321,13 +321,6 @@ static void __init ppc4xx_probe_pci_bridge(struct
device_node *np)
const int *bus_range;
int primary = 0;
- /* Check if device is enabled */
- if (!of_device_is_available(np)) {
- printk(KERN_INFO %s: Port disabled via device-tree\n,
- np-full_name);
- return;
- }
-
/* Fetch config space registers address */
if (of_address_to_resource(np, 0, rsrc_cfg)) {
printk(KERN_ERR %s: Can't get PCI config register base !,
@@ -1890,14 +1883,6 @@ static void __init ppc4xx_probe_pciex_bridge(struct
device_node *np)
port = ppc4xx_pciex_ports[portno];
port-index = portno;
- /*
-* Check if device is enabled
-*/
- if (!of_device_is_available(np)) {
- printk(KERN_INFO PCIE%d: Port disabled via device-tree\n,
port-index);
- return;
- }
-
port-node = of_node_get(np);
pval = of_get_property(np, sdr-base, NULL);
if (pval == NULL) {
diff --git a/drivers/of/base.c b/drivers/of/base.c
[PATCH 4/5] of/device: Create _of_get_next_child()
There aren't many, but some of_get_next_child() callers do need an unabridged
view of the device tree so we provide a wrapper that can be used by them.
Signed-off-by: Hollis Blanchard hollis_blanch...@mentor.com
Signed-off-by: Deepak Saxena deepak_sax...@mentor.com
---
drivers/of/base.c | 26 ++
include/linux/of.h |2 ++
2 files changed, 28 insertions(+), 0 deletions(-)
diff --git a/drivers/of/base.c b/drivers/of/base.c
index 81b2601..7bc1398 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -315,6 +315,32 @@ struct device_node *of_get_next_parent(struct device_node
*node)
}
/**
+ * _of_get_next_child - Iterate a node childs
+ * @node: parent node
+ * @prev: previous child of the parent node, or NULL to get first
+ *
+ * Returns a node pointer with refcount incremented, use
+ * of_node_put() on it when done.
+ *
+ * Unlike most other node accessors, ignores status properties.
+ */
+struct device_node *_of_get_next_child(const struct device_node *node,
+ struct device_node *prev)
+{
+ struct device_node *next;
+
+ read_lock(devtree_lock);
+ next = prev ? prev-sibling : node-child;
+ for (; next; next = next-sibling)
+ if (of_device_is_available(next) of_node_get(next))
+ break;
+ of_node_put(prev);
+ read_unlock(devtree_lock);
+ return next;
+}
+EXPORT_SYMBOL(_of_get_next_child);
+
+/**
* of_get_next_child - Iterate a node childs
* @node: parent node
* @prev: previous child of the parent node, or NULL to get first
diff --git a/include/linux/of.h b/include/linux/of.h
index cad7cf0..1fea01d 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -175,6 +175,8 @@ extern struct device_node *of_find_node_by_path(const char
*path);
extern struct device_node *of_find_node_by_phandle(phandle handle);
extern struct device_node *of_get_parent(const struct device_node *node);
extern struct device_node *of_get_next_parent(struct device_node *node);
+extern struct device_node *_of_get_next_child(const struct device_node *node,
+struct device_node *prev);
extern struct device_node *of_get_next_child(const struct device_node *node,
struct device_node *prev);
#define for_each_child_of_node(parent, child) \
--
1.6.3.3
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[PATCH 3/5] of/device: Make of_get_next_child() check status properties
We only return the next child if the device is available. Signed-off-by: Hollis Blanchard hollis_blanch...@mentor.com Signed-off-by: Deepak Saxena deepak_sax...@mentor.com --- drivers/of/base.c |4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/drivers/of/base.c b/drivers/of/base.c index 5d269a4..81b2601 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -321,6 +321,8 @@ struct device_node *of_get_next_parent(struct device_node *node) * * Returns a node pointer with refcount incremented, use * of_node_put() on it when done. + * + * Does not return nodes marked unavailable by a status property. */ struct device_node *of_get_next_child(const struct device_node *node, struct device_node *prev) @@ -330,7 +332,7 @@ struct device_node *of_get_next_child(const struct device_node *node, read_lock(devtree_lock); next = prev ? prev-sibling : node-child; for (; next; next = next-sibling) - if (of_node_get(next)) + if (of_device_is_available(next) of_node_get(next)) break; of_node_put(prev); read_unlock(devtree_lock); -- 1.6.3.3 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: MPC831x (and others?) NAND erase performance improvements
Scott Wood scottw...@freescale.com wrote on 2010/12/08 20:59:28: On Wed, 8 Dec 2010 20:57:03 +0100 Joakim Tjernlund joakim.tjernl...@transmode.se wrote: Mark Mason ma...@postdiluvian.org wrote on 2010/12/08 20:26:16: Joakim Tjernlund joakim.tjernl...@transmode.se wrote: Scott Wood scottw...@freescale.com wrote on 2010/12/08 18:18:39: On Wed, 8 Dec 2010 08:59:49 +0100 Joakim Tjernlund joakim.tjernl...@transmode.se wrote: If you attach NAND to the LBC, you should not attach anything else to it which is latency-sensitive. This feature makes the LBC useless to us. Is there some workaround or plan to address this limitation? Complain to your support or sales contact. I've complained about it in the past, and got a but pins are a limited resource! response. They need to hear that it's a problem from customers. Done, lets see what I get in return. I think this problem will be a major obstacle for our next generation boards which will be NAND based. It was a big problem, and a big surprise, for me too. The next generation of a couple of the chips on the bus have pcie, but those are noticably more expensive. Can you think of any workaround such as not connecting the BUSY pin at all? Maybe connect the busy pin to a gpio? Is BUSY required for sane operation or it an optimization? Is there any risk that the NAND device will drive the LB and corrupt the bus for other devices? I can't tell, haven't studied NAND in detail yet. Jocke ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: MPC831x (and others?) NAND erase performance improvements
On Wed, 8 Dec 2010 21:11:08 +0100 Joakim Tjernlund joakim.tjernl...@transmode.se wrote: Scott Wood scottw...@freescale.com wrote on 2010/12/08 20:59:28: On Wed, 8 Dec 2010 20:57:03 +0100 Joakim Tjernlund joakim.tjernl...@transmode.se wrote: Can you think of any workaround such as not connecting the BUSY pin at all? Maybe connect the busy pin to a gpio? Is BUSY required for sane operation or it an optimization? You could probably get away without it by inserting delays if you know the chip specs well enough. Is there any risk that the NAND device will drive the LB and corrupt the bus for other devices? I think the only thing the NAND chip should be driving is the busy pin, until nCE and nRE are lowered. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 3/5] of/device: Make of_get_next_child() check status properties
On Wed, 8 Dec 2010 11:29:44 -0800 Deepak Saxena deepak_sax...@mentor.com wrote: We only return the next child if the device is available. Signed-off-by: Hollis Blanchard hollis_blanch...@mentor.com Signed-off-by: Deepak Saxena deepak_sax...@mentor.com --- drivers/of/base.c |4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/drivers/of/base.c b/drivers/of/base.c index 5d269a4..81b2601 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -321,6 +321,8 @@ struct device_node *of_get_next_parent(struct device_node *node) * * Returns a node pointer with refcount incremented, use * of_node_put() on it when done. + * + * Does not return nodes marked unavailable by a status property. */ struct device_node *of_get_next_child(const struct device_node *node, struct device_node *prev) @@ -330,7 +332,7 @@ struct device_node *of_get_next_child(const struct device_node *node, read_lock(devtree_lock); next = prev ? prev-sibling : node-child; for (; next; next = next-sibling) - if (of_node_get(next)) + if (of_device_is_available(next) of_node_get(next)) break; of_node_put(prev); read_unlock(devtree_lock); This seems like too low-level a place to put this. Some code may know how to un-disable a device in certain situations, or it may be part of debug code trying to dump the whole device tree, etc. Looking further[1], I see a raw version of this function, but not other things like of_find_compatible_node. Could this be done more othogonally, so that the caller specifies in a parameter whether to skip based on status? -Scott [1] For some reason I received some of these patches from linuxppc-dev, and others from devicetree-discuss. I wish lists wouldn't try to be smart about discarding duplicates -- it messes with filters. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: MPC831x (and others?) NAND erase performance improvements
Scott Wood scottw...@freescale.com wrote on 2010/12/08 21:25:51: On Wed, 8 Dec 2010 21:11:08 +0100 Joakim Tjernlund joakim.tjernl...@transmode.se wrote: Scott Wood scottw...@freescale.com wrote on 2010/12/08 20:59:28: On Wed, 8 Dec 2010 20:57:03 +0100 Joakim Tjernlund joakim.tjernl...@transmode.se wrote: Can you think of any workaround such as not connecting the BUSY pin at all? Maybe connect the busy pin to a gpio? Is BUSY required for sane operation or it an optimization? You could probably get away without it by inserting delays if you know the chip specs well enough. Urgh, that does not feel like a good solution. One would have add big margins to the delays mking the NAND much slower. Is there any risk that the NAND device will drive the LB and corrupt the bus for other devices? I think the only thing the NAND chip should be driving is the busy pin, OK, good. What function is actually lost if one uses an GPIO instead of BUSY? You think Freescale could test and validate a GPIO solution? I don't think we will be very happy to design our board around an unproven workaround. An even better workaround would be if one could add logic between the NAND and the CPU which would compensate for this defect without needing special SW fixes. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: MPC831x (and others?) NAND erase performance improvements
Joakim Tjernlund joakim.tjernl...@transmode.se wrote: Is there any risk that the NAND device will drive the LB and corrupt the bus for other devices? I think the only thing the NAND chip should be driving is the busy pin, OK, good. What function is actually lost if one uses an GPIO instead of BUSY? I tried to take this route, since it was a fairly minor board change. Unfortunately all the GPIOs were already used. I looked long and hard for a way to not have the NAND hold the bus with BUSY. If you don't connect BUSY then you can't use the LBC's flash controller (FCM mode). I haven't done it personally, but I believe that connecting BUSY to a GPIO is very common thing to do, since this is the route you'd have to take if you didn't have a built-in flash controller. The Linux MTD layer supports it. An even better workaround would be if one could add logic between the NAND and the CPU which would compensate for this defect without needing special SW fixes. That probably won't work. Presumably you're talking about something like a gate so the BUSY is only passed from the NAND when the NAND's chip select is asserted. Unfortunately the NAND controller is monitoring the BUSY line, and if it sees the signal deassert then it will think the NAND is done. I don't think that using a software NAND controller instead of the LBC FCM mode is all that bad. Again, I haven't actually done it, so check the MTD docs, but I'm pretty sure the software is meant to do that, so it doesn't even really constitute a fix. Assuming that it is supported then I doubt that configuring the NAND layer to use your setup would be any harder than configuring the FCM. And, U-Boot uses the Linux MTD code, so you'd get the same support there. There might also be a way to keep the BUSY and find a workaround with the other chips on the bus, depending on what they are. Chances are that they have a BUSY, but maybe you could move the peripheral's BUSY to another LBC line and use UPM mode to interpret that line as a BUSY. Writing UPM programs isn't really all that difficult (well, not the second time you do it anyway). That's getting into kludge territory, though. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: MPC831x (and others?) NAND erase performance improvements
On Wed, 8 Dec 2010 22:26:59 +0100 Joakim Tjernlund joakim.tjernl...@transmode.se wrote: Scott Wood scottw...@freescale.com wrote on 2010/12/08 21:25:51: On Wed, 8 Dec 2010 21:11:08 +0100 Joakim Tjernlund joakim.tjernl...@transmode.se wrote: Scott Wood scottw...@freescale.com wrote on 2010/12/08 20:59:28: On Wed, 8 Dec 2010 20:57:03 +0100 Joakim Tjernlund joakim.tjernl...@transmode.se wrote: Can you think of any workaround such as not connecting the BUSY pin at all? Maybe connect the busy pin to a gpio? Is BUSY required for sane operation or it an optimization? You could probably get away without it by inserting delays if you know the chip specs well enough. Urgh, that does not feel like a good solution. No, but you asked if it could be done, and if it was just a performance issue. :-) Is there any risk that the NAND device will drive the LB and corrupt the bus for other devices? I think the only thing the NAND chip should be driving is the busy pin, OK, good. What function is actually lost if one uses an GPIO instead of BUSY? Not much, if you enable interrupts on the GPIO pin. The driver would have to be reworked a bit, of course. You think Freescale could test and validate a GPIO solution? I don't think we will be very happy to design our board around an unproven workaround. Ask your sales/support contacts. An even better workaround would be if one could add logic between the NAND and the CPU which would compensate for this defect without needing special SW fixes. The problem with that is when would you assert the chipselect again to check if it's done? Current SW depends on being able to tell the LBC to interrupt (or take other action) when busy goes away. I suppose you could poll with status reads, which could at least be preempted if you've got something higher priority to do with the LBC. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: MPC831x (and others?) NAND erase performance improvements
On Wed, 8 Dec 2010 17:02:45 -0500 Mark Mason ma...@postdiluvian.org wrote: I don't think that using a software NAND controller instead of the LBC FCM mode is all that bad. Again, I haven't actually done it, so check the MTD docs, but I'm pretty sure the software is meant to do that, so it doesn't even really constitute a fix. Assuming that it is supported then I doubt that configuring the NAND layer to use your setup would be any harder than configuring the FCM. The MTD layer supports some really simple NAND controllers, but what do you mean by not having a controller at all? Hooking everything up to GPIO? Using UPM? There is already a UPM NAND driver, BTW. You would lose hardware ECC and the ability to be interrupt-driven (the latter should be possible with SW changes, using GPIO interrupts). -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH V6 00/10] Add-Synopsys-DesignWare-HS-USB-OTG-driver
From: Tirumala Marri tma...@apm.com v6: 1. Replaced register definitions and bit fields with macros. 2. Replace printks with dev_dbg or dev_err functions. 3. Cleanup some assignments. 4. Remove chip specific selections in Kconfig file. v5: 1. PATCH V5 has a new license header from Synopsys and APM Tirumala Marri (10): USB/ppc4xx: Add Synopsys DWC OTG Register definitions USB/ppc4xx: Add Synopsys DWC OTG driver framework USB/ppc4xx: Add Synopsys DWC OTG Core Interface Layer (CIL) USB/ppc4xx: Add Synopsys DWC OTG HCD function USB/ppc4xx: Add Synopsys DWC OTG HCD interrupt function USB/ppc4xx: Add Synopsys DWC OTG HCD queue function USB/ppc4xx: Add Synopsys DWC OTG PCD function USB ppc4xx: Add Synopsys DWC OTG PCD interrupt function USB/ppc4xx:Synopsys DWC OTG driver enable gadget support USB ppc4xx: Add Synopsys DWC OTG driver kernel configuration and Makefile drivers/Makefile|2 + drivers/usb/Kconfig |3 +- drivers/usb/dwc_otg/Kconfig | 96 ++ drivers/usb/dwc_otg/Makefile| 19 + drivers/usb/dwc_otg/dwc_otg_apmppc.c| 413 ++ drivers/usb/dwc_otg/dwc_otg_cil.c | 944 drivers/usb/dwc_otg/dwc_otg_cil.h | 1215 drivers/usb/dwc_otg/dwc_otg_cil_intr.c | 617 drivers/usb/dwc_otg/dwc_otg_driver.h| 78 + drivers/usb/dwc_otg/dwc_otg_hcd.c | 2408 +++ drivers/usb/dwc_otg/dwc_otg_hcd.h | 416 ++ drivers/usb/dwc_otg/dwc_otg_hcd_intr.c | 1470 +++ drivers/usb/dwc_otg/dwc_otg_hcd_queue.c | 697 + drivers/usb/dwc_otg/dwc_otg_param.c | 182 +++ drivers/usb/dwc_otg/dwc_otg_pcd.c | 1736 ++ drivers/usb/dwc_otg/dwc_otg_pcd.h | 138 ++ drivers/usb/dwc_otg/dwc_otg_pcd_intr.c | 2278 + drivers/usb/dwc_otg/dwc_otg_regs.h | 1313 + drivers/usb/gadget/Kconfig | 22 + drivers/usb/gadget/gadget_chips.h |8 + 20 files changed, 14054 insertions(+), 1 deletions(-) create mode 100644 drivers/usb/dwc_otg/Kconfig create mode 100644 drivers/usb/dwc_otg/Makefile create mode 100644 drivers/usb/dwc_otg/dwc_otg_apmppc.c create mode 100644 drivers/usb/dwc_otg/dwc_otg_cil.c create mode 100644 drivers/usb/dwc_otg/dwc_otg_cil.h create mode 100644 drivers/usb/dwc_otg/dwc_otg_cil_intr.c create mode 100644 drivers/usb/dwc_otg/dwc_otg_driver.h create mode 100644 drivers/usb/dwc_otg/dwc_otg_hcd.c create mode 100644 drivers/usb/dwc_otg/dwc_otg_hcd.h create mode 100644 drivers/usb/dwc_otg/dwc_otg_hcd_intr.c create mode 100644 drivers/usb/dwc_otg/dwc_otg_hcd_queue.c create mode 100644 drivers/usb/dwc_otg/dwc_otg_param.c create mode 100644 drivers/usb/dwc_otg/dwc_otg_pcd.c create mode 100644 drivers/usb/dwc_otg/dwc_otg_pcd.h create mode 100644 drivers/usb/dwc_otg/dwc_otg_pcd_intr.c create mode 100644 drivers/usb/dwc_otg/dwc_otg_regs.h ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: Getting the IRQ number (Was: Basic driver devel questions ?)
On Wed, 2010-12-08 at 16:52 +0100, Guillaume Dargaud wrote: Sorry I assumed you were working on mainline. In 2.6.35 you still need to use an of_platform_driver, I'll describe below. So basically you need to change all occurrences of platform_driver to of_platform_driver. OK, thanks, I did that, compiled and ran the driver and its test prog... no changes: xad_driver_probe() doesn't get called. ...? Er. Not sure sorry. I can't see anything obviously wrong. Maybe post your driver code again. Also turn on CONFIG_DEBUG_DRIVER and see if that gives you anything interesting. cheers signature.asc Description: This is a digitally signed message part ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH V6 00/10] Add-Synopsys-DesignWare-HS-USB-OTG-driver
From: Tirumala Marri tma...@apm.com v6: 1. Replaced register definitions and bit fields with macros. 2. Replace printks with dev_dbg or dev_err functions. 3. Cleanup some assignments. 4. Remove chip specific selections in Kconfig file. v5: 1. PATCH V5 has a new license header from Synopsys and APM Tirumala Marri (10): USB/ppc4xx: Add Synopsys DWC OTG Register definitions USB/ppc4xx: Add Synopsys DWC OTG driver framework USB/ppc4xx: Add Synopsys DWC OTG Core Interface Layer (CIL) USB/ppc4xx: Add Synopsys DWC OTG HCD function USB/ppc4xx: Add Synopsys DWC OTG HCD interrupt function USB/ppc4xx: Add Synopsys DWC OTG HCD queue function USB/ppc4xx: Add Synopsys DWC OTG PCD function USB ppc4xx: Add Synopsys DWC OTG PCD interrupt function USB/ppc4xx:Synopsys DWC OTG driver enable gadget support USB ppc4xx: Add Synopsys DWC OTG driver kernel configuration and Makefile drivers/Makefile|2 + drivers/usb/Kconfig |3 +- drivers/usb/dwc_otg/Kconfig | 96 ++ drivers/usb/dwc_otg/Makefile| 19 + drivers/usb/dwc_otg/dwc_otg_apmppc.c| 413 ++ drivers/usb/dwc_otg/dwc_otg_cil.c | 944 drivers/usb/dwc_otg/dwc_otg_cil.h | 1215 drivers/usb/dwc_otg/dwc_otg_cil_intr.c | 617 drivers/usb/dwc_otg/dwc_otg_driver.h| 78 + drivers/usb/dwc_otg/dwc_otg_hcd.c | 2408 +++ drivers/usb/dwc_otg/dwc_otg_hcd.h | 416 ++ drivers/usb/dwc_otg/dwc_otg_hcd_intr.c | 1470 +++ drivers/usb/dwc_otg/dwc_otg_hcd_queue.c | 697 + drivers/usb/dwc_otg/dwc_otg_param.c | 182 +++ drivers/usb/dwc_otg/dwc_otg_pcd.c | 1736 ++ drivers/usb/dwc_otg/dwc_otg_pcd.h | 138 ++ drivers/usb/dwc_otg/dwc_otg_pcd_intr.c | 2278 + drivers/usb/dwc_otg/dwc_otg_regs.h | 1313 + drivers/usb/gadget/Kconfig | 22 + drivers/usb/gadget/gadget_chips.h |8 + 20 files changed, 14054 insertions(+), 1 deletions(-) create mode 100644 drivers/usb/dwc_otg/Kconfig create mode 100644 drivers/usb/dwc_otg/Makefile create mode 100644 drivers/usb/dwc_otg/dwc_otg_apmppc.c create mode 100644 drivers/usb/dwc_otg/dwc_otg_cil.c create mode 100644 drivers/usb/dwc_otg/dwc_otg_cil.h create mode 100644 drivers/usb/dwc_otg/dwc_otg_cil_intr.c create mode 100644 drivers/usb/dwc_otg/dwc_otg_driver.h create mode 100644 drivers/usb/dwc_otg/dwc_otg_hcd.c create mode 100644 drivers/usb/dwc_otg/dwc_otg_hcd.h create mode 100644 drivers/usb/dwc_otg/dwc_otg_hcd_intr.c create mode 100644 drivers/usb/dwc_otg/dwc_otg_hcd_queue.c create mode 100644 drivers/usb/dwc_otg/dwc_otg_param.c create mode 100644 drivers/usb/dwc_otg/dwc_otg_pcd.c create mode 100644 drivers/usb/dwc_otg/dwc_otg_pcd.h create mode 100644 drivers/usb/dwc_otg/dwc_otg_pcd_intr.c create mode 100644 drivers/usb/dwc_otg/dwc_otg_regs.h ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH V6 01/10] USB/ppc4xx: Add Synopsys DWC OTG Register definitions
From: Tirumala Marri tma...@apm.com Add Synopsys Design Ware core register definitions. Signed-off-by: Tirumala R Marritma...@apm.com Signed-off-by: Fushen Chen fc...@apm.com Signed-off-by: Mark Miesfeld mmiesf...@apm.com --- drivers/usb/dwc_otg/dwc_otg_regs.h | 1313 1 files changed, 1313 insertions(+), 0 deletions(-) diff --git a/drivers/usb/dwc_otg/dwc_otg_regs.h b/drivers/usb/dwc_otg/dwc_otg_regs.h new file mode 100644 index 000..995252a --- /dev/null +++ b/drivers/usb/dwc_otg/dwc_otg_regs.h @@ -0,0 +1,1313 @@ +/* + * DesignWare HS OTG controller driver + * Copyright (C) 2006 Synopsys, Inc. + * Portions Copyright (C) 2010 Applied Micro Circuits Corporation. + * + * This program is free software: you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License version 2 for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see http://www.gnu.org/licenses + * or write to the Free Software Foundation, Inc., 51 Franklin Street, + * Suite 500, Boston, MA 02110-1335 USA. + * + * Based on Synopsys driver version 2.60a + * Modified by Mark Miesfeld mmiesf...@apm.com + * + * Revamped register difinitions by Tirumala R Marri(tma...@apm.com) + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS AS IS + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL SYNOPSYS, INC. BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES + * (INCLUDING BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef __DWC_OTG_REGS_H__ +#define __DWC_OTG_REGS_H__ + +#include linux/types.h + +/* + * This file contains the Macro defintions for accessing the DWC_otg core + * registers. + * + * The application interfaces with the HS OTG core by reading from and + * writing to the Control and Status Register (CSR) space through the + * AHB Slave interface. These registers are 32 bits wide, and the + * addresses are 32-bit-block aligned. + * CSRs are classified as follows: + * - Core Global Registers + * - Device Mode Registers + * - Device Global Registers + * - Device Endpoint Specific Registers + * - Host Mode Registers + * - Host Global Registers + * - Host Port CSRs + * - Host Channel Specific Registers + * + * Only the Core Global registers can be accessed in both Device and + * Host modes. When the HS OTG core is operating in one mode, either + * Device or Host, the application must not access registers from the + * other mode. When the core switches from one mode to another, the + * registers in the new mode of operation must be reprogrammed as they + * would be after a power-on reset. + */ + +/* + * DWC_otg Core registers. The core_global_regs structure defines the + * size and relative field offsets for the Core Global registers. + */ +#defineDWC_GOTGCTL 0x000 +#defineDWC_GOTGINT 0x004 +#defineDWC_GAHBCFG 0x008 +#defineDWC_GUSBCFG 0x00C +#defineDWC_GRSTCTL 0x010 +#defineDWC_GINTSTS 0x014 +#defineDWC_GINTMSK 0x018 +#defineDWC_GRXSTSR 0x01C +#defineDWC_GRXSTSP 0x020 +#defineDWC_GRXFSIZ 0x024 +#defineDWC_GNPTXFSIZ 0x028 +#defineDWC_GNPTXSTS0x02C +#defineDWC_GI2CCTL 0x030 +#defineDWC_VDCTL 0x034 +#defineDWC_GGPIO 0x038 +#defineDWC_GUID0x03C +#defineDWC_GSNPSID 0x040 +#defineDWC_GHWCFG1 0x044 +#defineDWC_GHWCFG2 0x048 +#defineDWC_GHWCFG3 0x04c +#defineDWC_GHWCFG4 0x050 +#defineDWC_HPTXFSIZ0x100 +#defineDWC_DPTX_FSIZ_DIPTXF(x) (0x104 + x * 4) /* 15 = x 1*/ + +#define DWC_GLBINTRMASK0x0001 +#define DWC_DMAENABLE 0x0020 +#define DWC_NPTXEMPTYLVL_EMPTY 0x0080 +#define DWC_NPTXEMPTYLVL_HALFEMPTY 0x +#define DWC_PTXEMPTYLVL_EMPTY
[PATCH V6 02/10] USB/ppc4xx: Add Synopsys DWC OTG driver framework
From: Tirumala Marri tma...@apm.com
Platform probing is in dwc_otg_apmppc.c.
Driver parameter and parameter checking are in dwc_otg_param.c.
Signed-off-by: Tirumala R Marritma...@apm.com
Signed-off-by: Fushen Chen fc...@apm.com
Signed-off-by: Mark Miesfeld mmiesf...@apm.com
---
drivers/usb/dwc_otg/dwc_otg_apmppc.c | 413 ++
drivers/usb/dwc_otg/dwc_otg_driver.h | 78 +++
drivers/usb/dwc_otg/dwc_otg_param.c | 182 +++
3 files changed, 673 insertions(+), 0 deletions(-)
diff --git a/drivers/usb/dwc_otg/dwc_otg_apmppc.c
b/drivers/usb/dwc_otg/dwc_otg_apmppc.c
new file mode 100644
index 000..d109ac0
--- /dev/null
+++ b/drivers/usb/dwc_otg/dwc_otg_apmppc.c
@@ -0,0 +1,413 @@
+/*
+ * DesignWare HS OTG controller driver
+ * Copyright (C) 2006 Synopsys, Inc.
+ * Portions Copyright (C) 2010 Applied Micro Circuits Corporation.
+ *
+ * This program is free software: you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License version 2 for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see http://www.gnu.org/licenses
+ * or write to the Free Software Foundation, Inc., 51 Franklin Street,
+ * Suite 500, Boston, MA 02110-1335 USA.
+ *
+ * Based on Synopsys driver version 2.60a
+ * Modified by Mark Miesfeld mmiesf...@apm.com
+ * Modified by Stefan Roese s...@denx.de, DENX Software Engineering
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS AS IS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL SYNOPSYS, INC. BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ * The dwc_otg module provides the initialization and cleanup entry
+ * points for the dwcotg driver. This module will be dynamically installed
+ * after Linux is booted using the insmod command. When the module is
+ * installed, the dwc_otg_driver_init function is called. When the module is
+ * removed (using rmmod), the dwc_otg_driver_cleanup function is called.
+ *
+ * This module also defines a data structure for the dwc_otg driver, which is
+ * used in conjunction with the standard device structure. These
+ * structures allow the OTG driver to comply with the standard Linux driver
+ * model in which devices and drivers are registered with a bus driver. This
+ * has the benefit that Linux can expose attributes of the driver and device
+ * in its special sysfs file system. Users can then read or write files in
+ * this file system to perform diagnostics on the driver components or the
+ * device.
+ */
+
+#include linux/of_platform.h
+
+#include dwc_otg_driver.h
+
+#define DWC_DRIVER_VERSION 1.05
+#define DWC_DRIVER_DESCHS OTG USB Controller driver
+static const char dwc_driver_name[] = dwc_otg;
+
+/**
+ * This function is the top level interrupt handler for the Common
+ * (Device and host modes) interrupts.
+ */
+static irqreturn_t dwc_otg_common_irq(int _irq, void *dev)
+{
+ struct dwc_otg_device *dwc_dev = dev;
+ int retval;
+
+ retval = dwc_otg_handle_common_intr(dwc_dev-core_if);
+ return IRQ_RETVAL(retval);
+}
+
+/**
+ * This function is the interrupt handler for the OverCurrent condition
+ * from the external charge pump (if enabled)
+ */
+static irqreturn_t dwc_otg_externalchgpump_irq(int _irq, void *dev)
+{
+ struct dwc_otg_device *dwc_dev = dev;
+
+ if (dwc_otg_is_host_mode(dwc_dev-core_if)) {
+ struct dwc_hcd *dwc_hcd;
+ u32 hprt0 = 0;
+
+ dwc_hcd = dwc_dev-hcd;
+ spin_lock(dwc_hcd-lock);
+ dwc_hcd-flags.b.port_over_current_change = 1;
+
+ hprt0 = DWC_HPRT0_PRT_PWR_RW(hprt0, 0);
+ dwc_write32(dwc_dev-core_if-host_if-hprt0,
+ hprt0);
+ spin_unlock(dwc_hcd-lock);
+ } else {
+ /* Device mode - This int is n/a for device mode */
+ dev_dbg(dev, DeviceMode: OTG OverCurrent Detected\n);
+ }
+
+ return IRQ_HANDLED;
+}
+
+/**
+ * This function
[PATCH V6 05/10] USB/ppc4xx: Add Synopsys DWC OTG HCD interrupt function
From: Tirumala Marri tma...@apm.com
Implements DWC OTG USB HCD interrupt service routine.
Signed-off-by: Tirumala R Marritma...@apm.com
Signed-off-by: Fushen Chen fc...@apm.com
Signed-off-by: Mark Miesfeld mmiesf...@apm.com
---
drivers/usb/dwc_otg/dwc_otg_hcd_intr.c | 1470
1 files changed, 1470 insertions(+), 0 deletions(-)
diff --git a/drivers/usb/dwc_otg/dwc_otg_hcd_intr.c
b/drivers/usb/dwc_otg/dwc_otg_hcd_intr.c
new file mode 100644
index 000..ad07fe5
--- /dev/null
+++ b/drivers/usb/dwc_otg/dwc_otg_hcd_intr.c
@@ -0,0 +1,1470 @@
+/*
+ * DesignWare HS OTG controller driver
+ * Copyright (C) 2006 Synopsys, Inc.
+ * Portions Copyright (C) 2010 Applied Micro Circuits Corporation.
+ *
+ * This program is free software: you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License version 2 for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see http://www.gnu.org/licenses
+ * or write to the Free Software Foundation, Inc., 51 Franklin Street,
+ * Suite 500, Boston, MA 02110-1335 USA.
+ *
+ * Based on Synopsys driver version 2.60a
+ * Modified by Mark Miesfeld mmiesf...@apm.com
+ * Modified by Stefan Roese s...@denx.de, DENX Software Engineering
+ * Modified by Chuck Meade ch...@theptrgroup.com
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS AS IS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL SYNOPSYS, INC. BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include dwc_otg_hcd.h
+
+/* This file contains the implementation of the HCD Interrupt handlers.
*/
+static const int erratum_usb09_patched;
+static const int deferral_on = 1;
+static const int nak_deferral_delay = 8;
+static const int nyet_deferral_delay = 1;
+
+/**
+ * Handles the start-of-frame interrupt in host mode. Non-periodic
+ * transactions may be queued to the DWC_otg controller for the current
+ * (micro)frame. Periodic transactions may be queued to the controller for the
+ * next (micro)frame.
+ */
+static int dwc_otg_hcd_handle_sof_intr(struct dwc_hcd *hcd)
+{
+ u32 hfnum = 0;
+ struct list_head *qh_entry;
+ struct dwc_qh *qh;
+ enum dwc_transaction_type tr_type;
+ u32 gintsts = 0;
+
+ hfnum =
+ dwc_read32((u32)hcd-core_if-host_if-host_global_regs +
DWC_HFNUM);
+
+ hcd-frame_number = DWC_HFNUM_FRNUM_RD(hfnum);
+
+ /* Determine whether any periodic QHs should be executed. */
+ qh_entry = hcd-periodic_sched_inactive.next;
+ while (qh_entry != hcd-periodic_sched_inactive) {
+ qh = list_entry(qh_entry, struct dwc_qh, qh_list_entry);
+ qh_entry = qh_entry-next;
+
+ /*
+* If needed, move QH to the ready list to be executed next
+* (micro)frame.
+*/
+ if (dwc_frame_num_le(qh-sched_frame, hcd-frame_number))
+ list_move(qh-qh_list_entry,
+ hcd-periodic_sched_ready);
+ }
+
+ tr_type = dwc_otg_hcd_select_transactions(hcd);
+ if (tr_type != DWC_OTG_TRANSACTION_NONE)
+ dwc_otg_hcd_queue_transactions(hcd, tr_type);
+
+ /* Clear interrupt */
+ gintsts |= DWC_INTMSK_STRT_OF_FRM;
+ dwc_write32(gintsts_reg(hcd), gintsts);
+ return 1;
+}
+
+/**
+ * Handles the Rx Status Queue Level Interrupt, which indicates that there is
at
+ * least one packet in the Rx FIFO. The packets are moved from the FIFO to
+ * memory if the DWC_otg controller is operating in Slave mode.
+ */
+static int dwc_otg_hcd_handle_rx_status_q_level_intr(struct dwc_hcd *hcd)
+{
+ u32 grxsts;
+ struct dwc_hc *hc;
+
+ grxsts = dwc_read32((u32)hcd-core_if-core_global_regs + DWC_GRXSTSP);
+ hc = hcd-hc_ptr_array[grxsts DWC_HM_RXSTS_CHAN_NUM_RD(grxsts)];
+
+ /* Packet Status */
+ switch (DWC_HM_RXSTS_PKT_STS_RD(grxsts)) {
+ case DWC_GRXSTS_PKTSTS_IN:
+ /* Read the data into the host buffer. */
+
[PATCH V6 06/10] USB/ppc4xx: Add Synopsys DWC OTG HCD queue function
From: Tirumala Marri tma...@apm.com
Implements functions to manage Queue Heads and Queue
Transfer Descriptors of DWC USB OTG Controller.
Signed-off-by: Tirumala R Marritma...@apm.com
Signed-off-by: Fushen Chen fc...@apm.com
Signed-off-by: Mark Miesfeld mmiesf...@apm.com
---
drivers/usb/dwc_otg/dwc_otg_hcd_queue.c | 697 +++
1 files changed, 697 insertions(+), 0 deletions(-)
diff --git a/drivers/usb/dwc_otg/dwc_otg_hcd_queue.c
b/drivers/usb/dwc_otg/dwc_otg_hcd_queue.c
new file mode 100644
index 000..4e190db
--- /dev/null
+++ b/drivers/usb/dwc_otg/dwc_otg_hcd_queue.c
@@ -0,0 +1,697 @@
+/*
+ * DesignWare HS OTG controller driver
+ * Copyright (C) 2006 Synopsys, Inc.
+ * Portions Copyright (C) 2010 Applied Micro Circuits Corporation.
+ *
+ * This program is free software: you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License version 2 for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see http://www.gnu.org/licenses
+ * or write to the Free Software Foundation, Inc., 51 Franklin Street,
+ * Suite 500, Boston, MA 02110-1335 USA.
+ *
+ * Based on Synopsys driver version 2.60a
+ * Modified by Mark Miesfeld mmiesf...@apm.com
+ * Modified by Stefan Roese s...@denx.de, DENX Software Engineering
+ * Modified by Chuck Meade ch...@theptrgroup.com
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS AS IS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL SYNOPSYS, INC. BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ * This file contains the functions to manage Queue Heads and Queue
+ * Transfer Descriptors.
+ */
+
+#include dwc_otg_hcd.h
+
+static inline int is_fs_ls(enum usb_device_speed speed)
+{
+ return speed == USB_SPEED_FULL || speed == USB_SPEED_LOW;
+}
+
+/* Allocates memory for a QH structure. */
+static inline struct dwc_qh *dwc_otg_hcd_qh_alloc(void)
+{
+ return kmalloc(sizeof(struct dwc_qh), GFP_ATOMIC);
+}
+
+/**
+ * Initializes a QH structure to initialize the QH.
+ */
+#define SCHEDULE_SLOP 10
+static void dwc_otg_hcd_qh_init(struct dwc_hcd *hcd, struct dwc_qh *qh,
+ struct urb *urb)
+{
+ memset(qh, 0, sizeof(struct dwc_qh));
+
+ /* Initialize QH */
+ switch (usb_pipetype(urb-pipe)) {
+ case PIPE_CONTROL:
+ qh-ep_type = USB_ENDPOINT_XFER_CONTROL;
+ break;
+ case PIPE_BULK:
+ qh-ep_type = USB_ENDPOINT_XFER_BULK;
+ break;
+ case PIPE_ISOCHRONOUS:
+ qh-ep_type = USB_ENDPOINT_XFER_ISOC;
+ break;
+ case PIPE_INTERRUPT:
+ qh-ep_type = USB_ENDPOINT_XFER_INT;
+ break;
+ }
+
+ qh-ep_is_in = usb_pipein(urb-pipe) ? 1 : 0;
+ qh-data_toggle = DWC_OTG_HC_PID_DATA0;
+ qh-maxp = usb_maxpacket(urb-dev, urb-pipe, !(usb_pipein(urb-pipe)));
+
+ INIT_LIST_HEAD(qh-qtd_list);
+ INIT_LIST_HEAD(qh-qh_list_entry);
+
+ qh-channel = NULL;
+ qh-speed = urb-dev-speed;
+
+ /*
+* FS/LS Enpoint on HS Hub NOT virtual root hub
+*/
+ qh-do_split = 0;
+ if (is_fs_ls(urb-dev-speed) urb-dev-tt urb-dev-tt-hub
+ urb-dev-tt-hub-devnum != 1)
+ qh-do_split = 1;
+
+ if (qh-ep_type == USB_ENDPOINT_XFER_INT ||
+ qh-ep_type == USB_ENDPOINT_XFER_ISOC) {
+ /* Compute scheduling parameters once and save them. */
+ u32 hprt;
+ int bytecount = dwc_hb_mult(qh-maxp) *
+ dwc_max_packet(qh-maxp);
+
+ qh-usecs = NS_TO_US(usb_calc_bus_time(urb-dev-speed,
+ usb_pipein(urb-pipe),
+ (qh-ep_type == USB_ENDPOINT_XFER_ISOC),
+ bytecount));
+
+ /* Start in a slightly future (micro)frame. */
+ qh-sched_frame = dwc_frame_num_inc(hcd-frame_number,
+ SCHEDULE_SLOP);
+
[PATCH V6 09/10] USB/ppc4xx:Synopsys DWC OTG driver enable gadget support
From: Tirumala Marri tma...@apm.com Enable gadget support Signed-off-by: Tirumala R Marritma...@apm.com Signed-off-by: Fushen Chen fc...@apm.com Signed-off-by: Mark Miesfeld mmiesf...@apm.com --- drivers/usb/gadget/Kconfig| 22 ++ drivers/usb/gadget/gadget_chips.h |8 2 files changed, 30 insertions(+), 0 deletions(-) diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 747b0d3..b2bcc4e 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -365,6 +365,28 @@ config USB_GADGET_MUSB_HDRC This OTG-capable silicon IP is used in dual designs including the TI DaVinci, OMAP 243x, OMAP 343x, TUSB 6010, and ADI Blackfin +# dwc_otg builds in ../dwc_otg along with host support +config USB_GADGET_DWC_HDRC + boolean DesignWare USB Peripheral + depends on DWC_OTG_MODE || DWC_DEVICE_ONLY + select USB_GADGET_DUALSPEED + select USB_GADGET_SELECTED + select USB_OTG + help + This OTG-capable Designware USB IP + +config USB_OTG + boolean OTG Support + depends on USB_GADGET_DWC_HDRC + help + The most notable feature of USB OTG is support for a + Dual-Role device, which can act as either a device + or a host. The initial role choice can be changed + later, when two dual-role devices talk to each other. + Select this only if your board has a Mini-AB connector. + + + config USB_GADGET_M66592 boolean Renesas M66592 USB Peripheral Controller select USB_GADGET_DUALSPEED diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h index d7b3bbe..e008e07 100644 --- a/drivers/usb/gadget/gadget_chips.h +++ b/drivers/usb/gadget/gadget_chips.h @@ -142,6 +142,12 @@ #define gadget_is_s3c_hsotg(g)0 #endif +#if defined(CONFIG_DWC_OTG_MODE) || defined(CONFIG_DWC_DEVICE_ONLY) +#define gadget_is_dwc_otg_pcd(g) (!strcmp(dwc_otg_pcd, (g)-name)) +#else +#define gadget_is_dwc_otg_pcd(g) 0 +#endif + #ifdef CONFIG_USB_GADGET_EG20T #definegadget_is_pch(g)(!strcmp(pch_udc, (g)-name)) #else @@ -207,6 +213,8 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget) return 0x26; else if (gadget_is_pch(gadget)) return 0x27; + else if (gadget_is_dwc_otg_pcd(gadget)) + return 0x28; return -ENOENT; } -- 1.6.1.rc3 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH V6 10/10] USB ppc4xx: Add Synopsys DWC OTG driver kernel configuration and Makefile
From: Tirumala Marri tma...@apm.com Add Synopsys DesignWare HS USB OTG driver kernel configuration. Synopsys OTG driver may operate in host only, device only, or OTG mode. The driver also allows user configure the core to use its internal DMA or Slave (PIO) mode. Signed-off-by: Tirumala R Marritma...@apm.com Signed-off-by: Fushen Chen fc...@apm.com Signed-off-by: Mark Miesfeld mmiesf...@apm.com --- drivers/Makefile |2 + drivers/usb/Kconfig |3 +- drivers/usb/dwc_otg/Kconfig | 96 ++ drivers/usb/dwc_otg/Makefile | 19 4 files changed, 119 insertions(+), 1 deletions(-) diff --git a/drivers/Makefile b/drivers/Makefile index 14152fc..0ecbf42 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -67,6 +67,7 @@ obj-$(CONFIG_UWB) += uwb/ obj-$(CONFIG_USB_OTG_UTILS)+= usb/otg/ obj-$(CONFIG_USB) += usb/ obj-$(CONFIG_USB_MUSB_HDRC)+= usb/musb/ +obj-$(CONFIG_USB_DWC_OTG) += usb/dwc_otg/ obj-$(CONFIG_PCI) += usb/ obj-$(CONFIG_USB_GADGET) += usb/gadget/ obj-$(CONFIG_SERIO)+= input/serio/ @@ -105,6 +106,7 @@ obj-$(CONFIG_ARCH_SHMOBILE) += sh/ ifndef CONFIG_ARCH_USES_GETTIMEOFFSET obj-y += clocksource/ endif +obj-$(CONFIG_DMA_ENGINE) += dma/ obj-$(CONFIG_DCA) += dca/ obj-$(CONFIG_HID) += hid/ obj-$(CONFIG_PPC_PS3) += ps3/ diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index 6585f0b..8b3623d 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -55,7 +55,6 @@ config USB_ARCH_HAS_OHCI config USB_ARCH_HAS_EHCI boolean default y if PPC_83xx - default y if PPC_MPC512x default y if SOC_AU1200 default y if ARCH_IXP4XX default y if ARCH_W90X900 @@ -113,6 +112,8 @@ source drivers/usb/host/Kconfig source drivers/usb/musb/Kconfig +source drivers/usb/dwc_otg/Kconfig + source drivers/usb/class/Kconfig source drivers/usb/storage/Kconfig diff --git a/drivers/usb/dwc_otg/Kconfig b/drivers/usb/dwc_otg/Kconfig new file mode 100644 index 000..4d33d72 --- /dev/null +++ b/drivers/usb/dwc_otg/Kconfig @@ -0,0 +1,96 @@ +# +# USB Dual Role (OTG-ready) Controller Drivers +# for silicon based on Synopsys DesignWare IP +# + +comment Enable Host or Gadget support for DesignWare OTG controller + depends on !USB USB_GADGET=n + +config USB_DWC_OTG + depends on (USB || USB_GADGET) + select NOP_USB_XCEIV + select USB_OTG_UTILS + tristate Synopsys DWC OTG Controller + default USB_GADGET + help + This driver provides USB Device Controller support for the + Synopsys DesignWare USB OTG Core used on the AppliedMicro PowerPC SoC. + +config DWC_DEBUG + bool Enable DWC Debugging + depends on USB_DWC_OTG + default n + help + Enable DWC driver debugging + +choice + prompt DWC Mode Selection + depends on USB_DWC_OTG + default DWC_HOST_ONLY + help + Select the DWC Core in OTG, Host only, or Device only mode. + +config DWC_HOST_ONLY + bool DWC Host Only Mode + +config DWC_OTG_MODE + bool DWC OTG Mode + select USB_GADGET_SELECTED + +config DWC_DEVICE_ONLY + bool DWC Device Only Mode + select USB_GADGET_SELECTED + +endchoice + +# enable peripheral support (including with OTG) +config USB_GADGET_DWC_HDRC + bool + depends on USB_DWC_OTG (DWC_DEVICE_ONLY || USB_DWC_OTG) + +choice + prompt DWC DMA/SlaveMode Selection + depends on USB_DWC_OTG + default DWC_DMA_MODE + help + Select the DWC DMA or Slave Mode. + DMA mode uses the DWC core internal DMA engines. + Slave mode uses the processor PIO to tranfer data. + In Slave mode, processor's DMA channels can be used if available. + +config DWC_SLAVE + bool DWC Slave Mode + +config DWC_DMA_MODE + bool DWC DMA Mode + +endchoice + +config USB_OTG_WHITELIST + bool Rely on OTG Targeted Peripherals List + depends on !USB_SUSPEND USB_DWC_OTG + default n + help + This is the same flag as in ../core/Kconfig. + It is here for easy deselect. + +config DWC_OTG_REG_LE + depends on USB_DWC_OTG + bool DWC Little Endian Register + default y + help + OTG core register access is Little-Endian. + +config DWC_OTG_FIFO_LE + depends on USB_DWC_OTG + bool DWC FIFO Little Endian + default n + help + OTG core FIFO access is Little-Endian. + +config DWC_LIMITED_XFER_SIZE + depends on USB_GADGET_DWC_HDRC + bool DWC Endpoint Limited Xfer Size + default n + help + Bit fields in the Device EP Transfer Size Register is 11 bits. diff --git a/drivers/usb/dwc_otg/Makefile b/drivers/usb/dwc_otg/Makefile new file mode 100644 index 000..31dd5e8 --- /dev/null +++
[PATCH] ppc4xx: Add USB DWC DTS entry to Canyonlands board
From: Tirumala Marri tma...@apm.com
Add Synopsys Designware DTS entry for 460EX based Canyonlands board.
Signed-off-by: Tirumala R Marritma...@apm.com
---
arch/powerpc/boot/dts/canyonlands.dts | 13 +
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
b/arch/powerpc/boot/dts/canyonlands.dts
index 5b27a4b..54caec6 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -172,6 +172,19 @@
interrupts = 0x1e 4;
};
+ USBOTG0: usb...@bff8 {
+ compatible = amcc,dwc-otg;
+ reg = 0x4 0xbff8 0x1;
+ interrupt-parent = USBOTG0;
+ #interrupt-cells = 1;
+ #address-cells = 0;
+ #size-cells = 0;
+ interrupts = 0x0 0x1 0x2;
+ interrupt-map = /* USB-OTG */ 0x0 UIC2 0x1c 0x4
+/* HIGH-POWER */ 0x1 UIC1 0x1a 0x8
+/* DMA */ 0x2 UIC0 0xc 0x4;
+ };
+
SATA0: s...@bffd1000 {
compatible = amcc,sata-460ex;
reg = 4 0xbffd1000 0x800 4 0xbffd0800 0x400;
--
1.6.1.rc3
___
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[PATCH] ppc4xx: Add USB DWC DTS entry to Canyonlands board
From: Tirumala Marri tma...@apm.com
Add Synopsys Designware DTS entry for 460EX based Canyonlands board.
Signed-off-by: Tirumala R Marritma...@apm.com
---
arch/powerpc/boot/dts/canyonlands.dts | 13 +
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
b/arch/powerpc/boot/dts/canyonlands.dts
index 5b27a4b..54caec6 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -172,6 +172,19 @@
interrupts = 0x1e 4;
};
+ USBOTG0: usb...@bff8 {
+ compatible = amcc,dwc-otg;
+ reg = 0x4 0xbff8 0x1;
+ interrupt-parent = USBOTG0;
+ #interrupt-cells = 1;
+ #address-cells = 0;
+ #size-cells = 0;
+ interrupts = 0x0 0x1 0x2;
+ interrupt-map = /* USB-OTG */ 0x0 UIC2 0x1c 0x4
+/* HIGH-POWER */ 0x1 UIC1 0x1a 0x8
+/* DMA */ 0x2 UIC0 0xc 0x4;
+ };
+
SATA0: s...@bffd1000 {
compatible = amcc,sata-460ex;
reg = 4 0xbffd1000 0x800 4 0xbffd0800 0x400;
--
1.6.1.rc3
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Re: [PATCH 3/5] of/device: Make of_get_next_child() check status properties
On Wed, 2010-12-08 at 15:01 -0600, Scott Wood wrote: On Wed, 8 Dec 2010 11:29:44 -0800 Deepak Saxena deepak_sax...@mentor.com wrote: We only return the next child if the device is available. Signed-off-by: Hollis Blanchard hollis_blanch...@mentor.com Signed-off-by: Deepak Saxena deepak_sax...@mentor.com --- drivers/of/base.c |4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/drivers/of/base.c b/drivers/of/base.c index 5d269a4..81b2601 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -321,6 +321,8 @@ struct device_node *of_get_next_parent(struct device_node *node) * * Returns a node pointer with refcount incremented, use * of_node_put() on it when done. + * + * Does not return nodes marked unavailable by a status property. */ struct device_node *of_get_next_child(const struct device_node *node, struct device_node *prev) @@ -330,7 +332,7 @@ struct device_node *of_get_next_child(const struct device_node *node, read_lock(devtree_lock); next = prev ? prev-sibling : node-child; for (; next; next = next-sibling) - if (of_node_get(next)) + if (of_device_is_available(next) of_node_get(next)) break; of_node_put(prev); read_unlock(devtree_lock); This seems like too low-level a place to put this. Some code may know how to un-disable a device in certain situations, or it may be part of debug code trying to dump the whole device tree, etc. Looking further[1], I see a raw version of this function, but not other things like of_find_compatible_node. Yeah I agree. I think we'll eventually end up with __ versions of all or lots of them. Not to mention there might be cases you've missed where code expects to see unavailable nodes. The right approach is to add _new_ routines that don't return unavailable nodes, and convert code that you know wants to use them. cheers signature.asc Description: This is a digitally signed message part ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 3/5] of/device: Make of_get_next_child() check status properties
On Thu, Dec 09, 2010 at 12:33:22PM +1100, Michael Ellerman wrote: On Wed, 2010-12-08 at 15:01 -0600, Scott Wood wrote: On Wed, 8 Dec 2010 11:29:44 -0800 Deepak Saxena deepak_sax...@mentor.com wrote: We only return the next child if the device is available. Signed-off-by: Hollis Blanchard hollis_blanch...@mentor.com Signed-off-by: Deepak Saxena deepak_sax...@mentor.com --- drivers/of/base.c |4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/drivers/of/base.c b/drivers/of/base.c index 5d269a4..81b2601 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -321,6 +321,8 @@ struct device_node *of_get_next_parent(struct device_node *node) * * Returns a node pointer with refcount incremented, use * of_node_put() on it when done. + * + * Does not return nodes marked unavailable by a status property. */ struct device_node *of_get_next_child(const struct device_node *node, struct device_node *prev) @@ -330,7 +332,7 @@ struct device_node *of_get_next_child(const struct device_node *node, read_lock(devtree_lock); next = prev ? prev-sibling : node-child; for (; next; next = next-sibling) - if (of_node_get(next)) + if (of_device_is_available(next) of_node_get(next)) break; of_node_put(prev); read_unlock(devtree_lock); This seems like too low-level a place to put this. Some code may know how to un-disable a device in certain situations, or it may be part of debug code trying to dump the whole device tree, etc. Looking further[1], I see a raw version of this function, but not other things like of_find_compatible_node. Yeah I agree. I think we'll eventually end up with __ versions of all or lots of them. Not to mention there might be cases you've missed where code expects to see unavailable nodes. The right approach is to add _new_ routines that don't return unavailable nodes, and convert code that you know wants to use them. Actually, I don't think we really want these status-skipping iterators at all. The device tree iterators should give us the device tree, as it is. Those old-style drivers which seach for a node rather than using the bus probing logic can keep individual checks of the status property until they're converted to the new scheme. -- David Gibson| I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson signature.asc Description: Digital signature ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: Run 'usermode-agent' cause kernel panic on Powerpc
On Wed, 2010-12-08 at 09:20 +0800, xufeng zhang wrote:
I believe it would have such an impact. I don't see that user-mode
debugging would be enabled at all.
Maybe something like this untested patch:
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 84906d3..0e7d1cf 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -323,6 +323,13 @@ static void set_debug_reg_defaults(struct
thread_struct *thread)
static void prime_debug_regs(struct thread_struct *thread)
{
+ /*
+* If we're setting up debug events for user space, make sure they
+* don't fire in kernel space before we get to user space
+*/
+ if (thread-dbcr0 DBCR0_IDM)
+ mtmsr(mfmsr() ~MSR_DE);
+
mtspr(SPRN_IAC1, thread-iac1);
mtspr(SPRN_IAC2, thread-iac2);
#if CONFIG_PPC_ADV_DEBUG_IACS 2
Thanks for your reply, Dave, I know where the problem is.
So is there a kernel bug we need to fix ?
Cheers,
Ben.
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Re: [RFC PATCH 7/7 v2] ppc: add dynamic dma window support
On Tue, 2010-10-26 at 20:35 -0700, Nishanth Aravamudan wrote:
No much comments... I'm amazed how complex he firmware folks managed to
make this ...
static int iommu_reconfig_notifier(struct notifier_block *nb, unsigned long
action, void *node)
{
int err = NOTIFY_OK;
struct device_node *np = node;
struct pci_dn *pci = PCI_DN(np);
+ struct direct_window *window;
switch (action) {
case PSERIES_RECONFIG_REMOVE:
if (pci pci-iommu_table)
iommu_free_table(pci-iommu_table, np-full_name);
+
+ spin_lock(direct_window_list_lock);
+ list_for_each_entry(window, direct_window_list, list) {
+ if (window-device == np) {
+ list_del(window-list);
+ break;
+ }
+ }
+ spin_unlock(direct_window_list_lock);
Should you also kfree the window ?
Cheers,
Ben.
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[PATCH v5] ppc44x:PHY fixup for USB on canyonlands board
This fix is a reset for USB PHY that requires some amount of time for power to
be stable on Canyonlands.
Signed-off-by: Rupjyoti Sarmah rsar...@apm.com
---
changes from previous version:
-- dts node correction, removed the address and size parameters
-- Kconfig file updated removing dependency on PPC44x_SIMPLE
-- 44x prefixes in the function names changed
-- Error paths updated in canyonlands.c
arch/powerpc/boot/dts/canyonlands.dts | 11 +++
arch/powerpc/platforms/44x/44x.h |4 +
arch/powerpc/platforms/44x/Kconfig |1 -
arch/powerpc/platforms/44x/Makefile|1 +
arch/powerpc/platforms/44x/canyonlands.c | 125
arch/powerpc/platforms/44x/ppc44x_simple.c |1 -
6 files changed, 141 insertions(+), 2 deletions(-)
create mode 100644 arch/powerpc/platforms/44x/canyonlands.c
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
b/arch/powerpc/boot/dts/canyonlands.dts
index a303703..8ff1f3f 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -224,6 +224,11 @@
};
};
+ c...@2,0 {
+ compatible = amcc,ppc460ex-bcsr;
+ reg = 2 0x0 0x9;
+ };
+
n...@3,0 {
compatible = ibm,ndfc;
reg = 0x0003 0x
0x2000;
@@ -320,6 +325,12 @@
interrupts = 0x3 0x4;
};
+ GPIO0: g...@ef600b00 {
+ compatible = ibm,ppc4xx-gpio;
+ reg = 0xef600b00 0x0048;
+ gpio-controller;
+ };
+
ZMII0: emac-z...@ef600d00 {
compatible = ibm,zmii-460ex, ibm,zmii;
reg = 0xef600d00 0x000c;
diff --git a/arch/powerpc/platforms/44x/44x.h b/arch/powerpc/platforms/44x/44x.h
index dbc4d2b..63f703e 100644
--- a/arch/powerpc/platforms/44x/44x.h
+++ b/arch/powerpc/platforms/44x/44x.h
@@ -4,4 +4,8 @@
extern u8 as1_readb(volatile u8 __iomem *addr);
extern void as1_writeb(u8 data, volatile u8 __iomem *addr);
+#define GPIO0_OSRH 0xC
+#define GPIO0_TSRH 0x14
+#define GPIO0_ISR1H0x34
+
#endif /* __POWERPC_PLATFORMS_44X_44X_H */
diff --git a/arch/powerpc/platforms/44x/Kconfig
b/arch/powerpc/platforms/44x/Kconfig
index 0f979c5..f485fc5 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -115,7 +115,6 @@ config CANYONLANDS
bool Canyonlands
depends on 44x
default n
- select PPC44x_SIMPLE
select 460EX
select PCI
select PPC4xx_PCI_EXPRESS
diff --git a/arch/powerpc/platforms/44x/Makefile
b/arch/powerpc/platforms/44x/Makefile
index 82ff326..6854e73 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_WARP) += warp.o
obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
obj-$(CONFIG_XILINX_ML510) += virtex_ml510.o
obj-$(CONFIG_ISS4xx) += iss4xx.o
+obj-$(CONFIG_CANYONLANDS)+= canyonlands.o
diff --git a/arch/powerpc/platforms/44x/canyonlands.c
b/arch/powerpc/platforms/44x/canyonlands.c
new file mode 100644
index 000..9639709
--- /dev/null
+++ b/arch/powerpc/platforms/44x/canyonlands.c
@@ -0,0 +1,125 @@
+/*
+ * This contain platform specific code for APM PPC460EX based Canyonlands
+ * board.
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Rupjyoti Sarmah rsar...@apm.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include linux/kernel.h
+#include linux/init.h
+#include asm/pci-bridge.h
+#include asm/ppc4xx.h
+#include asm/udbg.h
+#include asm/uic.h
+#include linux/of_platform.h
+#include linux/delay.h
+#include 44x.h
+
+#define BCSR_USB_EN0x11
+
+static __initdata struct of_device_id ppc460ex_of_bus[] = {
+ { .compatible = ibm,plb4, },
+ { .compatible = ibm,opb, },
+ { .compatible = ibm,ebc, },
+ { .compatible = simple-bus, },
+
Re: [RFC PATCH 6/7 v2] ppc/iommu: pass phb only to iommu_table_setparms_lpar
On Tue, 2010-10-26 at 20:35 -0700, Nishanth Aravamudan wrote:
iommu_table_setparms_lpar needs either the phb or the subbusnumber
(not both), pass the phb to make it similar to iommu_table_setparms.
Note: In cases where a caller was passing bus-number previously to
iommu_table_setparms_lpar() rather than phb-bus-number, this can lead
to a different value in tbl-it_busno. The only example of this was the
removed pci_dma_dev_setup_pSeriesLP(), removed in ppc/iommu: remove
unneeded pci_dma_dev_setup_pSeriesLP.
Signed-off-by: Milton Miller milt...@bga.com
Signed-off-by: Nishanth Aravamudan n...@us.ibm.com
---
arch/powerpc/platforms/pseries/iommu.c |8 +++-
1 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/iommu.c
b/arch/powerpc/platforms/pseries/iommu.c
index 9d564b9..45c6865 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -323,14 +323,13 @@ static void iommu_table_setparms(struct pci_controller
*phb,
static void iommu_table_setparms_lpar(struct pci_controller *phb,
struct device_node *dn,
struct iommu_table *tbl,
- const void *dma_window,
- int bussubno)
+ const void *dma_window)
{
unsigned long offset, size;
- tbl-it_busno = bussubno;
of_parse_dma_window(dn, dma_window, tbl-it_index, offset, size);
+ tbl-it_busno = phb-bus-number;
tbl-it_base = 0;
tbl-it_blocksize = 16;
tbl-it_type = TCE_PCI;
@@ -534,8 +533,7 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev
*dev)
if (!pci-iommu_table) {
tbl = kzalloc_node(sizeof(struct iommu_table), GFP_KERNEL,
pci-phb-node);
- iommu_table_setparms_lpar(pci-phb, pdn, tbl, dma_window,
- pci-phb-bus-number);
+ iommu_table_setparms_lpar(pci-phb, pdn, tbl, dma_window);
pci-iommu_table = iommu_init_table(tbl, pci-phb-node);
pr_debug( created table: %p\n, pci-iommu_table);
} else {
There's another caller :-) I've fixed that up locally and will push with
the fix.
Cheers,
Ben.
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Re: [PATCH v2] powerpc, 5200: add support for charon board
Hello Wolfram, Wolfram Sang wrote: On Tue, Dec 07, 2010 at 07:58:55AM +0100, Heiko Schocher wrote: Signed-off-by: Heiko Schocher h...@denx.de Reviewed-by: Wolfram Sang w.s...@pengutronix.de Thanks! One more defconfig question: Is it possible to add to the mpc5200_defconfig, what is needed for this board to compile a kernel which contains all features it needs? I need: CONFIG_HWMON CONFIG_SENSORS_LM80 CONFIG_RTC_LIB CONFIG_RTC_CLASS CONFIG_RTC_HCTOSYS CONFIG_RTC_HCTOSYS_DEVICE=rtc0 CONFIG_RTC_INTF_SYSFS CONFIG_RTC_INTF_PROC CONFIG_RTC_INTF_DEV CONFIG_RTC_DRV_DS1374 I think, to have a DTS in kernel for a board, and no defconfig, which builds a kernel with all features for it, is suboptimal, or? bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH V6 00/10] Add-Synopsys-DesignWare-HS-USB-OTG-driver
On Wed, Dec 08, 2010 at 04:28:59PM -0800, tma...@apm.com wrote: From: Tirumala Marri tma...@apm.com v6: 1. Replaced register definitions and bit fields with macros. 2. Replace printks with dev_dbg or dev_err functions. 3. Cleanup some assignments. 4. Remove chip specific selections in Kconfig file. Much nicer, thanks. Do you wish for me to apply this to the tree if it passes review? thanks, greg k-h ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 1/2] video, sm501: add OF binding to support SM501
Hello Paul, Paul Mundt wrote: On Sat, Dec 04, 2010 at 09:23:47AM +0100, Heiko Schocher wrote: - add binding to OF, compatible name smi,sm501 [...] Documentation/kernel-parameters.txt |7 + Documentation/powerpc/dts-bindings/sm501.txt | 30 +++ drivers/mfd/sm501.c | 141 -- drivers/video/sm501fb.c | 264 +- include/linux/sm501.h|8 + 5 files changed, 299 insertions(+), 151 deletions(-) create mode 100644 Documentation/powerpc/dts-bindings/sm501.txt Given that this is all SM501 dependent, is there some particular reason why you neglected to Cc the author or the MFD folks? Hups, sorry! No, there is no reason, thanks for detecting this. Hmm.. couldn;t find a MFD maillinglist? bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc: iommu: Add device name to iommu error printks
On Wed, Dec 08, 2010 at 11:36:05AM +1100, Anton Blanchard wrote: Right now its difficult to see which device is running out of iommu space: iommu_alloc failed, tbl c0076e096660 vaddr c00768806600 npages 1 Use dev_info() so we get the device name and location: ipr :00:01.0: iommu_alloc failed, tbl c0076e096660 vaddr c00768806600 npages 1 Signed-off-by: Anton Blanchard an...@samba.org Acked-by: Olof Johansson o...@lixom.net ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH] fsldma: fix issue of slow dma
From: Forrest Shi b29...@freescale.com Fixed fsl dma slow issue by initializing dma mode register with bandwidth control. It boosts dma performance and should works with 85xx board. Signed-off-by: Forrest Shi b29...@freescale.com Signed-off-by: Li Yang le...@freescale.com --- drivers/dma/fsldma.c |6 -- drivers/dma/fsldma.h |9 - 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c index 286c3ac..e5e172d 100644 --- a/drivers/dma/fsldma.c +++ b/drivers/dma/fsldma.c @@ -50,9 +50,11 @@ static void dma_init(struct fsldma_chan *chan) * EIE - Error interrupt enable * EOSIE - End of segments interrupt enable (basic mode) * EOLNIE - End of links interrupt enable +* BWC - Bandwidth sharing among channels */ - DMA_OUT(chan, chan-regs-mr, FSL_DMA_MR_EIE - | FSL_DMA_MR_EOLNIE | FSL_DMA_MR_EOSIE, 32); + DMA_OUT(chan, chan-regs-mr, FSL_DMA_MR_BWC + | FSL_DMA_MR_EIE | FSL_DMA_MR_EOLNIE + | FSL_DMA_MR_EOSIE, 32); break; case FSL_DMA_IP_83XX: /* Set the channel to below modes: diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h index cb4d6ff..ba9f403 100644 --- a/drivers/dma/fsldma.h +++ b/drivers/dma/fsldma.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved. + * Copyright (C) 2007-2010 Freescale Semiconductor, Inc. All rights reserved. * * Author: * Zhang Wei wei.zh...@freescale.com, Jul 2007 @@ -36,6 +36,13 @@ #define FSL_DMA_MR_DAHE0x2000 #define FSL_DMA_MR_SAHE0x1000 +/* + * Bandwidth/pause control determines how many bytes a given + * channel is allowed to transfer before the DMA engine pauses + * the current channel and switches to the next channel + */ +#define FSL_DMA_MR_BWC 0x0800 + /* Special MR definition for MPC8349 */ #define FSL_DMA_MR_EOTIE 0x0080 #define FSL_DMA_MR_PRC_RM 0x0800 -- 1.6.6-rc1.GIT ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
