Re: 3.7-rc7: BUG: MAX_STACK_TRACE_ENTRIES too low!
On Tue, 2012-11-27 at 19:22 -0800, Christian Kujau wrote: On Tue, 27 Nov 2012 at 19:06, Christian Kujau wrote: the same thing[0] happened again in 3.7-rc7, after ~20h uptime: I found the following on patchwork, but this seems to deal with powerpc64 only, while this PowerBook G4 of mine is powerpc32: http://patchwork.ozlabs.org/patch/193414/ It looks related, but then again, I fail to parse assember... Hi Christian, Would you please help to try the following fix? I don't have a powerpc32 machine for test... Thanks, Zhong == diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S index 9499385..cadebfd 100644 --- a/arch/powerpc/kernel/entry_32.S +++ b/arch/powerpc/kernel/entry_32.S @@ -439,6 +439,8 @@ ret_from_fork: ret_from_kernel_thread: REST_NVGPRS(r1) bl schedule_tail + li r3,0 + stw r3,0(r1) mtlrr14 mr r3,r15 PPC440EP_ERR42 == Christian. [40007.339487] [sched_delayed] sched: RT throttling activated [69731.388717] BUG: MAX_STACK_TRACE_ENTRIES too low! [69731.390371] turning off the locking correctness validator. [69731.391942] Call Trace: [69731.393525] [c9a61c10] [c0009064] show_stack+0x70/0x1bc (unreliable) [69731.395152] [c9a61c50] [c0077460] save_trace+0xfc/0x114 [69731.396735] [c9a61c60] [c007be20] __lock_acquire+0x1568/0x19b8 [69731.398296] [c9a61d00] [c007c2c0] lock_acquire+0x50/0x70 [69731.399857] [c9a61d20] [c0550e28] _raw_spin_lock_irq+0x5c/0x78 [69731.401419] [c9a61d40] [c054fb58] __schedule+0xd8/0x534 [69731.402972] [c9a61da0] [c0550094] _cond_resched+0x50/0x68 [69731.404527] [c9a61db0] [c0479908] dst_gc_task+0xbc/0x258 [69731.406070] [c9a61e40] [c004eeb8] process_one_work+0x1f4/0x49c [69731.407585] [c9a61e80] [c004f644] worker_thread+0x14c/0x400 [69731.409075] [c9a61eb0] [c0057634] kthread+0xbc/0xc0 [69731.410521] [c9a61f40] [c0011ad4] ret_from_kernel_thread+0x5c/0x64 [...repeated 54 times...] Anyone knows what this is about? Thanks, Christian. [0] http://lkml.indiana.edu/hypermail/linux/kernel/1211.0/03025.html ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [Patch v4 08/12] memory-hotplug: remove memmap of sparse-vmemmap
Hi Congyang,
I think vmemmap's pgtable pages should be freed after all entries are cleared,
I have a patch to do this.
The code logic is the same as [Patch v4 09/12] memory-hotplug: remove page
table of x86_64 architecture.
How do you think about this?
Signed-off-by: Jianguo Wu wujian...@huawei.com
Signed-off-by: Jiang Liu jiang@huawei.com
---
include/linux/mm.h |1 +
mm/sparse-vmemmap.c | 214 +++
mm/sparse.c |5 +-
3 files changed, 218 insertions(+), 2 deletions(-)
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 5657670..1f26af5 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -1642,6 +1642,7 @@ int vmemmap_populate(struct page *start_page, unsigned
long pages, int node);
void vmemmap_populate_print_last(void);
void register_page_bootmem_memmap(unsigned long section_nr, struct page *map,
unsigned long size);
+void vmemmap_free(struct page *memmap, unsigned long nr_pages);
enum mf_flags {
MF_COUNT_INCREASED = 1 0,
diff --git a/mm/sparse-vmemmap.c b/mm/sparse-vmemmap.c
index 1b7e22a..242cb28 100644
--- a/mm/sparse-vmemmap.c
+++ b/mm/sparse-vmemmap.c
@@ -29,6 +29,10 @@
#include asm/pgalloc.h
#include asm/pgtable.h
+#ifdef CONFIG_MEMORY_HOTREMOVE
+#include asm/tlbflush.h
+#endif
+
/*
* Allocate a block of memory to be used to back the virtual memory map
* or to back the page tables that are used to create the mapping.
@@ -224,3 +228,213 @@ void __init sparse_mem_maps_populate_node(struct page
**map_map,
vmemmap_buf_end = NULL;
}
}
+
+#ifdef CONFIG_MEMORY_HOTREMOVE
+static void vmemmap_free_pages(struct page *page, int order)
+{
+ struct zone *zone;
+ unsigned long magic;
+
+ magic = (unsigned long) page-lru.next;
+ if (magic == SECTION_INFO || magic == MIX_SECTION_INFO) {
+ put_page_bootmem(page);
+
+ zone = page_zone(page);
+ zone_span_writelock(zone);
+ zone-present_pages++;
+ zone_span_writeunlock(zone);
+ totalram_pages++;
+ } else {
+ if (is_vmalloc_addr(page_address(page)))
+ vfree(page_address(page));
+ else
+ free_pages((unsigned long)page_address(page), order);
+ }
+}
+
+static void free_pte_table(pmd_t *pmd)
+{
+ pte_t *pte, *pte_start;
+ int i;
+
+ pte_start = (pte_t *)pmd_page_vaddr(*pmd);
+ for (i = 0; i PTRS_PER_PTE; i++) {
+ pte = pte_start + i;
+ if (pte_val(*pte))
+ return;
+ }
+
+ /* free a pte talbe */
+ vmemmap_free_pages(pmd_page(*pmd), 0);
+ spin_lock(init_mm.page_table_lock);
+ pmd_clear(pmd);
+ spin_unlock(init_mm.page_table_lock);
+}
+
+static void free_pmd_table(pud_t *pud)
+{
+ pmd_t *pmd, *pmd_start;
+ int i;
+
+ pmd_start = (pmd_t *)pud_page_vaddr(*pud);
+ for (i = 0; i PTRS_PER_PMD; i++) {
+ pmd = pmd_start + i;
+ if (pmd_val(*pmd))
+ return;
+ }
+
+ /* free a pmd talbe */
+ vmemmap_free_pages(pud_page(*pud), 0);
+ spin_lock(init_mm.page_table_lock);
+ pud_clear(pud);
+ spin_unlock(init_mm.page_table_lock);
+}
+
+static void free_pud_table(pgd_t *pgd)
+{
+ pud_t *pud, *pud_start;
+ int i;
+
+ pud_start = (pud_t *)pgd_page_vaddr(*pgd);
+ for (i = 0; i PTRS_PER_PUD; i++) {
+ pud = pud_start + i;
+ if (pud_val(*pud))
+ return;
+ }
+
+ /* free a pud table */
+ vmemmap_free_pages(pgd_page(*pgd), 0);
+ spin_lock(init_mm.page_table_lock);
+ pgd_clear(pgd);
+ spin_unlock(init_mm.page_table_lock);
+}
+
+static int split_large_page(pte_t *kpte, unsigned long address, pte_t *pbase)
+{
+ struct page *page = pmd_page(*(pmd_t *)kpte);
+ int i = 0;
+ unsigned long magic;
+ unsigned long section_nr;
+
+ __split_large_page(kpte, address, pbase);
+ __flush_tlb_all();
+
+ magic = (unsigned long) page-lru.next;
+ if (magic == SECTION_INFO) {
+ section_nr = pfn_to_section_nr(page_to_pfn(page));
+ while (i PTRS_PER_PMD) {
+ page++;
+ i++;
+ get_page_bootmem(section_nr, page, SECTION_INFO);
+ }
+ }
+
+ return 0;
+}
+
+static void vmemmap_pte_remove(pmd_t *pmd, unsigned long addr, unsigned long
end)
+{
+ pte_t *pte;
+ unsigned long next;
+
+ pte = pte_offset_kernel(pmd, addr);
+ for (; addr end; pte++, addr += PAGE_SIZE) {
+ next = (addr + PAGE_SIZE) PAGE_MASK;
+ if (next end)
+ next = end;
+
+ if (pte_none(*pte))
+ continue;
+
Re: [PATCH V7 1/7] kbuild: centralize .dts-.dtb rule
On 11/27/2012 04:29 PM, Stephen Warren wrote: All architectures that use cmd_dtc do so in almost the same way. Create a central build rule to avoid duplication. The one difference is that most current uses of dtc build $(obj)/%.dtb from $(src)/dts/%.dts rather than building the .dtb in the same directory as the .dts file. This difference will be eliminated arch-by-arch in future patches. MIPS is the exception here; it already uses the exact same rule as the new common rule, so the duplicate is removed in this patch to avoid any conflict. arch/mips changes courtesy of Ralf Baechle. Update Documentation/kbuild to remove the explicit call to cmd_dtc from the example, now that the rule exists in a centralized location. Ben, Paul, Following this patch (http://lkml.org/lkml/2012/11/27/555), I posted a series of patches to convert almost all architectures to using the centralized rule. The one architecture I didn't convert was PowerPC. I didn't convert it because arch/powerpc/boot/Makefile contains a large number of rules (to generate *Image.% where % is a board name) that depend on %.dtb, which is expected to be in arch/powerpc/boot rather than arch/powerpc/boot/dts. Now, I guess it's possible to convert them all to expect the .dtb files to be in dts/ and also have arch/powerpc/boot/Makefile call make in boot/dts/ to make each required .dtb file. However, the patch would be a bit larger than all the other architecture patches. Do you want me to do that conversion, or would you rather I leave PowerPC alone? Thanks for any feedback. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: 3.7-rc7: BUG: MAX_STACK_TRACE_ENTRIES too low!
On Wed, 28 Nov 2012 at 16:41, Li Zhong wrote: Would you please help to try the following fix? I don't have a powerpc32 machine for test... I've just applied this to 3.7-rc7 and booted the machine. I don't know how to trigger this bug, so it might take a while until it happens again - or not, now with your patch applied. It happened only 2 times so far, after ~8h and after ~20h: Nov 5 13:28:20 alice kernel: [0.00] Linux version 3.7.0-rc4 Nov 5 21:00:26 alice kernel: [27148.965634] BUG: MAX_STACK_TRACE_ENTRIES too low! Nov 26 21:53:43 alice kernel: [0.00] Linux version 3.7.0-rc7 Nov 27 17:15:29 alice kernel: [69731.388717] BUG: MAX_STACK_TRACE_ENTRIES too low! Thanks, Christian. -- BOFH excuse #86: Runt packets ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH] export of_reconfig_notifier_[register,unregister]
The of reconfiguration notification chains should be exported for use
by modules.
Signed-off-by:Nathan Fontenot nf...@linux.vnet.ibm.com
---
Index: linux-next/drivers/of/base.c
===
--- linux-next.orig/drivers/of/base.c 2012-11-28 09:18:02.0 -0600
+++ linux-next/drivers/of/base.c2012-11-28 11:05:00.0 -0600
@@ -1282,11 +1282,13 @@
{
return blocking_notifier_chain_register(of_reconfig_chain, nb);
}
+EXPORT_SYMBOL_GPL(of_reconfig_notifier_register);
int of_reconfig_notifier_unregister(struct notifier_block *nb)
{
return blocking_notifier_chain_unregister(of_reconfig_chain, nb);
}
+EXPORT_SYMBOL_GPL(of_reconfig_notifier_unregister);
int of_reconfig_notify(unsigned long action, void *p)
{
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fsl spi questions patch
Hi, I've been playing with spi on mpc8313e and have some things on spi-fsl-spi.c: Is QE useful on 8313? I've tried it (using cpu-qe in my dts file) and see in the boot log that it is used, but I do not really see any effect when it comes to performance or cpu usage. Furthermore: In the fsl_spi_cpu_irq there is a line: /* Clear the events */ mpc8xxx_spi_write_reg(reg_base-event, events); Is this really useful? The 8313 book says NE is cleared upon reading and NF is cleared upon writing. (this might apply to fsl_spi_cpm_irq too, I do not have info on cpm. Next, I noticed some spacing between two spi words being sent. It seems the transmit buffer is not filled when possible, but only when a word is received (and the previous word is transmitted). By modifying the code somewhat I was able to roughly double the effective transfer rate in my test setup (8 Mhz spi clock, 32 bit transfers). Attached is my changed code. Feedback on it is appreciated. This patch also eliminated the spinning until TX is done. (actually I am not sure if this will happen, I would expect NE and NF to be raised roughly at the same time. Thanks for any feedback! Frans Meulenbroeks PS:it would probably be nice if in board setup one could also set the (default) value of bits-per-word. 0001-spi-fsl-spi.c-use-NF-interrupt-instead-of-NE.patch Description: Binary data ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [GIT PULL 0/8] perf/urgent fixes
On Fri, Nov 23, 2012 at 7:20 PM, Arnaldo Carvalho de Melo
a...@ghostprotocols.net wrote:
Hi Ingo,
Tested using a cross-compiler and directly on a Raspberry pi (ARM)
with
raspbian.
Please consider pulling.
- Arnaldo
The following changes since commit 18423d3562f396206e0928a71177eeb2edfed077:
Merge tag 'perf-urgent-for-mingo' of
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/urgent
(2012-11-13 18:51:51 +0100)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux
tags/perf-urgent-for-mingo
for you to fetch changes up to 7321090f6751c9987c26a8c81c63680d16a614d7:
perf kvm: Fix building perf kvm on non x86 arches (2012-11-23 20:40:17
-0300)
perf/urgent fixes
. Don't build 'perf kvm stat on non-x86 arches, fix from Xiao Guangrong.
. UAPI fixes to get perf building again in non-x86 arches, from David Howells.
Signed-off-by: Arnaldo Carvalho de Melo a...@redhat.com
Arnaldo Carvalho de Melo (1):
Merge tag 'perf-uapi-20121119' of
git://git.infradead.org/users/dhowells/linux-headers into perf/urgent
David Howells (6):
x86: Export asm/{svm.h,vmx.h,perf_regs.h}
Merge branch 'x86-pre-uapi' into perf-uapi
tools: Define a Makefile function to do subdir processing
tools: Honour the O= flag when tool build called from a higher Makefile
tools: Pass the target in descend
perf: Make perf build for x86 with UAPI disintegration applied
Sukadev Bhattiprolu (1):
perf powerpc: Use uapi/unistd.h to fix build error
Xiao Guangrong (2):
perf kvm: Rename perf_kvm to perf_kvm_stat
perf kvm: Fix building perf kvm on non x86 arches
I probably sound like a broken record at this point, but I've not seen
this go into any tip branch, nor is it in Linus' tree. Hopefully this
gets pulled before 3.7 is released.
josh
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Re: [PATCH] vfio powerpc: implemented IOMMU driver for VFIO
On Wed, 2012-11-28 at 18:21 +1100, Alexey Kardashevskiy wrote:
VFIO implements platform independent stuff such as
a PCI driver, BAR access (via read/write on a file descriptor
or direct mapping when possible) and IRQ signaling.
The platform dependent part includes IOMMU initialization
and handling. This patch implements an IOMMU driver for VFIO
which does mapping/unmapping pages for the guest IO and
provides information about DMA window (required by a POWERPC
guest).
The counterpart in QEMU is required to support this functionality.
Cc: David Gibson da...@gibson.dropbear.id.au
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
drivers/vfio/Kconfig|6 +
drivers/vfio/Makefile |1 +
drivers/vfio/vfio_iommu_spapr_tce.c | 332
+++
include/linux/vfio.h| 33
4 files changed, 372 insertions(+)
create mode 100644 drivers/vfio/vfio_iommu_spapr_tce.c
diff --git a/drivers/vfio/Kconfig b/drivers/vfio/Kconfig
index 7cd5dec..b464687 100644
--- a/drivers/vfio/Kconfig
+++ b/drivers/vfio/Kconfig
@@ -3,10 +3,16 @@ config VFIO_IOMMU_TYPE1
depends on VFIO
default n
+config VFIO_IOMMU_SPAPR_TCE
+ tristate
+ depends on VFIO SPAPR_TCE_IOMMU
+ default n
+
menuconfig VFIO
tristate VFIO Non-Privileged userspace driver framework
depends on IOMMU_API
select VFIO_IOMMU_TYPE1 if X86
+ select VFIO_IOMMU_SPAPR_TCE if PPC_POWERNV
help
VFIO provides a framework for secure userspace device drivers.
See Documentation/vfio.txt for more details.
diff --git a/drivers/vfio/Makefile b/drivers/vfio/Makefile
index 2398d4a..72bfabc 100644
--- a/drivers/vfio/Makefile
+++ b/drivers/vfio/Makefile
@@ -1,3 +1,4 @@
obj-$(CONFIG_VFIO) += vfio.o
obj-$(CONFIG_VFIO_IOMMU_TYPE1) += vfio_iommu_type1.o
+obj-$(CONFIG_VFIO_IOMMU_SPAPR_TCE) += vfio_iommu_spapr_tce.o
obj-$(CONFIG_VFIO_PCI) += pci/
diff --git a/drivers/vfio/vfio_iommu_spapr_tce.c
b/drivers/vfio/vfio_iommu_spapr_tce.c
new file mode 100644
index 000..b98770e
--- /dev/null
+++ b/drivers/vfio/vfio_iommu_spapr_tce.c
@@ -0,0 +1,332 @@
+/*
+ * VFIO: IOMMU DMA mapping support for TCE on POWER
+ *
+ * Copyright (C) 2012 IBM Corp. All rights reserved.
+ * Author: Alexey Kardashevskiy a...@ozlabs.ru
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Derived from original vfio_iommu_type1.c:
+ * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
+ * Author: Alex Williamson alex.william...@redhat.com
+ */
+
+#include linux/module.h
+#include linux/pci.h
+#include linux/slab.h
+#include linux/uaccess.h
+#include linux/err.h
+#include linux/vfio.h
+#include asm/iommu.h
+
+#define DRIVER_VERSION 0.1
+#define DRIVER_AUTHOR a...@ozlabs.ru
+#define DRIVER_DESC VFIO IOMMU SPAPR TCE
+
+static void tce_iommu_detach_group(void *iommu_data,
+ struct iommu_group *iommu_group);
+
+/*
+ * VFIO IOMMU fd for SPAPR_TCE IOMMU implementation
+ */
+
+/*
+ * This code handles mapping and unmapping of user data buffers
+ * into DMA'ble space using the IOMMU
+ */
+
+#define NPAGE_TO_SIZE(npage) ((size_t)(npage) PAGE_SHIFT)
+
+struct vwork {
+ struct mm_struct*mm;
+ longnpage;
+ struct work_struct work;
+};
+
+/* delayed decrement/increment for locked_vm */
+static void lock_acct_bg(struct work_struct *work)
+{
+ struct vwork *vwork = container_of(work, struct vwork, work);
+ struct mm_struct *mm;
+
+ mm = vwork-mm;
+ down_write(mm-mmap_sem);
+ mm-locked_vm += vwork-npage;
+ up_write(mm-mmap_sem);
+ mmput(mm);
+ kfree(vwork);
+}
+
+static void lock_acct(long npage)
+{
+ struct vwork *vwork;
+ struct mm_struct *mm;
+
+ if (!current-mm)
+ return; /* process exited */
+
+ if (down_write_trylock(current-mm-mmap_sem)) {
+ current-mm-locked_vm += npage;
+ up_write(current-mm-mmap_sem);
+ return;
+ }
+
+ /*
+ * Couldn't get mmap_sem lock, so must setup to update
+ * mm-locked_vm later. If locked_vm were atomic, we
+ * wouldn't need this silliness
+ */
+ vwork = kmalloc(sizeof(struct vwork), GFP_KERNEL);
+ if (!vwork)
+ return;
+ mm = get_task_mm(current);
+ if (!mm) {
+ kfree(vwork);
+ return;
+ }
+ INIT_WORK(vwork-work, lock_acct_bg);
+ vwork-mm = mm;
+ vwork-npage = npage;
+ schedule_work(vwork-work);
+}
This looks familiar, should we split it out to a common file instead of
duplicating it?
+
+/*
+ * The container descriptor supports only a single group per container.
+ * Required by the
Re: [PATCH] vfio powerpc: enabled on powernv platform
On Wed, 2012-11-28 at 18:18 +1100, Alexey Kardashevskiy wrote:
This patch initializes IOMMU groups based on the IOMMU
configuration discovered during the PCI scan on POWERNV
(POWER non virtualized) platform. The IOMMU groups are
to be used later by VFIO driver (PCI pass through).
It also implements an API for mapping/unmapping pages for
guest PCI drivers and providing DMA window properties.
This API is going to be used later by QEMU-VFIO to handle
h_put_tce hypercalls from the KVM guest.
Although this driver has been tested only on the POWERNV
platform, it should work on any platform which supports
TCE tables.
To enable VFIO on POWER, enable SPAPR_TCE_IOMMU config
option and configure VFIO as required.
Cc: David Gibson da...@gibson.dropbear.id.au
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
arch/powerpc/include/asm/iommu.h |9 +++
arch/powerpc/kernel/iommu.c | 147
++
arch/powerpc/platforms/powernv/pci.c | 135 +++
drivers/iommu/Kconfig|8 ++
4 files changed, 299 insertions(+)
diff --git a/arch/powerpc/include/asm/iommu.h
b/arch/powerpc/include/asm/iommu.h
index cbfe678..5c7087a 100644
--- a/arch/powerpc/include/asm/iommu.h
+++ b/arch/powerpc/include/asm/iommu.h
@@ -76,6 +76,9 @@ struct iommu_table {
struct iommu_pool large_pool;
struct iommu_pool pools[IOMMU_NR_POOLS];
unsigned long *it_map; /* A simple allocation bitmap for now */
+#ifdef CONFIG_IOMMU_API
+ struct iommu_group *it_group;
+#endif
};
struct scatterlist;
@@ -147,5 +150,11 @@ static inline void iommu_restore(void)
}
#endif
+extern long iommu_clear_tces(struct iommu_table *tbl, unsigned long entry,
+ unsigned long pages);
+extern long iommu_put_tces(struct iommu_table *tbl, unsigned long entry,
+ uint64_t tce, enum dma_data_direction direction,
+ unsigned long pages);
+
#endif /* __KERNEL__ */
#endif /* _ASM_IOMMU_H */
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
index ff5a6ce..1456b6e 100644
--- a/arch/powerpc/kernel/iommu.c
+++ b/arch/powerpc/kernel/iommu.c
@@ -44,6 +44,7 @@
#include asm/kdump.h
#include asm/fadump.h
#include asm/vio.h
+#include asm/tce.h
#define DBG(...)
@@ -856,3 +857,149 @@ void iommu_free_coherent(struct iommu_table *tbl,
size_t size,
free_pages((unsigned long)vaddr, get_order(size));
}
}
+
+#ifdef CONFIG_IOMMU_API
+/*
+ * SPAPR TCE API
+ */
+static void tce_flush(struct iommu_table *tbl)
+{
+ /* Flush/invalidate TLB caches if necessary */
+ if (ppc_md.tce_flush)
+ ppc_md.tce_flush(tbl);
+
+ /* Make sure updates are seen by hardware */
+ mb();
+}
+
+/*
+ * iommu_clear_tces clears tces and returned the number of pages
+ * which it called put_page() on.
+ */
+static long clear_tces_nolock(struct iommu_table *tbl, unsigned long entry,
+ unsigned long pages)
+{
+ int i, pages_put = 0;
+ unsigned long oldtce;
+ struct page *page;
+
+ for (i = 0; i pages; ++i) {
+ oldtce = ppc_md.tce_get(tbl, entry + i);
+ ppc_md.tce_free(tbl, entry + i, 1);
+
+ if (!(oldtce (TCE_PCI_WRITE | TCE_PCI_READ)))
+ continue;
+
+ page = pfn_to_page(oldtce PAGE_SHIFT);
+
+ WARN_ON(!page);
+ if (!page)
+ continue;
+
+ if (oldtce TCE_PCI_WRITE)
+ SetPageDirty(page);
+
+ ++pages_put;
+ put_page(page);
+ }
+
+ return pages_put;
+}
+
+/*
+ * iommu_clear_tces clears tces and returned the number of released pages
+ */
+long iommu_clear_tces(struct iommu_table *tbl, unsigned long entry,
+ unsigned long pages)
+{
+ int ret;
+ struct iommu_pool *pool = get_pool(tbl, entry);
+
+ spin_lock((pool-lock));
+ ret = clear_tces_nolock(tbl, entry, pages);
+ tce_flush(tbl);
+ spin_unlock((pool-lock));
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(iommu_clear_tces);
+
+static int put_tce(struct iommu_table *tbl, unsigned long entry,
+ uint64_t tce, enum dma_data_direction direction)
+{
+ int ret;
+ struct page *page = NULL;
+ unsigned long kva, offset;
+
+ /* Map new TCE */
+ offset = (tce IOMMU_PAGE_MASK) - (tce PAGE_MASK);
+
+ ret = get_user_pages_fast(tce PAGE_MASK, 1,
+ direction != DMA_TO_DEVICE, page);
+ if (ret 1) {
+ printk(KERN_ERR tce_vfio: get_user_pages_fast failed tce=%llx
ioba=%lx ret=%d\n,
+ tce, entry IOMMU_PAGE_SHIFT, ret);
+ if (!ret)
+ ret = -EFAULT;
+ return ret;
+ }
+
+ kva = (unsigned long) page_address(page);
+ kva += offset;
Re: [PATCH V7 1/7] kbuild: centralize .dts-.dtb rule
On Wed, 2012-11-28 at 11:33 -0700, Stephen Warren wrote: Following this patch (http://lkml.org/lkml/2012/11/27/555), I posted a series of patches to convert almost all architectures to using the centralized rule. The one architecture I didn't convert was PowerPC. I didn't convert it because arch/powerpc/boot/Makefile contains a large number of rules (to generate *Image.% where % is a board name) that depend on %.dtb, which is expected to be in arch/powerpc/boot rather than arch/powerpc/boot/dts. Now, I guess it's possible to convert them all to expect the .dtb files to be in dts/ and also have arch/powerpc/boot/Makefile call make in boot/dts/ to make each required .dtb file. However, the patch would be a bit larger than all the other architecture patches. Do you want me to do that conversion, or would you rather I leave PowerPC alone? Thanks for any feedback. Kumar, any objection to moving the dtb's to arch/powerpc/boot/dtb/ ? Other than breaking a script or two out there ... Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 1/2] powerpc: remove section changes from _GLOBAL() and friends
These sometimes produce unexpected results and make it hard to put the start up code (for 64 bit) into the .head.text section. This also adds some explicit .texts at the start of asm files that did not have them. Suggested by Alan Modra. Cc: Alan Modra amo...@au1.ibm.com Signed-off-by: Stephen Rothwell s...@canb.auug.org.au --- arch/powerpc/include/asm/ppc_asm.h |7 --- arch/powerpc/kernel/cpu_setup_44x.S|1 + arch/powerpc/kernel/cpu_setup_6xx.S|1 + arch/powerpc/kernel/cpu_setup_a2.S |1 + arch/powerpc/kernel/cpu_setup_fsl_booke.S |1 + arch/powerpc/kernel/cpu_setup_pa6t.S |1 + arch/powerpc/kernel/cpu_setup_power.S |1 + arch/powerpc/kernel/cpu_setup_ppc970.S |1 + arch/powerpc/kernel/entry_32.S |2 ++ arch/powerpc/kernel/fpu.S |1 + arch/powerpc/kernel/head_64.S |7 +++ arch/powerpc/kernel/head_fsl_booke.S |2 ++ arch/powerpc/kernel/idle_6xx.S |5 + arch/powerpc/kernel/idle_book3e.S |2 ++ arch/powerpc/kernel/l2cr_6xx.S |1 + arch/powerpc/kernel/misc_32.S |4 arch/powerpc/kernel/misc_64.S |1 + arch/powerpc/kernel/ppc_save_regs.S|2 ++ arch/powerpc/kernel/reloc_32.S |2 ++ arch/powerpc/kernel/reloc_64.S |2 ++ arch/powerpc/kernel/swsusp_32.S|5 + arch/powerpc/kernel/swsusp_booke.S |5 + arch/powerpc/kernel/systbl.S |2 ++ arch/powerpc/kernel/vector.S |2 ++ arch/powerpc/kvm/book3s_hv_interrupts.S|2 ++ arch/powerpc/kvm/book3s_hv_rmhandlers.S|2 ++ arch/powerpc/kvm/book3s_interrupts.S |2 ++ arch/powerpc/kvm/book3s_rmhandlers.S |2 ++ arch/powerpc/kvm/booke_interrupts.S|2 ++ arch/powerpc/kvm/bookehv_interrupts.S |2 ++ arch/powerpc/kvm/fpu.S |2 ++ arch/powerpc/lib/checksum_64.S |2 ++ arch/powerpc/lib/copypage_power7.S |2 ++ arch/powerpc/lib/copyuser_64.S |1 + arch/powerpc/lib/copyuser_power7.S |2 ++ arch/powerpc/lib/div64.S |2 ++ arch/powerpc/lib/hweight_64.S |2 ++ arch/powerpc/lib/ldstfp.S |2 ++ arch/powerpc/lib/mem_64.S |2 ++ arch/powerpc/lib/memcpy_64.S |1 + arch/powerpc/lib/memcpy_power7.S |2 ++ arch/powerpc/mm/slb_low.S |2 ++ arch/powerpc/mm/tlb_nohash_low.S |2 ++ arch/powerpc/platforms/pasemi/powersave.S |2 ++ arch/powerpc/platforms/powermac/cache.S|2 ++ arch/powerpc/platforms/powernv/opal-wrappers.S |2 ++ arch/powerpc/sysdev/6xx-suspend.S |2 ++ arch/powerpc/sysdev/dcr-low.S |2 ++ 48 files changed, 98 insertions(+), 7 deletions(-) diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h index ea2a86e..5c9af12 100644 --- a/arch/powerpc/include/asm/ppc_asm.h +++ b/arch/powerpc/include/asm/ppc_asm.h @@ -200,7 +200,6 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR) #define GLUE(a,b) XGLUE(a,b) #define _GLOBAL(name) \ - .section .text; \ .align 2 ; \ .globl name; \ .globl GLUE(.,name); \ @@ -214,7 +213,6 @@ name: \ GLUE(.,name): #define _INIT_GLOBAL(name) \ - __REF; \ .align 2 ; \ .globl name; \ .globl GLUE(.,name); \ @@ -228,7 +226,6 @@ name: \ GLUE(.,name): #define _KPROBE(name) \ - .section .kprobes.text,a; \ .align 2 ; \ .globl name; \ .globl GLUE(.,name); \ @@ -242,7 +239,6 @@ name: \ GLUE(.,name): #define _STATIC(name) \ - .section .text; \ .align 2 ; \ .section .opd,aw; \ name: \ @@ -254,7 +250,6 @@ name: \ GLUE(.,name): #define _INIT_STATIC(name) \ - __REF; \ .align 2 ; \ .section .opd,aw; \ name: \ @@ -272,13 +267,11 @@ GLUE(.,name): n: #define _GLOBAL(n) \ - .text; \ .stabs __stringify(n:F-1),N_FUN,0,0,n;\ .globl n; \ n: #define _KPROBE(n) \ - .section .kprobes.text,a; \ .globl n; \ n: diff --git a/arch/powerpc/kernel/cpu_setup_44x.S b/arch/powerpc/kernel/cpu_setup_44x.S index e32b4a9..3cac909 100644 --- a/arch/powerpc/kernel/cpu_setup_44x.S +++ b/arch/powerpc/kernel/cpu_setup_44x.S @@ -17,6 +17,7 @@ #include asm/cputable.h #include asm/ppc_asm.h + .text _GLOBAL(__setup_cpu_440ep) b __init_fpu_44x _GLOBAL(__setup_cpu_440epx) diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S index
[PATCH 2/2] powerpc: collapse some equivalent asm macros
Since we removed the section changes from them, some of the entry point macros are now the same, so just use the obvious ones. Signed-off-by: Stephen Rothwell s...@canb.auug.org.au --- arch/powerpc/include/asm/ppc_asm.h | 41 arch/powerpc/kernel/head_64.S |6 +++--- arch/powerpc/kernel/misc_32.S |2 +- arch/powerpc/kernel/misc_64.S |2 +- 4 files changed, 5 insertions(+), 46 deletions(-) diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h index 5c9af12..896204c 100644 --- a/arch/powerpc/include/asm/ppc_asm.h +++ b/arch/powerpc/include/asm/ppc_asm.h @@ -212,32 +212,6 @@ name: \ .type GLUE(.,name),@function; \ GLUE(.,name): -#define _INIT_GLOBAL(name) \ - .align 2 ; \ - .globl name; \ - .globl GLUE(.,name); \ - .section .opd,aw; \ -name: \ - .quad GLUE(.,name); \ - .quad .TOC.@tocbase; \ - .quad 0; \ - .previous; \ - .type GLUE(.,name),@function; \ -GLUE(.,name): - -#define _KPROBE(name) \ - .align 2 ; \ - .globl name; \ - .globl GLUE(.,name); \ - .section .opd,aw; \ -name: \ - .quad GLUE(.,name); \ - .quad .TOC.@tocbase; \ - .quad 0; \ - .previous; \ - .type GLUE(.,name),@function; \ -GLUE(.,name): - #define _STATIC(name) \ .align 2 ; \ .section .opd,aw; \ @@ -249,17 +223,6 @@ name: \ .type GLUE(.,name),@function; \ GLUE(.,name): -#define _INIT_STATIC(name) \ - .align 2 ; \ - .section .opd,aw; \ -name: \ - .quad GLUE(.,name); \ - .quad .TOC.@tocbase; \ - .quad 0; \ - .previous; \ - .type GLUE(.,name),@function; \ -GLUE(.,name): - #else /* 32-bit */ #define _ENTRY(n) \ @@ -271,10 +234,6 @@ n: .globl n; \ n: -#define _KPROBE(n) \ - .globl n; \ -n: - #endif /* diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S index 8d3edb9..721d17b 100644 --- a/arch/powerpc/kernel/head_64.S +++ b/arch/powerpc/kernel/head_64.S @@ -355,7 +355,7 @@ _GLOBAL(__start_initialization_multiplatform) __REF -_INIT_STATIC(__boot_from_prom) +_STATIC(__boot_from_prom) #ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE /* Save parameters */ mr r31,r3 @@ -687,7 +687,7 @@ p_toc: .llong __toc_start + 0x8000 - 0b /* * This is where the main kernel code starts. */ -_INIT_STATIC(start_here_multiplatform) +_STATIC(start_here_multiplatform) /* set up the TOC (real address) */ bl .relative_toc @@ -757,7 +757,7 @@ _INIT_STATIC(start_here_multiplatform) b . /* prevent speculative execution */ /* This is where all platforms converge execution */ -_INIT_GLOBAL(start_here_common) +_GLOBAL(start_here_common) /* relocation is on at this point */ std r1,PACAKSAVE(r13) diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S index 342c4d9..595af40 100644 --- a/arch/powerpc/kernel/misc_32.S +++ b/arch/powerpc/kernel/misc_32.S @@ -328,7 +328,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_UNIFIED_ID_CACHE) * flush_icache_range(unsigned long start, unsigned long stop) */ .section.kprobes.text,a -_KPROBE(__flush_icache_range) +_ENTRY(__flush_icache_range) BEGIN_FTR_SECTION blr /* for 601, do nothing */ END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE) diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S index 0fbe125..bc29512 100644 --- a/arch/powerpc/kernel/misc_64.S +++ b/arch/powerpc/kernel/misc_64.S @@ -68,7 +68,7 @@ PPC64_CACHES: */ .section.kprobes.text,a -_KPROBE(__flush_icache_range) +_GLOBAL(__flush_icache_range) /* * Flush the data cache to memory -- 1.7.10.280.gaa39 -- Cheers, Stephen Rothwells...@canb.auug.org.au pgpZdqw3rj8Uh.pgp Description: PGP signature ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] vfio powerpc: implemented IOMMU driver for VFIO
On 29/11/12 08:01, Alex Williamson wrote:
On Wed, 2012-11-28 at 18:21 +1100, Alexey Kardashevskiy wrote:
VFIO implements platform independent stuff such as
a PCI driver, BAR access (via read/write on a file descriptor
or direct mapping when possible) and IRQ signaling.
The platform dependent part includes IOMMU initialization
and handling. This patch implements an IOMMU driver for VFIO
which does mapping/unmapping pages for the guest IO and
provides information about DMA window (required by a POWERPC
guest).
The counterpart in QEMU is required to support this functionality.
Cc: David Gibson da...@gibson.dropbear.id.au
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
drivers/vfio/Kconfig|6 +
drivers/vfio/Makefile |1 +
drivers/vfio/vfio_iommu_spapr_tce.c | 332 +++
include/linux/vfio.h| 33
4 files changed, 372 insertions(+)
create mode 100644 drivers/vfio/vfio_iommu_spapr_tce.c
diff --git a/drivers/vfio/Kconfig b/drivers/vfio/Kconfig
index 7cd5dec..b464687 100644
--- a/drivers/vfio/Kconfig
+++ b/drivers/vfio/Kconfig
@@ -3,10 +3,16 @@ config VFIO_IOMMU_TYPE1
depends on VFIO
default n
+config VFIO_IOMMU_SPAPR_TCE
+ tristate
+ depends on VFIO SPAPR_TCE_IOMMU
+ default n
+
menuconfig VFIO
tristate VFIO Non-Privileged userspace driver framework
depends on IOMMU_API
select VFIO_IOMMU_TYPE1 if X86
+ select VFIO_IOMMU_SPAPR_TCE if PPC_POWERNV
help
VFIO provides a framework for secure userspace device drivers.
See Documentation/vfio.txt for more details.
diff --git a/drivers/vfio/Makefile b/drivers/vfio/Makefile
index 2398d4a..72bfabc 100644
--- a/drivers/vfio/Makefile
+++ b/drivers/vfio/Makefile
@@ -1,3 +1,4 @@
obj-$(CONFIG_VFIO) += vfio.o
obj-$(CONFIG_VFIO_IOMMU_TYPE1) += vfio_iommu_type1.o
+obj-$(CONFIG_VFIO_IOMMU_SPAPR_TCE) += vfio_iommu_spapr_tce.o
obj-$(CONFIG_VFIO_PCI) += pci/
diff --git a/drivers/vfio/vfio_iommu_spapr_tce.c
b/drivers/vfio/vfio_iommu_spapr_tce.c
new file mode 100644
index 000..b98770e
--- /dev/null
+++ b/drivers/vfio/vfio_iommu_spapr_tce.c
@@ -0,0 +1,332 @@
+/*
+ * VFIO: IOMMU DMA mapping support for TCE on POWER
+ *
+ * Copyright (C) 2012 IBM Corp. All rights reserved.
+ * Author: Alexey Kardashevskiy a...@ozlabs.ru
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Derived from original vfio_iommu_type1.c:
+ * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
+ * Author: Alex Williamson alex.william...@redhat.com
+ */
+
+#include linux/module.h
+#include linux/pci.h
+#include linux/slab.h
+#include linux/uaccess.h
+#include linux/err.h
+#include linux/vfio.h
+#include asm/iommu.h
+
+#define DRIVER_VERSION 0.1
+#define DRIVER_AUTHOR a...@ozlabs.ru
+#define DRIVER_DESC VFIO IOMMU SPAPR TCE
+
+static void tce_iommu_detach_group(void *iommu_data,
+ struct iommu_group *iommu_group);
+
+/*
+ * VFIO IOMMU fd for SPAPR_TCE IOMMU implementation
+ */
+
+/*
+ * This code handles mapping and unmapping of user data buffers
+ * into DMA'ble space using the IOMMU
+ */
+
+#define NPAGE_TO_SIZE(npage) ((size_t)(npage) PAGE_SHIFT)
+
+struct vwork {
+ struct mm_struct*mm;
+ longnpage;
+ struct work_struct work;
+};
+
+/* delayed decrement/increment for locked_vm */
+static void lock_acct_bg(struct work_struct *work)
+{
+ struct vwork *vwork = container_of(work, struct vwork, work);
+ struct mm_struct *mm;
+
+ mm = vwork-mm;
+ down_write(mm-mmap_sem);
+ mm-locked_vm += vwork-npage;
+ up_write(mm-mmap_sem);
+ mmput(mm);
+ kfree(vwork);
+}
+
+static void lock_acct(long npage)
+{
+ struct vwork *vwork;
+ struct mm_struct *mm;
+
+ if (!current-mm)
+ return; /* process exited */
+
+ if (down_write_trylock(current-mm-mmap_sem)) {
+ current-mm-locked_vm += npage;
+ up_write(current-mm-mmap_sem);
+ return;
+ }
+
+ /*
+* Couldn't get mmap_sem lock, so must setup to update
+* mm-locked_vm later. If locked_vm were atomic, we
+* wouldn't need this silliness
+*/
+ vwork = kmalloc(sizeof(struct vwork), GFP_KERNEL);
+ if (!vwork)
+ return;
+ mm = get_task_mm(current);
+ if (!mm) {
+ kfree(vwork);
+ return;
+ }
+ INIT_WORK(vwork-work, lock_acct_bg);
+ vwork-mm = mm;
+ vwork-npage = npage;
+ schedule_work(vwork-work);
+}
This looks familiar, should we split it out to a common file instead of
duplicating it?
It is simple cut-n-paste from type1 driver :)
Moving it to a separate file is up to you but it is
[PATCH] vfio powerpc: enabled on powernv platform
This patch initializes IOMMU groups based on the IOMMU
configuration discovered during the PCI scan on POWERNV
(POWER non virtualized) platform. The IOMMU groups are
to be used later by VFIO driver (PCI pass through).
It also implements an API for mapping/unmapping pages for
guest PCI drivers and providing DMA window properties.
This API is going to be used later by QEMU-VFIO to handle
h_put_tce hypercalls from the KVM guest.
Although this driver has been tested only on the POWERNV
platform, it should work on any platform which supports
TCE tables.
To enable VFIO on POWER, enable SPAPR_TCE_IOMMU config
option and configure VFIO as required.
Cc: David Gibson da...@gibson.dropbear.id.au
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
arch/powerpc/include/asm/iommu.h |9 ++
arch/powerpc/kernel/iommu.c | 159 ++
arch/powerpc/platforms/powernv/pci.c | 135 +
drivers/iommu/Kconfig|8 ++
4 files changed, 311 insertions(+)
diff --git a/arch/powerpc/include/asm/iommu.h b/arch/powerpc/include/asm/iommu.h
index cbfe678..5c7087a 100644
--- a/arch/powerpc/include/asm/iommu.h
+++ b/arch/powerpc/include/asm/iommu.h
@@ -76,6 +76,9 @@ struct iommu_table {
struct iommu_pool large_pool;
struct iommu_pool pools[IOMMU_NR_POOLS];
unsigned long *it_map; /* A simple allocation bitmap for now */
+#ifdef CONFIG_IOMMU_API
+ struct iommu_group *it_group;
+#endif
};
struct scatterlist;
@@ -147,5 +150,11 @@ static inline void iommu_restore(void)
}
#endif
+extern long iommu_clear_tces(struct iommu_table *tbl, unsigned long entry,
+ unsigned long pages);
+extern long iommu_put_tces(struct iommu_table *tbl, unsigned long entry,
+ uint64_t tce, enum dma_data_direction direction,
+ unsigned long pages);
+
#endif /* __KERNEL__ */
#endif /* _ASM_IOMMU_H */
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
index ff5a6ce..1225fbb 100644
--- a/arch/powerpc/kernel/iommu.c
+++ b/arch/powerpc/kernel/iommu.c
@@ -44,6 +44,7 @@
#include asm/kdump.h
#include asm/fadump.h
#include asm/vio.h
+#include asm/tce.h
#define DBG(...)
@@ -856,3 +857,161 @@ void iommu_free_coherent(struct iommu_table *tbl, size_t
size,
free_pages((unsigned long)vaddr, get_order(size));
}
}
+
+#ifdef CONFIG_IOMMU_API
+/*
+ * SPAPR TCE API
+ */
+static void tce_flush(struct iommu_table *tbl)
+{
+ /* Flush/invalidate TLB caches if necessary */
+ if (ppc_md.tce_flush)
+ ppc_md.tce_flush(tbl);
+
+ /* Make sure updates are seen by hardware */
+ mb();
+}
+
+/*
+ * iommu_clear_tces clears tces and returned the number of pages
+ * which it called put_page() on.
+ */
+static long clear_tces_nolock(struct iommu_table *tbl, unsigned long entry,
+ unsigned long pages)
+{
+ int i, retpages = 0;
+ unsigned long oldtce;
+ struct page *page;
+
+ for (i = 0; i pages; ++i) {
+ oldtce = ppc_md.tce_get(tbl, entry + i);
+ ppc_md.tce_free(tbl, entry + i, 1);
+
+ if (!(oldtce (TCE_PCI_WRITE | TCE_PCI_READ)))
+ continue;
+
+ page = pfn_to_page(oldtce PAGE_SHIFT);
+
+ WARN_ON(!page);
+ if (!page)
+ continue;
+
+ if (oldtce TCE_PCI_WRITE)
+ SetPageDirty(page);
+
+ if (!(oldtce ~PAGE_MASK))
+ ++retpages;
+
+ put_page(page);
+ }
+
+ return retpages;
+}
+
+/*
+ * iommu_clear_tces clears tces and returned the number of released pages
+ */
+long iommu_clear_tces(struct iommu_table *tbl, unsigned long entry,
+ unsigned long pages)
+{
+ int ret;
+ struct iommu_pool *pool = get_pool(tbl, entry);
+
+ spin_lock((pool-lock));
+ ret = clear_tces_nolock(tbl, entry, pages);
+ tce_flush(tbl);
+ spin_unlock((pool-lock));
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(iommu_clear_tces);
+
+static int put_tce(struct iommu_table *tbl, unsigned long entry,
+ uint64_t tce, enum dma_data_direction direction)
+{
+ int ret;
+ struct page *page = NULL;
+ unsigned long kva, offset;
+
+ /* Map new TCE */
+ offset = (tce IOMMU_PAGE_MASK) - (tce PAGE_MASK);
+
+ ret = get_user_pages_fast(tce PAGE_MASK, 1,
+ direction != DMA_TO_DEVICE, page);
+ if (ret 1) {
+ printk(KERN_ERR tce_vfio: get_user_pages_fast failed tce=%llx
ioba=%lx ret=%d\n,
+ tce, entry IOMMU_PAGE_SHIFT, ret);
+ if (!ret)
+ ret = -EFAULT;
+ return ret;
+ }
+
+ kva = (unsigned long) page_address(page);
+ kva += offset;
+
+ /* tce_build receives a virtual address */
+
[PATCH] dts/t4240: Corrected PAMU device address range to encompass 6 PAMU partitions.
Signed-off-by: Vakul Garg va...@freescale.com
---
arch/powerpc/boot/dts/fsl/t4240si-post.dtsi |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index ea6e2f4..e8809cd 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -231,7 +231,7 @@
iommu@2 {
compatible = fsl,pamu-v1.0, fsl,pamu;
- reg = 0x2 0x4000;
+ reg = 0x2 0x6000;
interrupts =
24 2 0 0
16 2 1 30;
--
1.7.7
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] vfio powerpc: enabled on powernv platform
On Thu, 2012-11-29 at 14:53 +1100, Alexey Kardashevskiy wrote:
This patch initializes IOMMU groups based on the IOMMU
configuration discovered during the PCI scan on POWERNV
(POWER non virtualized) platform. The IOMMU groups are
to be used later by VFIO driver (PCI pass through).
It also implements an API for mapping/unmapping pages for
guest PCI drivers and providing DMA window properties.
This API is going to be used later by QEMU-VFIO to handle
h_put_tce hypercalls from the KVM guest.
Although this driver has been tested only on the POWERNV
platform, it should work on any platform which supports
TCE tables.
To enable VFIO on POWER, enable SPAPR_TCE_IOMMU config
option and configure VFIO as required.
Cc: David Gibson da...@gibson.dropbear.id.au
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
arch/powerpc/include/asm/iommu.h |9 ++
arch/powerpc/kernel/iommu.c | 159
++
arch/powerpc/platforms/powernv/pci.c | 135 +
drivers/iommu/Kconfig|8 ++
4 files changed, 311 insertions(+)
diff --git a/arch/powerpc/include/asm/iommu.h
b/arch/powerpc/include/asm/iommu.h
index cbfe678..5c7087a 100644
--- a/arch/powerpc/include/asm/iommu.h
+++ b/arch/powerpc/include/asm/iommu.h
@@ -76,6 +76,9 @@ struct iommu_table {
struct iommu_pool large_pool;
struct iommu_pool pools[IOMMU_NR_POOLS];
unsigned long *it_map; /* A simple allocation bitmap for now */
+#ifdef CONFIG_IOMMU_API
+ struct iommu_group *it_group;
+#endif
};
struct scatterlist;
@@ -147,5 +150,11 @@ static inline void iommu_restore(void)
}
#endif
+extern long iommu_clear_tces(struct iommu_table *tbl, unsigned long entry,
+ unsigned long pages);
+extern long iommu_put_tces(struct iommu_table *tbl, unsigned long entry,
+ uint64_t tce, enum dma_data_direction direction,
+ unsigned long pages);
+
#endif /* __KERNEL__ */
#endif /* _ASM_IOMMU_H */
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
index ff5a6ce..1225fbb 100644
--- a/arch/powerpc/kernel/iommu.c
+++ b/arch/powerpc/kernel/iommu.c
@@ -44,6 +44,7 @@
#include asm/kdump.h
#include asm/fadump.h
#include asm/vio.h
+#include asm/tce.h
#define DBG(...)
@@ -856,3 +857,161 @@ void iommu_free_coherent(struct iommu_table *tbl,
size_t size,
free_pages((unsigned long)vaddr, get_order(size));
}
}
+
+#ifdef CONFIG_IOMMU_API
+/*
+ * SPAPR TCE API
+ */
+static void tce_flush(struct iommu_table *tbl)
+{
+ /* Flush/invalidate TLB caches if necessary */
+ if (ppc_md.tce_flush)
+ ppc_md.tce_flush(tbl);
+
+ /* Make sure updates are seen by hardware */
+ mb();
+}
+
+/*
+ * iommu_clear_tces clears tces and returned the number of pages
+ * which it called put_page() on.
+ */
+static long clear_tces_nolock(struct iommu_table *tbl, unsigned long entry,
+ unsigned long pages)
+{
+ int i, retpages = 0;
+ unsigned long oldtce;
+ struct page *page;
+
+ for (i = 0; i pages; ++i) {
+ oldtce = ppc_md.tce_get(tbl, entry + i);
+ ppc_md.tce_free(tbl, entry + i, 1);
+
+ if (!(oldtce (TCE_PCI_WRITE | TCE_PCI_READ)))
+ continue;
+
+ page = pfn_to_page(oldtce PAGE_SHIFT);
+
+ WARN_ON(!page);
+ if (!page)
+ continue;
+
+ if (oldtce TCE_PCI_WRITE)
+ SetPageDirty(page);
+
+ if (!(oldtce ~PAGE_MASK))
+ ++retpages;
I'm confused, it looks like you're trying to only increment the counter
for tce pages aligned at the start of a page, but don't we need to mask
out the read/write and valid bits? Trickiness like this demands a
comment.
+
+ put_page(page);
+ }
+
+ return retpages;
+}
+
+/*
+ * iommu_clear_tces clears tces and returned the number of released pages
+ */
+long iommu_clear_tces(struct iommu_table *tbl, unsigned long entry,
+ unsigned long pages)
+{
+ int ret;
+ struct iommu_pool *pool = get_pool(tbl, entry);
+
+ spin_lock((pool-lock));
+ ret = clear_tces_nolock(tbl, entry, pages);
+ tce_flush(tbl);
+ spin_unlock((pool-lock));
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(iommu_clear_tces);
+
+static int put_tce(struct iommu_table *tbl, unsigned long entry,
+ uint64_t tce, enum dma_data_direction direction)
+{
+ int ret;
+ struct page *page = NULL;
+ unsigned long kva, offset;
+
+ /* Map new TCE */
+ offset = (tce IOMMU_PAGE_MASK) - (tce PAGE_MASK);
+
+ ret = get_user_pages_fast(tce PAGE_MASK, 1,
+ direction != DMA_TO_DEVICE, page);
+ if (ret 1) {
+ printk(KERN_ERR tce_vfio: get_user_pages_fast failed
[PATCH] dts/t4240: Added SEC-5.0 device tree.
Signed-off-by: Vakul Garg va...@freescale.com
---
This patch has a dependency on the patch titled:
Corrected PAMU device address range to encompass 6 PAMU partitions.
arch/powerpc/boot/dts/fsl/qoriq-sec5.0-0.dtsi | 109 +
arch/powerpc/boot/dts/fsl/t4240si-post.dtsi |2 +
2 files changed, 111 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-sec5.0-0.dtsi
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sec5.0-0.dtsi
b/arch/powerpc/boot/dts/fsl/qoriq-sec5.0-0.dtsi
new file mode 100644
index 000..ffd458f
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-sec5.0-0.dtsi
@@ -0,0 +1,109 @@
+/*
+ * QorIQ Sec/Crypto 5.0 device tree stub [ controller @ offset 0x30 ]
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License (GPL) as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+crypto: crypto@30 {
+ compatible = fsl,sec-v5.0, fsl,sec-v4.0;
+ #address-cells = 1;
+ #size-cells = 1;
+ reg = 0x30 0x1;
+ ranges = 0 0x30 0x1;
+ interrupts = 92 2 0 0;
+
+ sec_jr0: jr@1000 {
+ compatible = fsl,sec-v5.0-job-ring,
+fsl,sec-v4.0-job-ring;
+ reg = 0x1000 0x1000;
+ interrupts = 88 2 0 0;
+ };
+
+ sec_jr1: jr@2000 {
+ compatible = fsl,sec-v5.0-job-ring,
+fsl,sec-v4.0-job-ring;
+ reg = 0x2000 0x1000;
+ interrupts = 89 2 0 0;
+ };
+
+ sec_jr2: jr@3000 {
+ compatible = fsl,sec-v5.0-job-ring,
+fsl,sec-v4.0-job-ring;
+ reg = 0x3000 0x1000;
+ interrupts = 90 2 0 0;
+ };
+
+ sec_jr3: jr@4000 {
+ compatible = fsl,sec-v5.0-job-ring,
+fsl,sec-v4.0-job-ring;
+ reg = 0x4000 0x1000;
+ interrupts = 91 2 0 0;
+ };
+
+ rtic@6000 {
+ compatible = fsl,sec-v5.0-rtic,
+fsl,sec-v4.0-rtic;
+ #address-cells = 1;
+ #size-cells = 1;
+ reg = 0x6000 0x100;
+ ranges = 0x0 0x6100 0xe00;
+
+ rtic_a: rtic-a@0 {
+ compatible = fsl,sec-v5.0-rtic-memory,
+fsl,sec-v4.0-rtic-memory;
+ reg = 0x00 0x20 0x100 0x80;
+ };
+
+ rtic_b: rtic-b@20 {
+ compatible = fsl,sec-v5.0-rtic-memory,
+fsl,sec-v4.0-rtic-memory;
+ reg = 0x20 0x20 0x200 0x80;
+ };
+
+ rtic_c: rtic-c@40 {
+ compatible = fsl,sec-v5.0-rtic-memory,
+fsl,sec-v4.0-rtic-memory;
+ reg = 0x40 0x20 0x300 0x80;
+ };
+
+ rtic_d: rtic-d@60 {
+ compatible = fsl,sec-v5.0-rtic-memory,
+fsl,sec-v4.0-rtic-memory;
+ reg = 0x60 0x20 0x500 0x80;
+ };
+ };
+};
+
+sec_mon: sec_mon@314000 {
+ compatible = fsl,sec-v5.0-mon,
Re: [PATCH] export of_reconfig_notifier_[register,unregister]
On Wed, 2012-11-28 at 13:42 -0600, Nathan Fontenot wrote:
The of reconfiguration notification chains should be exported for use
by modules.
Signed-off-by:Nathan Fontenot nf...@linux.vnet.ibm.com
Grant, I'm applying that into the powerpc tree (with a slightly modified
subject line). You don't need to add it to your tree at this stage I
suspect.
Cheers,
Ben.
---
Index: linux-next/drivers/of/base.c
===
--- linux-next.orig/drivers/of/base.c 2012-11-28 09:18:02.0 -0600
+++ linux-next/drivers/of/base.c 2012-11-28 11:05:00.0 -0600
@@ -1282,11 +1282,13 @@
{
return blocking_notifier_chain_register(of_reconfig_chain, nb);
}
+EXPORT_SYMBOL_GPL(of_reconfig_notifier_register);
int of_reconfig_notifier_unregister(struct notifier_block *nb)
{
return blocking_notifier_chain_unregister(of_reconfig_chain, nb);
}
+EXPORT_SYMBOL_GPL(of_reconfig_notifier_unregister);
int of_reconfig_notify(unsigned long action, void *p)
{
--
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