RE: [PATCH 2/6] powerpc/fsl-booke: Add initial B4860QDS board device tree
-Original Message-
From: Kumar Gala [mailto:ga...@kernel.crashing.org]
Sent: Saturday, March 16, 2013 1:57 AM
To: Leekha Shaveta-B20052
Cc: linuxppc-dev@lists.ozlabs.org; Lian Minghuan-B31939; Fleming Andy-AFLEMING;
Aggrwal Poonam-B10812; Mehresh Ramneek-B31383
Subject: Re: [PATCH 2/6] powerpc/fsl-booke: Add initial B4860QDS board device
tree
On Mar 15, 2013, at 2:55 AM, Shaveta Leekha wrote:
> Signed-off-by: Shaveta Leekha
> Signed-off-by: Minghuan Lian
> Signed-off-by: Andy Fleming
> Signed-off-by: Poonam Aggrwal
> Signed-off-by: Ramneek Mehresh
> Signed-off-by: Kumar Gala
> ---
> arch/powerpc/boot/dts/b4860qds.dts | 178
>
> 1 files changed, 178 insertions(+), 0 deletions(-) create mode 100644
> arch/powerpc/boot/dts/b4860qds.dts
>
> diff --git a/arch/powerpc/boot/dts/b4860qds.dts
> b/arch/powerpc/boot/dts/b4860qds.dts
> new file mode 100644
> index 000..ae6ac05
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/b4860qds.dts
> @@ -0,0 +1,178 @@
> +/*
> + * B4860DS Device Tree Source
> + *
> + * Copyright 2012 Freescale Semiconductor Inc.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are
> met:
> + * * Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * * Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + * * Neither the name of Freescale Semiconductor nor the
> + * names of its contributors may be used to endorse or promote products
> + * derived from this software without specific prior written
> permission.
> + *
> + *
> + * ALTERNATIVELY, this software may be distributed under the terms of
> +the
> + * GNU General Public License ("GPL") as published by the Free
> +Software
> + * Foundation, either version 2 of that License or (at your option)
> +any
> + * later version.
> + *
> + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND
> +ANY
> + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> +IMPLIED
> + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> +ARE
> + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE
> +FOR ANY
> + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
> +DAMAGES
> + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
> +SERVICES;
> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
> +CAUSED AND
> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
> +OR TORT
> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
> +USE OF THIS
> + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +/include/ "fsl/b4860si-pre.dtsi"
> +
> +/ {
> + model = "fsl,B4860QDS";
> + compatible = "fsl,B4860QDS";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + interrupt-parent = <&mpic>;
> +
> + ifc: localbus@ffe124000 {
> + reg = <0xf 0xfe124000 0 0x2000>;
> + ranges = <0 0 0xf 0xe800 0x0800
> + 2 0 0xf 0xff80 0x0001
> + 3 0 0xf 0xffdf 0x8000>;
> +
> + nor@0,0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "cfi-flash";
> + reg = <0x0 0x0 0x800>;
> + bank-width = <2>;
> + device-width = <1>;
> + };
> +
> + nand@2,0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "fsl,ifc-nand";
> + reg = <0x2 0x0 0x1>;
> +
> + partition@0 {
> + /* This location must not be altered */
> + /* 1MB for u-boot Bootloader Image */
> + reg = <0x0 0x0010>;
> + label = "NAND U-Boot Image";
> + read-only;
> + };
> +
> + partition@10 {
> + /* 1MB for DTB Image */
> + reg = <0x0010 0x0010>;
> + label = "NAND DTB Image";
> + };
> +
> + partition@20 {
> + /* 10MB for Linux Kernel Image */
> + reg = <0x0020 0x00A0>;
> + label = "NAND Linux Kernel Image";
> + };
> +
> + partition@c0 {
> +
RE: [PATCH 5/6] powerpc/fsl-booke: Add B4_QDS board support
-Original Message- From: Kumar Gala [mailto:ga...@kernel.crashing.org] Sent: Friday, March 15, 2013 9:28 PM To: Leekha Shaveta-B20052 Cc: linuxppc-dev@lists.ozlabs.org Subject: Re: [PATCH 5/6] powerpc/fsl-booke: Add B4_QDS board support On Mar 15, 2013, at 2:55 AM, Shaveta Leekha wrote: > - Add support for B4 board's personalities in board file b4_qds.c, It > is common for B4 personalities B4860 and B4420QDS > - Add B4QDS support in Kconfig and Makefile Code also references a B4220, what about it? [SL] I have added the basic support for it in board file as it's one of the personality of B4, missed it in description. But device trees for this has not been created and tested. So what do you suggest here: Should I add it here in B4 board support or should I remove its references altogether? > > B4860QDS is a high-performance computing evaluation, development and > test platform supporting the B4860 QorIQ Power Architecture processor, > with following major features: > >- Four dual-threaded e6500 Power Architecture processors > organized in one cluster-each core runs up to 1.8 GHz >- Two DDR3/3L controllers for high-speed memory interface each > runs at up to 1866.67 MHz >- CoreNet fabric that fully supports coherency using MESI protocol > between the e6500 cores, SC3900 FVP cores, memories and > external interfaces. >- Data Path Acceleration Architecture having FMAN, QMan, BMan, SEC 5.3 and > RMAN >- Large internal cache memory with snooping and stashing capabilities >- Sixteen 10-GHz SerDes lanes that serve: >- Two SRIO interfaces. Each supports up to 4 lanes and > a total of up to 8 lanes >- Up to 8-lanes Common Public Radio Interface (CPRI) controller > for glue-less antenna connection >- Two 10-Gbit Ethernet controllers (10GEC) >- Six 1G/2.5-Gbit Ethernet controllers for network communications >- PCI Express controller >- Debug (Aurora) >- Various system peripherals > > B4420 is a reduced personality of B4860 with fewer core/clusters(both > SC3900 and e6500), fewer DDR controllers, fewer serdes lanes, fewer SGMII > interfaces and reduced target frequencies. > > Key differences between B4860 and B4420: > B4420 has: >- Fewer e6500 cores: >1 cluster with 2 e6500 cores >- Fewer SC3900 cores/clusters: >1 cluster with 2 SC3900 cores per cluster >- Single DDRC >- 2X 4 lane serdes >- 3 SGMII interfaces >- no sRIO >- no 10G > > Signed-off-by: Shaveta Leekha > --- > arch/powerpc/platforms/85xx/Kconfig | 16 + > arch/powerpc/platforms/85xx/Makefile |1 + > arch/powerpc/platforms/85xx/b4_qds.c | 102 > ++ > 3 files changed, 119 insertions(+), 0 deletions(-) create mode 100644 > arch/powerpc/platforms/85xx/b4_qds.c > > diff --git a/arch/powerpc/platforms/85xx/Kconfig > b/arch/powerpc/platforms/85xx/Kconfig > index 31dc066..7bbd522 100644 > --- a/arch/powerpc/platforms/85xx/Kconfig > +++ b/arch/powerpc/platforms/85xx/Kconfig > @@ -262,6 +262,22 @@ config SGY_CTS1000 > > endif # PPC32 > > +config B4_QDS > + bool "Freescale B4 QDS" > + select DEFAULT_UIMAGE > + select E500 > + select PPC_E500MC > + select PHYS_64BIT > + select SWIOTLB > + select MPC8xxx_GPIO should be: select GENERIC_GPIO select ARCH_REQUIRE_GPIOLIB [SL] will change it. > + select HAS_RAPIDIO > + select PPC_EPAPR_HV_PIC > + help > + This option enables support for the B4 QDS board > + The B4 application development system B4 QDS is a complete > + debugging environment intended for engineers developing > + applications for the B4. > + Should be in the if PPC64 section with T4240 QDS support [SL] ok > config P5020_DS > bool "Freescale P5020 DS" > select DEFAULT_UIMAGE > diff --git a/arch/powerpc/platforms/85xx/Makefile > b/arch/powerpc/platforms/85xx/Makefile > index 712e233..a12ae2d 100644 > --- a/arch/powerpc/platforms/85xx/Makefile > +++ b/arch/powerpc/platforms/85xx/Makefile > @@ -6,6 +6,7 @@ obj-$(CONFIG_SMP) += smp.o obj-y += common.o > > obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o > +obj-$(CONFIG_B4_QDS) += b4_qds.o corenet_ds.o > obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o > obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o > obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o diff --git > a/arch/powerpc/platforms/85xx/b4_qds.c > b/arch/powerpc/platforms/85xx/b4_qds.c > new file mode 100644 > index 000..0c6702f > --- /dev/null > +++ b/arch/powerpc/platforms/85xx/b4_qds.c > @@ -0,0 +1,102 @@ > +/* > + * B4 QDS Setup > + * Should apply for QDS platform of B4860 and it's personalities. > + * viz B4860/B4420/B4220QDS > + * > + * Copyright 2012 Freescale Semiconductor Inc. > + * > + * This program is free software; you can redistribute it and/or > +modify it > + * under the terms of the GNU General Public License as published
[git pull] Please pull powerpc.git merge branch
Hi Linus ! Here's a few powerpc fixes for 3.9, mostly regressions (though not all from 3.9 merge window) that we've been hammering into shape over the last couple of weeks. They fix booting on Cell and G5 among other things (yes, we've been a bit sloppy with older machines this time around). Cheers, Ben. The following changes since commit 7c6baa304b841673d3a55ea4fcf9a5cbf7a1674b: Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip (2013-03-11 07:54:29 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git merge for you to fetch changes up to af81d7878c641629f2693ae3fdaf74b4af14dfca: powerpc: Rename USER_ESID_BITS* to ESID_BITS* (2013-03-17 12:45:44 +1100) Aneesh Kumar K.V (3): powerpc: Make VSID_BITS* dependency explicit powerpc: Update kernel VSID range powerpc: Rename USER_ESID_BITS* to ESID_BITS* Anton Blanchard (1): powerpc: Fix -mcmodel=medium breakage in prom_init.c Benjamin Herrenschmidt (2): powerpc: Fix STAB initialization powerpc: Fix cputable entry for 970MP rev 1.0 Michael Neuling (1): powerpc/ptrace: Fix brk.len used uninitialised Paul Bolle (1): powerpc: Remove last traces of POWER4_ONLY Stephen Rothwell (1): powerpc: Make sure that we alays include CONFIG_BINFMT_ELF arch/powerpc/Kconfig |1 + arch/powerpc/include/asm/mmu-hash64.h | 128 arch/powerpc/kernel/cputable.c |2 +- arch/powerpc/kernel/exceptions-64s.S | 34 ++--- arch/powerpc/kernel/prom_init.c| 14 ++-- arch/powerpc/kernel/ptrace.c |1 + arch/powerpc/kvm/book3s_64_mmu_host.c |4 +- arch/powerpc/mm/hash_utils_64.c| 22 -- arch/powerpc/mm/mmu_context_hash64.c | 11 +-- arch/powerpc/mm/pgtable_64.c |2 +- arch/powerpc/mm/slb_low.S | 50 ++--- arch/powerpc/mm/tlb_hash64.c |2 +- arch/powerpc/platforms/Kconfig.cputype |6 +- 13 files changed, 150 insertions(+), 127 deletions(-) ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 1/9] powerpc,kvm: fix imbalance srcu_read_[un]lock()
On Sat, Mar 16, 2013 at 12:50:49AM +0800, Lai Jiangshan wrote: > At the point of up_out label in kvmppc_hv_setup_htab_rma(), > srcu read lock is still held. > > We have to release it before return. > > Signed-off-by: Lai Jiangshan > Cc: Marcelo Tosatti > Cc: Gleb Natapov > Cc: Alexander Graf > Cc: Benjamin Herrenschmidt > Cc: Paul Mackerras > Cc: k...@vger.kernel.org > Cc: kvm-...@vger.kernel.org > --- > arch/powerpc/kvm/book3s_hv.c |2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) > > diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c > index 80dcc53..c26740e 100644 > --- a/arch/powerpc/kvm/book3s_hv.c > +++ b/arch/powerpc/kvm/book3s_hv.c > @@ -1799,7 +1799,7 @@ static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu > *vcpu) > > up_out: > up_read(¤t->mm->mmap_sem); > - goto out; > + goto out_srcu; Acked-by: Paul Mackerras ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH 5/5 v9] iommu/fsl: Freescale PAMU driver and iommu implementation.
> -Original Message- > From: Yoder Stuart-B08248 > Sent: Friday, March 15, 2013 2:45 AM > To: Kumar Gala; Sethi Varun-B16395 > Cc: j...@8bytes.org; io...@lists.linux-foundation.org; linuxppc- > d...@lists.ozlabs.org; linux-ker...@vger.kernel.org; > b...@kernel.crashing.org; Wood Scott-B07421 > Subject: RE: [PATCH 5/5 v9] iommu/fsl: Freescale PAMU driver and iommu > implementation. > > > > > -Original Message- > > From: Kumar Gala [mailto:ga...@kernel.crashing.org] > > Sent: Thursday, March 14, 2013 3:20 PM > > To: Sethi Varun-B16395 > > Cc: j...@8bytes.org; io...@lists.linux-foundation.org; > > linuxppc-dev@lists.ozlabs.org; linux- ker...@vger.kernel.org; > > b...@kernel.crashing.org; Wood Scott-B07421; Yoder Stuart-B08248 > > Subject: Re: [PATCH 5/5 v9] iommu/fsl: Freescale PAMU driver and iommu > implementation. > > > > > > On Mar 13, 2013, at 1:49 PM, Varun Sethi wrote: > > > > > +/* > > > + * Table of SVRs and the corresponding PORT_ID values. > > > + * > > > + * All future CoreNet-enabled SOCs will have this erratum fixed, so > > > +this table > > > + * should never need to be updated. SVRs are guaranteed to be > > > +unique, so > > > + * there is no worry that a future SOC will inadvertently have one > > > +of these > > > + * values. > > > + */ > > > > Maybe add to the comment about what port_id represents > > When you update the comment, I would also suggest identifying the > specific errata here (A-004510) so that it's easy to reference back to > the specific issue this code is fixing. [Sethi Varun-B16395] Ok -Varun ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH 5/5 v9] iommu/fsl: Freescale PAMU driver and iommu implementation.
> -Original Message- > From: Kumar Gala [mailto:ga...@kernel.crashing.org] > Sent: Friday, March 15, 2013 1:53 AM > To: Sethi Varun-B16395 > Cc: j...@8bytes.org; linux-ker...@vger.kernel.org; Yoder Stuart-B08248; > io...@lists.linux-foundation.org; Wood Scott-B07421; linuxppc- > d...@lists.ozlabs.org > Subject: Re: [PATCH 5/5 v9] iommu/fsl: Freescale PAMU driver and iommu > implementation. > > > On Mar 14, 2013, at 3:20 PM, Kumar Gala wrote: > > > > > On Mar 13, 2013, at 1:49 PM, Varun Sethi wrote: > > > >> +/* > >> + * Table of SVRs and the corresponding PORT_ID values. > >> + * > >> + * All future CoreNet-enabled SOCs will have this erratum fixed, so > >> +this table > >> + * should never need to be updated. SVRs are guaranteed to be > >> +unique, so > >> + * there is no worry that a future SOC will inadvertently have one > >> +of these > >> + * values. > >> + */ > > > > Maybe add to the comment about what port_id represents > > also, add reference to the erratum #/id/name > [Sethi Varun-B16395] Ok. -Varun ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH 5/5 v9] iommu/fsl: Freescale PAMU driver and iommu implementation.
> -Original Message-
> From: iommu-boun...@lists.linux-foundation.org [mailto:iommu-
> boun...@lists.linux-foundation.org] On Behalf Of Kumar Gala
> Sent: Friday, March 15, 2013 1:50 AM
> To: Sethi Varun-B16395
> Cc: b...@kernel.crashing.org; linux-ker...@vger.kernel.org; Yoder Stuart-
> B08248; io...@lists.linux-foundation.org; Wood Scott-B07421; linuxppc-
> d...@lists.ozlabs.org
> Subject: Re: [PATCH 5/5 v9] iommu/fsl: Freescale PAMU driver and iommu
> implementation.
>
>
> On Mar 13, 2013, at 1:49 PM, Varun Sethi wrote:
>
> > +/*
> > + * Table of SVRs and the corresponding PORT_ID values.
> > + *
> > + * All future CoreNet-enabled SOCs will have this erratum fixed, so
> > +this table
> > + * should never need to be updated. SVRs are guaranteed to be
> > +unique, so
> > + * there is no worry that a future SOC will inadvertently have one of
> > +these
> > + * values.
> > + */
>
> Maybe add to the comment about what port_id represents
>
[Sethi Varun-B16395] ok.
> > +static const struct {
> > + u32 svr;
> > + u32 port_id;
> > +} port_id_map[] = {
> > + {0x82100010, 0xFF00}, /* P2040 1.0 */
> > + {0x82100011, 0xFF00}, /* P2040 1.1 */
> > + {0x82100110, 0xFF00}, /* P2041 1.0 */
> > + {0x82100111, 0xFF00}, /* P2041 1.1 */
> > + {0x82110310, 0xFF00}, /* P3041 1.0 */
> > + {0x82110311, 0xFF00}, /* P3041 1.1 */
> > + {0x82010020, 0xFFF8}, /* P4040 2.0 */
> > + {0x8220, 0xFFF8}, /* P4080 2.0 */
> > + {0x82210010, 0xFC00}, /* P5010 1.0 */
> > + {0x82210020, 0xFC00}, /* P5010 2.0 */
> > + {0x82200010, 0xFC00}, /* P5020 1.0 */
> > + {0x82050010, 0xFF80}, /* P5021 1.0 */
> > + {0x82040010, 0xFF80}, /* P5040 1.0 */
> > +};
> > +
> > +#define SVR_SECURITY 0x8 /* The Security (E) bit */
> > +
> > +static int __init fsl_pamu_probe(struct platform_device *pdev) {
> > + void __iomem *pamu_regs = NULL;
> > + struct ccsr_guts __iomem *guts_regs = NULL;
> > + u32 pamubypenr, pamu_counter;
> > + unsigned long pamu_reg_off;
> > + unsigned long pamu_reg_base;
> > + struct pamu_isr_data *data;
> > + struct device_node *guts_node;
> > + u64 size;
> > + struct page *p;
> > + int ret = 0;
> > + int irq;
> > + phys_addr_t ppaact_phys;
> > + phys_addr_t spaact_phys;
> > + phys_addr_t omt_phys;
> > + size_t mem_size = 0;
> > + unsigned int order = 0;
> > + u32 csd_port_id = 0;
> > + unsigned i;
> > + /*
> > +* enumerate all PAMUs and allocate and setup PAMU tables
> > +* for each of them,
> > +* NOTE : All PAMUs share the same LIODN tables.
> > +*/
> > +
> > + pamu_regs = of_iomap(pdev->dev.of_node, 0);
> > + if (!pamu_regs) {
> > + dev_err(&pdev->dev, "ioremap of PAMU node failed\n");
> > + return -ENOMEM;
> > + }
> > + of_get_address(pdev->dev.of_node, 0, &size, NULL);
> > +
> > + irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
> > + if (irq == NO_IRQ) {
> > + dev_warn(&pdev->dev, "no interrupts listed in PAMU node\n");
> > + goto error;
> > + }
> > +
> > + data = kzalloc(sizeof(struct pamu_isr_data), GFP_KERNEL);
> > + if (!data) {
> > + iounmap(pamu_regs);
> > + return -ENOMEM;
> > + }
> > + data->pamu_reg_base = pamu_regs;
> > + data->count = size / PAMU_OFFSET;
> > +
> > + /* The ISR needs access to the regs, so we won't iounmap them */
> > + ret = request_irq(irq, pamu_av_isr, 0, "pamu", data);
> > + if (ret < 0) {
> > + dev_err(&pdev->dev, "error %i installing ISR for irq %i\n",
> > + ret, irq);
> > + goto error;
> > + }
> > +
> > + guts_node = of_find_compatible_node(NULL, NULL,
> > + "fsl,qoriq-device-config-1.0");
>
> This doesn't work for T4 or B4 device trees.
>
[Sethi Varun-B16395]hmm I need to use the dcfg space for this.
> > + if (!guts_node) {
> > + dev_err(&pdev->dev, "could not find GUTS node %s\n",
> > + pdev->dev.of_node->full_name);
> > + ret = -ENODEV;
> > + goto error;
> > + }
> > +
> > + guts_regs = of_iomap(guts_node, 0);
> > + of_node_put(guts_node);
> > + if (!guts_regs) {
> > + dev_err(&pdev->dev, "ioremap of GUTS node failed\n");
> > + ret = -ENODEV;
> > + goto error;
> > + }
> > +
> > + /* read in the PAMU capability registers */
> > + get_pamu_cap_values((unsigned long)pamu_regs);
> > + /*
> > +* To simplify the allocation of a coherency domain, we allocate
> the
> > +* PAACT and the OMT in the same memory buffer. Unfortunately,
> this
> > +* wastes more memory compared to allocating the buffers
> separately.
> > +*/
> > + /* Determine how much memory we need */
> > + mem_size = (PAGE_SIZE << get_order(PAACT_SIZE)) +
> > + (PAGE_SIZE << get_order(SPAACT_SIZE)) +
> > + (PAGE_S
Re: Kernel panic on PowerMac G5 while scanning for SMU sensors
On 03/17/2013 01:07 PM, Phileas Fogg wrote: I wanted to read the temperature sensors of my PowerMac G5 11,2. For that i installed the lm-sensors package, run 'sensors-detect' command and my Linux 3.8.2 kernel paniced in _smu_i2c_low_completion_ with this message 'Unable to handle kernel paging request for data at address 0x0008.' Regards ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev A further analysis showed that it crashes in _smu_i2c_complete_command_ which is called from _smu_i2c_low_completion_. This line caused the panic: list_del(&cmd->link); regards ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Kernel panic on PowerMac G5 while scanning for SMU sensors
I wanted to read the temperature sensors of my PowerMac G5 11,2. For that i installed the lm-sensors package, run 'sensors-detect' command and my Linux 3.8.2 kernel paniced in _smu_i2c_low_completion_ with this message 'Unable to handle kernel paging request for data at address 0x0008.' Regards ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
