[PATCH v2 0/8] powerpc/pseries: Nvram-to-pstore
Currently the kernel provides the contents of p-series NVRAM only as a simple stream of bytes via /dev/nvram, which must be interpreted in user space by the nvram command in the powerpc-utils package. This patch set exploits the pstore subsystem to expose each partition in NVRAM as a separate file in /dev/pstore. For instance Oops messages will stored in a file named [dmesg-nvram-2]. Changes from v1: - Reduce #ifdefs by and remove forward declarations of pstore callbacks - Handle return value of nvram_write_os_partition - Remove empty pstore callbacks and register pstore only when pstore is configured --- Aruna Balakrishnaiah (8): powerpc/pseries: Remove syslog prefix in uncompressed oops text powerpc/pseries: Add version and timestamp to oops header powerpc/pseries: Introduce generic read function to read nvram-partitions powerpc/pseries: Read/Write oops nvram partition via pstore powerpc/pseries: Read rtas partition via pstore powerpc/pseries: Distinguish between a os-partition and non-os partition powerpc/pseries: Read of-config partition via pstore powerpc/pseries: Read common partition via pstore arch/powerpc/platforms/pseries/nvram.c | 353 +++- fs/pstore/inode.c |9 + include/linux/pstore.h |4 3 files changed, 313 insertions(+), 53 deletions(-) -- ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2 1/8] powerpc/pseries: Remove syslog prefix in uncompressed oops text
Removal of syslog prefix in the uncompressed oops text will
help in capturing more oops data.
Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
Reviewed-by: Jim Keniston jkeni...@us.ibm.com
---
arch/powerpc/platforms/pseries/nvram.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/pseries/nvram.c
b/arch/powerpc/platforms/pseries/nvram.c
index 8733a86..e54a8b7 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -619,7 +619,7 @@ static void oops_to_nvram(struct kmsg_dumper *dumper,
}
if (rc != 0) {
kmsg_dump_rewind(dumper);
- kmsg_dump_get_buffer(dumper, true,
+ kmsg_dump_get_buffer(dumper, false,
oops_data, oops_data_sz, text_len);
err_type = ERR_TYPE_KERNEL_PANIC;
*oops_len = (u16) text_len;
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[PATCH v2 2/8] powerpc/pseries: Add version and timestamp to oops header
Introduce version and timestamp information in the oops header.
oops_log_info (oops header) holds version (to distinguish between old
and new format oops header), length of the oops text
(compressed or uncompressed) and timestamp.
The version field will sit in the same place as the length in old
headers. version is assigned 5000 (greater than oops partition size)
so that existing tools will refuse to dump new style partitions as
the length is too large. The updated tools will work with both
old and new format headers.
Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
Reviewed-by: Jim Keniston jkeni...@us.ibm.com
---
arch/powerpc/platforms/pseries/nvram.c | 57 +---
1 file changed, 38 insertions(+), 19 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/nvram.c
b/arch/powerpc/platforms/pseries/nvram.c
index e54a8b7..742735a 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -29,6 +29,13 @@
/* Max bytes to read/write in one go */
#define NVRW_CNT 0x20
+/*
+ * Set oops header version to distingush between old and new format header.
+ * lnx,oops-log partition max size is 4000, header version 4000 will
+ * help in identifying new header.
+ */
+#define OOPS_HDR_VERSION 5000
+
static unsigned int nvram_size;
static int nvram_fetch, nvram_store;
static char nvram_buf[NVRW_CNT]; /* assume this is in the first 4GB */
@@ -67,6 +74,12 @@ static const char *pseries_nvram_os_partitions[] = {
NULL
};
+struct oops_log_info {
+ u16 version;
+ u16 report_length;
+ u64 timestamp;
+} __attribute__((packed));
+
static void oops_to_nvram(struct kmsg_dumper *dumper,
enum kmsg_dump_reason reason);
@@ -83,28 +96,28 @@ static unsigned long last_unread_rtas_event;/*
timestamp */
* big_oops_buf[] holds the uncompressed text we're capturing.
*
- * oops_buf[] holds the compressed text, preceded by a prefix.
- * The prefix is just a u16 holding the length of the compressed* text.
- * (*Or uncompressed, if compression fails.) oops_buf[] gets written
- * to NVRAM.
+ * oops_buf[] holds the compressed text, preceded by a oops header.
+ * oops header has u16 holding the version of oops header (to differentiate
+ * between old and new format header) followed by u16 holding the length of
+ * the compressed* text (*Or uncompressed, if compression fails.) and u64
+ * holding the timestamp. oops_buf[] gets written to NVRAM.
*
- * oops_len points to the prefix. oops_data points to the compressed text.
+ * oops_log_info points to the header. oops_data points to the compressed text.
*
* +- oops_buf
- * | +- oops_data
- * v v
- * ++---+
- * | length| text |
- * | (2 bytes) | (oops_data_sz bytes) |
- * ++---+
+ * | +- oops_data
+ * v v
+ * +---+---+---++
+ * | version | length| timestamp | text |
+ * | (2 bytes) | (2 bytes) | (8 bytes) | (oops_data_sz bytes) |
+ * +---+---+---++
* ^
- * +- oops_len
+ * +- oops_log_info
*
* We preallocate these buffers during init to avoid kmalloc during oops/panic.
*/
static size_t big_oops_buf_sz;
static char *big_oops_buf, *oops_buf;
-static u16 *oops_len;
static char *oops_data;
static size_t oops_data_sz;
@@ -425,9 +438,8 @@ static void __init nvram_init_oops_partition(int
rtas_partition_exists)
oops_log_partition.name);
return;
}
- oops_len = (u16*) oops_buf;
- oops_data = oops_buf + sizeof(u16);
- oops_data_sz = oops_log_partition.size - sizeof(u16);
+ oops_data = oops_buf + sizeof(struct oops_log_info);
+ oops_data_sz = oops_log_partition.size - sizeof(struct oops_log_info);
/*
* Figure compression (preceded by elimination of each line's n
@@ -555,6 +567,7 @@ error:
/* Compress the text from big_oops_buf into oops_buf. */
static int zip_oops(size_t text_len)
{
+ struct oops_log_info *oops_hdr = (struct oops_log_info *)oops_buf;
int zipped_len = nvram_compress(big_oops_buf, oops_data, text_len,
oops_data_sz);
if (zipped_len 0) {
@@ -562,7 +575,9 @@ static int zip_oops(size_t text_len)
pr_err(nvram: logging uncompressed oops/panic report\n);
return -1;
}
- *oops_len = (u16) zipped_len;
+ oops_hdr-version = OOPS_HDR_VERSION;
+ oops_hdr-report_length = (u16) zipped_len;
+ oops_hdr-timestamp = get_seconds();
return 0;
}
@@ -576,6 +591,7 @@
[PATCH v2 3/8] powerpc/pseries: Introduce generic read function to read nvram-partitions
Introduce generic read function to read nvram partitions other than rtas.
nvram_read_error_log will be retained which is used to read rtas partition
from rtasd. nvram_read_partition is the generic read function to read from
any nvram partition.
Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
Reviewed-by: Jim Keniston jkeni...@us.ibm.com
---
arch/powerpc/platforms/pseries/nvram.c | 32 ++--
1 file changed, 22 insertions(+), 10 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/nvram.c
b/arch/powerpc/platforms/pseries/nvram.c
index 742735a..088f023 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -293,34 +293,35 @@ int nvram_write_error_log(char * buff, int length,
return rc;
}
-/* nvram_read_error_log
+/* nvram_read_partition
*
- * Reads nvram for error log for at most 'length'
+ * Reads nvram partition for at most 'length'
*/
-int nvram_read_error_log(char * buff, int length,
- unsigned int * err_type, unsigned int * error_log_cnt)
+int nvram_read_partition(struct nvram_os_partition *part, char *buff,
+ int length, unsigned int *err_type,
+ unsigned int *error_log_cnt)
{
int rc;
loff_t tmp_index;
struct err_log_info info;
- if (rtas_log_partition.index == -1)
+ if (part-index == -1)
return -1;
- if (length rtas_log_partition.size)
- length = rtas_log_partition.size;
+ if (length part-size)
+ length = part-size;
- tmp_index = rtas_log_partition.index;
+ tmp_index = part-index;
rc = ppc_md.nvram_read((char *)info, sizeof(struct err_log_info),
tmp_index);
if (rc = 0) {
- printk(KERN_ERR nvram_read_error_log: Failed nvram_read
(%d)\n, rc);
+ pr_err(%s: Failed nvram_read (%d)\n, __FUNCTION__, rc);
return rc;
}
rc = ppc_md.nvram_read(buff, length, tmp_index);
if (rc = 0) {
- printk(KERN_ERR nvram_read_error_log: Failed nvram_read
(%d)\n, rc);
+ pr_err(%s: Failed nvram_read (%d)\n, __FUNCTION__, rc);
return rc;
}
@@ -330,6 +331,17 @@ int nvram_read_error_log(char * buff, int length,
return 0;
}
+/* nvram_read_error_log
+ *
+ * Reads nvram for error log for at most 'length'
+ */
+int nvram_read_error_log(char *buff, int length,
+ unsigned int *err_type, unsigned int *error_log_cnt)
+{
+ return nvram_read_partition(rtas_log_partition, buff, length,
+ err_type, error_log_cnt);
+}
+
/* This doesn't actually zero anything, but it sets the event_logged
* word to tell that this event is safely in syslog.
*/
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[PATCH v2 4/8] powerpc/pseries: Read/Write oops nvram partition via pstore
IBM's p series machines provide persistent storage for LPARs through NVRAM.
NVRAM's lnx,oops-log partition is used to log oops messages.
Currently the kernel provides the contents of p-series NVRAM only as a
simple stream of bytes via /dev/nvram, which must be interpreted in user
space by the nvram command in the powerpc-utils package.
This patch set exploits the pstore subsystem to expose oops partition in
NVRAM as a separate file in /dev/pstore. For instance, Oops messages will be
stored in a file named [dmesg-nvram-2]. In case pstore registration fails it
will fall back to kmsg_dump mechanism.
This patch will read/write the oops messages from/to this partition via pstore.
Signed-off-by: Jim Keniston jkeni...@us.ibm.com
Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
---
arch/powerpc/platforms/pseries/nvram.c | 172 +---
1 file changed, 157 insertions(+), 15 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/nvram.c
b/arch/powerpc/platforms/pseries/nvram.c
index 088f023..9edec8e 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -18,6 +18,7 @@
#include linux/spinlock.h
#include linux/slab.h
#include linux/kmsg_dump.h
+#include linux/pstore.h
#include linux/ctype.h
#include linux/zlib.h
#include asm/uaccess.h
@@ -127,6 +128,14 @@ static size_t oops_data_sz;
#define MEM_LEVEL 4
static struct z_stream_s stream;
+#ifdef CONFIG_PSTORE
+static enum pstore_type_id nvram_type_ids[] = {
+ PSTORE_TYPE_DMESG,
+ -1
+};
+static int read_type;
+#endif
+
static ssize_t pSeries_nvram_read(char *buf, size_t count, loff_t *index)
{
unsigned int i;
@@ -430,6 +439,149 @@ static int __init pseries_nvram_init_os_partition(struct
nvram_os_partition
return 0;
}
+/*
+ * Are we using the ibm,rtas-log for oops/panic reports? And if so,
+ * would logging this oops/panic overwrite an RTAS event that rtas_errd
+ * hasn't had a chance to read and process? Return 1 if so, else 0.
+ *
+ * We assume that if rtas_errd hasn't read the RTAS event in
+ * NVRAM_RTAS_READ_TIMEOUT seconds, it's probably not going to.
+ */
+static int clobbering_unread_rtas_event(void)
+{
+ return (oops_log_partition.index == rtas_log_partition.index
+last_unread_rtas_event
+get_seconds() - last_unread_rtas_event =
+ NVRAM_RTAS_READ_TIMEOUT);
+}
+
+#ifdef CONFIG_PSTORE
+static int nvram_pstore_open(struct pstore_info *psi)
+{
+ /* Reset the iterator to start reading partitions again */
+ read_type = -1;
+ return 0;
+}
+
+/**
+ * nvram_pstore_write - pstore write callback for nvram
+ * @type: Type of message logged
+ * @reason: reason behind dump (oops/panic)
+ * @id: identifier to indicate the write performed
+ * @part: pstore writes data to registered buffer in parts,
+ * part number will indicate the same.
+ * @count: Indicates oops count
+ * @size: number of bytes written to the registered buffer
+ * @psi:registered pstore_info structure
+ *
+ * Called by pstore_dump() when an oops or panic report is logged in the
+ * printk buffer.
+ * Returns 0 on successful write.
+ */
+static int nvram_pstore_write(enum pstore_type_id type,
+ enum kmsg_dump_reason reason,
+ u64 *id, unsigned int part, int count,
+ size_t size, struct pstore_info *psi)
+{
+ int rc;
+ struct oops_log_info *oops_hdr = (struct oops_log_info *) oops_buf;
+
+ /* part 1 has the recent messages from printk buffer */
+ if (part 1 || type != PSTORE_TYPE_DMESG ||
+ clobbering_unread_rtas_event())
+ return -1;
+
+ oops_hdr-version = OOPS_HDR_VERSION;
+ oops_hdr-report_length = (u16) size;
+ oops_hdr-timestamp = get_seconds();
+ rc = nvram_write_os_partition(oops_log_partition, oops_buf,
+ (int) (sizeof(*oops_hdr) + size), ERR_TYPE_KERNEL_PANIC,
+ count);
+
+ if (rc != 0)
+ return rc;
+
+ *id = part;
+ return 0;
+}
+
+/*
+ * Reads the oops/panic report.
+ * Returns the length of the data we read from each partition.
+ * Returns 0 if we've been called before.
+ */
+static ssize_t nvram_pstore_read(u64 *id, enum pstore_type_id *type,
+ int *count, struct timespec *time, char **buf,
+ struct pstore_info *psi)
+{
+ struct oops_log_info *oops_hdr;
+ unsigned int err_type, id_no;
+ struct nvram_os_partition *part = NULL;
+ char *buff = NULL;
+
+ read_type++;
+
+ switch (nvram_type_ids[read_type]) {
+ case PSTORE_TYPE_DMESG:
+ part = oops_log_partition;
+ *type =
[PATCH v2 5/8] powerpc/pseries: Read rtas partition via pstore
This patch set exploits the pstore subsystem to read details of rtas partition
in NVRAM to a separate file in /dev/pstore. For instance, rtas details will be
stored in a file named [rtas-nvram-4].
Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
Reviewed-by: Jim Keniston jkeni...@us.ibm.com
---
arch/powerpc/platforms/pseries/nvram.c | 33 +---
fs/pstore/inode.c |3 +++
include/linux/pstore.h |2 ++
3 files changed, 31 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/nvram.c
b/arch/powerpc/platforms/pseries/nvram.c
index 9edec8e..8a7eefb 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -131,9 +131,11 @@ static struct z_stream_s stream;
#ifdef CONFIG_PSTORE
static enum pstore_type_id nvram_type_ids[] = {
PSTORE_TYPE_DMESG,
+ PSTORE_TYPE_RTAS,
-1
};
static int read_type;
+static unsigned long last_rtas_event;
#endif
static ssize_t pSeries_nvram_read(char *buf, size_t count, loff_t *index)
@@ -297,8 +299,13 @@ int nvram_write_error_log(char * buff, int length,
{
int rc = nvram_write_os_partition(rtas_log_partition, buff, length,
err_type, error_log_cnt);
- if (!rc)
+ if (!rc) {
last_unread_rtas_event = get_seconds();
+#ifdef CONFIG_PSTORE
+ last_rtas_event = get_seconds();
+#endif
+ }
+
return rc;
}
@@ -506,7 +513,7 @@ static int nvram_pstore_write(enum pstore_type_id type,
}
/*
- * Reads the oops/panic report.
+ * Reads the oops/panic report and ibm,rtas-log partition.
* Returns the length of the data we read from each partition.
* Returns 0 if we've been called before.
*/
@@ -526,6 +533,12 @@ static ssize_t nvram_pstore_read(u64 *id, enum
pstore_type_id *type,
part = oops_log_partition;
*type = PSTORE_TYPE_DMESG;
break;
+ case PSTORE_TYPE_RTAS:
+ part = rtas_log_partition;
+ *type = PSTORE_TYPE_RTAS;
+ time-tv_sec = last_rtas_event;
+ time-tv_nsec = 0;
+ break;
default:
return 0;
}
@@ -542,11 +555,17 @@ static ssize_t nvram_pstore_read(u64 *id, enum
pstore_type_id *type,
*count = 0;
*id = id_no;
- oops_hdr = (struct oops_log_info *)buff;
- *buf = buff + sizeof(*oops_hdr);
- time-tv_sec = oops_hdr-timestamp;
- time-tv_nsec = 0;
- return oops_hdr-report_length;
+
+ if (nvram_type_ids[read_type] == PSTORE_TYPE_DMESG) {
+ oops_hdr = (struct oops_log_info *)buff;
+ *buf = buff + sizeof(*oops_hdr);
+ time-tv_sec = oops_hdr-timestamp;
+ time-tv_nsec = 0;
+ return oops_hdr-report_length;
+ }
+
+ *buf = buff;
+ return part-size;
}
static struct pstore_info nvram_pstore_info = {
diff --git a/fs/pstore/inode.c b/fs/pstore/inode.c
index e4bcb2c..ec24f9c 100644
--- a/fs/pstore/inode.c
+++ b/fs/pstore/inode.c
@@ -324,6 +324,9 @@ int pstore_mkfile(enum pstore_type_id type, char *psname,
u64 id, int count,
case PSTORE_TYPE_MCE:
sprintf(name, mce-%s-%lld, psname, id);
break;
+ case PSTORE_TYPE_PPC_RTAS:
+ sprintf(name, rtas-%s-%lld, psname, id);
+ break;
case PSTORE_TYPE_UNKNOWN:
sprintf(name, unknown-%s-%lld, psname, id);
break;
diff --git a/include/linux/pstore.h b/include/linux/pstore.h
index 75d0176..d7a8fe9 100644
--- a/include/linux/pstore.h
+++ b/include/linux/pstore.h
@@ -35,6 +35,8 @@ enum pstore_type_id {
PSTORE_TYPE_MCE = 1,
PSTORE_TYPE_CONSOLE = 2,
PSTORE_TYPE_FTRACE = 3,
+ /* PPC64 partition types */
+ PSTORE_TYPE_PPC_RTAS= 4,
PSTORE_TYPE_UNKNOWN = 255
};
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[PATCH v2 6/8] powerpc/pseries: Distinguish between a os-partition and non-os partition
Introduce os_partition member in nvram_os_partition structure to identify
if the partition is an os partition or not. This will be useful to handle
non-os partitions of-config and common.
Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
Reviewed-by: Jim Keniston jkeni...@us.ibm.com
---
arch/powerpc/platforms/pseries/nvram.c |7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/nvram.c
b/arch/powerpc/platforms/pseries/nvram.c
index 8a7eefb..b118382 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -53,20 +53,23 @@ struct nvram_os_partition {
int min_size; /* minimum acceptable size (0 means req_size) */
long size; /* size of data portion (excluding err_log_info) */
long index; /* offset of data portion of partition */
+ bool os_partition; /* partition initialized by OS, not FW */
};
static struct nvram_os_partition rtas_log_partition = {
.name = ibm,rtas-log,
.req_size = 2079,
.min_size = 1055,
- .index = -1
+ .index = -1,
+ .os_partition = true
};
static struct nvram_os_partition oops_log_partition = {
.name = lnx,oops-log,
.req_size = 4000,
.min_size = 2000,
- .index = -1
+ .index = -1,
+ .os_partition = true
};
static const char *pseries_nvram_os_partitions[] = {
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[PATCH v2 7/8] powerpc/pseries: Read of-config partition via pstore
This patch set exploits the pstore subsystem to read details of
of-config partition in NVRAM to a separate file in /dev/pstore.
For instance, of-config partition details will be stored in a
file named [of-nvram-5].
Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
Reviewed-by: Jim Keniston jkeni...@us.ibm.com
---
arch/powerpc/platforms/pseries/nvram.c | 55 +++-
fs/pstore/inode.c |3 ++
include/linux/pstore.h |1 +
3 files changed, 50 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/nvram.c
b/arch/powerpc/platforms/pseries/nvram.c
index b118382..de448af 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -132,9 +132,16 @@ static size_t oops_data_sz;
static struct z_stream_s stream;
#ifdef CONFIG_PSTORE
+static struct nvram_os_partition of_config_partition = {
+ .name = of-config,
+ .index = -1,
+ .os_partition = false
+};
+
static enum pstore_type_id nvram_type_ids[] = {
PSTORE_TYPE_DMESG,
PSTORE_TYPE_RTAS,
+ PSTORE_TYPE_OF,
-1
};
static int read_type;
@@ -332,10 +339,15 @@ int nvram_read_partition(struct nvram_os_partition *part,
char *buff,
tmp_index = part-index;
- rc = ppc_md.nvram_read((char *)info, sizeof(struct err_log_info),
tmp_index);
- if (rc = 0) {
- pr_err(%s: Failed nvram_read (%d)\n, __FUNCTION__, rc);
- return rc;
+ if (part-os_partition) {
+ rc = ppc_md.nvram_read((char *)info,
+ sizeof(struct err_log_info),
+ tmp_index);
+ if (rc = 0) {
+ pr_err(%s: Failed nvram_read (%d)\n, __FUNCTION__,
+ rc);
+ return rc;
+ }
}
rc = ppc_md.nvram_read(buff, length, tmp_index);
@@ -344,8 +356,10 @@ int nvram_read_partition(struct nvram_os_partition *part,
char *buff,
return rc;
}
- *error_log_cnt = info.seq_num;
- *err_type = info.error_type;
+ if (part-os_partition) {
+ *error_log_cnt = info.seq_num;
+ *err_type = info.error_type;
+ }
return 0;
}
@@ -516,7 +530,7 @@ static int nvram_pstore_write(enum pstore_type_id type,
}
/*
- * Reads the oops/panic report and ibm,rtas-log partition.
+ * Reads the oops/panic report, rtas and of-config partition.
* Returns the length of the data we read from each partition.
* Returns 0 if we've been called before.
*/
@@ -525,9 +539,11 @@ static ssize_t nvram_pstore_read(u64 *id, enum
pstore_type_id *type,
struct pstore_info *psi)
{
struct oops_log_info *oops_hdr;
- unsigned int err_type, id_no;
+ unsigned int err_type, id_no, size = 0;
struct nvram_os_partition *part = NULL;
char *buff = NULL;
+ int sig = 0;
+ loff_t p;
read_type++;
@@ -542,10 +558,29 @@ static ssize_t nvram_pstore_read(u64 *id, enum
pstore_type_id *type,
time-tv_sec = last_rtas_event;
time-tv_nsec = 0;
break;
+ case PSTORE_TYPE_OF:
+ sig = NVRAM_SIG_OF;
+ part = of_config_partition;
+ *type = PSTORE_TYPE_OF;
+ *id = PSTORE_TYPE_OF;
+ time-tv_sec = 0;
+ time-tv_nsec = 0;
+ break;
default:
return 0;
}
+ if (!part-os_partition) {
+ p = nvram_find_partition(part-name, sig, size);
+ if (p = 0) {
+ pr_err(nvram: Failed to find partition %s,
+ err %d\n, part-name, (int)p);
+ return 0;
+ }
+ part-index = p;
+ part-size = size;
+ }
+
buff = kmalloc(part-size, GFP_KERNEL);
if (!buff)
@@ -557,7 +592,9 @@ static ssize_t nvram_pstore_read(u64 *id, enum
pstore_type_id *type,
}
*count = 0;
- *id = id_no;
+
+ if (part-os_partition)
+ *id = id_no;
if (nvram_type_ids[read_type] == PSTORE_TYPE_DMESG) {
oops_hdr = (struct oops_log_info *)buff;
diff --git a/fs/pstore/inode.c b/fs/pstore/inode.c
index ec24f9c..8d4fb65 100644
--- a/fs/pstore/inode.c
+++ b/fs/pstore/inode.c
@@ -327,6 +327,9 @@ int pstore_mkfile(enum pstore_type_id type, char *psname,
u64 id, int count,
case PSTORE_TYPE_PPC_RTAS:
sprintf(name, rtas-%s-%lld, psname, id);
break;
+ case PSTORE_TYPE_PPC_OF:
+ sprintf(name, of-%s-%lld, psname, id);
+ break;
case PSTORE_TYPE_UNKNOWN:
sprintf(name, unknown-%s-%lld, psname, id);
[PATCH v2 8/8] powerpc/pseries: Read common partition via pstore
This patch exploits pstore subsystem to read details of common partition
in NVRAM to a separate file in /dev/pstore. For instance, common partition
details will be stored in a file named [common-nvram-6].
Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
Reviewed-by: Jim Keniston jkeni...@us.ibm.com
---
arch/powerpc/platforms/pseries/nvram.c | 17 -
fs/pstore/inode.c |3 +++
include/linux/pstore.h |1 +
3 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/pseries/nvram.c
b/arch/powerpc/platforms/pseries/nvram.c
index de448af..8417816 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -138,10 +138,17 @@ static struct nvram_os_partition of_config_partition = {
.os_partition = false
};
+static struct nvram_os_partition common_partition = {
+ .name = common,
+ .index = -1,
+ .os_partition = false
+};
+
static enum pstore_type_id nvram_type_ids[] = {
PSTORE_TYPE_DMESG,
PSTORE_TYPE_RTAS,
PSTORE_TYPE_OF,
+ PSTORE_TYPE_COMMON,
-1
};
static int read_type;
@@ -530,7 +537,7 @@ static int nvram_pstore_write(enum pstore_type_id type,
}
/*
- * Reads the oops/panic report, rtas and of-config partition.
+ * Reads the oops/panic report, rtas, of-config and common partition.
* Returns the length of the data we read from each partition.
* Returns 0 if we've been called before.
*/
@@ -566,6 +573,14 @@ static ssize_t nvram_pstore_read(u64 *id, enum
pstore_type_id *type,
time-tv_sec = 0;
time-tv_nsec = 0;
break;
+ case PSTORE_TYPE_COMMON:
+ sig = NVRAM_SIG_SYS;
+ part = common_partition;
+ *type = PSTORE_TYPE_COMMON;
+ *id = PSTORE_TYPE_COMMON;
+ time-tv_sec = 0;
+ time-tv_nsec = 0;
+ break;
default:
return 0;
}
diff --git a/fs/pstore/inode.c b/fs/pstore/inode.c
index 8d4fb65..88cc050 100644
--- a/fs/pstore/inode.c
+++ b/fs/pstore/inode.c
@@ -330,6 +330,9 @@ int pstore_mkfile(enum pstore_type_id type, char *psname,
u64 id, int count,
case PSTORE_TYPE_PPC_OF:
sprintf(name, of-%s-%lld, psname, id);
break;
+ case PSTORE_TYPE_PPC_COMMON:
+ sprintf(name, common-%s-%lld, psname, id);
+ break;
case PSTORE_TYPE_UNKNOWN:
sprintf(name, unknown-%s-%lld, psname, id);
break;
diff --git a/include/linux/pstore.h b/include/linux/pstore.h
index 615dc18..656699f 100644
--- a/include/linux/pstore.h
+++ b/include/linux/pstore.h
@@ -38,6 +38,7 @@ enum pstore_type_id {
/* PPC64 partition types */
PSTORE_TYPE_PPC_RTAS= 4,
PSTORE_TYPE_PPC_OF = 5,
+ PSTORE_TYPE_PPC_COMMON = 6,
PSTORE_TYPE_UNKNOWN = 255
};
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[RFC, PATCH v3] powerpc/prom: Scan reserved-ranges node for memory reservations
Based on benh's proposal at
https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-September/101237.html,
this change provides support for reserving memory from the
reserved-ranges node at the root of the device tree.
We just call memblock_reserve on these ranges for now.
Signed-off-by: Jeremy Kerr j...@ozlabs.org
---
v3: Use of_get_flat_dt_root
---
arch/powerpc/kernel/prom.c | 35 +++
1 file changed, 35 insertions(+)
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 8b6f7a9..9c753bc 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -559,6 +559,33 @@ void __init early_init_dt_setup_initrd_arch(unsigned long
start,
}
#endif
+static bool __init early_reserve_mem_dt(void)
+{
+ unsigned long i, len, dt_root;
+ const __be32 *prop;
+
+ dt_root = of_get_flat_dt_root();
+
+ prop = of_get_flat_dt_prop(dt_root, reserved-ranges, len);
+
+ if (!prop)
+ return false;
+
+ /* Each reserved range is an (address,size) pair, 2 cells each,
+* totalling 4 cells per range. */
+ for (i = 0; i len / (sizeof(*prop) * 4); i++) {
+ u64 base, size;
+
+ base = of_read_number(prop + (i * 4) + 0, 2);
+ size = of_read_number(prop + (i * 4) + 2, 2);
+
+ if (size)
+ memblock_reserve(base, size);
+ }
+
+ return true;
+}
+
static void __init early_reserve_mem(void)
{
u64 base, size;
@@ -574,6 +601,14 @@ static void __init early_reserve_mem(void)
self_size = initial_boot_params-totalsize;
memblock_reserve(self_base, self_size);
+ /*
+* Try looking for reserved-regions property in the DT first; if
+* it's present, it'll contain all of the necessary reservation
+* info
+*/
+ if (early_reserve_mem_dt())
+ return;
+
#ifdef CONFIG_BLK_DEV_INITRD
/* then reserve the initrd, if any */
if (initrd_start (initrd_end initrd_start))
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Re: [PATCH -V6 05/27] powerpc: New hugepage directory format
On Mon, Apr 22, 2013 at 03:30:39PM +0530, Aneesh Kumar K.V wrote: From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com [snip] /* - * Use the top bit of the higher-level page table entries to indicate whether - * the entries we point to contain hugepages. This works because we know that - * the page tables live in kernel space. If we ever decide to support having - * page tables at arbitrary addresses, this breaks and will have to change. - */ -#ifdef CONFIG_PPC64 -#define PD_HUGE 0x8000 -#else -#define PD_HUGE 0x8000 -#endif I think this is a good thing to do ultimately, but if you do this you also need to fix arch/powerpc/kernel/head_fsl_booke.S: #ifdef CONFIG_PTE_64BIT #ifdef CONFIG_HUGETLB_PAGE #define FIND_PTE\ rlwinm r12, r10, 13, 19, 29; /* Compute pgdir/pmd offset */ \ lwzxr11, r12, r11; /* Get pgd/pmd entry */ \ rlwinm. r12, r11, 0, 0, 20; /* Extract pt base address */ \ blt 1000f; /* Normal non-huge page */ \ beq 2f; /* Bail if no table */ \ orisr11, r11, PD_HUGE@h;/* Put back address bit */ \ andi. r10, r11, HUGEPD_SHIFT_MASK@l; /* extract size field */ \ xor r12, r10, r11; /* drop size bits from pointer */ \ b 1001f; \ and this, from arch/powerpc/mm/tlb_low_64e.S: cmpdi cr0,r14,0 bge tlb_miss_fault_bolted /* Bad pgd entry or hugepage; bail */ (of which there are several similar instances in that file). If you want to avoid fixing these bits of assembly code (and any others I missed in my quick scan), you'll need to keep the definition of PD_HUGE, at least on anything not 64-bit Book3S. Paul. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] PowerPC: kernel: memory access violation when rtas_data_buf contents are more than 1026
On 04/23/2013 08:42 AM, Chen Gang wrote:
need set '\0' for 'local_buffer'.
SPLPAR_MAXLENGTH is 1026, RTAS_DATA_BUF_SIZE is 4096. so the contents of
rtas_data_buf may truncated in memcpy.
if contents are really truncated.
the splpar_strlen is more than 1026. the next while loop checking will
not find the end of buffer. that will cause memory access violation.
Per parameter length in ibm,get-system-parameter RTAS call is limited to 1026
bytes (1024 bytes of data + 2 bytes length). And 'rtas_data_buf' was set to 0
(first 1026 bytes) before call RTAS call. At the worst if we get junk in RTAS
output length field helps to exit from the while loop. So I don't think we need
this patch.
-Vasant
Signed-off-by: Chen Ganggang.c...@asianux.com
---
arch/powerpc/kernel/lparcfg.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c
index 801a757..d92f387 100644
--- a/arch/powerpc/kernel/lparcfg.c
+++ b/arch/powerpc/kernel/lparcfg.c
@@ -299,6 +299,7 @@ static void parse_system_parameter_string(struct seq_file
*m)
__pa(rtas_data_buf),
RTAS_DATA_BUF_SIZE);
memcpy(local_buffer, rtas_data_buf, SPLPAR_MAXLENGTH);
+ local_buffer[SPLPAR_MAXLENGTH - 1] = '\0';
spin_unlock(rtas_data_buf_lock);
if (call_status != 0) {
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Re: [PATCH 1/1] usb: ehci-fsl: set INCR8 mode only on MPC512x
On 04/24/2013 01:55 PM, Anatolij Gustschin wrote: On Wed, 24 Apr 2013 10:55:10 +0800 Tiejun Chen tiejun.c...@windriver.com wrote: commit 761bbcb7, usb: ehci-fsl: set INCR8 mode for system bus interface on MPC512x, introduced to fix one MPC5121e (M36P) Errata by setting INCR8 mode for system bus interface on MPC512x, but we should make sure this is only valid for MPC512x like other parts of this commit. Otherwise NAK. It is already only valid for MPC512x. this would issue other platforms as abnormal without this similar Errata. This setting is in the ehci_fsl_mpc512x_drv_resume() function which is not called on other platforms. Yes, I already notice this and also send a notification to ignore this improper patch immediately ;-) Thanks, Tiejun ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[RFC][PATCH 1/1] USB/EHCI: work for different PHY_CLK_VALID detecting order
Due to different controller issue of PHY_CLK_VALID in ULPI mode, in some cases, after set PHY_CLK_SEL, we should set USB_CTRL_USB_EN before checking PHY_CLK_VALID, otherwise PHY_CLK_VALID doesn't work. But in other cases USB_CTRL_USB_EN is already set previously and PHY_CLK_VALID is not valid once USB_CTRL_USB_EN is set. But since PHY_CLK_VALID is w1c, we can force clear USB_CTRL_USB_EN firstly after set PHY_CLK_SEL, then PHY_CLK_VALID status can be kept even we re-set USB_CTRL_USB_EN. Signed-off-by: Tiejun Chen tiejun.c...@windriver.com --- drivers/usb/host/ehci-fsl.c | 15 --- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index d81d2fc..57f2aa0 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -234,11 +234,20 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd, /* controller version 1.6 or above */ setbits32(non_ehci + FSL_SOC_USB_CTRL, ULPI_PHY_CLK_SEL); + /* -* Due to controller issue of PHY_CLK_VALID in ULPI -* mode, we set USB_CTRL_USB_EN before checking -* PHY_CLK_VALID, otherwise PHY_CLK_VALID doesn't work. +* Due to different controller issue of PHY_CLK_VALID +* in ULPI mode, in some cases we should set +* USB_CTRL_USB_EN before checking PHY_CLK_VALID, +* otherwise PHY_CLK_VALID doesn't work. +* +* But in other cases USB_CTRL_USB_EN is already set +* and PHY_CLK_VALID is not valid once USB_CTRL_USB_EN +* is set. But since PHY_CLK_VALID is w1c, we can force +* clear USB_CTRL_USB_EN firstly then PHY_CLK_VALID +* status can be kept even we re-set USB_CTRL_USB_EN. */ + clrbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN); clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN, USB_CTRL_USB_EN); } -- 1.7.9.5 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] PowerPC: kernel: memory access violation when rtas_data_buf contents are more than 1026
On 2013年04月24日 14:28, Vasant Hegde wrote:
On 04/23/2013 08:42 AM, Chen Gang wrote:
need set '\0' for 'local_buffer'.
SPLPAR_MAXLENGTH is 1026, RTAS_DATA_BUF_SIZE is 4096. so the contents of
rtas_data_buf may truncated in memcpy.
if contents are really truncated.
the splpar_strlen is more than 1026. the next while loop checking will
not find the end of buffer. that will cause memory access violation.
Per parameter length in ibm,get-system-parameter RTAS call is limited to
1026 bytes (1024 bytes of data + 2 bytes length). And 'rtas_data_buf'
was set to 0 (first 1026 bytes) before call RTAS call. At the worst if
we get junk in RTAS output length field helps to exit from the while
loop. So I don't think we need this patch.
Is get-system-parameter return the NUL terminated string ? if so, it
will no issue (just like your discription).
If it will not return NUL terminated string, please see line 326:
while ((*local_buffer) (idx splpar_strlen))
(when idx == 1024, *local_buffer is memory access violation).
Since we use the first 2 bytes as length, and also be sure of the real
length will never more than 1024, I suggest to:
---patch begin
diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c
index 801a757..f8bd7cf 100644
--- a/arch/powerpc/kernel/lparcfg.c
+++ b/arch/powerpc/kernel/lparcfg.c
@@ -323,7 +323,7 @@ static void parse_system_parameter_string(struct seq_file
*m)
w_idx = 0;
idx = 0;
- while ((*local_buffer) (idx splpar_strlen)) {
+ while (idx splpar_strlen) {
workbuffer[w_idx++] = local_buffer[idx++];
if ((local_buffer[idx] == ',')
|| (local_buffer[idx] == '\0')) {
---patch end--
Thanks.
--
Chen Gang
Asianux Corporation
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Re: [PATCH] PowerPC: kernel: memory access violation when rtas_data_buf contents are more than 1026
On 04/24/2013 12:33 PM, Chen Gang wrote:
On 2013年04月24日 14:28, Vasant Hegde wrote:
On 04/23/2013 08:42 AM, Chen Gang wrote:
need set '\0' for 'local_buffer'.
SPLPAR_MAXLENGTH is 1026, RTAS_DATA_BUF_SIZE is 4096. so the contents of
rtas_data_buf may truncated in memcpy.
if contents are really truncated.
the splpar_strlen is more than 1026. the next while loop checking will
not find the end of buffer. that will cause memory access violation.
Per parameter length in ibm,get-system-parameter RTAS call is limited to
1026 bytes (1024 bytes of data + 2 bytes length). And 'rtas_data_buf'
was set to 0 (first 1026 bytes) before call RTAS call. At the worst if
we get junk in RTAS output length field helps to exit from the while
loop. So I don't think we need this patch.
Is get-system-parameter return the NUL terminated string ? if so, it
will no issue (just like your discription).
Length includes the length of the NULL. So (idx splpar_strlen)
is safe. IMO existing code is proper.
-Vasant
If it will not return NUL terminated string, please see line 326:
while ((*local_buffer) (idx splpar_strlen))
(when idx == 1024, *local_buffer is memory access violation).
Since we use the first 2 bytes as length, and also be sure of the real
length will never more than 1024, I suggest to:
---patch begin
diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c
index 801a757..f8bd7cf 100644
--- a/arch/powerpc/kernel/lparcfg.c
+++ b/arch/powerpc/kernel/lparcfg.c
@@ -323,7 +323,7 @@ static void parse_system_parameter_string(struct seq_file
*m)
w_idx = 0;
idx = 0;
- while ((*local_buffer) (idx splpar_strlen)) {
+ while (idx splpar_strlen) {
workbuffer[w_idx++] = local_buffer[idx++];
if ((local_buffer[idx] == ',')
|| (local_buffer[idx] == '\0')) {
---patch end--
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Re: [PATCH] PowerPC: kernel: memory access violation when rtas_data_buf contents are more than 1026
On 2013年04月24日 15:23, Vasant Hegde wrote: On 04/24/2013 12:33 PM, Chen Gang wrote: On 2013年04月24日 14:28, Vasant Hegde wrote: On 04/23/2013 08:42 AM, Chen Gang wrote: need set '\0' for 'local_buffer'. SPLPAR_MAXLENGTH is 1026, RTAS_DATA_BUF_SIZE is 4096. so the contents of rtas_data_buf may truncated in memcpy. if contents are really truncated. the splpar_strlen is more than 1026. the next while loop checking will not find the end of buffer. that will cause memory access violation. Per parameter length in ibm,get-system-parameter RTAS call is limited to 1026 bytes (1024 bytes of data + 2 bytes length). And 'rtas_data_buf' was set to 0 (first 1026 bytes) before call RTAS call. At the worst if we get junk in RTAS output length field helps to exit from the while loop. So I don't think we need this patch. Is get-system-parameter return the NUL terminated string ? if so, it will no issue (just like your discription). Length includes the length of the NULL. So (idx splpar_strlen) is safe. IMO existing code is proper. OK, since it is not an issue, I will try another patches for powerpc POWER7. :-) -- Chen Gang Asianux Corporation ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] arch/powerpc/kernel: using %12.12s instead of %12s for avoiding memory overflow.
Hello Vasant Hegde:
How about this patch, is it OK ?
Thanks.
On 2013年03月25日 12:30, Chen Gang wrote:
Hello Maintainers:
could you help check this patch whether is ok ?
thanks.
On 2013年02月17日 12:00, Chen Gang wrote:
Hello relative members:
please give a glance to this patch, when you have time.
thanks.
:-)
gchen.
于 2013年01月24日 12:14, Chen Gang 写道:
for tmp_part-header.name:
it is Terminating null required only for names 12 chars.
so need to limit the %.12s for it in printk
additional info:
%12s limit the width, not for the original string output length
if name length is more than 12, it still can be fully displayed.
if name length is less than 12, the ' ' will be filled before
name.
%.12s truly limit the original string output length (precision)
Signed-off-by: Chen Gang gang.c...@asianux.com
---
arch/powerpc/kernel/nvram_64.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/nvram_64.c b/arch/powerpc/kernel/nvram_64.c
index bec1e93..57bf6d2 100644
--- a/arch/powerpc/kernel/nvram_64.c
+++ b/arch/powerpc/kernel/nvram_64.c
@@ -202,7 +202,7 @@ static void __init nvram_print_partitions(char * label)
printk(KERN_WARNING %s-\n, label);
printk(KERN_WARNING indx\t\tsig\tchks\tlen\tname\n);
list_for_each_entry(tmp_part, nvram_partitions, partition) {
- printk(KERN_WARNING %4d\t%02x\t%02x\t%d\t%12s\n,
+ printk(KERN_WARNING %4d\t%02x\t%02x\t%d\t%12.12s\n,
tmp_part-index, tmp_part-header.signature,
tmp_part-header.checksum, tmp_part-header.length,
tmp_part-header.name);
--
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Asianux Corporation
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Re: [PATCH] arch/powerpc/kernel: using %12.12s instead of %12s for avoiding memory overflow.
On 04/24/2013 01:15 PM, Chen Gang wrote:
Hello Vasant Hegde:
How about this patch, is it OK ?
Thanks.
On 2013年03月25日 12:30, Chen Gang wrote:
Hello Maintainers:
could you help check this patch whether is ok ?
thanks.
On 2013年02月17日 12:00, Chen Gang wrote:
Hello relative members:
please give a glance to this patch, when you have time.
thanks.
:-)
gchen.
于 2013年01月24日 12:14, Chen Gang 写道:
for tmp_part-header.name:
it is Terminating null required only for names 12 chars.
so need to limit the %.12s for it in printk
additional info:
%12s limit the width, not for the original string output length
if name length is more than 12, it still can be fully displayed.
if name length is less than 12, the ' ' will be filled before
name.
%.12s truly limit the original string output length (precision)
Signed-off-by: Chen Ganggang.c...@asianux.com
---
arch/powerpc/kernel/nvram_64.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/nvram_64.c
b/arch/powerpc/kernel/nvram_64.c
index bec1e93..57bf6d2 100644
--- a/arch/powerpc/kernel/nvram_64.c
+++ b/arch/powerpc/kernel/nvram_64.c
@@ -202,7 +202,7 @@ static void __init nvram_print_partitions(char * label)
printk(KERN_WARNING %s-\n, label);
printk(KERN_WARNING indx\t\tsig\tchks\tlen\tname\n);
list_for_each_entry(tmp_part,nvram_partitions, partition) {
- printk(KERN_WARNING %4d\t%02x\t%02x\t%d\t%12s\n,
+ printk(KERN_WARNING %4d\t%02x\t%02x\t%d\t%12.12s\n,
First, this code in inside NVRAM_DEBUG which is used only for debug purpose and
AFAIK, all partition names are less than 20 character. So I don't think we need
this patch.
-Vasant
tmp_part-index, tmp_part-header.signature,
tmp_part-header.checksum, tmp_part-header.length,
tmp_part-header.name);
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Re: [PATCH] arch/powerpc/kernel: using %12.12s instead of %12s for avoiding memory overflow.
On 04/24/2013 01:45 PM, Vasant Hegde wrote:
On 04/24/2013 01:15 PM, Chen Gang wrote:
Hello Vasant Hegde:
How about this patch, is it OK ?
Thanks.
On 2013年03月25日 12:30, Chen Gang wrote:
Hello Maintainers:
could you help check this patch whether is ok ?
thanks.
On 2013年02月17日 12:00, Chen Gang wrote:
Hello relative members:
please give a glance to this patch, when you have time.
thanks.
:-)
gchen.
于 2013年01月24日 12:14, Chen Gang 写道:
for tmp_part-header.name:
it is Terminating null required only for names 12 chars.
so need to limit the %.12s for it in printk
additional info:
%12s limit the width, not for the original string output length
if name length is more than 12, it still can be fully
displayed.
if name length is less than 12, the ' ' will be filled before
name.
%.12s truly limit the original string output length (precision)
Signed-off-by: Chen Ganggang.c...@asianux.com
---
arch/powerpc/kernel/nvram_64.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/nvram_64.c
b/arch/powerpc/kernel/nvram_64.c
index bec1e93..57bf6d2 100644
--- a/arch/powerpc/kernel/nvram_64.c
+++ b/arch/powerpc/kernel/nvram_64.c
@@ -202,7 +202,7 @@ static void __init nvram_print_partitions(char *
label)
printk(KERN_WARNING %s-\n, label);
printk(KERN_WARNING indx\t\tsig\tchks\tlen\tname\n);
list_for_each_entry(tmp_part,nvram_partitions, partition) {
- printk(KERN_WARNING %4d\t%02x\t%02x\t%d\t%12s\n,
+ printk(KERN_WARNING %4d\t%02x\t%02x\t%d\t%12.12s\n,
First, this code in inside NVRAM_DEBUG which is used only for debug purpose
and
AFAIK, all partition names are less than 20 character. So I don't think we
need
Sorry.. I meant 12 character.
-Vasant
this patch.
-Vasant
tmp_part-index, tmp_part-header.signature,
tmp_part-header.checksum,
tmp_part-header.length,
tmp_part-header.name);
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attempt to move .org backwards still show up
Hi all I get an error message when I compile the source code in Power7 platform use the newest upstream kernel. [root@feng linux]# make -j60 CHK include/generated/uapi/linux/version.h CHK include/generated/utsrelease.h CC scripts/mod/devicetable-offsets.s GEN scripts/mod/devicetable-offsets.h HOSTCC scripts/mod/file2alias.o CALL scripts/checksyscalls.sh HOSTLD scripts/mod/modpost CHK include/generated/compile.h CALL arch/powerpc/kernel/systbl_chk.sh CALL arch/powerpc/kernel/prom_init_check.sh AS arch/powerpc/kernel/head_64.o arch/powerpc/kernel/exceptions-64s.S: Assembler messages: arch/powerpc/kernel/exceptions-64s.S:258: Error: attempt to move .org backwards make[1]: *** [arch/powerpc/kernel/head_64.o] Error 1 make: *** [arch/powerpc/kernel] Error 2 make: *** Waiting for unfinished jobs and I see this should be fixed by the commit: 087aa036eb79f24b856893190359ba812b460f45 But it still failed in my P7 machine. the kernel source code info: git tree : git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git [root@feng linux]# git log commit 824282ca7d250bd7c301f221c3cd902ce906d731 Merge: f83b293 3b5e50e Author: Linus Torvalds torva...@linux-foundation.org Date: Mon Apr 22 15:00:59 2013 -0700 Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus Pull MIPS fix from Ralf Baechle: Revert the change of the definition of PAGE_MASK which was prettier but broke a few relativly rare platforms * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: Revert MIPS: page.h: Provide more readable definition for PAGE_MASK. commit 3b5e50edaf500f392f4a372296afc0b99ffa7e70 Author: Ralf Baechle r...@linux-mips.org Date: Mon Apr 22 17:57:54 2013 +0200 [root@feng linux]# git branch * master [root@feng linux]# git diff [root@feng linux]# Thant means I have done nothing with the kernel Thanks Mike ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: attempt to move .org backwards still show up
On Wed, Apr 24, 2013 at 04:22:53PM +0800, Mike Qiu wrote: Hi all I get an error message when I compile the source code in Power7 platform use the newest upstream kernel. Hi Mike, It depends on what your .config is. What defconfig are you building? cheers ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] arch/powerpc/kernel: using %12.12s instead of %12s for avoiding memory overflow.
On 2013年04月24日 16:19, Vasant Hegde wrote:
for tmp_part-header.name:
it is Terminating null required only for names 12 chars.
so need to limit the %.12s for it in printk
additional info:
%12s limit the width, not for the original string output
length
if name length is more than 12, it still can be fully
displayed.
if name length is less than 12, the ' ' will be filled
before name.
%.12s truly limit the original string output length
(precision)
Signed-off-by: Chen Ganggang.c...@asianux.com
---
arch/powerpc/kernel/nvram_64.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/nvram_64.c
b/arch/powerpc/kernel/nvram_64.c
index bec1e93..57bf6d2 100644
--- a/arch/powerpc/kernel/nvram_64.c
+++ b/arch/powerpc/kernel/nvram_64.c
@@ -202,7 +202,7 @@ static void __init nvram_print_partitions(char
* label)
printk(KERN_WARNING %s-\n, label);
printk(KERN_WARNING indx\t\tsig\tchks\tlen\tname\n);
list_for_each_entry(tmp_part,nvram_partitions,
partition) {
- printk(KERN_WARNING %4d\t%02x\t%02x\t%d\t%12s\n,
+ printk(KERN_WARNING %4d
\t%02x\t%02x\t%d\t%12.12s\n,
First, this code in inside NVRAM_DEBUG which is used only for debug
purpose and
AFAIK, all partition names are less than 20 character. So I don't think we
need
Sorry.. I meant 12 character.
Please see line 283:
strncpy(part-header.name, , 12);
(it is not a NUL terminated string, and the length is 12)
And also, can we be sure that all partition names should be less than 12
characters ?
All together, I think we still need %12.12s to protect the memory.
Thanks.
--
Chen Gang
Asianux Corporation
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Re: attempt to move .org backwards still show up
于 2013/4/24 16:31, Michael Ellerman 写道: On Wed, Apr 24, 2013 at 04:22:53PM +0800, Mike Qiu wrote: Hi all I get an error message when I compile the source code in Power7 platform use the newest upstream kernel. Hi Mike, It depends on what your .config is. What defconfig are you building? I just copy the config file from /boot/config.* to .config and use make menuconfig change nothing by manually, then save. cheers ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: attempt to move .org backwards still show up
于 2013/4/24 16:31, Michael Ellerman 写道: On Wed, Apr 24, 2013 at 04:22:53PM +0800, Mike Qiu wrote: Hi all I get an error message when I compile the source code in Power7 platform use the newest upstream kernel. Hi Mike, It depends on what your .config is. What defconfig are you building? cheers And I do know how to build the source code in this machine . . . Thanks ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH -V6 18/27] mm/THP: withdraw the pgtable after pmdp related operations
Andrea Arcangeli aarca...@redhat.com writes:
Hi,
On Mon, Apr 22, 2013 at 03:30:52PM +0530, Aneesh Kumar K.V wrote:
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
For architectures like ppc64 we look at deposited pgtable when
calling pmdp_get_and_clear. So do the pgtable_trans_huge_withdraw
after finishing pmdp related operations.
Cc: Andrea Arcangeli aarca...@redhat.com
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
mm/huge_memory.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/mm/huge_memory.c b/mm/huge_memory.c
index 84f3180..2a43782 100644
--- a/mm/huge_memory.c
+++ b/mm/huge_memory.c
@@ -1363,9 +1363,10 @@ int zap_huge_pmd(struct mmu_gather *tlb, struct
vm_area_struct *vma,
struct page *page;
pgtable_t pgtable;
pmd_t orig_pmd;
-pgtable = pgtable_trans_huge_withdraw(tlb-mm, pmd);
+
orig_pmd = pmdp_get_and_clear(tlb-mm, addr, pmd);
tlb_remove_pmd_tlb_entry(tlb, pmd, addr);
+pgtable = pgtable_trans_huge_withdraw(tlb-mm, pmd);
if (is_huge_zero_pmd(orig_pmd)) {
tlb-mm-nr_ptes--;
spin_unlock(tlb-mm-page_table_lock);
I think here a comment inline (not only in the commit msg) is in
order. Otherwise it's hard to imagine others to be aware of this arch
detail when they will read the code later. So it would be prone to
break later without a comment.
How about ?
From 7444a5eda33c00eea465b51c405cb830c57513b7 Mon Sep 17 00:00:00 2001
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Date: Wed, 6 Mar 2013 12:50:37 +0530
Subject: [PATCH] mm/THP: withdraw the pgtable after pmdp related operations
For architectures like ppc64 we look at deposited pgtable when
calling pmdp_get_and_clear. So do the pgtable_trans_huge_withdraw
after finishing pmdp related operations.
Cc: Andrea Arcangeli aarca...@redhat.com
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
mm/huge_memory.c |8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/mm/huge_memory.c b/mm/huge_memory.c
index 84f3180..21c5ebd 100644
--- a/mm/huge_memory.c
+++ b/mm/huge_memory.c
@@ -1363,9 +1363,15 @@ int zap_huge_pmd(struct mmu_gather *tlb, struct
vm_area_struct *vma,
struct page *page;
pgtable_t pgtable;
pmd_t orig_pmd;
- pgtable = pgtable_trans_huge_withdraw(tlb-mm, pmd);
+ /*
+* For architectures like ppc64 we look at deposited pgtable
+* when calling pmdp_get_and_clear. So do the
+* pgtable_trans_huge_withdraw after finishing pmdp related
+* operations.
+*/
orig_pmd = pmdp_get_and_clear(tlb-mm, addr, pmd);
tlb_remove_pmd_tlb_entry(tlb, pmd, addr);
+ pgtable = pgtable_trans_huge_withdraw(tlb-mm, pmd);
if (is_huge_zero_pmd(orig_pmd)) {
tlb-mm-nr_ptes--;
spin_unlock(tlb-mm-page_table_lock);
--
1.7.10
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[PATCH 3/7] powerpc/powernv: Add option CONFIG_POWERNV_MSI
As Michael Ellerman suggested, to add CONFIG_POWERNV_MSI for PowerNV platform. That's similar to CONFIG_PSERIES_MSI for pSeries platform. For now, we don't make it dependent on CONFIG_EEH since it's not ready to enable that yet. Apart from that, we also enable CONFIG_PPC_MSI_BITMAP on selecting CONFIG_POWERNV_MSI. Signed-off-by: Gavin Shan sha...@linux.vnet.ibm.com --- arch/powerpc/platforms/powernv/Kconfig |5 + arch/powerpc/sysdev/Kconfig|1 + 2 files changed, 6 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/platforms/powernv/Kconfig b/arch/powerpc/platforms/powernv/Kconfig index 74fea5c..d3e840d 100644 --- a/arch/powerpc/platforms/powernv/Kconfig +++ b/arch/powerpc/platforms/powernv/Kconfig @@ -8,6 +8,11 @@ config PPC_POWERNV select PPC_PCI_CHOICE if EMBEDDED default y +config POWERNV_MSI + bool Support PCI MSI on PowerNV platform + depends on PCI_MSI + default y + config PPC_POWERNV_RTAS depends on PPC_POWERNV bool Support for RTAS based PowerNV platforms such as BML diff --git a/arch/powerpc/sysdev/Kconfig b/arch/powerpc/sysdev/Kconfig index a84fecf..ab4cb54 100644 --- a/arch/powerpc/sysdev/Kconfig +++ b/arch/powerpc/sysdev/Kconfig @@ -19,6 +19,7 @@ config PPC_MSI_BITMAP default y if MPIC default y if FSL_PCI default y if PPC4xx_MSI + default y if POWERNV_MSI source arch/powerpc/sysdev/xics/Kconfig -- 1.7.5.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 1/7] powerpc/powernv: Supports PHB3
The patch intends to initialize PHB3 during system boot stage. The
flag PNV_PHB_MODEL_PHB3 is introduced to differentiate IODA2
compatible PHB3 from other types of PHBs.
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
arch/powerpc/platforms/powernv/pci-ioda.c | 62 +++--
arch/powerpc/platforms/powernv/pci.c |6 ++-
arch/powerpc/platforms/powernv/pci.h |8 ++-
3 files changed, 42 insertions(+), 34 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index a5c5f15..3d4e958 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -852,18 +852,19 @@ static u32 pnv_ioda_bdfn_to_pe(struct pnv_phb *phb,
struct pci_bus *bus,
return phb-ioda.pe_rmap[(bus-number 8) | devfn];
}
-void __init pnv_pci_init_ioda1_phb(struct device_node *np)
+void __init pnv_pci_init_ioda_phb(struct device_node *np, int ioda_type)
{
struct pci_controller *hose;
static int primary = 1;
struct pnv_phb *phb;
unsigned long size, m32map_off, iomap_off, pemap_off;
const u64 *prop64;
+ const u32 *prop32;
u64 phb_id;
void *aux;
long rc;
- pr_info( Initializing IODA OPAL PHB %s\n, np-full_name);
+ pr_info( Initializing IODA%d OPAL PHB %s\n, ioda_type, np-full_name);
prop64 = of_get_property(np, ibm,opal-phbid, NULL);
if (!prop64) {
@@ -890,37 +891,34 @@ void __init pnv_pci_init_ioda1_phb(struct device_node *np)
hose-last_busno = 0xff;
hose-private_data = phb;
phb-opal_id = phb_id;
- phb-type = PNV_PHB_IODA1;
+ phb-type = ioda_type;
/* Detect specific models for error handling */
if (of_device_is_compatible(np, ibm,p7ioc-pciex))
phb-model = PNV_PHB_MODEL_P7IOC;
+ else if (of_device_is_compatible(np, ibm,p8-pciex))
+ phb-model = PNV_PHB_MODEL_PHB3;
else
phb-model = PNV_PHB_MODEL_UNKNOWN;
- /* We parse ranges now since we need to deduce the register base
-* from the IO base
-*/
+ /* Parse 32-bit and IO ranges (if any) */
pci_process_bridge_OF_ranges(phb-hose, np, primary);
primary = 0;
- /* Magic formula from Milton */
+ /* Get registers */
phb-regs = of_iomap(np, 0);
if (phb-regs == NULL)
pr_err( Failed to map registers !\n);
-
- /* XXX This is hack-a-thon. This needs to be changed so that:
-* - we obtain stuff like PE# etc... from device-tree
-* - we properly re-allocate M32 ourselves
-*(the OFW one isn't very good)
-*/
-
/* Initialize more IODA stuff */
- phb-ioda.total_pe = 128;
+ prop32 = of_get_property(np, ibm,opal-num-pes, NULL);
+ if (!prop32)
+ phb-ioda.total_pe = 1;
+ else
+ phb-ioda.total_pe = *prop32;
phb-ioda.m32_size = resource_size(hose-mem_resources[0]);
- /* OFW Has already off top 64k of M32 space (MSI space) */
+ /* FW Has already off top 64k of M32 space (MSI space) */
phb-ioda.m32_size += 0x1;
phb-ioda.m32_segsize = phb-ioda.m32_size / phb-ioda.total_pe;
@@ -930,7 +928,10 @@ void __init pnv_pci_init_ioda1_phb(struct device_node *np)
phb-ioda.io_segsize = phb-ioda.io_size / phb-ioda.total_pe;
phb-ioda.io_pci_base = 0; /* XXX calculate this ? */
- /* Allocate aux data arrays */
+ /* Allocate aux data arrays
+*
+* XXX TODO: Don't allocate io segmap on PHB3
+*/
size = _ALIGN_UP(phb-ioda.total_pe / 8, sizeof(unsigned long));
m32map_off = size;
size += phb-ioda.total_pe * sizeof(phb-ioda.m32_segmap[0]);
@@ -960,7 +961,7 @@ void __init pnv_pci_init_ioda1_phb(struct device_node *np)
hose-mem_resources[2].start = 0;
hose-mem_resources[2].end = 0;
-#if 0
+#if 0 /* We should really do that ... */
rc = opal_pci_set_phb_mem_window(opal-phb_id,
window_type,
window_num,
@@ -974,16 +975,6 @@ void __init pnv_pci_init_ioda1_phb(struct device_node *np)
phb-ioda.m32_size, phb-ioda.m32_segsize,
phb-ioda.io_size, phb-ioda.io_segsize);
- if (phb-regs) {
- pr_devel( BUID = 0x%016llx\n, in_be64(phb-regs + 0x100));
- pr_devel( PHB2_CR = 0x%016llx\n, in_be64(phb-regs + 0x160));
- pr_devel( IO_BAR = 0x%016llx\n, in_be64(phb-regs + 0x170));
- pr_devel( IO_BAMR = 0x%016llx\n, in_be64(phb-regs + 0x178));
- pr_devel( IO_SAR = 0x%016llx\n, in_be64(phb-regs + 0x180));
- pr_devel( M32_BAR = 0x%016llx\n, in_be64(phb-regs + 0x190));
- pr_devel( M32_BAMR = 0x%016llx\n, in_be64(phb-regs + 0x198));
-
[PATCH 6/7] powerpc/powernv: Build DMA space for PE on PHB3
The patch intends to build 32-bits DMA space for individual PEs on
PHB3. The TVE# is recognized by the combo of PE# and fixed bits
from DMA address, which is zero for 32-bits DMA space.
Signed-off-by: Gavin Shan sha...@linux.vnet.ibm.com
---
arch/powerpc/platforms/powernv/pci-ioda.c | 102 +++--
1 files changed, 96 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index 9f4d323..6bc4648 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -589,9 +589,8 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
*/
tbl-it_busno = 0;
tbl-it_index = (unsigned long)ioremap(be64_to_cpup(swinvp), 8);
- tbl-it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE;
- if (phb-type == PNV_PHB_IODA1)
- tbl-it_type |= TCE_PCI_SWINV_PAIR;
+ tbl-it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE |
+ TCE_PCI_SWINV_PAIR;
}
iommu_init_table(tbl, phb-hose-node);
@@ -609,6 +608,84 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
__free_pages(tce_mem, get_order(TCE32_TABLE_SIZE * segs));
}
+static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
+ struct pnv_ioda_pe *pe)
+{
+ struct page *tce_mem = NULL;
+ void *addr;
+ const __be64 *swinvp;
+ struct iommu_table *tbl;
+ unsigned int tce_table_size, end;
+ int64_t rc;
+
+ /* We shouldn't already have a 32-bit DMA associated */
+ if (WARN_ON(pe-tce32_seg = 0))
+ return;
+
+ /* The PE will reserve all possible 32-bits space */
+ pe-tce32_seg = 0;
+ end = (1 ilog2(phb-ioda.m32_pci_base));
+ tce_table_size = (end / 0x1000) * 8;
+ pe_info(pe, Setting up 32-bit TCE table at 0..%08x\n,
+ end);
+
+ /* Allocate TCE table */
+ tce_mem = alloc_pages_node(phb-hose-node, GFP_KERNEL,
+ get_order(tce_table_size));
+ if (!tce_mem) {
+ pe_err(pe, Failed to allocate a 32-bit TCE memory\n);
+ goto fail;
+ }
+ addr = page_address(tce_mem);
+ memset(addr, 0, tce_table_size);
+
+ /*
+* Map TCE table through TVT. The TVE index is the PE number
+* shifted by 1 bit for 32-bits DMA space.
+*/
+ rc = opal_pci_map_pe_dma_window(phb-opal_id, pe-pe_number,
+ pe-pe_number 1, 1, __pa(addr),
+ tce_table_size, 0x1000);
+ if (rc) {
+ pe_err(pe, Failed to configure 32-bit TCE table,
+ err %ld\n, rc);
+ goto fail;
+ }
+
+ /* Setup linux iommu table */
+ tbl = pe-tce32_table;
+ pnv_pci_setup_iommu_table(tbl, addr, tce_table_size, 0);
+
+ /* Hook the IOMMU table to PHB */
+ tbl-sysdata = phb;
+
+ /* OPAL variant of PHB3 invalidated TCEs */
+ swinvp = of_get_property(phb-hose-dn, ibm,opal-tce-kill, NULL);
+ if (swinvp) {
+ /* We need a couple more fields -- an address and a data
+* to or. Since the bus is only printed out on table free
+* errors, and on the first pass the data will be a relative
+* bus number, print that out instead.
+*/
+ tbl-it_busno = 0;
+ tbl-it_index = (unsigned long)ioremap(be64_to_cpup(swinvp), 8);
+ tbl-it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE;
+ }
+ iommu_init_table(tbl, phb-hose-node);
+
+ if (pe-pdev)
+ set_iommu_table_base(pe-pdev-dev, tbl);
+ else
+ pnv_ioda_setup_bus_dma(pe, pe-pbus);
+
+ return;
+fail:
+ if (pe-tce32_seg = 0)
+ pe-tce32_seg = -1;
+ if (tce_mem)
+ __free_pages(tce_mem, get_order(tce_table_size));
+}
+
static void pnv_ioda_setup_dma(struct pnv_phb *phb)
{
struct pci_controller *hose = phb-hose;
@@ -651,9 +728,22 @@ static void pnv_ioda_setup_dma(struct pnv_phb *phb)
if (segs remaining)
segs = remaining;
}
- pe_info(pe, DMA weight %d, assigned %d DMA32 segments\n,
- pe-dma_weight, segs);
- pnv_pci_ioda_setup_dma_pe(phb, pe, base, segs);
+
+ /*
+* For IODA2 compliant PHB3, we needn't care about the weight.
+* The all available 32-bits DMA space will be assigned to
+* the specific PE.
+*/
+ if (phb-type == PNV_PHB_IODA1) {
+ pe_info(pe, DMA weight %d, assigned %d DMA32
segments\n,
+
[PATCH 2/7] powerpc/powernv: Retrieve IODA2 tables explicitly
The PHB3, which is compatible with IODA2, have lots of tables (RTT/
PETLV/PEST/IVT/RBA) in system memory and have corresponding BARs to
trace the system memory address. The tables have been allocated in
firmware and exported through device-tree. The patch retrieves the
tables explicitly.
Signed-off-by: Gavin Shan sha...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/opal.h |5 +--
arch/powerpc/platforms/powernv/pci-ioda.c | 35 +
arch/powerpc/platforms/powernv/pci.h | 13 ++
3 files changed, 50 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index a4b28f1..0af7ba0 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -491,9 +491,8 @@ int64_t opal_pci_map_pe_mmio_window(uint64_t phb_id,
uint16_t pe_number,
uint16_t window_type, uint16_t window_num,
uint16_t segment_num);
int64_t opal_pci_set_phb_table_memory(uint64_t phb_id, uint64_t rtt_addr,
- uint64_t ivt_addr, uint64_t ivt_len,
- uint64_t reject_array_addr,
- uint64_t peltv_addr);
+ uint64_t peltv_addr, uint64_t pest_addr,
+ uint64_t ivt_addr, uint64_t rba_addr);
int64_t opal_pci_set_pe(uint64_t phb_id, uint64_t pe_number, uint64_t
bus_dev_func,
uint8_t bus_compare, uint8_t dev_compare, uint8_t
func_compare,
uint8_t pe_action);
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index 3d4e958..0c15870 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -852,6 +852,23 @@ static u32 pnv_ioda_bdfn_to_pe(struct pnv_phb *phb, struct
pci_bus *bus,
return phb-ioda.pe_rmap[(bus-number 8) | devfn];
}
+static void __init pnv_pci_get_ioda2_table(struct device_node *np,
+ const char *name,
+ void **table,
+ unsigned int *len)
+{
+ const u32 *prop32;
+ u64 base;
+
+ prop32 = of_get_property(np, name, NULL);
+ if (prop32) {
+ base = be32_to_cpup(prop32);
+ base = base 32 | be32_to_cpup(prop32 + 1);
+ *table = __va(base);
+ *len = be32_to_cpup(prop32 + 2);
+ }
+}
+
void __init pnv_pci_init_ioda_phb(struct device_node *np, int ioda_type)
{
struct pci_controller *hose;
@@ -998,6 +1015,24 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
int ioda_type)
ppc_md.pcibios_window_alignment = pnv_pci_window_alignment;
pci_add_flags(PCI_REASSIGN_ALL_RSRC);
+ /* Retrieve variable IODA2 tables */
+ if (ioda_type == PNV_PHB_IODA2) {
+ pnv_pci_get_ioda2_table(np, ibm,opal-rtt-table,
+ phb-ioda.tbl_rtt, phb-ioda.rtt_len);
+ pnv_pci_get_ioda2_table(np, ibm,opal-peltv-table,
+ phb-ioda.tbl_peltv, phb-ioda.peltv_len);
+ pnv_pci_get_ioda2_table(np, ibm,opal-pest-table,
+ phb-ioda.tbl_pest, phb-ioda.pest_len);
+ pnv_pci_get_ioda2_table(np, ibm,opal-ivt-table,
+ phb-ioda.tbl_ivt, phb-ioda.ivt_len);
+ pnv_pci_get_ioda2_table(np, ibm,opal-rba-table,
+ phb-ioda.tbl_rba, phb-ioda.rba_len);
+ /* Get IVE stride */
+ prop32 = of_get_property(np, ibm,opal-ive-stride, NULL);
+ if (prop32)
+ phb-ioda.ive_stride = be32_to_cpup(prop32);
+ }
+
/* Reset IODA tables to a clean state */
rc = opal_pci_reset(phb_id, OPAL_PCI_IODA_TABLE_RESET,
OPAL_ASSERT_RESET);
if (rc)
diff --git a/arch/powerpc/platforms/powernv/pci.h
b/arch/powerpc/platforms/powernv/pci.h
index f6314d6..c048c29 100644
--- a/arch/powerpc/platforms/powernv/pci.h
+++ b/arch/powerpc/platforms/powernv/pci.h
@@ -100,6 +100,19 @@ struct pnv_phb {
unsigned intio_segsize;
unsigned intio_pci_base;
+ /* Variable tables for IODA2 */
+ void*tbl_rtt;
+ void*tbl_peltv;
+ void*tbl_pest;
+ void*tbl_ivt;
+ void*tbl_rba;
+ unsigned intive_stride;
+ unsigned intrtt_len;
+ unsigned intpeltv_len;
+
[PATCH 7/7] powerpc/powernv: Fix invalid IOMMU table
Ben found the root cause. Commit 37f02195bee9c25ce44e25204f40b7961a6d7c9d
(powerpc/pci: fix PCI-e devices rescan issue on powerpc platform)
overwrites the IOMMU table of PCI device while enabling PCI device.
The patch intends to fix the IOMMU table after that point.
Signed-off-by: Gavin Shan sha...@linux.vnet.ibm.com
---
arch/powerpc/platforms/powernv/pci-ioda.c | 33 ++--
1 files changed, 12 insertions(+), 21 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index 6bc4648..c41696f 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -432,20 +432,21 @@ static void pnv_pci_ioda_setup_PEs(void)
}
}
-static void pnv_pci_ioda_dma_dev_setup(struct pnv_phb *phb, struct pci_dev
*dev)
+static void pnv_pci_ioda_dma_dev_setup(struct pnv_phb *phb, struct pci_dev
*pdev)
{
- /* We delay DMA setup after we have assigned all PE# */
-}
+ struct pci_dn *pdn = pnv_ioda_get_pdn(pdev);
+ struct pnv_ioda_pe *pe;
-static void pnv_ioda_setup_bus_dma(struct pnv_ioda_pe *pe, struct pci_bus *bus)
-{
- struct pci_dev *dev;
+ /*
+* The function can be called while the PE#
+* hasn't been assigned. Do nothing for the
+* case.
+*/
+ if (!pdn || pdn-pe_number == IODA_INVALID_PE)
+ return;
- list_for_each_entry(dev, bus-devices, bus_list) {
- set_iommu_table_base(dev-dev, pe-tce32_table);
- if (dev-subordinate)
- pnv_ioda_setup_bus_dma(pe, dev-subordinate);
- }
+ pe = phb-ioda.pe_array[pdn-pe_number];
+ set_iommu_table_base(pdev-dev, pe-tce32_table);
}
void pnv_pci_ioda1_tce_invalidate(struct iommu_table *tbl,
@@ -594,11 +595,6 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
}
iommu_init_table(tbl, phb-hose-node);
- if (pe-pdev)
- set_iommu_table_base(pe-pdev-dev, tbl);
- else
- pnv_ioda_setup_bus_dma(pe, pe-pbus);
-
return;
fail:
/* XXX Failure: Try to fallback to 64-bit only ? */
@@ -673,11 +669,6 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
}
iommu_init_table(tbl, phb-hose-node);
- if (pe-pdev)
- set_iommu_table_base(pe-pdev-dev, tbl);
- else
- pnv_ioda_setup_bus_dma(pe, pe-pbus);
-
return;
fail:
if (pe-tce32_seg = 0)
--
1.7.5.4
___
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[PATCH 5/7] powerpc/powernv: TCE invalidation for PHB3
The TCE should be invalidated while it's created or free'd. The
approach to do that for IODA1 and IODA2 compliant PHBs are different.
So the patch differentiate them with different functions called to
do that for IODA1 and IODA2 compliant PHBs. It's notable that the
PCI address is used to invalidate the corresponding TCE on IODA2
compliant PHB3.
Signed-off-by: Gavin Shan sha...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/iommu.h|1 +
arch/powerpc/platforms/powernv/pci-ioda.c | 75 ++-
arch/powerpc/platforms/powernv/pci-p5ioc2.c |1 +
arch/powerpc/platforms/powernv/pci.c| 60 +
arch/powerpc/platforms/powernv/pci.h|6 ++-
5 files changed, 93 insertions(+), 50 deletions(-)
diff --git a/arch/powerpc/include/asm/iommu.h b/arch/powerpc/include/asm/iommu.h
index cbfe678..0db308e 100644
--- a/arch/powerpc/include/asm/iommu.h
+++ b/arch/powerpc/include/asm/iommu.h
@@ -76,6 +76,7 @@ struct iommu_table {
struct iommu_pool large_pool;
struct iommu_pool pools[IOMMU_NR_POOLS];
unsigned long *it_map; /* A simple allocation bitmap for now */
+ void *sysdata;
};
struct scatterlist;
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index 32197af..9f4d323 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -448,6 +448,73 @@ static void pnv_ioda_setup_bus_dma(struct pnv_ioda_pe *pe,
struct pci_bus *bus)
}
}
+void pnv_pci_ioda1_tce_invalidate(struct iommu_table *tbl,
+ u64 *startp, u64 *endp)
+{
+ u64 __iomem *invalidate = (u64 __iomem *)tbl-it_index;
+ unsigned long start, end, inc;
+
+ start = __pa(startp);
+ end = __pa(endp);
+
+ /* BML uses this case for p6/p7/galaxy2: Shift addr and put in node */
+ if (tbl-it_busno) {
+ start = 12;
+ end = 12;
+ inc = 128 12;
+ start |= tbl-it_busno;
+ end |= tbl-it_busno;
+ } else if (tbl-it_type TCE_PCI_SWINV_PAIR) {
+ /* p7ioc-style invalidation, 2 TCEs per write */
+ start |= (1ull 63);
+ end |= (1ull 63);
+ inc = 16;
+} else {
+ /* Default (older HW) */
+inc = 128;
+ }
+
+end |= inc - 1;/* round up end to be different than start */
+
+mb(); /* Ensure above stores are visible */
+while (start = end) {
+__raw_writeq(start, invalidate);
+start += inc;
+}
+
+ /*
+* The iommu layer will do another mb() for us on build()
+* and we don't care on free()
+*/
+}
+
+void pnv_pci_ioda2_tce_invalidate(struct iommu_table *tbl,
+ u64 *startp, u64 *endp)
+{
+ unsigned long start, end, inc;
+ u64 __iomem *invalidate = (u64 __iomem *)tbl-it_index;
+ struct pnv_ioda_pe *pe = container_of(tbl, struct pnv_ioda_pe,
+ tce32_table);
+
+ /* We'll invalidate DMA address in PE scope */
+ start = 0x2ul 60;
+ start |= (pe-pe_number 0xFF);
+ end = start;
+
+ /* Figure out the start, end and step */
+ inc = tbl-it_offset + (((u64)startp - tbl-it_base) / sizeof(u64));
+ start |= (inc 12);
+ inc = tbl-it_offset + (((u64)endp - tbl-it_base) / sizeof(u64));
+ end |= (inc 12);
+ inc = (0x1ul 12);
+ mb();
+
+ while (start = end) {
+ __raw_writeq(start, invalidate);
+ start += inc;
+ }
+}
+
static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
struct pnv_ioda_pe *pe, unsigned int base,
unsigned int segs)
@@ -509,6 +576,9 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
pnv_pci_setup_iommu_table(tbl, addr, TCE32_TABLE_SIZE * segs,
base 28);
+ /* Hook the IOMMU table to PHB */
+ tbl-sysdata = phb;
+
/* OPAL variant of P7IOC SW invalidated TCEs */
swinvp = of_get_property(phb-hose-dn, ibm,opal-tce-kill, NULL);
if (swinvp) {
@@ -519,8 +589,9 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
*/
tbl-it_busno = 0;
tbl-it_index = (unsigned long)ioremap(be64_to_cpup(swinvp), 8);
- tbl-it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE
- | TCE_PCI_SWINV_PAIR;
+ tbl-it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE;
+ if (phb-type == PNV_PHB_IODA1)
+ tbl-it_type |= TCE_PCI_SWINV_PAIR;
}
iommu_init_table(tbl, phb-hose-node);
diff --git a/arch/powerpc/platforms/powernv/pci-p5ioc2.c
[PATCH v3 0/7] powerpc/powernv: PHB3 Support
The patchset includes minimal support for PHB3. Initially, flag PNV_PHB_IODA2 is introduced to differentiate IODA2 compliant PHB3 from other types of PHBs and do initialization accordingly for PHB3. Besides, variable IODA2 tables reside in system memory and we allocate them in kernel, then pass them to f/w and enable the corresponding BARs through OPAL API. The P/Q bits of IVE should be handled on PHB3 by software and the patchset intends to cover that as well. NOTE: The first patch comes from Ben. v2 - v3 * Remove the unnecessary quirk. That's only useful with simics * Do MSI EOI in single OPAL API opal_pci_msi_eoi() * Use explicit branch to fully utilize CPU's prefetching engine while doing TCE invalidation * Add one patch to fix invalid IOMMU table for PCI devices v1 - v2 * Introduce CONFIG_POWERNV_MSI, which is similiar to CONFIG_PSERIES_MSI * Enable CONFIG_PPC_MSI_BITMAP while selecting CONFIG_POWERNV_MSI * Eleminate (struct pnv_phb::msi_count) since it has been removed in linux-next * Replace (CONFIG_PPC_POWERNV CONFIG_PCI_MSI) with CONFIG_POWERNV_MSI * Move declaration of pnv_pci_msi_eoi() to asm/xics.h * Remove unnecessary #ifdef ... #endif in icp-native.c * Add support to invalidate TCE * Let the IODA2 table allocated by firmware and kernel to retrieve them through device-tree --- arch/powerpc/include/asm/iommu.h |1 + arch/powerpc/include/asm/opal.h|7 +- arch/powerpc/include/asm/xics.h|3 + arch/powerpc/platforms/powernv/Kconfig |5 + arch/powerpc/platforms/powernv/opal-wrappers.S |1 + arch/powerpc/platforms/powernv/pci-ioda.c | 301 arch/powerpc/platforms/powernv/pci-p5ioc2.c|1 + arch/powerpc/platforms/powernv/pci.c | 85 +++ arch/powerpc/platforms/powernv/pci.h | 28 ++- arch/powerpc/sysdev/Kconfig|1 + arch/powerpc/sysdev/xics/icp-native.c | 27 ++- 11 files changed, 356 insertions(+), 104 deletions(-) Thanks, Gavin ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 4/7] powerpc/powernv: Patch MSI EOI handler on P8
The EOI handler of MSI/MSI-X interrupts for P8 (PHB3) need additional
steps to handle the P/Q bits in IVE before EOIing the corresponding
interrupt. The patch changes the EOI handler to cover that.
Signed-off-by: Gavin Shan sha...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/opal.h|2 +
arch/powerpc/include/asm/xics.h|3 ++
arch/powerpc/platforms/powernv/opal-wrappers.S |1 +
arch/powerpc/platforms/powernv/pci-ioda.c | 16 ++
arch/powerpc/platforms/powernv/pci.c | 19
arch/powerpc/platforms/powernv/pci.h |1 +
arch/powerpc/sysdev/xics/icp-native.c | 27 +++-
7 files changed, 68 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 0af7ba0..93dad52 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -117,6 +117,7 @@ extern int opal_enter_rtas(struct rtas_args *args,
#define OPAL_SET_SLOT_LED_STATUS 55
#define OPAL_GET_EPOW_STATUS 56
#define OPAL_SET_SYSTEM_ATTENTION_LED 57
+#define OPAL_PCI_MSI_EOI 63
#ifndef __ASSEMBLY__
@@ -505,6 +506,7 @@ int64_t opal_pci_get_xive_reissue(uint64_t phb_id, uint32_t
xive_number,
uint8_t *p_bit, uint8_t *q_bit);
int64_t opal_pci_set_xive_reissue(uint64_t phb_id, uint32_t xive_number,
uint8_t p_bit, uint8_t q_bit);
+int64_t opal_pci_msi_eoi(uint64_t phb_id, uint32_t ive_number);
int64_t opal_pci_set_xive_pe(uint64_t phb_id, uint32_t pe_number,
uint32_t xive_num);
int64_t opal_get_xive_source(uint64_t phb_id, uint32_t xive_num,
diff --git a/arch/powerpc/include/asm/xics.h b/arch/powerpc/include/asm/xics.h
index 4ae9a09..c4b364b 100644
--- a/arch/powerpc/include/asm/xics.h
+++ b/arch/powerpc/include/asm/xics.h
@@ -72,6 +72,9 @@ extern int ics_opal_init(void);
static inline int ics_opal_init(void) { return -ENODEV; }
#endif
+/* Extra EOI handler for PHB3 */
+extern int pnv_pci_msi_eoi(unsigned int hw_irq);
+
/* ICS instance, hooked up to chip_data of an irq */
struct ics {
struct list_head link;
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S
b/arch/powerpc/platforms/powernv/opal-wrappers.S
index 3bb07e5..6fabe92 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -107,3 +107,4 @@ OPAL_CALL(opal_pci_mask_pe_error,
OPAL_PCI_MASK_PE_ERROR);
OPAL_CALL(opal_set_slot_led_status,OPAL_SET_SLOT_LED_STATUS);
OPAL_CALL(opal_get_epow_status,OPAL_GET_EPOW_STATUS);
OPAL_CALL(opal_set_system_attention_led, OPAL_SET_SYSTEM_ATTENTION_LED);
+OPAL_CALL(opal_pci_msi_eoi,OPAL_PCI_MSI_EOI);
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index 0c15870..32197af 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -646,6 +646,20 @@ static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb,
struct pci_dev *dev,
return 0;
}
+static int pnv_pci_ioda_msi_eoi(struct pnv_phb *phb, unsigned int hw_irq)
+{
+ long rc;
+
+ rc = opal_pci_msi_eoi(phb-opal_id, hw_irq - phb-msi_base);
+ if (rc) {
+ pr_warning(%s: Failed to EOI IRQ#%d on PHB#%d, rc=%ld\n,
+ __func__, hw_irq, phb-hose-global_number, rc);
+ return -EIO;
+ }
+
+ return 0;
+}
+
static void pnv_pci_init_ioda_msis(struct pnv_phb *phb)
{
unsigned int count;
@@ -667,6 +681,8 @@ static void pnv_pci_init_ioda_msis(struct pnv_phb *phb)
}
phb-msi_setup = pnv_pci_ioda_msi_setup;
+ if (phb-type == PNV_PHB_IODA2)
+ phb-msi_eoi = pnv_pci_ioda_msi_eoi;
phb-msi32_support = 1;
pr_info( Allocated bitmap for %d MSIs (base IRQ 0x%x)\n,
count, phb-msi_base);
diff --git a/arch/powerpc/platforms/powernv/pci.c
b/arch/powerpc/platforms/powernv/pci.c
index a11b5a6..ea6a93d 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -115,6 +115,25 @@ static void pnv_teardown_msi_irqs(struct pci_dev *pdev)
irq_dispose_mapping(entry-irq);
}
}
+
+int pnv_pci_msi_eoi(unsigned int hw_irq)
+{
+ struct pci_controller *hose, *tmp;
+ struct pnv_phb *phb = NULL;
+
+ list_for_each_entry_safe(hose, tmp, hose_list, list_node) {
+ phb = hose-private_data;
+ if (hw_irq = phb-msi_base
+ hw_irq phb-msi_base + phb-msi_bmp.irq_count) {
+ if (!phb-msi_eoi)
+ return -EEXIST;
+ return phb-msi_eoi(phb, hw_irq);
+ }
+ }
+
+ /* For LSI
[PATCH] powerpc: Add isync to copy_and_flush
In __after_prom_start we copy the kernel down to zero in two calls to copy_and_flush. After the first call (copy from 0 to copy_to_here:) we jump to the newly copied code soon after. Unfortunately there's no isync between the copy of this code and the jump to it. Hence it's possible that stale instructions could still be in the icache or pipeline before we branch to it. We've seen this on real machines and it's results in no console output after: calling quiesce... returning from prom_init The below adds an isync to ensure that the copy and flushing has completed before any branching to the new instructions occurs. Signed-off-by: Michael Neuling mi...@neuling.org cc: sta...@kernel.org --- benh: we should get this in 3.9 ASAP. diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S index 0886ae6..b61363d 100644 --- a/arch/powerpc/kernel/head_64.S +++ b/arch/powerpc/kernel/head_64.S @@ -509,6 +509,7 @@ _GLOBAL(copy_and_flush) sync addir5,r5,8 addir6,r6,8 + isync blr .align 8 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: attempt to move .org backwards still show up
Mike Qiu qiud...@linux.vnet.ibm.com wrote: 于 2013/4/24 16:31, Michael Ellerman 写道: On Wed, Apr 24, 2013 at 04:22:53PM +0800, Mike Qiu wrote: Hi all I get an error message when I compile the source code in Power7 platform use the newest upstream kernel. Hi Mike, It depends on what your .config is. What defconfig are you building? I just copy the config file from /boot/config.* to .config and use make menuconfig change nothing by manually, then save. Can you post the resulting config here? Do you have commit in your tree? commit 087aa036eb79f24b856893190359ba812b460f45 Author: Chen Gang gang.c...@asianux.com powerpc: make additional room in exception vector area Mikey ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 2/3 v14] iommu/fsl: Add additional iommu attributes required by the PAMU driver.
On Tue, Apr 23, 2013 at 02:10:25PM +, Sethi Varun-B16395 wrote: I think it's fine to have the header under linux, actually I also the intel-iommu header under linux. Yes, the difference is that VT-d runs on x86 and on ia64. So there is no single arch where the header could be placed. The amd-iommu.h file on the other hand is x86 only and should also be moved to asm/, as I just found out :) And as long as PAMU is only needed on a single architecture the header should also be arch-specific. If that changes someday the header can be moved to a generic place. Joerg ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[RFC] device-tree.git automatic sync from linux.git
Hi, First off apologies for the large CC list -- I think this catches the arch list for all the arches with device tree source in the tree. Various folks have expressed an interest in eventually splitting the device tree bindings out of the Linux git repository into a separate tree. This should help reduce the cross talk between the code and the bindings and to make it difficult to accidentally co-evolve the bindings and the code (i.e. break compatibility) etc. There are also other projects (such as Xen) which would also like to use device-tree as an OS agnostic description of the hardware. I was talking to Grant about this at this Spring's LinaroConnect in Hong Kong and as a first step he was interested in a device-tree.git repository which is automatically kept insync with the main Linux tree. Somehow I found myself volunteering to set up that tree. An RFC repository can be found at: http://xenbits.xen.org/gitweb/?p=people/ianc/device-tree-rebasing.git This is created using git filter-branch and retains the full history for the device tree source files up to v3.9-rc8. The master branch contains everything including the required build infrastructure while upstream/master and upstream/dts contain the most recently converted upstream master branch and the pristine converted version respectively. Each upstream tag T is paired with a tag T-dts which is the converted version of that tag. Note that the tree will be potentially rebasing (hence the name) for the time being while I'm still smoothing out the conversion process. The paths to include in the conversion are described in scripts/rewrite-paths.sed. The generic cases are: arch/ARCH/boot/dts/*.dts and *.dts? (for dtsi and dtsp etc) arch/ARCH/boot/*.dts and *.dts? arch/ARCH/include/dts/* (currently unused?) which become src/ARCH/*.dts and *.dts? plus src/ARCH/include/* There are also some special cases for some arches which don't follow this pattern and for older versions of the kernel which were less consistent. The paths were gleaned from git ls-tree + grep on every tag in the tree, so if a file was added and moved between two rcs then the original path may not be covered (so the move will look like it just adds the files). In principal this supports the new .dtsp files and includes the required include paths in the conversion but none of them seem to be in mainline yet, so we'll have to see! The initial conversion took in excess of 40 hours (running out of a ramdisk) so even if the result is stable in terms of commit ids etc a fresh conversion every time isn't an option for a ~daily sync so I had to create a slightly hacked around git-filter-branch (found in scripts/git-filter-branch) to support incremental filtering, which I intend to send to the git folks soon. Please let me know what you think. Ian. [0] real2533m32.142s user2393m35.039s sys 343m44.385s ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2 01/15] powerpc/85xx: cache operations for Freescale SoCs based on BOOK3E
On Tue, Apr 23, 2013 at 06:46:10PM -0500, Scott Wood wrote: On 04/19/2013 05:47:34 AM, Zhao Chenhui wrote: These cache operations support Freescale SoCs based on BOOK3E. Move L1 cache operations to fsl_booke_cache.S in order to maintain easily. And, add cache operations for backside L2 cache and platform cache. The backside L2 cache appears on e500mc and e5500 core. The platform cache supported by this patch is L2 Look-Aside Cache, which appears on SoCs with e500v1/e500v2 core, such as MPC8572, P1020, etc. Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com Signed-off-by: Li Yang le...@freescale.com --- arch/powerpc/include/asm/cacheflush.h |8 ++ arch/powerpc/kernel/Makefile |1 + arch/powerpc/kernel/fsl_booke_cache.S | 210 + arch/powerpc/kernel/head_fsl_booke.S | 74 4 files changed, 219 insertions(+), 74 deletions(-) create mode 100644 arch/powerpc/kernel/fsl_booke_cache.S diff --git a/arch/powerpc/include/asm/cacheflush.h b/arch/powerpc/include/asm/cacheflush.h index b843e35..bc3f937 100644 --- a/arch/powerpc/include/asm/cacheflush.h +++ b/arch/powerpc/include/asm/cacheflush.h @@ -32,6 +32,14 @@ extern void flush_dcache_page(struct page *page); extern void __flush_disable_L1(void); +#ifdef CONFIG_FSL_SOC_BOOKE +void flush_dcache_L1(void); +void flush_backside_L2_cache(void); +void disable_backside_L2_cache(void); +void flush_disable_L2(void); +void invalidate_enable_L2(void); +#endif Don't ifdef prototypes unless there's a good reason, such as providing an inline alternative. I'll get rid of this #ifdef. Why do you have flush_backside_L2_cache and disable_backside_L2_cache as something different from flush_disable_L2? The latter should flush whatever L2 is present. Don't treat pre-corenet as the default. These L2 caches are very different. The backside L2 is integrated in the e500mc/e5500 core and controlled by SPR registers. But, the latter L2 cache is on the SoC and controlled by registers mapped in CCSR. Why do we even need to distinguish L1 from L2 at all? Shouldn't the function that gets exposed just be flush and disable data caches that are specific to this cpu? What should happen on e6500? -Scott Yes. It is a good idea to use a set of uniform functions to operate the caches of e500/e500mc/e5500/e6500 and SoCs. I'll think over your comments. Thanks for you comments. -Chenhui ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2 13/15] powerpc/85xx: add support for e6500 L1 cache operation
On Tue, Apr 23, 2013 at 07:00:49PM -0500, Scott Wood wrote: On 04/19/2013 05:47:46 AM, Zhao Chenhui wrote: From: Chen-Hui Zhao chenhui.z...@freescale.com The L1 Data Cache of e6500 contains no modified data, no flush is required. Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com Signed-off-by: Li Yang le...@freescale.com Signed-off-by: Andy Fleming aflem...@freescale.com --- arch/powerpc/kernel/fsl_booke_cache.S | 11 ++- 1 files changed, 10 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/kernel/fsl_booke_cache.S b/arch/powerpc/kernel/fsl_booke_cache.S index 232c47b..24a52bb 100644 --- a/arch/powerpc/kernel/fsl_booke_cache.S +++ b/arch/powerpc/kernel/fsl_booke_cache.S @@ -65,13 +65,22 @@ _GLOBAL(flush_dcache_L1) blr +#define PVR_E6500 0x8040 + /* Flush L1 d-cache, invalidate and disable d-cache and i-cache */ _GLOBAL(__flush_disable_L1) +/* L1 Data Cache of e6500 contains no modified data, no flush is required */ +mfspr r3, SPRN_PVR +rlwinm r4, r3, 16, 0x +lis r5, 0 +ori r5, r5, PVR_E6500@l +cmpwr4, r5 +beq 2f mflrr10 bl flush_dcache_L1 /* Flush L1 d-cache */ mtlrr10 -msync +2: msync mfspr r4, SPRN_L1CSR0 /* Invalidate and disable d-cache */ li r5, 2 rlwimi r4, r5, 0, 3 Note that disabling the cache is a core operation, rather than a thread operation. Is this only called when the second thread is disabled? -Scott It is called only when a core is down. I can add a comment in the code. -Chenhui ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH 2/3 v14] iommu/fsl: Add additional iommu attributes required by the PAMU driver.
-Original Message- From: Joerg Roedel [mailto:j...@8bytes.org] Sent: Wednesday, April 24, 2013 4:21 PM To: Sethi Varun-B16395 Cc: io...@lists.linux-foundation.org; linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org; ga...@kernel.crashing.org; b...@kernel.crashing.org; Yoder Stuart-B08248; Wood Scott-B07421 Subject: Re: [PATCH 2/3 v14] iommu/fsl: Add additional iommu attributes required by the PAMU driver. On Tue, Apr 23, 2013 at 02:10:25PM +, Sethi Varun-B16395 wrote: I think it's fine to have the header under linux, actually I also the intel-iommu header under linux. Yes, the difference is that VT-d runs on x86 and on ia64. So there is no single arch where the header could be placed. The amd-iommu.h file on the other hand is x86 only and should also be moved to asm/, as I just found out :) And as long as PAMU is only needed on a single architecture the header should also be arch-specific. If that changes someday the header can be moved to a generic place. Ok, I will post the next version of the patch set. -Varun ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2 12/15] powerpc/85xx: add time base sync support for e6500
On Tue, Apr 23, 2013 at 07:04:06PM -0500, Scott Wood wrote:
On 04/19/2013 05:47:45 AM, Zhao Chenhui wrote:
From: Chen-Hui Zhao chenhui.z...@freescale.com
For e6500, two threads in one core share one time base. Just need
to do time base sync on first thread of one core, and skip it on
the other thread.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Andy Fleming aflem...@freescale.com
---
arch/powerpc/platforms/85xx/smp.c | 52
+++-
1 files changed, 44 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/smp.c
b/arch/powerpc/platforms/85xx/smp.c
index 74d8cde..5f3eee3 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -26,6 +26,7 @@
#include asm/cacheflush.h
#include asm/dbell.h
#include asm/fsl_guts.h
+#include asm/cputhreads.h
#include sysdev/fsl_soc.h
#include sysdev/mpic.h
@@ -45,6 +46,7 @@ static u64 timebase;
static int tb_req;
static int tb_valid;
static u32 cur_booting_core;
+static bool rcpmv2;
#ifdef CONFIG_PPC_E500MC
/* get a physical mask of online cores and booting core */
@@ -53,26 +55,40 @@ static inline u32 get_phy_cpu_mask(void)
u32 mask;
int cpu;
-mask = 1 cur_booting_core;
-for_each_online_cpu(cpu)
-mask |= 1 get_hard_smp_processor_id(cpu);
+if (smt_capable()) {
+/* two threads in one core share one time base */
+mask = 1 cpu_core_index_of_thread(cur_booting_core);
+for_each_online_cpu(cpu)
+mask |= 1 cpu_core_index_of_thread(
+get_hard_smp_processor_id(cpu));
+} else {
+mask = 1 cur_booting_core;
+for_each_online_cpu(cpu)
+mask |= 1 get_hard_smp_processor_id(cpu);
+}
Where is smt_capable defined()? I assume somewhere in the patchset
but it's a pain to search 12 patches...
It is defined in arch/powerpc/include/asm/topology.h.
#define smt_capable() (cpu_has_feature(CPU_FTR_SMT))
Thanks for your review again.
Is this really about whether we're SMT-capable or whether we have
rcpm v2?
-Scott
I think this if statement can be removed. The cpu_core_index_of_thread()
can return the correct cpu number with thread or without thread.
Like this:
static inline u32 get_phy_cpu_mask(void)
{
u32 mask;
int cpu;
mask = 1 cpu_core_index_of_thread(cur_booting_core);
for_each_online_cpu(cpu)
mask |= 1 cpu_core_index_of_thread(
get_hard_smp_processor_id(cpu));
return mask;
}
-Chenhui
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[PATCH 1/2 v15] iommu/fsl: Add additional iommu attributes required by the PAMU driver.
Added the following domain attributes for the FSL PAMU driver:
1. Added new iommu stash attribute, which allows setting of the
LIODN specific stash id parameter through IOMMU API.
2. Added an attribute for enabling/disabling DMA to a particular
memory window.
3. Added domain attribute to check for PAMUV1 specific constraints.
Signed-off-by: Varun Sethi varun.se...@freescale.com
---
v15 changes:
- Moved fsl_pamu_stash.h under arch/powerpc/include/asm.
v14 changes:
- Add FSL prefix to PAMU attributes.
v13 changes:
- created a new file include/linux/fsl_pamu_stash.h for stash
attributes.
v12 changes:
- Moved PAMU specifc stash ids and structures to PAMU header file.
- no change in v11.
- no change in v10.
arch/powerpc/include/asm/fsl_pamu_stash.h | 39 +
include/linux/iommu.h | 16
2 files changed, 55 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/include/asm/fsl_pamu_stash.h
diff --git a/arch/powerpc/include/asm/fsl_pamu_stash.h
b/arch/powerpc/include/asm/fsl_pamu_stash.h
new file mode 100644
index 000..caa1b21
--- /dev/null
+++ b/arch/powerpc/include/asm/fsl_pamu_stash.h
@@ -0,0 +1,39 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+ *
+ * Copyright (C) 2013 Freescale Semiconductor, Inc.
+ *
+ */
+
+#ifndef __FSL_PAMU_STASH_H
+#define __FSL_PAMU_STASH_H
+
+/* cache stash targets */
+enum pamu_stash_target {
+ PAMU_ATTR_CACHE_L1 = 1,
+ PAMU_ATTR_CACHE_L2,
+ PAMU_ATTR_CACHE_L3,
+};
+
+/*
+ * This attribute allows configuring stashig specific parameters
+ * in the PAMU hardware.
+ */
+
+struct pamu_stash_attribute {
+ u32 cpu;/* cpu number */
+ u32 cache; /* cache to stash to: L1,L2,L3 */
+};
+
+#endif /* __FSL_PAMU_STASH_H */
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 2727810..313d17a 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -57,10 +57,26 @@ struct iommu_domain {
#define IOMMU_CAP_CACHE_COHERENCY 0x1
#define IOMMU_CAP_INTR_REMAP 0x2 /* isolates device intrs */
+/*
+ * Following constraints are specifc to FSL_PAMUV1:
+ * -aperture must be power of 2, and naturally aligned
+ * -number of windows must be power of 2, and address space size
+ * of each window is determined by aperture size / # of windows
+ * -the actual size of the mapped region of a window must be power
+ * of 2 starting with 4KB and physical address must be naturally
+ * aligned.
+ * DOMAIN_ATTR_FSL_PAMUV1 corresponds to the above mentioned contraints.
+ * The caller can invoke iommu_domain_get_attr to check if the underlying
+ * iommu implementation supports these constraints.
+ */
+
enum iommu_attr {
DOMAIN_ATTR_GEOMETRY,
DOMAIN_ATTR_PAGING,
DOMAIN_ATTR_WINDOWS,
+ DOMAIN_ATTR_FSL_PAMU_STASH,
+ DOMAIN_ATTR_FSL_PAMU_ENABLE,
+ DOMAIN_ATTR_FSL_PAMUV1,
DOMAIN_ATTR_MAX,
};
--
1.7.4.1
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[PATCH 0/3] rapidio: changes to enumeration/discovery
Systems that use RapidIO fabric may need to implement their own enumeration and discovery methods which are better suitable for needs of a target application. The following set of patches is intended to simplify process of introduction of new RapidIO fabric enumeration/discovery methods. The first patch offers ability to add new RapidIO enumeration/discovery methods using kernel configuration options or loadable modules. The new configuration option mechanism allows to select built-in or modular enumeration/discovery method from the list of existing methods or use external module(s). This patch also updates the currently existing enumeration/discovery code to be used as built-in or modular method. The corresponding configuration option is named Basic enumeration/discovery method. This is the only one built-in configuration option available today but new methods are expected to be introduced after adoption of provided patches. The second patch address a long time complaint of RapidIO subsystem users regarding fabric enumeration/discovery start sequence. Existing implementation offers only a boot-time enumeration/discovery start which requires synchronized boot of all endpoints in RapidIO network. While it works for small closed configurations with limited number of endpoints, using this approach in systems with large number of endpoints is quite challenging. To eliminate requirement for synchronized start the second patch introduces RapidIO enumeration/discovery start from user space. For compatibility with the existing RapidIO subsystem implementation, automatic boot time enumeration/discovery start can be configured in by selecting CONFIG_RAPIDIO_ENUM_AUTO option. Cc: Matt Porter mpor...@kernel.crashing.org Cc: Li Yang le...@freescale.com Cc: Kumar Gala ga...@kernel.crashing.org Cc: Andre van Herk andre.van.h...@prodrive.nl Cc: Micha Nelissen micha.nelis...@prodrive.nl Alexandre Bounine (3): rapidio: make enumeration/discovery configurable rapidio: add enumeration/discovery start from user space rapidio: documentation update for enumeration changes Documentation/rapidio/rapidio.txt | 137 -- Documentation/rapidio/sysfs.txt | 17 +++ drivers/rapidio/Kconfig | 28 + drivers/rapidio/Makefile |3 +- drivers/rapidio/rio-driver.c |8 ++ drivers/rapidio/rio-scan.c| 195 ++ drivers/rapidio/rio-sysfs.c | 45 +++ drivers/rapidio/rio.c | 234 - drivers/rapidio/rio.h | 12 ++- include/linux/rio.h | 17 +++ include/linux/rio_drv.h |1 + 11 files changed, 548 insertions(+), 149 deletions(-) -- 1.7.8.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 2/3] rapidio: add enumeration/discovery start from user space
Add RapidIO enumeration/discovery start from user space.
User space start allows to defer RapidIO fabric scan until the moment when all
participating endpoints are initialized avoiding mandatory synchronized start
of all endpoints (which may be challenging in systems with large number of
RapidIO endpoints).
For compatibility with the existing RapidIO subsystem implementation, automatic
boot time enumeration/discovery start can be configured in by selecting
CONFIG_RAPIDIO_ENUM_AUTO option.
Signed-off-by: Alexandre Bounine alexandre.boun...@idt.com
Cc: Matt Porter mpor...@kernel.crashing.org
Cc: Li Yang le...@freescale.com
Cc: Kumar Gala ga...@kernel.crashing.org
Cc: Andre van Herk andre.van.h...@prodrive.nl
Cc: Micha Nelissen micha.nelis...@prodrive.nl
---
drivers/rapidio/Kconfig |9
drivers/rapidio/rio-driver.c |1 +
drivers/rapidio/rio-scan.c | 24 +++--
drivers/rapidio/rio-sysfs.c | 45 ++
drivers/rapidio/rio.c| 26 ++-
drivers/rapidio/rio.h|2 +
include/linux/rio.h |9 ++-
7 files changed, 109 insertions(+), 7 deletions(-)
diff --git a/drivers/rapidio/Kconfig b/drivers/rapidio/Kconfig
index e392cab..8b7f92d 100644
--- a/drivers/rapidio/Kconfig
+++ b/drivers/rapidio/Kconfig
@@ -66,4 +66,13 @@ config RAPIDIO_ENUM_BASIC
endchoice
+config RAPIDIO_ENUM_AUTO
+ bool Automatic RapidIO enumeration/discovery start
+ depends on RAPIDIO RAPIDIO_ENUM_BASIC = y
+ help
+ Say Y if you want RapidIO subsystem to start fabric enumeration and
+ discovery automatically during kernel initialization time.
+ If you are unsure, say N here. You will be able to start RapidIO
+ fabric enumeration or discovery later by a user request.
+
source drivers/rapidio/switches/Kconfig
diff --git a/drivers/rapidio/rio-driver.c b/drivers/rapidio/rio-driver.c
index 55850bb..a0c8755 100644
--- a/drivers/rapidio/rio-driver.c
+++ b/drivers/rapidio/rio-driver.c
@@ -207,6 +207,7 @@ struct bus_type rio_bus_type = {
.name = rapidio,
.match = rio_match_bus,
.dev_attrs = rio_dev_attrs,
+ .bus_attrs = rio_bus_attrs,
.probe = rio_device_probe,
.remove = rio_device_remove,
};
diff --git a/drivers/rapidio/rio-scan.c b/drivers/rapidio/rio-scan.c
index 33fc332..3e371b1 100644
--- a/drivers/rapidio/rio-scan.c
+++ b/drivers/rapidio/rio-scan.c
@@ -1134,19 +1134,30 @@ static void rio_pw_enable(struct rio_mport *port, int
enable)
/**
* rio_enum_mport- Start enumeration through a master port
* @mport: Master port to send transactions
+ * @flags: Enumeration control flags
*
* Starts the enumeration process. If somebody has enumerated our
* master port device, then give up. If not and we have an active
* link, then start recursive peer enumeration. Returns %0 if
* enumeration succeeds or %-EBUSY if enumeration fails.
*/
-int rio_enum_mport(struct rio_mport *mport)
+int rio_enum_mport(struct rio_mport *mport, u32 flags)
{
struct rio_net *net = NULL;
int rc = 0;
printk(KERN_INFO RIO: enumerate master port %d, %s\n, mport-id,
mport-name);
+
+ /*
+* To avoid multiple start requests (repeat enumeration is not supported
+* by this method) check if enumeration/discovery was performed for this
+* mport: if mport was added into the list of mports for a net exit
+* with error.
+*/
+ if (mport-nnode.next || mport-nnode.prev)
+ return -EBUSY;
+
/* If somebody else enumerated our master port device, bail. */
if (rio_enum_host(mport) 0) {
printk(KERN_INFO
@@ -1236,14 +1247,16 @@ static void rio_build_route_tables(struct rio_net *net)
/**
* rio_disc_mport- Start discovery through a master port
* @mport: Master port to send transactions
+ * @flags: discovery control flags
*
* Starts the discovery process. If we have an active link,
- * then wait for the signal that enumeration is complete.
+ * then wait for the signal that enumeration is complete (if wait
+ * is allowed).
* When enumeration completion is signaled, start recursive
* peer discovery. Returns %0 if discovery succeeds or %-EBUSY
* on failure.
*/
-int rio_disc_mport(struct rio_mport *mport)
+int rio_disc_mport(struct rio_mport *mport, u32 flags)
{
struct rio_net *net = NULL;
unsigned long to_end;
@@ -1253,6 +1266,11 @@ int rio_disc_mport(struct rio_mport *mport)
/* If master port has an active link, allocate net and discover peers */
if (rio_mport_is_active(mport)) {
+ if (rio_enum_complete(mport))
+ goto enum_done;
+ else if (flags RIO_SCAN_ENUM_NO_WAIT)
+ return -EAGAIN;
+
pr_debug(RIO: wait for enumeration to complete...\n);
to_end = jiffies +
[PATCH 3/3] rapidio: documentation update for enumeration changes
Update RapidIO documentation to reflect changes made to enumeration/discovery build configuration and user space triggering mechanism. Signed-off-by: Alexandre Bounine alexandre.boun...@idt.com Cc: Matt Porter mpor...@kernel.crashing.org Cc: Li Yang le...@freescale.com Cc: Kumar Gala ga...@kernel.crashing.org Cc: Andre van Herk andre.van.h...@prodrive.nl Cc: Micha Nelissen micha.nelis...@prodrive.nl --- Documentation/rapidio/rapidio.txt | 137 ++--- Documentation/rapidio/sysfs.txt | 17 + 2 files changed, 143 insertions(+), 11 deletions(-) diff --git a/Documentation/rapidio/rapidio.txt b/Documentation/rapidio/rapidio.txt index c75694b..d97576f 100644 --- a/Documentation/rapidio/rapidio.txt +++ b/Documentation/rapidio/rapidio.txt @@ -79,20 +79,64 @@ master port that is used to communicate with devices within the network. In order to initialize the RapidIO subsystem, a platform must initialize and register at least one master port within the RapidIO network. To register mport within the subsystem controller driver initialization code calls function -rio_register_mport() for each available master port. After all active master -ports are registered with a RapidIO subsystem, the rio_init_mports() routine -is called to perform enumeration and discovery. +rio_register_mport() for each available master port. -In the current PowerPC-based implementation a subsys_initcall() is specified to -perform controller initialization and mport registration. At the end it directly -calls rio_init_mports() to execute RapidIO enumeration and discovery. +RapidIO subsystem uses subsys_initcall() or device_initcall() to perform +controller initialization (depending on controller device type). + +After all active master ports are registered with a RapidIO subsystem, +an enumeration and/or discovery routine may be called automatically or +by user-space command. 4. Enumeration and Discovery -When rio_init_mports() is called it scans a list of registered master ports and -calls an enumeration or discovery routine depending on the configured role of a -master port: host or agent. +4.1 Overview + + +RapidIO subsystem configuration options allow users to specify enumeration and +discovery methods as built-in components or loadable modules. +For built-in options only one method can be selected for all mports in a system. +Selecting a modular build option for enumeration/discovery allows to use +different enumerators attached to available mport device individually. + +Depending on selected enumeration/discovery build configuration, there are +several methods to initiate enumeration and/or discovery process: + + (a) Built-in enumeration and discovery process can be started automatically + during kernel initialization time. This is the original method used since + introduction of RapidIO subsystem. This method relieson kernel initcall that + calls rio_init_mports() routine after all available mports have been + registered. When automatic start of enumeration/discovery is used a user has + to ensure that all discovering endpoints are started before the enumerating + endpoint and are waiting for enumeration to be completed. + Configuration option CONFIG_RAPIDIO_DISC_TIMEOUT defines time that discovering + endpoint waits for enumeration to be completed. If the specified timeout + expires the discovery process is terminated without obtaining RapidIO network + information. NOTE: a timed out discovery process may be restarted later using + a user-space command as it is described later if the given endpoint was + enumerated successfully. + + (b) Built-in enumeration and discovery process can be started by a command + from user space. This initiation method provides more freedom for system + startup compared to the option (a) above. After all participating endpoints + have been successfully booted, an enumeration process shall be started first + by issuing a user-space command, as soon as enumeration is completed + a discovery process can be started on all remaining endpoints. + Configuration option CONFIG_RAPIDIO_ENUM_AUTO defines which method will be + used to start a built-in enumeration and discovery process. + + (c) Modular enumeration and discovery process can be started by a command from + user space. After an enumeration/discovery module is loaded, a network scan + process can be started by issuing a user-space command. + Similar to the option (b) above, an enumerator has to be started first. + + (d) Modular enumeration and discovery process can be started by a module + initialization routine. As in the cases above an enumerating module shall be + loaded first. + +When a network scan process is started it calls an enumeration or discovery +routine depending on the configured role of a master port: host or agent. Enumeration is performed by a master port if it is configured as a host port by assigning
[PATCH 1/3] rapidio: make enumeration/discovery configurable
Rework to implement RapidIO enumeration/discovery method selection
combined with ability to use enumeration/discovery as a kernel module.
This patch adds ability to introduce new RapidIO enumeration/discovery methods
using kernel configuration options or loadable modules. Configuration option
mechanism allows to select built-in or modular enumeration/discovery method from
the list of existing methods or use external modules.
If a modular enumeration/discovery is selected each RapidIO mport device can
have its own method attached to it.
The currently existing enumeration/discovery code was updated to be used
as built-in or modular method. This configuration option is named Basic
enumeration/discovery method.
Several common routines have been moved from rio-scan.c to make them available
to other enumeration methods and reduce number of exported symbols.
Signed-off-by: Alexandre Bounine alexandre.boun...@idt.com
Cc: Matt Porter mpor...@kernel.crashing.org
Cc: Li Yang le...@freescale.com
Cc: Kumar Gala ga...@kernel.crashing.org
Cc: Andre van Herk andre.van.h...@prodrive.nl
Cc: Micha Nelissen micha.nelis...@prodrive.nl
---
drivers/rapidio/Kconfig | 19
drivers/rapidio/Makefile |3 +-
drivers/rapidio/rio-driver.c |7 ++
drivers/rapidio/rio-scan.c | 171 +-
drivers/rapidio/rio.c| 212 +-
drivers/rapidio/rio.h| 10 ++-
include/linux/rio.h | 12 +++
include/linux/rio_drv.h |1 +
8 files changed, 300 insertions(+), 135 deletions(-)
diff --git a/drivers/rapidio/Kconfig b/drivers/rapidio/Kconfig
index 6194d35..e392cab 100644
--- a/drivers/rapidio/Kconfig
+++ b/drivers/rapidio/Kconfig
@@ -47,4 +47,23 @@ config RAPIDIO_DEBUG
If you are unsure about this, say N here.
+choice
+ prompt Enumeration method
+ depends on RAPIDIO
+ help
+ There are different enumeration and discovery mechanisms offered
+ for RapidIO subsystem. You may select single built-in method or
+ or any number of methods to be built as modules.
+ Selecting a built-in method disables use of loadable methods.
+
+ If unsure, select Basic built-in.
+
+config RAPIDIO_ENUM_BASIC
+ tristate Basic
+ help
+ This option includes basic RapidIO fabric enumeration and discovery
+ mechanism similar to one described in RapidIO specification Annex 1.
+
+endchoice
+
source drivers/rapidio/switches/Kconfig
diff --git a/drivers/rapidio/Makefile b/drivers/rapidio/Makefile
index ec3fb81..3036702 100644
--- a/drivers/rapidio/Makefile
+++ b/drivers/rapidio/Makefile
@@ -1,7 +1,8 @@
#
# Makefile for RapidIO interconnect services
#
-obj-y += rio.o rio-access.o rio-driver.o rio-scan.o rio-sysfs.o
+obj-y += rio.o rio-access.o rio-driver.o rio-sysfs.o
+obj-$(CONFIG_RAPIDIO_ENUM_BASIC) += rio-scan.o
obj-$(CONFIG_RAPIDIO) += switches/
obj-$(CONFIG_RAPIDIO) += devices/
diff --git a/drivers/rapidio/rio-driver.c b/drivers/rapidio/rio-driver.c
index 0f4a53b..55850bb 100644
--- a/drivers/rapidio/rio-driver.c
+++ b/drivers/rapidio/rio-driver.c
@@ -164,6 +164,13 @@ void rio_unregister_driver(struct rio_driver *rdrv)
driver_unregister(rdrv-driver);
}
+void rio_attach_device(struct rio_dev *rdev)
+{
+ rdev-dev.bus = rio_bus_type;
+ rdev-dev.parent = rio_bus;
+}
+EXPORT_SYMBOL_GPL(rio_attach_device);
+
/**
* rio_match_bus - Tell if a RIO device structure has a matching RIO driver
device id structure
* @dev: the standard device structure to match against
diff --git a/drivers/rapidio/rio-scan.c b/drivers/rapidio/rio-scan.c
index a965acd..33fc332 100644
--- a/drivers/rapidio/rio-scan.c
+++ b/drivers/rapidio/rio-scan.c
@@ -37,12 +37,8 @@
#include rio.h
-LIST_HEAD(rio_devices);
-
static void rio_init_em(struct rio_dev *rdev);
-DEFINE_SPINLOCK(rio_global_list_lock);
-
static int next_destid = 0;
static int next_comptag = 1;
@@ -327,127 +323,6 @@ static int rio_is_switch(struct rio_dev *rdev)
}
/**
- * rio_switch_init - Sets switch operations for a particular vendor switch
- * @rdev: RIO device
- * @do_enum: Enumeration/Discovery mode flag
- *
- * Searches the RIO switch ops table for known switch types. If the vid
- * and did match a switch table entry, then call switch initialization
- * routine to setup switch-specific routines.
- */
-static void rio_switch_init(struct rio_dev *rdev, int do_enum)
-{
- struct rio_switch_ops *cur = __start_rio_switch_ops;
- struct rio_switch_ops *end = __end_rio_switch_ops;
-
- while (cur end) {
- if ((cur-vid == rdev-vid) (cur-did == rdev-did)) {
- pr_debug(RIO: calling init routine for %s\n,
-rio_name(rdev));
- cur-init_hook(rdev, do_enum);
- break;
- }
- cur++;
- }
-
- if ((cur = end)
Re: [PATCH -V6 18/27] mm/THP: withdraw the pgtable after pmdp related operations
Hi, On Wed, Apr 24, 2013 at 02:38:01PM +0530, Aneesh Kumar K.V wrote: From 7444a5eda33c00eea465b51c405cb830c57513b7 Mon Sep 17 00:00:00 2001 From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com Date: Wed, 6 Mar 2013 12:50:37 +0530 Subject: [PATCH] mm/THP: withdraw the pgtable after pmdp related operations For architectures like ppc64 we look at deposited pgtable when calling pmdp_get_and_clear. So do the pgtable_trans_huge_withdraw after finishing pmdp related operations. Cc: Andrea Arcangeli aarca...@redhat.com Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com --- mm/huge_memory.c |8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) Reviewed-by: Andrea Arcangeli aarca...@redhat.com diff --git a/mm/huge_memory.c b/mm/huge_memory.c index 84f3180..21c5ebd 100644 --- a/mm/huge_memory.c +++ b/mm/huge_memory.c @@ -1363,9 +1363,15 @@ int zap_huge_pmd(struct mmu_gather *tlb, struct vm_area_struct *vma, struct page *page; pgtable_t pgtable; pmd_t orig_pmd; - pgtable = pgtable_trans_huge_withdraw(tlb-mm, pmd); + /* + * For architectures like ppc64 we look at deposited pgtable + * when calling pmdp_get_and_clear. So do the + * pgtable_trans_huge_withdraw after finishing pmdp related + * operations. + */ orig_pmd = pmdp_get_and_clear(tlb-mm, addr, pmd); tlb_remove_pmd_tlb_entry(tlb, pmd, addr); + pgtable = pgtable_trans_huge_withdraw(tlb-mm, pmd); So I assume you're going to check the pmdp pointer address in _withdraw, as the *pmd content is already clear. And that you're checking the deposited pmd earlier in pmdp_get_and_clear. A bit strange overall not seeing how exactly you're using the new parameter and the deposited pmds, but safe. Thanks, Andrea ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v4 0/13] NUMA CPU Reconfiguration using PRRN
Newer firmware on Power systems can transparently reassign platform resources (CPU and Memory) in use. For instance, if a processor or memory unit is predicted to fail, the platform may transparently move the processing to an equivalent unused processor or the memory state to an equivalent unused memory unit. However, reassigning resources across NUMA boundaries may alter the performance of the partition. When such reassignment is necessary, the Platform Resource Reassignment Notification (PRRN) option provides a mechanism to inform the Linux kernel of changes to the NUMA affinity of its platform resources. PRRN Events are RTAS events sent up through the event-scan mechanism on Power. When these events are received the system needs can get the updated device tree affinity information for the affected CPUs/memory via the rtas update-nodes and update-properties calls. This information is then used to update the NUMA affinity of the CPUs/Memory in the kernel. This patch set adds the ability to recognize PRRN events, update the device tree and kernel information for CPUs (memory will be handled in a later patch), and add an interface to enable/disable toplogy updates from /proc. Additionally, these updates solve an existing problem with the VPHN (Virtual Processor Home Node) capability and allow us to re-enable this feature. Nathan Fontenot arch/powerpc/include/asm/firmware.h |7 arch/powerpc/include/asm/prom.h | 46 ++-- arch/powerpc/include/asm/rtas.h |2 arch/powerpc/kernel/prom_init.c | 98 ++ arch/powerpc/kernel/rtasd.c | 46 arch/powerpc/mm/numa.c| 214 +++--- arch/powerpc/platforms/pseries/firmware.c | 50 - arch/powerpc/platforms/pseries/mobility.c | 21 +- powerpc/arch/powerpc/include/asm/firmware.h |1 powerpc/arch/powerpc/include/asm/prom.h | 71 +++ powerpc/arch/powerpc/include/asm/rtas.h |4 powerpc/arch/powerpc/include/asm/topology.h |5 powerpc/arch/powerpc/kernel/prom_init.c |2 powerpc/arch/powerpc/kernel/rtasd.c |7 powerpc/arch/powerpc/mm/numa.c| 62 ++ powerpc/arch/powerpc/platforms/pseries/firmware.c |8 powerpc/arch/powerpc/platforms/pseries/mobility.c | 20 +- powerpc/arch/powerpc/platforms/pseries/pseries.h |5 powerpc/arch/powerpc/platforms/pseries/setup.c| 40 ++-- 19 files changed, 496 insertions(+), 213 deletions(-) Updates for v4 of the patchset: -- 1/13 - Remove the hook in ppc_md for updating te device tree. 3/13 - Put the rtas code to handle PRRN events in #ifdef CONFIG_PPC_PSERIES 4/13 - New patch. Update the iteration over arrays in firmware.c to use ARRAY_SIZE() 5/13 (was 4/12) - Remove the unnecessary #ifdef 6/13 (was 5/12) - Removed the references to platform_has_feature() and update the firmware.c updates to use ARRAY_SIZE() for iteration. 8/13 (was 7/12) - Correct subject. 13/13 (was 12/12) - Remove inlining of prrn_is_enabled(). Updates for v3 of the patchset: -- 1/12 - Updated to use a ppc_md interface to invoke device tree updates, this corrects the build break previously seen in patch 2/12 for non-pseries platforms. 2/12 - New patch in the series to correct the parsing of the buffer returned from ibm,update-properties rtas call. 5/12 - The parsing of architecture vector 5 has been made more efficient. 7/12 - Correct #define used in call the firmware_has_feature() 8/12 - Updated calling of stop_machine() to only call it once per PRRN event. 12/12 - Added inclusion of topology.h to rtasd.c to correct a build failure on non-pseries platforms. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v4 1/13] Expose pseries devicetree_update()
Newer firmware on Power systems can transparently reassign platform resources
(CPU and Memory) in use. For instance, if a processor or memory unit is
predicted to fail, the platform may transparently move the processing to an
equivalent unused processor or the memory state to an equivalent unused
memory unit. However, reassigning resources across NUMA boundaries may alter
the performance of the partition. When such reassignment is necessary, the
Platform Resource Reassignment Notification (PRRN) option provides a
mechanism to inform the Linux kernel of changes to the NUMA affinity of
its platform resources.
When rtasd receives a PRRN event, it needs to make a series of RTAS
calls (ibm,update-nodes and ibm,update-properties) to retrieve the
updated device tree information. These calls are already handled in the
pseries_devicetree_update() routine used in partition migration.
This patch exposes pseries_devicetree_update() to make it accessible
to other pseries routines, this patch also updates pseries_devicetree_update()
to take a 32-bit scope parameter. The scope value, which was previously hard
coded to 1 for partition migration, is used for the RTAS calls
ibm,update-nodes/properties to update the device tree.
Signed-off-by: Nathan Fontenot nf...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/rtas.h |4
arch/powerpc/platforms/pseries/mobility.c | 21 -
2 files changed, 16 insertions(+), 9 deletions(-)
Index: powerpc/arch/powerpc/platforms/pseries/mobility.c
===
--- powerpc.orig/arch/powerpc/platforms/pseries/mobility.c 2013-04-15
09:18:10.0 -0500
+++ powerpc/arch/powerpc/platforms/pseries/mobility.c 2013-04-23
13:22:05.0 -0500
@@ -37,14 +37,16 @@
#define UPDATE_DT_NODE 0x0200
#define ADD_DT_NODE0x0300
-static int mobility_rtas_call(int token, char *buf)
+#define MIGRATION_SCOPE(1)
+
+static int mobility_rtas_call(int token, char *buf, s32 scope)
{
int rc;
spin_lock(rtas_data_buf_lock);
memcpy(rtas_data_buf, buf, RTAS_DATA_BUF_SIZE);
- rc = rtas_call(token, 2, 1, NULL, rtas_data_buf, 1);
+ rc = rtas_call(token, 2, 1, NULL, rtas_data_buf, scope);
memcpy(buf, rtas_data_buf, RTAS_DATA_BUF_SIZE);
spin_unlock(rtas_data_buf_lock);
@@ -123,7 +125,7 @@
return 0;
}
-static int update_dt_node(u32 phandle)
+static int update_dt_node(u32 phandle, s32 scope)
{
struct update_props_workarea *upwa;
struct device_node *dn;
@@ -151,7 +153,8 @@
upwa-phandle = phandle;
do {
- rc = mobility_rtas_call(update_properties_token, rtas_buf);
+ rc = mobility_rtas_call(update_properties_token, rtas_buf,
+ scope);
if (rc 0)
break;
@@ -219,7 +222,7 @@
return rc;
}
-static int pseries_devicetree_update(void)
+int pseries_devicetree_update(s32 scope)
{
char *rtas_buf;
u32 *data;
@@ -235,7 +238,7 @@
return -ENOMEM;
do {
- rc = mobility_rtas_call(update_nodes_token, rtas_buf);
+ rc = mobility_rtas_call(update_nodes_token, rtas_buf, scope);
if (rc rc != 1)
break;
@@ -256,7 +259,7 @@
delete_dt_node(phandle);
break;
case UPDATE_DT_NODE:
- update_dt_node(phandle);
+ update_dt_node(phandle, scope);
break;
case ADD_DT_NODE:
drc_index = *data++;
@@ -276,7 +279,7 @@
int rc;
int activate_fw_token;
- rc = pseries_devicetree_update();
+ rc = pseries_devicetree_update(MIGRATION_SCOPE);
if (rc) {
printk(KERN_ERR Initial post-mobility device tree update
failed: %d\n, rc);
@@ -292,7 +295,7 @@
rc = rtas_call(activate_fw_token, 0, 1, NULL);
if (!rc) {
- rc = pseries_devicetree_update();
+ rc = pseries_devicetree_update(MIGRATION_SCOPE);
if (rc)
printk(KERN_ERR Secondary post-mobility device tree
update failed: %d\n, rc);
Index: powerpc/arch/powerpc/include/asm/rtas.h
===
--- powerpc.orig/arch/powerpc/include/asm/rtas.h2013-04-15
09:18:10.0 -0500
+++ powerpc/arch/powerpc/include/asm/rtas.h 2013-04-23 13:22:37.0
-0500
@@ -277,6 +277,10 @@
extern void pSeries_log_error(char *buf, unsigned int err_type, int fatal);
+#ifdef CONFIG_PPC_PSERIES
+extern int pseries_devicetree_update(s32
[PATCH v4 3/13] Add PRRN RTAS event handler
From: Jesse Larrew jlar...@linux.vnet.ibm.com
A PRRN event is signaled via the RTAS event-scan mechanism, which
returns a Hot Plug Event message fixed part indicating Platform
Resource Reassignment. In response to the Hot Plug Event message,
we must call ibm,update-nodes to determine which resources were
reassigned and then ibm,update-properties to obtain the new affinity
information about those resources.
The PRRN event-scan RTAS message contains only the fixed part with
the Type field set to the value 160 and no Extended Event Log. The
four-byte Extended Event Log Length field is re-purposed (since no
Extended Event Log message is included) to pass the scope parameter
that causes the ibm,update-nodes to return the nodes affected by the
specific resource reassignment.
This patch adds a handler for RTAS events. The function
pseries_devicetree_update() (from mobility.c) is used to make the
ibm,update-nodes/ibm,update-properties RTAS calls. Updating the NUMA maps
(handled by a subsequent patch) will require significant processing,
so pseries_devicetree_update() is called from an asynchronous workqueue
to allow event processing to continue.
PRRN RTAS events on pseries systems are rare events that have to be
initiated from the HMC console for the system by an IBM tech. This allows
us to assume that these events are widely spaced. Additionally, all work
on the queue is flushed before handling any new work to ensure we only have
one event in flight being handled at a time.
Signed-off-by: Nathan Fontenot nf...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/rtas.h |2 +
arch/powerpc/kernel/rtasd.c | 46 +++-
2 files changed, 47 insertions(+), 1 deletion(-)
Index: powerpc/arch/powerpc/include/asm/rtas.h
===
--- powerpc.orig/arch/powerpc/include/asm/rtas.h2013-04-23
13:22:37.0 -0500
+++ powerpc/arch/powerpc/include/asm/rtas.h 2013-04-23 13:40:36.0
-0500
@@ -143,6 +143,8 @@
#define RTAS_TYPE_PMGM_TIME_ALARM 0x6f
#define RTAS_TYPE_PMGM_CONFIG_CHANGE 0x70
#define RTAS_TYPE_PMGM_SERVICE_PROC0x71
+/* Platform Resource Reassignment Notification */
+#define RTAS_TYPE_PRRN 0xA0
/* RTAS check-exception vector offset */
#define RTAS_VECTOR_EXTERNAL_INTERRUPT 0x500
Index: powerpc/arch/powerpc/kernel/rtasd.c
===
--- powerpc.orig/arch/powerpc/kernel/rtasd.c2013-04-23 12:54:23.0
-0500
+++ powerpc/arch/powerpc/kernel/rtasd.c 2013-04-23 13:52:08.0 -0500
@@ -87,6 +87,8 @@
return Resource Deallocation Event;
case RTAS_TYPE_DUMP:
return Dump Notification Event;
+ case RTAS_TYPE_PRRN:
+ return Platform Resource Reassignment Event;
}
return rtas_type[0];
@@ -265,9 +267,49 @@
spin_unlock_irqrestore(rtasd_log_lock, s);
return;
}
+}
+
+#ifdef CONFIG_PPC_PSERIES
+static s32 prrn_update_scope;
+
+static void prrn_work_fn(struct work_struct *work)
+{
+ /*
+* For PRRN, we must pass the negative of the scope value in
+* the RTAS event.
+*/
+ pseries_devicetree_update(-prrn_update_scope);
+}
+
+static DECLARE_WORK(prrn_work, prrn_work_fn);
+
+void prrn_schedule_update(u32 scope)
+{
+ flush_work(prrn_work);
+ prrn_update_scope = scope;
+ schedule_work(prrn_work);
+}
+
+static void handle_rtas_event(const struct rtas_error_log *log)
+{
+ if (log-type == RTAS_TYPE_PRRN)
+ /* For PRRN Events the extended log length is used to denote
+* the scope for calling rtas update-nodes.
+*/
+ prrn_schedule_update(log-extended_log_length);
+
+ return;
+}
+
+#else
+static void handle_rtas_event(const struct rtas_error_log *log)
+{
+ return;
}
+#endif
+
static int rtas_log_open(struct inode * inode, struct file * file)
{
return 0;
@@ -388,8 +430,10 @@
break;
}
- if (error == 0)
+ if (error == 0) {
pSeries_log_error(logdata, ERR_TYPE_RTAS_LOG, 0);
+ handle_rtas_event((struct rtas_error_log *)logdata);
+ }
} while(error == 0);
}
___
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[PATCH v4 2/13] Correct buffer parsing in update_dt_node()
Correct parsing of the buffer returned from ibm,update-properties. The first
element is a length and the path to the property which is slightly different
from the list of properties in the buffer so we need to specifically
handle this.
Signed-off-by: Nathan Fontenot nf...@linux.vnet.ibm.com
---
arch/powerpc/platforms/pseries/mobility.c | 20
1 file changed, 16 insertions(+), 4 deletions(-)
Index: powerpc/arch/powerpc/platforms/pseries/mobility.c
===
--- powerpc.orig/arch/powerpc/platforms/pseries/mobility.c 2013-04-23
13:22:05.0 -0500
+++ powerpc/arch/powerpc/platforms/pseries/mobility.c 2013-04-23
13:39:36.0 -0500
@@ -134,6 +134,7 @@
char *prop_data;
char *rtas_buf;
int update_properties_token;
+ u32 vd;
update_properties_token = rtas_token(ibm,update-properties);
if (update_properties_token == RTAS_UNKNOWN_SERVICE)
@@ -160,13 +161,24 @@
prop_data = rtas_buf + sizeof(*upwa);
- for (i = 0; i upwa-nprops; i++) {
+ /* The first element of the buffer is the path of the node
+* being updated in the form of a 8 byte string length
+* followed by the string. Skip past this to get to the
+* properties being updated.
+*/
+ vd = *prop_data++;
+ prop_data += vd;
+
+ /* The path we skipped over is counted as one of the elements
+* returned so start counting at one.
+*/
+ for (i = 1; i upwa-nprops; i++) {
char *prop_name;
- u32 vd;
- prop_name = prop_data + 1;
+ prop_name = prop_data;
prop_data += strlen(prop_name) + 1;
- vd = *prop_data++;
+ vd = *(u32 *)prop_data;
+ prop_data += sizeof(vd);
switch (vd) {
case 0x:
___
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[PATCH v4 4/13] Move architecture vector definitions to prom.h
As part of handling of PRRN events we need to check vector 5 of the architecture vector bits reported in the device tree to ensure PRRN event handling is enabled. To do this firmware_has_feature() is updated (in a subsequent patch) to make this check vector 5 bits. To avoid having to re-define bits in the architecture vector the bit definitions are moved to prom.h. Signed-off-by: Nathan Fontenot nf...@linux.vnet.ibm.com --- arch/powerpc/include/asm/prom.h | 71 + arch/powerpc/kernel/prom_init.c | 75 +++- 2 files changed, 77 insertions(+), 69 deletions(-) Index: powerpc/arch/powerpc/include/asm/prom.h === --- powerpc.orig/arch/powerpc/include/asm/prom.h2013-04-23 12:54:23.0 -0500 +++ powerpc/arch/powerpc/include/asm/prom.h 2013-04-23 13:56:15.0 -0500 @@ -74,6 +74,77 @@ #define DRCONF_MEM_AI_INVALID 0x0040 #define DRCONF_MEM_RESERVED0x0080 +/* + * There are two methods for telling firmware what our capabilities are. + * Newer machines have an ibm,client-architecture-support method on the + * root node. For older machines, we have to call the process-elf-header + * method in the /packages/elf-loader node, passing it a fake 32-bit + * ELF header containing a couple of PT_NOTE sections that contain + * structures that contain various information. + */ + +/* New method - extensible architecture description vector. */ + +/* Option vector bits - generic bits in byte 1 */ +#define OV_IGNORE 0x80/* ignore this vector */ +#define OV_CESSATION_POLICY0x40/* halt if unsupported option present*/ + +/* Option vector 1: processor architectures supported */ +#define OV1_PPC_2_00 0x80/* set if we support PowerPC 2.00 */ +#define OV1_PPC_2_01 0x40/* set if we support PowerPC 2.01 */ +#define OV1_PPC_2_02 0x20/* set if we support PowerPC 2.02 */ +#define OV1_PPC_2_03 0x10/* set if we support PowerPC 2.03 */ +#define OV1_PPC_2_04 0x08/* set if we support PowerPC 2.04 */ +#define OV1_PPC_2_05 0x04/* set if we support PowerPC 2.05 */ +#define OV1_PPC_2_06 0x02/* set if we support PowerPC 2.06 */ +#define OV1_PPC_2_07 0x01/* set if we support PowerPC 2.07 */ + +/* Option vector 2: Open Firmware options supported */ +#define OV2_REAL_MODE 0x20/* set if we want OF in real mode */ + +/* Option vector 3: processor options supported */ +#define OV3_FP 0x80/* floating point */ +#define OV3_VMX0x40/* VMX/Altivec */ +#define OV3_DFP0x20/* decimal FP */ + +/* Option vector 4: IBM PAPR implementation */ +#define OV4_MIN_ENT_CAP0x01/* minimum VP entitled capacity */ + +/* Option vector 5: PAPR/OF options supported */ +#define OV5_LPAR 0x80/* logical partitioning supported */ +#define OV5_SPLPAR 0x40/* shared-processor LPAR supported */ +/* ibm,dynamic-reconfiguration-memory property supported */ +#define OV5_DRCONF_MEMORY 0x20 +#define OV5_LARGE_PAGES0x10/* large pages supported */ +#define OV5_DONATE_DEDICATE_CPU0x02/* donate dedicated CPU support */ +/* PCIe/MSI support. Without MSI full PCIe is not supported */ +#ifdef CONFIG_PCI_MSI +#define OV5_MSI0x01/* PCIe/MSI support */ +#else +#define OV5_MSI0x00 +#endif /* CONFIG_PCI_MSI */ +#ifdef CONFIG_PPC_SMLPAR +#define OV5_CMO0x80/* Cooperative Memory Overcommitment */ +#define OV5_XCMO 0x40/* Page Coalescing */ +#else +#define OV5_CMO0x00 +#define OV5_XCMO 0x00 +#endif +#define OV5_TYPE1_AFFINITY 0x80/* Type 1 NUMA affinity */ +#define OV5_PFO_HW_RNG 0x80/* PFO Random Number Generator */ +#define OV5_PFO_HW_842 0x40/* PFO Compression Accelerator */ +#define OV5_PFO_HW_ENCR0x20/* PFO Encryption Accelerator */ +#define OV5_SUB_PROCESSORS 0x01/* 1,2,or 4 Sub-Processors supported */ + +/* Option Vector 6: IBM PAPR hints */ +#define OV6_LINUX 0x02/* Linux is our OS */ + +/* + * The architecture vector has an array of PVR mask/value pairs, + * followed by # option vectors - 1, followed by the option vectors. + */ +extern unsigned char ibm_architecture_vec[]; + /* These includes are put at the bottom because they may contain things * that are overridden by this file. Ideally they shouldn't be included * by this file, but there are a bunch of .c files that currently depend Index: powerpc/arch/powerpc/kernel/prom_init.c === --- powerpc.orig/arch/powerpc/kernel/prom_init.c2013-04-23 12:54:23.0 -0500
[PATCH v4 5/13] Use ARRAY_SIZE to iterate over firmware_features_table array
When iterating over the entries in firmware_features_table we only need
to go over the actual number of entries in the array instead of declaring
it to be bigger and checking to make sure there is a valid entry in every
slot.
This patch removes the FIRMWARE_MAX_FEATURES #define and replaces the
array looping with the use of ARRAY_SIZE().
Signed-off-by: Nathan Fontenot nf...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/firmware.h |1 -
arch/powerpc/platforms/pseries/firmware.c |8 +++-
2 files changed, 3 insertions(+), 6 deletions(-)
Index: powerpc/arch/powerpc/include/asm/firmware.h
===
--- powerpc.orig/arch/powerpc/include/asm/firmware.h2013-04-23
14:17:16.0 -0500
+++ powerpc/arch/powerpc/include/asm/firmware.h 2013-04-23 14:19:54.0
-0500
@@ -18,7 +18,6 @@
#include asm/feature-fixups.h
/* firmware feature bitmask values */
-#define FIRMWARE_MAX_FEATURES 63
#define FW_FEATURE_PFT ASM_CONST(0x0001)
#define FW_FEATURE_TCE ASM_CONST(0x0002)
Index: powerpc/arch/powerpc/platforms/pseries/firmware.c
===
--- powerpc.orig/arch/powerpc/platforms/pseries/firmware.c 2013-04-23
14:17:16.0 -0500
+++ powerpc/arch/powerpc/platforms/pseries/firmware.c 2013-04-23
14:46:10.0 -0500
@@ -39,7 +39,7 @@
* string must match.
*/
static __initdata firmware_feature_t
-firmware_features_table[FIRMWARE_MAX_FEATURES] = {
+firmware_features_table[] = {
{FW_FEATURE_PFT,hcall-pft},
{FW_FEATURE_TCE,hcall-tce},
{FW_FEATURE_SPRG0, hcall-sprg0},
@@ -77,12 +77,10 @@
pr_debug( - fw_feature_init()\n);
for (s = hypertas; s hypertas + len; s += strlen(s) + 1) {
- for (i = 0; i FIRMWARE_MAX_FEATURES; i++) {
+ for (i = 0; i ARRAY_SIZE(firmware_features_table); i++) {
const char *name = firmware_features_table[i].name;
size_t size;
- /* check value against table of strings */
- if (!name)
- continue;
+
/*
* If there is a '*' at the end of name, only check
* upto there
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[PATCH v4 6/13] Update firmware_has_feature() to check architecture vector 5 bits
The firmware_has_feature() function makes it easy to check for supported features of the hypervisor. This patch extends the capability of firmware_has_feature() to include checking for specified bits in vector 5 of the architecture vector as reported in the device tree. As part of this the #defines used for the architecture vector are re-defined such that each option has the index into vector 5 and the feature bit encoded into it. This makes checking for architecture bits when initiating data for firmware_has_feature much easier. Signed-off-by: Nathan Fontenot nf...@linux.vnet.ibm.com --- arch/powerpc/include/asm/firmware.h |4 +- arch/powerpc/include/asm/prom.h | 45 --- arch/powerpc/kernel/prom_init.c | 23 ++ arch/powerpc/platforms/pseries/firmware.c | 49 +++--- arch/powerpc/platforms/pseries/pseries.h |5 ++- arch/powerpc/platforms/pseries/setup.c| 40 6 files changed, 111 insertions(+), 55 deletions(-) Index: powerpc/arch/powerpc/include/asm/prom.h === --- powerpc.orig/arch/powerpc/include/asm/prom.h2013-04-23 14:17:16.0 -0500 +++ powerpc/arch/powerpc/include/asm/prom.h 2013-04-23 14:46:23.0 -0500 @@ -110,31 +110,28 @@ /* Option vector 4: IBM PAPR implementation */ #define OV4_MIN_ENT_CAP0x01/* minimum VP entitled capacity */ -/* Option vector 5: PAPR/OF options supported */ -#define OV5_LPAR 0x80/* logical partitioning supported */ -#define OV5_SPLPAR 0x40/* shared-processor LPAR supported */ +/* Option vector 5: PAPR/OF options supported + * These bits are also used in firmware_has_feature() to validate + * the capabilities reported for vector 5 in the device tree so we + * encode the vector index in the define and use the OV5_FEAT() + * and OV5_INDX() macros to extract the desired information. + */ +#define OV5_FEAT(x)((x) 0xff) +#define OV5_INDX(x)((x) 8) +#define OV5_LPAR 0x0280 /* logical partitioning supported */ +#define OV5_SPLPAR 0x0240 /* shared-processor LPAR supported */ /* ibm,dynamic-reconfiguration-memory property supported */ -#define OV5_DRCONF_MEMORY 0x20 -#define OV5_LARGE_PAGES0x10/* large pages supported */ -#define OV5_DONATE_DEDICATE_CPU0x02/* donate dedicated CPU support */ -/* PCIe/MSI support. Without MSI full PCIe is not supported */ -#ifdef CONFIG_PCI_MSI -#define OV5_MSI0x01/* PCIe/MSI support */ -#else -#define OV5_MSI0x00 -#endif /* CONFIG_PCI_MSI */ -#ifdef CONFIG_PPC_SMLPAR -#define OV5_CMO0x80/* Cooperative Memory Overcommitment */ -#define OV5_XCMO 0x40/* Page Coalescing */ -#else -#define OV5_CMO0x00 -#define OV5_XCMO 0x00 -#endif -#define OV5_TYPE1_AFFINITY 0x80/* Type 1 NUMA affinity */ -#define OV5_PFO_HW_RNG 0x80/* PFO Random Number Generator */ -#define OV5_PFO_HW_842 0x40/* PFO Compression Accelerator */ -#define OV5_PFO_HW_ENCR0x20/* PFO Encryption Accelerator */ -#define OV5_SUB_PROCESSORS 0x01/* 1,2,or 4 Sub-Processors supported */ +#define OV5_DRCONF_MEMORY 0x0220 +#define OV5_LARGE_PAGES0x0210 /* large pages supported */ +#define OV5_DONATE_DEDICATE_CPU0x0202 /* donate dedicated CPU support */ +#define OV5_MSI0x0201 /* PCIe/MSI support */ +#define OV5_CMO0x0480 /* Cooperative Memory Overcommitment */ +#define OV5_XCMO 0x0440 /* Page Coalescing */ +#define OV5_TYPE1_AFFINITY 0x0580 /* Type 1 NUMA affinity */ +#define OV5_PFO_HW_RNG 0x0E80 /* PFO Random Number Generator */ +#define OV5_PFO_HW_842 0x0E40 /* PFO Compression Accelerator */ +#define OV5_PFO_HW_ENCR0x0E20 /* PFO Encryption Accelerator */ +#define OV5_SUB_PROCESSORS 0x0F01 /* 1,2,or 4 Sub-Processors supported */ /* Option Vector 6: IBM PAPR hints */ #define OV6_LINUX 0x02/* Linux is our OS */ Index: powerpc/arch/powerpc/kernel/prom_init.c === --- powerpc.orig/arch/powerpc/kernel/prom_init.c2013-04-23 14:17:16.0 -0500 +++ powerpc/arch/powerpc/kernel/prom_init.c 2013-04-23 14:46:23.0 -0500 @@ -684,11 +684,21 @@ /* option vector 5: PAPR/OF options */ 19 - 2, /* length */ 0, /* don't ignore, don't halt */ - OV5_LPAR | OV5_SPLPAR | OV5_LARGE_PAGES | OV5_DRCONF_MEMORY | - OV5_DONATE_DEDICATE_CPU | OV5_MSI, + OV5_FEAT(OV5_LPAR) | OV5_FEAT(OV5_SPLPAR) | OV5_FEAT(OV5_LARGE_PAGES) | +
[PATCH v4 7/13] Update numa.c to use updated firmware_has_feature()
Update the numa code to use the updated firmware_has_feature() when checking
for type 1 affinity.
Signed-off-by: Nathan Fontenot nf...@linux.vnet.ibm.com
---
arch/powerpc/mm/numa.c | 22 +++---
1 file changed, 3 insertions(+), 19 deletions(-)
Index: powerpc/arch/powerpc/mm/numa.c
===
--- powerpc.orig/arch/powerpc/mm/numa.c 2013-04-23 12:54:23.0 -0500
+++ powerpc/arch/powerpc/mm/numa.c 2013-04-23 15:19:15.0 -0500
@@ -291,9 +291,7 @@
static int __init find_min_common_depth(void)
{
int depth;
- struct device_node *chosen;
struct device_node *root;
- const char *vec5;
if (firmware_has_feature(FW_FEATURE_OPAL))
root = of_find_node_by_path(/ibm,opal);
@@ -325,24 +323,10 @@
distance_ref_points_depth /= sizeof(int);
-#define VEC5_AFFINITY_BYTE 5
-#define VEC5_AFFINITY 0x80
-
- if (firmware_has_feature(FW_FEATURE_OPAL))
+ if (firmware_has_feature(FW_FEATURE_OPAL) ||
+ firmware_has_feature(FW_FEATURE_TYPE1_AFFINITY)) {
+ dbg(Using form 1 affinity\n);
form1_affinity = 1;
- else {
- chosen = of_find_node_by_path(/chosen);
- if (chosen) {
- vec5 = of_get_property(chosen,
- ibm,architecture-vec-5, NULL);
- if (vec5 (vec5[VEC5_AFFINITY_BYTE]
- VEC5_AFFINITY)) {
- dbg(Using form 1 affinity\n);
- form1_affinity = 1;
- }
-
- of_node_put(chosen);
- }
}
if (form1_affinity) {
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[PATCH v4 8/13] Update CPU maps when device tree is updated
From: Jesse Larrew jlar...@linux.vnet.ibm.com
Platform events such as partition migration or the new PRRN firmware
feature can cause the NUMA characteristics of a CPU to change, and these
changes will be reflected in the device tree nodes for the affected
CPUs.
This patch registers a handler for Open Firmware device tree updates
and reconfigures the CPU and node maps whenever the associativity
changes. Currently, this is accomplished by marking the affected CPUs in
the cpu_associativity_changes_mask and allowing
arch_update_cpu_topology() to retrieve the new associativity information
using hcall_vphn().
Protecting the NUMA cpu maps from concurrent access during an update
operation will be addressed in a subsequent patch in this series.
Signed-off-by: Nathan Fontenot nf...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/firmware.h |3
arch/powerpc/include/asm/prom.h |1
arch/powerpc/mm/numa.c| 99 ++
arch/powerpc/platforms/pseries/firmware.c |1
4 files changed, 79 insertions(+), 25 deletions(-)
Index: powerpc/arch/powerpc/include/asm/prom.h
===
--- powerpc.orig/arch/powerpc/include/asm/prom.h2013-04-23
14:46:23.0 -0500
+++ powerpc/arch/powerpc/include/asm/prom.h 2013-04-23 15:20:18.0
-0500
@@ -128,6 +128,7 @@
#define OV5_CMO0x0480 /* Cooperative Memory
Overcommitment */
#define OV5_XCMO 0x0440 /* Page Coalescing */
#define OV5_TYPE1_AFFINITY 0x0580 /* Type 1 NUMA affinity */
+#define OV5_PRRN 0x0540 /* Platform Resource Reassignment */
#define OV5_PFO_HW_RNG 0x0E80 /* PFO Random Number Generator */
#define OV5_PFO_HW_842 0x0E40 /* PFO Compression Accelerator */
#define OV5_PFO_HW_ENCR0x0E20 /* PFO Encryption Accelerator */
Index: powerpc/arch/powerpc/mm/numa.c
===
--- powerpc.orig/arch/powerpc/mm/numa.c 2013-04-23 15:19:15.0 -0500
+++ powerpc/arch/powerpc/mm/numa.c 2013-04-23 15:20:18.0 -0500
@@ -1257,7 +1257,8 @@
static u8 vphn_cpu_change_counts[NR_CPUS][MAX_DISTANCE_REF_POINTS];
static cpumask_t cpu_associativity_changes_mask;
static int vphn_enabled;
-static void set_topology_timer(void);
+static int prrn_enabled;
+static void reset_topology_timer(void);
/*
* Store the current values of the associativity change counters in the
@@ -1293,11 +1294,9 @@
*/
static int update_cpu_associativity_changes_mask(void)
{
- int cpu, nr_cpus = 0;
+ int cpu;
cpumask_t *changes = cpu_associativity_changes_mask;
- cpumask_clear(changes);
-
for_each_possible_cpu(cpu) {
int i, changed = 0;
u8 *counts = vphn_cpu_change_counts[cpu];
@@ -1311,11 +1310,10 @@
}
if (changed) {
cpumask_set_cpu(cpu, changes);
- nr_cpus++;
}
}
- return nr_cpus;
+ return cpumask_weight(changes);
}
/*
@@ -1416,7 +1414,7 @@
unsigned int associativity[VPHN_ASSOC_BUFSIZE] = {0};
struct device *dev;
- for_each_cpu(cpu,cpu_associativity_changes_mask) {
+ for_each_cpu(cpu, cpu_associativity_changes_mask) {
vphn_get_associativity(cpu, associativity);
nid = associativity_to_nid(associativity);
@@ -1438,6 +1436,7 @@
dev = get_cpu_device(cpu);
if (dev)
kobject_uevent(dev-kobj, KOBJ_CHANGE);
+ cpumask_clear_cpu(cpu, cpu_associativity_changes_mask);
changed = 1;
}
@@ -1457,37 +1456,80 @@
static void topology_timer_fn(unsigned long ignored)
{
- if (!vphn_enabled)
- return;
- if (update_cpu_associativity_changes_mask() 0)
+ if (prrn_enabled cpumask_weight(cpu_associativity_changes_mask))
topology_schedule_update();
- set_topology_timer();
+ else if (vphn_enabled) {
+ if (update_cpu_associativity_changes_mask() 0)
+ topology_schedule_update();
+ reset_topology_timer();
+ }
}
static struct timer_list topology_timer =
TIMER_INITIALIZER(topology_timer_fn, 0, 0);
-static void set_topology_timer(void)
+static void reset_topology_timer(void)
{
topology_timer.data = 0;
topology_timer.expires = jiffies + 60 * HZ;
- add_timer(topology_timer);
+ mod_timer(topology_timer, topology_timer.expires);
+}
+
+static void stage_topology_update(int core_id)
+{
+ cpumask_or(cpu_associativity_changes_mask,
+ cpu_associativity_changes_mask, cpu_sibling_mask(core_id));
+ reset_topology_timer();
}
+static int dt_update_callback(struct notifier_block *nb,
+
[PATCH v4 9/13] Use stop machine to update cpu maps
The new PRRN firmware feature allows CPU and memory resources to be
transparently reassigned across NUMA boundaries. When this happens, the
kernel must update the node maps to reflect the new affinity information.
Although the NUMA maps can be protected by locking primitives during the
update itself, this is insufficient to prevent concurrent accesses to these
structures. Since cpumask_of_node() hands out a pointer to these
structures, they can still be modified outside of the lock. Furthermore,
tracking down each usage of these pointers and adding locks would be quite
invasive and difficult to maintain.
The approach used is to make a list of affected cpus and call stop_machine
to have the update routine run on each of the affected cpus allowing them
to update themselves. Each cpu finds itself in the list of cpus and makes
the appropriate updates. We need to have each cpu do this for themselves to
handle calls to vdso_getcpu_init() added in a subsequent patch.
Situations like these are best handled using stop_machine(). Since the NUMA
affinity updates are exceptionally rare events, this approach has the
benefit of not adding any overhead while accessing the NUMA maps during
normal operation.
Signed-off-by: Nathan Fontenot nf...@linux.vnet.ibm.com
---
arch/powerpc/mm/numa.c | 82 ++---
1 file changed, 64 insertions(+), 18 deletions(-)
Index: powerpc/arch/powerpc/mm/numa.c
===
--- powerpc.orig/arch/powerpc/mm/numa.c 2013-04-23 15:20:18.0 -0500
+++ powerpc/arch/powerpc/mm/numa.c 2013-04-23 15:26:54.0 -0500
@@ -22,6 +22,7 @@
#include linux/pfn.h
#include linux/cpuset.h
#include linux/node.h
+#include linux/stop_machine.h
#include asm/sparsemem.h
#include asm/prom.h
#include asm/smp.h
@@ -1254,6 +1255,13 @@
/* Virtual Processor Home Node (VPHN) support */
#ifdef CONFIG_PPC_SPLPAR
+struct topology_update_data {
+ struct topology_update_data *next;
+ unsigned int cpu;
+ int old_nid;
+ int new_nid;
+};
+
static u8 vphn_cpu_change_counts[NR_CPUS][MAX_DISTANCE_REF_POINTS];
static cpumask_t cpu_associativity_changes_mask;
static int vphn_enabled;
@@ -1405,41 +1413,79 @@
}
/*
+ * Update the CPU maps and sysfs entries for a single CPU when its NUMA
+ * characteristics change. This function doesn't perform any locking and is
+ * only safe to call from stop_machine().
+ */
+static int update_cpu_topology(void *data)
+{
+ struct topology_update_data *update;
+ unsigned long cpu;
+
+ if (!data)
+ return -EINVAL;
+
+ cpu = get_cpu();
+
+ for (update = data; update; update = update-next) {
+ if (cpu != update-cpu)
+ continue;
+
+ unregister_cpu_under_node(update-cpu, update-old_nid);
+ unmap_cpu_from_node(update-cpu);
+ map_cpu_to_node(update-cpu, update-new_nid);
+ register_cpu_under_node(update-cpu, update-new_nid);
+ }
+
+ return 0;
+}
+
+/*
* Update the node maps and sysfs entries for each cpu whose home node
* has changed. Returns 1 when the topology has changed, and 0 otherwise.
*/
int arch_update_cpu_topology(void)
{
- int cpu, nid, old_nid, changed = 0;
+ unsigned int cpu, changed = 0;
+ struct topology_update_data *updates, *ud;
unsigned int associativity[VPHN_ASSOC_BUFSIZE] = {0};
struct device *dev;
+ int weight, i = 0;
+
+ weight = cpumask_weight(cpu_associativity_changes_mask);
+ if (!weight)
+ return 0;
+
+ updates = kzalloc(weight * (sizeof(*updates)), GFP_KERNEL);
+ if (!updates)
+ return 0;
for_each_cpu(cpu, cpu_associativity_changes_mask) {
+ ud = updates[i++];
+ ud-cpu = cpu;
vphn_get_associativity(cpu, associativity);
- nid = associativity_to_nid(associativity);
+ ud-new_nid = associativity_to_nid(associativity);
- if (nid 0 || !node_online(nid))
- nid = first_online_node;
+ if (ud-new_nid 0 || !node_online(ud-new_nid))
+ ud-new_nid = first_online_node;
- old_nid = numa_cpu_lookup_table[cpu];
+ ud-old_nid = numa_cpu_lookup_table[cpu];
- /* Disable hotplug while we update the cpu
-* masks and sysfs.
-*/
- get_online_cpus();
- unregister_cpu_under_node(cpu, old_nid);
- unmap_cpu_from_node(cpu);
- map_cpu_to_node(cpu, nid);
- register_cpu_under_node(cpu, nid);
- put_online_cpus();
+ if (i weight)
+ ud-next = updates[i];
+ }
+
+ stop_machine(update_cpu_topology, updates[0], cpu_online_mask);
- dev =
[PATCH v4 10/13] Update NUMA VDSO information when updating CPU maps
From: Jesse Larrew jlar...@linux.vnet.ibm.com
The following patch adds vdso_getcpu_init(), which stores the NUMA node for
a cpu in SPRG3:
Commit 18ad51dd34 (powerpc: Add VDSO version of getcpu) adds
vdso_getcpu_init(), which stores the NUMA node for a cpu in SPRG3.
This patch ensures that this information is also updated when the NUMA
affinity of a cpu changes.
Signed-off-by: Nathan Fontenot nf...@linux.vnet.ibm.com
---
arch/powerpc/mm/numa.c |8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
Index: powerpc/arch/powerpc/mm/numa.c
===
--- powerpc.orig/arch/powerpc/mm/numa.c 2013-04-23 15:26:54.0 -0500
+++ powerpc/arch/powerpc/mm/numa.c 2013-04-23 15:28:21.0 -0500
@@ -30,6 +30,7 @@
#include asm/paca.h
#include asm/hvcall.h
#include asm/setup.h
+#include asm/vdso.h
static int numa_enabled = 1;
@@ -1434,6 +1435,7 @@
unregister_cpu_under_node(update-cpu, update-old_nid);
unmap_cpu_from_node(update-cpu);
map_cpu_to_node(update-cpu, update-new_nid);
+ vdso_getcpu_init();
register_cpu_under_node(update-cpu, update-new_nid);
}
@@ -1449,6 +1451,7 @@
unsigned int cpu, changed = 0;
struct topology_update_data *updates, *ud;
unsigned int associativity[VPHN_ASSOC_BUFSIZE] = {0};
+ cpumask_t updated_cpus;
struct device *dev;
int weight, i = 0;
@@ -1460,6 +1463,8 @@
if (!updates)
return 0;
+ cpumask_clear(updated_cpus);
+
for_each_cpu(cpu, cpu_associativity_changes_mask) {
ud = updates[i++];
ud-cpu = cpu;
@@ -1470,12 +1475,13 @@
ud-new_nid = first_online_node;
ud-old_nid = numa_cpu_lookup_table[cpu];
+ cpumask_set_cpu(cpu, updated_cpus);
if (i weight)
ud-next = updates[i];
}
- stop_machine(update_cpu_topology, updates[0], cpu_online_mask);
+ stop_machine(update_cpu_topology, updates[0], updated_cpus);
for (ud = updates[0]; ud; ud = ud-next) {
dev = get_cpu_device(ud-cpu);
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[PATCH v4 11/13] RE-enable Virtual Processor Home Node updating
From: Jesse Larrew jlar...@linux.vnet.ibm.com
The new PRRN firmware feature provides a more convenient and event-driven
interface than VPHN for notifying Linux of changes to the NUMA affinity of
platform resources. However, for practical reasons, it may not be feasible
for some customers to update to the latest firmware. For these customers,
the VPHN feature supported on previous firmware versions may still be the
best option.
The VPHN feature was previously disabled due to races with the load
balancing code when accessing the NUMA cpu maps, but the new stop_machine()
approach protects the NUMA cpu maps from these concurrent accesses. It
should be safe to re-enable this feature now.
Signed-off-by: Nathan Fontenot nf...@linux.vnet.ibm.com
---
arch/powerpc/mm/numa.c |3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
Index: powerpc/arch/powerpc/mm/numa.c
===
--- powerpc.orig/arch/powerpc/mm/numa.c 2013-04-23 15:28:21.0 -0500
+++ powerpc/arch/powerpc/mm/numa.c 2013-04-23 15:29:39.0 -0500
@@ -1572,9 +1572,8 @@
vphn_enabled = 0;
rc = of_reconfig_notifier_register(dt_update_nb);
}
- } else if (0 firmware_has_feature(FW_FEATURE_VPHN)
+ } else if (firmware_has_feature(FW_FEATURE_VPHN)
get_lppaca()-shared_proc) {
- /* Disabled until races with load balancing are fixed */
if (!vphn_enabled) {
prrn_enabled = 0;
vphn_enabled = 1;
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[PATCH v4 13/13] Add /proc interface to control topology updates
There are instances in which we do not want topology updates to occur.
In order to allow this a /proc interface (/proc/powerpc/topology_updates)
is introduced so that topology updates can be enabled and disabled.
This patch also adds a prrn_is_enabled() call so that PRRN events are
handled in the kernel only if topology updating is enabled.
Signed-off-by: Nathan Fontenot nf...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/topology.h |5 ++
arch/powerpc/kernel/rtasd.c |7 ++--
arch/powerpc/mm/numa.c | 62 +++-
3 files changed, 71 insertions(+), 3 deletions(-)
Index: powerpc/arch/powerpc/mm/numa.c
===
--- powerpc.orig/arch/powerpc/mm/numa.c 2013-04-23 15:29:39.0 -0500
+++ powerpc/arch/powerpc/mm/numa.c 2013-04-23 19:30:33.0 -0500
@@ -23,6 +23,9 @@
#include linux/cpuset.h
#include linux/node.h
#include linux/stop_machine.h
+#include linux/proc_fs.h
+#include linux/seq_file.h
+#include linux/uaccess.h
#include asm/sparsemem.h
#include asm/prom.h
#include asm/smp.h
@@ -1585,7 +1588,6 @@
return rc;
}
-__initcall(start_topology_update);
/*
* Disable polling for VPHN associativity changes.
@@ -1604,4 +1606,62 @@
return rc;
}
+
+int prrn_is_enabled(void)
+{
+ return prrn_enabled;
+}
+
+static int topology_read(struct seq_file *file, void *v)
+{
+ if (vphn_enabled || prrn_enabled)
+ seq_puts(file, on\n);
+ else
+ seq_puts(file, off\n);
+
+ return 0;
+}
+
+static int topology_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, topology_read, NULL);
+}
+
+static ssize_t topology_write(struct file *file, const char __user *buf,
+ size_t count, loff_t *off)
+{
+ char kbuf[4]; /* on or off plus null. */
+ int read_len;
+
+ read_len = count 3 ? count : 3;
+ if (copy_from_user(kbuf, buf, read_len))
+ return -EINVAL;
+
+ kbuf[read_len] = '\0';
+
+ if (!strncmp(kbuf, on, 2))
+ start_topology_update();
+ else if (!strncmp(kbuf, off, 3))
+ stop_topology_update();
+ else
+ return -EINVAL;
+
+ return count;
+}
+
+static const struct file_operations topology_ops = {
+ .read = seq_read,
+ .write = topology_write,
+ .open = topology_open,
+ .release = single_release
+};
+
+static int topology_update_init(void)
+{
+ start_topology_update();
+ proc_create(powerpc/topology_updates, 644, NULL, topology_ops);
+
+ return 0;
+}
+device_initcall(topology_update_init);
#endif /* CONFIG_PPC_SPLPAR */
Index: powerpc/arch/powerpc/include/asm/topology.h
===
--- powerpc.orig/arch/powerpc/include/asm/topology.h2013-04-23
12:54:22.0 -0500
+++ powerpc/arch/powerpc/include/asm/topology.h 2013-04-23 19:31:57.0
-0500
@@ -71,6 +71,7 @@
#if defined(CONFIG_NUMA) defined(CONFIG_PPC_SPLPAR)
extern int start_topology_update(void);
extern int stop_topology_update(void);
+extern int prrn_is_enabled(void);
#else
static inline int start_topology_update(void)
{
@@ -80,6 +81,10 @@
{
return 0;
}
+static inline int prrn_is_enabled(void)
+{
+ return 0;
+}
#endif /* CONFIG_NUMA CONFIG_PPC_SPLPAR */
#include asm-generic/topology.h
Index: powerpc/arch/powerpc/kernel/rtasd.c
===
--- powerpc.orig/arch/powerpc/kernel/rtasd.c2013-04-23 13:52:08.0
-0500
+++ powerpc/arch/powerpc/kernel/rtasd.c 2013-04-23 17:47:09.0 -0500
@@ -29,6 +29,7 @@
#include asm/nvram.h
#include linux/atomic.h
#include asm/machdep.h
+#include asm/topology.h
static DEFINE_SPINLOCK(rtasd_log_lock);
@@ -292,11 +293,13 @@
static void handle_rtas_event(const struct rtas_error_log *log)
{
- if (log-type == RTAS_TYPE_PRRN)
+ if (log-type == RTAS_TYPE_PRRN) {
/* For PRRN Events the extended log length is used to denote
* the scope for calling rtas update-nodes.
*/
- prrn_schedule_update(log-extended_log_length);
+ if (prrn_is_enabled())
+ prrn_schedule_update(log-extended_log_length);
+ }
return;
}
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[PATCH v4 12/13] Enable PRRN handling
The Linux kernel and platform firmware negotiate their mutual support of the PRRN option via the ibm,client-architecture-support interface. This patch simply sets the appropriate fields in the client architecture vector to indicate Linux support for PRRN and will allow the firmware to report PRRN events via the RTAS event-scan mechanism. Signed-off-by: Nathan Fontenot nf...@linux.vnet.ibm.com --- arch/powerpc/kernel/prom_init.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Index: powerpc/arch/powerpc/kernel/prom_init.c === --- powerpc.orig/arch/powerpc/kernel/prom_init.c2013-04-23 14:46:23.0 -0500 +++ powerpc/arch/powerpc/kernel/prom_init.c 2013-04-23 15:30:36.0 -0500 @@ -698,7 +698,7 @@ #else 0, #endif - OV5_FEAT(OV5_TYPE1_AFFINITY), + OV5_FEAT(OV5_TYPE1_AFFINITY) | OV5_FEAT(OV5_PRRN), 0, 0, 0, ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc: Add isync to copy_and_flush
On Wed, 2013-04-24 at 20:30 +1000, Michael Neuling wrote: benh: we should get this in 3.9 ASAP. Considering that the bug has been there *forever* I don't think I have a real standing to try to shove it down Linus throat as a regression fix :-) I'll put the fix in 3.10 and let it trickle down to stable. Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc: Add HWCAP2 aux entry
On Tue, 23 Apr 2013 10:41:42 +1000 Benjamin Herrenschmidt b...@kernel.crashing.org wrote: On Thu, 2013-04-18 at 13:41 +1000, Michael Neuling wrote: akpm, If you're happy with this, is it something you can take in your tree? Andrew ? Or give me an ack ? :-) I'm happy to carry this, we need that rather urgently and we have the glibc folks on board. Looks good to me - please proceed with the patch. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 4/7] powerpc/powernv: Patch MSI EOI handler on P8
On Wed, 2013-04-24 at 17:37 +0800, Gavin Shan wrote:
The EOI handler of MSI/MSI-X interrupts for P8 (PHB3) need additional
steps to handle the P/Q bits in IVE before EOIing the corresponding
interrupt. The patch changes the EOI handler to cover that.
.../...
static void pnv_pci_init_ioda_msis(struct pnv_phb *phb)
{
unsigned int count;
@@ -667,6 +681,8 @@ static void pnv_pci_init_ioda_msis(struct pnv_phb *phb)
}
phb-msi_setup = pnv_pci_ioda_msi_setup;
+ if (phb-type == PNV_PHB_IODA2)
+ phb-msi_eoi = pnv_pci_ioda_msi_eoi;
Ouch, another function pointer call in a hot path...
phb-msi32_support = 1;
pr_info( Allocated bitmap for %d MSIs (base IRQ 0x%x)\n,
count, phb-msi_base);
diff --git a/arch/powerpc/platforms/powernv/pci.c
b/arch/powerpc/platforms/powernv/pci.c
index a11b5a6..ea6a93d 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -115,6 +115,25 @@ static void pnv_teardown_msi_irqs(struct pci_dev *pdev)
irq_dispose_mapping(entry-irq);
}
}
+
+int pnv_pci_msi_eoi(unsigned int hw_irq)
+{
+ struct pci_controller *hose, *tmp;
+ struct pnv_phb *phb = NULL;
+
+ list_for_each_entry_safe(hose, tmp, hose_list, list_node) {
+ phb = hose-private_data;
+ if (hw_irq = phb-msi_base
+ hw_irq phb-msi_base + phb-msi_bmp.irq_count) {
+ if (!phb-msi_eoi)
+ return -EEXIST;
+ return phb-msi_eoi(phb, hw_irq);
+ }
+ }
+
+ /* For LSI interrupts, we needn't do it */
+ return 0;
+}
And a list walk ... that's not right.
Also, you do it for all XICS interrupts, including the non-PCI ones, the
LSIs, etc... only to figure out that some might not be MSIs later in
the loop.
Why not instead look at changing the irq_chip for the MSIs ?
IE. When setting up the MSIs for IODA2, use a different irq_chip which
is a copy of the original one with a different -eoi callback, which
does the original xics eoi and then the OPAL stuff ?
You might even be able to use something like container_of to get back
to the struct phb, no need to iterate them all.
Cheers,
Ben.
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Re: [PATCH 5/7] powerpc/powernv: TCE invalidation for PHB3
diff --git a/arch/powerpc/include/asm/iommu.h
b/arch/powerpc/include/asm/iommu.h
index cbfe678..0db308e 100644
--- a/arch/powerpc/include/asm/iommu.h
+++ b/arch/powerpc/include/asm/iommu.h
@@ -76,6 +76,7 @@ struct iommu_table {
struct iommu_pool large_pool;
struct iommu_pool pools[IOMMU_NR_POOLS];
unsigned long *it_map; /* A simple allocation bitmap for now */
+ void *sysdata;
};
You should be able to avoid adding that field by using the container_of
trick to get to the PE and moving the iommu ops for ioda into pci-ioda.c
instead of sharing them with the non-ioda stuff.
Cheers,
Ben.
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Re: [PATCH 1/3] rapidio: make enumeration/discovery configurable
On Wed, 24 Apr 2013 10:31:57 -0400 Alexandre Bounine
alexandre.boun...@idt.com wrote:
Rework to implement RapidIO enumeration/discovery method selection
combined with ability to use enumeration/discovery as a kernel module.
This patch adds ability to introduce new RapidIO enumeration/discovery methods
using kernel configuration options or loadable modules. Configuration option
mechanism allows to select built-in or modular enumeration/discovery method
from
the list of existing methods or use external modules.
If a modular enumeration/discovery is selected each RapidIO mport device can
have its own method attached to it.
The currently existing enumeration/discovery code was updated to be used
as built-in or modular method. This configuration option is named Basic
enumeration/discovery method.
Several common routines have been moved from rio-scan.c to make them available
to other enumeration methods and reduce number of exported symbols.
...
@@ -1421,3 +1295,46 @@ enum_done:
bail:
return -EBUSY;
}
+
+struct rio_scan rio_scan_ops = {
+ .enumerate = rio_enum_mport,
+ .discover = rio_disc_mport,
+};
+
+
+#ifdef MODULE
Why the `ifdef MODULE'? The module parameters are still accessible if
the driver is statically linked and we do want the driver to behave in
the same way regardless of how it was linked and loaded.
+static bool scan;
+module_param(scan, bool, 0);
+MODULE_PARM_DESC(scan, Start RapidIO network enumeration/discovery
+ (default = 1));
+
+/**
+ * rio_basic_attach:
+ *
+ * When this enumeration/discovery method is loaded as a module this function
+ * registers its specific enumeration and discover routines for all available
+ * RapidIO mport devices. The scan command line parameter controls ability
of
+ * the module to start RapidIO enumeration/discovery automatically.
+ *
+ * Returns 0 for success or -EIO if unable to register itself.
+ *
+ * This enumeration/discovery method cannot be unloaded and therefore does
not
+ * provide a matching cleanup_module routine.
+ */
+
+int __init rio_basic_attach(void)
static
+{
+ if (rio_register_scan(RIO_MPORT_ANY, rio_scan_ops))
+ return -EIO;
+ if (scan)
+ rio_init_mports();
+ return 0;
+}
+
+module_init(rio_basic_attach);
+
+MODULE_DESCRIPTION(Basic RapidIO enumeration/discovery);
+MODULE_LICENSE(GPL);
+
+#endif /* MODULE */
diff --git a/drivers/rapidio/rio.c b/drivers/rapidio/rio.c
index d553b5d..e36628a 100644
--- a/drivers/rapidio/rio.c
+++ b/drivers/rapidio/rio.c
@@ -31,6 +31,9 @@
#include rio.h
+LIST_HEAD(rio_devices);
static?
+DEFINE_SPINLOCK(rio_global_list_lock);
static?
+
static LIST_HEAD(rio_mports);
static unsigned char next_portid;
static DEFINE_SPINLOCK(rio_mmap_lock);
...
+/**
+ * rio_switch_init - Sets switch operations for a particular vendor switch
+ * @rdev: RIO device
+ * @do_enum: Enumeration/Discovery mode flag
+ *
+ * Searches the RIO switch ops table for known switch types. If the vid
+ * and did match a switch table entry, then call switch initialization
+ * routine to setup switch-specific routines.
+ */
+void rio_switch_init(struct rio_dev *rdev, int do_enum)
+{
+ struct rio_switch_ops *cur = __start_rio_switch_ops;
+ struct rio_switch_ops *end = __end_rio_switch_ops;
huh, I hadn't noticed that RIO has its very own vmlinux section. How
peculair.
+ while (cur end) {
+ if ((cur-vid == rdev-vid) (cur-did == rdev-did)) {
+ pr_debug(RIO: calling init routine for %s\n,
+ rio_name(rdev));
+ cur-init_hook(rdev, do_enum);
+ break;
+ }
+ cur++;
+ }
+
+ if ((cur = end) (rdev-pef RIO_PEF_STD_RT)) {
+ pr_debug(RIO: adding STD routing ops for %s\n,
+ rio_name(rdev));
+ rdev-rswitch-add_entry = rio_std_route_add_entry;
+ rdev-rswitch-get_entry = rio_std_route_get_entry;
+ rdev-rswitch-clr_table = rio_std_route_clr_table;
+ }
+
+ if (!rdev-rswitch-add_entry || !rdev-rswitch-get_entry)
+ printk(KERN_ERR RIO: missing routing ops for %s\n,
+rio_name(rdev));
+}
+EXPORT_SYMBOL_GPL(rio_switch_init);
...
+int rio_register_scan(int mport_id, struct rio_scan *scan_ops)
+{
+ struct rio_mport *port;
+ int rc = -EBUSY;
+
+ list_for_each_entry(port, rio_mports, node) {
How come the driver has no locking for rio_mports? If a bugfix isn't
needed here then a code comment is!
+ if (port-id == mport_id || mport_id == RIO_MPORT_ANY) {
+ if (port-nscan mport_id == RIO_MPORT_ANY)
+ continue;
+ else if (port-nscan)
+ break;
+
+ port-nscan =
Re: [PATCH -V6 23/27] powerpc: Replace find_linux_pte with find_linux_pte_or_hugepte
On Mon, Apr 22, 2013 at 03:30:57PM +0530, Aneesh Kumar K.V wrote:
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Replace find_linux_pte with find_linux_pte_or_hugepte and explicitly
document why we don't need to handle transparent hugepages at callsites.
diff --git a/arch/powerpc/kvm/book3s_hv_rm_mmu.c
b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
index 19c93ba..aa6a351 100644
--- a/arch/powerpc/kvm/book3s_hv_rm_mmu.c
+++ b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
@@ -24,13 +24,15 @@
/* Translate address of a vmalloc'd thing to a linear map address */
static void *real_vmalloc_addr(void *x)
{
+ unsigned shift;
unsigned long addr = (unsigned long) x;
pte_t *p;
- p = find_linux_pte(swapper_pg_dir, addr);
+ p = find_linux_pte_or_hugepte(swapper_pg_dir, addr, shift);
if (!p || !pte_present(*p))
return NULL;
/* assume we don't have huge pages in vmalloc space... */
+ BUG_ON(shift);
Please don't add BUG_ON in this file. At this point we're basically
still in guest context (though in real mode), and BUG_ON would cause a
trap which we would handle very badly...
Paul.
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Re: [PATCH v2 12/15] powerpc/85xx: add time base sync support for e6500
On 04/24/2013 06:29:29 AM, Zhao Chenhui wrote:
On Tue, Apr 23, 2013 at 07:04:06PM -0500, Scott Wood wrote:
On 04/19/2013 05:47:45 AM, Zhao Chenhui wrote:
From: Chen-Hui Zhao chenhui.z...@freescale.com
For e6500, two threads in one core share one time base. Just need
to do time base sync on first thread of one core, and skip it on
the other thread.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Andy Fleming aflem...@freescale.com
---
arch/powerpc/platforms/85xx/smp.c | 52
+++-
1 files changed, 44 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/smp.c
b/arch/powerpc/platforms/85xx/smp.c
index 74d8cde..5f3eee3 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -26,6 +26,7 @@
#include asm/cacheflush.h
#include asm/dbell.h
#include asm/fsl_guts.h
+#include asm/cputhreads.h
#include sysdev/fsl_soc.h
#include sysdev/mpic.h
@@ -45,6 +46,7 @@ static u64 timebase;
static int tb_req;
static int tb_valid;
static u32 cur_booting_core;
+static bool rcpmv2;
#ifdef CONFIG_PPC_E500MC
/* get a physical mask of online cores and booting core */
@@ -53,26 +55,40 @@ static inline u32 get_phy_cpu_mask(void)
u32 mask;
int cpu;
- mask = 1 cur_booting_core;
- for_each_online_cpu(cpu)
- mask |= 1 get_hard_smp_processor_id(cpu);
+ if (smt_capable()) {
+ /* two threads in one core share one time base */
+ mask = 1 cpu_core_index_of_thread(cur_booting_core);
+ for_each_online_cpu(cpu)
+ mask |= 1 cpu_core_index_of_thread(
+ get_hard_smp_processor_id(cpu));
+ } else {
+ mask = 1 cur_booting_core;
+ for_each_online_cpu(cpu)
+ mask |= 1 get_hard_smp_processor_id(cpu);
+ }
Where is smt_capable defined()? I assume somewhere in the patchset
but it's a pain to search 12 patches...
It is defined in arch/powerpc/include/asm/topology.h.
#define smt_capable() (cpu_has_feature(CPU_FTR_SMT))
Thanks for your review again.
We shouldn't base it on CPU_FTR_SMT. For example, e6500 doesn't claim
that feature yet, except in our SDK kernel. That doesn't change the
topology of CPU numbering.
Is this really about whether we're SMT-capable or whether we have
rcpm v2?
-Scott
I think this if statement can be removed. The
cpu_core_index_of_thread()
can return the correct cpu number with thread or without thread.
Like this:
static inline u32 get_phy_cpu_mask(void)
{
u32 mask;
int cpu;
mask = 1 cpu_core_index_of_thread(cur_booting_core);
for_each_online_cpu(cpu)
mask |= 1 cpu_core_index_of_thread(
get_hard_smp_processor_id(cpu));
return mask;
}
Likewise, this will get it wrong if SMT is disabled or not yet
implemented on a core.
-Scott
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[PATCHv4 0/2] Speed Cap fixes for ppc64
From: Lucas Kannebley Tavares luca...@vnet.linux.ibm.com This patch series does: 1. max_bus_speed is used to set the device to gen2 speeds 2. on power there's no longer a conflict between the pseries call and other architectures, because the overwrite is done via a ppc_md hook 3. radeon is using bus-max_bus_speed instead of drm_pcie_get_speed_cap_mask for gen2 capability detection And I've also added the changes proposed by Michael Ellerman: 1. Corrected Patch 1's comments 2. Moved forward function declarations to pseries.h header 3. Added forward references to struct pci_host_bridge, preventing compilation fails. The first patch consists of some architecture changes, such as adding a hook on powerpc for pci_root_bridge_prepare, so that pseries will initialize it to a function, while all other architectures get a NULL pointer. So that whenever whenever pci_create_root_bus is called, we'll get max_bus_speed properly setup from OpenFirmware. The second patch consists of simple radeon changes not to call drm_get_pcie_speed_cap_mask anymore. I assume that on x86 machines, the max_bus_speed property will be properly set already. Lucas Kannebley Tavares (2): ppc64: perform proper max_bus_speed detection radeon: use max_bus_speed to activate gen2 speeds arch/powerpc/include/asm/machdep.h | 2 ++ arch/powerpc/kernel/pci-common.c | 8 + arch/powerpc/platforms/pseries/pci.c | 51 arch/powerpc/platforms/pseries/pseries.h | 4 +++ arch/powerpc/platforms/pseries/setup.c | 2 ++ drivers/gpu/drm/radeon/evergreen.c | 10 ++- drivers/gpu/drm/radeon/r600.c| 9 ++ drivers/gpu/drm/radeon/rv770.c | 9 ++ 8 files changed, 74 insertions(+), 21 deletions(-) -- 1.8.1.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCHv4 1/2] ppc64: perform proper max_bus_speed detection
From: Lucas Kannebley Tavares luca...@linux.vnet.ibm.com
On pseries machines the detection for max_bus_speed should be done
through an OpenFirmware property. This patch adds a function to perform
this detection and a hook to perform dynamic adding of the function only for
pseries. This is done by overwriting the weak
pcibios_root_bridge_prepare function which is called by pci_create_root_bus().
Signed-off-by: Lucas Kannebley Tavares luca...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/machdep.h | 2 ++
arch/powerpc/kernel/pci-common.c | 8 +
arch/powerpc/platforms/pseries/pci.c | 51
arch/powerpc/platforms/pseries/pseries.h | 4 +++
arch/powerpc/platforms/pseries/setup.c | 2 ++
5 files changed, 67 insertions(+)
diff --git a/arch/powerpc/include/asm/machdep.h
b/arch/powerpc/include/asm/machdep.h
index 3d6b410..8f558bf 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -107,6 +107,8 @@ struct machdep_calls {
void(*pcibios_fixup)(void);
int (*pci_probe_mode)(struct pci_bus *);
void(*pci_irq_fixup)(struct pci_dev *dev);
+ int (*pcibios_root_bridge_prepare)(struct pci_host_bridge
+ *bridge);
/* To setup PHBs when using automatic OF platform driver for PCI */
int (*pci_setup_phb)(struct pci_controller *host);
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index fa12ae4..80986cf 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -844,6 +844,14 @@ int pci_proc_domain(struct pci_bus *bus)
return 1;
}
+int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
+{
+ if (ppc_md.pcibios_root_bridge_prepare)
+ return ppc_md.pcibios_root_bridge_prepare(bridge);
+
+ return 0;
+}
+
/* This header fixup will do the resource fixup for all devices as they are
* probed, but not for bridge ranges
*/
diff --git a/arch/powerpc/platforms/pseries/pci.c
b/arch/powerpc/platforms/pseries/pci.c
index 0b580f4..7f9c956 100644
--- a/arch/powerpc/platforms/pseries/pci.c
+++ b/arch/powerpc/platforms/pseries/pci.c
@@ -108,3 +108,54 @@ static void fixup_winbond_82c105(struct pci_dev* dev)
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
fixup_winbond_82c105);
+
+int pseries_root_bridge_prepare(struct pci_host_bridge *bridge)
+{
+ struct device_node *dn, *pdn;
+ struct pci_bus *bus;
+ const uint32_t *pcie_link_speed_stats;
+
+ bus = bridge-bus;
+
+ dn = pcibios_get_phb_of_node(bus);
+ if (!dn)
+ return 0;
+
+ for (pdn = dn; pdn != NULL; pdn = pdn-parent) {
+ pcie_link_speed_stats = (const uint32_t *) of_get_property(dn,
+ ibm,pcie-link-speed-stats, NULL);
+ if (pcie_link_speed_stats)
+ break;
+ }
+
+ if (!pcie_link_speed_stats) {
+ pr_err(no ibm,pcie-link-speed-stats property\n);
+ return 0;
+ }
+
+ switch (pcie_link_speed_stats[0]) {
+ case 0x01:
+ bus-max_bus_speed = PCIE_SPEED_2_5GT;
+ break;
+ case 0x02:
+ bus-max_bus_speed = PCIE_SPEED_5_0GT;
+ break;
+ default:
+ bus-max_bus_speed = PCI_SPEED_UNKNOWN;
+ break;
+ }
+
+ switch (pcie_link_speed_stats[1]) {
+ case 0x01:
+ bus-cur_bus_speed = PCIE_SPEED_2_5GT;
+ break;
+ case 0x02:
+ bus-cur_bus_speed = PCIE_SPEED_5_0GT;
+ break;
+ default:
+ bus-cur_bus_speed = PCI_SPEED_UNKNOWN;
+ break;
+ }
+
+ return 0;
+}
diff --git a/arch/powerpc/platforms/pseries/pseries.h
b/arch/powerpc/platforms/pseries/pseries.h
index 9a3dda0..b79393d 100644
--- a/arch/powerpc/platforms/pseries/pseries.h
+++ b/arch/powerpc/platforms/pseries/pseries.h
@@ -60,4 +60,8 @@ extern int dlpar_detach_node(struct device_node *);
/* Snooze Delay, pseries_idle */
DECLARE_PER_CPU(long, smt_snooze_delay);
+/* PCI root bridge prepare function override for pseries */
+struct pci_host_bridge;
+int pseries_root_bridge_prepare(struct pci_host_bridge *bridge);
+
#endif /* _PSERIES_PSERIES_H */
diff --git a/arch/powerpc/platforms/pseries/setup.c
b/arch/powerpc/platforms/pseries/setup.c
index 8bcc9ca..bf34cc9 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -466,6 +466,8 @@ static void __init pSeries_setup_arch(void)
else
ppc_md.enable_pmcs = power4_enable_pmcs;
+ ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare;
+
if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
long rc;
if
[PATCHv4 2/2] radeon: use max_bus_speed to activate gen2 speeds
From: Lucas Kannebley Tavares luca...@linux.vnet.ibm.com
radeon currently uses a drm function to get the speed capabilities for
the bus, drm_pcie_get_speed_cap_mask. However, this is a non-standard
method of performing this detection and this patch changes it to use
the max_bus_speed attribute.
Signed-off-by: Lucas Kannebley Tavares luca...@linux.vnet.ibm.com
---
drivers/gpu/drm/radeon/evergreen.c | 10 +++---
drivers/gpu/drm/radeon/r600.c | 9 ++---
drivers/gpu/drm/radeon/rv770.c | 9 ++---
3 files changed, 7 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/radeon/evergreen.c
b/drivers/gpu/drm/radeon/evergreen.c
index 305a657..ee45026 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3855,8 +3855,7 @@ void evergreen_fini(struct radeon_device *rdev)
void evergreen_pcie_gen2_enable(struct radeon_device *rdev)
{
- u32 link_width_cntl, speed_cntl, mask;
- int ret;
+ u32 link_width_cntl, speed_cntl;
if (radeon_pcie_gen2 == 0)
return;
@@ -3871,11 +3870,8 @@ void evergreen_pcie_gen2_enable(struct radeon_device
*rdev)
if (ASIC_IS_X2(rdev))
return;
- ret = drm_pcie_get_speed_cap_mask(rdev-ddev, mask);
- if (ret != 0)
- return;
-
- if (!(mask DRM_PCIE_SPEED_50))
+ if ((rdev-pdev-bus-max_bus_speed != PCIE_SPEED_5_0GT)
+ (rdev-pdev-bus-max_bus_speed != PCIE_SPEED_8_0GT))
return;
speed_cntl = RREG32_PCIE_P(PCIE_LC_SPEED_CNTL);
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 0740db3..4d5ba32 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -4351,8 +4351,6 @@ static void r600_pcie_gen2_enable(struct radeon_device
*rdev)
{
u32 link_width_cntl, lanes, speed_cntl, training_cntl, tmp;
u16 link_cntl2;
- u32 mask;
- int ret;
if (radeon_pcie_gen2 == 0)
return;
@@ -4371,11 +4369,8 @@ static void r600_pcie_gen2_enable(struct radeon_device
*rdev)
if (rdev-family = CHIP_R600)
return;
- ret = drm_pcie_get_speed_cap_mask(rdev-ddev, mask);
- if (ret != 0)
- return;
-
- if (!(mask DRM_PCIE_SPEED_50))
+ if ((rdev-pdev-bus-max_bus_speed != PCIE_SPEED_5_0GT)
+ (rdev-pdev-bus-max_bus_speed != PCIE_SPEED_8_0GT))
return;
speed_cntl = RREG32_PCIE_P(PCIE_LC_SPEED_CNTL);
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index d63fe1d..f4860f6 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -1238,8 +1238,6 @@ static void rv770_pcie_gen2_enable(struct radeon_device
*rdev)
{
u32 link_width_cntl, lanes, speed_cntl, tmp;
u16 link_cntl2;
- u32 mask;
- int ret;
if (radeon_pcie_gen2 == 0)
return;
@@ -1254,11 +1252,8 @@ static void rv770_pcie_gen2_enable(struct radeon_device
*rdev)
if (ASIC_IS_X2(rdev))
return;
- ret = drm_pcie_get_speed_cap_mask(rdev-ddev, mask);
- if (ret != 0)
- return;
-
- if (!(mask DRM_PCIE_SPEED_50))
+ if ((rdev-pdev-bus-max_bus_speed != PCIE_SPEED_5_0GT)
+ (rdev-pdev-bus-max_bus_speed != PCIE_SPEED_8_0GT))
return;
DRM_INFO(enabling PCIE gen 2 link speeds, disable with
radeon.pcie_gen2=0\n);
--
1.8.1.4
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Re: [PATCHv4 1/2] ppc64: perform proper max_bus_speed detection
On Wed, Apr 24, 2013 at 07:54:49PM -0300, luca...@linux.vnet.ibm.com wrote:
From: Lucas Kannebley Tavares luca...@linux.vnet.ibm.com
On pseries machines the detection for max_bus_speed should be done
through an OpenFirmware property. This patch adds a function to perform
this detection and a hook to perform dynamic adding of the function only for
pseries. This is done by overwriting the weak
pcibios_root_bridge_prepare function which is called by pci_create_root_bus().
Signed-off-by: Lucas Kannebley Tavares luca...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/machdep.h | 2 ++
arch/powerpc/kernel/pci-common.c | 8 +
arch/powerpc/platforms/pseries/pci.c | 51
arch/powerpc/platforms/pseries/pseries.h | 4 +++
arch/powerpc/platforms/pseries/setup.c | 2 ++
5 files changed, 67 insertions(+)
diff --git a/arch/powerpc/include/asm/machdep.h
b/arch/powerpc/include/asm/machdep.h
index 3d6b410..8f558bf 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -107,6 +107,8 @@ struct machdep_calls {
void(*pcibios_fixup)(void);
int (*pci_probe_mode)(struct pci_bus *);
void(*pci_irq_fixup)(struct pci_dev *dev);
+ int (*pcibios_root_bridge_prepare)(struct pci_host_bridge
+ *bridge);
/* To setup PHBs when using automatic OF platform driver for PCI */
int (*pci_setup_phb)(struct pci_controller *host);
diff --git a/arch/powerpc/kernel/pci-common.c
b/arch/powerpc/kernel/pci-common.c
index fa12ae4..80986cf 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -844,6 +844,14 @@ int pci_proc_domain(struct pci_bus *bus)
return 1;
}
+int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
+{
+ if (ppc_md.pcibios_root_bridge_prepare)
+ return ppc_md.pcibios_root_bridge_prepare(bridge);
+
+ return 0;
+}
+
/* This header fixup will do the resource fixup for all devices as they are
* probed, but not for bridge ranges
*/
diff --git a/arch/powerpc/platforms/pseries/pci.c
b/arch/powerpc/platforms/pseries/pci.c
index 0b580f4..7f9c956 100644
--- a/arch/powerpc/platforms/pseries/pci.c
+++ b/arch/powerpc/platforms/pseries/pci.c
@@ -108,3 +108,54 @@ static void fixup_winbond_82c105(struct pci_dev* dev)
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
fixup_winbond_82c105);
+
+int pseries_root_bridge_prepare(struct pci_host_bridge *bridge)
+{
+ struct device_node *dn, *pdn;
+ struct pci_bus *bus;
+ const uint32_t *pcie_link_speed_stats;
+
+ bus = bridge-bus;
+
+ dn = pcibios_get_phb_of_node(bus);
+ if (!dn)
+ return 0;
+
+ for (pdn = dn; pdn != NULL; pdn = pdn-parent) {
+ pcie_link_speed_stats = (const uint32_t *) of_get_property(dn,
+ ibm,pcie-link-speed-stats, NULL);
+ if (pcie_link_speed_stats)
+ break;
+ }
Please use the helpers in include/linux/of.h rather than open coding
this.
Yours Tony
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Re: [PATCH v2 7/8] powerpc/pseries: Read of-config partition via pstore
On Tue, Apr 23, 2013 at 11:20 PM, Aruna Balakrishnaiah
ar...@linux.vnet.ibm.com wrote:
This patch set exploits the pstore subsystem to read details of
of-config partition in NVRAM to a separate file in /dev/pstore.
For instance, of-config partition details will be stored in a
file named [of-nvram-5].
Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
Reviewed-by: Jim Keniston jkeni...@us.ibm.com
---
arch/powerpc/platforms/pseries/nvram.c | 55
+++-
fs/pstore/inode.c |3 ++
include/linux/pstore.h |1 +
3 files changed, 50 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/nvram.c
b/arch/powerpc/platforms/pseries/nvram.c
index b118382..de448af 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -132,9 +132,16 @@ static size_t oops_data_sz;
static struct z_stream_s stream;
#ifdef CONFIG_PSTORE
+static struct nvram_os_partition of_config_partition = {
+ .name = of-config,
+ .index = -1,
+ .os_partition = false
+};
+
static enum pstore_type_id nvram_type_ids[] = {
PSTORE_TYPE_DMESG,
PSTORE_TYPE_RTAS,
+ PSTORE_TYPE_OF,
-1
};
static int read_type;
@@ -332,10 +339,15 @@ int nvram_read_partition(struct nvram_os_partition
*part, char *buff,
tmp_index = part-index;
- rc = ppc_md.nvram_read((char *)info, sizeof(struct err_log_info),
tmp_index);
- if (rc = 0) {
- pr_err(%s: Failed nvram_read (%d)\n, __FUNCTION__, rc);
- return rc;
+ if (part-os_partition) {
+ rc = ppc_md.nvram_read((char *)info,
+ sizeof(struct err_log_info),
+ tmp_index);
+ if (rc = 0) {
+ pr_err(%s: Failed nvram_read (%d)\n, __FUNCTION__,
+ rc);
+ return rc;
+ }
}
rc = ppc_md.nvram_read(buff, length, tmp_index);
@@ -344,8 +356,10 @@ int nvram_read_partition(struct nvram_os_partition
*part, char *buff,
return rc;
}
- *error_log_cnt = info.seq_num;
- *err_type = info.error_type;
+ if (part-os_partition) {
+ *error_log_cnt = info.seq_num;
+ *err_type = info.error_type;
+ }
return 0;
}
@@ -516,7 +530,7 @@ static int nvram_pstore_write(enum pstore_type_id type,
}
/*
- * Reads the oops/panic report and ibm,rtas-log partition.
+ * Reads the oops/panic report, rtas and of-config partition.
* Returns the length of the data we read from each partition.
* Returns 0 if we've been called before.
*/
@@ -525,9 +539,11 @@ static ssize_t nvram_pstore_read(u64 *id, enum
pstore_type_id *type,
struct pstore_info *psi)
{
struct oops_log_info *oops_hdr;
- unsigned int err_type, id_no;
+ unsigned int err_type, id_no, size = 0;
struct nvram_os_partition *part = NULL;
char *buff = NULL;
+ int sig = 0;
+ loff_t p;
read_type++;
@@ -542,10 +558,29 @@ static ssize_t nvram_pstore_read(u64 *id, enum
pstore_type_id *type,
time-tv_sec = last_rtas_event;
time-tv_nsec = 0;
break;
+ case PSTORE_TYPE_OF:
+ sig = NVRAM_SIG_OF;
+ part = of_config_partition;
+ *type = PSTORE_TYPE_OF;
+ *id = PSTORE_TYPE_OF;
+ time-tv_sec = 0;
+ time-tv_nsec = 0;
+ break;
default:
return 0;
}
+ if (!part-os_partition) {
+ p = nvram_find_partition(part-name, sig, size);
+ if (p = 0) {
+ pr_err(nvram: Failed to find partition %s,
+ err %d\n, part-name, (int)p);
+ return 0;
+ }
+ part-index = p;
+ part-size = size;
+ }
+
buff = kmalloc(part-size, GFP_KERNEL);
if (!buff)
@@ -557,7 +592,9 @@ static ssize_t nvram_pstore_read(u64 *id, enum
pstore_type_id *type,
}
*count = 0;
- *id = id_no;
+
+ if (part-os_partition)
+ *id = id_no;
if (nvram_type_ids[read_type] == PSTORE_TYPE_DMESG) {
oops_hdr = (struct oops_log_info *)buff;
diff --git a/fs/pstore/inode.c b/fs/pstore/inode.c
index ec24f9c..8d4fb65 100644
--- a/fs/pstore/inode.c
+++ b/fs/pstore/inode.c
@@ -327,6 +327,9 @@ int pstore_mkfile(enum pstore_type_id type, char *psname,
u64 id, int count,
case PSTORE_TYPE_PPC_RTAS:
sprintf(name, rtas-%s-%lld, psname, id);
break;
+
Re: [PATCH v2 0/8] powerpc/pseries: Nvram-to-pstore
On Tue, Apr 23, 2013 at 11:19 PM, Aruna Balakrishnaiah ar...@linux.vnet.ibm.com wrote: Currently the kernel provides the contents of p-series NVRAM only as a simple stream of bytes via /dev/nvram, which must be interpreted in user space by the nvram command in the powerpc-utils package. This patch set exploits the pstore subsystem to expose each partition in NVRAM as a separate file in /dev/pstore. For instance Oops messages will stored in a file named [dmesg-nvram-2]. Changes from v1: - Reduce #ifdefs by and remove forward declarations of pstore callbacks - Handle return value of nvram_write_os_partition - Remove empty pstore callbacks and register pstore only when pstore is configured --- Aruna Balakrishnaiah (8): powerpc/pseries: Remove syslog prefix in uncompressed oops text powerpc/pseries: Add version and timestamp to oops header powerpc/pseries: Introduce generic read function to read nvram-partitions powerpc/pseries: Read/Write oops nvram partition via pstore powerpc/pseries: Read rtas partition via pstore powerpc/pseries: Distinguish between a os-partition and non-os partition powerpc/pseries: Read of-config partition via pstore powerpc/pseries: Read common partition via pstore arch/powerpc/platforms/pseries/nvram.c | 353 +++- fs/pstore/inode.c |9 + include/linux/pstore.h |4 3 files changed, 313 insertions(+), 53 deletions(-) This series looks good! Other than the naming conventions (are these new pstore types really PPC-only?) I think it's a fine addition. Thanks! -Kees -- Kees Cook Chrome OS Security ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2 12/15] powerpc/85xx: add time base sync support for e6500
On Wed, Apr 24, 2013 at 05:38:16PM -0500, Scott Wood wrote:
On 04/24/2013 06:29:29 AM, Zhao Chenhui wrote:
On Tue, Apr 23, 2013 at 07:04:06PM -0500, Scott Wood wrote:
On 04/19/2013 05:47:45 AM, Zhao Chenhui wrote:
From: Chen-Hui Zhao chenhui.z...@freescale.com
For e6500, two threads in one core share one time base. Just need
to do time base sync on first thread of one core, and skip it on
the other thread.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Andy Fleming aflem...@freescale.com
---
arch/powerpc/platforms/85xx/smp.c | 52
+++-
1 files changed, 44 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/smp.c
b/arch/powerpc/platforms/85xx/smp.c
index 74d8cde..5f3eee3 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -53,26 +55,40 @@ static inline u32 get_phy_cpu_mask(void)
u32 mask;
int cpu;
- mask = 1 cur_booting_core;
- for_each_online_cpu(cpu)
- mask |= 1 get_hard_smp_processor_id(cpu);
+ if (smt_capable()) {
+ /* two threads in one core share one time base */
+ mask = 1 cpu_core_index_of_thread(cur_booting_core);
+ for_each_online_cpu(cpu)
+ mask |= 1 cpu_core_index_of_thread(
+ get_hard_smp_processor_id(cpu));
+ } else {
+ mask = 1 cur_booting_core;
+ for_each_online_cpu(cpu)
+ mask |= 1 get_hard_smp_processor_id(cpu);
+ }
Where is smt_capable defined()? I assume somewhere in the patchset
but it's a pain to search 12 patches...
It is defined in arch/powerpc/include/asm/topology.h.
#define smt_capable() (cpu_has_feature(CPU_FTR_SMT))
Thanks for your review again.
We shouldn't base it on CPU_FTR_SMT. For example, e6500 doesn't
claim that feature yet, except in our SDK kernel. That doesn't
change the topology of CPU numbering.
Then, where can I get the thread information? dts?
Or, wait for upstream of the thread suppport of e6500.
Is this really about whether we're SMT-capable or whether we have
rcpm v2?
-Scott
I think this if statement can be removed. The
cpu_core_index_of_thread()
can return the correct cpu number with thread or without thread.
Like this:
static inline u32 get_phy_cpu_mask(void)
{
u32 mask;
int cpu;
mask = 1 cpu_core_index_of_thread(cur_booting_core);
for_each_online_cpu(cpu)
mask |= 1 cpu_core_index_of_thread(
get_hard_smp_processor_id(cpu));
return mask;
}
Likewise, this will get it wrong if SMT is disabled or not yet
implemented on a core.
-Scott
Let's look into cpu_core_index_of_thread() in arch/powerpc/kernel/smp.c.
int cpu_core_index_of_thread(int cpu)
{
return cpu threads_shift;
}
If no thread, the threads_shift is equal to 0. It can work with no
thread.
Perhaps, I should submit this patch after the thread patches for e6500.
-Chenhui
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Re: attempt to move .org backwards still show up
On 2013年04月24日 20:47, Mike wrote: 在 2013-04-24三的 20:37 +1000，Michael Neuling写道： Mike Qiu qiud...@linux.vnet.ibm.com wrote: 于 2013/4/24 16:31, Michael Ellerman 写道: On Wed, Apr 24, 2013 at 04:22:53PM +0800, Mike Qiu wrote: Hi all I get an error message when I compile the source code in Power7 platform use the newest upstream kernel. Hi Mike, It depends on what your .config is. What defconfig are you building? I just copy the config file from /boot/config.* to .config and use make menuconfig change nothing by manually, then save. Can you post the resulting config here? Do you have commit in your tree? commit 087aa036eb79f24b856893190359ba812b460f45 Author: Chen Gang gang.c...@asianux.com powerpc: make additional room in exception vector area Sure, that commit certainly in my git tree. And I just try to remove the code and re-git clone the source code from upstream, this problem still happen. I will post the config file as the attachment :) Thanks I will try, and plan to get a result within this week (2013-04-28) Thanks. -- Chen Gang Asianux Corporation ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc: Add isync to copy_and_flush
Considering that the bug has been there *forever* I don't think I have a real standing to try to shove it down Linus throat as a regression fix :-) True, sorry. I'll put the fix in 3.10 and let it trickle down to stable. Thanks Mikey ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 4/4] powerpc/85xx: Update mpc85xx_defconfig for C293PCIE
From: Mingkai Hu mingkai...@freescale.com Signed-off-by: Mingkai Hu mingkai...@freescale.com --- Base on git://git.am.freescale.net/gitolite/mirrors/linux-2.6.git arch/powerpc/configs/mpc85xx_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig index cf815e8..ddc33a2 100644 --- a/arch/powerpc/configs/mpc85xx_defconfig +++ b/arch/powerpc/configs/mpc85xx_defconfig @@ -28,6 +28,7 @@ CONFIG_MPC85xx_MDS=y CONFIG_MPC8536_DS=y CONFIG_MPC85xx_DS=y CONFIG_MPC85xx_RDB=y +CONFIG_C293_PCIE=y CONFIG_P1010_RDB=y CONFIG_P1022_DS=y CONFIG_P1022_RDK=y -- 1.8.0 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 3/4] powerpc/85xx: Add C293PCIE board support
From: Mingkai Hu mingkai...@freescale.com
C293PCIE board is a series of Freescale PCIe add-in cards to perform
as public key crypto accelerator or secure key management module.
- 512KB platform SRAM in addition to 512K L2 Cache/SRAM
- 512MB soldered DDR3 32bit memory
- CPLD System Logic
- 64MB x16 NOR flash and 4GB x8 NAND flash
- 16MB SPI flash
Signed-off-by: Mingkai Hu mingkai...@freescale.com
Singed-off-by: Po Liu po@freescale.com
---
Base on git://git.am.freescale.net/gitolite/mirrors/linux-2.6.git
arch/powerpc/boot/dts/c293pcie.dts | 251 +
arch/powerpc/platforms/85xx/Kconfig| 7 +
arch/powerpc/platforms/85xx/Makefile | 1 +
arch/powerpc/platforms/85xx/c293pcie.c | 82 +++
4 files changed, 341 insertions(+)
create mode 100644 arch/powerpc/boot/dts/c293pcie.dts
create mode 100644 arch/powerpc/platforms/85xx/c293pcie.c
diff --git a/arch/powerpc/boot/dts/c293pcie.dts
b/arch/powerpc/boot/dts/c293pcie.dts
new file mode 100644
index 000..f2f6d76
--- /dev/null
+++ b/arch/powerpc/boot/dts/c293pcie.dts
@@ -0,0 +1,251 @@
+/*
+ * C293 PCIE Device Tree Source
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License (GPL) as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor AS IS AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ fsl/c293si-pre.dtsi
+
+/ {
+ model = fsl,C293PCIE;
+ compatible = fsl,C293PCIE;
+
+ memory {
+ device_type = memory;
+ };
+
+ ifc: ifc@fffe1e000 {
+ reg = 0xf 0xffe1e000 0 0x2000;
+ ranges = 0x0 0x0 0xf 0xec00 0x0400
+ 0x2 0x0 0xf 0xffdf 0x0001;
+
+ };
+
+ soc: soc@fffe0 {
+ ranges = 0x0 0xf 0xffe0 0x10;
+ };
+
+ pci0: pcie@fffe0a000 {
+ reg = 0xf 0xffe0a000 0 0x1000;
+ ranges = 0x200 0x0 0x8000 0xc 0x 0x0 0x2000
+ 0x100 0x0 0x 0xf 0xffc0 0x0 0x1;
+ pcie@0 {
+ ranges = 0x200 0x0 0x8000
+ 0x200 0x0 0x8000
+ 0x0 0x2000
+
+ 0x100 0x0 0x0
+ 0x100 0x0 0x0
+ 0x0 0x10;
+ };
+ };
+};
+
+ifc {
+ nor@0,0 {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = cfi-flash;
+ reg = 0x0 0x0 0x400;
+ bank-width = 2;
+ device-width = 1;
+
+ partition@0 {
+ /* 1MB for DTB Image */
+ reg = 0x0 0x0010;
+ label = NOR DTB Image;
+ };
+
+ partition@10 {
+ /* 8 MB for Linux Kernel Image */
+ reg = 0x0010 0x0080;
+ label = NOR Linux Kernel Image;
+ };
+
+ partition@90 {
+ /* 33MB for rootfs */
+ reg = 0x0090 0x0210;
+ label = NOR Rootfs Image;
+ };
+
+ partition@2a0 {
+ /*
[PATCH 2/4] powerpc/85xx: Add silicon device tree for C293
From: Mingkai Hu mingkai...@freescale.com
Signed-off-by: Mingkai Hu mingkai...@freescale.com
Signed-off-by: Po Liu po@freescale.com
---
Base on git://git.am.freescale.net/gitolite/mirrors/linux-2.6.git
arch/powerpc/boot/dts/fsl/c293si-post.dtsi | 193 +
arch/powerpc/boot/dts/fsl/c293si-pre.dtsi | 63 ++
2 files changed, 256 insertions(+)
create mode 100644 arch/powerpc/boot/dts/fsl/c293si-post.dtsi
create mode 100644 arch/powerpc/boot/dts/fsl/c293si-pre.dtsi
diff --git a/arch/powerpc/boot/dts/fsl/c293si-post.dtsi
b/arch/powerpc/boot/dts/fsl/c293si-post.dtsi
new file mode 100644
index 000..bd20832
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/c293si-post.dtsi
@@ -0,0 +1,193 @@
+/*
+ * C293 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License (GPL) as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ifc {
+ #address-cells = 2;
+ #size-cells = 1;
+ compatible = fsl,ifc, simple-bus;
+ interrupts = 19 2 0 0;
+};
+
+/* controller at 0xa000 */
+pci0 {
+ compatible = fsl,qoriq-pcie-v2.2, fsl,qoriq-pcie;
+ device_type = pci;
+ #size-cells = 2;
+ #address-cells = 3;
+ bus-range = 0 255;
+ clock-frequency = ;
+ interrupts = 16 2 0 0;
+
+ pcie@0 {
+ reg = 0 0 0 0 0;
+ #interrupt-cells = 1;
+ #size-cells = 2;
+ #address-cells = 3;
+ device_type = pci;
+ interrupts = 16 2 0 0;
+ interrupt-map-mask = 0xf800 0 0 7;
+ interrupt-map =
+ /* IDSEL 0x0 */
+ 0x0 0x0 0x1 mpic 0x0 0x1 0x0 0x0
+ 0x0 0x0 0x2 mpic 0x1 0x1 0x0 0x0
+ 0x0 0x0 0x3 mpic 0x2 0x1 0x0 0x0
+ 0x0 0x0 0x4 mpic 0x3 0x1 0x0 0x0
+ ;
+ };
+};
+
+soc {
+ #address-cells = 1;
+ #size-cells = 1;
+ device_type = soc;
+ compatible = simple-bus;
+ bus-frequency = 0;// Filled out by uboot.
+
+ ecm-law@0 {
+ compatible = fsl,ecm-law;
+ reg = 0x0 0x1000;
+ fsl,num-laws = 12;
+ };
+
+ ecm@1000 {
+ compatible = fsl,c293-ecm, fsl,ecm;
+ reg = 0x1000 0x1000;
+ interrupts = 16 2 0 0;
+ };
+
+ memory-controller@2000 {
+ compatible = fsl,c293-memory-controller;
+ reg = 0x2000 0x1000;
+ interrupts = 16 2 0 0;
+ };
+
+/include/ pq3-i2c-0.dtsi
+/include/ pq3-i2c-1.dtsi
+/include/ pq3-duart-0.dtsi
+/include/ pq3-espi-0.dtsi
+ spi0: spi@7000 {
+ fsl,espi-num-chipselects = 1;
+ };
+
+/include/ pq3-gpio-0.dtsi
+ L2: l2-cache-controller@2 {
+ compatible = fsl,c293-l2-cache-controller;
+ reg = 0x2 0x1000;
+ cache-line-size = 32; // 32 bytes
+ cache-size = 0x8; // L2,512K
+ interrupts = 16 2 0 0;
+ };
+
+/include/ pq3-dma-0.dtsi
+/include/ pq3-esdhc-0.dtsi
+ sdhc@2e000 {
+ compatible = fsl,c293-esdhc, fsl,esdhc;
+
[PATCH 1/4] powerpc/85xx: Add SEC6.0 device tree
From: Mingkai Hu mingkai...@freescale.com
Add device tree for SEC 6.0 used on C29x silicon.
Signed-off-by: Mingkai Hu mingkai...@freescale.com
Singed-off-by: Po Liu po@freescale.com
---
Base on git://git.am.freescale.net/gitolite/mirrors/linux-2.6.git
arch/powerpc/boot/dts/fsl/qoriq-sec6.0-0.dtsi | 58 +++
1 file changed, 58 insertions(+)
create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-sec6.0-0.dtsi
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sec6.0-0.dtsi
b/arch/powerpc/boot/dts/fsl/qoriq-sec6.0-0.dtsi
new file mode 100644
index 000..eb99a46
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-sec6.0-0.dtsi
@@ -0,0 +1,58 @@
+/*
+ * QorIQ Sec/Crypto 6.0 device tree stub
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License (GPL) as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ compatible = fsl,sec-v6.0, fsl,sec-v5.2,
+fsl,sec-v5.0, fsl,sec-v4.4,
+fsl,sec-v4.0;
+ fsl,sec-era = 6;
+ #address-cells = 1;
+ #size-cells = 1;
+
+ jr@1000 {
+ compatible = fsl,sec-v6.0-job-ring,
+fsl,sec-v5.2-job-ring,
+fsl,sec-v5.0-job-ring,
+fsl,sec-v4.4-job-ring,
+fsl,sec-v4.0-job-ring;
+ reg= 0x1000 0x1000;
+ };
+
+ jr@2000 {
+ compatible = fsl,sec-v6.0-job-ring,
+fsl,sec-v5.2-job-ring,
+fsl,sec-v5.0-job-ring,
+fsl,sec-v4.4-job-ring,
+fsl,sec-v4.0-job-ring;
+ reg= 0x2000 0x1000;
+ };
--
1.8.0
___
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Re: attempt to move .org backwards still show up
于 2013/4/25 9:05, Chen Gang 写道: On 2013年04月24日 20:47, Mike wrote: 在 2013-04-24三的 20:37 +1000，Michael Neuling写道： Mike Qiu qiud...@linux.vnet.ibm.com wrote: 于 2013/4/24 16:31, Michael Ellerman 写道: On Wed, Apr 24, 2013 at 04:22:53PM +0800, Mike Qiu wrote: Hi all I get an error message when I compile the source code in Power7 platform use the newest upstream kernel. Hi Mike, It depends on what your .config is. What defconfig are you building? I just copy the config file from /boot/config.* to .config and use make menuconfig change nothing by manually, then save. Can you post the resulting config here? Do you have commit in your tree? commit 087aa036eb79f24b856893190359ba812b460f45 Author: Chen Gang gang.c...@asianux.com powerpc: make additional room in exception vector area Sure, that commit certainly in my git tree. And I just try to remove the code and re-git clone the source code from upstream, this problem still happen. I will post the config file as the attachment :) Thanks I will try, and plan to get a result within this week (2013-04-28) Thanks. Hi This has block my work now So I hope you can take a look ASAP Thanks :) Mike ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2 7/8] powerpc/pseries: Read of-config partition via pstore
On Thursday 25 April 2013 02:13 AM, Kees Cook wrote:
Hi Kees,
On Tue, Apr 23, 2013 at 11:20 PM, Aruna Balakrishnaiah
ar...@linux.vnet.ibm.com wrote:
This patch set exploits the pstore subsystem to read details of
of-config partition in NVRAM to a separate file in /dev/pstore.
For instance, of-config partition details will be stored in a
file named [of-nvram-5].
Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
Reviewed-by: Jim Keniston jkeni...@us.ibm.com
---
arch/powerpc/platforms/pseries/nvram.c | 55 +++-
fs/pstore/inode.c |3 ++
include/linux/pstore.h |1 +
3 files changed, 50 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/nvram.c
b/arch/powerpc/platforms/pseries/nvram.c
index b118382..de448af 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -132,9 +132,16 @@ static size_t oops_data_sz;
static struct z_stream_s stream;
#ifdef CONFIG_PSTORE
+static struct nvram_os_partition of_config_partition = {
+ .name = of-config,
+ .index = -1,
+ .os_partition = false
+};
+
static enum pstore_type_id nvram_type_ids[] = {
PSTORE_TYPE_DMESG,
PSTORE_TYPE_RTAS,
+ PSTORE_TYPE_OF,
-1
};
static int read_type;
@@ -332,10 +339,15 @@ int nvram_read_partition(struct nvram_os_partition *part,
char *buff,
tmp_index = part-index;
- rc = ppc_md.nvram_read((char *)info, sizeof(struct err_log_info),
tmp_index);
- if (rc = 0) {
- pr_err(%s: Failed nvram_read (%d)\n, __FUNCTION__, rc);
- return rc;
+ if (part-os_partition) {
+ rc = ppc_md.nvram_read((char *)info,
+ sizeof(struct err_log_info),
+ tmp_index);
+ if (rc = 0) {
+ pr_err(%s: Failed nvram_read (%d)\n, __FUNCTION__,
+ rc);
+ return rc;
+ }
}
rc = ppc_md.nvram_read(buff, length, tmp_index);
@@ -344,8 +356,10 @@ int nvram_read_partition(struct nvram_os_partition *part,
char *buff,
return rc;
}
- *error_log_cnt = info.seq_num;
- *err_type = info.error_type;
+ if (part-os_partition) {
+ *error_log_cnt = info.seq_num;
+ *err_type = info.error_type;
+ }
return 0;
}
@@ -516,7 +530,7 @@ static int nvram_pstore_write(enum pstore_type_id type,
}
/*
- * Reads the oops/panic report and ibm,rtas-log partition.
+ * Reads the oops/panic report, rtas and of-config partition.
* Returns the length of the data we read from each partition.
* Returns 0 if we've been called before.
*/
@@ -525,9 +539,11 @@ static ssize_t nvram_pstore_read(u64 *id, enum
pstore_type_id *type,
struct pstore_info *psi)
{
struct oops_log_info *oops_hdr;
- unsigned int err_type, id_no;
+ unsigned int err_type, id_no, size = 0;
struct nvram_os_partition *part = NULL;
char *buff = NULL;
+ int sig = 0;
+ loff_t p;
read_type++;
@@ -542,10 +558,29 @@ static ssize_t nvram_pstore_read(u64 *id, enum
pstore_type_id *type,
time-tv_sec = last_rtas_event;
time-tv_nsec = 0;
break;
+ case PSTORE_TYPE_OF:
+ sig = NVRAM_SIG_OF;
+ part = of_config_partition;
+ *type = PSTORE_TYPE_OF;
+ *id = PSTORE_TYPE_OF;
+ time-tv_sec = 0;
+ time-tv_nsec = 0;
+ break;
default:
return 0;
}
+ if (!part-os_partition) {
+ p = nvram_find_partition(part-name, sig, size);
+ if (p = 0) {
+ pr_err(nvram: Failed to find partition %s,
+ err %d\n, part-name, (int)p);
+ return 0;
+ }
+ part-index = p;
+ part-size = size;
+ }
+
buff = kmalloc(part-size, GFP_KERNEL);
if (!buff)
@@ -557,7 +592,9 @@ static ssize_t nvram_pstore_read(u64 *id, enum
pstore_type_id *type,
}
*count = 0;
- *id = id_no;
+
+ if (part-os_partition)
+ *id = id_no;
if (nvram_type_ids[read_type] == PSTORE_TYPE_DMESG) {
oops_hdr = (struct oops_log_info *)buff;
diff --git a/fs/pstore/inode.c b/fs/pstore/inode.c
index ec24f9c..8d4fb65 100644
--- a/fs/pstore/inode.c
+++ b/fs/pstore/inode.c
@@ -327,6 +327,9 @@ int pstore_mkfile(enum pstore_type_id type, char *psname,
u64 id, int count,
case PSTORE_TYPE_PPC_RTAS:
sprintf(name, rtas-%s-%lld, psname, id);
break;
+ case
Re: attempt to move .org backwards still show up
On 2013年04月25日 12:05, Mike Qiu wrote: I will try, and plan to get a result within this week (2013-04-28) Thanks. Hi This has block my work now So I hope you can take a look ASAP Thanks :) The root cause is the room 0x500..0xc00 is not enough when KVM_HANDLER_PR expresses the real codes. The relationship is KVM_HANDLER_PR depend on CONFIG_KVM_BOOK3S_PR depend on CONFIG_KVM_BOOK3S_64_PR. If possible, we can by pass it: just use CONFIG_KVM_BOOK3S_64_HV instead of CONFIG_KVM_BOOK3S_64_PR (enter menuconfig - Virtualization - KVM support for POWER7 and PPC970 using hypervisor mode in host). For 'allmodconfig', it will use CONFIG_KVM_BOOK3S_64_HV instead of CONFIG_KVM_BOOK3S_64_PR, so 'allmodconfig' will not have this issue. Next, I will continue to analyse how to fix it. Welcome other members (especially the related maintainers) to provide suggestions and completions. Thanks. -- Chen Gang Asianux Corporation ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2 0/8] powerpc/pseries: Nvram-to-pstore
Hi Kees, On Thursday 25 April 2013 02:15 AM, Kees Cook wrote: On Tue, Apr 23, 2013 at 11:19 PM, Aruna Balakrishnaiah ar...@linux.vnet.ibm.com wrote: Currently the kernel provides the contents of p-series NVRAM only as a simple stream of bytes via /dev/nvram, which must be interpreted in user space by the nvram command in the powerpc-utils package. This patch set exploits the pstore subsystem to expose each partition in NVRAM as a separate file in /dev/pstore. For instance Oops messages will stored in a file named [dmesg-nvram-2]. Changes from v1: - Reduce #ifdefs by and remove forward declarations of pstore callbacks - Handle return value of nvram_write_os_partition - Remove empty pstore callbacks and register pstore only when pstore is configured --- Aruna Balakrishnaiah (8): powerpc/pseries: Remove syslog prefix in uncompressed oops text powerpc/pseries: Add version and timestamp to oops header powerpc/pseries: Introduce generic read function to read nvram-partitions powerpc/pseries: Read/Write oops nvram partition via pstore powerpc/pseries: Read rtas partition via pstore powerpc/pseries: Distinguish between a os-partition and non-os partition powerpc/pseries: Read of-config partition via pstore powerpc/pseries: Read common partition via pstore arch/powerpc/platforms/pseries/nvram.c | 353 +++- fs/pstore/inode.c |9 + include/linux/pstore.h |4 3 files changed, 313 insertions(+), 53 deletions(-) This series looks good! Other than the naming conventions (are these new pstore types really PPC-only?) I think it's a fine addition. Thanks! The new pstore types are PPC specific. Hence it would be better to have the (_PPC) in the type ids so that other does not end up using these ids. -Kees -- Kees Cook Chrome OS Security ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
