Re: [PATCH -V6 05/27] powerpc: New hugepage directory format

[Aneesh Kumar K.V]

Paul Mackerras pau...@samba.org writes:

 On Mon, Apr 22, 2013 at 03:30:39PM +0530, Aneesh Kumar K.V wrote:
 From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com

 [snip]

  /*
 - * Use the top bit of the higher-level page table entries to indicate 
 whether
 - * the entries we point to contain hugepages.  This works because we know 
 that
 - * the page tables live in kernel space.  If we ever decide to support 
 having
 - * page tables at arbitrary addresses, this breaks and will have to change.
 - */
 -#ifdef CONFIG_PPC64
 -#define PD_HUGE 0x8000
 -#else
 -#define PD_HUGE 0x8000
 -#endif

 I think this is a good thing to do ultimately, but if you do this you
 also need to fix arch/powerpc/kernel/head_fsl_booke.S:

 #ifdef CONFIG_PTE_64BIT
 #ifdef CONFIG_HUGETLB_PAGE
 #define FIND_PTE  \
   rlwinm  r12, r10, 13, 19, 29;   /* Compute pgdir/pmd offset */  \
   lwzxr11, r12, r11;  /* Get pgd/pmd entry */ \
   rlwinm. r12, r11, 0, 0, 20; /* Extract pt base address */   \
   blt 1000f;  /* Normal non-huge page */  \
   beq 2f; /* Bail if no table */  \
   orisr11, r11, PD_HUGE@h;/* Put back address bit */  \
   andi.   r10, r11, HUGEPD_SHIFT_MASK@l; /* extract size field */ \
   xor r12, r10, r11;  /* drop size bits from pointer */ \
   b   1001f;  \


that should be easy, but

 and this, from arch/powerpc/mm/tlb_low_64e.S:

   cmpdi   cr0,r14,0
   bge tlb_miss_fault_bolted   /* Bad pgd entry or hugepage; bail */

 (of which there are several similar instances in that file).

 If you want to avoid fixing these bits of assembly code (and any
 others I missed in my quick scan), you'll need to keep the definition
 of PD_HUGE, at least on anything not 64-bit Book3S.

I am not sure we can find all such usages easily. I looked at the commit
d1b9b12811ef079c37fe464f51953746d8b78e2a and am worried we might be
breaking assumptions like that. Considering that I won't be able to test
FSL, I am inclined to go with the second option you listed, even though
that adds few more #ifdef. How about

diff --git a/arch/powerpc/include/asm/hugetlb.h 
b/arch/powerpc/include/asm/hugetlb.h
index 62e11a3..4daf7e6 100644
--- a/arch/powerpc/include/asm/hugetlb.h
+++ b/arch/powerpc/include/asm/hugetlb.h
@@ -6,6 +6,33 @@
 
 extern struct kmem_cache *hugepte_cache;
 
+#ifdef CONFIG_PPC_BOOK3S_64
+/*
+ * This should work for other subarchs too. But right now we use the
+ * new format only for 64bit book3s
+ */
+static inline pte_t *hugepd_page(hugepd_t hpd)
+{
+   BUG_ON(!hugepd_ok(hpd));
+   /*
+* We have only four bits to encode, MMU page size
+*/
+   BUILD_BUG_ON((MMU_PAGE_COUNT - 1)  0xf);
+   return (pte_t *)(hpd.pd  ~HUGEPD_SHIFT_MASK);
+}
+
+static inline unsigned int hugepd_mmu_psize(hugepd_t hpd)
+{
+   return (hpd.pd  HUGEPD_SHIFT_MASK)  2;
+}
+
+static inline unsigned int hugepd_shift(hugepd_t hpd)
+{
+   return mmu_psize_to_shift(hugepd_mmu_psize(hpd));
+}
+
+#else
+
 static inline pte_t *hugepd_page(hugepd_t hpd)
 {
BUG_ON(!hugepd_ok(hpd));
@@ -17,6 +44,9 @@ static inline unsigned int hugepd_shift(hugepd_t hpd)
return hpd.pd  HUGEPD_SHIFT_MASK;
 }
 
+#endif /* CONFIG_PPC_BOOK3S_64 */
+
+
 static inline pte_t *hugepte_offset(hugepd_t *hpdp, unsigned long addr,
unsigned pdshift)
 {
diff --git a/arch/powerpc/include/asm/mmu-hash64.h 
b/arch/powerpc/include/asm/mmu-hash64.h
index b59e06f..05895cf 100644
--- a/arch/powerpc/include/asm/mmu-hash64.h
+++ b/arch/powerpc/include/asm/mmu-hash64.h
@@ -21,6 +21,7 @@
  * complete pgtable.h but only a portion of it.
  */
 #include asm/pgtable-ppc64.h
+#include asm/bug.h
 
 /*
  * Segment table
@@ -159,6 +160,24 @@ struct mmu_psize_def
unsigned long   avpnm;  /* bits to mask out in AVPN in the HPTE */
unsigned long   sllp;   /* SLB L||LP (exact mask to use in slbmte) */
 };
+extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
+
+static inline int shift_to_mmu_psize(unsigned int shift)
+{
+   int psize;
+
+   for (psize = 0; psize  MMU_PAGE_COUNT; ++psize)
+   if (mmu_psize_defs[psize].shift == shift)
+   return psize;
+   return -1;
+}
+
+static inline unsigned int mmu_psize_to_shift(unsigned int mmu_psize)
+{
+   if (mmu_psize_defs[mmu_psize].shift)
+   return mmu_psize_defs[mmu_psize].shift;
+   BUG();
+}
 
 #endif /* __ASSEMBLY__ */
 
@@ -193,7 +212,6 @@ static inline int segment_shift(int ssize)
 /*
  * The current system page and segment sizes
  */
-extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
 extern int mmu_linear_psize;
 extern int mmu_virtual_psize;
 extern int mmu_vmalloc_psize;
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index 

Re: [PATCH -V6 18/27] mm/THP: withdraw the pgtable after pmdp related operations

[Aneesh Kumar K.V]

Andrea Arcangeli aarca...@redhat.com writes:

 Hi,

 On Wed, Apr 24, 2013 at 02:38:01PM +0530, Aneesh Kumar K.V wrote:
 From 7444a5eda33c00eea465b51c405cb830c57513b7 Mon Sep 17 00:00:00 2001
 From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
 Date: Wed, 6 Mar 2013 12:50:37 +0530
 Subject: [PATCH] mm/THP: withdraw the pgtable after pmdp related operations
 
 For architectures like ppc64 we look at deposited pgtable when
 calling pmdp_get_and_clear. So do the pgtable_trans_huge_withdraw
 after finishing pmdp related operations.
 
 Cc: Andrea Arcangeli aarca...@redhat.com
 Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
 ---
  mm/huge_memory.c |8 +++-
  1 file changed, 7 insertions(+), 1 deletion(-)

 Reviewed-by: Andrea Arcangeli aarca...@redhat.com

 
 diff --git a/mm/huge_memory.c b/mm/huge_memory.c
 index 84f3180..21c5ebd 100644
 --- a/mm/huge_memory.c
 +++ b/mm/huge_memory.c
 @@ -1363,9 +1363,15 @@ int zap_huge_pmd(struct mmu_gather *tlb, struct 
 vm_area_struct *vma,
  struct page *page;
  pgtable_t pgtable;
  pmd_t orig_pmd;
 -pgtable = pgtable_trans_huge_withdraw(tlb-mm, pmd);
 +/*
 + * For architectures like ppc64 we look at deposited pgtable
 + * when calling pmdp_get_and_clear. So do the
 + * pgtable_trans_huge_withdraw after finishing pmdp related
 + * operations.
 + */
  orig_pmd = pmdp_get_and_clear(tlb-mm, addr, pmd);
  tlb_remove_pmd_tlb_entry(tlb, pmd, addr);
 +pgtable = pgtable_trans_huge_withdraw(tlb-mm, pmd);

 So I assume you're going to check the pmdp pointer address in
 _withdraw, as the *pmd content is already clear. And that you're
 checking the deposited pmd earlier in pmdp_get_and_clear.

Yes.

 A bit
 strange overall not seeing how exactly you're using the new parameter
 and the deposited pmds, but safe.

That patch inlined below shows how we are using the new parameter.
hpte_need_hugepage_flush() shows the usage.You can find the full
series at 

https://lists.ozlabs.org/pipermail/linuxppc-dev/2013-April/105614.html

commit d77e766dc211e68208d527476d5f71aa0e06aae9
Author: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Date:   Wed Mar 6 12:50:37 2013 +0530

powerpc/THP: Implement transparent hugepages for ppc64

We now have pmd entries covering 16MB range and the PMD table double its 
original size.
We use the second half of the PMD table to deposit the pgtable (PTE page).
The depoisted PTE page is further used to track the HPTE information. The 
information
include [ secondary group | 3 bit hidx | valid ]. We use one byte per each 
HPTE entry.
With 16MB hugepage and 64K HPTE we need 256 entries and with 4K HPTE we need
4096 entries. Both will fit in a 4K PTE page. On hugepage invalidate we 
need to walk
the PTE page and invalidate all valid HPTEs.

This patch implements necessary arch specific functions for THP support and 
also
hugepage invalidate logic. These PMD related functions are intentionally 
kept
similar to their PTE counter-part.

Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com

diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index 988c812..cbf4be7 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -37,8 +37,17 @@
 #define PAGE_SIZE  (ASM_CONST(1)  PAGE_SHIFT)
 
 #ifndef __ASSEMBLY__
-#ifdef CONFIG_HUGETLB_PAGE
+/*
+ * With hugetlbfs enabled we allow the HPAGE_SHIFT to run time
+ * configurable. But we enable THP only with 16MB hugepage.
+ * With only THP configured, we force hugepage size to 16MB.
+ * This should ensure that all subarchs that doesn't support
+ * THP continue to work fine with HPAGE_SHIFT usage.
+ */
+#if defined(CONFIG_HUGETLB_PAGE)
 extern unsigned int HPAGE_SHIFT;
+#elif defined(CONFIG_TRANSPARENT_HUGEPAGE)
+#define HPAGE_SHIFT PMD_SHIFT
 #else
 #define HPAGE_SHIFT PAGE_SHIFT
 #endif
diff --git a/arch/powerpc/include/asm/pgtable-ppc64-64k.h 
b/arch/powerpc/include/asm/pgtable-ppc64-64k.h
index 45142d6..a56b82f 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64-64k.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64-64k.h
@@ -33,7 +33,8 @@
 #define PGDIR_MASK (~(PGDIR_SIZE-1))
 
 /* Bits to mask out from a PMD to get to the PTE page */
-#define PMD_MASKED_BITS0x1ff
+/* PMDs point to PTE table fragments which are 4K aligned.  */
+#define PMD_MASKED_BITS0xfff
 /* Bits to mask out from a PGD/PUD to get to the PMD page */
 #define PUD_MASKED_BITS0x1ff
 
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h 
b/arch/powerpc/include/asm/pgtable-ppc64.h
index ab84332..20133c1 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64.h
@@ -154,7 +154,7 @@
 #definepmd_present(pmd)(pmd_val(pmd) != 0)
 #define

[PATCH] powerpc/power8: fix secondary CPUs hanging on boot for HV=0

[Michael Neuling]

In __restore_cpu_power8 we determine if we are HV and if not, we return
before setting HV only resources.

Unfortunately we forgot to restore the link register from r11 before
returning.

This will happen on boot and with secondary CPUs not coming online.

This adds the missing link register restore.

Signed-off-by: Michael Neuling mi...@neuling.org

diff --git a/arch/powerpc/kernel/cpu_setup_power.S 
b/arch/powerpc/kernel/cpu_setup_power.S
index ea847ab..1167008 100644
--- a/arch/powerpc/kernel/cpu_setup_power.S
+++ b/arch/powerpc/kernel/cpu_setup_power.S
@@ -66,6 +66,7 @@ _GLOBAL(__restore_cpu_power8)
bl  __init_FSCR
mfmsr   r3
rldicl. r0,r3,4,63
+   mtlrr11
beqlr
li  r0,0
mtspr   SPRN_LPID,r0
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Re: [PATCH] powerpc/power8: fix secondary CPUs hanging on boot for HV=0

[Michael Neuling]

Michael Neuling mi...@neuling.org wrote:

 In __restore_cpu_power8 we determine if we are HV and if not, we return
 before setting HV only resources.
 
 Unfortunately we forgot to restore the link register from r11 before
 returning.
 
 This will happen on boot and with secondary CPUs not coming online.
 
 This adds the missing link register restore.
 
 Signed-off-by: Michael Neuling mi...@neuling.org

cc: sta...@kernel.org

 
 diff --git a/arch/powerpc/kernel/cpu_setup_power.S 
 b/arch/powerpc/kernel/cpu_setup_power.S
 index ea847ab..1167008 100644
 --- a/arch/powerpc/kernel/cpu_setup_power.S
 +++ b/arch/powerpc/kernel/cpu_setup_power.S
 @@ -66,6 +66,7 @@ _GLOBAL(__restore_cpu_power8)
   bl  __init_FSCR
   mfmsr   r3
   rldicl. r0,r3,4,63
 + mtlrr11
   beqlr
   li  r0,0
   mtspr   SPRN_LPID,r0
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Re: attempt to move .org backwards still show up

[Chen Gang]

On 2013年04月25日 13:36, Chen Gang wrote:
 On 2013年04月25日 12:05, Mike Qiu wrote:
 I will try, and plan to get a result within this week (2013-04-28)

 Thanks.
 Hi
 This has block my work now
 So I hope you can take a look ASAP
 Thanks
 :)
 
 The root cause is the room 0x500..0xc00 is not enough when
 KVM_HANDLER_PR expresses the real codes. The relationship is
 KVM_HANDLER_PR depend on CONFIG_KVM_BOOK3S_PR depend on
 CONFIG_KVM_BOOK3S_64_PR.
 

Sorry, the original root cause above is incorrect.

The real root cause:
   __KVMTEST is used when CONFIG_KVM_BOOK3S_PR is defined.
   MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer) includes __KVMTEST
 (it will start at 0x900 and just end at 0x980 !!)
   but STD_EXCEPTION_HV(0x980, 0x982, hdecrementer) is just started at 0x980 !

The relationship:
  dependency: __KVMTEST -- KVMTEST_PR -- CONFIG_KVM_BOOK3S_PR -- 
CONFIG_KVM_BOOK3S_64_PR
  using: MASKABLE_EXCEPTION_PSERIES -- SOFTEN_TEST_PR -- KVMTEST_PR -- 
__KVMTEST

Please reference below:
  0x93c..0x944 is just for __KVMTEST which will be inserted into when 
CONFIG_KVM_BOOK3S_PR is defined
  and the instructions of __KVMTEST are reordered for optimization.

0900 decrementer_pSeries:
 900:   7c 42 13 78 mr  r2,r2
 904:   7d b2 43 a6 mtsprg  2,r13
 908:   7d b1 42 a6 mfsprg  r13,1
 90c:   f9 2d 00 80 std r9,128(r13)
 910:   7d 20 e2 a6 mfspr   r9,896
 914:   7c 42 13 78 mr  r2,r2
 918:   f9 4d 00 88 std r10,136(r13)
 91c:   7d 5c 02 a6 mfspr   r10,28
 920:   f9 2d 00 d8 std r9,216(r13)
 924:   f9 4d 00 d0 std r10,208(r13)
 928:   7d 48 02 a6 mflrr10
 92c:   f9 4d 00 c8 std r10,200(r13)
 930:   7d 20 00 26 mfcrr9
 934:   89 4d 07 c8 lbz r10,1992(r13)
 938:   2c 0a 00 00 cmpwi   r10,0
 93c:   40 82 10 70 bne-19ac do_kvm_0x900
 940:   89 4d 02 82 lbz r10,642(r13)
 944:   2c 0a 00 00 cmpwi   r10,0
 948:   39 40 00 08 li  r10,8
 94c:   41 82 14 e4 beq-1e30 masked_interrupt
 950:   f9 6d 00 90 std r11,144(r13)
 954:   f9 8d 00 98 std r12,152(r13)
 958:   7d 52 42 a6 mfsprg  r10,2
 95c:   f9 4d 00 a0 std r10,160(r13)
 960:   e9 8d 00 18 ld  r12,24(r13)
 964:   e9 4d 00 20 ld  r10,32(r13)
 968:   7d 7a 02 a6 mfsrr0  r11
 96c:   61 8c 24 80 ori r12,r12,9344
 970:   7d 9a 03 a6 mtsrr0  r12
 974:   7d 9b 02 a6 mfsrr1  r12
 978:   7d 5b 03 a6 mtsrr1  r10
 97c:   4c 00 00 24 rfid
 980:   48 00 00 00 b   980 decrementer_pSeries+0x80


 If possible, we can by pass it: just use CONFIG_KVM_BOOK3S_64_HV instead
 of CONFIG_KVM_BOOK3S_64_PR (enter menuconfig - Virtualization - KVM
 support for POWER7 and PPC970 using hypervisor mode in host).
 
 For 'allmodconfig', it will use CONFIG_KVM_BOOK3S_64_HV instead of
 CONFIG_KVM_BOOK3S_64_PR, so 'allmodconfig' will not have this issue.
 
 
 Next, I will continue to analyse how to fix it.
 
 Welcome other members (especially the related maintainers) to provide
 suggestions and completions.
 
 Thanks.
 


-- 
Chen Gang

Asianux Corporation
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[PATCH] powerpc/85xx: Add TWR-P1025 board support

[Xie Xiaobo]

TWR-P1025 Overview
 -
 512Mbyte DDR3 (on board DDR)
 64MB Nor Flash
 eTSEC1: Connected to RGMII PHY AR8035
 eTSEC3: Connected to RGMII PHY AR8035
 Two USB2.0 Type A
 One microSD Card slot
 One mini-PCIe slot
 One mini-USB TypeB dual UART

Signed-off-by: Michael Johnston michael.johns...@freescale.com
Signed-off-by: Xie Xiaobo x@freescale.com
---
 arch/powerpc/boot/dts/p1025twr.dtsi | 244 
 arch/powerpc/boot/dts/p1025twr_32b.dts  | 135 ++
 arch/powerpc/platforms/85xx/Kconfig |   6 +
 arch/powerpc/platforms/85xx/Makefile|   1 +
 arch/powerpc/platforms/85xx/twr_p102x.c | 176 +++
 5 files changed, 562 insertions(+)
 create mode 100644 arch/powerpc/boot/dts/p1025twr.dtsi
 create mode 100644 arch/powerpc/boot/dts/p1025twr_32b.dts
 create mode 100644 arch/powerpc/platforms/85xx/twr_p102x.c

diff --git a/arch/powerpc/boot/dts/p1025twr.dtsi 
b/arch/powerpc/boot/dts/p1025twr.dtsi
new file mode 100644
index 000..0d550ad
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1025twr.dtsi
@@ -0,0 +1,244 @@
+/*
+ * P1025 TWR Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ *   names of its contributors may be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License (GPL) as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 
THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/{
+   aliases {
+   ethernet3 = enet3;
+   ethernet4 = enet4;
+   };
+};
+
+lbc {
+   nor@0,0 {
+   #address-cells = 1;
+   #size-cells = 1;
+   compatible = cfi-flash;
+   reg = 0x0 0x0 0x400;
+   bank-width = 2;
+   device-width = 1;
+
+   partition@0 {
+   /* This location must not be altered  */
+   /* 256KB for Vitesse 7385 Switch firmware */
+   reg = 0x0 0x0004;
+   label = NOR Vitesse-7385 Firmware;
+   read-only;
+   };
+
+   partition@4 {
+   /* 256KB for DTB Image */
+   reg = 0x0004 0x0004;
+   label = NOR DTB Image;
+   };
+
+   partition@8 {
+   /* 3.5 MB for Linux Kernel Image */
+   reg = 0x0008 0x0038;
+   label = NOR Linux Kernel Image;
+   };
+
+   partition@40 {
+   /* 58.75MB for JFFS2 based Root file System */
+   reg = 0x0040 0x03ac;
+   label = NOR JFFS2 Root File System;
+   };
+
+   partition@ec {
+   /* This location must not be altered  */
+   /* 256KB for QE ucode firmware*/
+   reg = 0x03ec 0x0004;
+   label = NOR QE microcode firmware;
+   read-only;
+   };
+
+   partition@f0 {
+   /* This location must not be altered  */
+   /* 512KB for u-boot Bootloader Image */
+   /* 512KB for u-boot Environment Variables */
+   reg = 0x03f0 0x0010;
+   label 

Re: [PATCH 4/7] powerpc/powernv: Patch MSI EOI handler on P8

[Gavin Shan]

On Thu, Apr 25, 2013 at 06:49:40AM +1000, Benjamin Herrenschmidt wrote:
On Wed, 2013-04-24 at 17:37 +0800, Gavin Shan wrote:
 The EOI handler of MSI/MSI-X interrupts for P8 (PHB3) need additional
 steps to handle the P/Q bits in IVE before EOIing the corresponding
 interrupt. The patch changes the EOI handler to cover that.

 .../...

  static void pnv_pci_init_ioda_msis(struct pnv_phb *phb)
  {
  unsigned int count;
 @@ -667,6 +681,8 @@ static void pnv_pci_init_ioda_msis(struct pnv_phb *phb)
  }
  
  phb-msi_setup = pnv_pci_ioda_msi_setup;
 +if (phb-type == PNV_PHB_IODA2)
 +phb-msi_eoi = pnv_pci_ioda_msi_eoi;

Ouch, another function pointer call in a hot path...


Yeah. I've removed it in next version (not send out yet) :-)

  phb-msi32_support = 1;
  pr_info(  Allocated bitmap for %d MSIs (base IRQ 0x%x)\n,
  count, phb-msi_base);
 diff --git a/arch/powerpc/platforms/powernv/pci.c 
 b/arch/powerpc/platforms/powernv/pci.c
 index a11b5a6..ea6a93d 100644
 --- a/arch/powerpc/platforms/powernv/pci.c
 +++ b/arch/powerpc/platforms/powernv/pci.c
 @@ -115,6 +115,25 @@ static void pnv_teardown_msi_irqs(struct pci_dev *pdev)
  irq_dispose_mapping(entry-irq);
  }
  }
 +
 +int pnv_pci_msi_eoi(unsigned int hw_irq)
 +{
 +struct pci_controller *hose, *tmp;
 +struct pnv_phb *phb = NULL;
 +
 +list_for_each_entry_safe(hose, tmp, hose_list, list_node) {
 +phb = hose-private_data;
 +if (hw_irq = phb-msi_base 
 +hw_irq  phb-msi_base + phb-msi_bmp.irq_count) {
 +if (!phb-msi_eoi)
 +return -EEXIST;
 +return phb-msi_eoi(phb, hw_irq);
 +}
 +}
 +
 +/* For LSI interrupts, we needn't do it */
 +return 0;
 +}

And a list walk ... that's not right.

Also, you do it for all XICS interrupts, including the non-PCI ones, the
LSIs, etc... only to figure out that some might not be MSIs later in
the loop.

Why not instead look at changing the irq_chip for the MSIs ?

IE. When setting up the MSIs for IODA2, use a different irq_chip which
is a copy of the original one with a different -eoi callback, which
does the original xics eoi and then the OPAL stuff ?

You might even be able to use something like container_of to get back
to the struct phb, no need to iterate them all.


Thanks for the detailed explaining, Ben.

I found irq_data hasn't been fully utilized until this moment. I already
have code to start use that. Firstly, irq_data is set to the PHB OPAL ID
or invalid value (0xffs) during mapping stage (there, we call 
irq_set_chip_data()
to trace the PHB OPAL ID or invalid value). Before EOIing the interrupt, we
will check irq_data and do special handling on P/Q bits if it has valid value.
With it, the hot path should be fast enough and the function pointer 
(mentioned
above) can be removed.

Thanks,
Gavin

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Re: [PATCH 4/7] powerpc/powernv: Patch MSI EOI handler on P8

[Gavin Shan]

On Thu, Apr 25, 2013 at 04:08:37PM +0800, Gavin Shan wrote:
On Thu, Apr 25, 2013 at 06:49:40AM +1000, Benjamin Herrenschmidt wrote:
On Wed, 2013-04-24 at 17:37 +0800, Gavin Shan wrote:
 The EOI handler of MSI/MSI-X interrupts for P8 (PHB3) need additional
 steps to handle the P/Q bits in IVE before EOIing the corresponding
 interrupt. The patch changes the EOI handler to cover that.

 .../...


.../...

 diff --git a/arch/powerpc/platforms/powernv/pci.c 
 b/arch/powerpc/platforms/powernv/pci.c
 index a11b5a6..ea6a93d 100644
 --- a/arch/powerpc/platforms/powernv/pci.c
 +++ b/arch/powerpc/platforms/powernv/pci.c
 @@ -115,6 +115,25 @@ static void pnv_teardown_msi_irqs(struct pci_dev *pdev)
 irq_dispose_mapping(entry-irq);
 }
  }
 +
 +int pnv_pci_msi_eoi(unsigned int hw_irq)
 +{
 +   struct pci_controller *hose, *tmp;
 +   struct pnv_phb *phb = NULL;
 +
 +   list_for_each_entry_safe(hose, tmp, hose_list, list_node) {
 +   phb = hose-private_data;
 +   if (hw_irq = phb-msi_base 
 +   hw_irq  phb-msi_base + phb-msi_bmp.irq_count) {
 +   if (!phb-msi_eoi)
 +   return -EEXIST;
 +   return phb-msi_eoi(phb, hw_irq);
 +   }
 +   }
 +
 +   /* For LSI interrupts, we needn't do it */
 +   return 0;
 +}

And a list walk ... that's not right.

Also, you do it for all XICS interrupts, including the non-PCI ones, the
LSIs, etc... only to figure out that some might not be MSIs later in
the loop.

Why not instead look at changing the irq_chip for the MSIs ?

IE. When setting up the MSIs for IODA2, use a different irq_chip which
is a copy of the original one with a different -eoi callback, which
does the original xics eoi and then the OPAL stuff ?

You might even be able to use something like container_of to get back
to the struct phb, no need to iterate them all.


Thanks for the detailed explaining, Ben.

I found irq_data hasn't been fully utilized until this moment. I already
have code to start use that. Firstly, irq_data is set to the PHB OPAL ID
or invalid value (0xffs) during mapping stage (there, we call 
irq_set_chip_data()
to trace the PHB OPAL ID or invalid value). Before EOIing the interrupt, we
will check irq_data and do special handling on P/Q bits if it has valid 
value.
With it, the hot path should be fast enough and the function pointer 
(mentioned
above) can be removed.


It should be chip_data (not irq_data). Hopefully, you haven't
get time to see the reply. Otherwise, it would a bit confused ;-)

Thanks,
Gavin

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[PATCH] PowerPC: kernel: compiling issue, make additional room in exception vector area

[Chen Gang]

When CONFIG_KVM_BOOK3S_64_PR is enabled,
MASKABLE_EXCEPTION_PSERIES(0x900 ...) will includes __KVMTEST, it will
exceed 0x980 which STD_EXCEPTION_HV(0x980 ...) will use, it will cause
compiling issue.

The related errors:
arch/powerpc/kernel/exceptions-64s.S: Assembler messages:
arch/powerpc/kernel/exceptions-64s.S:258: Error: attempt to move .org backwards
make[1]: *** [arch/powerpc/kernel/head_64.o] Error 1


Signed-off-by: Chen Gang gang.c...@asianux.com
---
 arch/powerpc/include/asm/kvm_asm.h   |2 +-
 arch/powerpc/kernel/exceptions-64s.S |6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_asm.h 
b/arch/powerpc/include/asm/kvm_asm.h
index b9dd382..2c65bae 100644
--- a/arch/powerpc/include/asm/kvm_asm.h
+++ b/arch/powerpc/include/asm/kvm_asm.h
@@ -86,7 +86,7 @@
 #define BOOK3S_INTERRUPT_PROGRAM   0x700
 #define BOOK3S_INTERRUPT_FP_UNAVAIL0x800
 #define BOOK3S_INTERRUPT_DECREMENTER   0x900
-#define BOOK3S_INTERRUPT_HV_DECREMENTER0x980
+#define BOOK3S_INTERRUPT_HV_DECREMENTER0x988
 #define BOOK3S_INTERRUPT_SYSCALL   0xc00
 #define BOOK3S_INTERRUPT_TRACE 0xd00
 #define BOOK3S_INTERRUPT_H_DATA_STORAGE0xe00
diff --git a/arch/powerpc/kernel/exceptions-64s.S 
b/arch/powerpc/kernel/exceptions-64s.S
index e789ee7..bb0e677 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -255,7 +255,7 @@ hardware_interrupt_hv:
KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
 
MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
-   STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
+   STD_EXCEPTION_HV(0x988, 0x982, hdecrementer)
 
MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
@@ -698,7 +698,7 @@ machine_check_common:
 
STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
-   STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt)
+   STD_EXCEPTION_COMMON(0x988, hdecrementer, .hdec_interrupt)
 #ifdef CONFIG_PPC_DOORBELL
STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, .doorbell_exception)
 #else
@@ -802,7 +802,7 @@ hardware_interrupt_relon_hv:
STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check)
STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable)
MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer)
-   STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer)
+   STD_RELON_EXCEPTION_HV(0x4988, 0x982, hdecrementer)
MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super)
STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b)
 
-- 
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Re: [PATCH] PowerPC: kernel: compiling issue, make additional room in exception vector area

[Chen Gang]

Hello Mike:

Please try this patch, at least it can pass compiling with the config
file which you provided under my cross-compiling envrionments.

I do not give a running test now, so better to try to run the new kernel
with this patch.

Thanks.

On 2013年04月25日 16:18, Chen Gang wrote:
 
 When CONFIG_KVM_BOOK3S_64_PR is enabled,
 MASKABLE_EXCEPTION_PSERIES(0x900 ...) will includes __KVMTEST, it will
 exceed 0x980 which STD_EXCEPTION_HV(0x980 ...) will use, it will cause
 compiling issue.
 
 The related errors:
 arch/powerpc/kernel/exceptions-64s.S: Assembler messages:
 arch/powerpc/kernel/exceptions-64s.S:258: Error: attempt to move .org 
 backwards
 make[1]: *** [arch/powerpc/kernel/head_64.o] Error 1
 
 
 Signed-off-by: Chen Gang gang.c...@asianux.com
 ---
  arch/powerpc/include/asm/kvm_asm.h   |2 +-
  arch/powerpc/kernel/exceptions-64s.S |6 +++---
  2 files changed, 4 insertions(+), 4 deletions(-)
 
 diff --git a/arch/powerpc/include/asm/kvm_asm.h 
 b/arch/powerpc/include/asm/kvm_asm.h
 index b9dd382..2c65bae 100644
 --- a/arch/powerpc/include/asm/kvm_asm.h
 +++ b/arch/powerpc/include/asm/kvm_asm.h
 @@ -86,7 +86,7 @@
  #define BOOK3S_INTERRUPT_PROGRAM 0x700
  #define BOOK3S_INTERRUPT_FP_UNAVAIL  0x800
  #define BOOK3S_INTERRUPT_DECREMENTER 0x900
 -#define BOOK3S_INTERRUPT_HV_DECREMENTER  0x980
 +#define BOOK3S_INTERRUPT_HV_DECREMENTER  0x988
  #define BOOK3S_INTERRUPT_SYSCALL 0xc00
  #define BOOK3S_INTERRUPT_TRACE   0xd00
  #define BOOK3S_INTERRUPT_H_DATA_STORAGE  0xe00
 diff --git a/arch/powerpc/kernel/exceptions-64s.S 
 b/arch/powerpc/kernel/exceptions-64s.S
 index e789ee7..bb0e677 100644
 --- a/arch/powerpc/kernel/exceptions-64s.S
 +++ b/arch/powerpc/kernel/exceptions-64s.S
 @@ -255,7 +255,7 @@ hardware_interrupt_hv:
   KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
  
   MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
 - STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
 + STD_EXCEPTION_HV(0x988, 0x982, hdecrementer)
  
   MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
   KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
 @@ -698,7 +698,7 @@ machine_check_common:
  
   STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
   STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
 - STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt)
 + STD_EXCEPTION_COMMON(0x988, hdecrementer, .hdec_interrupt)
  #ifdef CONFIG_PPC_DOORBELL
   STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, .doorbell_exception)
  #else
 @@ -802,7 +802,7 @@ hardware_interrupt_relon_hv:
   STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check)
   STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable)
   MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer)
 - STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer)
 + STD_RELON_EXCEPTION_HV(0x4988, 0x982, hdecrementer)
   MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super)
   STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b)
  
 


-- 
Chen Gang

Asianux Corporation
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Re: [PATCH] PowerPC: kernel: compiling issue, make additional room in exception vector area

[Mike Qiu]

于 2013/4/25 16:21, Chen Gang 写道:

Hello Mike:

Please try this patch, at least it can pass compiling with the config
file which you provided under my cross-compiling envrionments.

I do not give a running test now, so better to try to run the new kernel
with this patch.

OK, I will use your patch, and I will send out the result later.

Thanks

Mike

Thanks.

On 2013年04月25日 16:18, Chen Gang wrote:

When CONFIG_KVM_BOOK3S_64_PR is enabled,
MASKABLE_EXCEPTION_PSERIES(0x900 ...) will includes __KVMTEST, it will
exceed 0x980 which STD_EXCEPTION_HV(0x980 ...) will use, it will cause
compiling issue.

The related errors:
arch/powerpc/kernel/exceptions-64s.S: Assembler messages:
arch/powerpc/kernel/exceptions-64s.S:258: Error: attempt to move .org backwards
make[1]: *** [arch/powerpc/kernel/head_64.o] Error 1


Signed-off-by: Chen Gang gang.c...@asianux.com
---
  arch/powerpc/include/asm/kvm_asm.h   |2 +-
  arch/powerpc/kernel/exceptions-64s.S |6 +++---
  2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_asm.h 
b/arch/powerpc/include/asm/kvm_asm.h
index b9dd382..2c65bae 100644
--- a/arch/powerpc/include/asm/kvm_asm.h
+++ b/arch/powerpc/include/asm/kvm_asm.h
@@ -86,7 +86,7 @@
  #define BOOK3S_INTERRUPT_PROGRAM  0x700
  #define BOOK3S_INTERRUPT_FP_UNAVAIL   0x800
  #define BOOK3S_INTERRUPT_DECREMENTER  0x900
-#define BOOK3S_INTERRUPT_HV_DECREMENTER0x980
+#define BOOK3S_INTERRUPT_HV_DECREMENTER0x988
  #define BOOK3S_INTERRUPT_SYSCALL  0xc00
  #define BOOK3S_INTERRUPT_TRACE0xd00
  #define BOOK3S_INTERRUPT_H_DATA_STORAGE   0xe00
diff --git a/arch/powerpc/kernel/exceptions-64s.S 
b/arch/powerpc/kernel/exceptions-64s.S
index e789ee7..bb0e677 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -255,7 +255,7 @@ hardware_interrupt_hv:
KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
  
  	MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)

-   STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
+   STD_EXCEPTION_HV(0x988, 0x982, hdecrementer)
  
  	MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)

KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
@@ -698,7 +698,7 @@ machine_check_common:
  
  	STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)

STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
-   STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt)
+   STD_EXCEPTION_COMMON(0x988, hdecrementer, .hdec_interrupt)
  #ifdef CONFIG_PPC_DOORBELL
STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, .doorbell_exception)
  #else
@@ -802,7 +802,7 @@ hardware_interrupt_relon_hv:
STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check)
STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable)
MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer)
-   STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer)
+   STD_RELON_EXCEPTION_HV(0x4988, 0x982, hdecrementer)
MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super)
STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b)
  





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Re: [PATCH 5/7] powerpc/powernv: TCE invalidation for PHB3

[Gavin Shan]

On Thu, Apr 25, 2013 at 06:52:37AM +1000, Benjamin Herrenschmidt wrote:

 diff --git a/arch/powerpc/include/asm/iommu.h 
 b/arch/powerpc/include/asm/iommu.h
 index cbfe678..0db308e 100644
 --- a/arch/powerpc/include/asm/iommu.h
 +++ b/arch/powerpc/include/asm/iommu.h
 @@ -76,6 +76,7 @@ struct iommu_table {
  struct iommu_pool large_pool;
  struct iommu_pool pools[IOMMU_NR_POOLS];
  unsigned long *it_map;   /* A simple allocation bitmap for now */
 +void *sysdata;
  };

You should be able to avoid adding that field by using the container_of
trick to get to the PE and moving the iommu ops for ioda into pci-ioda.c
instead of sharing them with the non-ioda stuff.


Yep. I will introduce one function pnv_pci_ioda_tce_invalidate() to pci-ioda.c
and jump to IODA1/IODA2 cases there. By the way, I will introduce one addtional
field struct pnv_phb *phb to struct pnv_ioda_pe.

Thanks,
Gavin

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Re: [PATCH 4/7] powerpc/powernv: Patch MSI EOI handler on P8

[Benjamin Herrenschmidt]

On Thu, 2013-04-25 at 16:13 +0800, Gavin Shan wrote:
 It should be chip_data (not irq_data). Hopefully, you haven't
 get time to see the reply. Otherwise, it would a bit confused ;-)

Doesn't ics-opal already use chip_data ?

I was thinking just duplicating the irq_chip (including chip_data) so it
can be used by ics-opal just fine for all calls, just then overriding
the eoi callback and using container_of to get to the PHB.

Any reason that wouldn't work ?

Cheers,
Ben.


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Re: [PATCH] PowerPC: kernel: compiling issue, make additional room in exception vector area

[Michael Neuling]

Chen Gang gang.c...@asianux.com wrote:

 
 When CONFIG_KVM_BOOK3S_64_PR is enabled,
 MASKABLE_EXCEPTION_PSERIES(0x900 ...) will includes __KVMTEST, it will
 exceed 0x980 which STD_EXCEPTION_HV(0x980 ...) will use, it will cause
 compiling issue.
 
 The related errors:
 arch/powerpc/kernel/exceptions-64s.S: Assembler messages:
 arch/powerpc/kernel/exceptions-64s.S:258: Error: attempt to move .org 
 backwards
 make[1]: *** [arch/powerpc/kernel/head_64.o] Error 1

This doesn't work at all.  It might compile but it's never going to
actually work.

Comments below.

 
 
 Signed-off-by: Chen Gang gang.c...@asianux.com
 ---
  arch/powerpc/include/asm/kvm_asm.h   |2 +-
  arch/powerpc/kernel/exceptions-64s.S |6 +++---
  2 files changed, 4 insertions(+), 4 deletions(-)
 
 diff --git a/arch/powerpc/include/asm/kvm_asm.h 
 b/arch/powerpc/include/asm/kvm_asm.h
 index b9dd382..2c65bae 100644
 --- a/arch/powerpc/include/asm/kvm_asm.h
 +++ b/arch/powerpc/include/asm/kvm_asm.h
 @@ -86,7 +86,7 @@
  #define BOOK3S_INTERRUPT_PROGRAM 0x700
  #define BOOK3S_INTERRUPT_FP_UNAVAIL  0x800
  #define BOOK3S_INTERRUPT_DECREMENTER 0x900
 -#define BOOK3S_INTERRUPT_HV_DECREMENTER  0x980
 +#define BOOK3S_INTERRUPT_HV_DECREMENTER  0x988

This is hardwird in the architecture.. you can't just move it

  #define BOOK3S_INTERRUPT_SYSCALL 0xc00
  #define BOOK3S_INTERRUPT_TRACE   0xd00
  #define BOOK3S_INTERRUPT_H_DATA_STORAGE  0xe00
 diff --git a/arch/powerpc/kernel/exceptions-64s.S 
 b/arch/powerpc/kernel/exceptions-64s.S
 index e789ee7..bb0e677 100644
 --- a/arch/powerpc/kernel/exceptions-64s.S
 +++ b/arch/powerpc/kernel/exceptions-64s.S
 @@ -255,7 +255,7 @@ hardware_interrupt_hv:
   KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
  
   MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
 - STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
 + STD_EXCEPTION_HV(0x988, 0x982, hdecrementer)

Same here

  
   MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
   KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
 @@ -698,7 +698,7 @@ machine_check_common:
  
   STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
   STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
 - STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt)
 + STD_EXCEPTION_COMMON(0x988, hdecrementer, .hdec_interrupt)

... and here

  #ifdef CONFIG_PPC_DOORBELL
   STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, .doorbell_exception)
  #else
 @@ -802,7 +802,7 @@ hardware_interrupt_relon_hv:
   STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check)
   STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable)
   MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer)
 - STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer)
 + STD_RELON_EXCEPTION_HV(0x4988, 0x982, hdecrementer)

... and here

   MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super)
   STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b)
  
 -- 
 1.7.7.6
 
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Re: [PATCH] PowerPC: kernel: compiling issue, make additional room in exception vector area

[Chen Gang]

On 2013年04月25日 17:00, Michael Neuling wrote:
  
  Signed-off-by: Chen Gang gang.c...@asianux.com
  ---
   arch/powerpc/include/asm/kvm_asm.h   |2 +-
   arch/powerpc/kernel/exceptions-64s.S |6 +++---
   2 files changed, 4 insertions(+), 4 deletions(-)
  
  diff --git a/arch/powerpc/include/asm/kvm_asm.h 
  b/arch/powerpc/include/asm/kvm_asm.h
  index b9dd382..2c65bae 100644
  --- a/arch/powerpc/include/asm/kvm_asm.h
  +++ b/arch/powerpc/include/asm/kvm_asm.h
  @@ -86,7 +86,7 @@
   #define BOOK3S_INTERRUPT_PROGRAM  0x700
   #define BOOK3S_INTERRUPT_FP_UNAVAIL   0x800
   #define BOOK3S_INTERRUPT_DECREMENTER  0x900
  -#define BOOK3S_INTERRUPT_HV_DECREMENTER   0x980
  +#define BOOK3S_INTERRUPT_HV_DECREMENTER   0x988
 This is hardwird in the architecture.. you can't just move it
 

OK, thank you, I need continue to fix it. It seems we have to read the
details to shrink one instruction (4 bytes), at least.

Welcome additional suggestions or completions.

Thanks.

-- 
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Re: [PATCH] PowerPC: kernel: compiling issue, make additional room in exception vector area

[Chen Gang]

On 2013年04月25日 17:05, Chen Gang wrote:
 On 2013年04月25日 17:00, Michael Neuling wrote:

 Signed-off-by: Chen Gang gang.c...@asianux.com
 ---
  arch/powerpc/include/asm/kvm_asm.h   |2 +-
  arch/powerpc/kernel/exceptions-64s.S |6 +++---
  2 files changed, 4 insertions(+), 4 deletions(-)

 diff --git a/arch/powerpc/include/asm/kvm_asm.h 
 b/arch/powerpc/include/asm/kvm_asm.h
 index b9dd382..2c65bae 100644
 --- a/arch/powerpc/include/asm/kvm_asm.h
 +++ b/arch/powerpc/include/asm/kvm_asm.h
 @@ -86,7 +86,7 @@
  #define BOOK3S_INTERRUPT_PROGRAM  0x700
  #define BOOK3S_INTERRUPT_FP_UNAVAIL   0x800
  #define BOOK3S_INTERRUPT_DECREMENTER  0x900
 -#define BOOK3S_INTERRUPT_HV_DECREMENTER   0x980
 +#define BOOK3S_INTERRUPT_HV_DECREMENTER   0x988
 This is hardwird in the architecture.. you can't just move it

 

I think of a way to solve it: we just move the related code to another
area, after enter the original entry (e.g. 0x900), we let it jump to
that area to excuse the related code.

:-)

 OK, thank you, I need continue to fix it. It seems we have to read the
 details to shrink one instruction (4 bytes), at least.
 
 Welcome additional suggestions or completions.
 
 Thanks.
 


-- 
Chen Gang

Asianux Corporation
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[RFC PATCH 0/3] Unify definations of struct pci_controller

[Andrew Murray]

PowerPC and Microblaze have nearly identical definations of struct
pci_controller - this patch unifies them in asm-generic to reduce
code duplication and to allow new architectures to reuse.

This patchset follows and depends on of/pci: Provide common
support for PCI DT parsing which provided common 'ranges' parsing
code which uses an architecture defined struct pci_controller. This
patch is currently in Jason Coopers mvebu-next/pcie branch.

It is hoped this will pave the way for providing common
implementations of commonly duplicated functions found across the
architectures such as pcibios_alloc|free_controller and
pcibios_setup_phb_resources type functions.

Andrew Murray (3):
  powerpc: Move struct pci_controller to asm-generic
  microblaze: Use asm-generic version of pci_controller
  pci: Use common definations of INDIRECT_TYPE_*

 arch/microblaze/include/asm/pci-bridge.h |   70 +---
 arch/powerpc/include/asm/pci-bridge.h|   82 ---
 arch/powerpc/sysdev/fsl_pci.c|   16 +++---
 arch/powerpc/sysdev/indirect_pci.c   |   20 +++---
 arch/powerpc/sysdev/ppc4xx_pci.c |4 +-
 arch/powerpc/sysdev/xilinx_pci.c |2 +-
 include/asm-generic/pci-bridge.h |   90 ++
 7 files changed, 112 insertions(+), 172 deletions(-)

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[RFC PATCH 1/3] powerpc: Move struct pci_controller to asm-generic

[Andrew Murray]

This patch moves struct pci_controller into asm-generic to allow
for use by other architectures thus reducing code duplication in
the kernel.

Signed-off-by: Andrew Murray andrew.mur...@arm.com
---
 arch/powerpc/include/asm/pci-bridge.h |   87 +---
 include/asm-generic/pci-bridge.h  |   68 +
 2 files changed, 82 insertions(+), 73 deletions(-)

diff --git a/arch/powerpc/include/asm/pci-bridge.h 
b/arch/powerpc/include/asm/pci-bridge.h
index 205bfba..163bd40 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -8,7 +8,6 @@
  * 2 of the License, or (at your option) any later version.
  */
 #include linux/pci.h
-#include linux/list.h
 #include linux/ioport.h
 #include linux/of_pci.h
 #include asm-generic/pci-bridge.h
@@ -16,85 +15,27 @@
 struct device_node;
 
 /*
- * Structure of a PCI controller (host bridge)
+ * Used for variants of PCI indirect handling and possible quirks:
+ *  SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
+ *  EXT_REG - provides access to PCI-e extended registers
+ *  SURPRESS_PRIMARY_BUS - we suppress the setting of PCI_PRIMARY_BUS
+ *   on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS
+ *   to determine which bus number to match on when generating type0
+ *   config cycles
+ *  NO_PCIE_LINK - the Freescale PCI-e controllers have issues with
+ *   hanging if we don't have link and try to do config cycles to
+ *   anything but the PHB.  Only allow talking to the PHB if this is
+ *   set.
+ *  BIG_ENDIAN - cfg_addr is a big endian register
+ *  BROKEN_MRM - the 440EPx/GRx chips have an errata that causes hangs on
+ *   the PLB4.  Effectively disable MRM commands by setting this.
  */
-struct pci_controller {
-   struct pci_bus *bus;
-   char is_dynamic;
-#ifdef CONFIG_PPC64
-   int node;
-#endif
-   struct device_node *dn;
-   struct list_head list_node;
-   struct device *parent;
-
-   int first_busno;
-   int last_busno;
-   int self_busno;
-   struct resource busn;
-
-   void __iomem *io_base_virt;
-#ifdef CONFIG_PPC64
-   void *io_base_alloc;
-#endif
-   resource_size_t io_base_phys;
-   resource_size_t pci_io_size;
-
-   /* Some machines (PReP) have a non 1:1 mapping of
-* the PCI memory space in the CPU bus space
-*/
-   resource_size_t pci_mem_offset;
-
-   /* Some machines have a special region to forward the ISA
-* memory cycles such as VGA memory regions. Left to 0
-* if unsupported
-*/
-   resource_size_t isa_mem_phys;
-   resource_size_t isa_mem_size;
-
-   struct pci_ops *ops;
-   unsigned int __iomem *cfg_addr;
-   void __iomem *cfg_data;
-
-   /*
-* Used for variants of PCI indirect handling and possible quirks:
-*  SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
-*  EXT_REG - provides access to PCI-e extended registers
-*  SURPRESS_PRIMARY_BUS - we suppress the setting of PCI_PRIMARY_BUS
-*   on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS
-*   to determine which bus number to match on when generating type0
-*   config cycles
-*  NO_PCIE_LINK - the Freescale PCI-e controllers have issues with
-*   hanging if we don't have link and try to do config cycles to
-*   anything but the PHB.  Only allow talking to the PHB if this is
-*   set.
-*  BIG_ENDIAN - cfg_addr is a big endian register
-*  BROKEN_MRM - the 440EPx/GRx chips have an errata that causes hangs 
on
-*   the PLB4.  Effectively disable MRM commands by setting this.
-*/
 #define PPC_INDIRECT_TYPE_SET_CFG_TYPE 0x0001
 #define PPC_INDIRECT_TYPE_EXT_REG  0x0002
 #define PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS 0x0004
 #define PPC_INDIRECT_TYPE_NO_PCIE_LINK 0x0008
 #define PPC_INDIRECT_TYPE_BIG_ENDIAN   0x0010
 #define PPC_INDIRECT_TYPE_BROKEN_MRM   0x0020
-   u32 indirect_type;
-   /* Currently, we limit ourselves to 1 IO range and 3 mem
-* ranges since the common pci_bus structure can't handle more
-*/
-   struct resource io_resource;
-   struct resource mem_resources[3];
-   int global_number;  /* PCI domain number */
-
-   resource_size_t dma_window_base_cur;
-   resource_size_t dma_window_size;
-
-#ifdef CONFIG_PPC64
-   unsigned long buid;
-
-   void *private_data;
-#endif /* CONFIG_PPC64 */
-};
 
 /* These are used for config access before all the PCI probing
has been done. */
diff --git a/include/asm-generic/pci-bridge.h b/include/asm-generic/pci-bridge.h
index 20db2e5..e58830e 100644
--- a/include/asm-generic/pci-bridge.h
+++ b/include/asm-generic/pci-bridge.h
@@ -9,6 +9,9 @@
 
 #ifdef __KERNEL__
 
+#include linux/pci.h
+#include linux/list.h
+
 enum {

[RFC PATCH 2/3] microblaze: Use asm-generic version of pci_controller

[Andrew Murray]

This patch removes struct pci_controller from Microblaze and instead
uses struct pci_controller from asm-generic.

Signed-off-by: Andrew Murray andrew.mur...@arm.com
---
 arch/microblaze/include/asm/pci-bridge.h |   75 ++
 include/asm-generic/pci-bridge.h |2 +-
 2 files changed, 16 insertions(+), 61 deletions(-)

diff --git a/arch/microblaze/include/asm/pci-bridge.h 
b/arch/microblaze/include/asm/pci-bridge.h
index 5783cd6..0ee75dc 100644
--- a/arch/microblaze/include/asm/pci-bridge.h
+++ b/arch/microblaze/include/asm/pci-bridge.h
@@ -8,9 +8,9 @@
  * 2 of the License, or (at your option) any later version.
  */
 #include linux/pci.h
-#include linux/list.h
 #include linux/ioport.h
 #include linux/of_pci.h
+#include asm-generic/pci-bridge.h
 
 struct device_node;
 
@@ -25,72 +25,27 @@ static inline int pcibios_vaddr_is_ioport(void __iomem 
*address)
 #endif
 
 /*
- * Structure of a PCI controller (host bridge)
+ * Used for variants of PCI indirect handling and possible quirks:
+ *  SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
+ *  EXT_REG - provides access to PCI-e extended registers
+ *  SURPRESS_PRIMARY_BUS - we suppress the setting of PCI_PRIMARY_BUS
+ *   on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS
+ *   to determine which bus number to match on when generating type0
+ *   config cycles
+ *  NO_PCIE_LINK - the Freescale PCI-e controllers have issues with
+ *   hanging if we don't have link and try to do config cycles to
+ *   anything but the PHB.  Only allow talking to the PHB if this is
+ *   set.
+ *  BIG_ENDIAN - cfg_addr is a big endian register
+ *  BROKEN_MRM - the 440EPx/GRx chips have an errata that causes hangs
+ *   on the PLB4.  Effectively disable MRM commands by setting this.
  */
-struct pci_controller {
-   struct pci_bus *bus;
-   char is_dynamic;
-   struct device_node *dn;
-   struct list_head list_node;
-   struct device *parent;
-
-   int first_busno;
-   int last_busno;
-
-   int self_busno;
-
-   void __iomem *io_base_virt;
-   resource_size_t io_base_phys;
-
-   resource_size_t pci_io_size;
-
-   /* Some machines (PReP) have a non 1:1 mapping of
-* the PCI memory space in the CPU bus space
-*/
-   resource_size_t pci_mem_offset;
-
-   /* Some machines have a special region to forward the ISA
-* memory cycles such as VGA memory regions. Left to 0
-* if unsupported
-*/
-   resource_size_t isa_mem_phys;
-   resource_size_t isa_mem_size;
-
-   struct pci_ops *ops;
-   unsigned int __iomem *cfg_addr;
-   void __iomem *cfg_data;
-
-   /*
-* Used for variants of PCI indirect handling and possible quirks:
-*  SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
-*  EXT_REG - provides access to PCI-e extended registers
-*  SURPRESS_PRIMARY_BUS - we suppress the setting of PCI_PRIMARY_BUS
-*   on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS
-*   to determine which bus number to match on when generating type0
-*   config cycles
-*  NO_PCIE_LINK - the Freescale PCI-e controllers have issues with
-*   hanging if we don't have link and try to do config cycles to
-*   anything but the PHB.  Only allow talking to the PHB if this is
-*   set.
-*  BIG_ENDIAN - cfg_addr is a big endian register
-*  BROKEN_MRM - the 440EPx/GRx chips have an errata that causes hangs
-*   on the PLB4.  Effectively disable MRM commands by setting this.
-*/
 #define INDIRECT_TYPE_SET_CFG_TYPE 0x0001
 #define INDIRECT_TYPE_EXT_REG  0x0002
 #define INDIRECT_TYPE_SURPRESS_PRIMARY_BUS 0x0004
 #define INDIRECT_TYPE_NO_PCIE_LINK 0x0008
 #define INDIRECT_TYPE_BIG_ENDIAN   0x0010
 #define INDIRECT_TYPE_BROKEN_MRM   0x0020
-   u32 indirect_type;
-
-   /* Currently, we limit ourselves to 1 IO range and 3 mem
-* ranges since the common pci_bus structure can't handle more
-*/
-   struct resource io_resource;
-   struct resource mem_resources[3];
-   int global_number;  /* PCI domain number */
-};
 
 #ifdef CONFIG_PCI
 static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
diff --git a/include/asm-generic/pci-bridge.h b/include/asm-generic/pci-bridge.h
index e58830e..1a7f96d 100644
--- a/include/asm-generic/pci-bridge.h
+++ b/include/asm-generic/pci-bridge.h
@@ -46,7 +46,7 @@ struct device_node;
 /*
  * Structure of a PCI controller (host bridge)
  */
-#if defined(CONFIG_PPC32) || defined(CONFIG_PPC64)
+#if defined(CONFIG_PPC32) || defined(CONFIG_PPC64) || 
defined(CONFIG_MICROBLAZE)
 struct pci_controller {
struct pci_bus *bus;
char is_dynamic;
-- 
1.7.0.4

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[RFC PATCH 3/3] pci: Use common definations of INDIRECT_TYPE_*

[Andrew Murray]

This patch unifies similar definations of INDIRECT_TYPE_* between
PowerPC and Microblaze.

Signed-off-by: Andrew Murray andrew.mur...@arm.com
---
 arch/microblaze/include/asm/pci-bridge.h |   23 ---
 arch/powerpc/include/asm/pci-bridge.h|   23 ---
 arch/powerpc/sysdev/fsl_pci.c|   16 
 arch/powerpc/sysdev/indirect_pci.c   |   20 ++--
 arch/powerpc/sysdev/ppc4xx_pci.c |4 ++--
 arch/powerpc/sysdev/xilinx_pci.c |2 +-
 include/asm-generic/pci-bridge.h |   22 ++
 7 files changed, 43 insertions(+), 67 deletions(-)

diff --git a/arch/microblaze/include/asm/pci-bridge.h 
b/arch/microblaze/include/asm/pci-bridge.h
index 0ee75dc..acf8252 100644
--- a/arch/microblaze/include/asm/pci-bridge.h
+++ b/arch/microblaze/include/asm/pci-bridge.h
@@ -24,29 +24,6 @@ static inline int pcibios_vaddr_is_ioport(void __iomem 
*address)
 }
 #endif
 
-/*
- * Used for variants of PCI indirect handling and possible quirks:
- *  SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
- *  EXT_REG - provides access to PCI-e extended registers
- *  SURPRESS_PRIMARY_BUS - we suppress the setting of PCI_PRIMARY_BUS
- *   on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS
- *   to determine which bus number to match on when generating type0
- *   config cycles
- *  NO_PCIE_LINK - the Freescale PCI-e controllers have issues with
- *   hanging if we don't have link and try to do config cycles to
- *   anything but the PHB.  Only allow talking to the PHB if this is
- *   set.
- *  BIG_ENDIAN - cfg_addr is a big endian register
- *  BROKEN_MRM - the 440EPx/GRx chips have an errata that causes hangs
- *   on the PLB4.  Effectively disable MRM commands by setting this.
- */
-#define INDIRECT_TYPE_SET_CFG_TYPE 0x0001
-#define INDIRECT_TYPE_EXT_REG  0x0002
-#define INDIRECT_TYPE_SURPRESS_PRIMARY_BUS 0x0004
-#define INDIRECT_TYPE_NO_PCIE_LINK 0x0008
-#define INDIRECT_TYPE_BIG_ENDIAN   0x0010
-#define INDIRECT_TYPE_BROKEN_MRM   0x0020
-
 #ifdef CONFIG_PCI
 static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
 {
diff --git a/arch/powerpc/include/asm/pci-bridge.h 
b/arch/powerpc/include/asm/pci-bridge.h
index 163bd40..b2bbf05 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -14,29 +14,6 @@
 
 struct device_node;
 
-/*
- * Used for variants of PCI indirect handling and possible quirks:
- *  SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
- *  EXT_REG - provides access to PCI-e extended registers
- *  SURPRESS_PRIMARY_BUS - we suppress the setting of PCI_PRIMARY_BUS
- *   on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS
- *   to determine which bus number to match on when generating type0
- *   config cycles
- *  NO_PCIE_LINK - the Freescale PCI-e controllers have issues with
- *   hanging if we don't have link and try to do config cycles to
- *   anything but the PHB.  Only allow talking to the PHB if this is
- *   set.
- *  BIG_ENDIAN - cfg_addr is a big endian register
- *  BROKEN_MRM - the 440EPx/GRx chips have an errata that causes hangs on
- *   the PLB4.  Effectively disable MRM commands by setting this.
- */
-#define PPC_INDIRECT_TYPE_SET_CFG_TYPE 0x0001
-#define PPC_INDIRECT_TYPE_EXT_REG  0x0002
-#define PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS 0x0004
-#define PPC_INDIRECT_TYPE_NO_PCIE_LINK 0x0008
-#define PPC_INDIRECT_TYPE_BIG_ENDIAN   0x0010
-#define PPC_INDIRECT_TYPE_BROKEN_MRM   0x0020
-
 /* These are used for config access before all the PCI probing
has been done. */
 extern int early_read_config_byte(struct pci_controller *hose, int bus,
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 682084d..d73f94a 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -399,7 +399,7 @@ void fsl_pcibios_fixup_bus(struct pci_bus *bus)
 
if (fsl_pcie_bus_fixup)
is_pcie = early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP);
-   no_link = !!(hose-indirect_type  PPC_INDIRECT_TYPE_NO_PCIE_LINK);
+   no_link = !!(hose-indirect_type  INDIRECT_TYPE_NO_PCIE_LINK);
 
if (bus-parent == hose-bus  (is_pcie || no_link)) {
for (i = 0; i  PCI_BRIDGE_RESOURCE_NUM; ++i) {
@@ -462,7 +462,7 @@ int __init fsl_add_bridge(struct platform_device *pdev, int 
is_primary)
hose-last_busno = bus_range ? bus_range[1] : 0xff;
 
setup_indirect_pci(hose, rsrc.start, rsrc.start + 0x4,
-   PPC_INDIRECT_TYPE_BIG_ENDIAN);
+   INDIRECT_TYPE_BIG_ENDIAN);
 
if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) {
/* For PCIE read HEADER_TYPE to identify controler mode */
@@ -481,10 +481,10 @@ 

[PATCH v3 0/8] Nvram-to-pstore

[Aruna Balakrishnaiah]

Currently the kernel provides the contents of p-series NVRAM only as a
simple stream of bytes via /dev/nvram, which must be interpreted in user
space by the nvram command in the powerpc-utils package. This patch set
exploits the pstore subsystem to expose each partition in NVRAM as a
separate file in /dev/pstore. For instance Oops messages will stored in a
file named [dmesg-nvram-2].

Changes from v2:
- Fix renaming of pstore type ids in nvram.c

Changes from v1:
- Reduce #ifdefs by and remove forward declarations of pstore callbacks
- Handle return value of nvram_write_os_partition
- Remove empty pstore callbacks and register pstore only when pstore
  is configured
---

Aruna Balakrishnaiah (8):
  powerpc/pseries: Remove syslog prefix in uncompressed oops text
  powerpc/pseries: Add version and timestamp to oops header
  powerpc/pseries: Introduce generic read function to read nvram-partitions
  powerpc/pseries: Read/Write oops nvram partition via pstore
  powerpc/pseries: Read rtas partition via pstore
  powerpc/pseries: Distinguish between a os-partition and non-os partition
  powerpc/pseries: Read of-config partition via pstore
  powerpc/pseries: Read common partition via pstore


 arch/powerpc/platforms/pseries/nvram.c |  353 +++-
 fs/pstore/inode.c  |9 +
 include/linux/pstore.h |4 
 3 files changed, 313 insertions(+), 53 deletions(-)

-- 

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[PATCH v3 1/8] powerpc/pseries: Remove syslog prefix in uncompressed oops text

[Aruna Balakrishnaiah]

Removal of syslog prefix in the uncompressed oops text will
help in capturing more oops data.

Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
Reviewed-by: Jim Keniston jkeni...@us.ibm.com
---
 arch/powerpc/platforms/pseries/nvram.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/platforms/pseries/nvram.c 
b/arch/powerpc/platforms/pseries/nvram.c
index 8733a86..e54a8b7 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -619,7 +619,7 @@ static void oops_to_nvram(struct kmsg_dumper *dumper,
}
if (rc != 0) {
kmsg_dump_rewind(dumper);
-   kmsg_dump_get_buffer(dumper, true,
+   kmsg_dump_get_buffer(dumper, false,
 oops_data, oops_data_sz, text_len);
err_type = ERR_TYPE_KERNEL_PANIC;
*oops_len = (u16) text_len;

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[PATCH v3 2/8] powerpc/pseries: Add version and timestamp to oops header

[Aruna Balakrishnaiah]

Introduce version and timestamp information in the oops header.
oops_log_info (oops header) holds version (to distinguish between old
and new format oops header), length of the oops text
(compressed or uncompressed) and timestamp.

The version field will sit in the same place as the length in old
headers. version is assigned 5000 (greater than oops partition size)
so that existing tools will refuse to dump new style partitions as
the length is too large. The updated tools will work with both
old and new format headers.

Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
Reviewed-by: Jim Keniston jkeni...@us.ibm.com
---
 arch/powerpc/platforms/pseries/nvram.c |   57 +---
 1 file changed, 38 insertions(+), 19 deletions(-)

diff --git a/arch/powerpc/platforms/pseries/nvram.c 
b/arch/powerpc/platforms/pseries/nvram.c
index e54a8b7..742735a 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -29,6 +29,13 @@
 /* Max bytes to read/write in one go */
 #define NVRW_CNT 0x20
 
+/*
+ * Set oops header version to distingush between old and new format header.
+ * lnx,oops-log partition max size is 4000, header version  4000 will
+ * help in identifying new header.
+ */
+#define OOPS_HDR_VERSION 5000
+
 static unsigned int nvram_size;
 static int nvram_fetch, nvram_store;
 static char nvram_buf[NVRW_CNT];   /* assume this is in the first 4GB */
@@ -67,6 +74,12 @@ static const char *pseries_nvram_os_partitions[] = {
NULL
 };
 
+struct oops_log_info {
+   u16 version;
+   u16 report_length;
+   u64 timestamp;
+} __attribute__((packed));
+
 static void oops_to_nvram(struct kmsg_dumper *dumper,
  enum kmsg_dump_reason reason);
 
@@ -83,28 +96,28 @@ static unsigned long last_unread_rtas_event;/* 
timestamp */
 
  * big_oops_buf[] holds the uncompressed text we're capturing.
  *
- * oops_buf[] holds the compressed text, preceded by a prefix.
- * The prefix is just a u16 holding the length of the compressed* text.
- * (*Or uncompressed, if compression fails.)  oops_buf[] gets written
- * to NVRAM.
+ * oops_buf[] holds the compressed text, preceded by a oops header.
+ * oops header has u16 holding the version of oops header (to differentiate
+ * between old and new format header) followed by u16 holding the length of
+ * the compressed* text (*Or uncompressed, if compression fails.) and u64
+ * holding the timestamp. oops_buf[] gets written to NVRAM.
  *
- * oops_len points to the prefix.  oops_data points to the compressed text.
+ * oops_log_info points to the header. oops_data points to the compressed text.
  *
  * +- oops_buf
- * |   +- oops_data
- * v   v
- * ++---+
- * | length| text  |
- * | (2 bytes) | (oops_data_sz bytes)  |
- * ++---+
+ * |   +- oops_data
+ * v   v
+ * +---+---+---++
+ * | version   | length| timestamp | text   |
+ * | (2 bytes) | (2 bytes) | (8 bytes) | (oops_data_sz bytes)   |
+ * +---+---+---++
  * ^
- * +- oops_len
+ * +- oops_log_info
  *
  * We preallocate these buffers during init to avoid kmalloc during oops/panic.
  */
 static size_t big_oops_buf_sz;
 static char *big_oops_buf, *oops_buf;
-static u16 *oops_len;
 static char *oops_data;
 static size_t oops_data_sz;
 
@@ -425,9 +438,8 @@ static void __init nvram_init_oops_partition(int 
rtas_partition_exists)
oops_log_partition.name);
return;
}
-   oops_len = (u16*) oops_buf;
-   oops_data = oops_buf + sizeof(u16);
-   oops_data_sz = oops_log_partition.size - sizeof(u16);
+   oops_data = oops_buf + sizeof(struct oops_log_info);
+   oops_data_sz = oops_log_partition.size - sizeof(struct oops_log_info);
 
/*
 * Figure compression (preceded by elimination of each line's n
@@ -555,6 +567,7 @@ error:
 /* Compress the text from big_oops_buf into oops_buf. */
 static int zip_oops(size_t text_len)
 {
+   struct oops_log_info *oops_hdr = (struct oops_log_info *)oops_buf;
int zipped_len = nvram_compress(big_oops_buf, oops_data, text_len,
oops_data_sz);
if (zipped_len  0) {
@@ -562,7 +575,9 @@ static int zip_oops(size_t text_len)
pr_err(nvram: logging uncompressed oops/panic report\n);
return -1;
}
-   *oops_len = (u16) zipped_len;
+   oops_hdr-version = OOPS_HDR_VERSION;
+   oops_hdr-report_length = (u16) zipped_len;
+   oops_hdr-timestamp = get_seconds();
return 0;
 }
 
@@ -576,6 +591,7 @@ 

[PATCH v3 3/8] powerpc/pseries: Introduce generic read function to read nvram-partitions

[Aruna Balakrishnaiah]

Introduce generic read function to read nvram partitions other than rtas.
nvram_read_error_log will be retained which is used to read rtas partition
from rtasd. nvram_read_partition is the generic read function to read from
any nvram partition.

Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
Reviewed-by: Jim Keniston jkeni...@us.ibm.com
---
 arch/powerpc/platforms/pseries/nvram.c |   32 ++--
 1 file changed, 22 insertions(+), 10 deletions(-)

diff --git a/arch/powerpc/platforms/pseries/nvram.c 
b/arch/powerpc/platforms/pseries/nvram.c
index 742735a..088f023 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -293,34 +293,35 @@ int nvram_write_error_log(char * buff, int length,
return rc;
 }
 
-/* nvram_read_error_log
+/* nvram_read_partition
  *
- * Reads nvram for error log for at most 'length'
+ * Reads nvram partition for at most 'length'
  */
-int nvram_read_error_log(char * buff, int length,
- unsigned int * err_type, unsigned int * error_log_cnt)
+int nvram_read_partition(struct nvram_os_partition *part, char *buff,
+   int length, unsigned int *err_type,
+   unsigned int *error_log_cnt)
 {
int rc;
loff_t tmp_index;
struct err_log_info info;

-   if (rtas_log_partition.index == -1)
+   if (part-index == -1)
return -1;
 
-   if (length  rtas_log_partition.size)
-   length = rtas_log_partition.size;
+   if (length  part-size)
+   length = part-size;
 
-   tmp_index = rtas_log_partition.index;
+   tmp_index = part-index;
 
rc = ppc_md.nvram_read((char *)info, sizeof(struct err_log_info), 
tmp_index);
if (rc = 0) {
-   printk(KERN_ERR nvram_read_error_log: Failed nvram_read 
(%d)\n, rc);
+   pr_err(%s: Failed nvram_read (%d)\n, __FUNCTION__, rc);
return rc;
}
 
rc = ppc_md.nvram_read(buff, length, tmp_index);
if (rc = 0) {
-   printk(KERN_ERR nvram_read_error_log: Failed nvram_read 
(%d)\n, rc);
+   pr_err(%s: Failed nvram_read (%d)\n, __FUNCTION__, rc);
return rc;
}
 
@@ -330,6 +331,17 @@ int nvram_read_error_log(char * buff, int length,
return 0;
 }
 
+/* nvram_read_error_log
+ *
+ * Reads nvram for error log for at most 'length'
+ */
+int nvram_read_error_log(char *buff, int length,
+   unsigned int *err_type, unsigned int *error_log_cnt)
+{
+   return nvram_read_partition(rtas_log_partition, buff, length,
+   err_type, error_log_cnt);
+}
+
 /* This doesn't actually zero anything, but it sets the event_logged
  * word to tell that this event is safely in syslog.
  */

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[PATCH v3 4/8] powerpc/pseries: Read/Write oops nvram partition via pstore

[Aruna Balakrishnaiah]

IBM's p series machines provide persistent storage for LPARs through NVRAM.
NVRAM's lnx,oops-log partition is used to log oops messages.
Currently the kernel provides the contents of p-series NVRAM only as a
simple stream of bytes via /dev/nvram, which must be interpreted in user
space by the nvram command in the powerpc-utils package.

This patch set exploits the pstore subsystem to expose oops partition in
NVRAM as a separate file in /dev/pstore. For instance, Oops messages will be
stored in a file named [dmesg-nvram-2]. In case pstore registration fails it
will fall back to kmsg_dump mechanism.

This patch will read/write the oops messages from/to this partition via pstore.

Signed-off-by: Jim Keniston jkeni...@us.ibm.com
Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
---
 arch/powerpc/platforms/pseries/nvram.c |  172 +---
 1 file changed, 157 insertions(+), 15 deletions(-)

diff --git a/arch/powerpc/platforms/pseries/nvram.c 
b/arch/powerpc/platforms/pseries/nvram.c
index 088f023..9edec8e 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -18,6 +18,7 @@
 #include linux/spinlock.h
 #include linux/slab.h
 #include linux/kmsg_dump.h
+#include linux/pstore.h
 #include linux/ctype.h
 #include linux/zlib.h
 #include asm/uaccess.h
@@ -127,6 +128,14 @@ static size_t oops_data_sz;
 #define MEM_LEVEL 4
 static struct z_stream_s stream;
 
+#ifdef CONFIG_PSTORE
+static enum pstore_type_id nvram_type_ids[] = {
+   PSTORE_TYPE_DMESG,
+   -1
+};
+static int read_type;
+#endif
+
 static ssize_t pSeries_nvram_read(char *buf, size_t count, loff_t *index)
 {
unsigned int i;
@@ -430,6 +439,149 @@ static int __init pseries_nvram_init_os_partition(struct 
nvram_os_partition
return 0;
 }
 
+/*
+ * Are we using the ibm,rtas-log for oops/panic reports?  And if so,
+ * would logging this oops/panic overwrite an RTAS event that rtas_errd
+ * hasn't had a chance to read and process?  Return 1 if so, else 0.
+ *
+ * We assume that if rtas_errd hasn't read the RTAS event in
+ * NVRAM_RTAS_READ_TIMEOUT seconds, it's probably not going to.
+ */
+static int clobbering_unread_rtas_event(void)
+{
+   return (oops_log_partition.index == rtas_log_partition.index
+last_unread_rtas_event
+get_seconds() - last_unread_rtas_event =
+   NVRAM_RTAS_READ_TIMEOUT);
+}
+
+#ifdef CONFIG_PSTORE
+static int nvram_pstore_open(struct pstore_info *psi)
+{
+   /* Reset the iterator to start reading partitions again */
+   read_type = -1;
+   return 0;
+}
+
+/**
+ * nvram_pstore_write - pstore write callback for nvram
+ * @type:   Type of message logged
+ * @reason: reason behind dump (oops/panic)
+ * @id: identifier to indicate the write performed
+ * @part:   pstore writes data to registered buffer in parts,
+ *  part number will indicate the same.
+ * @count:  Indicates oops count
+ * @size:   number of bytes written to the registered buffer
+ * @psi:registered pstore_info structure
+ *
+ * Called by pstore_dump() when an oops or panic report is logged in the
+ * printk buffer.
+ * Returns 0 on successful write.
+ */
+static int nvram_pstore_write(enum pstore_type_id type,
+   enum kmsg_dump_reason reason,
+   u64 *id, unsigned int part, int count,
+   size_t size, struct pstore_info *psi)
+{
+   int rc;
+   struct oops_log_info *oops_hdr = (struct oops_log_info *) oops_buf;
+
+   /* part 1 has the recent messages from printk buffer */
+   if (part  1 || type != PSTORE_TYPE_DMESG ||
+   clobbering_unread_rtas_event())
+   return -1;
+
+   oops_hdr-version = OOPS_HDR_VERSION;
+   oops_hdr-report_length = (u16) size;
+   oops_hdr-timestamp = get_seconds();
+   rc = nvram_write_os_partition(oops_log_partition, oops_buf,
+   (int) (sizeof(*oops_hdr) + size), ERR_TYPE_KERNEL_PANIC,
+   count);
+
+   if (rc != 0)
+   return rc;
+
+   *id = part;
+   return 0;
+}
+
+/*
+ * Reads the oops/panic report.
+ * Returns the length of the data we read from each partition.
+ * Returns 0 if we've been called before.
+ */
+static ssize_t nvram_pstore_read(u64 *id, enum pstore_type_id *type,
+   int *count, struct timespec *time, char **buf,
+   struct pstore_info *psi)
+{
+   struct oops_log_info *oops_hdr;
+   unsigned int err_type, id_no;
+   struct nvram_os_partition *part = NULL;
+   char *buff = NULL;
+
+   read_type++;
+
+   switch (nvram_type_ids[read_type]) {
+   case PSTORE_TYPE_DMESG:
+   part = oops_log_partition;
+   *type = 

[PATCH v3 5/8] powerpc/pseries: Read rtas partition via pstore

[Aruna Balakrishnaiah]

This patch set exploits the pstore subsystem to read details of rtas partition
in NVRAM to a separate file in /dev/pstore. For instance, rtas details will be
stored in a file named [rtas-nvram-4].

Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
Reviewed-by: Jim Keniston jkeni...@us.ibm.com
---
 arch/powerpc/platforms/pseries/nvram.c |   33 +---
 fs/pstore/inode.c  |3 +++
 include/linux/pstore.h |2 ++
 3 files changed, 31 insertions(+), 7 deletions(-)

diff --git a/arch/powerpc/platforms/pseries/nvram.c 
b/arch/powerpc/platforms/pseries/nvram.c
index 9edec8e..78d72f0 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -131,9 +131,11 @@ static struct z_stream_s stream;
 #ifdef CONFIG_PSTORE
 static enum pstore_type_id nvram_type_ids[] = {
PSTORE_TYPE_DMESG,
+   PSTORE_TYPE_PPC_RTAS,
-1
 };
 static int read_type;
+static unsigned long last_rtas_event;
 #endif
 
 static ssize_t pSeries_nvram_read(char *buf, size_t count, loff_t *index)
@@ -297,8 +299,13 @@ int nvram_write_error_log(char * buff, int length,
 {
int rc = nvram_write_os_partition(rtas_log_partition, buff, length,
err_type, error_log_cnt);
-   if (!rc)
+   if (!rc) {
last_unread_rtas_event = get_seconds();
+#ifdef CONFIG_PSTORE
+   last_rtas_event = get_seconds();
+#endif
+   }
+
return rc;
 }
 
@@ -506,7 +513,7 @@ static int nvram_pstore_write(enum pstore_type_id type,
 }
 
 /*
- * Reads the oops/panic report.
+ * Reads the oops/panic report and ibm,rtas-log partition.
  * Returns the length of the data we read from each partition.
  * Returns 0 if we've been called before.
  */
@@ -526,6 +533,12 @@ static ssize_t nvram_pstore_read(u64 *id, enum 
pstore_type_id *type,
part = oops_log_partition;
*type = PSTORE_TYPE_DMESG;
break;
+   case PSTORE_TYPE_PPC_RTAS:
+   part = rtas_log_partition;
+   *type = PSTORE_TYPE_PPC_RTAS;
+   time-tv_sec = last_rtas_event;
+   time-tv_nsec = 0;
+   break;
default:
return 0;
}
@@ -542,11 +555,17 @@ static ssize_t nvram_pstore_read(u64 *id, enum 
pstore_type_id *type,
 
*count = 0;
*id = id_no;
-   oops_hdr = (struct oops_log_info *)buff;
-   *buf = buff + sizeof(*oops_hdr);
-   time-tv_sec = oops_hdr-timestamp;
-   time-tv_nsec = 0;
-   return oops_hdr-report_length;
+
+   if (nvram_type_ids[read_type] == PSTORE_TYPE_DMESG) {
+   oops_hdr = (struct oops_log_info *)buff;
+   *buf = buff + sizeof(*oops_hdr);
+   time-tv_sec = oops_hdr-timestamp;
+   time-tv_nsec = 0;
+   return oops_hdr-report_length;
+   }
+
+   *buf = buff;
+   return part-size;
 }
 
 static struct pstore_info nvram_pstore_info = {
diff --git a/fs/pstore/inode.c b/fs/pstore/inode.c
index e4bcb2c..ec24f9c 100644
--- a/fs/pstore/inode.c
+++ b/fs/pstore/inode.c
@@ -324,6 +324,9 @@ int pstore_mkfile(enum pstore_type_id type, char *psname, 
u64 id, int count,
case PSTORE_TYPE_MCE:
sprintf(name, mce-%s-%lld, psname, id);
break;
+   case PSTORE_TYPE_PPC_RTAS:
+   sprintf(name, rtas-%s-%lld, psname, id);
+   break;
case PSTORE_TYPE_UNKNOWN:
sprintf(name, unknown-%s-%lld, psname, id);
break;
diff --git a/include/linux/pstore.h b/include/linux/pstore.h
index 75d0176..d7a8fe9 100644
--- a/include/linux/pstore.h
+++ b/include/linux/pstore.h
@@ -35,6 +35,8 @@ enum pstore_type_id {
PSTORE_TYPE_MCE = 1,
PSTORE_TYPE_CONSOLE = 2,
PSTORE_TYPE_FTRACE  = 3,
+   /* PPC64 partition types */
+   PSTORE_TYPE_PPC_RTAS= 4,
PSTORE_TYPE_UNKNOWN = 255
 };
 

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[PATCH v3 7/8] powerpc/pseries: Read of-config partition via pstore

[Aruna Balakrishnaiah]

This patch set exploits the pstore subsystem to read details of
of-config partition in NVRAM to a separate file in /dev/pstore.
For instance, of-config partition details will be stored in a
file named [of-nvram-5].

Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
Reviewed-by: Jim Keniston jkeni...@us.ibm.com
---
 arch/powerpc/platforms/pseries/nvram.c |   55 +++-
 fs/pstore/inode.c  |3 ++
 include/linux/pstore.h |1 +
 3 files changed, 50 insertions(+), 9 deletions(-)

diff --git a/arch/powerpc/platforms/pseries/nvram.c 
b/arch/powerpc/platforms/pseries/nvram.c
index 714ed8a..f7392f6 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -132,9 +132,16 @@ static size_t oops_data_sz;
 static struct z_stream_s stream;
 
 #ifdef CONFIG_PSTORE
+static struct nvram_os_partition of_config_partition = {
+   .name = of-config,
+   .index = -1,
+   .os_partition = false
+};
+
 static enum pstore_type_id nvram_type_ids[] = {
PSTORE_TYPE_DMESG,
PSTORE_TYPE_PPC_RTAS,
+   PSTORE_TYPE_PPC_OF,
-1
 };
 static int read_type;
@@ -332,10 +339,15 @@ int nvram_read_partition(struct nvram_os_partition *part, 
char *buff,
 
tmp_index = part-index;
 
-   rc = ppc_md.nvram_read((char *)info, sizeof(struct err_log_info), 
tmp_index);
-   if (rc = 0) {
-   pr_err(%s: Failed nvram_read (%d)\n, __FUNCTION__, rc);
-   return rc;
+   if (part-os_partition) {
+   rc = ppc_md.nvram_read((char *)info,
+   sizeof(struct err_log_info),
+   tmp_index);
+   if (rc = 0) {
+   pr_err(%s: Failed nvram_read (%d)\n, __FUNCTION__,
+   rc);
+   return rc;
+   }
}
 
rc = ppc_md.nvram_read(buff, length, tmp_index);
@@ -344,8 +356,10 @@ int nvram_read_partition(struct nvram_os_partition *part, 
char *buff,
return rc;
}
 
-   *error_log_cnt = info.seq_num;
-   *err_type = info.error_type;
+   if (part-os_partition) {
+   *error_log_cnt = info.seq_num;
+   *err_type = info.error_type;
+   }
 
return 0;
 }
@@ -516,7 +530,7 @@ static int nvram_pstore_write(enum pstore_type_id type,
 }
 
 /*
- * Reads the oops/panic report and ibm,rtas-log partition.
+ * Reads the oops/panic report, rtas and of-config partition.
  * Returns the length of the data we read from each partition.
  * Returns 0 if we've been called before.
  */
@@ -525,9 +539,11 @@ static ssize_t nvram_pstore_read(u64 *id, enum 
pstore_type_id *type,
struct pstore_info *psi)
 {
struct oops_log_info *oops_hdr;
-   unsigned int err_type, id_no;
+   unsigned int err_type, id_no, size = 0;
struct nvram_os_partition *part = NULL;
char *buff = NULL;
+   int sig = 0;
+   loff_t p;
 
read_type++;
 
@@ -542,10 +558,29 @@ static ssize_t nvram_pstore_read(u64 *id, enum 
pstore_type_id *type,
time-tv_sec = last_rtas_event;
time-tv_nsec = 0;
break;
+   case PSTORE_TYPE_PPC_OF:
+   sig = NVRAM_SIG_OF;
+   part = of_config_partition;
+   *type = PSTORE_TYPE_PPC_OF;
+   *id = PSTORE_TYPE_PPC_OF;
+   time-tv_sec = 0;
+   time-tv_nsec = 0;
+   break;
default:
return 0;
}
 
+   if (!part-os_partition) {
+   p = nvram_find_partition(part-name, sig, size);
+   if (p = 0) {
+   pr_err(nvram: Failed to find partition %s, 
+   err %d\n, part-name, (int)p);
+   return 0;
+   }
+   part-index = p;
+   part-size = size;
+   }
+
buff = kmalloc(part-size, GFP_KERNEL);
 
if (!buff)
@@ -557,7 +592,9 @@ static ssize_t nvram_pstore_read(u64 *id, enum 
pstore_type_id *type,
}
 
*count = 0;
-   *id = id_no;
+
+   if (part-os_partition)
+   *id = id_no;
 
if (nvram_type_ids[read_type] == PSTORE_TYPE_DMESG) {
oops_hdr = (struct oops_log_info *)buff;
diff --git a/fs/pstore/inode.c b/fs/pstore/inode.c
index ec24f9c..8d4fb65 100644
--- a/fs/pstore/inode.c
+++ b/fs/pstore/inode.c
@@ -327,6 +327,9 @@ int pstore_mkfile(enum pstore_type_id type, char *psname, 
u64 id, int count,
case PSTORE_TYPE_PPC_RTAS:
sprintf(name, rtas-%s-%lld, psname, id);
break;
+   case PSTORE_TYPE_PPC_OF:
+   sprintf(name, of-%s-%lld, psname, id);
+   break;
case PSTORE_TYPE_UNKNOWN:
sprintf(name, unknown-%s-%lld, 

[PATCH v3 6/8] powerpc/pseries: Distinguish between a os-partition and non-os partition

[Aruna Balakrishnaiah]

Introduce os_partition member in nvram_os_partition structure to identify
if the partition is an os partition or not. This will be useful to handle
non-os partitions of-config and common.

Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
Reviewed-by: Jim Keniston jkeni...@us.ibm.com
---
 arch/powerpc/platforms/pseries/nvram.c |7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/platforms/pseries/nvram.c 
b/arch/powerpc/platforms/pseries/nvram.c
index 78d72f0..714ed8a 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -53,20 +53,23 @@ struct nvram_os_partition {
int min_size;   /* minimum acceptable size (0 means req_size) */
long size;  /* size of data portion (excluding err_log_info) */
long index; /* offset of data portion of partition */
+   bool os_partition; /* partition initialized by OS, not FW */
 };
 
 static struct nvram_os_partition rtas_log_partition = {
.name = ibm,rtas-log,
.req_size = 2079,
.min_size = 1055,
-   .index = -1
+   .index = -1,
+   .os_partition = true
 };
 
 static struct nvram_os_partition oops_log_partition = {
.name = lnx,oops-log,
.req_size = 4000,
.min_size = 2000,
-   .index = -1
+   .index = -1,
+   .os_partition = true
 };
 
 static const char *pseries_nvram_os_partitions[] = {

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[PATCH v3 8/8] powerpc/pseries: Read common partition via pstore

[Aruna Balakrishnaiah]

This patch exploits pstore subsystem to read details of common partition
in NVRAM to a separate file in /dev/pstore. For instance, common partition
details will be stored in a file named [common-nvram-6].

Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
Reviewed-by: Jim Keniston jkeni...@us.ibm.com
---
 arch/powerpc/platforms/pseries/nvram.c |   17 -
 fs/pstore/inode.c  |3 +++
 include/linux/pstore.h |1 +
 3 files changed, 20 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/platforms/pseries/nvram.c 
b/arch/powerpc/platforms/pseries/nvram.c
index f7392f6..14cc486 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -138,10 +138,17 @@ static struct nvram_os_partition of_config_partition = {
.os_partition = false
 };
 
+static struct nvram_os_partition common_partition = {
+   .name = common,
+   .index = -1,
+   .os_partition = false
+};
+
 static enum pstore_type_id nvram_type_ids[] = {
PSTORE_TYPE_DMESG,
PSTORE_TYPE_PPC_RTAS,
PSTORE_TYPE_PPC_OF,
+   PSTORE_TYPE_PPC_COMMON,
-1
 };
 static int read_type;
@@ -530,7 +537,7 @@ static int nvram_pstore_write(enum pstore_type_id type,
 }
 
 /*
- * Reads the oops/panic report, rtas and of-config partition.
+ * Reads the oops/panic report, rtas, of-config and common partition.
  * Returns the length of the data we read from each partition.
  * Returns 0 if we've been called before.
  */
@@ -566,6 +573,14 @@ static ssize_t nvram_pstore_read(u64 *id, enum 
pstore_type_id *type,
time-tv_sec = 0;
time-tv_nsec = 0;
break;
+   case PSTORE_TYPE_PPC_COMMON:
+   sig = NVRAM_SIG_SYS;
+   part = common_partition;
+   *type = PSTORE_TYPE_PPC_COMMON;
+   *id = PSTORE_TYPE_PPC_COMMON;
+   time-tv_sec = 0;
+   time-tv_nsec = 0;
+   break;
default:
return 0;
}
diff --git a/fs/pstore/inode.c b/fs/pstore/inode.c
index 8d4fb65..88cc050 100644
--- a/fs/pstore/inode.c
+++ b/fs/pstore/inode.c
@@ -330,6 +330,9 @@ int pstore_mkfile(enum pstore_type_id type, char *psname, 
u64 id, int count,
case PSTORE_TYPE_PPC_OF:
sprintf(name, of-%s-%lld, psname, id);
break;
+   case PSTORE_TYPE_PPC_COMMON:
+   sprintf(name, common-%s-%lld, psname, id);
+   break;
case PSTORE_TYPE_UNKNOWN:
sprintf(name, unknown-%s-%lld, psname, id);
break;
diff --git a/include/linux/pstore.h b/include/linux/pstore.h
index 615dc18..656699f 100644
--- a/include/linux/pstore.h
+++ b/include/linux/pstore.h
@@ -38,6 +38,7 @@ enum pstore_type_id {
/* PPC64 partition types */
PSTORE_TYPE_PPC_RTAS= 4,
PSTORE_TYPE_PPC_OF  = 5,
+   PSTORE_TYPE_PPC_COMMON  = 6,
PSTORE_TYPE_UNKNOWN = 255
 };
 

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Re: attempt to move .org backwards still show up

[Paul Mackerras]

On Thu, Apr 25, 2013 at 12:05:54PM +0800, Mike Qiu wrote:
 This has block my work now
 So I hope you can take a look ASAP
 Thanks
 :)
 
 Mike

As a quick fix, turn on CONFIG_KVM_BOOK3S_64_HV.  That will eliminate
the immediate problem.

Paul.
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Re: attempt to move .org backwards still show up

[Chen Gang]

On 2013年04月25日 14:25, Paul Mackerras wrote:
 On Thu, Apr 25, 2013 at 12:05:54PM +0800, Mike Qiu wrote:
  This has block my work now
  So I hope you can take a look ASAP
  Thanks
  :)
  
  Mike
 As a quick fix, turn on CONFIG_KVM_BOOK3S_64_HV.  That will eliminate
 the immediate problem.

Yes, just as my original reply to Mike to bypass it, but get no reply, I
guess he has to face the CONFIG_KVM_BOOK3S_64_PR.

Now, I am just fixing it, when I finish one patch, please help check.

Thanks.

-- 
Chen Gang

Asianux Corporation
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[PATCH 1/1] kvm:book3e: Fix a build error

[Tiejun Chen]

Commit cd66cc2e, powerpc/85xx: Add AltiVec support for e6500, adds
support for AltiVec on a Book-E class processor, but while compiling 
in the CONFIG_PPC_BOOK3E_64 and CONFIG_VIRTUALIZATION case, this
introduce the following error:

arch/powerpc/kernel/exceptions-64e.S:402: undefined reference to 
`kvmppc_handler_42_0x01B'
arch/powerpc/kernel/built-in.o: In function `exc_altivec_assist_book3e':
arch/powerpc/kernel/exceptions-64e.S:424: undefined reference to 
`kvmppc_handler_43_0x01B'
make: *** [vmlinux] Error 1

Looks we should add these altivec kvm handlers.

Signed-off-by: Tiejun Chen tiejun.c...@windriver.com
---
 arch/powerpc/kvm/bookehv_interrupts.S |5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/powerpc/kvm/bookehv_interrupts.S 
b/arch/powerpc/kvm/bookehv_interrupts.S
index e8ed7d6..fa9c78a 100644
--- a/arch/powerpc/kvm/bookehv_interrupts.S
+++ b/arch/powerpc/kvm/bookehv_interrupts.S
@@ -319,6 +319,11 @@ kvm_handler BOOKE_INTERRUPT_DEBUG, EX_PARAMS(DBG), \
SPRN_DSRR0, SPRN_DSRR1, 0
 kvm_handler BOOKE_INTERRUPT_DEBUG, EX_PARAMS(CRIT), \
SPRN_CSRR0, SPRN_CSRR1, 0
+/* altivec */
+kvm_handler BOOKE_INTERRUPT_ALTIVEC_UNAVAIL, EX_PARAMS(GEN), \
+   SPRN_SRR0, SPRN_SRR1, 0
+kvm_handler BOOKE_INTERRUPT_ALTIVEC_ASSIST, EX_PARAMS(GEN), \
+   SPRN_SRR0, SPRN_SRR1, 0
 #else
 /*
  * For input register values, see arch/powerpc/include/asm/kvm_booke_hv_asm.h
-- 
1.7.9.5

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[PATCH v2] PowerPC: kernel: compiling issue, make additional room in exception vector area

[Chen Gang]

When CONFIG_KVM_BOOK3S_64_PR is enabled,
MASKABLE_EXCEPTION_PSERIES(0x900 ...) will includes __KVMTEST, it will
exceed 0x980 which STD_EXCEPTION_HV(0x980 ...) will use, it will cause
compiling issue.

The related errors:
arch/powerpc/kernel/exceptions-64s.S: Assembler messages:
arch/powerpc/kernel/exceptions-64s.S:258: Error: attempt to move .org backwards
make[1]: *** [arch/powerpc/kernel/head_64.o] Error 1

The position 0x900 and 0x980 are solid, so can not move the position
to make room larger. The final solution is to jump to another area to
execute the related code.


Signed-off-by: Chen Gang gang.c...@asianux.com
---
 arch/powerpc/kernel/exceptions-64s.S |   12 +++-
 1 files changed, 11 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/kernel/exceptions-64s.S 
b/arch/powerpc/kernel/exceptions-64s.S
index e789ee7..8997de2 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -254,7 +254,11 @@ hardware_interrupt_hv:
STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
 
-   MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
+   . = 0x900
+   .globl decrementer_pSeries
+decrementer_pSeries:
+   b   decrementer_pSeries_0
+
STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
 
MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
@@ -536,6 +540,12 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
 #endif
 
.align  7
+   /* moved from 0x900 */
+decrementer_pSeries_0:
+   _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer,
+   EXC_STD, SOFTEN_TEST_PR)
+
+   .align  7
/* moved from 0xe00 */
STD_EXCEPTION_HV_OOL(0xe02, h_data_storage)
KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
-- 
1.7.7.6


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Re: [PATCH 4/7] powerpc/powernv: Patch MSI EOI handler on P8

[Gavin Shan]

On Thu, Apr 25, 2013 at 06:47:58PM +1000, Benjamin Herrenschmidt wrote:
On Thu, 2013-04-25 at 16:13 +0800, Gavin Shan wrote:
 It should be chip_data (not irq_data). Hopefully, you haven't
 get time to see the reply. Otherwise, it would a bit confused ;-)

Doesn't ics-opal already use chip_data ?


Yeah, Ben. that have been used now. So we can't use it for other purposes :-)

I was thinking just duplicating the irq_chip (including chip_data) so it
can be used by ics-opal just fine for all calls, just then overriding
the eoi callback and using container_of to get to the PHB.

Any reason that wouldn't work ?


It should work and I had the code (with your idea implemented) and verified
that on simulator. I'll send next version (together with the changes on f/w)
for review after it works correctly on real hardware box.

(I hope it can be done as early as possible to catch 3.10 merge window).

Thanks,
Gavin

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Re: [PATCH v2] PowerPC: kernel: compiling issue, make additional room in exception vector area

[Chen Gang]

Hello Mike:

This patch can pass compiling with Mike's config file, under my
cross-compiling environments, but does not run under the real machine,
please try it.

Welcome other members to help check this patch whether valid.

Thanks.


On 2013年04月25日 19:51, Chen Gang wrote:
 
 When CONFIG_KVM_BOOK3S_64_PR is enabled,
 MASKABLE_EXCEPTION_PSERIES(0x900 ...) will includes __KVMTEST, it will
 exceed 0x980 which STD_EXCEPTION_HV(0x980 ...) will use, it will cause
 compiling issue.
 
 The related errors:
 arch/powerpc/kernel/exceptions-64s.S: Assembler messages:
 arch/powerpc/kernel/exceptions-64s.S:258: Error: attempt to move .org 
 backwards
 make[1]: *** [arch/powerpc/kernel/head_64.o] Error 1
 
 The position 0x900 and 0x980 are solid, so can not move the position
 to make room larger. The final solution is to jump to another area to
 execute the related code.
 
 
 Signed-off-by: Chen Gang gang.c...@asianux.com
 ---
  arch/powerpc/kernel/exceptions-64s.S |   12 +++-
  1 files changed, 11 insertions(+), 1 deletions(-)
 
 diff --git a/arch/powerpc/kernel/exceptions-64s.S 
 b/arch/powerpc/kernel/exceptions-64s.S
 index e789ee7..8997de2 100644
 --- a/arch/powerpc/kernel/exceptions-64s.S
 +++ b/arch/powerpc/kernel/exceptions-64s.S
 @@ -254,7 +254,11 @@ hardware_interrupt_hv:
   STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
   KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
  
 - MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
 + . = 0x900
 + .globl decrementer_pSeries
 +decrementer_pSeries:
 + b   decrementer_pSeries_0
 +
   STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
  
   MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
 @@ -536,6 +540,12 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
  #endif
  
   .align  7
 + /* moved from 0x900 */
 +decrementer_pSeries_0:
 + _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer,
 + EXC_STD, SOFTEN_TEST_PR)
 +
 + .align  7
   /* moved from 0xe00 */
   STD_EXCEPTION_HV_OOL(0xe02, h_data_storage)
   KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
 


-- 
Chen Gang

Asianux Corporation
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RE: [PATCH 1/1] kvm:book3e: Fix a build error

[Caraman Mihai Claudiu-B02008]

 -Original Message-
 From: kvm-ppc-ow...@vger.kernel.org [mailto:kvm-ppc-
 ow...@vger.kernel.org] On Behalf Of Tiejun Chen
 Sent: Thursday, April 25, 2013 2:46 PM
 To: ga...@kernel.crashing.org
 Cc: linuxppc-dev@lists.ozlabs.org; kvm-...@vger.kernel.org;
 k...@vger.kernel.org
 Subject: [PATCH 1/1] kvm:book3e: Fix a build error
 
 Commit cd66cc2e, powerpc/85xx: Add AltiVec support for e6500, adds
 support for AltiVec on a Book-E class processor, but while compiling
 in the CONFIG_PPC_BOOK3E_64 and CONFIG_VIRTUALIZATION case, this
 introduce the following error:
 
 arch/powerpc/kernel/exceptions-64e.S:402: undefined reference to
 `kvmppc_handler_42_0x01B'
 arch/powerpc/kernel/built-in.o: In function `exc_altivec_assist_book3e':
 arch/powerpc/kernel/exceptions-64e.S:424: undefined reference to
 `kvmppc_handler_43_0x01B'
 make: *** [vmlinux] Error 1
 
 Looks we should add these altivec kvm handlers.
 
 Signed-off-by: Tiejun Chen tiejun.c...@windriver.com
 ---
  arch/powerpc/kvm/bookehv_interrupts.S |5 +
  1 file changed, 5 insertions(+)
 
 diff --git a/arch/powerpc/kvm/bookehv_interrupts.S
 b/arch/powerpc/kvm/bookehv_interrupts.S
 index e8ed7d6..fa9c78a 100644
 --- a/arch/powerpc/kvm/bookehv_interrupts.S
 +++ b/arch/powerpc/kvm/bookehv_interrupts.S
 @@ -319,6 +319,11 @@ kvm_handler BOOKE_INTERRUPT_DEBUG, EX_PARAMS(DBG), \
   SPRN_DSRR0, SPRN_DSRR1, 0
  kvm_handler BOOKE_INTERRUPT_DEBUG, EX_PARAMS(CRIT), \
   SPRN_CSRR0, SPRN_CSRR1, 0
 +/* altivec */
 +kvm_handler BOOKE_INTERRUPT_ALTIVEC_UNAVAIL, EX_PARAMS(GEN), \
 + SPRN_SRR0, SPRN_SRR1, 0
 +kvm_handler BOOKE_INTERRUPT_ALTIVEC_ASSIST, EX_PARAMS(GEN), \
 + SPRN_SRR0, SPRN_SRR1, 0
  #else
  /*
   * For input register values, see
 arch/powerpc/include/asm/kvm_booke_hv_asm.h
 --
 
It seems that you are not using kvm-ppc-queue branch.

I already have a patch ready for this (and AltiVec support is work
in progress) but we need first to pull e6500 kernel patches from
Linux tree into agraf.git.
 
-Mike



 



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Re: [PATCH 22/28] ppc: Clean up rtas_flash driver somewhat [RFC]

[Vasant Hegde]

On 04/16/2013 11:57 PM, David Howells wrote:

Clean up some of the problems with the rtas_flash driver:

  (1) It shouldn't fiddle with the internals of the procfs filesystem (altering
  pde-count).

  (2) If pid namespaces are in effect, then you can get multiple inodes
  connected to a single pde, thereby rendering the pde-count  2 test
  useless.

  (3) The pde-count fudging doesn't work for forked, dup'd or cloned file
  descriptors, so add static mutexes and use them to wrap access to the
  driver through read, write and release methods.

  (4) The driver can only handle one device, so allocate most of the data
  previously attached to the pde-data as static variables instead (though
  allocate the validation data buffer with kmalloc).

  (5) We don't need to save the pde pointers as long as we have the filenames
  available for removal.

  (6) Don't try to multiplex what the update file read method does based on the
  filename.  Instead provide separate file ops and split the function.

Whilst we're at it, tabulate the procfile information and loop through it when
creating or destroying them rather than manually coding each one.

Signed-off-by: David Howellsdhowe...@redhat.com
cc: Benjamin Herrenschmidtb...@kernel.crashing.org
cc: Paul Mackerraspau...@samba.org
cc: Anton Blanchardan...@samba.org
cc: linuxppc-dev@lists.ozlabs.org
---

  arch/powerpc/kernel/rtas_flash.c |  446 +-
  1 file changed, 200 insertions(+), 246 deletions(-)

diff --git a/arch/powerpc/kernel/rtas_flash.c b/arch/powerpc/kernel/rtas_flash.c
index c642f01..8196bfb 100644
--- a/arch/powerpc/kernel/rtas_flash.c
+++ b/arch/powerpc/kernel/rtas_flash.c
@@ -102,9 +102,10 @@ static struct kmem_cache *flash_block_cache = NULL;

  #define FLASH_BLOCK_LIST_VERSION (1UL)

-/* Local copy of the flash block list.
- * We only allow one open of the flash proc file and create this
- * list as we go.  The rtas_firmware_flash_list varable will be
+/*
+ * Local copy of the flash block list.
+ *
+ * The rtas_firmware_flash_list varable will be


s/varable/variable/


   * set once the data is fully read.
   *
   * For convenience as we build the list we use virtual addrs,
@@ -125,23 +126,23 @@ struct rtas_update_flash_t
  struct rtas_manage_flash_t
  {
int status; /* Returned status */
-   unsigned int op;/* Reject or commit image */
  };

  /* Status int must be first member of struct */
  struct rtas_validate_flash_t
  {
int status; /* Returned status */   
-   char buf[VALIDATE_BUF_SIZE];/* Candidate image buffer */
+   char *buf;  /* Candidate image buffer */
unsigned int buf_size;  /* Size of image buf */
unsigned int update_results;/* Update results token */
  };

-static DEFINE_SPINLOCK(flash_file_open_lock);
-static struct proc_dir_entry *firmware_flash_pde;
-static struct proc_dir_entry *firmware_update_pde;
-static struct proc_dir_entry *validate_pde;
-static struct proc_dir_entry *manage_pde;
+static struct rtas_update_flash_t rtas_update_flash_data;
+static struct rtas_manage_flash_t rtas_manage_flash_data;
+static struct rtas_validate_flash_t rtas_validate_flash_data;
+static DEFINE_MUTEX(rtas_update_flash_mutex);
+static DEFINE_MUTEX(rtas_manage_flash_mutex);
+static DEFINE_MUTEX(rtas_validate_flash_mutex);

  /* Do simple sanity checks on the flash image. */
  static int flash_list_valid(struct flash_block_list *flist)
@@ -191,10 +192,10 @@ static void free_flash_list(struct flash_block_list *f)

  static int rtas_flash_release(struct inode *inode, struct file *file)
  {
-   struct proc_dir_entry *dp = PDE(file_inode(file));
-   struct rtas_update_flash_t *uf;
-   
-   uf = (struct rtas_update_flash_t *) dp-data;
+   struct rtas_update_flash_t *const uf =rtas_update_flash_data;
+
+   mutex_lock(rtas_update_flash_mutex);
+
if (uf-flist) {
/* File was opened in write mode for a new flash attempt */
/* Clear saved list */
@@ -214,13 +215,14 @@ static int rtas_flash_release(struct inode *inode, struct 
file *file)
uf-flist = NULL;
}

-   atomic_dec(dp-count);
+   mutex_unlock(rtas_update_flash_mutex);
return 0;
  }

-static void get_flash_status_msg(int status, char *buf)
+static size_t get_flash_status_msg(int status, char *buf)
  {
-   char *msg;
+   const char *msg;
+   size_t len;

switch (status) {
case FLASH_AUTH:
@@ -242,34 +244,51 @@ static void get_flash_status_msg(int status, char *buf)
msg = ready: firmware image ready for flash on reboot\n;
break;
default:
-   sprintf(buf, error: unexpected status value %d\n, status);
-   return;
+   return sprintf(buf, error: unexpected status value %d\n,
+

Re: [PATCH 23/28] ppc: Clean up scanlog [RFC]

[Vasant Hegde]

On 04/16/2013 11:57 PM, David Howells wrote:

Clean up the pseries scanlog driver's use of procfs:

  (1) Don't need to save the proc_dir_entry pointer as we have the filename to
  remove with.

  (2) Save the scan log buffer pointer in a static variable (there is only one
  of it) and don't save it in the PDE (which doesn't have a destructor).


Changes looks good.

-Vasant



Signed-off-by: David Howellsdhowe...@redhat.com
cc: Benjamin Herrenschmidtb...@kernel.crashing.org
cc: Paul Mackerraspau...@samba.org
cc: linuxppc-dev@lists.ozlabs.org
---

  arch/powerpc/platforms/pseries/scanlog.c |   29 +++--
  1 file changed, 11 insertions(+), 18 deletions(-)

diff --git a/arch/powerpc/platforms/pseries/scanlog.c 
b/arch/powerpc/platforms/pseries/scanlog.c
index cc220d2..b502ab6 100644
--- a/arch/powerpc/platforms/pseries/scanlog.c
+++ b/arch/powerpc/platforms/pseries/scanlog.c
@@ -41,12 +41,12 @@


  static unsigned int ibm_scan_log_dump;/* RTAS token */
-static struct proc_dir_entry *proc_ppc64_scan_log_dump;/* The proc 
file */
+static unsigned int *scanlog_buffer;   /* The data buffer */

  static ssize_t scanlog_read(struct file *file, char __user *buf,
size_t count, loff_t *ppos)
  {
-   unsigned int *data = PDE_DATA(file_inode(file));
+   unsigned int *data = scanlog_buffer;
int status;
unsigned long len, off;
unsigned int wait_time;
@@ -134,7 +134,7 @@ static ssize_t scanlog_write(struct file * file, const char 
__user * buf,

  static int scanlog_open(struct inode * inode, struct file * file)
  {
-   unsigned int *data = PDE_DATA(file_inode(file));
+   unsigned int *data = scanlog_buffer;

if (data[0] != 0) {
/* This imperfect test stops a second copy of the
@@ -150,10 +150,9 @@ static int scanlog_open(struct inode * inode, struct file 
* file)

  static int scanlog_release(struct inode * inode, struct file * file)
  {
-   unsigned int *data = PDE_DATA(file_inode(file));
+   unsigned int *data = scanlog_buffer;

data[0] = 0;
-
return 0;
  }

@@ -169,7 +168,6 @@ const struct file_operations scanlog_fops = {
  static int __init scanlog_init(void)
  {
struct proc_dir_entry *ent;
-   void *data;
int err = -ENOMEM;

ibm_scan_log_dump = rtas_token(ibm,scan-log-dump);
@@ -177,29 +175,24 @@ static int __init scanlog_init(void)
return -ENODEV;

/* Ideally we could allocate a buffer  4G */
-   data = kzalloc(RTAS_DATA_BUF_SIZE, GFP_KERNEL);
-   if (!data)
+   scanlog_buffer = kzalloc(RTAS_DATA_BUF_SIZE, GFP_KERNEL);
+   if (!scanlog_buffer)
goto err;

-   ent = proc_create_data(powerpc/rtas/scan-log-dump, S_IRUSR, NULL,
-   scanlog_fops, data);
+   ent = proc_create(powerpc/rtas/scan-log-dump, S_IRUSR, NULL,
+   scanlog_fops);
if (!ent)
goto err;
-
-   proc_ppc64_scan_log_dump = ent;
-
return 0;
  err:
-   kfree(data);
+   kfree(scanlog_buffer);
return err;
  }

  static void __exit scanlog_cleanup(void)
  {
-   if (proc_ppc64_scan_log_dump) {
-   kfree(proc_ppc64_scan_log_dump-data);
-   remove_proc_entry(scan-log-dump, 
proc_ppc64_scan_log_dump-parent);
-   }
+   remove_proc_entry(powerpc/rtas/scan-log-dump, NULL);
+   kfree(scanlog_buffer);
  }

  module_init(scanlog_init);

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Re: [PATCH 04/28] proc: Supply PDE attribute setting accessor functions [RFC]

[Vasant Hegde]

On 04/16/2013 11:56 PM, David Howells wrote:

Supply accessor functions to set attributes in proc_dir_entry structs.

The following are supplied: proc_set_size() and proc_set_user().

Signed-off-by: David Howellsdhowe...@redhat.com
cc: linuxppc-dev@lists.ozlabs.org
cc: linux-me...@vger.kernel.org
cc: net...@vger.kernel.org
cc: linux-wirel...@vger.kernel.org
cc: linux-...@vger.kernel.org
cc: netfilter-de...@vger.kernel.org
cc: alsa-de...@alsa-project.org
---

  arch/powerpc/kernel/proc_powerpc.c|2 +-
  arch/powerpc/platforms/pseries/reconfig.c |2 +-


arch/powerpc side changes looks good.

-Vasant


  drivers/media/pci/ttpci/av7110_ir.c   |2 +-
  drivers/net/irda/vlsi_ir.c|2 +-
  drivers/net/wireless/airo.c   |   34 +
  drivers/pci/proc.c|2 +-
  fs/proc/generic.c |   13 +++
  include/linux/proc_fs.h   |5 
  kernel/configs.c  |2 +-
  kernel/profile.c  |2 +-
  net/netfilter/xt_recent.c |3 +--
  sound/core/info.c |2 +-
  12 files changed, 38 insertions(+), 33 deletions(-)

diff --git a/arch/powerpc/kernel/proc_powerpc.c 
b/arch/powerpc/kernel/proc_powerpc.c
index 41d8ee9..feb8580 100644
--- a/arch/powerpc/kernel/proc_powerpc.c
+++ b/arch/powerpc/kernel/proc_powerpc.c
@@ -83,7 +83,7 @@ static int __init proc_ppc64_init(void)
page_map_fops, vdso_data);
if (!pde)
return 1;
-   pde-size = PAGE_SIZE;
+   proc_set_size(pde, PAGE_SIZE);

return 0;
  }
diff --git a/arch/powerpc/platforms/pseries/reconfig.c 
b/arch/powerpc/platforms/pseries/reconfig.c
index d6491bd..f93cdf5 100644
--- a/arch/powerpc/platforms/pseries/reconfig.c
+++ b/arch/powerpc/platforms/pseries/reconfig.c
@@ -452,7 +452,7 @@ static int proc_ppc64_create_ofdt(void)

ent = proc_create(powerpc/ofdt, S_IWUSR, NULL,ofdt_fops);
if (ent)
-   ent-size = 0;
+   proc_set_size(ent, 0);

return 0;
  }
diff --git a/drivers/media/pci/ttpci/av7110_ir.c 
b/drivers/media/pci/ttpci/av7110_ir.c
index eb82286..0e763a7 100644
--- a/drivers/media/pci/ttpci/av7110_ir.c
+++ b/drivers/media/pci/ttpci/av7110_ir.c
@@ -375,7 +375,7 @@ int av7110_ir_init(struct av7110 *av7110)
if (av_cnt == 1) {
e = proc_create(av7110_ir, S_IWUSR, 
NULL,av7110_ir_proc_fops);
if (e)
-   e-size = 4 + 256 * sizeof(u16);
+   proc_set_size(e, 4 + 256 * sizeof(u16));
}

tasklet_init(av7110-ir.ir_tasklet, av7110_emit_key, (unsigned 
long)av7110-ir);
diff --git a/drivers/net/irda/vlsi_ir.c b/drivers/net/irda/vlsi_ir.c
index e22cd4e..5f47584 100644
--- a/drivers/net/irda/vlsi_ir.c
+++ b/drivers/net/irda/vlsi_ir.c
@@ -1678,7 +1678,7 @@ vlsi_irda_probe(struct pci_dev *pdev, const struct 
pci_device_id *id)
IRDA_WARNING(%s: failed to create proc entry\n,
 __func__);
} else {
-   ent-size = 0;
+   proc_set_size(ent, 0);
}
idev-proc_entry = ent;
}
diff --git a/drivers/net/wireless/airo.c b/drivers/net/wireless/airo.c
index 66e398d..21d0233 100644
--- a/drivers/net/wireless/airo.c
+++ b/drivers/net/wireless/airo.c
@@ -4507,73 +4507,63 @@ static int setup_proc_entry( struct net_device *dev,
airo_entry);
if (!apriv-proc_entry)
goto fail;
-   apriv-proc_entry-uid = proc_kuid;
-   apriv-proc_entry-gid = proc_kgid;
+   proc_set_user(apriv-proc_entry, proc_kuid, proc_kgid);

/* Setup the StatsDelta */
entry = proc_create_data(StatsDelta, S_IRUGO  proc_perm,
 apriv-proc_entry,proc_statsdelta_ops, dev);
if (!entry)
goto fail_stats_delta;
-   entry-uid = proc_kuid;
-   entry-gid = proc_kgid;
+   proc_set_user(entry, proc_kuid, proc_kgid);

/* Setup the Stats */
entry = proc_create_data(Stats, S_IRUGO  proc_perm,
 apriv-proc_entry,proc_stats_ops, dev);
if (!entry)
goto fail_stats;
-   entry-uid = proc_kuid;
-   entry-gid = proc_kgid;
+   proc_set_user(entry, proc_kuid, proc_kgid);

/* Setup the Status */
entry = proc_create_data(Status, S_IRUGO  proc_perm,
 apriv-proc_entry,proc_status_ops, dev);
if (!entry)
goto fail_status;
-   entry-uid = proc_kuid;
-   entry-gid = proc_kgid;
+   proc_set_user(entry, proc_kuid, proc_kgid);

/* Setup the Config */
entry = proc_create_data(Config, proc_perm,
 

Re: [PATCH 1/5] ibmebus: convert of_platform_driver to platform_driver

[Rob Herring]

On Sun, Apr 21, 2013 at 9:13 PM, Rob Herring robherri...@gmail.com wrote:
 From: Rob Herring rob.herr...@calxeda.com

 ibmebus is the last remaining user of of_platform_driver and the
 conversion to a regular platform driver is trivial.

 Signed-off-by: Rob Herring rob.herr...@calxeda.com
 Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
 Cc: Paul Mackerras pau...@samba.org
 Cc: Hoang-Nam Nguyen hngu...@de.ibm.com
 Cc: Christoph Raisch rai...@de.ibm.com
 Cc: Roland Dreier rol...@kernel.org
 Cc: Sean Hefty sean.he...@intel.com
 Cc: Hal Rosenstock hal.rosenst...@gmail.com
 Cc: Thadeu Lima de Souza Cascardo casca...@linux.vnet.ibm.com
 Cc: Grant Likely grant.lik...@linaro.org
 Cc: linuxppc-dev@lists.ozlabs.org
 Cc: linux-r...@vger.kernel.org
 Cc: net...@vger.kernel.org

Ben, Can I have your Ack for this? The change is straightforward and
neither of the 2 drivers used the id parameter that is removed.

Rob

 ---
  arch/powerpc/include/asm/ibmebus.h|4 ++--
  arch/powerpc/kernel/ibmebus.c |   22 ++
  drivers/infiniband/hw/ehca/ehca_main.c|5 ++---
  drivers/net/ethernet/ibm/ehea/ehea_main.c |8 +++-
  4 files changed, 17 insertions(+), 22 deletions(-)

 diff --git a/arch/powerpc/include/asm/ibmebus.h 
 b/arch/powerpc/include/asm/ibmebus.h
 index 1a9d9ae..088f95b 100644
 --- a/arch/powerpc/include/asm/ibmebus.h
 +++ b/arch/powerpc/include/asm/ibmebus.h
 @@ -48,8 +48,8 @@

  extern struct bus_type ibmebus_bus_type;

 -int ibmebus_register_driver(struct of_platform_driver *drv);
 -void ibmebus_unregister_driver(struct of_platform_driver *drv);
 +int ibmebus_register_driver(struct platform_driver *drv);
 +void ibmebus_unregister_driver(struct platform_driver *drv);

  int ibmebus_request_irq(u32 ist, irq_handler_t handler,
 unsigned long irq_flags, const char *devname,
 diff --git a/arch/powerpc/kernel/ibmebus.c b/arch/powerpc/kernel/ibmebus.c
 index 8220baa..16a7c23 100644
 --- a/arch/powerpc/kernel/ibmebus.c
 +++ b/arch/powerpc/kernel/ibmebus.c
 @@ -205,7 +205,7 @@ static int ibmebus_create_devices(const struct 
 of_device_id *matches)
 return ret;
  }

 -int ibmebus_register_driver(struct of_platform_driver *drv)
 +int ibmebus_register_driver(struct platform_driver *drv)
  {
 /* If the driver uses devices that ibmebus doesn't know, add them */
 ibmebus_create_devices(drv-driver.of_match_table);
 @@ -215,7 +215,7 @@ int ibmebus_register_driver(struct of_platform_driver 
 *drv)
  }
  EXPORT_SYMBOL(ibmebus_register_driver);

 -void ibmebus_unregister_driver(struct of_platform_driver *drv)
 +void ibmebus_unregister_driver(struct platform_driver *drv)
  {
 driver_unregister(drv-driver);
  }
 @@ -338,11 +338,10 @@ static int ibmebus_bus_bus_match(struct device *dev, 
 struct device_driver *drv)
  static int ibmebus_bus_device_probe(struct device *dev)
  {
 int error = -ENODEV;
 -   struct of_platform_driver *drv;
 +   struct platform_driver *drv;
 struct platform_device *of_dev;
 -   const struct of_device_id *match;

 -   drv = to_of_platform_driver(dev-driver);
 +   drv = to_platform_driver(dev-driver);
 of_dev = to_platform_device(dev);

 if (!drv-probe)
 @@ -350,9 +349,8 @@ static int ibmebus_bus_device_probe(struct device *dev)

 of_dev_get(of_dev);

 -   match = of_match_device(drv-driver.of_match_table, dev);
 -   if (match)
 -   error = drv-probe(of_dev, match);
 +   if (of_driver_match_device(dev, dev-driver))
 +   error = drv-probe(of_dev);
 if (error)
 of_dev_put(of_dev);

 @@ -362,7 +360,7 @@ static int ibmebus_bus_device_probe(struct device *dev)
  static int ibmebus_bus_device_remove(struct device *dev)
  {
 struct platform_device *of_dev = to_platform_device(dev);
 -   struct of_platform_driver *drv = to_of_platform_driver(dev-driver);
 +   struct platform_driver *drv = to_platform_driver(dev-driver);

 if (dev-driver  drv-remove)
 drv-remove(of_dev);
 @@ -372,7 +370,7 @@ static int ibmebus_bus_device_remove(struct device *dev)
  static void ibmebus_bus_device_shutdown(struct device *dev)
  {
 struct platform_device *of_dev = to_platform_device(dev);
 -   struct of_platform_driver *drv = to_of_platform_driver(dev-driver);
 +   struct platform_driver *drv = to_platform_driver(dev-driver);

 if (dev-driver  drv-shutdown)
 drv-shutdown(of_dev);
 @@ -419,7 +417,7 @@ struct device_attribute ibmebus_bus_device_attrs[] = {
  static int ibmebus_bus_legacy_suspend(struct device *dev, pm_message_t mesg)
  {
 struct platform_device *of_dev = to_platform_device(dev);
 -   struct of_platform_driver *drv = to_of_platform_driver(dev-driver);
 +   struct platform_driver *drv = to_platform_driver(dev-driver);
 int ret = 0;

 if (dev-driver  drv-suspend)
 @@ -430,7 +428,7 @@ 

Re: [PATCH 2/2 V7] powerpc/85xx: Add machine check handler to fix PCIe erratum on mpc85xx

[Segher Boessenkool]

* Remove A variant of load instruction emulation


Why is this?  You handle all other simple load insns, there is
nothing special about LHA.  (I reviewed the V4 email thread, no
reason for the chance is given there).


Segher

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Re: [PATCH 2/2 V7] powerpc/85xx: Add machine check handler to fix PCIe erratum on mpc85xx

[Scott Wood]

On 04/25/2013 10:31:51 AM, Segher Boessenkool wrote:

* Remove A variant of load instruction emulation


Why is this?  You handle all other simple load insns, there is
nothing special about LHA.  (I reviewed the V4 email thread, no
reason for the chance is given there).


The LHA implementation in V5 was incorrect (didn't sign-extend).

-Scott
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Re: [PATCH 1/4] powerpc/perf: Convert mmcra_sipr/sihv() to regs_sipr/sihv()

[Sukadev Bhattiprolu]

Michael Ellerman [mich...@ellerman.id.au] wrote:
| From: Michael Ellerman micha...@au1.ibm.com
| 
| On power8 the SIPR and SIHV are not in MMCRA, so convert the routines
| to take regs and change the names accordingly.
| 
| Signed-off-by: Michael Ellerman micha...@au1.ibm.com
| ---
|  arch/powerpc/perf/core-book3s.c |   20 +++-
|  1 file changed, 11 insertions(+), 9 deletions(-)
| 
| diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
| index fcfafa0..cb1618d 100644
| --- a/arch/powerpc/perf/core-book3s.c
| +++ b/arch/powerpc/perf/core-book3s.c
| @@ -112,24 +112,24 @@ static inline void perf_get_data_addr(struct pt_regs 
*regs, u64 *addrp)
|   *addrp = mfspr(SPRN_SDAR);
|  }
| 
| -static bool mmcra_sihv(unsigned long mmcra)
| +static bool regs_sihv(struct pt_regs *regs)
|  {
|   unsigned long sihv = MMCRA_SIHV;
| 
|   if (ppmu-flags  PPMU_ALT_SIPR)
|   sihv = POWER6_MMCRA_SIHV;
| 
| - return !!(mmcra  sihv);
| + return !!(regs-dsisr  sihv);
|  }
| 
| -static bool mmcra_sipr(unsigned long mmcra)
| +static bool regs_sipr(struct pt_regs *regs)
|  {
|   unsigned long sipr = MMCRA_SIPR;
| 

Would it make sense to add this here:

if (ppmu-flags  PPMU_NO_SIPR)
return 0;
so 

|   if (ppmu-flags  PPMU_ALT_SIPR)
|   sipr = POWER6_MMCRA_SIPR;
| 
| - return !!(mmcra  sipr);
| + return !!(regs-dsisr  sipr);
|  }
| 
|  static inline u32 perf_flags_from_msr(struct pt_regs *regs)
| @@ -143,7 +143,6 @@ static inline u32 perf_flags_from_msr(struct pt_regs 
*regs)
| 
|  static inline u32 perf_get_misc_flags(struct pt_regs *regs)
|  {
| - unsigned long mmcra = regs-dsisr;
|   unsigned long use_siar = regs-result;
| 
|   if (!use_siar)
| @@ -163,10 +162,12 @@ static inline u32 perf_get_misc_flags(struct pt_regs 
*regs)
|   }
| 
|   /* PR has priority over HV, so order below is important */
| - if (mmcra_sipr(mmcra))
| + if (regs_sipr(regs))
|   return PERF_RECORD_MISC_USER;
| - if (mmcra_sihv(mmcra)  (freeze_events_kernel != MMCR0_FCHV))
| +
| + if (regs_sihv(regs)  (freeze_events_kernel != MMCR0_FCHV))
|   return PERF_RECORD_MISC_HYPERVISOR;
| +
|   return PERF_RECORD_MISC_KERNEL;
|  }
| 
| @@ -182,6 +183,8 @@ static inline void perf_read_regs(struct pt_regs *regs)
|   int marked = mmcra  MMCRA_SAMPLE_ENABLE;
|   int use_siar;
| 
| + regs-dsisr = mmcra;
| +
|   /*
|* If this isn't a PMU exception (eg a software event) the SIAR is
|* not valid. Use pt_regs.
| @@ -205,12 +208,11 @@ static inline void perf_read_regs(struct pt_regs *regs)
|   use_siar = 1;
|   else if ((ppmu-flags  PPMU_NO_CONT_SAMPLING))
|   use_siar = 0;
| - else if (!(ppmu-flags  PPMU_NO_SIPR)  mmcra_sipr(mmcra))
| + else if (!(ppmu-flags  PPMU_NO_SIPR)  regs_sipr(regs))

... this becomes

else if (regs_sipr(regs))

mmcra_sipr() is used currently in two places and both places check
the NO_SIPR flag.

The reason is that this line gets modified in PATCH 3/4 to:

else if (!regs_no_sipr(regs)  regs_sipr(regs))

which is kind of hard to read. if (!not_X  X)

Sukadev

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Re: [PATCH 2/2 V7] powerpc/85xx: Add machine check handler to fix PCIe erratum on mpc85xx

[Segher Boessenkool]

* Remove A variant of load instruction emulation

Why is this?  You handle all other simple load insns, there is
nothing special about LHA.  (I reviewed the V4 email thread, no
reason for the chance is given there).


The LHA implementation in V5 was incorrect (didn't sign-extend).


The history on the current version says that it was _removed_ in V5 :-)
So an off-by-one in the history, I suppose.

It would be totally trivial to implement it correctly, seems a bit
silly to remove it?


Segher

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Re: [PATCHv4 1/2] ppc64: perform proper max_bus_speed detection

[Lucas Kannebley Tavares]

On 04/24/2013 08:48 PM, Tony Breeds wrote:

On Wed, Apr 24, 2013 at 07:54:49PM -0300, luca...@linux.vnet.ibm.com wrote:

From: Lucas Kannebley Tavaresluca...@linux.vnet.ibm.com

On pseries machines the detection for max_bus_speed should be done
through an OpenFirmware property. This patch adds a function to perform
this detection and a hook to perform dynamic adding of the function only for
pseries. This is done by overwriting the weak
pcibios_root_bridge_prepare function which is called by pci_create_root_bus().

Signed-off-by: Lucas Kannebley Tavaresluca...@linux.vnet.ibm.com
---
  arch/powerpc/include/asm/machdep.h   |  2 ++
  arch/powerpc/kernel/pci-common.c |  8 +
  arch/powerpc/platforms/pseries/pci.c | 51 
  arch/powerpc/platforms/pseries/pseries.h |  4 +++
  arch/powerpc/platforms/pseries/setup.c   |  2 ++
  5 files changed, 67 insertions(+)

diff --git a/arch/powerpc/include/asm/machdep.h 
b/arch/powerpc/include/asm/machdep.h
index 3d6b410..8f558bf 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -107,6 +107,8 @@ struct machdep_calls {
void(*pcibios_fixup)(void);
int (*pci_probe_mode)(struct pci_bus *);
void(*pci_irq_fixup)(struct pci_dev *dev);
+   int (*pcibios_root_bridge_prepare)(struct pci_host_bridge
+   *bridge);

/* To setup PHBs when using automatic OF platform driver for PCI */
int (*pci_setup_phb)(struct pci_controller *host);
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index fa12ae4..80986cf 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -844,6 +844,14 @@ int pci_proc_domain(struct pci_bus *bus)
return 1;
  }

+int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
+{
+   if (ppc_md.pcibios_root_bridge_prepare)
+   return ppc_md.pcibios_root_bridge_prepare(bridge);
+
+   return 0;
+}
+
  /* This header fixup will do the resource fixup for all devices as they are
   * probed, but not for bridge ranges
   */
diff --git a/arch/powerpc/platforms/pseries/pci.c 
b/arch/powerpc/platforms/pseries/pci.c
index 0b580f4..7f9c956 100644
--- a/arch/powerpc/platforms/pseries/pci.c
+++ b/arch/powerpc/platforms/pseries/pci.c
@@ -108,3 +108,54 @@ static void fixup_winbond_82c105(struct pci_dev* dev)
  }
  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
 fixup_winbond_82c105);
+
+int pseries_root_bridge_prepare(struct pci_host_bridge *bridge)
+{
+   struct device_node *dn, *pdn;
+   struct pci_bus *bus;
+   const uint32_t *pcie_link_speed_stats;
+
+   bus = bridge-bus;
+
+   dn = pcibios_get_phb_of_node(bus);
+   if (!dn)
+   return 0;
+
+   for (pdn = dn; pdn != NULL; pdn = pdn-parent) {
+   pcie_link_speed_stats = (const uint32_t *) of_get_property(dn,
+   ibm,pcie-link-speed-stats, NULL);
+   if (pcie_link_speed_stats)
+   break;
+   }


Please use the helpers in include/linux/of.h rather than open coding
this.

Yours Tony



Hi Tony,


This is what I can find as an equivalent code:

for (pdn = dn; pdn != NULL; pdn = of_get_next_parent(pdn)) {
pcie_link_speed_stats = (const uint32_t *)
of_get_property(dn,
ibm,pcie-link-speed-stats, NULL);
if (pcie_link_speed_stats)
break;
}

is this your suggestion, or was it another approach that will have the 
same result?


Thanks,

--
Lucas Kannebley Tavares
Software Engineer
IBM Linux Technology Center

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Re: [PATCH 4/4] powerpc/perf: Add support for SIER

[Sukadev Bhattiprolu]

Michael Ellerman [mich...@ellerman.id.au] wrote:
| From: Michael Ellerman micha...@au1.ibm.com
| 
| On power8 we have a new SIER (Sampled Instruction Event Register), which
| captures information about instructions when we have random sampling
| enabled.
| 
| Add support for loading the SIER into pt_regs, overloading regs-dar.
| Also set the new NO_SIPR flag in regs-result if we don't have SIPR.
| 
| Update regs_sihv/sipr() to look for SIPR/SIHV in SIER.
| 
| Signed-off-by: Michael Ellerman micha...@au1.ibm.com
| ---
|  arch/powerpc/include/asm/perf_event_server.h |1 +
|  arch/powerpc/perf/core-book3s.c  |   19 +++
|  2 files changed, 20 insertions(+)
| 
| diff --git a/arch/powerpc/include/asm/perf_event_server.h 
b/arch/powerpc/include/asm/perf_event_server.h
| index e287aef..a1a1ad8 100644
| --- a/arch/powerpc/include/asm/perf_event_server.h
| +++ b/arch/powerpc/include/asm/perf_event_server.h
| @@ -53,6 +53,7 @@ struct power_pmu {
|  #define PPMU_NO_CONT_SAMPLING0x0008 /* no continuous sampling */
|  #define PPMU_SIAR_VALID  0x0010 /* Processor has SIAR Valid 
bit */
|  #define PPMU_HAS_SSLOT   0x0020 /* Has sampled slot in MMCRA 
*/
| +#define PPMU_HAS_SIER0x0040 /* Has SIER */
| 
|  /*
|   * Values for flags to get_alternatives()
| diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
| index 4255b12..a4bbd4d 100644
| --- a/arch/powerpc/perf/core-book3s.c
| +++ b/arch/powerpc/perf/core-book3s.c
| @@ -116,6 +116,9 @@ static bool regs_sihv(struct pt_regs *regs)
|  {
|   unsigned long sihv = MMCRA_SIHV;
| 
| + if (ppmu-flags  PPMU_HAS_SIER)
| + return !!(regs-dar  SIER_SIHV);
| +

Were SIER_SIHV and SIER_SIPR defined in an earlier patch set ?

|   if (ppmu-flags  PPMU_ALT_SIPR)
|   sihv = POWER6_MMCRA_SIHV;
| 
| @@ -126,6 +129,9 @@ static bool regs_sipr(struct pt_regs *regs)
|  {
|   unsigned long sipr = MMCRA_SIPR;
| 
| + if (ppmu-flags  PPMU_HAS_SIER)
| + return !!(regs-dar  SIER_SIPR);
| +
|   if (ppmu-flags  PPMU_ALT_SIPR)
|   sipr = POWER6_MMCRA_SIPR;
| 
| @@ -184,6 +190,7 @@ static inline u32 perf_get_misc_flags(struct pt_regs 
*regs)
|  /*
|   * Overload regs-dsisr to store MMCRA so we only need to read it once
|   * on each interrupt.
| + * Overload regs-dar to store SIER if we have it.
|   * Overload regs-result to specify whether we should use the MSR (result
|   * is zero) or the SIAR (result is non zero).
|   */
| @@ -200,6 +207,18 @@ static inline void perf_read_regs(struct pt_regs *regs)
|   regs-result |= 2;
| 
|   /*
| +  * On power8 if we're in random sampling mode, the SIER is updated.
| +  * If we're in continuous sampling mode, we don't have SIPR.
| +  */
| + if (ppmu-flags  PPMU_HAS_SIER) {
| + if (marked)
| + regs-dar = mfspr(SPRN_SIER);
| + else
| + regs-result |= 2;

Can we use a helper, regs_set_no_sipr() to set this - since we set and
test in more than one place ?

Other than these nits, the patchset looks good.

Sukadev

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Re: [RFC PATCH 1/3] powerpc: Move struct pci_controller to asm-generic

[Bjorn Helgaas]

On Thu, Apr 25, 2013 at 3:49 AM, Andrew Murray andrew.mur...@arm.com wrote:
 This patch moves struct pci_controller into asm-generic to allow
 for use by other architectures thus reducing code duplication in
 the kernel.

 Signed-off-by: Andrew Murray andrew.mur...@arm.com
 ---
  arch/powerpc/include/asm/pci-bridge.h |   87 +---
  include/asm-generic/pci-bridge.h  |   68 +
  2 files changed, 82 insertions(+), 73 deletions(-)

 diff --git a/arch/powerpc/include/asm/pci-bridge.h 
 b/arch/powerpc/include/asm/pci-bridge.h
 index 205bfba..163bd40 100644
 --- a/arch/powerpc/include/asm/pci-bridge.h
 +++ b/arch/powerpc/include/asm/pci-bridge.h
 @@ -8,7 +8,6 @@
   * 2 of the License, or (at your option) any later version.
   */
  #include linux/pci.h
 -#include linux/list.h
  #include linux/ioport.h
  #include linux/of_pci.h
  #include asm-generic/pci-bridge.h
 @@ -16,85 +15,27 @@
  struct device_node;

  /*
 - * Structure of a PCI controller (host bridge)
 + * Used for variants of PCI indirect handling and possible quirks:
 + *  SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
 + *  EXT_REG - provides access to PCI-e extended registers
 + *  SURPRESS_PRIMARY_BUS - we suppress the setting of PCI_PRIMARY_BUS

s/SURPRESS/SUPRESS/ throughout.

I'm not sure how generic these flags will end up being.  If they wind
up in a shared header file, it seems like we might want a PCI_ prefix
to anchor them.

 + *   on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS
 + *   to determine which bus number to match on when generating type0
 + *   config cycles
 + *  NO_PCIE_LINK - the Freescale PCI-e controllers have issues with
 + *   hanging if we don't have link and try to do config cycles to
 + *   anything but the PHB.  Only allow talking to the PHB if this is
 + *   set.
 + *  BIG_ENDIAN - cfg_addr is a big endian register
 + *  BROKEN_MRM - the 440EPx/GRx chips have an errata that causes hangs on
 + *   the PLB4.  Effectively disable MRM commands by setting this.
   */
 -struct pci_controller {
 -   struct pci_bus *bus;
 -   char is_dynamic;
 -#ifdef CONFIG_PPC64
 -   int node;
 -#endif
 -   struct device_node *dn;
 -   struct list_head list_node;
 -   struct device *parent;
 -
 -   int first_busno;
 -   int last_busno;
 -   int self_busno;
 -   struct resource busn;
 -
 -   void __iomem *io_base_virt;
 -#ifdef CONFIG_PPC64
 -   void *io_base_alloc;
 -#endif
 -   resource_size_t io_base_phys;
 -   resource_size_t pci_io_size;
 -
 -   /* Some machines (PReP) have a non 1:1 mapping of
 -* the PCI memory space in the CPU bus space
 -*/
 -   resource_size_t pci_mem_offset;
 -
 -   /* Some machines have a special region to forward the ISA
 -* memory cycles such as VGA memory regions. Left to 0
 -* if unsupported
 -*/
 -   resource_size_t isa_mem_phys;
 -   resource_size_t isa_mem_size;
 -
 -   struct pci_ops *ops;
 -   unsigned int __iomem *cfg_addr;
 -   void __iomem *cfg_data;
 -
 -   /*
 -* Used for variants of PCI indirect handling and possible quirks:
 -*  SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
 -*  EXT_REG - provides access to PCI-e extended registers
 -*  SURPRESS_PRIMARY_BUS - we suppress the setting of PCI_PRIMARY_BUS
 -*   on Freescale PCI-e controllers since they used the 
 PCI_PRIMARY_BUS
 -*   to determine which bus number to match on when generating type0
 -*   config cycles
 -*  NO_PCIE_LINK - the Freescale PCI-e controllers have issues with
 -*   hanging if we don't have link and try to do config cycles to
 -*   anything but the PHB.  Only allow talking to the PHB if this is
 -*   set.
 -*  BIG_ENDIAN - cfg_addr is a big endian register
 -*  BROKEN_MRM - the 440EPx/GRx chips have an errata that causes 
 hangs on
 -*   the PLB4.  Effectively disable MRM commands by setting this.
 -*/
  #define PPC_INDIRECT_TYPE_SET_CFG_TYPE 0x0001
  #define PPC_INDIRECT_TYPE_EXT_REG  0x0002
  #define PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS 0x0004
  #define PPC_INDIRECT_TYPE_NO_PCIE_LINK 0x0008
  #define PPC_INDIRECT_TYPE_BIG_ENDIAN   0x0010
  #define PPC_INDIRECT_TYPE_BROKEN_MRM   0x0020
 -   u32 indirect_type;
 -   /* Currently, we limit ourselves to 1 IO range and 3 mem
 -* ranges since the common pci_bus structure can't handle more
 -*/
 -   struct resource io_resource;
 -   struct resource mem_resources[3];
 -   int global_number;  /* PCI domain number */
 -
 -   resource_size_t dma_window_base_cur;
 -   resource_size_t dma_window_size;
 -
 -#ifdef CONFIG_PPC64
 -   unsigned long buid;
 -
 -   void *private_data;
 -#endif /* CONFIG_PPC64 */

Re: [PATCH 1/5] ibmebus: convert of_platform_driver to platform_driver

[Rob Herring]

On 04/25/2013 12:35 PM, Benjamin Herrenschmidt wrote:
 On Thu, 2013-04-25 at 10:23 -0500, Rob Herring wrote:
 Ben, Can I have your Ack for this? The change is straightforward and
 neither of the 2 drivers used the id parameter that is removed.
 
 Didn't you get my mail about a compile failure caused by this patch ?

No, and I can't find any evidence of a mail in my inbox or in the list
archives.

 
 A quick build test leads to:
 
 /home/benh/linux-powerpc-test/arch/powerpc/kernel/ibmebus.c: In function 
 'ibmebus_bus_device_probe':
 /home/benh/linux-powerpc-test/arch/powerpc/kernel/ibmebus.c:344:2: error: 
 implicit declaration of function 'to_platform_driver' 
 [-Werror=implicit-function-declaration]
 /home/benh/linux-powerpc-test/arch/powerpc/kernel/ibmebus.c:344:6: error: 
 assignment makes pointer from integer without a cast [-Werror]
 /home/benh/linux-powerpc-test/arch/powerpc/kernel/ibmebus.c: In function 
 'ibmebus_bus_device_remove':
 /home/benh/linux-powerpc-test/arch/powerpc/kernel/ibmebus.c:363:32: error: 
 initialization makes pointer from integer without a cast [-Werror]
 /home/benh/linux-powerpc-test/arch/powerpc/kernel/ibmebus.c: In function 
 'ibmebus_bus_device_shutdown':
 /home/benh/linux-powerpc-test/arch/powerpc/kernel/ibmebus.c:373:32: error: 
 initialization makes pointer from integer without a cast [-Werror]
 /home/benh/linux-powerpc-test/arch/powerpc/kernel/ibmebus.c: In function 
 'ibmebus_bus_legacy_suspend':
 /home/benh/linux-powerpc-test/arch/powerpc/kernel/ibmebus.c:420:32: error: 
 initialization makes pointer from integer without a cast [-Werror]
 /home/benh/linux-powerpc-test/arch/powerpc/kernel/ibmebus.c: In function 
 'ibmebus_bus_legacy_resume':
 /home/benh/linux-powerpc-test/arch/powerpc/kernel/ibmebus.c:431:32: error: 
 initialization makes pointer from integer without a cast [-Werror]
 cc1: all warnings being treated as errors
 make[2]: *** [arch/powerpc/kernel/ibmebus.o] Error 1
 make[2]: *** Waiting for unfinished jobs
 
 Haven't had a chance to look too closely today -EJETLAG :-)

You need patch 2 of this series to fix this:

driver core: move to_platform_driver to platform_device.h

which as Arnd pointed out needs to come first. I've fixed that in my
tree, but I don't think it warrants another post.

Rob
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Re: [PATCH 1/5] ibmebus: convert of_platform_driver to platform_driver

[Benjamin Herrenschmidt]

On Thu, 2013-04-25 at 14:14 -0500, Rob Herring wrote:
 On 04/25/2013 12:35 PM, Benjamin Herrenschmidt wrote:
  On Thu, 2013-04-25 at 10:23 -0500, Rob Herring wrote:
  Ben, Can I have your Ack for this? The change is straightforward and
  neither of the 2 drivers used the id parameter that is removed.
  
  Didn't you get my mail about a compile failure caused by this patch ?
 
 No, and I can't find any evidence of a mail in my inbox or in the list
 archives.

Odd...

  
 .../...

 You need patch 2 of this series to fix this:
 
 driver core: move to_platform_driver to platform_device.h
 
 which as Arnd pointed out needs to come first. I've fixed that in my
 tree, but I don't think it warrants another post.

Can I pull you tree from somewhere to test ?

Cheers,
Ben.

 Rob
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Re: [PATCH 1/5] ibmebus: convert of_platform_driver to platform_driver

[Rob Herring]

On 04/25/2013 03:12 PM, Benjamin Herrenschmidt wrote:
 On Thu, 2013-04-25 at 14:14 -0500, Rob Herring wrote:
 On 04/25/2013 12:35 PM, Benjamin Herrenschmidt wrote:

[...]

 You need patch 2 of this series to fix this:

 driver core: move to_platform_driver to platform_device.h

 which as Arnd pointed out needs to come first. I've fixed that in my
 tree, but I don't think it warrants another post.
 
 Can I pull you tree from somewhere to test ?

Here you go:

git://sources.calxeda.com/kernel/linux.git of-platform-removal

Rob
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RE: [PATCH 1/3] rapidio: make enumeration/discovery configurable

[Bounine, Alexandre]

On Wednesday, April 24, 2013 5:37 PM Andrew Morton wrote:
 
 On Wed, 24 Apr 2013 10:31:57 -0400 Alexandre Bounine
 alexandre.boun...@idt.com wrote:
 
  Rework to implement RapidIO enumeration/discovery method selection
  combined with ability to use enumeration/discovery as a kernel module.
 
  ...
 
  @@ -1421,3 +1295,46 @@ enum_done:
   bail:
  return -EBUSY;
   }
  +
  +struct rio_scan rio_scan_ops = {
  +   .enumerate = rio_enum_mport,
  +   .discover = rio_disc_mport,
  +};
  +
  +
  +#ifdef MODULE
 
 Why the `ifdef MODULE'?  The module parameters are still accessible if
 the driver is statically linked and we do want the driver to behave in
 the same way regardless of how it was linked and loaded.

Marked for review.

  +static bool scan;
  +module_param(scan, bool, 0);
  +MODULE_PARM_DESC(scan, Start RapidIO network enumeration/discovery
 
  +   (default = 1));
  +
  +/**
  + * rio_basic_attach:
  + *
  + * When this enumeration/discovery method is loaded as a module this 
  function
  + * registers its specific enumeration and discover routines for all 
  available
  + * RapidIO mport devices. The scan command line parameter controls 
  ability of
  + * the module to start RapidIO enumeration/discovery automatically.
  + *
  + * Returns 0 for success or -EIO if unable to register itself.
  + *
  + * This enumeration/discovery method cannot be unloaded and therefore does 
  not
  + * provide a matching cleanup_module routine.
  + */
  +
  +int __init rio_basic_attach(void)
 
 static

My miss. Will fix.

  +{
  +   if (rio_register_scan(RIO_MPORT_ANY, rio_scan_ops))
  +   return -EIO;
  +   if (scan)
  +   rio_init_mports();
  +   return 0;
  +}
  +
  +module_init(rio_basic_attach);
  +
  +MODULE_DESCRIPTION(Basic RapidIO enumeration/discovery);
  +MODULE_LICENSE(GPL);
  +
  +#endif /* MODULE */
  diff --git a/drivers/rapidio/rio.c b/drivers/rapidio/rio.c
  index d553b5d..e36628a 100644
  --- a/drivers/rapidio/rio.c
  +++ b/drivers/rapidio/rio.c
  @@ -31,6 +31,9 @@
 
   #include rio.h
 
  +LIST_HEAD(rio_devices);
 
 static?
 
  +DEFINE_SPINLOCK(rio_global_list_lock);
 
 static?

These two have been very tempting for me to make them static.
But because a goal was simple code move and they have been visible
from very beginning of RapidIO code, I decided to keep the scope as is.
While I am against using the device list directly, I am not sure that this
patch is a good place to change the existing scope.

Because keeping them global prompted your comment I will happily make them
static and see if anyone will complain about it.
 
  +
   static LIST_HEAD(rio_mports);
   static unsigned char next_portid;
   static DEFINE_SPINLOCK(rio_mmap_lock);
 
  ...
 
  +/**
  + * rio_switch_init - Sets switch operations for a particular vendor switch
  + * @rdev: RIO device
  + * @do_enum: Enumeration/Discovery mode flag
  + *
  + * Searches the RIO switch ops table for known switch types. If the vid
  + * and did match a switch table entry, then call switch initialization
  + * routine to setup switch-specific routines.
  + */
  +void rio_switch_init(struct rio_dev *rdev, int do_enum)
  +{
  +   struct rio_switch_ops *cur = __start_rio_switch_ops;
  +   struct rio_switch_ops *end = __end_rio_switch_ops;
 
 huh, I hadn't noticed that RIO has its very own vmlinux section.  How
 peculair.

Yes it is there (since 2.6.15). We will address it at some point later.
At this moment just moving the code from one file to another.
 
  +   while (cur  end) {
  +   if ((cur-vid == rdev-vid)  (cur-did == rdev-did)) {
  +   pr_debug(RIO: calling init routine for %s\n,
  +rio_name(rdev));
  +   cur-init_hook(rdev, do_enum);
  +   break;
  +   }
  +   cur++;
  +   }
  +
  +   if ((cur = end)  (rdev-pef  RIO_PEF_STD_RT)) {
  +   pr_debug(RIO: adding STD routing ops for %s\n,
  +   rio_name(rdev));
  +   rdev-rswitch-add_entry = rio_std_route_add_entry;
  +   rdev-rswitch-get_entry = rio_std_route_get_entry;
  +   rdev-rswitch-clr_table = rio_std_route_clr_table;
  +   }
  +
  +   if (!rdev-rswitch-add_entry || !rdev-rswitch-get_entry)
  +   printk(KERN_ERR RIO: missing routing ops for %s\n,
  +  rio_name(rdev));
  +}
  +EXPORT_SYMBOL_GPL(rio_switch_init);
 
  ...
 
  +int rio_register_scan(int mport_id, struct rio_scan *scan_ops)
  +{
  +   struct rio_mport *port;
  +   int rc = -EBUSY;
  +
  +   list_for_each_entry(port, rio_mports, node) {
 
 How come the driver has no locking for rio_mports?  If a bugfix isn't
 needed here then a code comment is!

Locking is not needed at this moment, but has to be added sooner or later 
anyway.
I will add it now to avoid fixing it later. 
 
  +   if (port-id == mport_id || mport_id == RIO_MPORT_ANY) {
  +   if (port-nscan  mport_id == RIO_MPORT_ANY)
  +

Re: [PATCH v2] PowerPC: kernel: compiling issue, make additional room in exception vector area

[Michael Neuling]

Chen Gang gang.c...@asianux.com wrote:

 
 When CONFIG_KVM_BOOK3S_64_PR is enabled,
 MASKABLE_EXCEPTION_PSERIES(0x900 ...) will includes __KVMTEST, it will
 exceed 0x980 which STD_EXCEPTION_HV(0x980 ...) will use, it will cause
 compiling issue.
 
 The related errors:
 arch/powerpc/kernel/exceptions-64s.S: Assembler messages:
 arch/powerpc/kernel/exceptions-64s.S:258: Error: attempt to move .org 
 backwards
 make[1]: *** [arch/powerpc/kernel/head_64.o] Error 1
 
 The position 0x900 and 0x980 are solid, so can not move the position
 to make room larger. The final solution is to jump to another area to
 execute the related code.
 
 
 Signed-off-by: Chen Gang gang.c...@asianux.com
 ---
  arch/powerpc/kernel/exceptions-64s.S |   12 +++-
  1 files changed, 11 insertions(+), 1 deletions(-)
 
 diff --git a/arch/powerpc/kernel/exceptions-64s.S 
 b/arch/powerpc/kernel/exceptions-64s.S
 index e789ee7..8997de2 100644
 --- a/arch/powerpc/kernel/exceptions-64s.S
 +++ b/arch/powerpc/kernel/exceptions-64s.S
 @@ -254,7 +254,11 @@ hardware_interrupt_hv:
   STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
   KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
  
 - MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
 + . = 0x900
 + .globl decrementer_pSeries
 +decrementer_pSeries:
 + b   decrementer_pSeries_0
 +

Unfortunately you can't do this ether as we need to save the CFAR[1]
before it's overwritten by any branch. MASKABLE_EXCEPTION_PSERIES does
this.

CFAR is the Come From Register.  It saves the location of the last
branch and is hence overwritten by any branch.

Thanks for trying.

Mikey

   STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
  
   MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
 @@ -536,6 +540,12 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
  #endif
  
   .align  7
 + /* moved from 0x900 */
 +decrementer_pSeries_0:
 + _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer,
 + EXC_STD, SOFTEN_TEST_PR)
 +
 + .align  7
   /* moved from 0xe00 */
   STD_EXCEPTION_HV_OOL(0xe02, h_data_storage)
   KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
 -- 
 1.7.7.6
 
 
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why does CONFIG_NONSTATIC_KERNEL affect the boot kernel?

[Chris Friesen]

Hi,

Looking at the kdump code for powerpc, I see that if 
CONFIG_NONSTATIC_KERNEL is not set then the load address for the capture 
kernel is fixed at 32MB.


Why is this?

When using a separate capture kernel I don't see why that should 
restrict where I allocate space in the boot kernel.


Chris

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office:+1.343.883.2717
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Re: [PATCH v2 12/15] powerpc/85xx: add time base sync support for e6500

[Scott Wood]

On 04/24/2013 07:28:18 PM, Zhao Chenhui wrote:

On Wed, Apr 24, 2013 at 05:38:16PM -0500, Scott Wood wrote:
 On 04/24/2013 06:29:29 AM, Zhao Chenhui wrote:
 On Tue, Apr 23, 2013 at 07:04:06PM -0500, Scott Wood wrote:
  On 04/19/2013 05:47:45 AM, Zhao Chenhui wrote:
  From: Chen-Hui Zhao chenhui.z...@freescale.com
  
  For e6500, two threads in one core share one time base. Just  
need

  to do time base sync on first thread of one core, and skip it on
  the other thread.
  
  Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
  Signed-off-by: Li Yang le...@freescale.com
  Signed-off-by: Andy Fleming aflem...@freescale.com
  ---
   arch/powerpc/platforms/85xx/smp.c |   52
  +++-
   1 files changed, 44 insertions(+), 8 deletions(-)
  
  diff --git a/arch/powerpc/platforms/85xx/smp.c
  b/arch/powerpc/platforms/85xx/smp.c
  index 74d8cde..5f3eee3 100644
  --- a/arch/powerpc/platforms/85xx/smp.c
  +++ b/arch/powerpc/platforms/85xx/smp.c
  @@ -53,26 +55,40 @@ static inline u32 get_phy_cpu_mask(void)
u32 mask;
int cpu;
  
  - mask = 1  cur_booting_core;
  - for_each_online_cpu(cpu)
  - mask |= 1  get_hard_smp_processor_id(cpu);
  + if (smt_capable()) {
  +		/* two threads in one core share one time base  
*/
  +		mask = 1   
cpu_core_index_of_thread(cur_booting_core);

  + for_each_online_cpu(cpu)
  + mask |= 1  cpu_core_index_of_thread(
  +	 
get_hard_smp_processor_id(cpu));

  + } else {
  + mask = 1  cur_booting_core;
  + for_each_online_cpu(cpu)
  +			mask |= 1   
get_hard_smp_processor_id(cpu);

  + }
 
  Where is smt_capable defined()?  I assume somewhere in the  
patchset

  but it's a pain to search 12 patches...
 
 
 It is defined in arch/powerpc/include/asm/topology.h.
#define smt_capable()   (cpu_has_feature(CPU_FTR_SMT))
 
 Thanks for your review again.

 We shouldn't base it on CPU_FTR_SMT.  For example, e6500 doesn't
 claim that feature yet, except in our SDK kernel.  That doesn't
 change the topology of CPU numbering.


Then, where can I get the thread information? dts?
Or, wait for upstream of the thread suppport of e6500.


It's an inherent property of e6500 (outside of some virtualization  
scenarios, but you wouldn't run this code under a hypervisor) that you  
have two threads per core (whether Linux uses them or not).  Or you  
could read TMCFG0[NTHRD] if you know you're on a chip that has TMRs but  
aren't positive it's an e6500, but I wouldn't bother.  If we do ever  
have such a chip, there are probably other things that will need  
updating.



 static inline u32 get_phy_cpu_mask(void)
 {
u32 mask;
int cpu;
 
mask = 1  cpu_core_index_of_thread(cur_booting_core);
for_each_online_cpu(cpu)
mask |= 1  cpu_core_index_of_thread(
get_hard_smp_processor_id(cpu));
 
return mask;
 }

 Likewise, this will get it wrong if SMT is disabled or not yet
 implemented on a core.

 -Scott

Let's look into cpu_core_index_of_thread() in  
arch/powerpc/kernel/smp.c.


  int cpu_core_index_of_thread(int cpu)
  {
  return cpu  threads_shift;
  }

If no thread, the threads_shift is equal to 0. It can work with no
thread.


My point is that if threads are disabled, threads_shift will be 0, but  
e6500 cores will still be numbered 0, 2, 4, etc.


Perhaps, I should submit this patch after the thread patches for  
e6500.


Why?

-Scott
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Re: [PATCH v2] PowerPC: kernel: compiling issue, make additional room in exception vector area

[Chen Gang]

On 2013年04月26日 09:06, Chen Gang wrote:
 CFAR is the Come From Register.  It saves the location of the last
  branch and is hence overwritten by any branch.
  
 Do we process it just like others done (e.g. 0x300, 0xe00, 0xe20 ...) ?
   . = 0x900
   .globl decrementer_pSeries
 decrementer_pSeries:
   HMT_MEDIUM_PPR_DISCARD
   SET_SCRATCH0(r13)
   b decrementer_pSeries_0
 
   ...
 
 

Such as the fix below, is it OK (just like 0x300 or 0x200 has done) ?

Please check, thanks.

---diff begin-

diff --git a/arch/powerpc/kernel/exceptions-64s.S 
b/arch/powerpc/kernel/exceptions-64s.S
index e789ee7..a0a5ff2 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -254,7 +254,14 @@ hardware_interrupt_hv:
STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
 
-   MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
+   . = 0x900
+   .globl decrementer_pSeries
+decrementer_pSeries:
+   HMT_MEDIUM_PPR_DISCARD
+   SET_SCRATCH0(r13)   /* save r13 */
+   EXCEPTION_PROLOG_0(PACA_EXGEN)
+   b   decrementer_pSeries_0
+
STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
 
MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
@@ -536,6 +543,12 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
 #endif
 
.align  7
+   /* moved from 0x900 */
+decrementer_pSeries_0:
+   EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, 0x900)
+   EXCEPTION_PROLOG_PSERIES_1(decrementer_common, EXC_STD)
+
+   .align  7
/* moved from 0xe00 */
STD_EXCEPTION_HV_OOL(0xe02, h_data_storage)
KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)

---diff end---

-- 
Chen Gang

Asianux Corporation
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[PATCH] powerpc: Fix hardware IRQs with MMU on exceptions when HV=0

[Michael Neuling]

POWER8 allows us to take interrupts with the MMU on.  This gives us a
second set of vectors offset at 0x4000.  

Unfortunately when coping these vectors we missed checking for MSR HV
for hardware interrupts (0x500).  This results in us trying to use
HSRR0/1 when HV=0, rather than SRR0/1 on HW IRQs

The below fixes this to check CPU_FTR_HVMODE when patching the code at
0x4500.  

Also we remove the check for CPU_FTR_ARCH_206 since relocation on IRQs
are only available in arch 2.07 and beyond.

Thanks to benh for helping find this.

Signed-off-by: Michael Neuling mi...@neuling.org
cc: sta...@kernel.org

diff --git a/arch/powerpc/kernel/exceptions-64s.S 
b/arch/powerpc/kernel/exceptions-64s.S
index 56bd923..3bbe7ed 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -797,7 +797,7 @@ hardware_interrupt_relon_hv:
_MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, 
EXC_HV, SOFTEN_TEST_HV)
FTR_SECTION_ELSE
_MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, 
EXC_STD, SOFTEN_TEST_PR)
-   ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_206)
+   ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment)
STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check)
STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable)
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Re: [PATCH v2] PowerPC: kernel: compiling issue, make additional room in exception vector area

[Chen Gang]

On 2013年04月26日 09:18, Chen Gang wrote:
 On 2013年04月26日 09:06, Chen Gang wrote:
 CFAR is the Come From Register.  It saves the location of the last
 branch and is hence overwritten by any branch.

 Do we process it just like others done (e.g. 0x300, 0xe00, 0xe20 ...) ?
  . = 0x900
  .globl decrementer_pSeries
 decrementer_pSeries:
  HMT_MEDIUM_PPR_DISCARD
  SET_SCRATCH0(r13)
  b decrementer_pSeries_0

  ...



Oh, it seems EXCEPTION_PROLOG_1 will save the regesters which related
with CFAR, so I think need move EXCEPTION_PROLOG_1 to near 0x900.

-diff v2 begin-

diff --git a/arch/powerpc/kernel/exceptions-64s.S 
b/arch/powerpc/kernel/exceptions-64s.S
index e789ee7..f0489c4 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -254,7 +254,15 @@ hardware_interrupt_hv:
STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
 
-   MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
+   . = 0x900
+   .globl decrementer_pSeries
+decrementer_pSeries:
+   HMT_MEDIUM_PPR_DISCARD
+   SET_SCRATCH0(r13)   /* save r13 */
+   EXCEPTION_PROLOG_0(PACA_EXGEN)
+   EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, 0x900)
+   b   decrementer_pSeries_0
+
STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
 
MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
@@ -536,6 +544,11 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
 #endif
 
.align  7
+   /* moved from 0x900 */
+decrementer_pSeries_0:
+   EXCEPTION_PROLOG_PSERIES_1(decrementer_common, EXC_STD)
+
+   .align  7
/* moved from 0xe00 */
STD_EXCEPTION_HV_OOL(0xe02, h_data_storage)
KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)


-diff v2 end---


 
 Such as the fix below, is it OK (just like 0x300 or 0x200 has done) ?
 
 Please check, thanks.
 
 ---diff begin-
 
 diff --git a/arch/powerpc/kernel/exceptions-64s.S 
 b/arch/powerpc/kernel/exceptions-64s.S
 index e789ee7..a0a5ff2 100644
 --- a/arch/powerpc/kernel/exceptions-64s.S
 +++ b/arch/powerpc/kernel/exceptions-64s.S
 @@ -254,7 +254,14 @@ hardware_interrupt_hv:
   STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
   KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
  
 - MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
 + . = 0x900
 + .globl decrementer_pSeries
 +decrementer_pSeries:
 + HMT_MEDIUM_PPR_DISCARD
 + SET_SCRATCH0(r13)   /* save r13 */
 + EXCEPTION_PROLOG_0(PACA_EXGEN)
 + b   decrementer_pSeries_0
 +
   STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
  
   MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
 @@ -536,6 +543,12 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
  #endif
  
   .align  7
 + /* moved from 0x900 */
 +decrementer_pSeries_0:
 + EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, 0x900)
 + EXCEPTION_PROLOG_PSERIES_1(decrementer_common, EXC_STD)
 +
 + .align  7
   /* moved from 0xe00 */
   STD_EXCEPTION_HV_OOL(0xe02, h_data_storage)
   KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
 
 ---diff end---
 


-- 
Chen Gang

Asianux Corporation
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Re: [PATCH 1/1] kvm:book3e: Fix a build error

[tiejun.chen]

On 04/25/2013 08:11 PM, Caraman Mihai Claudiu-B02008 wrote:

-Original Message-
From: kvm-ppc-ow...@vger.kernel.org [mailto:kvm-ppc-
ow...@vger.kernel.org] On Behalf Of Tiejun Chen
Sent: Thursday, April 25, 2013 2:46 PM
To: ga...@kernel.crashing.org
Cc: linuxppc-dev@lists.ozlabs.org; kvm-...@vger.kernel.org;
k...@vger.kernel.org
Subject: [PATCH 1/1] kvm:book3e: Fix a build error

Commit cd66cc2e, powerpc/85xx: Add AltiVec support for e6500, adds
support for AltiVec on a Book-E class processor, but while compiling
in the CONFIG_PPC_BOOK3E_64 and CONFIG_VIRTUALIZATION case, this
introduce the following error:

arch/powerpc/kernel/exceptions-64e.S:402: undefined reference to
`kvmppc_handler_42_0x01B'
arch/powerpc/kernel/built-in.o: In function `exc_altivec_assist_book3e':
arch/powerpc/kernel/exceptions-64e.S:424: undefined reference to
`kvmppc_handler_43_0x01B'
make: *** [vmlinux] Error 1

Looks we should add these altivec kvm handlers.

Signed-off-by: Tiejun Chen tiejun.c...@windriver.com
---
  arch/powerpc/kvm/bookehv_interrupts.S |5 +
  1 file changed, 5 insertions(+)

diff --git a/arch/powerpc/kvm/bookehv_interrupts.S
b/arch/powerpc/kvm/bookehv_interrupts.S
index e8ed7d6..fa9c78a 100644
--- a/arch/powerpc/kvm/bookehv_interrupts.S
+++ b/arch/powerpc/kvm/bookehv_interrupts.S
@@ -319,6 +319,11 @@ kvm_handler BOOKE_INTERRUPT_DEBUG, EX_PARAMS(DBG), \
SPRN_DSRR0, SPRN_DSRR1, 0
  kvm_handler BOOKE_INTERRUPT_DEBUG, EX_PARAMS(CRIT), \
SPRN_CSRR0, SPRN_CSRR1, 0
+/* altivec */
+kvm_handler BOOKE_INTERRUPT_ALTIVEC_UNAVAIL, EX_PARAMS(GEN), \
+   SPRN_SRR0, SPRN_SRR1, 0
+kvm_handler BOOKE_INTERRUPT_ALTIVEC_ASSIST, EX_PARAMS(GEN), \
+   SPRN_SRR0, SPRN_SRR1, 0
  #else
  /*
   * For input register values, see
arch/powerpc/include/asm/kvm_booke_hv_asm.h
--


It seems that you are not using kvm-ppc-queue branch.


This is just used to fix a build error in powerpc.git when introduce commit 
cd66cc2e, powerpc/85xx: Add AltiVec support for e6500, in *powerpc.git* as I 
mentioned in this patch head.




I already have a patch ready for this (and AltiVec support is work


This change don't block your AltiVec support for kvm unless you think this 
change is wrong. And especially, we always can reproduce this error with/without 
enabling AltiVec, so I also don't think this should be suspended until support 
e6500 in kvm since kvm based on e5500 should work.


Tiejun


in progress) but we need first to pull e6500 kernel patches from
Linux tree into agraf.git.

-Mike










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Re: attempt to move .org backwards still show up

[Mike Qiu]

于 2013/4/25 19:16, Chen Gang 写道:

On 2013年04月25日 14:25, Paul Mackerras wrote:

On Thu, Apr 25, 2013 at 12:05:54PM +0800, Mike Qiu wrote:

This has block my work now
So I hope you can take a look ASAP
Thanks
:)

Mike

As a quick fix, turn on CONFIG_KVM_BOOK3S_64_HV.  That will eliminate
the immediate problem.

Yes, just as my original reply to Mike to bypass it, but get no reply, I
guess he has to face the CONFIG_KVM_BOOK3S_64_PR.

Now, I am just fixing it, when I finish one patch, please help check.
Actually, I have compile pass by your patch, but I see Micheal Neuling's 
reply,

I just stop to do that, and wait for you new patch :)

Now I will use your V2 patch to build

Thanks

Mike

Thanks.



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Re: [PATCH v2] PowerPC: kernel: compiling issue, make additional room in exception vector area

[Mike Qiu]

于 2013/4/26 9:36, Chen Gang 写道:
 On 2013年04月26日 09:18, Chen Gang wrote:
 On 2013年04月26日 09:06, Chen Gang wrote:
 CFAR is the Come From Register.  It saves the location of the last
 branch and is hence overwritten by any branch.

 Do we process it just like others done (e.g. 0x300, 0xe00, 0xe20 ...) ?
 . = 0x900
 .globl decrementer_pSeries
 decrementer_pSeries:
 HMT_MEDIUM_PPR_DISCARD
 SET_SCRATCH0(r13)
 b decrementer_pSeries_0

 ...


 Oh, it seems EXCEPTION_PROLOG_1 will save the regesters which related
 with CFAR, so I think need move EXCEPTION_PROLOG_1 to near 0x900.

I will try your diff V2, to see if the machine can boot up
 -diff v2 begin-

 diff --git a/arch/powerpc/kernel/exceptions-64s.S 
 b/arch/powerpc/kernel/exceptions-64s.S
 index e789ee7..f0489c4 100644
 --- a/arch/powerpc/kernel/exceptions-64s.S
 +++ b/arch/powerpc/kernel/exceptions-64s.S
 @@ -254,7 +254,15 @@ hardware_interrupt_hv:
   STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
   KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)

 - MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
 + . = 0x900
 + .globl decrementer_pSeries
 +decrementer_pSeries:
 + HMT_MEDIUM_PPR_DISCARD
 + SET_SCRATCH0(r13)   /* save r13 */
 + EXCEPTION_PROLOG_0(PACA_EXGEN)
 + EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, 0x900)
 + b   decrementer_pSeries_0
 +
   STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)

   MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
 @@ -536,6 +544,11 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
  #endif

   .align  7
 + /* moved from 0x900 */
 +decrementer_pSeries_0:
 + EXCEPTION_PROLOG_PSERIES_1(decrementer_common, EXC_STD)
 +
 + .align  7
   /* moved from 0xe00 */
   STD_EXCEPTION_HV_OOL(0xe02, h_data_storage)
   KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)


 -diff v2 end---


 Such as the fix below, is it OK (just like 0x300 or 0x200 has done) ?

 Please check, thanks.

 ---diff begin-

 diff --git a/arch/powerpc/kernel/exceptions-64s.S 
 b/arch/powerpc/kernel/exceptions-64s.S
 index e789ee7..a0a5ff2 100644
 --- a/arch/powerpc/kernel/exceptions-64s.S
 +++ b/arch/powerpc/kernel/exceptions-64s.S
 @@ -254,7 +254,14 @@ hardware_interrupt_hv:
  STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
  KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
  
 -MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
 +. = 0x900
 +.globl decrementer_pSeries
 +decrementer_pSeries:
 +HMT_MEDIUM_PPR_DISCARD
 +SET_SCRATCH0(r13)   /* save r13 */
 +EXCEPTION_PROLOG_0(PACA_EXGEN)
 +b   decrementer_pSeries_0
 +
  STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
  
  MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
 @@ -536,6 +543,12 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
  #endif
  
  .align  7
 +/* moved from 0x900 */
 +decrementer_pSeries_0:
 +EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, 0x900)
 +EXCEPTION_PROLOG_PSERIES_1(decrementer_common, EXC_STD)
 +
 +.align  7
  /* moved from 0xe00 */
  STD_EXCEPTION_HV_OOL(0xe02, h_data_storage)
  KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)

 ---diff end---



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Re: attempt to move .org backwards still show up

[Chen Gang]

On 2013年04月26日 09:58, Mike Qiu wrote:
 于 2013/4/25 19:16, Chen Gang 写道:
 On 2013年04月25日 14:25, Paul Mackerras wrote:
 On Thu, Apr 25, 2013 at 12:05:54PM +0800, Mike Qiu wrote:
 This has block my work now
 So I hope you can take a look ASAP
 Thanks
 :)

 Mike
 As a quick fix, turn on CONFIG_KVM_BOOK3S_64_HV.  That will eliminate
 the immediate problem.
 Yes, just as my original reply to Mike to bypass it, but get no reply, I
 guess he has to face the CONFIG_KVM_BOOK3S_64_PR.

 Now, I am just fixing it, when I finish one patch, please help check.
 Actually, I have compile pass by your patch, but I see Micheal Neuling's
 reply,
 I just stop to do that, and wait for you new patch :)
 

I am just continuing (before get fixed, I should continue)


 Now I will use your V2 patch to build

Please see the discussion of patch v2, it still has another issues, but
I am still trying (I guess Michael is just checking).

:-)

-- 
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Asianux Corporation
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Re: [PATCH v2] PowerPC: kernel: compiling issue, make additional room in exception vector area

[Chen Gang]

On 2013年04月26日 10:03, Mike Qiu wrote:
 �� 2013/4/26 9:36, Chen Gang �:
  On 2013��04��26�� 09:18, Chen Gang wrote:
  On 2013��04��26�� 09:06, Chen Gang wrote:
  CFAR is the Come From Register.  It saves the location of the last
  branch and is hence overwritten by any branch.
 
  Do we process it just like others done (e.g. 0x300, 0xe00, 0xe20 ...) ?
 . = 0x900
 .globl decrementer_pSeries
  decrementer_pSeries:
 HMT_MEDIUM_PPR_DISCARD
 SET_SCRATCH0(r13)
 b decrementer_pSeries_0
 
 ...
 
 
  Oh, it seems EXCEPTION_PROLOG_1 will save the regesters which related
  with CFAR, so I think need move EXCEPTION_PROLOG_1 to near 0x900.
 I will try your diff V2, to see if the machine can boot up

OK, thanks. (hope it can work)

:-)

-- 
Chen Gang

Asianux Corporation
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RE: [PATCH 1/2] powerpc: Move opcode definitions from kvm/emulate.c to asm/ppc-opcode.h

[Jia Hongtao-B38951]

 -Original Message-
 From: Benjamin Herrenschmidt [mailto:b...@kernel.crashing.org]
 Sent: Wednesday, April 24, 2013 12:19 PM
 To: Jia Hongtao-B38951
 Cc: Michael Ellerman; Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org
 Subject: Re: [PATCH 1/2] powerpc: Move opcode definitions from
 kvm/emulate.c to asm/ppc-opcode.h
 
 On Tue, 2013-04-23 at 06:36 +, Jia Hongtao-B38951 wrote:
  These definitions are firstly used by KVM defined like OP_31_XOP_TRAP.
  Two ways to extract these definitions for public use:
 
  1. Like this patch did. For keeping the KVM code that using these
 definitions unchanged we do not update them to match.
 
  2. Move these definitions to another .h file like my last patch did:
 http://patchwork.ozlabs.org/patch/235646/
 You can see the comments there.
 
 There's a better way ... but it's more work.
 
 All opcodes are based on a primary opcode and a potential secondary
 opcode. You could/should rework ppc-opcodes.h to in fact define them
 all that way as well, which would reconcile the KVM way and the
 existing stuff.
 
 Cheers,
 Ben.
 

Agree. But I'm afraid to say that I'm too busy to do this more work
right now. Could we defer this work for some time?

Thanks.
- Hongtao
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Re: [PATCH v4 2/13] Correct buffer parsing in update_dt_node()

[Stephen Rothwell]

Hi Nathan,


On Wed, 24 Apr 2013 10:49:36 -0500 Nathan Fontenot nf...@linux.vnet.ibm.com 
wrote:

 @@ -134,6 +134,7 @@
   char *prop_data;
   char *rtas_buf;
   int update_properties_token;
 + u32 vd;
  
   update_properties_token = rtas_token(ibm,update-properties);
   if (update_properties_token == RTAS_UNKNOWN_SERVICE)
 @@ -160,13 +161,24 @@
  
   prop_data = rtas_buf + sizeof(*upwa);
  
 - for (i = 0; i  upwa-nprops; i++) {
 + /* The first element of the buffer is the path of the node
 +  * being updated in the form of a 8 byte string length

bit ?

 +  * followed by the string. Skip past this to get to the
 +  * properties being updated.
 +  */
 + vd = *prop_data++;
 + prop_data += vd;
-- 
Cheers,
Stephen Rothwells...@canb.auug.org.au


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Re: [PATCH v4 5/13] Use ARRAY_SIZE to iterate over firmware_features_table array

[Stephen Rothwell]

Hi Nathan,

On Wed, 24 Apr 2013 10:55:08 -0500 Nathan Fontenot nf...@linux.vnet.ibm.com 
wrote:

 When iterating over the entries in firmware_features_table we only need
 to go over the actual number of entries in the array instead of declaring
 it to be bigger and checking to make sure there is a valid entry in every
 slot.
 
 This patch removes the FIRMWARE_MAX_FEATURES #define and replaces the
 array looping with the use of ARRAY_SIZE().
 

Suggested-by: Stephen Rothwell s...@canb.auug.org.au

 Signed-off-by: Nathan Fontenot nf...@linux.vnet.ibm.com
 @@ -77,12 +77,10 @@
   pr_debug( - fw_feature_init()\n);
  
   for (s = hypertas; s  hypertas + len; s += strlen(s) + 1) {
 - for (i = 0; i  FIRMWARE_MAX_FEATURES; i++) {
 + for (i = 0; i  ARRAY_SIZE(firmware_features_table); i++) {

You should explicitly include linux/kernel.h to use ARRAY_SIZE().

-- 
Cheers,
Stephen Rothwells...@canb.auug.org.au


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Re: [PATCH v2] PowerPC: kernel: compiling issue, make additional room in exception vector area

[Mike Qiu]

于 2013/4/26 10:06, Chen Gang 写道:

On 2013年04月26日 10:03, Mike Qiu wrote:

�� 2013/4/26 9:36, Chen Gang �:

On 2013��04��26�� 09:18, Chen Gang wrote:

On 2013��04��26�� 09:06, Chen Gang wrote:

CFAR is the Come From Register.  It saves the location of the last

branch and is hence overwritten by any branch.


Do we process it just like others done (e.g. 0x300, 0xe00, 0xe20 ...) ?
. = 0x900
.globl decrementer_pSeries
decrementer_pSeries:
HMT_MEDIUM_PPR_DISCARD
SET_SCRATCH0(r13)
b decrementer_pSeries_0

...



Oh, it seems EXCEPTION_PROLOG_1 will save the regesters which related
with CFAR, so I think need move EXCEPTION_PROLOG_1 to near 0x900.

I will try your diff V2, to see if the machine can boot up

OK, thanks. (hope it can work)
It seems that the machine can be bootup in powernv mode, but I'm not 
sure if my machine call that module.


At lease my machine can boot up

Thanks
Mike


:-)



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Re: [PATCH V4 0/5] powerpc, perf: BHRB based branch stack enablement on POWER8

[Michael Neuling]

Anshuman,

IIRC there are new bits in the FSCR and HFSCR you need to enable for the
PMU and BRHB.  Can you please check these are enabled?

Mikey

Anshuman Khandual khand...@linux.vnet.ibm.com wrote:
 Branch History Rolling Buffer (BHRB) is a new PMU feaure in 
 IBM
 POWER8 processor which records the branch instructions inside the execution
 pipeline. This patchset enables the basic functionality of the feature through
 generic perf branch stack sampling framework.
 
 Sample output
 -
 $./perf record -b top
 $./perf report
 
 Overhead  Command  Source Shared Object   Source 
 Symbol  Target Shared ObjectTarget Symbol
 #   ...    
 ..    
 ...
 #
 
  7.82%  top  libc-2.11.2.so[k] _IO_vfscanf
  libc-2.11.2.so[k] _IO_vfscanf
  6.17%  top  libc-2.11.2.so[k] _IO_vfscanf
  [unknown] [k] 
  2.37%  top  [unknown] [k] 0xf7aafb30 
  [unknown] [k] 
  1.80%  top  [unknown] [k] 0x0fe07978 
  libc-2.11.2.so[k] _IO_vfscanf
  1.60%  top  libc-2.11.2.so[k] _IO_vfscanf
  [kernel.kallsyms] [k] .do_task_stat
  1.20%  top  [kernel.kallsyms] [k] .do_task_stat  
  [kernel.kallsyms] [k] .do_task_stat
  1.02%  top  libc-2.11.2.so[k] vfprintf   
  libc-2.11.2.so[k] vfprintf
  0.92%  top  top   [k] _init  
  [unknown] [k] 0x0fe037f4
 
 Changes in V2
 --
 - Added copyright messages to the newly created files
 - Modified couple of commit messages
 
 Changes in V3
 -
 - Incorporated review comments from Segher https://lkml.org/lkml/2013/4/16/350
 - Worked on a solution for review comment from Michael Ellerman 
 https://lkml.org/lkml/2013/4/17/548
   - Could not move updated cpu_hw_events structure from core-book3s.c 
 file into perf_event_server.h
   Because perf_event_server.h is pulled in first inside 
 linux/perf_event.h before the definition of
   perf_branch_entry structure. Thats the reason why perf_branch_entry 
 definition is not available
   inside perf_event_server.h where we define the array inside 
 cpu_hw_events structure.
 
   - Finally have pulled in the code from perf_event_bhrb.c into 
 core-book3s.c
 
 - Improved documentation for the patchset
 
 Changes in V4
 -
 - Incorporated review comments on V3 regarding new instruction encoding
 
 Anshuman Khandual (5):
   powerpc, perf: Add new BHRB related instructions for POWER8
   powerpc, perf: Add basic assembly code to read BHRB entries on POWER8
   powerpc, perf: Add new BHRB related generic functions, data and flags
   powerpc, perf: Define BHRB generic functions, data and flags for POWER8
   powerpc, perf: Enable branch stack sampling framework
 
  arch/powerpc/include/asm/perf_event_server.h |   7 ++
  arch/powerpc/include/asm/ppc-opcode.h|   8 ++
  arch/powerpc/perf/Makefile   |   2 +-
  arch/powerpc/perf/bhrb.S |  44 +++
  arch/powerpc/perf/core-book3s.c  | 167 
 ++-
  arch/powerpc/perf/power8-pmu.c   |  57 -
  6 files changed, 280 insertions(+), 5 deletions(-)
  create mode 100644 arch/powerpc/perf/bhrb.S
 
 -- 
 1.7.11.7
 
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Re: attempt to move .org backwards still show up

[Mike Qiu]

于 2013/4/25 14:25, Paul Mackerras 写道:

On Thu, Apr 25, 2013 at 12:05:54PM +0800, Mike Qiu wrote:

This has block my work now
So I hope you can take a look ASAP
Thanks
:)

Mike

As a quick fix, turn on CONFIG_KVM_BOOK3S_64_HV.  That will eliminate
the immediate problem.

Thanks
got it, I will have a try.

Paul.



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Re: [PATCH v2] PowerPC: kernel: compiling issue, make additional room in exception vector area

[Chen Gang]

On 2013年04月26日 11:08, Mike Qiu wrote:
 于 2013/4/26 10:06, Chen Gang 写道:
 On 2013年04月26日 10:03, Mike Qiu wrote:
 �� 2013/4/26 9:36, Chen Gang �:
 On 2013��04��26�� 09:18, Chen Gang wrote:
 On 2013��04��26�� 09:06, Chen Gang wrote:
 CFAR is the Come From Register.  It saves the location of the
 last
 branch and is hence overwritten by any branch.

 Do we process it just like others done (e.g. 0x300, 0xe00,
 0xe20 ...) ?
 . = 0x900
 .globl decrementer_pSeries
 decrementer_pSeries:
   HMT_MEDIUM_PPR_DISCARD
 SET_SCRATCH0(r13)
 b decrementer_pSeries_0

 ...


 Oh, it seems EXCEPTION_PROLOG_1 will save the regesters which related
 with CFAR, so I think need move EXCEPTION_PROLOG_1 to near 0x900.
 I will try your diff V2, to see if the machine can boot up
 OK, thanks. (hope it can work)
 It seems that the machine can be bootup in powernv mode, but I'm not
 sure if my machine call that module.
 
 At lease my machine can boot up

Thank you for your information !

I have checked the disassemble by powerpc64-linux-gnu-objdump, it seems
all we have done for 0x900 is almost like the original done for 0x200.

I am just learning about the CFAR (google it), And I plan to wait for a
day, if all things go smoothly, I will send patch v3.


:-)

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Re: [PATCH v2] PowerPC: kernel: compiling issue, make additional room in exception vector area

[Chen Gang]

On 2013年04月26日 11:25, Chen Gang wrote:
 On 2013年04月26日 11:08, Mike Qiu wrote:
 于 2013/4/26 10:06, Chen Gang 写道:
 On 2013年04月26日 10:03, Mike Qiu wrote:
 �� 2013/4/26 9:36, Chen Gang �:
 On 2013��04��26�� 09:18, Chen Gang wrote:
 On 2013��04��26�� 09:06, Chen Gang wrote:
 CFAR is the Come From Register.  It saves the location of the
 last
 branch and is hence overwritten by any branch.

 Do we process it just like others done (e.g. 0x300, 0xe00,
 0xe20 ...) ?
 . = 0x900
 .globl decrementer_pSeries
 decrementer_pSeries:
   HMT_MEDIUM_PPR_DISCARD
 SET_SCRATCH0(r13)
 b decrementer_pSeries_0

 ...


 Oh, it seems EXCEPTION_PROLOG_1 will save the regesters which related
 with CFAR, so I think need move EXCEPTION_PROLOG_1 to near 0x900.
 I will try your diff V2, to see if the machine can boot up
 OK, thanks. (hope it can work)
 It seems that the machine can be bootup in powernv mode, but I'm not
 sure if my machine call that module.

 At lease my machine can boot up
 

Please reference commit number: 1707dd161349e6c54170c88d94fed012e3d224e3
(1707dd1 powerpc: Save CFAR before branching in interrupt entry paths)

What our diff v2 has done is just the fix for our patch v2 (just like
the commit 1707dd1 has done).

Please check, thanks.

:-)

 Thank you for your information !
 
 I have checked the disassemble by powerpc64-linux-gnu-objdump, it seems
 all we have done for 0x900 is almost like the original done for 0x200.
 
 I am just learning about the CFAR (google it), And I plan to wait for a
 day, if all things go smoothly, I will send patch v3.
 
 
 :-)
 


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[PATCH] powerpc: Fix attempt to move .org backwards error

[Paul Mackerras]

Building a 64-bit powerpc kernel with PR KVM enabled currently gives
this error:

  AS  arch/powerpc/kernel/head_64.o
arch/powerpc/kernel/exceptions-64s.S: Assembler messages:
arch/powerpc/kernel/exceptions-64s.S:258: Error: attempt to move .org backwards
make[2]: *** [arch/powerpc/kernel/head_64.o] Error 1

This happens because the MASKABLE_EXCEPTION_PSERIES macro turns into
33 instructions, but we only have space for 32 at the decrementer
interrupt vector (from 0x900 to 0x980).

In the code generated by the MASKABLE_EXCEPTION_PSERIES macro, we
currently have two instances of the HMT_MEDIUM macro, which has the
effect of setting the SMT thread priority to medium.  One is the
first instruction, and is overwritten by a no-op on processors where
we save the PPR (processor priority register), that is, POWER7 or
later.  The other is after we have saved the PPR.

In order to reduce the code at 0x900 by one instruction, we omit the
first HMT_MEDIUM.  On processors without SMT this will have no effect
since HMT_MEDIUM is a no-op there.  On POWER5 and RS64 machines this
will mean that the first few instructions take a little longer in the
case where a decrementer interrupt occurs when the hardware thread is
running at low SMT priority.  On POWER6 and later machines, the
hardware automatically boosts the thread priority when a decrementer
interrupt is taken if the thread priority was below medium, so this
change won't make any difference.

The alternative would be to branch out of line after saving the CFAR.
However, that would incur an extra overhead on all processors, whereas
the approach adopted here only adds overhead on older threaded processors.

Signed-off-by: Paul Mackerras pau...@samba.org
---
 arch/powerpc/include/asm/exception-64s.h |2 +-
 arch/powerpc/kernel/exceptions-64s.S |7 ++-
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/include/asm/exception-64s.h 
b/arch/powerpc/include/asm/exception-64s.h
index 05e6d2e..8e5fae8 100644
--- a/arch/powerpc/include/asm/exception-64s.h
+++ b/arch/powerpc/include/asm/exception-64s.h
@@ -414,7 +414,6 @@ label##_relon_hv:   
\
 #define SOFTEN_NOTEST_HV(vec)  _SOFTEN_TEST(EXC_HV, vec)
 
 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
-   HMT_MEDIUM_PPR_DISCARD; \
SET_SCRATCH0(r13);/* save r13 */\
EXCEPTION_PROLOG_0(PACA_EXGEN); \
__EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec);   \
@@ -427,6 +426,7 @@ label##_relon_hv:   
\
. = loc;\
.globl label##_pSeries; \
 label##_pSeries:   \
+   HMT_MEDIUM_PPR_DISCARD; \
_MASKABLE_EXCEPTION_PSERIES(vec, label, \
EXC_STD, SOFTEN_TEST_PR)
 
diff --git a/arch/powerpc/kernel/exceptions-64s.S 
b/arch/powerpc/kernel/exceptions-64s.S
index 56bd923..574db3f 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -235,6 +235,7 @@ instruction_access_slb_pSeries:
.globl hardware_interrupt_hv;
 hardware_interrupt_pSeries:
 hardware_interrupt_hv:
+   HMT_MEDIUM_PPR_DISCARD
BEGIN_FTR_SECTION
_MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
EXC_HV, SOFTEN_TEST_HV)
@@ -254,7 +255,11 @@ hardware_interrupt_hv:
STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
 
-   MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
+   . = 0x900
+   .globl decrementer_pSeries
+decrementer_pSeries:
+   _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer, EXC_STD, SOFTEN_TEST_PR)
+
STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
 
MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
-- 
1.7.10.4

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Re: [PATCH v2] PowerPC: kernel: compiling issue, make additional room in exception vector area

[Mike Qiu]

于 2013/4/26 11:42, Chen Gang 写道:

On 2013年04月26日 11:25, Chen Gang wrote:

On 2013年04月26日 11:08, Mike Qiu wrote:

于 2013/4/26 10:06, Chen Gang 写道:

On 2013年04月26日 10:03, Mike Qiu wrote:

�� 2013/4/26 9:36, Chen Gang �:

On 2013��04��26�� 09:18, Chen Gang wrote:

On 2013��04��26�� 09:06, Chen Gang wrote:

CFAR is the Come From Register.  It saves the location of the
last

branch and is hence overwritten by any branch.


Do we process it just like others done (e.g. 0x300, 0xe00,
0xe20 ...) ?
 . = 0x900
 .globl decrementer_pSeries
decrementer_pSeries:
   HMT_MEDIUM_PPR_DISCARD
 SET_SCRATCH0(r13)
 b decrementer_pSeries_0

 ...



Oh, it seems EXCEPTION_PROLOG_1 will save the regesters which related
with CFAR, so I think need move EXCEPTION_PROLOG_1 to near 0x900.

I will try your diff V2, to see if the machine can boot up

OK, thanks. (hope it can work)

It seems that the machine can be bootup in powernv mode, but I'm not
sure if my machine call that module.

At lease my machine can boot up

Please reference commit number: 1707dd161349e6c54170c88d94fed012e3d224e3
(1707dd1 powerpc: Save CFAR before branching in interrupt entry paths)

What our diff v2 has done is just the fix for our patch v2 (just like
the commit 1707dd1 has done).

Please check, thanks.

:-)
I will check this evening or tomorrow, I have something else to do this 
afteroon.

Thank you for your information !

I have checked the disassemble by powerpc64-linux-gnu-objdump, it seems
all we have done for 0x900 is almost like the original done for 0x200.

I am just learning about the CFAR (google it), And I plan to wait for a
day, if all things go smoothly, I will send patch v3.


:-)





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Re: [PATCH] powerpc: Fix attempt to move .org backwards error

[Chen Gang]

On 2013年04月26日 11:51, Paul Mackerras wrote:
 Building a 64-bit powerpc kernel with PR KVM enabled currently gives
 this error:
 
   AS  arch/powerpc/kernel/head_64.o
 arch/powerpc/kernel/exceptions-64s.S: Assembler messages:
 arch/powerpc/kernel/exceptions-64s.S:258: Error: attempt to move .org 
 backwards
 make[2]: *** [arch/powerpc/kernel/head_64.o] Error 1
 
 This happens because the MASKABLE_EXCEPTION_PSERIES macro turns into
 33 instructions, but we only have space for 32 at the decrementer
 interrupt vector (from 0x900 to 0x980).
 
 In the code generated by the MASKABLE_EXCEPTION_PSERIES macro, we
 currently have two instances of the HMT_MEDIUM macro, which has the
 effect of setting the SMT thread priority to medium.  One is the
 first instruction, and is overwritten by a no-op on processors where
 we save the PPR (processor priority register), that is, POWER7 or
 later.  The other is after we have saved the PPR.
 
 In order to reduce the code at 0x900 by one instruction, we omit the
 first HMT_MEDIUM.  On processors without SMT this will have no effect
 since HMT_MEDIUM is a no-op there.  On POWER5 and RS64 machines this
 will mean that the first few instructions take a little longer in the
 case where a decrementer interrupt occurs when the hardware thread is
 running at low SMT priority.  On POWER6 and later machines, the
 hardware automatically boosts the thread priority when a decrementer
 interrupt is taken if the thread priority was below medium, so this
 change won't make any difference.
 
 The alternative would be to branch out of line after saving the CFAR.
 However, that would incur an extra overhead on all processors, whereas
 the approach adopted here only adds overhead on older threaded processors.
 
 Signed-off-by: Paul Mackerras pau...@samba.org
 ---

Hello Mike:

Please try Paul's patch, firstly.

:-)

Thanks.


  arch/powerpc/include/asm/exception-64s.h |2 +-
  arch/powerpc/kernel/exceptions-64s.S |7 ++-
  2 files changed, 7 insertions(+), 2 deletions(-)
 
 diff --git a/arch/powerpc/include/asm/exception-64s.h 
 b/arch/powerpc/include/asm/exception-64s.h
 index 05e6d2e..8e5fae8 100644
 --- a/arch/powerpc/include/asm/exception-64s.h
 +++ b/arch/powerpc/include/asm/exception-64s.h
 @@ -414,7 +414,6 @@ label##_relon_hv: 
 \
  #define SOFTEN_NOTEST_HV(vec)_SOFTEN_TEST(EXC_HV, vec)
  
  #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)   \
 - HMT_MEDIUM_PPR_DISCARD; \
   SET_SCRATCH0(r13);/* save r13 */\
   EXCEPTION_PROLOG_0(PACA_EXGEN); \
   __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec);   \
 @@ -427,6 +426,7 @@ label##_relon_hv: 
 \
   . = loc;\
   .globl label##_pSeries; \
  label##_pSeries: \
 + HMT_MEDIUM_PPR_DISCARD; \
   _MASKABLE_EXCEPTION_PSERIES(vec, label, \
   EXC_STD, SOFTEN_TEST_PR)
  
 diff --git a/arch/powerpc/kernel/exceptions-64s.S 
 b/arch/powerpc/kernel/exceptions-64s.S
 index 56bd923..574db3f 100644
 --- a/arch/powerpc/kernel/exceptions-64s.S
 +++ b/arch/powerpc/kernel/exceptions-64s.S
 @@ -235,6 +235,7 @@ instruction_access_slb_pSeries:
   .globl hardware_interrupt_hv;
  hardware_interrupt_pSeries:
  hardware_interrupt_hv:
 + HMT_MEDIUM_PPR_DISCARD
   BEGIN_FTR_SECTION
   _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
   EXC_HV, SOFTEN_TEST_HV)
 @@ -254,7 +255,11 @@ hardware_interrupt_hv:
   STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
   KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
  
 - MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
 + . = 0x900
 + .globl decrementer_pSeries
 +decrementer_pSeries:
 + _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer, EXC_STD, SOFTEN_TEST_PR)
 +
   STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
  
   MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
 


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[PATCH v4 0/6] powerpc/powernv: PHB3 Support

[Gavin Shan]

The patchset includes minimal support for PHB3. Initially, flag PNV_PHB_IODA2
is introduced to differentiate IODA2 compliant PHB3 from other types of PHBs and
do initialization accordingly for PHB3. Besides, variable IODA2 tables reside in
system memory and we allocate them in kernel, then pass them to f/w and enable
the corresponding BARs through OPAL API. The P/Q bits of IVE should be handled
on PHB3 by software and the patchset intends to cover that as well.

NOTE: The first patch comes from Ben.

v3 - v4
* Remove the patch to retrieve IODA2 table address/length since
  it's useless now
* Introduce IRQ chip for individual PHB and patch the handlers
  during MSI interrupt setup time according to Ben's suggestion
* Pass HW IRQ to opal_pci_msi_eoi()
* Remove sysdata from IOMMU table
v2 - v3
* Remove the unnecessary quirk. That's only useful with simics
* Do MSI EOI in single OPAL API opal_pci_msi_eoi()
* Use explicit branch to fully utilize CPU's prefetching engine
  while doing TCE invalidation
* Add one patch to fix invalid IOMMU table for PCI devices
v1 - v2
* Introduce CONFIG_POWERNV_MSI, which is similiar to CONFIG_PSERIES_MSI
* Enable CONFIG_PPC_MSI_BITMAP while selecting CONFIG_POWERNV_MSI
* Eleminate (struct pnv_phb::msi_count) since it has been removed in
  linux-next
* Replace (CONFIG_PPC_POWERNV  CONFIG_PCI_MSI) with CONFIG_POWERNV_MSI
* Move declaration of pnv_pci_msi_eoi() to asm/xics.h
* Remove unnecessary #ifdef ... #endif in icp-native.c
* Add support to invalidate TCE
* Let the IODA2 table allocated by firmware and kernel to retrieve them
  through device-tree

---

arch/powerpc/include/asm/opal.h|7 +-
arch/powerpc/include/asm/xics.h|1 +
arch/powerpc/platforms/powernv/Kconfig |5 +
arch/powerpc/platforms/powernv/opal-wrappers.S |1 +
arch/powerpc/platforms/powernv/pci-ioda.c  |  330 
arch/powerpc/platforms/powernv/pci-p5ioc2.c|4 +-
arch/powerpc/platforms/powernv/pci.c   |   56 +
arch/powerpc/platforms/powernv/pci.h   |   35 ++-
arch/powerpc/sysdev/Kconfig|1 +
arch/powerpc/sysdev/xics/icp-native.c  |2 +-
10 files changed, 332 insertions(+), 110 deletions(-)

Thanks,
Gavin

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[PATCH 2/6] powerpc/powernv: Add option CONFIG_POWERNV_MSI

[Gavin Shan]

As Michael Ellerman suggested, to add CONFIG_POWERNV_MSI for PowerNV
platform. That's similar to CONFIG_PSERIES_MSI for pSeries platform.
For now, we don't make it dependent on CONFIG_EEH since it's not ready
to enable that yet.

Apart from that, we also enable CONFIG_PPC_MSI_BITMAP on selecting
CONFIG_POWERNV_MSI.

Signed-off-by: Gavin Shan sha...@linux.vnet.ibm.com
---
 arch/powerpc/platforms/powernv/Kconfig |5 +
 arch/powerpc/sysdev/Kconfig|1 +
 2 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/Kconfig 
b/arch/powerpc/platforms/powernv/Kconfig
index 74fea5c..d3e840d 100644
--- a/arch/powerpc/platforms/powernv/Kconfig
+++ b/arch/powerpc/platforms/powernv/Kconfig
@@ -8,6 +8,11 @@ config PPC_POWERNV
select PPC_PCI_CHOICE if EMBEDDED
default y
 
+config POWERNV_MSI
+   bool Support PCI MSI on PowerNV platform
+   depends on PCI_MSI
+   default y
+
 config PPC_POWERNV_RTAS
depends on PPC_POWERNV
bool Support for RTAS based PowerNV platforms such as BML
diff --git a/arch/powerpc/sysdev/Kconfig b/arch/powerpc/sysdev/Kconfig
index a84fecf..ab4cb54 100644
--- a/arch/powerpc/sysdev/Kconfig
+++ b/arch/powerpc/sysdev/Kconfig
@@ -19,6 +19,7 @@ config PPC_MSI_BITMAP
default y if MPIC
default y if FSL_PCI
default y if PPC4xx_MSI
+   default y if POWERNV_MSI
 
 source arch/powerpc/sysdev/xics/Kconfig
 
-- 
1.7.5.4

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[PATCH 1/6] powerpc/powernv: Supports PHB3

[Gavin Shan]

The patch intends to initialize PHB3 during system boot stage. The
flag PNV_PHB_MODEL_PHB3 is introduced to differentiate IODA2
compatible PHB3 from other types of PHBs.

Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
 arch/powerpc/platforms/powernv/pci-ioda.c |   62 +++--
 arch/powerpc/platforms/powernv/pci.c  |6 ++-
 arch/powerpc/platforms/powernv/pci.h  |8 ++-
 3 files changed, 42 insertions(+), 34 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c 
b/arch/powerpc/platforms/powernv/pci-ioda.c
index a5c5f15..3d4e958 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -852,18 +852,19 @@ static u32 pnv_ioda_bdfn_to_pe(struct pnv_phb *phb, 
struct pci_bus *bus,
return phb-ioda.pe_rmap[(bus-number  8) | devfn];
 }
 
-void __init pnv_pci_init_ioda1_phb(struct device_node *np)
+void __init pnv_pci_init_ioda_phb(struct device_node *np, int ioda_type)
 {
struct pci_controller *hose;
static int primary = 1;
struct pnv_phb *phb;
unsigned long size, m32map_off, iomap_off, pemap_off;
const u64 *prop64;
+   const u32 *prop32;
u64 phb_id;
void *aux;
long rc;
 
-   pr_info( Initializing IODA OPAL PHB %s\n, np-full_name);
+   pr_info( Initializing IODA%d OPAL PHB %s\n, ioda_type, np-full_name);
 
prop64 = of_get_property(np, ibm,opal-phbid, NULL);
if (!prop64) {
@@ -890,37 +891,34 @@ void __init pnv_pci_init_ioda1_phb(struct device_node *np)
hose-last_busno = 0xff;
hose-private_data = phb;
phb-opal_id = phb_id;
-   phb-type = PNV_PHB_IODA1;
+   phb-type = ioda_type;
 
/* Detect specific models for error handling */
if (of_device_is_compatible(np, ibm,p7ioc-pciex))
phb-model = PNV_PHB_MODEL_P7IOC;
+   else if (of_device_is_compatible(np, ibm,p8-pciex))
+   phb-model = PNV_PHB_MODEL_PHB3;
else
phb-model = PNV_PHB_MODEL_UNKNOWN;
 
-   /* We parse ranges now since we need to deduce the register base
-* from the IO base
-*/
+   /* Parse 32-bit and IO ranges (if any) */
pci_process_bridge_OF_ranges(phb-hose, np, primary);
primary = 0;
 
-   /* Magic formula from Milton */
+   /* Get registers */
phb-regs = of_iomap(np, 0);
if (phb-regs == NULL)
pr_err(  Failed to map registers !\n);
 
-
-   /* XXX This is hack-a-thon. This needs to be changed so that:
-*  - we obtain stuff like PE# etc... from device-tree
-*  - we properly re-allocate M32 ourselves
-*(the OFW one isn't very good)
-*/
-
/* Initialize more IODA stuff */
-   phb-ioda.total_pe = 128;
+   prop32 = of_get_property(np, ibm,opal-num-pes, NULL);
+   if (!prop32)
+   phb-ioda.total_pe = 1;
+   else
+   phb-ioda.total_pe = *prop32;
 
phb-ioda.m32_size = resource_size(hose-mem_resources[0]);
-   /* OFW Has already off top 64k of M32 space (MSI space) */
+   /* FW Has already off top 64k of M32 space (MSI space) */
phb-ioda.m32_size += 0x1;
 
phb-ioda.m32_segsize = phb-ioda.m32_size / phb-ioda.total_pe;
@@ -930,7 +928,10 @@ void __init pnv_pci_init_ioda1_phb(struct device_node *np)
phb-ioda.io_segsize = phb-ioda.io_size / phb-ioda.total_pe;
phb-ioda.io_pci_base = 0; /* XXX calculate this ? */
 
-   /* Allocate aux data  arrays */
+   /* Allocate aux data  arrays
+*
+* XXX TODO: Don't allocate io segmap on PHB3
+*/
size = _ALIGN_UP(phb-ioda.total_pe / 8, sizeof(unsigned long));
m32map_off = size;
size += phb-ioda.total_pe * sizeof(phb-ioda.m32_segmap[0]);
@@ -960,7 +961,7 @@ void __init pnv_pci_init_ioda1_phb(struct device_node *np)
hose-mem_resources[2].start = 0;
hose-mem_resources[2].end = 0;
 
-#if 0
+#if 0 /* We should really do that ... */
rc = opal_pci_set_phb_mem_window(opal-phb_id,
 window_type,
 window_num,
@@ -974,16 +975,6 @@ void __init pnv_pci_init_ioda1_phb(struct device_node *np)
phb-ioda.m32_size, phb-ioda.m32_segsize,
phb-ioda.io_size, phb-ioda.io_segsize);
 
-   if (phb-regs)  {
-   pr_devel( BUID = 0x%016llx\n, in_be64(phb-regs + 0x100));
-   pr_devel( PHB2_CR  = 0x%016llx\n, in_be64(phb-regs + 0x160));
-   pr_devel( IO_BAR   = 0x%016llx\n, in_be64(phb-regs + 0x170));
-   pr_devel( IO_BAMR  = 0x%016llx\n, in_be64(phb-regs + 0x178));
-   pr_devel( IO_SAR   = 0x%016llx\n, in_be64(phb-regs + 0x180));
-   pr_devel( M32_BAR  = 0x%016llx\n, in_be64(phb-regs + 0x190));
-   pr_devel( M32_BAMR = 0x%016llx\n, in_be64(phb-regs + 0x198));
- 

[PATCH 3/6] powerpc/powernv: Patch MSI EOI handler on P8

[Gavin Shan]

The EOI handler of MSI/MSI-X interrupts for P8 (PHB3) need additional
steps to handle the P/Q bits in IVE before EOIing the corresponding
interrupt. The patch changes the EOI handler to cover that. we have
individual IRQ chip in each PHB instance. During the MSI IRQ setup
time, the IRQ chip is copied over from the original one for that IRQ,
and the EOI handler is patched with the one that will handle the P/Q
bits (As Ben suggested).

Signed-off-by: Gavin Shan sha...@linux.vnet.ibm.com
---
 arch/powerpc/include/asm/opal.h|2 +
 arch/powerpc/include/asm/xics.h|1 +
 arch/powerpc/platforms/powernv/opal-wrappers.S |1 +
 arch/powerpc/platforms/powernv/pci-ioda.c  |   38 ++-
 arch/powerpc/platforms/powernv/pci-p5ioc2.c|4 +-
 arch/powerpc/platforms/powernv/pci.c   |2 +-
 arch/powerpc/platforms/powernv/pci.h   |8 -
 arch/powerpc/sysdev/xics/icp-native.c  |2 +-
 8 files changed, 50 insertions(+), 8 deletions(-)

diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index a4b28f1..b6c8b58 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -117,6 +117,7 @@ extern int opal_enter_rtas(struct rtas_args *args,
 #define OPAL_SET_SLOT_LED_STATUS   55
 #define OPAL_GET_EPOW_STATUS   56
 #define OPAL_SET_SYSTEM_ATTENTION_LED  57
+#define OPAL_PCI_MSI_EOI   63
 
 #ifndef __ASSEMBLY__
 
@@ -506,6 +507,7 @@ int64_t opal_pci_get_xive_reissue(uint64_t phb_id, uint32_t 
xive_number,
  uint8_t *p_bit, uint8_t *q_bit);
 int64_t opal_pci_set_xive_reissue(uint64_t phb_id, uint32_t xive_number,
  uint8_t p_bit, uint8_t q_bit);
+int64_t opal_pci_msi_eoi(uint64_t phb_id, uint32_t hw_irq);
 int64_t opal_pci_set_xive_pe(uint64_t phb_id, uint32_t pe_number,
 uint32_t xive_num);
 int64_t opal_get_xive_source(uint64_t phb_id, uint32_t xive_num,
diff --git a/arch/powerpc/include/asm/xics.h b/arch/powerpc/include/asm/xics.h
index 4ae9a09..282d43a 100644
--- a/arch/powerpc/include/asm/xics.h
+++ b/arch/powerpc/include/asm/xics.h
@@ -150,6 +150,7 @@ extern void xics_register_ics(struct ics *ics);
 extern void xics_teardown_cpu(void);
 extern void xics_kexec_teardown_cpu(int secondary);
 extern void xics_migrate_irqs_away(void);
+extern void icp_native_eoi(struct irq_data *d);
 #ifdef CONFIG_SMP
 extern int xics_get_irq_server(unsigned int virq, const struct cpumask 
*cpumask,
   unsigned int strict_check);
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S 
b/arch/powerpc/platforms/powernv/opal-wrappers.S
index 3bb07e5..6fabe92 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -107,3 +107,4 @@ OPAL_CALL(opal_pci_mask_pe_error,   
OPAL_PCI_MASK_PE_ERROR);
 OPAL_CALL(opal_set_slot_led_status,OPAL_SET_SLOT_LED_STATUS);
 OPAL_CALL(opal_get_epow_status,OPAL_GET_EPOW_STATUS);
 OPAL_CALL(opal_set_system_attention_led,   OPAL_SET_SYSTEM_ATTENTION_LED);
+OPAL_CALL(opal_pci_msi_eoi,OPAL_PCI_MSI_EOI);
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c 
b/arch/powerpc/platforms/powernv/pci-ioda.c
index 3d4e958..3f88c51 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -31,6 +31,7 @@
 #include asm/opal.h
 #include asm/iommu.h
 #include asm/tce.h
+#include asm/xics.h
 
 #include powernv.h
 #include pci.h
@@ -589,11 +590,27 @@ static void pnv_ioda_setup_dma(struct pnv_phb *phb)
 }
 
 #ifdef CONFIG_PCI_MSI
+static void pnv_ioda2_msi_eoi(struct irq_data *d)
+{
+   unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
+   struct irq_chip *chip = irq_data_get_irq_chip(d);
+   struct pnv_phb *phb = container_of(chip, struct pnv_phb,
+  ioda.irq_chip);
+   int64_t rc;
+
+   rc = opal_pci_msi_eoi(phb-opal_id, hw_irq);
+   WARN_ON_ONCE(rc);
+
+   icp_native_eoi(d);
+}
+
 static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
- unsigned int hwirq, unsigned int is_64,
- struct msi_msg *msg)
+ unsigned int hwirq, unsigned int virq,
+ unsigned int is_64, struct msi_msg *msg)
 {
struct pnv_ioda_pe *pe = pnv_ioda_get_pe(dev);
+   struct irq_data *idata;
+   struct irq_chip *ichip;
unsigned int xive_num = hwirq - phb-msi_base;
uint64_t addr64;
uint32_t addr32, data;
@@ -638,6 +655,23 @@ static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, 
struct pci_dev *dev,
}
msg-data = data;
 
+   /*
+* Change the IRQ chip for the MSI interrupts on PHB3.
+

[PATCH 5/6] powerpc/powernv: Build DMA space for PE on PHB3

[Gavin Shan]

The patch intends to build 32-bits DMA space for individual PEs on
PHB3. The TVE# is recognized by the combo of PE# and fixed bits
from DMA address, which is zero for 32-bits DMA space.

Signed-off-by: Gavin Shan sha...@linux.vnet.ibm.com
---
 arch/powerpc/platforms/powernv/pci-ioda.c |   99 +++--
 1 files changed, 93 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c 
b/arch/powerpc/platforms/powernv/pci-ioda.c
index 1c7e808..04a37dc 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -600,9 +600,8 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
 */
tbl-it_busno = 0;
tbl-it_index = (unsigned long)ioremap(be64_to_cpup(swinvp), 8);
-   tbl-it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE;
-   if (phb-type == PNV_PHB_IODA1)
-   tbl-it_type |= TCE_PCI_SWINV_PAIR;
+   tbl-it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE |
+  TCE_PCI_SWINV_PAIR;
}
iommu_init_table(tbl, phb-hose-node);
 
@@ -620,6 +619,81 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
__free_pages(tce_mem, get_order(TCE32_TABLE_SIZE * segs));
 }
 
+static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
+  struct pnv_ioda_pe *pe)
+{
+   struct page *tce_mem = NULL;
+   void *addr;
+   const __be64 *swinvp;
+   struct iommu_table *tbl;
+   unsigned int tce_table_size, end;
+   int64_t rc;
+
+   /* We shouldn't already have a 32-bit DMA associated */
+   if (WARN_ON(pe-tce32_seg = 0))
+   return;
+
+   /* The PE will reserve all possible 32-bits space */
+   pe-tce32_seg = 0;
+   end = (1  ilog2(phb-ioda.m32_pci_base));
+   tce_table_size = (end / 0x1000) * 8;
+   pe_info(pe, Setting up 32-bit TCE table at 0..%08x\n,
+   end);
+
+   /* Allocate TCE table */
+   tce_mem = alloc_pages_node(phb-hose-node, GFP_KERNEL,
+  get_order(tce_table_size));
+   if (!tce_mem) {
+   pe_err(pe, Failed to allocate a 32-bit TCE memory\n);
+   goto fail;
+   }
+   addr = page_address(tce_mem);
+   memset(addr, 0, tce_table_size);
+
+   /*
+* Map TCE table through TVT. The TVE index is the PE number
+* shifted by 1 bit for 32-bits DMA space.
+*/
+   rc = opal_pci_map_pe_dma_window(phb-opal_id, pe-pe_number,
+   pe-pe_number  1, 1, __pa(addr),
+   tce_table_size, 0x1000);
+   if (rc) {
+   pe_err(pe, Failed to configure 32-bit TCE table,
+   err %ld\n, rc);
+   goto fail;
+   }
+
+   /* Setup linux iommu table */
+   tbl = pe-tce32_table;
+   pnv_pci_setup_iommu_table(tbl, addr, tce_table_size, 0);
+
+   /* OPAL variant of PHB3 invalidated TCEs */
+   swinvp = of_get_property(phb-hose-dn, ibm,opal-tce-kill, NULL);
+   if (swinvp) {
+   /* We need a couple more fields -- an address and a data
+* to or.  Since the bus is only printed out on table free
+* errors, and on the first pass the data will be a relative
+* bus number, print that out instead.
+*/
+   tbl-it_busno = 0;
+   tbl-it_index = (unsigned long)ioremap(be64_to_cpup(swinvp), 8);
+   tbl-it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE;
+   }
+   iommu_init_table(tbl, phb-hose-node);
+
+   if (pe-pdev)
+   set_iommu_table_base(pe-pdev-dev, tbl);
+   else
+   pnv_ioda_setup_bus_dma(pe, pe-pbus);
+
+   return;
+fail:
+   if (pe-tce32_seg = 0)
+   pe-tce32_seg = -1;
+   if (tce_mem)
+   __free_pages(tce_mem, get_order(tce_table_size));
+}
+
 static void pnv_ioda_setup_dma(struct pnv_phb *phb)
 {
struct pci_controller *hose = phb-hose;
@@ -662,9 +736,22 @@ static void pnv_ioda_setup_dma(struct pnv_phb *phb)
if (segs  remaining)
segs = remaining;
}
-   pe_info(pe, DMA weight %d, assigned %d DMA32 segments\n,
-   pe-dma_weight, segs);
-   pnv_pci_ioda_setup_dma_pe(phb, pe, base, segs);
+
+   /*
+* For IODA2 compliant PHB3, we needn't care about the weight.
+* The all available 32-bits DMA space will be assigned to
+* the specific PE.
+*/
+   if (phb-type == PNV_PHB_IODA1) {
+   pe_info(pe, DMA weight %d, assigned %d DMA32 
segments\n,
+   pe-dma_weight, segs);
+   

[PATCH 4/6] powerpc/powernv: TCE invalidation for PHB3

[Gavin Shan]

The TCE should be invalidated while it's created or free'd. The
approach to do that for IODA1 and IODA2 compliant PHBs are different.
So the patch differentiate them with different functions called to
do that for IODA1 and IODA2 compliant PHBs. It's notable that the
PCI address is used to invalidate the corresponding TCE on IODA2
compliant PHB3.

Signed-off-by: Gavin Shan sha...@linux.vnet.ibm.com
---
 arch/powerpc/platforms/powernv/pci-ioda.c |   85 -
 arch/powerpc/platforms/powernv/pci.c  |   48 +---
 arch/powerpc/platforms/powernv/pci.h  |6 ++-
 3 files changed, 90 insertions(+), 49 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c 
b/arch/powerpc/platforms/powernv/pci-ioda.c
index 3f88c51..1c7e808 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -89,6 +89,7 @@ static int pnv_ioda_alloc_pe(struct pnv_phb *phb)
return IODA_INVALID_PE;
} while(test_and_set_bit(pe, phb-ioda.pe_alloc));
 
+   phb-ioda.pe_array[pe].phb = phb;
phb-ioda.pe_array[pe].pe_number = pe;
return pe;
 }
@@ -449,6 +450,85 @@ static void pnv_ioda_setup_bus_dma(struct pnv_ioda_pe *pe, 
struct pci_bus *bus)
}
 }
 
+static void pnv_pci_ioda1_tce_invalidate(struct iommu_table *tbl,
+u64 *startp, u64 *endp)
+{
+   u64 __iomem *invalidate = (u64 __iomem *)tbl-it_index;
+   unsigned long start, end, inc;
+
+   start = __pa(startp);
+   end = __pa(endp);
+
+   /* BML uses this case for p6/p7/galaxy2: Shift addr and put in node */
+   if (tbl-it_busno) {
+   start = 12;
+   end = 12;
+   inc = 128  12;
+   start |= tbl-it_busno;
+   end |= tbl-it_busno;
+   } else if (tbl-it_type  TCE_PCI_SWINV_PAIR) {
+   /* p7ioc-style invalidation, 2 TCEs per write */
+   start |= (1ull  63);
+   end |= (1ull  63);
+   inc = 16;
+} else {
+   /* Default (older HW) */
+inc = 128;
+   }
+
+end |= inc - 1;/* round up end to be different than start */
+
+mb(); /* Ensure above stores are visible */
+while (start = end) {
+__raw_writeq(start, invalidate);
+start += inc;
+}
+
+   /*
+* The iommu layer will do another mb() for us on build()
+* and we don't care on free()
+*/
+}
+
+static void pnv_pci_ioda2_tce_invalidate(struct pnv_ioda_pe *pe,
+struct iommu_table *tbl,
+u64 *startp, u64 *endp)
+{
+   unsigned long start, end, inc;
+   u64 __iomem *invalidate = (u64 __iomem *)tbl-it_index;
+
+   /* We'll invalidate DMA address in PE scope */
+   start = 0x2ul  60;
+   start |= (pe-pe_number  0xFF);
+   end = start;
+
+   /* Figure out the start, end and step */
+   inc = tbl-it_offset + (((u64)startp - tbl-it_base) / sizeof(u64));
+   start |= (inc  12);
+   inc = tbl-it_offset + (((u64)endp - tbl-it_base) / sizeof(u64));
+   end |= (inc  12);
+   inc = (0x1ul  12);
+   mb();
+
+   while (start = end) {
+   __raw_writeq(start, invalidate);
+   start += inc;
+   }
+}
+
+void pnv_pci_ioda_tce_invalidate(struct iommu_table *tbl,
+u64 *startp, u64 *endp)
+{
+   struct pnv_ioda_pe *pe = container_of(tbl, struct pnv_ioda_pe,
+ tce32_table);
+   struct pnv_phb *phb = pe-phb;
+
+   if (phb-type == PNV_PHB_IODA1)
+   pnv_pci_ioda1_tce_invalidate(tbl, startp, endp);
+   else
+   pnv_pci_ioda2_tce_invalidate(pe, tbl, startp, endp);
+}
+
 static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
  struct pnv_ioda_pe *pe, unsigned int base,
  unsigned int segs)
@@ -520,8 +600,9 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
 */
tbl-it_busno = 0;
tbl-it_index = (unsigned long)ioremap(be64_to_cpup(swinvp), 8);
-   tbl-it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE
-   | TCE_PCI_SWINV_PAIR;
+   tbl-it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE;
+   if (phb-type == PNV_PHB_IODA1)
+   tbl-it_type |= TCE_PCI_SWINV_PAIR;
}
iommu_init_table(tbl, phb-hose-node);
 
diff --git a/arch/powerpc/platforms/powernv/pci.c 
b/arch/powerpc/platforms/powernv/pci.c
index 861e185..55dfca844 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -329,48 +329,6 @@ struct pci_ops pnv_pci_ops = {
.write = pnv_pci_write_config,
 };
 
-
-static void 

[PATCH 2/7] powerpc/perf: Add an explict flag indicating presence of SLOT field

[Michael Ellerman]

In perf_ip_adjust() we potentially use the MMCRA[SLOT] field to adjust
the reported IP of a sampled instruction.

Currently the logic is written so that if the backend does NOT have
the PPMU_ALT_SIPR flag set then we assume MMCRA[SLOT] exists.

However on power8 we do not want to set ALT_SIPR (it's in a third
location), and we also do not have MMCRA[SLOT].

So add a new flag which only indicates whether MMCRA[SLOT] exists.

Naively we'd set it on everything except power6/7, because they set
ALT_SIPR, and we've reversed the polarity of the flag. But it's more
complicated than that.

mpc7450 is 32-bit, and uses its own version of perf_ip_adjust()
which doesn't use MMCRA[SLOT], so it doesn't need the new flag set and
the behaviour is unchanged.

PPC970 (and I assume power4) don't have MMCRA[SLOT], so shouldn't have
the new flag set. This is a behaviour change on those cpus, though we
were probably getting lucky and the bits in question were 0.

power5 and power5+ set the new flag, behaviour unchanged.

power6  power7 do not set the new flag, behaviour unchanged.

Signed-off-by: Michael Ellerman mich...@ellerman.id.au
---
 arch/powerpc/include/asm/perf_event_server.h |1 +
 arch/powerpc/perf/core-book3s.c  |3 ++-
 arch/powerpc/perf/power5+-pmu.c  |2 +-
 arch/powerpc/perf/power5-pmu.c   |1 +
 4 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/include/asm/perf_event_server.h 
b/arch/powerpc/include/asm/perf_event_server.h
index d0aec72..7074aec 100644
--- a/arch/powerpc/include/asm/perf_event_server.h
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -52,6 +52,7 @@ struct power_pmu {
 #define PPMU_NO_SIPR   0x0004 /* no SIPR/HV in MMCRA at all */
 #define PPMU_NO_CONT_SAMPLING  0x0008 /* no continuous sampling */
 #define PPMU_SIAR_VALID0x0010 /* Processor has SIAR Valid 
bit */
+#define PPMU_HAS_SSLOT 0x0020 /* Has sampled slot in MMCRA */
 
 /*
  * Values for flags to get_alternatives()
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 65362e9..eb64480 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -98,11 +98,12 @@ static inline unsigned long perf_ip_adjust(struct pt_regs 
*regs)
 {
unsigned long mmcra = regs-dsisr;
 
-   if ((mmcra  MMCRA_SAMPLE_ENABLE)  !(ppmu-flags  PPMU_ALT_SIPR)) {
+   if ((ppmu-flags  PPMU_HAS_SSLOT)  (mmcra  MMCRA_SAMPLE_ENABLE)) {
unsigned long slot = (mmcra  MMCRA_SLOT)  MMCRA_SLOT_SHIFT;
if (slot  1)
return 4 * (slot - 1);
}
+
return 0;
 }
 
diff --git a/arch/powerpc/perf/power5+-pmu.c b/arch/powerpc/perf/power5+-pmu.c
index a8757ba..b03b6dc 100644
--- a/arch/powerpc/perf/power5+-pmu.c
+++ b/arch/powerpc/perf/power5+-pmu.c
@@ -671,7 +671,7 @@ static struct power_pmu power5p_pmu = {
.get_alternatives   = power5p_get_alternatives,
.disable_pmc= power5p_disable_pmc,
.limited_pmc_event  = power5p_limited_pmc_event,
-   .flags  = PPMU_LIMITED_PMC5_6,
+   .flags  = PPMU_LIMITED_PMC5_6 | PPMU_HAS_SSLOT,
.n_generic  = ARRAY_SIZE(power5p_generic_events),
.generic_events = power5p_generic_events,
.cache_events   = power5p_cache_events,
diff --git a/arch/powerpc/perf/power5-pmu.c b/arch/powerpc/perf/power5-pmu.c
index e7f06eb..1e8ce42 100644
--- a/arch/powerpc/perf/power5-pmu.c
+++ b/arch/powerpc/perf/power5-pmu.c
@@ -615,6 +615,7 @@ static struct power_pmu power5_pmu = {
.n_generic  = ARRAY_SIZE(power5_generic_events),
.generic_events = power5_generic_events,
.cache_events   = power5_cache_events,
+   .flags  = PPMU_HAS_SSLOT,
 };
 
 static int __init init_power5_pmu(void)
-- 
1.7.10.4

___
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[PATCH 4/7] powerpc/perf: Add an accessor for regs-result

[Michael Ellerman]

Add an accessor for regs-result so we can use it to store more flags in
future.

Signed-off-by: Michael Ellerman mich...@ellerman.id.au
---
 arch/powerpc/perf/core-book3s.c |9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 2417fe2..5d30001 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -89,6 +89,11 @@ static inline int siar_valid(struct pt_regs *regs)
 
 #endif /* CONFIG_PPC32 */
 
+static bool regs_use_siar(struct pt_regs *regs)
+{
+   return !!(regs-result  1);
+}
+
 /*
  * Things that are specific to 64-bit implementations.
  */
@@ -162,7 +167,7 @@ static inline u32 perf_flags_from_msr(struct pt_regs *regs)
 
 static inline u32 perf_get_misc_flags(struct pt_regs *regs)
 {
-   unsigned long use_siar = regs-result;
+   bool use_siar = regs_use_siar(regs);
 
if (!use_siar)
return perf_flags_from_msr(regs);
@@ -1425,7 +1430,7 @@ unsigned long perf_misc_flags(struct pt_regs *regs)
  */
 unsigned long perf_instruction_pointer(struct pt_regs *regs)
 {
-   unsigned long use_siar = regs-result;
+   bool use_siar = regs_use_siar(regs);
 
if (use_siar  siar_valid(regs))
return mfspr(SPRN_SIAR) + perf_ip_adjust(regs);
-- 
1.7.10.4

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[PATCH 5/7] powerpc/perf: Add regs_no_sipr()

[Michael Ellerman]

On power8 the presence or absence of SIPR depends on settings at runtime,
so convert to using a dynamic flag for NO_SIPR. Existing backends that
set NO_SIPR unconditionally set the dynamic flag obviously.

Signed-off-by: Michael Ellerman mich...@ellerman.id.au
---
 arch/powerpc/perf/core-book3s.c |   15 ---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 5d30001..1c13c3d 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -156,6 +156,11 @@ static bool regs_sipr(struct pt_regs *regs)
return !!(regs-dsisr  sipr);
 }
 
+static bool regs_no_sipr(struct pt_regs *regs)
+{
+   return !!(regs-result  2);
+}
+
 static inline u32 perf_flags_from_msr(struct pt_regs *regs)
 {
if (regs-msr  MSR_PR)
@@ -178,7 +183,7 @@ static inline u32 perf_get_misc_flags(struct pt_regs *regs)
 * SIAR which should give slightly more reliable
 * results
 */
-   if (ppmu-flags  PPMU_NO_SIPR) {
+   if (regs_no_sipr(regs)) {
unsigned long siar = mfspr(SPRN_SIAR);
if (siar = PAGE_OFFSET)
return PERF_RECORD_MISC_KERNEL;
@@ -208,6 +213,10 @@ static inline void perf_read_regs(struct pt_regs *regs)
int use_siar;
 
regs-dsisr = mmcra;
+   regs-result = 0;
+
+   if (ppmu-flags  PPMU_NO_SIPR)
+   regs-result |= 2;
 
/*
 * If this isn't a PMU exception (eg a software event) the SIAR is
@@ -232,12 +241,12 @@ static inline void perf_read_regs(struct pt_regs *regs)
use_siar = 1;
else if ((ppmu-flags  PPMU_NO_CONT_SAMPLING))
use_siar = 0;
-   else if (!(ppmu-flags  PPMU_NO_SIPR)  regs_sipr(regs))
+   else if (!regs_no_sipr(regs)  regs_sipr(regs))
use_siar = 0;
else
use_siar = 1;
 
-   regs-result = use_siar;
+   regs-result |= use_siar;
 }
 
 /*
-- 
1.7.10.4

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[PATCH 6/7] powerpc/perf: Add support for SIER

[Michael Ellerman]

On power8 we have a new SIER (Sampled Instruction Event Register), which
captures information about instructions when we have random sampling
enabled.

Add support for loading the SIER into pt_regs, overloading regs-dar.
Also set the new NO_SIPR flag in regs-result if we don't have SIPR.

Update regs_sihv/sipr() to look for SIPR/SIHV in SIER.

Signed-off-by: Michael Ellerman mich...@ellerman.id.au
---
 arch/powerpc/include/asm/perf_event_server.h |1 +
 arch/powerpc/include/asm/reg.h   |5 +
 arch/powerpc/perf/core-book3s.c  |   19 +++
 3 files changed, 25 insertions(+)

diff --git a/arch/powerpc/include/asm/perf_event_server.h 
b/arch/powerpc/include/asm/perf_event_server.h
index 7074aec..57b42da 100644
--- a/arch/powerpc/include/asm/perf_event_server.h
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -53,6 +53,7 @@ struct power_pmu {
 #define PPMU_NO_CONT_SAMPLING  0x0008 /* no continuous sampling */
 #define PPMU_SIAR_VALID0x0010 /* Processor has SIAR Valid 
bit */
 #define PPMU_HAS_SSLOT 0x0020 /* Has sampled slot in MMCRA */
+#define PPMU_HAS_SIER  0x0040 /* Has SIER */
 
 /*
  * Values for flags to get_alternatives()
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 5735ebb..5c6fbe2 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -671,6 +671,11 @@
 #define SPRN_PMC8  794
 #define SPRN_SIAR  780
 #define SPRN_SDAR  781
+#define SPRN_SIER  784
+#define   SIER_SIPR0x200   /* Sampled MSR_PR */
+#define   SIER_SIHV0x100   /* Sampled MSR_HV */
+#define   SIER_SIAR_VALID  0x040   /* SIAR contents valid */
+#define   SIER_SDAR_VALID  0x020   /* SDAR contents valid */
 
 #define SPRN_PA6T_MMCR0 795
 #define   PA6T_MMCR0_EN0   0x0001UL
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 1c13c3d..4ac6e64 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -140,6 +140,9 @@ static bool regs_sihv(struct pt_regs *regs)
 {
unsigned long sihv = MMCRA_SIHV;
 
+   if (ppmu-flags  PPMU_HAS_SIER)
+   return !!(regs-dar  SIER_SIHV);
+
if (ppmu-flags  PPMU_ALT_SIPR)
sihv = POWER6_MMCRA_SIHV;
 
@@ -150,6 +153,9 @@ static bool regs_sipr(struct pt_regs *regs)
 {
unsigned long sipr = MMCRA_SIPR;
 
+   if (ppmu-flags  PPMU_HAS_SIER)
+   return !!(regs-dar  SIER_SIPR);
+
if (ppmu-flags  PPMU_ALT_SIPR)
sipr = POWER6_MMCRA_SIPR;
 
@@ -203,6 +209,7 @@ static inline u32 perf_get_misc_flags(struct pt_regs *regs)
 /*
  * Overload regs-dsisr to store MMCRA so we only need to read it once
  * on each interrupt.
+ * Overload regs-dar to store SIER if we have it.
  * Overload regs-result to specify whether we should use the MSR (result
  * is zero) or the SIAR (result is non zero).
  */
@@ -219,6 +226,18 @@ static inline void perf_read_regs(struct pt_regs *regs)
regs-result |= 2;
 
/*
+* On power8 if we're in random sampling mode, the SIER is updated.
+* If we're in continuous sampling mode, we don't have SIPR.
+*/
+   if (ppmu-flags  PPMU_HAS_SIER) {
+   if (marked)
+   regs-dar = mfspr(SPRN_SIER);
+   else
+   regs-result |= 2;
+   }
+
+
+   /*
 * If this isn't a PMU exception (eg a software event) the SIAR is
 * not valid. Use pt_regs.
 *
-- 
1.7.10.4

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