[PATCH v2 0/2] powerpc/85xx: introduce corenet_generic machine
v2: - Fold the original patch 2 into patch 1. - Update the patch 1 according to Scott and Kumar's comments. - Introduce a new patch to rename the corenet_ds.c to corenet_generic.c. v1: This patch series introduces a common machine to support p2041rdb, p3041ds, p4080ds, p5020ds, p5040ds, t4240qds and b4qds to avoid the code duplication. Boot test on p5020ds and p4080ds. Kevin Hao (2): powerpc/85xx: introduce corenet_generic machine powerpc/85xx: rename the corenet_ds.c to corenet_generic.c arch/powerpc/platforms/85xx/Kconfig | 10 ++ arch/powerpc/platforms/85xx/Makefile | 8 +- arch/powerpc/platforms/85xx/b4_qds.c | 97 -- arch/powerpc/platforms/85xx/corenet_ds.c | 96 -- arch/powerpc/platforms/85xx/corenet_ds.h | 19 --- arch/powerpc/platforms/85xx/corenet_generic.c | 182 ++ arch/powerpc/platforms/85xx/p2041_rdb.c | 87 arch/powerpc/platforms/85xx/p3041_ds.c| 89 - arch/powerpc/platforms/85xx/p4080_ds.c| 87 arch/powerpc/platforms/85xx/p5020_ds.c| 93 - arch/powerpc/platforms/85xx/p5040_ds.c| 84 arch/powerpc/platforms/85xx/t4240_qds.c | 93 - 12 files changed, 193 insertions(+), 752 deletions(-) delete mode 100644 arch/powerpc/platforms/85xx/b4_qds.c delete mode 100644 arch/powerpc/platforms/85xx/corenet_ds.c delete mode 100644 arch/powerpc/platforms/85xx/corenet_ds.h create mode 100644 arch/powerpc/platforms/85xx/corenet_generic.c delete mode 100644 arch/powerpc/platforms/85xx/p2041_rdb.c delete mode 100644 arch/powerpc/platforms/85xx/p3041_ds.c delete mode 100644 arch/powerpc/platforms/85xx/p4080_ds.c delete mode 100644 arch/powerpc/platforms/85xx/p5020_ds.c delete mode 100644 arch/powerpc/platforms/85xx/p5040_ds.c delete mode 100644 arch/powerpc/platforms/85xx/t4240_qds.c -- 1.8.3.1 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2 1/2] powerpc/85xx: introduce corenet_generic machine
In the current kernel, the board files for p2041rdb, p3041ds, p4080ds, p5020ds, p5040ds, t4240qds and b4qds are almost the same except the machine name. So this introduces a cornet_generic machine to support all these boards to avoid the code duplication. With these changes the file corenet_ds.h becomes useless. Just delete it. Signed-off-by: Kevin Hao haoke...@gmail.com --- v2: - Fix the typo in subject. - Fold the original patch 2 into this one. - Change the machine name from CORENET GENERIC to CORENET Generic. v1: - This patch is based on http://patchwork.ozlabs.org/patch/274390/ arch/powerpc/platforms/85xx/Kconfig | 10 arch/powerpc/platforms/85xx/Makefile | 8 +-- arch/powerpc/platforms/85xx/b4_qds.c | 97 arch/powerpc/platforms/85xx/corenet_ds.c | 86 arch/powerpc/platforms/85xx/corenet_ds.h | 19 --- arch/powerpc/platforms/85xx/p2041_rdb.c | 87 arch/powerpc/platforms/85xx/p3041_ds.c | 89 - arch/powerpc/platforms/85xx/p4080_ds.c | 87 arch/powerpc/platforms/85xx/p5020_ds.c | 93 -- arch/powerpc/platforms/85xx/p5040_ds.c | 84 --- arch/powerpc/platforms/85xx/t4240_qds.c | 93 -- 11 files changed, 97 insertions(+), 656 deletions(-) delete mode 100644 arch/powerpc/platforms/85xx/b4_qds.c delete mode 100644 arch/powerpc/platforms/85xx/corenet_ds.h delete mode 100644 arch/powerpc/platforms/85xx/p2041_rdb.c delete mode 100644 arch/powerpc/platforms/85xx/p3041_ds.c delete mode 100644 arch/powerpc/platforms/85xx/p4080_ds.c delete mode 100644 arch/powerpc/platforms/85xx/p5020_ds.c delete mode 100644 arch/powerpc/platforms/85xx/p5040_ds.c delete mode 100644 arch/powerpc/platforms/85xx/t4240_qds.c diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index de2eb93..3bee943 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig @@ -228,6 +228,7 @@ config P2041_RDB select GPIO_MPC8XXX select HAS_RAPIDIO select PPC_EPAPR_HV_PIC + select CORENET_GENERIC help This option enables support for the P2041 RDB board @@ -241,6 +242,7 @@ config P3041_DS select GPIO_MPC8XXX select HAS_RAPIDIO select PPC_EPAPR_HV_PIC + select CORENET_GENERIC help This option enables support for the P3041 DS board @@ -254,6 +256,7 @@ config P4080_DS select GPIO_MPC8XXX select HAS_RAPIDIO select PPC_EPAPR_HV_PIC + select CORENET_GENERIC help This option enables support for the P4080 DS board @@ -278,6 +281,7 @@ config P5020_DS select GPIO_MPC8XXX select HAS_RAPIDIO select PPC_EPAPR_HV_PIC + select CORENET_GENERIC help This option enables support for the P5020 DS board @@ -292,6 +296,7 @@ config P5040_DS select GPIO_MPC8XXX select HAS_RAPIDIO select PPC_EPAPR_HV_PIC + select CORENET_GENERIC help This option enables support for the P5040 DS board @@ -323,6 +328,7 @@ config T4240_QDS select GPIO_MPC8XXX select HAS_RAPIDIO select PPC_EPAPR_HV_PIC + select CORENET_GENERIC help This option enables support for the T4240 QDS board @@ -337,6 +343,7 @@ config B4_QDS select ARCH_REQUIRE_GPIOLIB select HAS_RAPIDIO select PPC_EPAPR_HV_PIC + select CORENET_GENERIC help This option enables support for the B4 QDS board The B4 application development system B4 QDS is a complete @@ -348,3 +355,6 @@ endif # FSL_SOC_BOOKE config TQM85xx bool + +config CORENET_GENERIC + bool diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile index 53c9f75..a6c281d 100644 --- a/arch/powerpc/platforms/85xx/Makefile +++ b/arch/powerpc/platforms/85xx/Makefile @@ -18,13 +18,7 @@ obj-$(CONFIG_P1010_RDB) += p1010rdb.o obj-$(CONFIG_P1022_DS)+= p1022_ds.o obj-$(CONFIG_P1022_RDK) += p1022_rdk.o obj-$(CONFIG_P1023_RDS) += p1023_rds.o -obj-$(CONFIG_P2041_RDB) += p2041_rdb.o corenet_ds.o -obj-$(CONFIG_P3041_DS)+= p3041_ds.o corenet_ds.o -obj-$(CONFIG_P4080_DS)+= p4080_ds.o corenet_ds.o -obj-$(CONFIG_P5020_DS)+= p5020_ds.o corenet_ds.o -obj-$(CONFIG_P5040_DS)+= p5040_ds.o corenet_ds.o -obj-$(CONFIG_T4240_QDS) += t4240_qds.o corenet_ds.o -obj-$(CONFIG_B4_QDS) += b4_qds.o corenet_ds.o +obj-$(CONFIG_CORENET_GENERIC) += corenet_ds.o obj-$(CONFIG_STX_GP3)+= stx_gp3.o obj-$(CONFIG_TQM85xx)+= tqm85xx.o obj-$(CONFIG_SBC8548) += sbc8548.o diff --git a/arch/powerpc/platforms/85xx/b4_qds.c b/arch/powerpc/platforms/85xx/b4_qds.c deleted file mode 100644 index 0f18663..000 ---
[PATCH v2 2/2] powerpc/85xx: rename the corenet_ds.c to corenet_generic.c
This file is also used by some RDB and QDS boards. So the name seems
not so accurate. Rename it to corenet_generic.c. Also update the
function names in this file according to the change.
Signed-off-by: Kevin Hao haoke...@gmail.com
---
A new patch in v2.
arch/powerpc/platforms/85xx/Makefile | 2 +-
.../platforms/85xx/{corenet_ds.c = corenet_generic.c} | 12 ++--
2 files changed, 7 insertions(+), 7 deletions(-)
rename arch/powerpc/platforms/85xx/{corenet_ds.c = corenet_generic.c} (93%)
diff --git a/arch/powerpc/platforms/85xx/Makefile
b/arch/powerpc/platforms/85xx/Makefile
index a6c281d..dd4c0b5 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -18,7 +18,7 @@ obj-$(CONFIG_P1010_RDB) += p1010rdb.o
obj-$(CONFIG_P1022_DS)+= p1022_ds.o
obj-$(CONFIG_P1022_RDK) += p1022_rdk.o
obj-$(CONFIG_P1023_RDS) += p1023_rds.o
-obj-$(CONFIG_CORENET_GENERIC) += corenet_ds.o
+obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o
obj-$(CONFIG_STX_GP3)+= stx_gp3.o
obj-$(CONFIG_TQM85xx)+= tqm85xx.o
obj-$(CONFIG_SBC8548) += sbc8548.o
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c
b/arch/powerpc/platforms/85xx/corenet_generic.c
similarity index 93%
rename from arch/powerpc/platforms/85xx/corenet_ds.c
rename to arch/powerpc/platforms/85xx/corenet_generic.c
index 7007829..7401e68 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_generic.c
@@ -32,7 +32,7 @@
#include sysdev/fsl_pci.h
#include smp.h
-void __init corenet_ds_pic_init(void)
+void __init corenet_gen_pic_init(void)
{
struct mpic *mpic;
unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |
@@ -50,7 +50,7 @@ void __init corenet_ds_pic_init(void)
/*
* Setup the architecture
*/
-void __init corenet_ds_setup_arch(void)
+void __init corenet_gen_setup_arch(void)
{
mpc85xx_smp_init();
@@ -91,7 +91,7 @@ static const struct of_device_id of_device_ids[] = {
{}
};
-int __init corenet_ds_publish_devices(void)
+int __init corenet_gen_publish_devices(void)
{
return of_platform_bus_probe(NULL, of_device_ids, NULL);
}
@@ -159,8 +159,8 @@ static int __init corenet_generic_probe(void)
define_machine(corenet_generic) {
.name = CORENET Generic,
.probe = corenet_generic_probe,
- .setup_arch = corenet_ds_setup_arch,
- .init_IRQ = corenet_ds_pic_init,
+ .setup_arch = corenet_gen_setup_arch,
+ .init_IRQ = corenet_gen_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
#endif
@@ -175,7 +175,7 @@ define_machine(corenet_generic) {
#endif
};
-machine_arch_initcall(corenet_generic, corenet_ds_publish_devices);
+machine_arch_initcall(corenet_generic, corenet_gen_publish_devices);
#ifdef CONFIG_SWIOTLB
machine_arch_initcall(corenet_generic, swiotlb_setup_bus_notifier);
--
1.8.3.1
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Re: [PATCH 22/51] DMA-API: amba: get rid of separate dma_mask
On Thu, 19 Sep 2013 22:47:01 +0100, Russell King rmk+ker...@arm.linux.org.uk wrote: AMBA Primecell devices always treat streaming and coherent DMA exactly the same, so there's no point in having the masks separated. Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk for the drivers/of/platform.c portion: Acked-by: Grant Likely grant.lik...@linaro.org g. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [RESEND PATCH 2/2] ppc: bpf_jit: support MOD operation
Hi Vladimir,
On 21 Sep 2013, at 17:25, Vladimir Murzin murzi...@gmail.com wrote:
commit b6069a9570 (filter: add MOD operation) added generic
support for modulus operation in BPF.
This patch brings JIT support for PPC64
Signed-off-by: Vladimir Murzin murzi...@gmail.com
Acked-by: Matt Evans m...@ozlabs.org
Not this version, though; see below.
---
arch/powerpc/net/bpf_jit_comp.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/powerpc/net/bpf_jit_comp.c b/arch/powerpc/net/bpf_jit_comp.c
index bf56e33..96f24dc 100644
--- a/arch/powerpc/net/bpf_jit_comp.c
+++ b/arch/powerpc/net/bpf_jit_comp.c
@@ -193,6 +193,28 @@ static int bpf_jit_build_body(struct sk_filter *fp, u32
*image,
PPC_MUL(r_A, r_A, r_scratch1);
}
break;
+case BPF_S_ALU_MOD_X: /* A %= X; */
+ctx-seen |= SEEN_XREG;
+PPC_CMPWI(r_X, 0);
+if (ctx-pc_ret0 != -1) {
+PPC_BCC(COND_EQ, addrs[ctx-pc_ret0]);
+} else {
+PPC_BCC_SHORT(COND_NE, (ctx-idx*4)+12);
+PPC_LI(r_ret, 0);
+PPC_JMP(exit_addr);
+}
+PPC_DIVWU(r_scratch1, r_A, r_X);
+PPC_MUL(r_scratch1, r_X, r_scratch1);
+PPC_SUB(r_A, r_A, r_scratch1);
+break;
+case BPF_S_ALU_MOD_K: /* A %= K; */
+#define r_scratch2 (r_scratch1 + 1)
Old version of this patch, still? I had hoped that r_scratch2 would be defined
in the header.
+PPC_LI32(r_scratch2, K);
+PPC_DIVWU(r_scratch1, r_A, r_scratch2);
+PPC_MUL(r_scratch1, r_scratch2, r_scratch1);
+PPC_SUB(r_A, r_A, r_scratch1);
+#undef r_scratch2
And remember this guy too.. :)
Matt
+break;
case BPF_S_ALU_DIV_X: /* A /= X; */
ctx-seen |= SEEN_XREG;
PPC_CMPWI(r_X, 0);
--
1.8.1.5
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Re: [RESEND PATCH 2/2] ppc: bpf_jit: support MOD operation
On Mon, Sep 23, 2013 at 01:13:45AM +1000, Matt Evans wrote:
Hi Vladimir,
On 21 Sep 2013, at 17:25, Vladimir Murzin murzi...@gmail.com wrote:
commit b6069a9570 (filter: add MOD operation) added generic
support for modulus operation in BPF.
This patch brings JIT support for PPC64
Signed-off-by: Vladimir Murzin murzi...@gmail.com
Acked-by: Matt Evans m...@ozlabs.org
Not this version, though; see below.
---
arch/powerpc/net/bpf_jit_comp.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/powerpc/net/bpf_jit_comp.c
b/arch/powerpc/net/bpf_jit_comp.c
index bf56e33..96f24dc 100644
--- a/arch/powerpc/net/bpf_jit_comp.c
+++ b/arch/powerpc/net/bpf_jit_comp.c
@@ -193,6 +193,28 @@ static int bpf_jit_build_body(struct sk_filter *fp,
u32 *image,
PPC_MUL(r_A, r_A, r_scratch1);
}
break;
+case BPF_S_ALU_MOD_X: /* A %= X; */
+ctx-seen |= SEEN_XREG;
+PPC_CMPWI(r_X, 0);
+if (ctx-pc_ret0 != -1) {
+PPC_BCC(COND_EQ, addrs[ctx-pc_ret0]);
+} else {
+PPC_BCC_SHORT(COND_NE, (ctx-idx*4)+12);
+PPC_LI(r_ret, 0);
+PPC_JMP(exit_addr);
+}
+PPC_DIVWU(r_scratch1, r_A, r_X);
+PPC_MUL(r_scratch1, r_X, r_scratch1);
+PPC_SUB(r_A, r_A, r_scratch1);
+break;
+case BPF_S_ALU_MOD_K: /* A %= K; */
+#define r_scratch2 (r_scratch1 + 1)
Old version of this patch, still? I had hoped that r_scratch2 would be
defined in the header.
Oops.. been keeping the old version.. sorry for that, Matt :(
+PPC_LI32(r_scratch2, K);
+PPC_DIVWU(r_scratch1, r_A, r_scratch2);
+PPC_MUL(r_scratch1, r_scratch2, r_scratch1);
+PPC_SUB(r_A, r_A, r_scratch1);
+#undef r_scratch2
And remember this guy too.. :)
I've included the patch below. Nothing is missed this time, I hope ;)
Matt
+break;
case BPF_S_ALU_DIV_X: /* A /= X; */
ctx-seen |= SEEN_XREG;
PPC_CMPWI(r_X, 0);
--
1.8.1.5
---
From: Vladimir Murzin murzi...@gmail.com
Date: Wed, 28 Aug 2013 01:29:39 +0400
Subject: [PATCH 2/2] ppc: bpf_jit: support MOD operation
commit b6069a9570 (filter: add MOD operation) added generic
support for modulus operation in BPF.
This patch brings JIT support for PPC64
Signed-off-by: Vladimir Murzin murzi...@gmail.com
Acked-by: Matt Evans m...@ozlabs.org
---
arch/powerpc/net/bpf_jit.h | 1 +
arch/powerpc/net/bpf_jit_comp.c | 20
2 files changed, 21 insertions(+)
diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h
index 8a5dfaf..42a115a 100644
--- a/arch/powerpc/net/bpf_jit.h
+++ b/arch/powerpc/net/bpf_jit.h
@@ -39,6 +39,7 @@
#define r_X5
#define r_addr 6
#define r_scratch1 7
+#define r_scratch2 8
#define r_D14
#define r_HL 15
#define r_M16
diff --git a/arch/powerpc/net/bpf_jit_comp.c b/arch/powerpc/net/bpf_jit_comp.c
index bf56e33..cbb2702 100644
--- a/arch/powerpc/net/bpf_jit_comp.c
+++ b/arch/powerpc/net/bpf_jit_comp.c
@@ -193,6 +193,26 @@ static int bpf_jit_build_body(struct sk_filter *fp, u32
*image,
PPC_MUL(r_A, r_A, r_scratch1);
}
break;
+ case BPF_S_ALU_MOD_X: /* A %= X; */
+ ctx-seen |= SEEN_XREG;
+ PPC_CMPWI(r_X, 0);
+ if (ctx-pc_ret0 != -1) {
+ PPC_BCC(COND_EQ, addrs[ctx-pc_ret0]);
+ } else {
+ PPC_BCC_SHORT(COND_NE, (ctx-idx*4)+12);
+ PPC_LI(r_ret, 0);
+ PPC_JMP(exit_addr);
+ }
+ PPC_DIVWU(r_scratch1, r_A, r_X);
+ PPC_MUL(r_scratch1, r_X, r_scratch1);
+ PPC_SUB(r_A, r_A, r_scratch1);
+ break;
+ case BPF_S_ALU_MOD_K: /* A %= K; */
+ PPC_LI32(r_scratch2, K);
+ PPC_DIVWU(r_scratch1, r_A, r_scratch2);
+ PPC_MUL(r_scratch1, r_scratch2, r_scratch1);
+ PPC_SUB(r_A, r_A, r_scratch1);
+ break;
case BPF_S_ALU_DIV_X: /* A /= X; */
ctx-seen |= SEEN_XREG;
PPC_CMPWI(r_X, 0);
--
1.8.1.5
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Re: [PATCH v2 07/10] of/irq: Propagate errors in of_irq_to_resource_table()
On Wed, Sep 18, 2013 at 8:24 AM, Thierry Reding
thierry.red...@gmail.com wrote:
Now that all helpers return precise error codes, this function can
propagate these errors to the caller properly.
Signed-off-by: Thierry Reding tred...@nvidia.com
---
Changes in v2:
- return 0 on success or a negative error code on failure
- convert callers to new calling convention
[snip]
diff --git a/drivers/of/irq.c b/drivers/of/irq.c
index e4f38c0..6d7f824 100644
--- a/drivers/of/irq.c
+++ b/drivers/of/irq.c
@@ -397,18 +397,20 @@ int of_irq_count(struct device_node *dev)
* @res: array of resources to fill in
* @nr_irqs: the number of IRQs (and upper bound for num of @res elements)
You are effectively changing this to require an exact match rather
than an upper bound. That seems to be okay since that is what all the
callers want, but the documentation should be updated.
*
- * Returns the size of the filled in table (up to @nr_irqs).
+ * Returns 0 on success or a negative error code on failure.
*/
int of_irq_to_resource_table(struct device_node *dev, struct resource *res,
int nr_irqs)
{
- int i;
+ int i, ret;
- for (i = 0; i nr_irqs; i++, res++)
- if (!of_irq_to_resource(dev, i, res))
The error handling here needs to be updated in the previous patch.
- break;
+ for (i = 0; i nr_irqs; i++, res++) {
+ ret = of_irq_to_resource(dev, i, res);
+ if (ret 0)
+ return ret;
+ }
- return i;
+ return 0;
}
EXPORT_SYMBOL_GPL(of_irq_to_resource_table);
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Re: [PATCH v2 04/10] irqdomain: Return errors from irq_create_of_mapping()
On Wed, Sep 18, 2013 at 8:24 AM, Thierry Reding
thierry.red...@gmail.com wrote:
Instead of returning 0 for all errors, allow the precise error code to
be propagated. This will be used in subsequent patches to allow further
propagation of error codes.
The interrupt number corresponding to the new mapping is returned in an
output parameter so that the return value is reserved to signal success
(== 0) or failure ( 0).
Signed-off-by: Thierry Reding tred...@nvidia.com
One comment below, otherwise:
Acked-by: Rob Herring rob.herr...@calxeda.com
diff --git a/arch/powerpc/kernel/pci-common.c
b/arch/powerpc/kernel/pci-common.c
index 905a24b..ae71b14 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -230,6 +230,7 @@ static int pci_read_irq_line(struct pci_dev *pci_dev)
{
struct of_irq oirq;
unsigned int virq;
+ int ret;
pr_debug(PCI: Try to map irq for %s...\n, pci_name(pci_dev));
@@ -266,8 +267,10 @@ static int pci_read_irq_line(struct pci_dev *pci_dev)
oirq.size, oirq.specifier[0], oirq.specifier[1],
of_node_full_name(oirq.controller));
- virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
-oirq.size);
+ ret = irq_create_of_mapping(oirq.controller, oirq.specifier,
+ oirq.size, virq);
+ if (ret)
+ virq = NO_IRQ;
}
if(virq == NO_IRQ) {
pr_debug( Failed to map !\n);
Can you get rid of NO_IRQ usage here instead of adding to it.
Rob
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Re: [PATCH v2 02/10] of/irq: Use irq_of_parse_and_map()
On Wed, Sep 18, 2013 at 8:24 AM, Thierry Reding
thierry.red...@gmail.com wrote:
Replace some instances of of_irq_map_one()/irq_create_of_mapping() and
of_irq_to_resource() by the simpler equivalent irq_of_parse_and_map().
Signed-off-by: Thierry Reding tred...@nvidia.com
Acked-by: Rob Herring rob.herr...@calxeda.com
---
arch/arm/mach-u300/timer.c | 9 -
arch/powerpc/platforms/cell/celleb_scc_pciex.c | 8 +++-
arch/powerpc/platforms/cell/spider-pic.c | 7 ++-
arch/powerpc/sysdev/fsl_gtm.c| 9 -
arch/powerpc/sysdev/mpic_msgr.c | 6 ++
drivers/crypto/caam/ctrl.c | 2 +-
drivers/crypto/caam/jr.c | 2 +-
drivers/crypto/omap-sham.c | 2 +-
drivers/i2c/busses/i2c-cpm.c | 2 +-
drivers/input/serio/xilinx_ps2.c | 7 ---
drivers/net/ethernet/arc/emac_main.c | 10 +-
drivers/net/ethernet/freescale/fs_enet/mac-fcc.c | 2 +-
drivers/net/ethernet/freescale/fs_enet/mac-fec.c | 2 +-
drivers/net/ethernet/freescale/fs_enet/mac-scc.c | 2 +-
drivers/spi/spi-fsl-espi.c | 6 +++---
drivers/tty/serial/cpm_uart/cpm_uart_core.c | 2 +-
16 files changed, 35 insertions(+), 43 deletions(-)
diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c
index b5db207..9a5f9fb 100644
--- a/arch/arm/mach-u300/timer.c
+++ b/arch/arm/mach-u300/timer.c
@@ -358,8 +358,7 @@ static struct delay_timer u300_delay_timer;
*/
static void __init u300_timer_init_of(struct device_node *np)
{
- struct resource irq_res;
- int irq;
+ unsigned int irq;
struct clk *clk;
unsigned long rate;
@@ -368,11 +367,11 @@ static void __init u300_timer_init_of(struct
device_node *np)
panic(could not ioremap system timer\n);
/* Get the IRQ for the GP1 timer */
- irq = of_irq_to_resource(np, 2, irq_res);
- if (irq = 0)
+ irq = irq_of_parse_and_map(np, 2);
+ if (!irq)
panic(no IRQ for system timer\n);
- pr_info(U300 GP1 timer @ base: %p, IRQ: %d\n, u300_timer_base, irq);
+ pr_info(U300 GP1 timer @ base: %p, IRQ: %u\n, u300_timer_base, irq);
/* Clock the interrupt controller */
clk = of_clk_get(np, 0);
diff --git a/arch/powerpc/platforms/cell/celleb_scc_pciex.c
b/arch/powerpc/platforms/cell/celleb_scc_pciex.c
index 14be2bd..856ad64 100644
--- a/arch/powerpc/platforms/cell/celleb_scc_pciex.c
+++ b/arch/powerpc/platforms/cell/celleb_scc_pciex.c
@@ -486,8 +486,7 @@ static __init int celleb_setup_pciex(struct device_node
*node,
struct pci_controller *phb)
{
struct resource r;
- struct of_irq oirq;
- int virq;
+ unsigned int virq;
/* SMMIO registers; used inside this file */
if (of_address_to_resource(node, 0, r)) {
@@ -507,12 +506,11 @@ static __init int celleb_setup_pciex(struct device_node
*node,
phb-ops = scc_pciex_pci_ops;
/* internal interrupt handler */
- if (of_irq_map_one(node, 1, oirq)) {
+ virq = irq_of_parse_and_map(node, 1);
+ if (!virq) {
pr_err(PCIEXC:Failed to map irq\n);
goto error;
}
- virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
-oirq.size);
if (request_irq(virq, pciex_handle_internal_irq,
0, pciex, (void *)phb)) {
pr_err(PCIEXC:Failed to request irq\n);
diff --git a/arch/powerpc/platforms/cell/spider-pic.c
b/arch/powerpc/platforms/cell/spider-pic.c
index 8e29944..1f72f4a 100644
--- a/arch/powerpc/platforms/cell/spider-pic.c
+++ b/arch/powerpc/platforms/cell/spider-pic.c
@@ -235,12 +235,9 @@ static unsigned int __init
spider_find_cascade_and_node(struct spider_pic *pic)
/* First, we check whether we have a real interrupts in the device
* tree in case the device-tree is ever fixed
*/
- struct of_irq oirq;
- if (of_irq_map_one(pic-host-of_node, 0, oirq) == 0) {
- virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
-oirq.size);
+ virq = irq_of_parse_and_map(pic-host-of_node, 0);
+ if (virq)
return virq;
- }
/* Now do the horrible hacks */
tmp = of_get_property(pic-host-of_node, #interrupt-cells, NULL);
diff --git a/arch/powerpc/sysdev/fsl_gtm.c b/arch/powerpc/sysdev/fsl_gtm.c
index 0eb871c..dd0d5be 100644
--- a/arch/powerpc/sysdev/fsl_gtm.c
+++ b/arch/powerpc/sysdev/fsl_gtm.c
@@ -401,16 +401,15 @@ static int __init fsl_gtm_init(void)
gtm-clock = *clock;
for (i = 0; i ARRAY_SIZE(gtm-timers); i++) {
-
Re: [PATCH v2 01/10] of/irq: Rework of_irq_count()
On Wed, Sep 18, 2013 at 8:24 AM, Thierry Reding
thierry.red...@gmail.com wrote:
The of_irq_to_resource() helper that is used to implement of_irq_count()
tries to resolve interrupts and in fact creates a mapping for resolved
interrupts. That's pretty heavy lifting for something that claims to
just return the number of interrupts requested by a given device node.
Instead, use the more lightweight of_irq_map_one(), which, despite the
name, doesn't create an actual mapping. Perhaps a better name would be
of_irq_translate_one().
Signed-off-by: Thierry Reding tred...@nvidia.com
Acked-by: Rob Herring rob.herr...@calxeda.com
---
drivers/of/irq.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/of/irq.c b/drivers/of/irq.c
index 1752988..5f44388 100644
--- a/drivers/of/irq.c
+++ b/drivers/of/irq.c
@@ -368,9 +368,10 @@ EXPORT_SYMBOL_GPL(of_irq_to_resource);
*/
int of_irq_count(struct device_node *dev)
{
+ struct of_irq irq;
int nr = 0;
- while (of_irq_to_resource(dev, nr, NULL))
+ while (of_irq_map_one(dev, nr, irq) == 0)
nr++;
return nr;
--
1.8.4
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[PATCH 00/39] Second round of 64bit PowerPC little endian patches
This patchset fixes little endian issues found in various places including the alignment handler, PCI, and ptrace code. It also adds little endian support for KVM guests and PowerNV. Alistair Popple (4): powerpc: Little endian fixes for platforms/powernv/opal.c powerpc: Little endian fix for arch/powerpc/platforms/powernv/pci.c powerpc: Little endian fix for arch/powerpc/platforms/powernv/pci-p5ioc2.c powerpc: Little endian sparse clean up for arch/powerpc/platforms/powernv/pci-ioda.c Anton Blanchard (22): powerpc: Fix endian issues in VMX copy loops powerpc: Book 3S MMU little endian support powerpc: Fix offset of FPRs in VSX registers in little endian builds powerpc: PTRACE_PEEKUSR/PTRACE_POKEUSER of FPR registers in little endian builds powerpc: Little endian builds double word swap VSX state during context save/restore powerpc: Add little endian support for word-at-a-time functions powerpc: Set MSR_LE bit on little endian builds powerpc: Reset MSR_LE on signal entry powerpc: Remove open coded byte swap macro in alignment handler powerpc: Remove hard coded FP offsets in alignment handler powerpc: Alignment handler shouldn't access VSX registers with TS_FPR powerpc: Add little endian support to alignment handler powerpc: Handle VSX alignment faults in little endian mode powerpc: Use generic checksum code in little endian powerpc: Use generic memcpy code in little endian powerpc: uname should return ppc64le/ppcle on little endian builds powerpc/powernv: More little endian issues in OPAL RTC driver powerpc/powernv: Fix some PCI sparse errors and one LE bug KVM: PPC: Disable KVM on little endian builds powerpc/kvm/book3s_hv: Add little endian guest support powerpc: Don't set HAVE_EFFICIENT_UNALIGNED_ACCESS on little endian builds powerpc: Work around little endian gcc bug Benjamin Herrenschmidt (10): powerpc: endian safe trampoline powerpc/powernv: Fix endian issues in OPAL RTC driver powerpc/powernv: Fix endian issues in OPAL ICS backend powerpc/powernv: Make OPAL NVRAM device tree accesses endian safe powerpc/powernv: Fix endian issues in powernv PCI code powerpc/powernv: Fix endian issues in OPAL console and udbg backend powerpc/powernv: Fix OPAL entry and exit in little endian mode powerpc/powernv: Don't register exception handlers in little endian mode powerpc/hvsi: Fix endian issues in HVSI driver tty/hvc_opal: powerpc: Make OPAL HVC device tree accesses endian safe Ian Munsie (3): powerpc: Support endian agnostic MMIO powerpc: Include the appropriate endianness header powerpc: Add ability to build little endian kernels arch/powerpc/Kconfig | 5 +- arch/powerpc/Makefile | 37 +- arch/powerpc/boot/Makefile | 3 +- arch/powerpc/include/asm/checksum.h| 5 + arch/powerpc/include/asm/hvsi.h| 16 +-- arch/powerpc/include/asm/io.h | 67 +++--- arch/powerpc/include/asm/kvm_host.h| 1 + arch/powerpc/include/asm/mmu-hash64.h | 4 +- arch/powerpc/include/asm/opal.h| 34 +++--- arch/powerpc/include/asm/ppc-opcode.h | 3 + arch/powerpc/include/asm/ppc_asm.h | 52 +++- arch/powerpc/include/asm/processor.h | 12 +- arch/powerpc/include/asm/reg.h | 7 +- arch/powerpc/include/asm/string.h | 4 + arch/powerpc/include/asm/word-at-a-time.h | 71 +++ arch/powerpc/include/uapi/asm/byteorder.h | 4 + arch/powerpc/kernel/align.c| 162 - arch/powerpc/kernel/asm-offsets.c | 1 + arch/powerpc/kernel/entry_64.S | 36 +++--- arch/powerpc/kernel/head_64.S | 3 + arch/powerpc/kernel/ppc_ksyms.c| 4 + arch/powerpc/kernel/ptrace.c | 8 +- arch/powerpc/kernel/signal_32.c| 3 +- arch/powerpc/kernel/signal_64.c| 3 +- arch/powerpc/kernel/vdso32/vdso32.lds.S| 4 + arch/powerpc/kernel/vdso64/vdso64.lds.S| 4 + arch/powerpc/kvm/Kconfig | 1 + arch/powerpc/kvm/book3s_64_mmu_hv.c| 2 +- arch/powerpc/kvm/book3s_hv.c | 44 +++ arch/powerpc/kvm/book3s_hv_rmhandlers.S| 15 +-- arch/powerpc/lib/Makefile | 18 ++- arch/powerpc/lib/copyuser_power7.S | 54 + arch/powerpc/lib/memcpy_power7.S | 55 + arch/powerpc/mm/hash_native_64.c | 46 --- arch/powerpc/mm/hash_utils_64.c| 38 +++--- arch/powerpc/platforms/powernv/opal-nvram.c| 4 +- arch/powerpc/platforms/powernv/opal-rtc.c | 12 +- arch/powerpc/platforms/powernv/opal-wrappers.S | 9 +- arch/powerpc/platforms/powernv/opal.c | 34 +++---
[PATCH 01/39] powerpc: Fix endian issues in VMX copy loops
Fix the permute loops for little endian. Signed-off-by: Anton Blanchard an...@samba.org --- arch/powerpc/lib/copyuser_power7.S | 54 + arch/powerpc/lib/memcpy_power7.S | 55 ++ 2 files changed, 63 insertions(+), 46 deletions(-) diff --git a/arch/powerpc/lib/copyuser_power7.S b/arch/powerpc/lib/copyuser_power7.S index d1f1179..e8e9c36 100644 --- a/arch/powerpc/lib/copyuser_power7.S +++ b/arch/powerpc/lib/copyuser_power7.S @@ -19,6 +19,14 @@ */ #include asm/ppc_asm.h +#ifdef __BIG_ENDIAN__ +#define LVS(VRT,RA,RB) lvslVRT,RA,RB +#define VPERM(VRT,VRA,VRB,VRC) vperm VRT,VRA,VRB,VRC +#else +#define LVS(VRT,RA,RB) lvsrVRT,RA,RB +#define VPERM(VRT,VRA,VRB,VRC) vperm VRT,VRB,VRA,VRC +#endif + .macro err1 100: .section __ex_table,a @@ -552,13 +560,13 @@ err3; stw r7,4(r3) li r10,32 li r11,48 - lvslvr16,0,r4 /* Setup permute control vector */ + LVS(vr16,0,r4) /* Setup permute control vector */ err3; lvx vr0,0,r4 addir4,r4,16 bf cr7*4+3,5f err3; lvx vr1,r0,r4 - vperm vr8,vr0,vr1,vr16 + VPERM(vr8,vr0,vr1,vr16) addir4,r4,16 err3; stvxvr8,r0,r3 addir3,r3,16 @@ -566,9 +574,9 @@ err3; stvxvr8,r0,r3 5: bf cr7*4+2,6f err3; lvx vr1,r0,r4 - vperm vr8,vr0,vr1,vr16 + VPERM(vr8,vr0,vr1,vr16) err3; lvx vr0,r4,r9 - vperm vr9,vr1,vr0,vr16 + VPERM(vr9,vr1,vr0,vr16) addir4,r4,32 err3; stvxvr8,r0,r3 err3; stvxvr9,r3,r9 @@ -576,13 +584,13 @@ err3; stvxvr9,r3,r9 6: bf cr7*4+1,7f err3; lvx vr3,r0,r4 - vperm vr8,vr0,vr3,vr16 + VPERM(vr8,vr0,vr3,vr16) err3; lvx vr2,r4,r9 - vperm vr9,vr3,vr2,vr16 + VPERM(vr9,vr3,vr2,vr16) err3; lvx vr1,r4,r10 - vperm vr10,vr2,vr1,vr16 + VPERM(vr10,vr2,vr1,vr16) err3; lvx vr0,r4,r11 - vperm vr11,vr1,vr0,vr16 + VPERM(vr11,vr1,vr0,vr16) addir4,r4,64 err3; stvxvr8,r0,r3 err3; stvxvr9,r3,r9 @@ -611,21 +619,21 @@ err3; stvxvr11,r3,r11 .align 5 8: err4; lvx vr7,r0,r4 - vperm vr8,vr0,vr7,vr16 + VPERM(vr8,vr0,vr7,vr16) err4; lvx vr6,r4,r9 - vperm vr9,vr7,vr6,vr16 + VPERM(vr9,vr7,vr6,vr16) err4; lvx vr5,r4,r10 - vperm vr10,vr6,vr5,vr16 + VPERM(vr10,vr6,vr5,vr16) err4; lvx vr4,r4,r11 - vperm vr11,vr5,vr4,vr16 + VPERM(vr11,vr5,vr4,vr16) err4; lvx vr3,r4,r12 - vperm vr12,vr4,vr3,vr16 + VPERM(vr12,vr4,vr3,vr16) err4; lvx vr2,r4,r14 - vperm vr13,vr3,vr2,vr16 + VPERM(vr13,vr3,vr2,vr16) err4; lvx vr1,r4,r15 - vperm vr14,vr2,vr1,vr16 + VPERM(vr14,vr2,vr1,vr16) err4; lvx vr0,r4,r16 - vperm vr15,vr1,vr0,vr16 + VPERM(vr15,vr1,vr0,vr16) addir4,r4,128 err4; stvxvr8,r0,r3 err4; stvxvr9,r3,r9 @@ -649,13 +657,13 @@ err4; stvxvr15,r3,r16 bf cr7*4+1,9f err3; lvx vr3,r0,r4 - vperm vr8,vr0,vr3,vr16 + VPERM(vr8,vr0,vr3,vr16) err3; lvx vr2,r4,r9 - vperm vr9,vr3,vr2,vr16 + VPERM(vr9,vr3,vr2,vr16) err3; lvx vr1,r4,r10 - vperm vr10,vr2,vr1,vr16 + VPERM(vr10,vr2,vr1,vr16) err3; lvx vr0,r4,r11 - vperm vr11,vr1,vr0,vr16 + VPERM(vr11,vr1,vr0,vr16) addir4,r4,64 err3; stvxvr8,r0,r3 err3; stvxvr9,r3,r9 @@ -665,9 +673,9 @@ err3; stvxvr11,r3,r11 9: bf cr7*4+2,10f err3; lvx vr1,r0,r4 - vperm vr8,vr0,vr1,vr16 + VPERM(vr8,vr0,vr1,vr16) err3; lvx vr0,r4,r9 - vperm vr9,vr1,vr0,vr16 + VPERM(vr9,vr1,vr0,vr16) addir4,r4,32 err3; stvxvr8,r0,r3 err3; stvxvr9,r3,r9 @@ -675,7 +683,7 @@ err3; stvxvr9,r3,r9 10:bf cr7*4+3,11f err3; lvx vr1,r0,r4 - vperm vr8,vr0,vr1,vr16 + VPERM(vr8,vr0,vr1,vr16) addir4,r4,16 err3; stvxvr8,r0,r3 addir3,r3,16 diff --git a/arch/powerpc/lib/memcpy_power7.S b/arch/powerpc/lib/memcpy_power7.S index 0663630..e4177db 100644 --- a/arch/powerpc/lib/memcpy_power7.S +++ b/arch/powerpc/lib/memcpy_power7.S @@ -20,6 +20,15 @@ #include asm/ppc_asm.h _GLOBAL(memcpy_power7) + +#ifdef __BIG_ENDIAN__ +#define LVS(VRT,RA,RB) lvslVRT,RA,RB +#define VPERM(VRT,VRA,VRB,VRC) vperm VRT,VRA,VRB,VRC +#else +#define LVS(VRT,RA,RB) lvsrVRT,RA,RB +#define VPERM(VRT,VRA,VRB,VRC) vperm VRT,VRB,VRA,VRC +#endif + #ifdef CONFIG_ALTIVEC cmpldi r5,16 cmpldi cr1,r5,4096 @@ -485,13 +494,13 @@ _GLOBAL(memcpy_power7) li r10,32 li r11,48 - lvslvr16,0,r4 /* Setup permute control vector */ + LVS(vr16,0,r4) /*
[PATCH 02/39] powerpc: Book 3S MMU little endian support
v2: HPTE_LOCK_BIT was wrong in LE, spotted by Paul Mackerras.
Signed-off-by: Anton Blanchard an...@samba.org
---
arch/powerpc/include/asm/mmu-hash64.h | 4 +--
arch/powerpc/mm/hash_native_64.c | 46 ---
arch/powerpc/mm/hash_utils_64.c | 38 ++---
3 files changed, 46 insertions(+), 42 deletions(-)
diff --git a/arch/powerpc/include/asm/mmu-hash64.h
b/arch/powerpc/include/asm/mmu-hash64.h
index c4cf011..807014d 100644
--- a/arch/powerpc/include/asm/mmu-hash64.h
+++ b/arch/powerpc/include/asm/mmu-hash64.h
@@ -135,8 +135,8 @@ extern char initial_stab[];
#ifndef __ASSEMBLY__
struct hash_pte {
- unsigned long v;
- unsigned long r;
+ __be64 v;
+ __be64 r;
};
extern struct hash_pte *htab_address;
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index c33d939..3ea26c2 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -35,7 +35,11 @@
#define DBG_LOW(fmt...)
#endif
+#ifdef __BIG_ENDIAN__
#define HPTE_LOCK_BIT 3
+#else
+#define HPTE_LOCK_BIT (56+3)
+#endif
DEFINE_RAW_SPINLOCK(native_tlbie_lock);
@@ -172,7 +176,7 @@ static inline void tlbie(unsigned long vpn, int psize, int
apsize,
static inline void native_lock_hpte(struct hash_pte *hptep)
{
- unsigned long *word = hptep-v;
+ unsigned long *word = (unsigned long *)hptep-v;
while (1) {
if (!test_and_set_bit_lock(HPTE_LOCK_BIT, word))
@@ -184,7 +188,7 @@ static inline void native_lock_hpte(struct hash_pte *hptep)
static inline void native_unlock_hpte(struct hash_pte *hptep)
{
- unsigned long *word = hptep-v;
+ unsigned long *word = (unsigned long *)hptep-v;
clear_bit_unlock(HPTE_LOCK_BIT, word);
}
@@ -204,10 +208,10 @@ static long native_hpte_insert(unsigned long hpte_group,
unsigned long vpn,
}
for (i = 0; i HPTES_PER_GROUP; i++) {
- if (! (hptep-v HPTE_V_VALID)) {
+ if (! (be64_to_cpu(hptep-v) HPTE_V_VALID)) {
/* retry with lock held */
native_lock_hpte(hptep);
- if (! (hptep-v HPTE_V_VALID))
+ if (! (be64_to_cpu(hptep-v) HPTE_V_VALID))
break;
native_unlock_hpte(hptep);
}
@@ -226,14 +230,14 @@ static long native_hpte_insert(unsigned long hpte_group,
unsigned long vpn,
i, hpte_v, hpte_r);
}
- hptep-r = hpte_r;
+ hptep-r = cpu_to_be64(hpte_r);
/* Guarantee the second dword is visible before the valid bit */
eieio();
/*
* Now set the first dword including the valid bit
* NOTE: this also unlocks the hpte
*/
- hptep-v = hpte_v;
+ hptep-v = cpu_to_be64(hpte_v);
__asm__ __volatile__ (ptesync : : : memory);
@@ -254,12 +258,12 @@ static long native_hpte_remove(unsigned long hpte_group)
for (i = 0; i HPTES_PER_GROUP; i++) {
hptep = htab_address + hpte_group + slot_offset;
- hpte_v = hptep-v;
+ hpte_v = be64_to_cpu(hptep-v);
if ((hpte_v HPTE_V_VALID) !(hpte_v HPTE_V_BOLTED)) {
/* retry with lock held */
native_lock_hpte(hptep);
- hpte_v = hptep-v;
+ hpte_v = be64_to_cpu(hptep-v);
if ((hpte_v HPTE_V_VALID)
!(hpte_v HPTE_V_BOLTED))
break;
@@ -294,7 +298,7 @@ static long native_hpte_updatepp(unsigned long slot,
unsigned long newpp,
native_lock_hpte(hptep);
- hpte_v = hptep-v;
+ hpte_v = be64_to_cpu(hptep-v);
/*
* We need to invalidate the TLB always because hpte_remove doesn't do
* a tlb invalidate. If a hash bucket gets full, we evict a more/less
@@ -308,8 +312,8 @@ static long native_hpte_updatepp(unsigned long slot,
unsigned long newpp,
} else {
DBG_LOW( - hit\n);
/* Update the HPTE */
- hptep-r = (hptep-r ~(HPTE_R_PP | HPTE_R_N)) |
- (newpp (HPTE_R_PP | HPTE_R_N | HPTE_R_C));
+ hptep-r = cpu_to_be64((be64_to_cpu(hptep-r) ~(HPTE_R_PP |
HPTE_R_N)) |
+ (newpp (HPTE_R_PP | HPTE_R_N | HPTE_R_C)));
}
native_unlock_hpte(hptep);
@@ -334,7 +338,7 @@ static long native_hpte_find(unsigned long vpn, int psize,
int ssize)
slot = (hash htab_hash_mask) * HPTES_PER_GROUP;
for (i = 0; i HPTES_PER_GROUP; i++) {
hptep = htab_address + slot;
- hpte_v = hptep-v;
+ hpte_v = be64_to_cpu(hptep-v);
if (HPTE_V_COMPARE(hpte_v, want_v) (hpte_v HPTE_V_VALID))
/* HPTE matches */
@@ -369,8
[PATCH 03/39] powerpc: Fix offset of FPRs in VSX registers in little endian builds
The FPRs overlap the high doublewords of the first 32 VSX registers.
Fix TS_FPROFFSET and TS_VSRLOWOFFSET so we access the correct fields
in little endian mode.
If VSX is disabled the FPRs are only one doubleword in length so
TS_FPROFFSET needs adjusting in little endian.
Signed-off-by: Anton Blanchard an...@samba.org
---
arch/powerpc/include/asm/processor.h | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/asm/processor.h
b/arch/powerpc/include/asm/processor.h
index e378ccc..634e2b2 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -14,8 +14,18 @@
#ifdef CONFIG_VSX
#define TS_FPRWIDTH 2
+
+#ifdef __BIG_ENDIAN__
+#define TS_FPROFFSET 0
+#define TS_VSRLOWOFFSET 1
+#else
+#define TS_FPROFFSET 1
+#define TS_VSRLOWOFFSET 0
+#endif
+
#else
#define TS_FPRWIDTH 1
+#define TS_FPROFFSET 0
#endif
#ifdef CONFIG_PPC64
@@ -142,8 +152,6 @@ typedef struct {
unsigned long seg;
} mm_segment_t;
-#define TS_FPROFFSET 0
-#define TS_VSRLOWOFFSET 1
#define TS_FPR(i) fpr[i][TS_FPROFFSET]
#define TS_TRANS_FPR(i) transact_fpr[i][TS_FPROFFSET]
--
1.8.1.2
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[PATCH 04/39] powerpc: PTRACE_PEEKUSR/PTRACE_POKEUSER of FPR registers in little endian builds
FPRs overlap the high 64bits of the first 32 VSX registers. The ptrace FP read/write code assumes big endian ordering and grabs the lowest 64 bits. Fix this by using the TS_FPR macro which does the right thing. Signed-off-by: Anton Blanchard an...@samba.org --- arch/powerpc/kernel/ptrace.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c index 9a0d24c..8d5d4e9 100644 --- a/arch/powerpc/kernel/ptrace.c +++ b/arch/powerpc/kernel/ptrace.c @@ -1554,8 +1554,8 @@ long arch_ptrace(struct task_struct *child, long request, flush_fp_to_thread(child); if (fpidx (PT_FPSCR - PT_FPR0)) - tmp = ((unsigned long *)child-thread.fpr) - [fpidx * TS_FPRWIDTH]; + memcpy(tmp, child-thread.TS_FPR(fpidx), + sizeof(long)); else tmp = child-thread.fpscr.val; } @@ -1587,8 +1587,8 @@ long arch_ptrace(struct task_struct *child, long request, flush_fp_to_thread(child); if (fpidx (PT_FPSCR - PT_FPR0)) - ((unsigned long *)child-thread.fpr) - [fpidx * TS_FPRWIDTH] = data; + memcpy(child-thread.TS_FPR(fpidx), data, + sizeof(long)); else child-thread.fpscr.val = data; ret = 0; -- 1.8.1.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 05/39] powerpc: Little endian builds double word swap VSX state during context save/restore
The elements within VSX loads and stores are big endian ordered regardless of endianness. Our VSX context save/restore code uses lxvd2x and stxvd2x which is a 2x doubleword operation. This means the two doublewords will be swapped and we have to perform another swap to undo it. We need to do this on save and restore. Signed-off-by: Anton Blanchard an...@samba.org --- arch/powerpc/include/asm/ppc-opcode.h | 3 +++ arch/powerpc/include/asm/ppc_asm.h| 21 + 2 files changed, 20 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h index d7fe9f5..ad5fcf5 100644 --- a/arch/powerpc/include/asm/ppc-opcode.h +++ b/arch/powerpc/include/asm/ppc-opcode.h @@ -181,6 +181,7 @@ #define PPC_INST_TLBIVAX 0x7c000624 #define PPC_INST_TLBSRX_DOT0x7c0006a5 #define PPC_INST_XXLOR 0xf510 +#define PPC_INST_XXSWAPD 0xf250 #define PPC_INST_XVCPSGNDP 0xf780 #define PPC_INST_TRECHKPT 0x7c0007dd #define PPC_INST_TRECLAIM 0x7c00075d @@ -344,6 +345,8 @@ VSX_XX1((s), a, b)) #define XXLOR(t, a, b) stringify_in_c(.long PPC_INST_XXLOR | \ VSX_XX3((t), a, b)) +#define XXSWAPD(t, a) stringify_in_c(.long PPC_INST_XXSWAPD | \ + VSX_XX3((t), a, a)) #define XVCPSGNDP(t, a, b) stringify_in_c(.long (PPC_INST_XVCPSGNDP | \ VSX_XX3((t), (a), (b diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h index 5995457..0c51fb4 100644 --- a/arch/powerpc/include/asm/ppc_asm.h +++ b/arch/powerpc/include/asm/ppc_asm.h @@ -180,9 +180,20 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR) #define REST_32VRS_TRANSACT(n,b,base) REST_16VRS_TRANSACT(n,b,base); \ REST_16VRS_TRANSACT(n+16,b,base) +#ifdef __BIG_ENDIAN__ +#define STXVD2X_ROT(n,b,base) STXVD2X(n,b,base) +#define LXVD2X_ROT(n,b,base) LXVD2X(n,b,base) +#else +#define STXVD2X_ROT(n,b,base) XXSWAPD(n,n); \ + STXVD2X(n,b,base); \ + XXSWAPD(n,n) + +#define LXVD2X_ROT(n,b,base) LXVD2X(n,b,base); \ + XXSWAPD(n,n) +#endif #define SAVE_VSR_TRANSACT(n,b,base)li b,THREAD_TRANSACT_VSR0+(16*(n)); \ - STXVD2X(n,R##base,R##b) + STXVD2X_ROT(n,R##base,R##b) #define SAVE_2VSRS_TRANSACT(n,b,base) SAVE_VSR_TRANSACT(n,b,base);\ SAVE_VSR_TRANSACT(n+1,b,base) #define SAVE_4VSRS_TRANSACT(n,b,base) SAVE_2VSRS_TRANSACT(n,b,base); \ @@ -195,7 +206,7 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR) SAVE_16VSRS_TRANSACT(n+16,b,base) #define REST_VSR_TRANSACT(n,b,base)li b,THREAD_TRANSACT_VSR0+(16*(n)); \ - LXVD2X(n,R##base,R##b) + LXVD2X_ROT(n,R##base,R##b) #define REST_2VSRS_TRANSACT(n,b,base) REST_VSR_TRANSACT(n,b,base);\ REST_VSR_TRANSACT(n+1,b,base) #define REST_4VSRS_TRANSACT(n,b,base) REST_2VSRS_TRANSACT(n,b,base); \ @@ -208,13 +219,15 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR) REST_16VSRS_TRANSACT(n+16,b,base) /* Save the lower 32 VSRs in the thread VSR region */ -#define SAVE_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); STXVD2X(n,R##base,R##b) +#define SAVE_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); \ + STXVD2X_ROT(n,R##base,R##b) #define SAVE_2VSRS(n,b,base) SAVE_VSR(n,b,base); SAVE_VSR(n+1,b,base) #define SAVE_4VSRS(n,b,base) SAVE_2VSRS(n,b,base); SAVE_2VSRS(n+2,b,base) #define SAVE_8VSRS(n,b,base) SAVE_4VSRS(n,b,base); SAVE_4VSRS(n+4,b,base) #define SAVE_16VSRS(n,b,base) SAVE_8VSRS(n,b,base); SAVE_8VSRS(n+8,b,base) #define SAVE_32VSRS(n,b,base) SAVE_16VSRS(n,b,base); SAVE_16VSRS(n+16,b,base) -#define REST_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); LXVD2X(n,R##base,R##b) +#define REST_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); \ + LXVD2X_ROT(n,R##base,R##b) #define REST_2VSRS(n,b,base) REST_VSR(n,b,base); REST_VSR(n+1,b,base) #define REST_4VSRS(n,b,base) REST_2VSRS(n,b,base); REST_2VSRS(n+2,b,base) #define REST_8VSRS(n,b,base) REST_4VSRS(n,b,base); REST_4VSRS(n+4,b,base) -- 1.8.1.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 06/39] powerpc: Support endian agnostic MMIO
From: Ian Munsie imun...@au1.ibm.com
This patch maps the MMIO functions for 32bit PowerPC to their
appropriate instructions depending on CPU endianness.
The macros used to create the corresponding inline functions are also
renamed by this patch. Previously they had BE or LE in their names which
was misleading - they had nothing to do with endianness, but actually
created different instruction forms so their new names reflect the
instruction form they are creating (D-Form and X-Form).
Little endian 64bit PowerPC is not supported, so the lack of mappings
(and corresponding breakage) for that case is intentional to bring the
attention of anyone doing a 64bit little endian port. 64bit big endian
is unaffected.
[ Added 64 bit versions - Anton ]
Signed-off-by: Ian Munsie imun...@au1.ibm.com
Signed-off-by: Anton Blanchard an...@samba.org
---
arch/powerpc/include/asm/io.h | 67 +++
1 file changed, 49 insertions(+), 18 deletions(-)
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 5a64757..db1f296 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -113,7 +113,7 @@ extern bool isa_io_special;
/* gcc 4.0 and older doesn't have 'Z' constraint */
#if __GNUC__ 4 || (__GNUC__ == 4 __GNUC_MINOR__ == 0)
-#define DEF_MMIO_IN_LE(name, size, insn) \
+#define DEF_MMIO_IN_X(name, size, insn)\
static inline u##size name(const volatile u##size __iomem *addr) \
{ \
u##size ret;\
@@ -122,7 +122,7 @@ static inline u##size name(const volatile u##size __iomem
*addr)\
return ret; \
}
-#define DEF_MMIO_OUT_LE(name, size, insn) \
+#define DEF_MMIO_OUT_X(name, size, insn) \
static inline void name(volatile u##size __iomem *addr, u##size val) \
{ \
__asm__ __volatile__(sync;#insn %1,0,%2 \
@@ -130,7 +130,7 @@ static inline void name(volatile u##size __iomem *addr,
u##size val)\
IO_SET_SYNC_FLAG(); \
}
#else /* newer gcc */
-#define DEF_MMIO_IN_LE(name, size, insn) \
+#define DEF_MMIO_IN_X(name, size, insn)\
static inline u##size name(const volatile u##size __iomem *addr) \
{ \
u##size ret;\
@@ -139,7 +139,7 @@ static inline u##size name(const volatile u##size __iomem
*addr)\
return ret; \
}
-#define DEF_MMIO_OUT_LE(name, size, insn) \
+#define DEF_MMIO_OUT_X(name, size, insn) \
static inline void name(volatile u##size __iomem *addr, u##size val) \
{ \
__asm__ __volatile__(sync;#insn %1,%y0 \
@@ -148,7 +148,7 @@ static inline void name(volatile u##size __iomem *addr,
u##size val)\
}
#endif
-#define DEF_MMIO_IN_BE(name, size, insn) \
+#define DEF_MMIO_IN_D(name, size, insn)\
static inline u##size name(const volatile u##size __iomem *addr) \
{ \
u##size ret;\
@@ -157,7 +157,7 @@ static inline u##size name(const volatile u##size __iomem
*addr)\
return ret; \
}
-#define DEF_MMIO_OUT_BE(name, size, insn) \
+#define DEF_MMIO_OUT_D(name, size, insn) \
static inline void name(volatile u##size __iomem *addr, u##size val) \
{ \
__asm__ __volatile__(sync;#insn%U0%X0 %1,%0 \
@@ -165,22 +165,37 @@ static inline void name(volatile u##size __iomem *addr,
u##size val) \
IO_SET_SYNC_FLAG(); \
}
+DEF_MMIO_IN_D(in_8, 8, lbz);
+DEF_MMIO_OUT_D(out_8, 8, stb);
-DEF_MMIO_IN_BE(in_8, 8, lbz);
-DEF_MMIO_IN_BE(in_be16, 16, lhz);
-DEF_MMIO_IN_BE(in_be32, 32, lwz);
-DEF_MMIO_IN_LE(in_le16, 16, lhbrx);
-DEF_MMIO_IN_LE(in_le32, 32, lwbrx);
+#ifdef __BIG_ENDIAN__
+DEF_MMIO_IN_D(in_be16, 16, lhz);
+DEF_MMIO_IN_D(in_be32, 32, lwz);
+DEF_MMIO_IN_X(in_le16, 16, lhbrx);
+DEF_MMIO_IN_X(in_le32, 32, lwbrx);
-DEF_MMIO_OUT_BE(out_8, 8, stb);
[PATCH 07/39] powerpc: Add little endian support for word-at-a-time functions
The powerpc word-at-a-time functions are big endian specific.
Bring in the x86 version in order to support little endian builds.
Signed-off-by: Anton Blanchard an...@samba.org
---
arch/powerpc/include/asm/word-at-a-time.h | 71 +++
1 file changed, 71 insertions(+)
diff --git a/arch/powerpc/include/asm/word-at-a-time.h
b/arch/powerpc/include/asm/word-at-a-time.h
index d0b6d4a..213a5f2 100644
--- a/arch/powerpc/include/asm/word-at-a-time.h
+++ b/arch/powerpc/include/asm/word-at-a-time.h
@@ -8,6 +8,8 @@
#include linux/kernel.h
#include asm/asm-compat.h
+#ifdef __BIG_ENDIAN__
+
struct word_at_a_time {
const unsigned long high_bits, low_bits;
};
@@ -38,4 +40,73 @@ static inline bool has_zero(unsigned long val, unsigned long
*data, const struct
return (val + c-high_bits) ~rhs;
}
+#else
+
+/*
+ * This is largely generic for little-endian machines, but the
+ * optimal byte mask counting is probably going to be something
+ * that is architecture-specific. If you have a reliably fast
+ * bit count instruction, that might be better than the multiply
+ * and shift, for example.
+ */
+struct word_at_a_time {
+ const unsigned long one_bits, high_bits;
+};
+
+#define WORD_AT_A_TIME_CONSTANTS { REPEAT_BYTE(0x01), REPEAT_BYTE(0x80) }
+
+#ifdef CONFIG_64BIT
+
+/*
+ * Jan Achrenius on G+: microoptimized version of
+ * the simpler (mask ONEBYTES) * ONEBYTES 56
+ * that works for the bytemasks without having to
+ * mask them first.
+ */
+static inline long count_masked_bytes(unsigned long mask)
+{
+ return mask*0x0001020304050608ul 56;
+}
+
+#else /* 32-bit case */
+
+/* Carl Chatfield / Jan Achrenius G+ version for 32-bit */
+static inline long count_masked_bytes(long mask)
+{
+ /* (00 ff 00 ff) - ( 1 1 2 3 ) */
+ long a = (0x0ff0001+mask) 23;
+ /* Fix the 1 for 00 case */
+ return a mask;
+}
+
+#endif
+
+/* Return nonzero if it has a zero */
+static inline unsigned long has_zero(unsigned long a, unsigned long *bits,
const struct word_at_a_time *c)
+{
+ unsigned long mask = ((a - c-one_bits) ~a) c-high_bits;
+ *bits = mask;
+ return mask;
+}
+
+static inline unsigned long prep_zero_mask(unsigned long a, unsigned long
bits, const struct word_at_a_time *c)
+{
+ return bits;
+}
+
+static inline unsigned long create_zero_mask(unsigned long bits)
+{
+ bits = (bits - 1) ~bits;
+ return bits 7;
+}
+
+/* The mask we created is directly usable as a bytemask */
+#define zero_bytemask(mask) (mask)
+
+static inline unsigned long find_zero(unsigned long mask)
+{
+ return count_masked_bytes(mask);
+}
+#endif
+
#endif /* _ASM_WORD_AT_A_TIME_H */
--
1.8.1.2
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[PATCH 08/39] powerpc: Set MSR_LE bit on little endian builds
We need to set MSR_LE in kernel and userspace for little endian builds Signed-off-by: Anton Blanchard an...@samba.org --- arch/powerpc/include/asm/reg.h | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index 10d1ef0..126f6e9 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -115,7 +115,12 @@ #define MSR_64BIT MSR_SF /* Server variant */ -#define MSR_ (MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_ISF |MSR_HV) +#define __MSR (MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_ISF |MSR_HV) +#ifdef __BIG_ENDIAN__ +#define MSR_ __MSR +#else +#define MSR_ (__MSR | MSR_LE) +#endif #define MSR_KERNEL (MSR_ | MSR_64BIT) #define MSR_USER32 (MSR_ | MSR_PR | MSR_EE) #define MSR_USER64 (MSR_USER32 | MSR_64BIT) -- 1.8.1.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 09/39] powerpc: Reset MSR_LE on signal entry
We always take signals in big endian which is wrong. Signals should be taken in native endian. Signed-off-by: Anton Blanchard an...@samba.org --- arch/powerpc/kernel/signal_32.c | 3 ++- arch/powerpc/kernel/signal_64.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c index bebdf1a..b386b0b 100644 --- a/arch/powerpc/kernel/signal_32.c +++ b/arch/powerpc/kernel/signal_32.c @@ -1045,8 +1045,9 @@ int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka, regs-gpr[5] = (unsigned long) rt_sf-uc; regs-gpr[6] = (unsigned long) rt_sf; regs-nip = (unsigned long) ka-sa.sa_handler; - /* enter the signal handler in big-endian mode */ + /* enter the signal handler in native-endian mode */ regs-msr = ~MSR_LE; + regs-msr |= (MSR_KERNEL MSR_LE); #ifdef CONFIG_PPC_TRANSACTIONAL_MEM /* Remove TM bits from thread's MSR. The MSR in the sigcontext * just indicates to userland that we were doing a transaction, but we diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c index f93ec28..8b51b02 100644 --- a/arch/powerpc/kernel/signal_64.c +++ b/arch/powerpc/kernel/signal_64.c @@ -773,8 +773,9 @@ int handle_rt_signal64(int signr, struct k_sigaction *ka, siginfo_t *info, /* Set up regs so we return to the signal handler. */ err |= get_user(regs-nip, funct_desc_ptr-entry); - /* enter the signal handler in big-endian mode */ + /* enter the signal handler in native-endian mode */ regs-msr = ~MSR_LE; + regs-msr |= (MSR_KERNEL MSR_LE); regs-gpr[1] = newsp; err |= get_user(regs-gpr[2], funct_desc_ptr-toc); regs-gpr[3] = signr; -- 1.8.1.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 10/39] powerpc: Include the appropriate endianness header
From: Ian Munsie imun...@au1.ibm.com This patch will have powerpc include the appropriate generic endianness header depending on what the compiler reports. Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Anton Blanchard an...@samba.org --- arch/powerpc/include/uapi/asm/byteorder.h | 4 1 file changed, 4 insertions(+) diff --git a/arch/powerpc/include/uapi/asm/byteorder.h b/arch/powerpc/include/uapi/asm/byteorder.h index aa6cc4f..ca931d0 100644 --- a/arch/powerpc/include/uapi/asm/byteorder.h +++ b/arch/powerpc/include/uapi/asm/byteorder.h @@ -7,6 +7,10 @@ * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */ +#ifdef __LITTLE_ENDIAN__ +#include linux/byteorder/little_endian.h +#else #include linux/byteorder/big_endian.h +#endif #endif /* _ASM_POWERPC_BYTEORDER_H */ -- 1.8.1.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 11/39] powerpc: endian safe trampoline
From: Benjamin Herrenschmidt b...@kernel.crashing.org Create a trampoline that works in either endian and flips to the expected endian. Use it for primary and secondary thread entry as well as RTAS and OF call return. Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org Signed-off-by: Anton Blanchard an...@samba.org --- arch/powerpc/include/asm/ppc_asm.h | 31 ++- arch/powerpc/kernel/entry_64.S | 36 arch/powerpc/kernel/head_64.S | 3 +++ 3 files changed, 53 insertions(+), 17 deletions(-) diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h index 0c51fb4..ce05bba 100644 --- a/arch/powerpc/include/asm/ppc_asm.h +++ b/arch/powerpc/include/asm/ppc_asm.h @@ -845,6 +845,35 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,946) #define N_SLINE68 #define N_SO 100 -#endif /* __ASSEMBLY__ */ +/* + * Create an endian fixup trampoline + * + * This starts with a tdi 0,0,0x48 instruction which is + * essentially a trap never, and thus akin to a nop. + * + * The opcode for this instruction read with the wrong endian + * however results in a b . + 8 + * + * So essentially we use that trick to execute the following + * trampoline in reverse endian if we are running with the + * MSR_LE bit set the wrong way for whatever endianness the + * kernel is built for. + */ +#ifdef CONFIG_PPC_BOOK3E +#define FIXUP_ENDIAN +#else +#define FIXUP_ENDIAN \ + tdi 0,0,0x48; /* Reverse endian of b . + 8 */ \ + b $+36; /* Skip trampoline if endian is good */ \ + .long 0x05009f42; /* bcl 20,31,$+4 */ \ + .long 0xa602487d; /* mflr r10 */ \ + .long 0x1c004a39; /* addi r10,r10,28*/ \ + .long 0xa600607d; /* mfmsr r11 */ \ + .long 0x01006b69; /* xori r11,r11,1 */ \ + .long 0xa6035a7d; /* mtsrr0 r10 */ \ + .long 0xa6037b7d; /* mtsrr1 r11 */ \ + .long 0x244c /* rfid */ +#endif /* !CONFIG_PPC_BOOK3E */ +#endif /* __ASSEMBLY__ */ #endif /* _ASM_POWERPC_PPC_ASM_H */ diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S index c04cdf7..889ea2b 100644 --- a/arch/powerpc/kernel/entry_64.S +++ b/arch/powerpc/kernel/entry_64.S @@ -1017,7 +1017,7 @@ _GLOBAL(enter_rtas) li r9,1 rldicr r9,r9,MSR_SF_LG,(63-MSR_SF_LG) - ori r9,r9,MSR_IR|MSR_DR|MSR_FE0|MSR_FE1|MSR_FP|MSR_RI + ori r9,r9,MSR_IR|MSR_DR|MSR_FE0|MSR_FE1|MSR_FP|MSR_RI|MSR_LE andcr6,r0,r9 sync/* disable interrupts so SRR0/1 */ mtmsrd r0 /* don't get trashed */ @@ -1032,6 +1032,8 @@ _GLOBAL(enter_rtas) b . /* prevent speculative execution */ _STATIC(rtas_return_loc) + FIXUP_ENDIAN + /* relocation is off at this point */ GET_PACA(r4) clrldi r4,r4,2 /* convert to realmode address */ @@ -1103,28 +1105,30 @@ _GLOBAL(enter_prom) std r10,_CCR(r1) std r11,_MSR(r1) - /* Get the PROM entrypoint */ - mtlrr4 + /* Put PROM address in SRR0 */ + mtsrr0 r4 + + /* Setup our trampoline return addr in LR */ + bcl 20,31,$+4 +0: mflrr4 + addir4,r4,(1f - 0b) + mtlrr4 - /* Switch MSR to 32 bits mode + /* Prepare a 32-bit mode big endian MSR */ #ifdef CONFIG_PPC_BOOK3E rlwinm r11,r11,0,1,31 - mtmsr r11 + mtsrr1 r11 + rfi #else /* CONFIG_PPC_BOOK3E */ -mfmsr r11 -li r12,1 -rldicr r12,r12,MSR_SF_LG,(63-MSR_SF_LG) -andcr11,r11,r12 -li r12,1 -rldicr r12,r12,MSR_ISF_LG,(63-MSR_ISF_LG) -andcr11,r11,r12 -mtmsrd r11 + LOAD_REG_IMMEDIATE(r12, MSR_SF | MSR_ISF | MSR_LE) + andcr11,r11,r12 + mtsrr1 r11 + rfid #endif /* CONFIG_PPC_BOOK3E */ -isync - /* Enter PROM here... */ - blrl +1: /* Return from OF */ + FIXUP_ENDIAN /* Just make sure that r1 top 32 bits didn't get * corrupt by OF diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S index 3d11d80..2ae41ab 100644 --- a/arch/powerpc/kernel/head_64.S +++ b/arch/powerpc/kernel/head_64.S @@ -68,6 +68,7 @@ _stext: _GLOBAL(__start) /* NOP this out unconditionally */ BEGIN_FTR_SECTION + FIXUP_ENDIAN b .__start_initialization_multiplatform END_FTR_SECTION(0, 1) @@ -115,6 +116,7 @@ __run_at_load: */ .globl __secondary_hold __secondary_hold: + FIXUP_ENDIAN #ifndef CONFIG_PPC_BOOK3E mfmsr r24 ori
[PATCH 16/39] powerpc: Handle VSX alignment faults in little endian mode
Things are complicated by the fact that VSX elements are big
endian ordered even in little endian mode. 8 byte loads and
stores also write to the top 8 bytes of the register.
Signed-off-by: Anton Blanchard an...@samba.org
---
arch/powerpc/kernel/align.c | 41 +
1 file changed, 33 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index cce82b1..59f70ad 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -630,7 +630,7 @@ static int emulate_spe(struct pt_regs *regs, unsigned int
reg,
}
#endif /* CONFIG_SPE */
-#if defined(CONFIG_VSX) defined(__BIG_ENDIAN__)
+#ifdef CONFIG_VSX
/*
* Emulate VSX instructions...
*/
@@ -658,8 +658,25 @@ static int emulate_vsx(unsigned char __user *addr,
unsigned int reg,
lptr = (unsigned long *) ptr;
+#ifdef __LITTLE_ENDIAN__
+ if (flags SW) {
+ elsize = length;
+ sw = length-1;
+ } else {
+ /*
+* The elements are BE ordered, even in LE mode, so process
+* them in reverse order.
+*/
+ addr += length - elsize;
+
+ /* 8 byte memory accesses go in the top 8 bytes of the VR */
+ if (length == 8)
+ ptr += 8;
+ }
+#else
if (flags SW)
sw = elsize-1;
+#endif
for (j = 0; j length; j += elsize) {
for (i = 0; i elsize; ++i) {
@@ -669,19 +686,31 @@ static int emulate_vsx(unsigned char __user *addr,
unsigned int reg,
ret |= __get_user(ptr[i^sw], addr + i);
}
ptr += elsize;
+#ifdef __LITTLE_ENDIAN__
+ addr -= elsize;
+#else
addr += elsize;
+#endif
}
+#ifdef __BIG_ENDIAN__
+#define VSX_HI 0
+#define VSX_LO 1
+#else
+#define VSX_HI 1
+#define VSX_LO 0
+#endif
+
if (!ret) {
if (flags U)
regs-gpr[areg] = regs-dar;
/* Splat load copies the same data to top and bottom 8 bytes */
if (flags SPLT)
- lptr[1] = lptr[0];
- /* For 8 byte loads, zero the top 8 bytes */
+ lptr[VSX_LO] = lptr[VSX_HI];
+ /* For 8 byte loads, zero the low 8 bytes */
else if (!(flags ST) (8 == length))
- lptr[1] = 0;
+ lptr[VSX_LO] = 0;
} else
return -EFAULT;
@@ -805,7 +834,6 @@ int fix_alignment(struct pt_regs *regs)
/* DAR has the operand effective address */
addr = (unsigned char __user *)regs-dar;
-#ifdef __BIG_ENDIAN__
#ifdef CONFIG_VSX
if ((instruction 0xfc3e) == 0x7c18) {
unsigned int elsize;
@@ -840,9 +868,6 @@ int fix_alignment(struct pt_regs *regs)
return emulate_vsx(addr, reg, areg, regs, flags, nb, elsize);
}
#endif
-#else
- return -EFAULT;
-#endif
/* A size of 0 indicates an instruction we don't support, with
* the exception of DCBZ which is handled as a special case here
*/
--
1.8.1.2
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[PATCH 15/39] powerpc: Add little endian support to alignment handler
Handle most unaligned load and store faults in little
endian mode. Strings, multiples and VSX are not supported.
Signed-off-by: Anton Blanchard an...@samba.org
---
arch/powerpc/kernel/align.c | 93 ++---
1 file changed, 63 insertions(+), 30 deletions(-)
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 3049bd0..cce82b1 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -262,6 +262,7 @@ static int emulate_dcbz(struct pt_regs *regs, unsigned char
__user *addr)
#define SWIZ_PTR(p)((unsigned char __user *)((p) ^ swiz))
+#ifdef __BIG_ENDIAN__
static int emulate_multiple(struct pt_regs *regs, unsigned char __user *addr,
unsigned int reg, unsigned int nb,
unsigned int flags, unsigned int instr,
@@ -390,6 +391,7 @@ static int emulate_fp_pair(unsigned char __user *addr,
unsigned int reg,
return -EFAULT;
return 1; /* exception handled and fixed up */
}
+#endif
#ifdef CONFIG_SPE
@@ -628,7 +630,7 @@ static int emulate_spe(struct pt_regs *regs, unsigned int
reg,
}
#endif /* CONFIG_SPE */
-#ifdef CONFIG_VSX
+#if defined(CONFIG_VSX) defined(__BIG_ENDIAN__)
/*
* Emulate VSX instructions...
*/
@@ -702,18 +704,28 @@ int fix_alignment(struct pt_regs *regs)
unsigned int dsisr;
unsigned char __user *addr;
unsigned long p, swiz;
- int ret;
- union {
+ int ret, i;
+ union data {
u64 ll;
double dd;
unsigned char v[8];
struct {
+#ifdef __LITTLE_ENDIAN__
+ int low32;
+ unsigned hi32;
+#else
unsigned hi32;
int low32;
+#endif
} x32;
struct {
+#ifdef __LITTLE_ENDIAN__
+ short low16;
+ unsigned char hi48[6];
+#else
unsigned char hi48[6];
short low16;
+#endif
} x16;
} data;
@@ -772,8 +784,9 @@ int fix_alignment(struct pt_regs *regs)
/* Byteswap little endian loads and stores */
swiz = 0;
- if (regs-msr MSR_LE) {
+ if ((regs-msr MSR_LE) != (MSR_KERNEL MSR_LE)) {
flags ^= SW;
+#ifdef __BIG_ENDIAN__
/*
* So-called PowerPC little endian mode works by
* swizzling addresses rather than by actually doing
@@ -786,11 +799,13 @@ int fix_alignment(struct pt_regs *regs)
*/
if (cpu_has_feature(CPU_FTR_PPC_LE))
swiz = 7;
+#endif
}
/* DAR has the operand effective address */
addr = (unsigned char __user *)regs-dar;
+#ifdef __BIG_ENDIAN__
#ifdef CONFIG_VSX
if ((instruction 0xfc3e) == 0x7c18) {
unsigned int elsize;
@@ -810,7 +825,7 @@ int fix_alignment(struct pt_regs *regs)
elsize = 8;
flags = 0;
- if (regs-msr MSR_LE)
+ if ((regs-msr MSR_LE) != (MSR_KERNEL MSR_LE))
flags |= SW;
if (instruction 0x100)
flags |= ST;
@@ -825,6 +840,9 @@ int fix_alignment(struct pt_regs *regs)
return emulate_vsx(addr, reg, areg, regs, flags, nb, elsize);
}
#endif
+#else
+ return -EFAULT;
+#endif
/* A size of 0 indicates an instruction we don't support, with
* the exception of DCBZ which is handled as a special case here
*/
@@ -839,9 +857,13 @@ int fix_alignment(struct pt_regs *regs)
* function
*/
if (flags M) {
+#ifdef __BIG_ENDIAN__
PPC_WARN_ALIGNMENT(multiple, regs);
return emulate_multiple(regs, addr, reg, nb,
flags, instr, swiz);
+#else
+ return -EFAULT;
+#endif
}
/* Verify the address of the operand */
@@ -860,8 +882,12 @@ int fix_alignment(struct pt_regs *regs)
/* Special case for 16-byte FP loads and stores */
if (nb == 16) {
+#ifdef __BIG_ENDIAN__
PPC_WARN_ALIGNMENT(fp_pair, regs);
return emulate_fp_pair(addr, reg, flags);
+#else
+ return -EFAULT;
+#endif
}
PPC_WARN_ALIGNMENT(unaligned, regs);
@@ -870,24 +896,28 @@ int fix_alignment(struct pt_regs *regs)
* get it from register values
*/
if (!(flags ST)) {
- data.ll = 0;
- ret = 0;
- p = (unsigned long) addr;
+ unsigned int start = 0;
+
switch (nb) {
- case 8:
- ret |= __get_user_inatomic(data.v[0], SWIZ_PTR(p++));
- ret |= __get_user_inatomic(data.v[1],
[PATCH 17/39] powerpc: Use generic checksum code in little endian
We need to fix some endian issues in our checksum code. For now just enable the generic checksum routines for little endian builds. Signed-off-by: Anton Blanchard an...@samba.org --- arch/powerpc/Kconfig| 3 +++ arch/powerpc/include/asm/checksum.h | 5 + arch/powerpc/kernel/ppc_ksyms.c | 2 ++ arch/powerpc/lib/Makefile | 9 +++-- 4 files changed, 17 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 6b7530f..d232c84 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -140,6 +140,9 @@ config PPC select OLD_SIGACTION if PPC32 select HAVE_DEBUG_STACKOVERFLOW +config GENERIC_CSUM + def_bool CPU_LITTLE_ENDIAN + config EARLY_PRINTK bool default y diff --git a/arch/powerpc/include/asm/checksum.h b/arch/powerpc/include/asm/checksum.h index ce0c284..8251a3b 100644 --- a/arch/powerpc/include/asm/checksum.h +++ b/arch/powerpc/include/asm/checksum.h @@ -14,6 +14,9 @@ * which always checksum on 4 octet boundaries. ihl is the number * of 32-bit words and is always = 5. */ +#ifdef CONFIG_GENERIC_CSUM +#include asm-generic/checksum.h +#else extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl); /* @@ -123,5 +126,7 @@ static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, return sum; #endif } + +#endif #endif /* __KERNEL__ */ #endif diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c index 21646db..3b485c5 100644 --- a/arch/powerpc/kernel/ppc_ksyms.c +++ b/arch/powerpc/kernel/ppc_ksyms.c @@ -79,10 +79,12 @@ EXPORT_SYMBOL(strlen); EXPORT_SYMBOL(strcmp); EXPORT_SYMBOL(strncmp); +#ifndef CONFIG_GENERIC_CSUM EXPORT_SYMBOL(csum_partial); EXPORT_SYMBOL(csum_partial_copy_generic); EXPORT_SYMBOL(ip_fast_csum); EXPORT_SYMBOL(csum_tcpudp_magic); +#endif EXPORT_SYMBOL(__copy_tofrom_user); EXPORT_SYMBOL(__clear_user); diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index 4504332..33ab261 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@ -10,15 +10,20 @@ CFLAGS_REMOVE_code-patching.o = -pg CFLAGS_REMOVE_feature-fixups.o = -pg obj-y := string.o alloc.o \ - checksum_$(CONFIG_WORD_SIZE).o crtsavres.o + crtsavres.o obj-$(CONFIG_PPC32)+= div64.o copy_32.o obj-$(CONFIG_HAS_IOMEM)+= devres.o obj-$(CONFIG_PPC64)+= copypage_64.o copyuser_64.o \ memcpy_64.o usercopy_64.o mem_64.o string.o \ - checksum_wrappers_64.o hweight_64.o \ + hweight_64.o \ copyuser_power7.o string_64.o copypage_power7.o \ memcpy_power7.o +ifeq ($(CONFIG_GENERIC_CSUM),) +obj-y += checksum_$(CONFIG_WORD_SIZE).o +obj-$(CONFIG_PPC64)+= checksum_wrappers_64.o +endif + obj-$(CONFIG_PPC_EMULATE_SSTEP)+= sstep.o ldstfp.o ifeq ($(CONFIG_PPC64),y) -- 1.8.1.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 18/39] powerpc: Use generic memcpy code in little endian
We need to fix some endian issues in our memcpy code. For now just enable the generic memcpy routine for little endian builds. Signed-off-by: Anton Blanchard an...@samba.org --- arch/powerpc/include/asm/string.h | 4 arch/powerpc/kernel/ppc_ksyms.c | 2 ++ arch/powerpc/lib/Makefile | 9 ++--- 3 files changed, 12 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/include/asm/string.h b/arch/powerpc/include/asm/string.h index e40010a..0dffad6 100644 --- a/arch/powerpc/include/asm/string.h +++ b/arch/powerpc/include/asm/string.h @@ -10,7 +10,9 @@ #define __HAVE_ARCH_STRNCMP #define __HAVE_ARCH_STRCAT #define __HAVE_ARCH_MEMSET +#ifdef __BIG_ENDIAN__ #define __HAVE_ARCH_MEMCPY +#endif #define __HAVE_ARCH_MEMMOVE #define __HAVE_ARCH_MEMCMP #define __HAVE_ARCH_MEMCHR @@ -22,7 +24,9 @@ extern int strcmp(const char *,const char *); extern int strncmp(const char *, const char *, __kernel_size_t); extern char * strcat(char *, const char *); extern void * memset(void *,int,__kernel_size_t); +#ifdef __BIG_ENDIAN__ extern void * memcpy(void *,const void *,__kernel_size_t); +#endif extern void * memmove(void *,const void *,__kernel_size_t); extern int memcmp(const void *,const void *,__kernel_size_t); extern void * memchr(const void *,int,__kernel_size_t); diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c index 3b485c5..60bbeb2 100644 --- a/arch/powerpc/kernel/ppc_ksyms.c +++ b/arch/powerpc/kernel/ppc_ksyms.c @@ -148,7 +148,9 @@ EXPORT_SYMBOL(__ucmpdi2); #endif long long __bswapdi2(long long); EXPORT_SYMBOL(__bswapdi2); +#ifdef __BIG_ENDIAN__ EXPORT_SYMBOL(memcpy); +#endif EXPORT_SYMBOL(memset); EXPORT_SYMBOL(memmove); EXPORT_SYMBOL(memcmp); diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index 33ab261..5310132 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@ -15,15 +15,18 @@ obj-$(CONFIG_PPC32) += div64.o copy_32.o obj-$(CONFIG_HAS_IOMEM)+= devres.o obj-$(CONFIG_PPC64)+= copypage_64.o copyuser_64.o \ - memcpy_64.o usercopy_64.o mem_64.o string.o \ + usercopy_64.o mem_64.o string.o \ hweight_64.o \ - copyuser_power7.o string_64.o copypage_power7.o \ - memcpy_power7.o + copyuser_power7.o string_64.o copypage_power7.o ifeq ($(CONFIG_GENERIC_CSUM),) obj-y += checksum_$(CONFIG_WORD_SIZE).o obj-$(CONFIG_PPC64)+= checksum_wrappers_64.o endif +ifeq ($(CONFIG_CPU_LITTLE_ENDIAN),) +obj-$(CONFIG_PPC64)+= memcpy_power7.o memcpy_64.o +endif + obj-$(CONFIG_PPC_EMULATE_SSTEP)+= sstep.o ldstfp.o ifeq ($(CONFIG_PPC64),y) -- 1.8.1.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 19/39] powerpc: uname should return ppc64le/ppcle on little endian builds
We need to distinguish between big endian and little endian environments, so fix uname to return the right thing. Signed-off-by: Anton Blanchard an...@samba.org --- arch/powerpc/Makefile | 13 +++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile index 51cfb78..debfa2b 100644 --- a/arch/powerpc/Makefile +++ b/arch/powerpc/Makefile @@ -36,17 +36,26 @@ KBUILD_DEFCONFIG := ppc64_defconfig endif ifeq ($(CONFIG_PPC64),y) -OLDARCH:= ppc64 - new_nm := $(shell if $(NM) --help 21 | grep -- '--synthetic' /dev/null; then echo y; else echo n; fi) ifeq ($(new_nm),y) NM := $(NM) --synthetic endif +endif +ifeq ($(CONFIG_PPC64),y) +ifeq ($(CONFIG_CPU_LITTLE_ENDIAN),y) +OLDARCH:= ppc64le +else +OLDARCH:= ppc64 +endif +else +ifeq ($(CONFIG_CPU_LITTLE_ENDIAN),y) +OLDARCH:= ppcle else OLDARCH:= ppc endif +endif # It seems there are times we use this Makefile without # including the config file, but this replicates the old behaviour -- 1.8.1.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 20/39] powerpc: Little endian fixes for platforms/powernv/opal.c
From: Alistair Popple alist...@popple.id.au
Signed-off-by: Alistair Popple alist...@popple.id.au
---
arch/powerpc/platforms/powernv/opal.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/powernv/opal.c
b/arch/powerpc/platforms/powernv/opal.c
index 2911abe..4ffa75e 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -372,7 +372,7 @@ static irqreturn_t opal_interrupt(int irq, void *data)
static int __init opal_init(void)
{
struct device_node *np, *consoles;
- const u32 *irqs;
+ const __be32 *irqs;
int rc, i, irqlen;
opal_node = of_find_node_by_path(/ibm,opal);
--
1.8.1.2
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[PATCH 21/39] powerpc: Little endian fix for arch/powerpc/platforms/powernv/pci.c
From: Alistair Popple alist...@popple.id.au
Signed-off-by: Alistair Popple alist...@popple.id.au
---
arch/powerpc/platforms/powernv/pci.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci.c
b/arch/powerpc/platforms/powernv/pci.c
index a28d3b5..9122215 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -462,8 +462,8 @@ void pnv_pci_setup_iommu_table(struct iommu_table *tbl,
static struct iommu_table *pnv_pci_setup_bml_iommu(struct pci_controller *hose)
{
struct iommu_table *tbl;
- const __be64 *basep, *swinvp;
- const __be32 *sizep;
+ const __be64 *basep;
+ const __be32 *sizep, *swinvp;
basep = of_get_property(hose-dn, linux,tce-base, NULL);
sizep = of_get_property(hose-dn, linux,tce-size, NULL);
@@ -484,8 +484,9 @@ static struct iommu_table *pnv_pci_setup_bml_iommu(struct
pci_controller *hose)
swinvp = of_get_property(hose-dn, linux,tce-sw-invalidate-info,
NULL);
if (swinvp) {
- tbl-it_busno = swinvp[1];
- tbl-it_index = (unsigned long)ioremap(swinvp[0], 8);
+ tbl-it_busno = of_read_ulong(swinvp[1], 2);
+ tbl-it_index =
+ (unsigned long)ioremap(of_read_number(swinvp, 2), 8);
tbl-it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE;
}
return tbl;
--
1.8.1.2
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[PATCH 23/39] powerpc: Little endian sparse clean up for arch/powerpc/platforms/powernv/pci-ioda.c
From: Alistair Popple alist...@popple.id.au
Signed-off-by: Alistair Popple alist...@popple.id.au
---
arch/powerpc/platforms/powernv/pci-ioda.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index 74a5a57..9a903ed 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -1106,7 +1106,7 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
struct pci_controller *hose;
struct pnv_phb *phb;
unsigned long size, m32map_off, iomap_off, pemap_off;
- const u64 *prop64;
+ const __be64 *prop64;
const u32 *prop32;
int len;
u64 phb_id;
@@ -1285,7 +1285,7 @@ void __init pnv_pci_init_ioda2_phb(struct device_node *np)
void __init pnv_pci_init_ioda_hub(struct device_node *np)
{
struct device_node *phbn;
- const u64 *prop64;
+ const __be64 *prop64;
u64 hub_id;
pr_info(Probing IODA IO-Hub %s\n, np-full_name);
--
1.8.1.2
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[PATCH 22/39] powerpc: Little endian fix for arch/powerpc/platforms/powernv/pci-p5ioc2.c
From: Alistair Popple alist...@popple.id.au
Signed-off-by: Alistair Popple alist...@popple.id.au
---
arch/powerpc/platforms/powernv/pci-p5ioc2.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci-p5ioc2.c
b/arch/powerpc/platforms/powernv/pci-p5ioc2.c
index b68db63..f8b4bd8 100644
--- a/arch/powerpc/platforms/powernv/pci-p5ioc2.c
+++ b/arch/powerpc/platforms/powernv/pci-p5ioc2.c
@@ -99,7 +99,7 @@ static void __init pnv_pci_init_p5ioc2_phb(struct device_node
*np, u64 hub_id,
void *tce_mem, u64 tce_size)
{
struct pnv_phb *phb;
- const u64 *prop64;
+ const __be64 *prop64;
u64 phb_id;
int64_t rc;
static int primary = 1;
@@ -178,7 +178,7 @@ static void __init pnv_pci_init_p5ioc2_phb(struct
device_node *np, u64 hub_id,
void __init pnv_pci_init_p5ioc2_hub(struct device_node *np)
{
struct device_node *phbn;
- const u64 *prop64;
+ const __be64 *prop64;
u64 hub_id;
void *tce_mem;
uint64_t tce_per_phb;
--
1.8.1.2
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[PATCH 24/39] powerpc/powernv: Fix endian issues in OPAL RTC driver
From: Benjamin Herrenschmidt b...@kernel.crashing.org
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
arch/powerpc/platforms/powernv/opal-rtc.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/powerpc/platforms/powernv/opal-rtc.c
b/arch/powerpc/platforms/powernv/opal-rtc.c
index 2aa7641..dbfdba3 100644
--- a/arch/powerpc/platforms/powernv/opal-rtc.c
+++ b/arch/powerpc/platforms/powernv/opal-rtc.c
@@ -48,6 +48,8 @@ unsigned long __init opal_get_boot_time(void)
}
if (rc != OPAL_SUCCESS)
return 0;
+ y_m_d = be32_to_cpu(y_m_d);
+ h_m_s_ms = be64_to_cpu(h_m_s_ms);
opal_to_tm(y_m_d, h_m_s_ms, tm);
return mktime(tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday,
tm.tm_hour, tm.tm_min, tm.tm_sec);
@@ -68,6 +70,8 @@ void opal_get_rtc_time(struct rtc_time *tm)
}
if (rc != OPAL_SUCCESS)
return;
+ y_m_d = be32_to_cpu(y_m_d);
+ h_m_s_ms = be64_to_cpu(h_m_s_ms);
opal_to_tm(y_m_d, h_m_s_ms, tm);
}
@@ -86,6 +90,9 @@ int opal_set_rtc_time(struct rtc_time *tm)
h_m_s_ms |= ((u64)bin2bcd(tm-tm_min)) 48;
h_m_s_ms |= ((u64)bin2bcd(tm-tm_sec)) 40;
+ y_m_d = cpu_to_be32(y_m_d);
+ h_m_s_ms = cpu_to_be64(h_m_s_ms);
+
while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
rc = opal_rtc_write(y_m_d, h_m_s_ms);
if (rc == OPAL_BUSY_EVENT)
--
1.8.1.2
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[PATCH 25/39] powerpc/powernv: Fix endian issues in OPAL ICS backend
From: Benjamin Herrenschmidt b...@kernel.crashing.org
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
arch/powerpc/sysdev/xics/ics-opal.c | 17 +
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/sysdev/xics/ics-opal.c
b/arch/powerpc/sysdev/xics/ics-opal.c
index 39d7221..3c6ee1b 100644
--- a/arch/powerpc/sysdev/xics/ics-opal.c
+++ b/arch/powerpc/sysdev/xics/ics-opal.c
@@ -112,6 +112,7 @@ static int ics_opal_set_affinity(struct irq_data *d,
bool force)
{
unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
+ __be16 oserver;
int16_t server;
int8_t priority;
int64_t rc;
@@ -120,13 +121,13 @@ static int ics_opal_set_affinity(struct irq_data *d,
if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS)
return -1;
- rc = opal_get_xive(hw_irq, server, priority);
+ rc = opal_get_xive(hw_irq, oserver, priority);
if (rc != OPAL_SUCCESS) {
- pr_err(%s: opal_set_xive(irq=%d [hw 0x%x] server=%x)
- error %lld\n,
- __func__, d-irq, hw_irq, server, rc);
+ pr_err(%s: opal_get_xive(irq=%d [hw 0x%x]) error %lld\n,
+ __func__, d-irq, hw_irq, rc);
return -1;
}
+ server = be16_to_cpu(oserver);
wanted_server = xics_get_irq_server(d-irq, cpumask, 1);
if (wanted_server 0) {
@@ -181,7 +182,7 @@ static int ics_opal_map(struct ics *ics, unsigned int virq)
{
unsigned int hw_irq = (unsigned int)virq_to_hw(virq);
int64_t rc;
- int16_t server;
+ __be16 server;
int8_t priority;
if (WARN_ON(hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS))
@@ -201,7 +202,7 @@ static int ics_opal_map(struct ics *ics, unsigned int virq)
static void ics_opal_mask_unknown(struct ics *ics, unsigned long vec)
{
int64_t rc;
- int16_t server;
+ __be16 server;
int8_t priority;
/* Check if HAL knows about this interrupt */
@@ -215,14 +216,14 @@ static void ics_opal_mask_unknown(struct ics *ics,
unsigned long vec)
static long ics_opal_get_server(struct ics *ics, unsigned long vec)
{
int64_t rc;
- int16_t server;
+ __be16 server;
int8_t priority;
/* Check if HAL knows about this interrupt */
rc = opal_get_xive(vec, server, priority);
if (rc != OPAL_SUCCESS)
return -1;
- return ics_opal_unmangle_server(server);
+ return ics_opal_unmangle_server(be16_to_cpu(server));
}
int __init ics_opal_init(void)
--
1.8.1.2
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[PATCH 26/39] powerpc/powernv: Make OPAL NVRAM device tree accesses endian safe
From: Benjamin Herrenschmidt b...@kernel.crashing.org
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
arch/powerpc/platforms/powernv/opal-nvram.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/opal-nvram.c
b/arch/powerpc/platforms/powernv/opal-nvram.c
index 3f83e1a..acd9f7e 100644
--- a/arch/powerpc/platforms/powernv/opal-nvram.c
+++ b/arch/powerpc/platforms/powernv/opal-nvram.c
@@ -65,7 +65,7 @@ static ssize_t opal_nvram_write(char *buf, size_t count,
loff_t *index)
void __init opal_nvram_init(void)
{
struct device_node *np;
- const u32 *nbytes_p;
+ const __be32 *nbytes_p;
np = of_find_compatible_node(NULL, NULL, ibm,opal-nvram);
if (np == NULL)
@@ -76,7 +76,7 @@ void __init opal_nvram_init(void)
of_node_put(np);
return;
}
- nvram_size = *nbytes_p;
+ nvram_size = be32_to_cpup(nbytes_p);
printk(KERN_INFO OPAL nvram setup, %u bytes\n, nvram_size);
of_node_put(np);
--
1.8.1.2
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[PATCH 27/39] powerpc/powernv: Fix endian issues in powernv PCI code
From: Benjamin Herrenschmidt b...@kernel.crashing.org
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
arch/powerpc/platforms/powernv/pci-ioda.c | 31 +--
arch/powerpc/platforms/powernv/pci.c | 27 +--
2 files changed, 30 insertions(+), 28 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index 9a903ed..f9cb6c5 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -457,7 +457,7 @@ static void pnv_ioda_setup_bus_dma(struct pnv_ioda_pe *pe,
struct pci_bus *bus)
static void pnv_pci_ioda1_tce_invalidate(struct iommu_table *tbl,
u64 *startp, u64 *endp)
{
- u64 __iomem *invalidate = (u64 __iomem *)tbl-it_index;
+ __be64 __iomem *invalidate = (__be64 __iomem *)tbl-it_index;
unsigned long start, end, inc;
start = __pa(startp);
@@ -484,7 +484,7 @@ static void pnv_pci_ioda1_tce_invalidate(struct iommu_table
*tbl,
mb(); /* Ensure above stores are visible */
while (start = end) {
-__raw_writeq(start, invalidate);
+__raw_writeq(cpu_to_be64(start), invalidate);
start += inc;
}
@@ -499,7 +499,7 @@ static void pnv_pci_ioda2_tce_invalidate(struct pnv_ioda_pe
*pe,
u64 *startp, u64 *endp)
{
unsigned long start, end, inc;
- u64 __iomem *invalidate = (u64 __iomem *)tbl-it_index;
+ __be64 __iomem *invalidate = (__be64 __iomem *)tbl-it_index;
/* We'll invalidate DMA address in PE scope */
start = 0x2ul 60;
@@ -515,7 +515,7 @@ static void pnv_pci_ioda2_tce_invalidate(struct pnv_ioda_pe
*pe,
mb();
while (start = end) {
- __raw_writeq(start, invalidate);
+ __raw_writeq(cpu_to_be64(start), invalidate);
start += inc;
}
}
@@ -786,8 +786,7 @@ static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb,
struct pci_dev *dev,
struct irq_data *idata;
struct irq_chip *ichip;
unsigned int xive_num = hwirq - phb-msi_base;
- uint64_t addr64;
- uint32_t addr32, data;
+ __be32 data;
int rc;
/* No PE assigned ? bail out ... no MSI for you ! */
@@ -811,6 +810,8 @@ static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb,
struct pci_dev *dev,
}
if (is_64) {
+ __be64 addr64;
+
rc = opal_get_msi_64(phb-opal_id, pe-mve_number, xive_num, 1,
addr64, data);
if (rc) {
@@ -818,9 +819,11 @@ static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb,
struct pci_dev *dev,
pci_name(dev), rc);
return -EIO;
}
- msg-address_hi = addr64 32;
- msg-address_lo = addr64 0xul;
+ msg-address_hi = be64_to_cpu(addr64) 32;
+ msg-address_lo = be64_to_cpu(addr64) 0xul;
} else {
+ __be32 addr32;
+
rc = opal_get_msi_32(phb-opal_id, pe-mve_number, xive_num, 1,
addr32, data);
if (rc) {
@@ -829,9 +832,9 @@ static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb,
struct pci_dev *dev,
return -EIO;
}
msg-address_hi = 0;
- msg-address_lo = addr32;
+ msg-address_lo = be32_to_cpu(addr32);
}
- msg-data = data;
+ msg-data = be32_to_cpu(data);
/*
* Change the IRQ chip for the MSI interrupts on PHB3.
@@ -1107,7 +1110,7 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
struct pnv_phb *phb;
unsigned long size, m32map_off, iomap_off, pemap_off;
const __be64 *prop64;
- const u32 *prop32;
+ const __be32 *prop32;
int len;
u64 phb_id;
void *aux;
@@ -1142,8 +1145,8 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
spin_lock_init(phb-lock);
prop32 = of_get_property(np, bus-range, len);
if (prop32 len == 8) {
- hose-first_busno = prop32[0];
- hose-last_busno = prop32[1];
+ hose-first_busno = be32_to_cpu(prop32[0]);
+ hose-last_busno = be32_to_cpu(prop32[1]);
} else {
pr_warn( Broken bus-range on %s\n, np-full_name);
hose-first_busno = 0;
@@ -1175,7 +1178,7 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
if (!prop32)
phb-ioda.total_pe = 1;
else
- phb-ioda.total_pe = *prop32;
+ phb-ioda.total_pe = be32_to_cpup(prop32);
phb-ioda.m32_size = resource_size(hose-mem_resources[0]);
/* FW Has already off top 64k of M32 space
[PATCH 28/39] powerpc/powernv: Fix endian issues in OPAL console and udbg backend
From: Benjamin Herrenschmidt b...@kernel.crashing.org
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
arch/powerpc/include/asm/opal.h | 8
arch/powerpc/platforms/powernv/opal.c | 28
2 files changed, 20 insertions(+), 16 deletions(-)
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index c5cd728..6622ea4 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -537,12 +537,12 @@ typedef struct oppanel_line {
} oppanel_line_t;
/* API functions */
-int64_t opal_console_write(int64_t term_number, int64_t *length,
+int64_t opal_console_write(int64_t term_number, __be64 *length,
const uint8_t *buffer);
-int64_t opal_console_read(int64_t term_number, int64_t *length,
+int64_t opal_console_read(int64_t term_number, __be64 *length,
uint8_t *buffer);
int64_t opal_console_write_buffer_space(int64_t term_number,
- int64_t *length);
+ __be64 *length);
int64_t opal_rtc_read(uint32_t *year_month_day,
uint64_t *hour_minute_second_millisecond);
int64_t opal_rtc_write(uint32_t year_month_day,
@@ -552,7 +552,7 @@ int64_t opal_cec_reboot(void);
int64_t opal_read_nvram(uint64_t buffer, uint64_t size, uint64_t offset);
int64_t opal_write_nvram(uint64_t buffer, uint64_t size, uint64_t offset);
int64_t opal_handle_interrupt(uint64_t isn, uint64_t *outstanding_event_mask);
-int64_t opal_poll_events(uint64_t *outstanding_event_mask);
+int64_t opal_poll_events(__be64 *outstanding_event_mask);
int64_t opal_pci_set_hub_tce_memory(uint64_t hub_id, uint64_t tce_mem_addr,
uint64_t tce_mem_size);
int64_t opal_pci_set_phb_tce_memory(uint64_t phb_id, uint64_t tce_mem_addr,
diff --git a/arch/powerpc/platforms/powernv/opal.c
b/arch/powerpc/platforms/powernv/opal.c
index 4ffa75e..eb7bf3b 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -164,27 +164,28 @@ void opal_notifier_disable(void)
int opal_get_chars(uint32_t vtermno, char *buf, int count)
{
- s64 len, rc;
- u64 evt;
+ s64 rc;
+ __be64 evt, len;
if (!opal.entry)
return -ENODEV;
opal_poll_events(evt);
- if ((evt OPAL_EVENT_CONSOLE_INPUT) == 0)
+ if ((be64_to_cpu(evt) OPAL_EVENT_CONSOLE_INPUT) == 0)
return 0;
- len = count;
- rc = opal_console_read(vtermno, len, buf);
+ len = cpu_to_be64(count);
+ rc = opal_console_read(vtermno, len, buf);
if (rc == OPAL_SUCCESS)
- return len;
+ return be64_to_cpu(len);
return 0;
}
int opal_put_chars(uint32_t vtermno, const char *data, int total_len)
{
int written = 0;
+ __be64 olen;
s64 len, rc;
unsigned long flags;
- u64 evt;
+ __be64 evt;
if (!opal.entry)
return -ENODEV;
@@ -199,13 +200,14 @@ int opal_put_chars(uint32_t vtermno, const char *data,
int total_len)
*/
spin_lock_irqsave(opal_write_lock, flags);
if (firmware_has_feature(FW_FEATURE_OPALv2)) {
- rc = opal_console_write_buffer_space(vtermno, len);
+ rc = opal_console_write_buffer_space(vtermno, olen);
+ len = be64_to_cpu(olen);
if (rc || len total_len) {
spin_unlock_irqrestore(opal_write_lock, flags);
/* Closed - drop characters */
if (rc)
return total_len;
- opal_poll_events(evt);
+ opal_poll_events(NULL);
return -EAGAIN;
}
}
@@ -216,8 +218,9 @@ int opal_put_chars(uint32_t vtermno, const char *data, int
total_len)
rc = OPAL_BUSY;
while(total_len 0 (rc == OPAL_BUSY ||
rc == OPAL_BUSY_EVENT || rc == OPAL_SUCCESS)) {
- len = total_len;
- rc = opal_console_write(vtermno, len, data);
+ olen = cpu_to_be64(total_len);
+ rc = opal_console_write(vtermno, olen, data);
+ len = be64_to_cpu(olen);
/* Closed or other error drop */
if (rc != OPAL_SUCCESS rc != OPAL_BUSY
@@ -237,7 +240,8 @@ int opal_put_chars(uint32_t vtermno, const char *data, int
total_len)
*/
do
opal_poll_events(evt);
- while(rc == OPAL_SUCCESS (evt OPAL_EVENT_CONSOLE_OUTPUT));
+ while(rc == OPAL_SUCCESS
+ (be64_to_cpu(evt) OPAL_EVENT_CONSOLE_OUTPUT));
}
spin_unlock_irqrestore(opal_write_lock, flags);
return written;
--
1.8.1.2
[PATCH 30/39] powerpc/powernv: Don't register exception handlers in little endian mode
From: Benjamin Herrenschmidt b...@kernel.crashing.org
The powernv exception handlers are not ready to take exceptions
in little endian mode, so disable them.
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
arch/powerpc/platforms/powernv/opal.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/platforms/powernv/opal.c
b/arch/powerpc/platforms/powernv/opal.c
index eb7bf3b..c2391bb 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -77,6 +77,7 @@ int __init early_init_dt_scan_opal(unsigned long node,
static int __init opal_register_exception_handlers(void)
{
+#ifdef __BIG_ENDIAN__
u64 glue;
if (!(powerpc_firmware_features FW_FEATURE_OPAL))
@@ -94,6 +95,7 @@ static int __init opal_register_exception_handlers(void)
0, glue);
glue += 128;
opal_register_exception_handler(OPAL_SOFTPATCH_HANDLER, 0, glue);
+#endif
return 0;
}
--
1.8.1.2
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[PATCH 29/39] powerpc/powernv: Fix OPAL entry and exit in little endian mode
From: Benjamin Herrenschmidt b...@kernel.crashing.org Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org --- arch/powerpc/platforms/powernv/opal-wrappers.S | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S index 8f38445..2a03e1e 100644 --- a/arch/powerpc/platforms/powernv/opal-wrappers.S +++ b/arch/powerpc/platforms/powernv/opal-wrappers.S @@ -34,7 +34,7 @@ mtmsrd r12,1; \ LOAD_REG_ADDR(r0,.opal_return); \ mtlrr0; \ - li r0,MSR_DR|MSR_IR; \ + li r0,MSR_DR|MSR_IR|MSR_LE;\ andcr12,r12,r0; \ li r0,token; \ mtspr SPRN_HSRR1,r12; \ @@ -45,6 +45,13 @@ hrfid _STATIC(opal_return) + /* +* Fixup endian on OPAL return... we should be able to simplify +* this by instead converting the below trampoline to a set of +* bytes (always BE) since MSR:LE will end up fixed up as a side +* effect of the rfid. +*/ + FIXUP_ENDIAN ld r2,PACATOC(r13); ld r4,8(r1); ld r5,16(r1); -- 1.8.1.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 31/39] powerpc/powernv: More little endian issues in OPAL RTC driver
Sparse caught an issue where opal_set_rtc_time was incorrectly
byteswapping. Also fix a number of sparse warnings.
Signed-off-by: Anton Blanchard an...@samba.org
---
arch/powerpc/include/asm/opal.h | 4 ++--
arch/powerpc/platforms/powernv/opal-rtc.c | 19 ++-
2 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 6622ea4..3db5e82 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -543,8 +543,8 @@ int64_t opal_console_read(int64_t term_number, __be64
*length,
uint8_t *buffer);
int64_t opal_console_write_buffer_space(int64_t term_number,
__be64 *length);
-int64_t opal_rtc_read(uint32_t *year_month_day,
- uint64_t *hour_minute_second_millisecond);
+int64_t opal_rtc_read(__be32 *year_month_day,
+ __be64 *hour_minute_second_millisecond);
int64_t opal_rtc_write(uint32_t year_month_day,
uint64_t hour_minute_second_millisecond);
int64_t opal_cec_power_down(uint64_t request);
diff --git a/arch/powerpc/platforms/powernv/opal-rtc.c
b/arch/powerpc/platforms/powernv/opal-rtc.c
index dbfdba3..7d07c7e 100644
--- a/arch/powerpc/platforms/powernv/opal-rtc.c
+++ b/arch/powerpc/platforms/powernv/opal-rtc.c
@@ -37,10 +37,12 @@ unsigned long __init opal_get_boot_time(void)
struct rtc_time tm;
u32 y_m_d;
u64 h_m_s_ms;
+ __be32 __y_m_d;
+ __be64 __h_m_s_ms;
long rc = OPAL_BUSY;
while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
- rc = opal_rtc_read(y_m_d, h_m_s_ms);
+ rc = opal_rtc_read(__y_m_d, __h_m_s_ms);
if (rc == OPAL_BUSY_EVENT)
opal_poll_events(NULL);
else
@@ -48,8 +50,8 @@ unsigned long __init opal_get_boot_time(void)
}
if (rc != OPAL_SUCCESS)
return 0;
- y_m_d = be32_to_cpu(y_m_d);
- h_m_s_ms = be64_to_cpu(h_m_s_ms);
+ y_m_d = be32_to_cpu(__y_m_d);
+ h_m_s_ms = be64_to_cpu(__h_m_s_ms);
opal_to_tm(y_m_d, h_m_s_ms, tm);
return mktime(tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday,
tm.tm_hour, tm.tm_min, tm.tm_sec);
@@ -60,9 +62,11 @@ void opal_get_rtc_time(struct rtc_time *tm)
long rc = OPAL_BUSY;
u32 y_m_d;
u64 h_m_s_ms;
+ __be32 __y_m_d;
+ __be64 __h_m_s_ms;
while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
- rc = opal_rtc_read(y_m_d, h_m_s_ms);
+ rc = opal_rtc_read(__y_m_d, __h_m_s_ms);
if (rc == OPAL_BUSY_EVENT)
opal_poll_events(NULL);
else
@@ -70,8 +74,8 @@ void opal_get_rtc_time(struct rtc_time *tm)
}
if (rc != OPAL_SUCCESS)
return;
- y_m_d = be32_to_cpu(y_m_d);
- h_m_s_ms = be64_to_cpu(h_m_s_ms);
+ y_m_d = be32_to_cpu(__y_m_d);
+ h_m_s_ms = be64_to_cpu(__h_m_s_ms);
opal_to_tm(y_m_d, h_m_s_ms, tm);
}
@@ -90,9 +94,6 @@ int opal_set_rtc_time(struct rtc_time *tm)
h_m_s_ms |= ((u64)bin2bcd(tm-tm_min)) 48;
h_m_s_ms |= ((u64)bin2bcd(tm-tm_sec)) 40;
- y_m_d = cpu_to_be32(y_m_d);
- h_m_s_ms = cpu_to_be64(h_m_s_ms);
-
while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
rc = opal_rtc_write(y_m_d, h_m_s_ms);
if (rc == OPAL_BUSY_EVENT)
--
1.8.1.2
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[PATCH 32/39] powerpc/powernv: Fix some PCI sparse errors and one LE bug
pnv_pci_setup_bml_iommu was missing a byteswap of a device tree property. Signed-off-by: Anton Blanchard an...@samba.org --- arch/powerpc/include/asm/opal.h | 22 +++--- arch/powerpc/platforms/powernv/opal.c | 2 +- arch/powerpc/platforms/powernv/pci-ioda.c | 6 +++--- arch/powerpc/platforms/powernv/pci.c | 6 +++--- arch/powerpc/platforms/powernv/pci.h | 2 +- 5 files changed, 19 insertions(+), 19 deletions(-) diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h index 3db5e82..51e3b26 100644 --- a/arch/powerpc/include/asm/opal.h +++ b/arch/powerpc/include/asm/opal.h @@ -551,7 +551,7 @@ int64_t opal_cec_power_down(uint64_t request); int64_t opal_cec_reboot(void); int64_t opal_read_nvram(uint64_t buffer, uint64_t size, uint64_t offset); int64_t opal_write_nvram(uint64_t buffer, uint64_t size, uint64_t offset); -int64_t opal_handle_interrupt(uint64_t isn, uint64_t *outstanding_event_mask); +int64_t opal_handle_interrupt(uint64_t isn, __be64 *outstanding_event_mask); int64_t opal_poll_events(__be64 *outstanding_event_mask); int64_t opal_pci_set_hub_tce_memory(uint64_t hub_id, uint64_t tce_mem_addr, uint64_t tce_mem_size); @@ -560,9 +560,9 @@ int64_t opal_pci_set_phb_tce_memory(uint64_t phb_id, uint64_t tce_mem_addr, int64_t opal_pci_config_read_byte(uint64_t phb_id, uint64_t bus_dev_func, uint64_t offset, uint8_t *data); int64_t opal_pci_config_read_half_word(uint64_t phb_id, uint64_t bus_dev_func, - uint64_t offset, uint16_t *data); + uint64_t offset, __be16 *data); int64_t opal_pci_config_read_word(uint64_t phb_id, uint64_t bus_dev_func, - uint64_t offset, uint32_t *data); + uint64_t offset, __be32 *data); int64_t opal_pci_config_write_byte(uint64_t phb_id, uint64_t bus_dev_func, uint64_t offset, uint8_t data); int64_t opal_pci_config_write_half_word(uint64_t phb_id, uint64_t bus_dev_func, @@ -570,14 +570,14 @@ int64_t opal_pci_config_write_half_word(uint64_t phb_id, uint64_t bus_dev_func, int64_t opal_pci_config_write_word(uint64_t phb_id, uint64_t bus_dev_func, uint64_t offset, uint32_t data); int64_t opal_set_xive(uint32_t isn, uint16_t server, uint8_t priority); -int64_t opal_get_xive(uint32_t isn, uint16_t *server, uint8_t *priority); +int64_t opal_get_xive(uint32_t isn, __be16 *server, uint8_t *priority); int64_t opal_register_exception_handler(uint64_t opal_exception, uint64_t handler_address, uint64_t glue_cache_line); int64_t opal_pci_eeh_freeze_status(uint64_t phb_id, uint64_t pe_number, uint8_t *freeze_state, - uint16_t *pci_error_type, - uint64_t *phb_status); + __be16 *pci_error_type, + __be64 *phb_status); int64_t opal_pci_eeh_freeze_clear(uint64_t phb_id, uint64_t pe_number, uint64_t eeh_action_token); int64_t opal_pci_shpc(uint64_t phb_id, uint64_t shpc_action, uint8_t *state); @@ -614,13 +614,13 @@ int64_t opal_pci_msi_eoi(uint64_t phb_id, uint32_t hw_irq); int64_t opal_pci_set_xive_pe(uint64_t phb_id, uint32_t pe_number, uint32_t xive_num); int64_t opal_get_xive_source(uint64_t phb_id, uint32_t xive_num, -int32_t *interrupt_source_number); +__be32 *interrupt_source_number); int64_t opal_get_msi_32(uint64_t phb_id, uint32_t mve_number, uint32_t xive_num, - uint8_t msi_range, uint32_t *msi_address, - uint32_t *message_data); + uint8_t msi_range, __be32 *msi_address, + __be32 *message_data); int64_t opal_get_msi_64(uint64_t phb_id, uint32_t mve_number, uint32_t xive_num, uint8_t msi_range, - uint64_t *msi_address, uint32_t *message_data); + __be64 *msi_address, __be32 *message_data); int64_t opal_start_cpu(uint64_t thread_number, uint64_t start_address); int64_t opal_query_cpu_status(uint64_t thread_number, uint8_t *thread_status); int64_t opal_write_oppanel(oppanel_line_t *lines, uint64_t num_lines); @@ -642,7 +642,7 @@ int64_t opal_pci_fence_phb(uint64_t phb_id); int64_t opal_pci_reinit(uint64_t phb_id, uint8_t reinit_scope); int64_t opal_pci_mask_pe_error(uint64_t phb_id, uint16_t pe_number, uint8_t error_type, uint8_t mask_action); int64_t opal_set_slot_led_status(uint64_t phb_id, uint64_t slot_id, uint8_t led_type, uint8_t led_action); -int64_t opal_get_epow_status(uint64_t *status); +int64_t
[PATCH 33/39] powerpc/hvsi: Fix endian issues in HVSI driver
From: Benjamin Herrenschmidt b...@kernel.crashing.org
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
arch/powerpc/include/asm/hvsi.h | 16
drivers/tty/hvc/hvsi_lib.c | 25 -
2 files changed, 20 insertions(+), 21 deletions(-)
diff --git a/arch/powerpc/include/asm/hvsi.h b/arch/powerpc/include/asm/hvsi.h
index d3f64f3..d4a5315 100644
--- a/arch/powerpc/include/asm/hvsi.h
+++ b/arch/powerpc/include/asm/hvsi.h
@@ -25,7 +25,7 @@
struct hvsi_header {
uint8_t type;
uint8_t len;
- uint16_t seqno;
+ __be16 seqno;
} __attribute__((packed));
struct hvsi_data {
@@ -35,24 +35,24 @@ struct hvsi_data {
struct hvsi_control {
struct hvsi_header hdr;
- uint16_t verb;
+ __be16 verb;
/* optional depending on verb: */
- uint32_t word;
- uint32_t mask;
+ __be32 word;
+ __be32 mask;
} __attribute__((packed));
struct hvsi_query {
struct hvsi_header hdr;
- uint16_t verb;
+ __be16 verb;
} __attribute__((packed));
struct hvsi_query_response {
struct hvsi_header hdr;
- uint16_t verb;
- uint16_t query_seqno;
+ __be16 verb;
+ __be16 query_seqno;
union {
uint8_t version;
- uint32_t mctrl_word;
+ __be32 mctrl_word;
} u;
} __attribute__((packed));
diff --git a/drivers/tty/hvc/hvsi_lib.c b/drivers/tty/hvc/hvsi_lib.c
index ac27671..347050e 100644
--- a/drivers/tty/hvc/hvsi_lib.c
+++ b/drivers/tty/hvc/hvsi_lib.c
@@ -9,7 +9,7 @@
static int hvsi_send_packet(struct hvsi_priv *pv, struct hvsi_header *packet)
{
- packet-seqno = atomic_inc_return(pv-seqno);
+ packet-seqno = cpu_to_be16(atomic_inc_return(pv-seqno));
/* Assumes that always succeeds, works in practice */
return pv-put_chars(pv-termno, (char *)packet, packet-len);
@@ -28,7 +28,7 @@ static void hvsi_start_handshake(struct hvsi_priv *pv)
/* Send version query */
q.hdr.type = VS_QUERY_PACKET_HEADER;
q.hdr.len = sizeof(struct hvsi_query);
- q.verb = VSV_SEND_VERSION_NUMBER;
+ q.verb = cpu_to_be16(VSV_SEND_VERSION_NUMBER);
hvsi_send_packet(pv, q.hdr);
}
@@ -40,7 +40,7 @@ static int hvsi_send_close(struct hvsi_priv *pv)
ctrl.hdr.type = VS_CONTROL_PACKET_HEADER;
ctrl.hdr.len = sizeof(struct hvsi_control);
- ctrl.verb = VSV_CLOSE_PROTOCOL;
+ ctrl.verb = cpu_to_be16(VSV_CLOSE_PROTOCOL);
return hvsi_send_packet(pv, ctrl.hdr);
}
@@ -69,14 +69,14 @@ static void hvsi_got_control(struct hvsi_priv *pv)
{
struct hvsi_control *pkt = (struct hvsi_control *)pv-inbuf;
- switch (pkt-verb) {
+ switch (be16_to_cpu(pkt-verb)) {
case VSV_CLOSE_PROTOCOL:
/* We restart the handshaking */
hvsi_start_handshake(pv);
break;
case VSV_MODEM_CTL_UPDATE:
/* Transition of carrier detect */
- hvsi_cd_change(pv, pkt-word HVSI_TSCD);
+ hvsi_cd_change(pv, be32_to_cpu(pkt-word) HVSI_TSCD);
break;
}
}
@@ -87,7 +87,7 @@ static void hvsi_got_query(struct hvsi_priv *pv)
struct hvsi_query_response r;
/* We only handle version queries */
- if (pkt-verb != VSV_SEND_VERSION_NUMBER)
+ if (be16_to_cpu(pkt-verb) != VSV_SEND_VERSION_NUMBER)
return;
pr_devel(HVSI@%x: Got version query, sending response...\n,
@@ -96,7 +96,7 @@ static void hvsi_got_query(struct hvsi_priv *pv)
/* Send version response */
r.hdr.type = VS_QUERY_RESPONSE_PACKET_HEADER;
r.hdr.len = sizeof(struct hvsi_query_response);
- r.verb = VSV_SEND_VERSION_NUMBER;
+ r.verb = cpu_to_be16(VSV_SEND_VERSION_NUMBER);
r.u.version = HVSI_VERSION;
r.query_seqno = pkt-hdr.seqno;
hvsi_send_packet(pv, r.hdr);
@@ -112,7 +112,7 @@ static void hvsi_got_response(struct hvsi_priv *pv)
switch(r-verb) {
case VSV_SEND_MODEM_CTL_STATUS:
- hvsi_cd_change(pv, r-u.mctrl_word HVSI_TSCD);
+ hvsi_cd_change(pv, be32_to_cpu(r-u.mctrl_word) HVSI_TSCD);
pv-mctrl_update = 1;
break;
}
@@ -265,8 +265,7 @@ int hvsilib_read_mctrl(struct hvsi_priv *pv)
pv-mctrl_update = 0;
q.hdr.type = VS_QUERY_PACKET_HEADER;
q.hdr.len = sizeof(struct hvsi_query);
- q.hdr.seqno = atomic_inc_return(pv-seqno);
- q.verb = VSV_SEND_MODEM_CTL_STATUS;
+ q.verb = cpu_to_be16(VSV_SEND_MODEM_CTL_STATUS);
rc = hvsi_send_packet(pv, q.hdr);
if (rc = 0) {
pr_devel(HVSI@%x: Error %d...\n, pv-termno, rc);
@@ -304,9 +303,9 @@ int hvsilib_write_mctrl(struct hvsi_priv *pv, int dtr)
ctrl.hdr.type = VS_CONTROL_PACKET_HEADER,
ctrl.hdr.len = sizeof(struct hvsi_control);
- ctrl.verb =
[PATCH 34/39] tty/hvc_opal: powerpc: Make OPAL HVC device tree accesses endian safe
From: Benjamin Herrenschmidt b...@kernel.crashing.org
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
drivers/tty/hvc/hvc_opal.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/hvc/hvc_opal.c b/drivers/tty/hvc/hvc_opal.c
index cd69b48..6496872 100644
--- a/drivers/tty/hvc/hvc_opal.c
+++ b/drivers/tty/hvc/hvc_opal.c
@@ -329,7 +329,7 @@ static void udbg_init_opal_common(void)
void __init hvc_opal_init_early(void)
{
struct device_node *stdout_node = NULL;
- const u32 *termno;
+ const __be32 *termno;
const char *name = NULL;
const struct hv_ops *ops;
u32 index;
@@ -371,7 +371,7 @@ void __init hvc_opal_init_early(void)
if (!stdout_node)
return;
termno = of_get_property(stdout_node, reg, NULL);
- index = termno ? *termno : 0;
+ index = termno ? be32_to_cpup(termno) : 0;
if (index = MAX_NR_HVC_CONSOLES)
return;
hvc_opal_privs[index] = hvc_opal_boot_priv;
--
1.8.1.2
___
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[PATCH 35/39] KVM: PPC: Disable KVM on little endian builds
There are a number of KVM issues with little endian builds. We are working on fixing them, but in the meantime disable it. Signed-off-by: Anton Blanchard an...@samba.org Cc: Alexander Graf ag...@suse.de --- arch/powerpc/kvm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig index ffaef2c..e593ff2 100644 --- a/arch/powerpc/kvm/Kconfig +++ b/arch/powerpc/kvm/Kconfig @@ -6,6 +6,7 @@ source virt/kvm/Kconfig menuconfig VIRTUALIZATION bool Virtualization + depends on !CPU_LITTLE_ENDIAN ---help--- Say Y here to get to see options for using your Linux host to run other operating systems inside virtual machines (guests). -- 1.8.1.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 36/39] powerpc/kvm/book3s_hv: Add little endian guest support
Add support for the H_SET_MODE hcall so we can select the
endianness of our exceptions.
We create a guest MSR from scratch when delivering exceptions in
a few places and instead of extracing the LPCR[ILE] and inserting
it into MSR_LE each time simply create a new variable intr_msr which
contains the entire MSR to use.
Signed-off-by: Anton Blanchard an...@samba.org
Cc: Alexander Graf ag...@suse.de
---
arch/powerpc/include/asm/kvm_host.h | 1 +
arch/powerpc/kernel/asm-offsets.c | 1 +
arch/powerpc/kvm/book3s_64_mmu_hv.c | 2 +-
arch/powerpc/kvm/book3s_hv.c| 44 +
arch/powerpc/kvm/book3s_hv_rmhandlers.S | 15 ---
5 files changed, 52 insertions(+), 11 deletions(-)
diff --git a/arch/powerpc/include/asm/kvm_host.h
b/arch/powerpc/include/asm/kvm_host.h
index 3328353..50f204e 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -605,6 +605,7 @@ struct kvm_vcpu_arch {
spinlock_t tbacct_lock;
u64 busy_stolen;
u64 busy_preempt;
+ unsigned long intr_msr;
#endif
};
diff --git a/arch/powerpc/kernel/asm-offsets.c
b/arch/powerpc/kernel/asm-offsets.c
index d8958be..3967b15 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -490,6 +490,7 @@ int main(void)
DEFINE(VCPU_DAR, offsetof(struct kvm_vcpu, arch.shregs.dar));
DEFINE(VCPU_VPA, offsetof(struct kvm_vcpu, arch.vpa.pinned_addr));
DEFINE(VCPU_VPA_DIRTY, offsetof(struct kvm_vcpu, arch.vpa.dirty));
+ DEFINE(VCPU_INTR_MSR, offsetof(struct kvm_vcpu, arch.intr_msr));
#endif
#ifdef CONFIG_PPC_BOOK3S
DEFINE(VCPU_VCPUID, offsetof(struct kvm_vcpu, vcpu_id));
diff --git a/arch/powerpc/kvm/book3s_64_mmu_hv.c
b/arch/powerpc/kvm/book3s_64_mmu_hv.c
index 043eec8..30459bd 100644
--- a/arch/powerpc/kvm/book3s_64_mmu_hv.c
+++ b/arch/powerpc/kvm/book3s_64_mmu_hv.c
@@ -266,7 +266,7 @@ void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
static void kvmppc_mmu_book3s_64_hv_reset_msr(struct kvm_vcpu *vcpu)
{
- kvmppc_set_msr(vcpu, MSR_SF | MSR_ME);
+ kvmppc_set_msr(vcpu, vcpu-arch.intr_msr);
}
/*
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 62a2b5a..c9b90b8 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -503,6 +503,43 @@ static void kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu,
vcpu-arch.dtl.dirty = true;
}
+static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, unsigned long mflags,
+unsigned long resource, unsigned long value1,
+unsigned long value2)
+{
+ struct kvm *kvm = vcpu-kvm;
+ struct kvm_vcpu *v;
+ int n;
+
+ if (resource == 4) {
+ if (value1)
+ return H_P3;
+ if (value2)
+ return H_P4;
+
+ switch (mflags) {
+ case 0:
+ kvm-arch.lpcr = ~LPCR_ILE;
+ kvm_for_each_vcpu(n, v, kvm)
+ v-arch.intr_msr = ~MSR_LE;
+ kick_all_cpus_sync();
+ return H_SUCCESS;
+
+ case 1:
+ kvm-arch.lpcr |= LPCR_ILE;
+ kvm_for_each_vcpu(n, v, kvm)
+ v-arch.intr_msr |= MSR_LE;
+ kick_all_cpus_sync();
+ return H_SUCCESS;
+
+ default:
+ return H_UNSUPPORTED_FLAG_START;
+ }
+ }
+
+ return H_P2;
+}
+
int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
{
unsigned long req = kvmppc_get_gpr(vcpu, 3);
@@ -557,6 +594,12 @@ int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
/* Send the error out to userspace via KVM_RUN */
return rc;
+ case H_SET_MODE:
+ ret = kvmppc_h_set_mode(vcpu, kvmppc_get_gpr(vcpu, 4),
+ kvmppc_get_gpr(vcpu, 5),
+ kvmppc_get_gpr(vcpu, 6),
+ kvmppc_get_gpr(vcpu, 7));
+ break;
case H_XIRR:
case H_CPPR:
@@ -924,6 +967,7 @@ struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm,
unsigned int id)
spin_lock_init(vcpu-arch.vpa_update_lock);
spin_lock_init(vcpu-arch.tbacct_lock);
vcpu-arch.busy_preempt = TB_NIL;
+ vcpu-arch.intr_msr = MSR_SF | MSR_ME;
kvmppc_mmu_book3s_hv_init(vcpu);
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 294b7af..7b7bcea 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -521,8 +521,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
12:mr r6,r10
mr r10,r0
mr r7,r11
- li r11,(MSR_ME 1) | 1
[PATCH 37/39] powerpc: Add ability to build little endian kernels
From: Ian Munsie imun...@au1.ibm.com This patch allows the kbuild system to successfully compile a kernel for the little endian PowerPC64 architecture. A subsequent patch will add the CONFIG_CPU_LITTLE_ENDIAN kernel config option which must be set to build such a kernel. If cross compiling, CROSS_COMPILE must point to a suitable toolchain (compiled for the powerpc64le-linux and powerpcle-linux targets). Signed-off-by: Ian Munsie imun...@au1.ibm.com Signed-off-by: Anton Blanchard an...@samba.org --- arch/powerpc/Makefile | 24 +--- arch/powerpc/boot/Makefile | 3 ++- arch/powerpc/kernel/vdso32/vdso32.lds.S | 4 arch/powerpc/kernel/vdso64/vdso64.lds.S | 4 4 files changed, 31 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile index debfa2b..d3c91bf 100644 --- a/arch/powerpc/Makefile +++ b/arch/powerpc/Makefile @@ -65,11 +65,29 @@ endif UTS_MACHINE := $(OLDARCH) +ifeq ($(CONFIG_CPU_LITTLE_ENDIAN),y) +override CC+= -mlittle-endian +override AS+= -mlittle-endian +override LD+= -EL +override CROSS32CC += -mlittle-endian +override CROSS32AS += -mlittle-endian +LDEMULATION:= lppc +GNUTARGET := powerpcle +MULTIPLEWORD := -mno-multiple +else +override CC+= -mbig-endian +override AS+= -mbig-endian +override LD+= -EB +LDEMULATION:= ppc +GNUTARGET := powerpc +MULTIPLEWORD := -mmultiple +endif + ifeq ($(HAS_BIARCH),y) override AS+= -a$(CONFIG_WORD_SIZE) -override LD+= -m elf$(CONFIG_WORD_SIZE)ppc +override LD+= -m elf$(CONFIG_WORD_SIZE)$(LDEMULATION) override CC+= -m$(CONFIG_WORD_SIZE) -override AR:= GNUTARGET=elf$(CONFIG_WORD_SIZE)-powerpc $(AR) +override AR:= GNUTARGET=elf$(CONFIG_WORD_SIZE)-$(GNUTARGET) $(AR) endif LDFLAGS_vmlinux-y := -Bstatic @@ -95,7 +113,7 @@ endif CFLAGS-$(CONFIG_PPC64) := -mtraceback=no -mcall-aixdesc CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mcmodel=medium,-mminimal-toc) CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mno-pointers-to-nested-functions) -CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 -mmultiple +CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 $(MULTIPLEWORD) ifeq ($(CONFIG_PPC_BOOK3S_64),y) CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,-mtune=power4) diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile index 6a15c96..1e6baf0 100644 --- a/arch/powerpc/boot/Makefile +++ b/arch/powerpc/boot/Makefile @@ -22,7 +22,8 @@ all: $(obj)/zImage BOOTCFLAGS:= -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \ -fno-strict-aliasing -Os -msoft-float -pipe \ -fomit-frame-pointer -fno-builtin -fPIC -nostdinc \ --isystem $(shell $(CROSS32CC) -print-file-name=include) +-isystem $(shell $(CROSS32CC) -print-file-name=include) \ +-mbig-endian BOOTAFLAGS := -D__ASSEMBLY__ $(BOOTCFLAGS) -traditional -nostdinc ifdef CONFIG_DEBUG_INFO diff --git a/arch/powerpc/kernel/vdso32/vdso32.lds.S b/arch/powerpc/kernel/vdso32/vdso32.lds.S index f223409..e58ee10 100644 --- a/arch/powerpc/kernel/vdso32/vdso32.lds.S +++ b/arch/powerpc/kernel/vdso32/vdso32.lds.S @@ -4,7 +4,11 @@ */ #include asm/vdso.h +#ifdef __LITTLE_ENDIAN__ +OUTPUT_FORMAT(elf32-powerpcle, elf32-powerpcle, elf32-powerpcle) +#else OUTPUT_FORMAT(elf32-powerpc, elf32-powerpc, elf32-powerpc) +#endif OUTPUT_ARCH(powerpc:common) ENTRY(_start) diff --git a/arch/powerpc/kernel/vdso64/vdso64.lds.S b/arch/powerpc/kernel/vdso64/vdso64.lds.S index e486381..64fb183 100644 --- a/arch/powerpc/kernel/vdso64/vdso64.lds.S +++ b/arch/powerpc/kernel/vdso64/vdso64.lds.S @@ -4,7 +4,11 @@ */ #include asm/vdso.h +#ifdef __LITTLE_ENDIAN__ +OUTPUT_FORMAT(elf64-powerpcle, elf64-powerpcle, elf64-powerpcle) +#else OUTPUT_FORMAT(elf64-powerpc, elf64-powerpc, elf64-powerpc) +#endif OUTPUT_ARCH(powerpc:common64) ENTRY(_start) -- 1.8.1.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2] sound/soc/fsl/fsl_ssi.c: let check zero instead of check NO_IRQ
NO_IRQ may be defined as '(unsigned int) -1' in some architectures
(arm, sh ...), and either may not be defined in some architectures
which can enable SND_SOC_FSL_SSI (e.g. allmodconfig for arc).
When irq_of_parse_and_map() fails, it will always return 0, so need
check zero instead of NO_IRQ, or will cause compiling issue or run
time bug in some architectures.
Signed-off-by: Chen Gang gang.c...@asianux.com
---
sound/soc/fsl/fsl_ssi.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 6ac8730..6c17d3e 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -936,7 +936,7 @@ static int fsl_ssi_probe(struct platform_device *pdev)
ssi_private-ssi_phys = res.start;
ssi_private-irq = irq_of_parse_and_map(np, 0);
- if (ssi_private-irq == NO_IRQ) {
+ if (!ssi_private-irq) {
dev_err(pdev-dev, no irq for node %s\n, np-full_name);
return -ENXIO;
}
--
1.7.7.6
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[PATCH] sound/soc/fsl/fsl_ssi.c: let checking none-zero instead of checking NO_IRQ
NO_IRQ may be defined as '(unsigned int) -1' in some architectures
(arm, sh ...), and either may not be defined in some architectures
which can enable SND_SOC_FSL_SSI (e.g. allmodconfig for arc).
When irq_of_parse_and_map() fails, it will always return 0, so need let
checking none-zero instead of checking NO_IRQ, or will cause compiling
issue or run time bug in some architectures.
Signed-off-by: Chen Gang gang.c...@asianux.com
---
sound/soc/fsl/fsl_ssi.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 6ac8730..6c17d3e 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -936,7 +936,7 @@ static int fsl_ssi_probe(struct platform_device *pdev)
ssi_private-ssi_phys = res.start;
ssi_private-irq = irq_of_parse_and_map(np, 0);
- if (ssi_private-irq == NO_IRQ) {
+ if (!ssi_private-irq) {
dev_err(pdev-dev, no irq for node %s\n, np-full_name);
return -ENXIO;
}
--
1.7.7.6
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[PATCH 5/6 v7] kvm: booke: clear host tlb reference flag on guest tlb invalidation
On booke, struct tlbe_ref contains host tlb mapping information
(pfn: for guest-pfn to pfn, flags: attribute associated with this mapping)
for a guest tlb entry. So when a guest creates a TLB entry then
struct tlbe_ref is set to point to valid pfn and set attributes in
flags field of the above said structure. When a guest TLB entry is
invalidated then flags field of corresponding struct tlbe_ref is
updated to point that this is no more valid, also we selectively clear
some other attribute bits, example: if E500_TLB_BITMAP was set then we clear
E500_TLB_BITMAP, if E500_TLB_TLB0 is set then we clear this.
Ideally we should clear complete flags as this entry is invalid and does not
have anything to re-used. The other part of the problem is that when we use
the same entry again then also we do not clear (started doing or-ing etc).
So far it was working because the selectively clearing mentioned above
actually clears flags what was set during TLB mapping. But the problem
starts coming when we add more attributes to this then we need to selectively
clear them and which is not needed.
This patch we do both
- Clear flags when invalidating;
- Clear flags when reusing same entry later
Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
---
v6-7
- Comment re-phrased
v5-v6
- Reordered the flag clearing steps as per comment on v5
v4-v5
- New change
arch/powerpc/kvm/e500_mmu_host.c | 16
1 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/kvm/e500_mmu_host.c b/arch/powerpc/kvm/e500_mmu_host.c
index 1c6a9d7..7a41a93 100644
--- a/arch/powerpc/kvm/e500_mmu_host.c
+++ b/arch/powerpc/kvm/e500_mmu_host.c
@@ -230,15 +230,15 @@ void inval_gtlbe_on_host(struct kvmppc_vcpu_e500
*vcpu_e500, int tlbsel,
ref-flags = ~(E500_TLB_TLB0 | E500_TLB_VALID);
}
- /* Already invalidated in between */
- if (!(ref-flags E500_TLB_VALID))
- return;
-
- /* Guest tlbe is backed by at most one host tlbe per shadow pid. */
- kvmppc_e500_tlbil_one(vcpu_e500, gtlbe);
+ /*
+* If TLB entry is still valid then it's a TLB0 entry, and thus
+* backed by at most one host tlbe per shadow pid
+*/
+ if (ref-flags E500_TLB_VALID)
+ kvmppc_e500_tlbil_one(vcpu_e500, gtlbe);
/* Mark the TLB as not backed by the host anymore */
- ref-flags = ~E500_TLB_VALID;
+ ref-flags = 0;
}
static inline int tlbe_is_writable(struct kvm_book3e_206_tlb_entry *tlbe)
@@ -251,7 +251,7 @@ static inline void kvmppc_e500_ref_setup(struct tlbe_ref
*ref,
pfn_t pfn)
{
ref-pfn = pfn;
- ref-flags |= E500_TLB_VALID;
+ ref-flags = E500_TLB_VALID;
if (tlbe_is_writable(gtlbe))
kvm_set_pfn_dirty(pfn);
--
1.7.0.4
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[PATCH][v4] powerpc/mpc85xx:Add initial device tree support of T104x
The QorIQ T1040/T1042 processor support four integrated 64-bit e5500 PA processor cores with high-performance data path acceleration architecture and network peripheral interfaces required for networking telecommunications. T1042 personality is a reduced personality of T1040 without Integrated 8-port Gigabit Ethernet switch. The T1040/T1042 SoC includes the following function and features: - Four e5500 cores, each with a private 256 KB L2 cache - 256 KB shared L3 CoreNet platform cache (CPC) - Interconnect CoreNet platform - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support - Data Path Acceleration Architecture (DPAA) incorporating acceleration for the following functions: - Packet parsing, classification, and distribution - Queue management for scheduling, packet sequencing, and congestion management - Cryptography Acceleration (SEC 5.0) - RegEx Pattern Matching Acceleration (PME 2.2) - IEEE Std 1588 support - Hardware buffer management for buffer allocation and deallocation - Ethernet interfaces - Integrated 8-port Gigabit Ethernet switch (T1040 only) - Four 1 Gbps Ethernet controllers - Two RGMII interfaces or one RGMII and one MII interfaces - High speed peripheral interfaces - Four PCI Express 2.0 controllers running at up to 5 GHz - Two SATA controllers supporting 1.5 and 3.0 Gb/s operation - Upto two QSGMII interface - Upto six SGMII interface supporting 1000 Mbps - One SGMII interface supporting upto 2500 Mbps - Additional peripheral interfaces - Two USB 2.0 controllers with integrated PHY - SD/eSDHC/eMMC - eSPI controller - Four I2C controllers - Four UARTs - Four GPIO controllers - Integrated flash controller (IFC) - Change this to LCD/ HDMI interface (DIU) with 12 bit dual data rate - TDM interface - Multicore programmable interrupt controller (PIC) - Two 8-channel DMA engines - Single source clocking implementation - Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB) Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com Signed-off-by: Priyanka Jain priyanka.j...@freescale.com Signed-off-by: Varun Sethi varun.se...@freescale.com Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com --- Based upon git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git Branch next Changes for v2: Incorporated Scott's comments - Update t1040si-post.dtsi - update clock device tree node as per http://patchwork.ozlabs.org/patch/274134/ - removed DMA node, It will be added later as per http://patchwork.ozlabs.org/patch/271238/ - Updated display compatible field Changes for v3: Incorporated Scott's comments - Updated soc compatible field - updated clock compatible field Changes for v4: Sending as it is arch/powerpc/boot/dts/fsl/t1040si-post.dtsi | 423 +++ arch/powerpc/boot/dts/fsl/t1042si-post.dtsi | 41 +++ arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi | 109 +++ 3 files changed, 573 insertions(+) create mode 100644 arch/powerpc/boot/dts/fsl/t1040si-post.dtsi create mode 100644 arch/powerpc/boot/dts/fsl/t1042si-post.dtsi create mode 100644 arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi new file mode 100644 index 000..b16b528 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi @@ -0,0 +1,423 @@ +/* + * T1040 Silicon/SoC Device Tree Source (post include) + * + * Copyright 2013 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License (GPL) as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
[PATCH 1/2][v4] powerpc/fsl-booke: Add initial T104x_QDS board support
Add support for T104x board in board file t104x_qds.c, It is common for both T1040 and T1042 as they share same QDS board. T1040QDS board Overview --- - SERDES Connections, 8 lanes supporting: — PCI Express: supporting Gen 1 and Gen 2; — SGMII — QSGMII — SATA 2.0 — Aurora debug with dedicated connectors (T1040 only) - DDR Controller - Supports rates of up to 1600 MHz data-rate - Supports one DDR3LP UDIMM/RDIMMs, of single-, dual- or quad-rank types. -IFC/Local Bus - NAND flash: 8-bit, async, up to 2GB. - NOR: 8-bit or 16-bit, non-multiplexed, up to 512MB - GASIC: Simple (minimal) target within Qixis FPGA - PromJET rapid memory download support - Ethernet - Two on-board RGMII 10/100/1G ethernet ports. - PHY #0 remains powered up during deep-sleep (T1040 only) - QIXIS System Logic FPGA - Clocks - System and DDR clock (SYSCLK, “DDRCLK”) - SERDES clocks - Power Supplies - Video - DIU supports video at up to 1280x1024x32bpp - USB - Supports two USB 2.0 ports with integrated PHYs — Two type A ports with 5V@1.5A per port. — Second port can be converted to OTG mini-AB - SDHC - SDHC port connects directly to an adapter card slot, featuring: - Supporting SD slots for: SD, SDHC (1x, 4x, 8x) and/or MMC — Supporting eMMC memory devices - SPI - On-board support of 3 different devices and sizes - Other IO - Two Serial ports - ProfiBus port - Four I2C ports Add T104xQDS support in Kconfig and Makefile. Also create device tree. Following features are currently not implmented. - SerDes: Aurora - IFC: GASIC, Promjet - QIXIS - Ethernet - DIU - power supplies management - ProfiBus Signed-off-by: Priyanka Jain priyanka.j...@freescale.com Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com --- Based upon git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git Branch next Changes for v2: Incorporated Scott's comments - Created t104xqds.dtsi, both t1040qds t1042qds include it - Updated get_irq Changes for v3: Sending as it is Changes for v4: Updated description arch/powerpc/boot/dts/t1040qds.dts | 46 arch/powerpc/boot/dts/t1042qds.dts | 46 arch/powerpc/boot/dts/t104xqds.dtsi | 192 +++ arch/powerpc/platforms/85xx/Kconfig | 20 arch/powerpc/platforms/85xx/Makefile|1 + arch/powerpc/platforms/85xx/t104x_qds.c | 118 +++ 6 files changed, 423 insertions(+) create mode 100644 arch/powerpc/boot/dts/t1040qds.dts create mode 100644 arch/powerpc/boot/dts/t1042qds.dts create mode 100644 arch/powerpc/boot/dts/t104xqds.dtsi create mode 100644 arch/powerpc/platforms/85xx/t104x_qds.c diff --git a/arch/powerpc/boot/dts/t1040qds.dts b/arch/powerpc/boot/dts/t1040qds.dts new file mode 100644 index 000..973c29c --- /dev/null +++ b/arch/powerpc/boot/dts/t1040qds.dts @@ -0,0 +1,46 @@ +/* + * T1040QDS Device Tree Source + * + * Copyright 2013 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License (GPL) as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor AS IS AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/include/ fsl/t104xsi-pre.dtsi +/include/
[PATCH 2/2][v4] powerpc/configs: Enable T1040QDS by default in corenet
T1040 supports both 32 64 bit kernel. so enable T1040QDS by default in the config files. Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com --- Based upon git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git Branch next Changes for v2: Sending as it is Changes for v3: Sending as it is Changes for v4: Sending as it is arch/powerpc/configs/corenet32_smp_defconfig |1 + arch/powerpc/configs/corenet64_smp_defconfig |1 + 2 files changed, 2 insertions(+) diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig index 3dfab4c..19d1d31 100644 --- a/arch/powerpc/configs/corenet32_smp_defconfig +++ b/arch/powerpc/configs/corenet32_smp_defconfig @@ -28,6 +28,7 @@ CONFIG_P3041_DS=y CONFIG_P4080_DS=y CONFIG_P5020_DS=y CONFIG_P5040_DS=y +CONFIG_T104x_QDS=y CONFIG_HIGHMEM=y # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set CONFIG_BINFMT_MISC=m diff --git a/arch/powerpc/configs/corenet64_smp_defconfig b/arch/powerpc/configs/corenet64_smp_defconfig index fa94fb3..d23ee10 100644 --- a/arch/powerpc/configs/corenet64_smp_defconfig +++ b/arch/powerpc/configs/corenet64_smp_defconfig @@ -24,6 +24,7 @@ CONFIG_MAC_PARTITION=y CONFIG_B4_QDS=y CONFIG_P5020_DS=y CONFIG_P5040_DS=y +CONFIG_T104x_QDS=y CONFIG_T4240_QDS=y # CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set CONFIG_BINFMT_MISC=m -- 1.7.9.5 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH] powerpc/irq: Run softirqs off the top of the irq stack
Nowadays, irq_exit() calls __do_softirq() pretty much directly
instead of calling do_softirq() which switches to the decicated
softirq stack.
This has lead to observed stack overflows on powerpc since we call
irq_enter() and irq_exit() outside of the scope that switches to
the irq stack.
This fixes it by moving the stack switching up a level, making
irq_enter() and irq_exit() run off the irq stack.
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
This is the band aid discussed so far for the stack overflow
problem for powerpc. I assume sparc and i386 at least need
something similar (I had a quick look at ARM and it doesn't
seem to have irq stacks at all).
Unless objection in the next day or so, I intend to send that to
Linus and to -stable ASAP.
arch/powerpc/include/asm/irq.h | 4 +-
arch/powerpc/kernel/irq.c | 99 ++
arch/powerpc/kernel/misc_32.S | 9 ++--
arch/powerpc/kernel/misc_64.S | 10 ++---
4 files changed, 62 insertions(+), 60 deletions(-)
diff --git a/arch/powerpc/include/asm/irq.h b/arch/powerpc/include/asm/irq.h
index 0e40843..41f13ce 100644
--- a/arch/powerpc/include/asm/irq.h
+++ b/arch/powerpc/include/asm/irq.h
@@ -69,9 +69,9 @@ extern struct thread_info *softirq_ctx[NR_CPUS];
extern void irq_ctx_init(void);
extern void call_do_softirq(struct thread_info *tp);
-extern int call_handle_irq(int irq, void *p1,
- struct thread_info *tp, void *func);
+extern void call_do_irq(struct pt_regs *regs, struct thread_info *tp);
extern void do_IRQ(struct pt_regs *regs);
+extern void __do_irq(struct pt_regs *regs);
int irq_choose_cpu(const struct cpumask *mask);
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index c69440c..0c9646f 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -443,46 +443,7 @@ void migrate_irqs(void)
static inline void handle_one_irq(unsigned int irq)
{
- struct thread_info *curtp, *irqtp;
- unsigned long saved_sp_limit;
- struct irq_desc *desc;
-
- desc = irq_to_desc(irq);
- if (!desc)
- return;
-
- /* Switch to the irq stack to handle this */
- curtp = current_thread_info();
- irqtp = hardirq_ctx[smp_processor_id()];
-
- if (curtp == irqtp) {
- /* We're already on the irq stack, just handle it */
- desc-handle_irq(irq, desc);
- return;
- }
-
- saved_sp_limit = current-thread.ksp_limit;
-
- irqtp-task = curtp-task;
- irqtp-flags = 0;
-
- /* Copy the softirq bits in preempt_count so that the
-* softirq checks work in the hardirq context. */
- irqtp-preempt_count = (irqtp-preempt_count ~SOFTIRQ_MASK) |
- (curtp-preempt_count SOFTIRQ_MASK);
- current-thread.ksp_limit = (unsigned long)irqtp +
- _ALIGN_UP(sizeof(struct thread_info), 16);
-
- call_handle_irq(irq, desc, irqtp, desc-handle_irq);
- current-thread.ksp_limit = saved_sp_limit;
- irqtp-task = NULL;
-
- /* Set any flag that may have been set on the
-* alternate stack
-*/
- if (irqtp-flags)
- set_bits(irqtp-flags, curtp-flags);
}
static inline void check_stack_overflow(void)
@@ -501,9 +462,9 @@ static inline void check_stack_overflow(void)
#endif
}
-void do_IRQ(struct pt_regs *regs)
+void __do_irq(struct pt_regs *regs)
{
- struct pt_regs *old_regs = set_irq_regs(regs);
+ struct irq_desc *desc;
unsigned int irq;
irq_enter();
@@ -519,18 +480,64 @@ void do_IRQ(struct pt_regs *regs)
*/
irq = ppc_md.get_irq();
- /* We can hard enable interrupts now */
+ /* We can hard enable interrupts now to allow perf interrupts */
may_hard_irq_enable();
/* And finally process it */
- if (irq != NO_IRQ)
- handle_one_irq(irq);
- else
+ if (unlikely(irq == NO_IRQ))
__get_cpu_var(irq_stat).spurious_irqs++;
+ else {
+ desc = irq_to_desc(irq);
+ if (likely(desc))
+ desc-handle_irq(irq, desc);
+ }
trace_irq_exit(regs);
irq_exit();
+}
+
+void do_IRQ(struct pt_regs *regs)
+{
+ struct pt_regs *old_regs = set_irq_regs(regs);
+ struct thread_info *curtp, *irqtp;
+ unsigned long saved_sp_limit;
+
+ /* Switch to the irq stack to handle this */
+ curtp = current_thread_info();
+ irqtp = hardirq_ctx[raw_smp_processor_id()];
+
+ /* Already there ? */
+ if (unlikely(curtp == irqtp)) {
+ __do_irq(regs);
+ set_irq_regs(old_regs);
+ return;
+ }
+
+ /* Adjust the stack limit */
+ saved_sp_limit = current-thread.ksp_limit;
+ current-thread.ksp_limit = (unsigned long)irqtp +
+ _ALIGN_UP(sizeof(struct thread_info),
