[PATCH] powerpc: module: fix stubs for BE
A simple patch which was supposed to swap r12 and r11 also
inexplicably changed the offset by two bytes. This instruction
(to load r2) isn't used in LE, so it wasn't noticed.
Fixes: b1ce369e82 (powerpc: modules: use r12 for stub jump address.)
Reported-by: Alistair Popple alist...@popple.id.au
Signed-off-by: Rusty Russell ru...@rustcorp.com.au
Tested-by: Alistair Popple alist...@popple.id.au
diff --git a/arch/powerpc/kernel/module_64.c b/arch/powerpc/kernel/module_64.c
index ef349d0..077d2ce 100644
--- a/arch/powerpc/kernel/module_64.c
+++ b/arch/powerpc/kernel/module_64.c
@@ -134,7 +134,7 @@ static u32 ppc64_stub_insns[] = {
0xe98b0020, /* ld r12,32(r11) */
#if !defined(_CALL_ELF) || _CALL_ELF != 2
/* Set up new r2 from function descriptor */
- 0xe84b0026, /* ld r2,40(r11) */
+ 0xe84b0028, /* ld r2,40(r11) */
#endif
0x7d8903a6, /* mtctr r12 */
0x4e800420 /* bctr */
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Re: [PATCH] printk/of_serial: fix serial console cessation part way through boot.
Hi Stephen,
On Sat, May 10, 2014 at 7:37 AM, Stephen Chivers schiv...@csc.com wrote:
Commit 5f5c9ae56c38942623f69c3e6dc6ec78e4da2076
serial_core: Unregister console in uart_remove_one_port()
fixed a crash where a serial port was removed but
not deregistered as a console.
There is a side effect of that commit for platforms having serial consoles
and of_serial configured (CONFIG_SERIAL_OF_PLATFORM). The serial console
is disabled midway through the boot process.
This cessation of the serial console affects PowerPC computers
such as the MVME5100 and SAM440EP.
The sequence is:
bootconsole [udbg0] enabled
serial8250/16550 driver initialises and registers its UARTS,
one of these is the serial console.
console [ttyS0] enabled
of_serial probes platform devices, registering them as it goes.
One of these is the serial console.
console [ttyS0] disabled.
The disabling of the serial console is due to:
a. unregister_console in printk not clearing the
CONS_ENABLED bit in the console flags,
even though it has announced that the console is disabled; and
This part re-attaches the serial console on unbind/bind with the sh-sci driver,
too, which didn't work before. Cool, thanks!
b. of_platform_serial_probe in of_serial not setting the port type
before it registers with serial8250_register_8250_port.
This part I couldn't test.
This patch ensures that the serial console is re-enabled when of_serial
registers a serial port that corresponds to the designated console.
Signed-off-by: Stephen Chivers schiv...@csc.com
Tested-by: Stephen Chivers schiv...@csc.com
Acked-by: Geert Uytterhoeven ge...@linux-m68k.org [unregister_console]
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say programmer or something like that.
-- Linus Torvalds
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[PATCH] powerpc/corenet64_smp_defconfig: enable CONFIG_I2C_MUX and CONFIG_I2C_MUX_PCA954x
By default we enable CONFIG_I2C_MUX and CONFIG_I2C_MUX_PCA954x, which are needed on T2080QDS, T4240QDS, B4860QDS, etc. Signed-off-by: Shengzhou Liu shengzhou@freescale.com --- arch/powerpc/configs/corenet64_smp_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/powerpc/configs/corenet64_smp_defconfig b/arch/powerpc/configs/corenet64_smp_defconfig index 63508dd..bbd70bb 100644 --- a/arch/powerpc/configs/corenet64_smp_defconfig +++ b/arch/powerpc/configs/corenet64_smp_defconfig @@ -111,6 +111,8 @@ CONFIG_SERIAL_8250_RSA=y CONFIG_I2C=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MPC=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y CONFIG_SPI=y CONFIG_SPI_GPIO=y CONFIG_SPI_FSL_SPI=y -- 1.8.0 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH V6 1/2] KVM: PPC: BOOK3S: Always use the saved DAR value
Although it's optional, IBM POWER cpus always had DAR value set on
alignment interrupt. So don't try to compute these values.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
Changes from V5:
* Split the patch to two and also update commit message
arch/powerpc/kvm/book3s_emulate.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/powerpc/kvm/book3s_emulate.c
b/arch/powerpc/kvm/book3s_emulate.c
index 99d40f8977e8..5d0f71663b99 100644
--- a/arch/powerpc/kvm/book3s_emulate.c
+++ b/arch/powerpc/kvm/book3s_emulate.c
@@ -611,6 +611,12 @@ u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned
int inst)
ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst)
{
+#ifdef CONFIG_PPC_BOOK3S_64
+ /*
+* Linux's fix_alignment() assumes that DAR is valid, so can we
+*/
+ return vcpu-arch.fault_dar;
+#else
ulong dar = 0;
ulong ra = get_ra(inst);
ulong rb = get_rb(inst);
@@ -635,4 +641,5 @@ ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned
int inst)
}
return dar;
+#endif
}
--
1.9.1
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[PATCH V6 2/2] KVM: PPC: BOOK3S: Remove open coded make_dsisr in alignment handler
Use make_dsisr instead of open coding it. This also have
the added benefit of handling alignment interrupt on additional
instructions.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/disassemble.h | 34 +
arch/powerpc/kernel/align.c| 34 +
arch/powerpc/kvm/book3s_emulate.c | 39 +-
3 files changed, 36 insertions(+), 71 deletions(-)
diff --git a/arch/powerpc/include/asm/disassemble.h
b/arch/powerpc/include/asm/disassemble.h
index 856f8deb557a..6330a61b875a 100644
--- a/arch/powerpc/include/asm/disassemble.h
+++ b/arch/powerpc/include/asm/disassemble.h
@@ -81,4 +81,38 @@ static inline unsigned int get_oc(u32 inst)
{
return (inst 11) 0x7fff;
}
+
+#define IS_XFORM(inst) (get_op(inst) == 31)
+#define IS_DSFORM(inst)(get_op(inst) = 56)
+
+/*
+ * Create a DSISR value from the instruction
+ */
+static inline unsigned make_dsisr(unsigned instr)
+{
+ unsigned dsisr;
+
+
+ /* bits 6:15 -- 22:31 */
+ dsisr = (instr 0x03ff) 16;
+
+ if (IS_XFORM(instr)) {
+ /* bits 29:30 -- 15:16 */
+ dsisr |= (instr 0x0006) 14;
+ /* bit 25 --17 */
+ dsisr |= (instr 0x0040) 8;
+ /* bits 21:24 -- 18:21 */
+ dsisr |= (instr 0x0780) 3;
+ } else {
+ /* bit 5 --17 */
+ dsisr |= (instr 0x0400) 12;
+ /* bits 1: 4 -- 18:21 */
+ dsisr |= (instr 0x7800) 17;
+ /* bits 30:31 -- 12:13 */
+ if (IS_DSFORM(instr))
+ dsisr |= (instr 0x0003) 18;
+ }
+
+ return dsisr;
+}
#endif /* __ASM_PPC_DISASSEMBLE_H__ */
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 94908af308d8..34f55524d456 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -25,14 +25,13 @@
#include asm/cputable.h
#include asm/emulated_ops.h
#include asm/switch_to.h
+#include asm/disassemble.h
struct aligninfo {
unsigned char len;
unsigned char flags;
};
-#define IS_XFORM(inst) (((inst) 26) == 31)
-#define IS_DSFORM(inst)(((inst) 26) = 56)
#define INVALID{ 0, 0 }
@@ -192,37 +191,6 @@ static struct aligninfo aligninfo[128] = {
};
/*
- * Create a DSISR value from the instruction
- */
-static inline unsigned make_dsisr(unsigned instr)
-{
- unsigned dsisr;
-
-
- /* bits 6:15 -- 22:31 */
- dsisr = (instr 0x03ff) 16;
-
- if (IS_XFORM(instr)) {
- /* bits 29:30 -- 15:16 */
- dsisr |= (instr 0x0006) 14;
- /* bit 25 --17 */
- dsisr |= (instr 0x0040) 8;
- /* bits 21:24 -- 18:21 */
- dsisr |= (instr 0x0780) 3;
- } else {
- /* bit 5 --17 */
- dsisr |= (instr 0x0400) 12;
- /* bits 1: 4 -- 18:21 */
- dsisr |= (instr 0x7800) 17;
- /* bits 30:31 -- 12:13 */
- if (IS_DSFORM(instr))
- dsisr |= (instr 0x0003) 18;
- }
-
- return dsisr;
-}
-
-/*
* The dcbz (data cache block zero) instruction
* gives an alignment fault if used on non-cacheable
* memory. We handle the fault mainly for the
diff --git a/arch/powerpc/kvm/book3s_emulate.c
b/arch/powerpc/kvm/book3s_emulate.c
index 5d0f71663b99..6bbdb3d1ec77 100644
--- a/arch/powerpc/kvm/book3s_emulate.c
+++ b/arch/powerpc/kvm/book3s_emulate.c
@@ -569,44 +569,7 @@ unprivileged:
u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst)
{
- u32 dsisr = 0;
-
- /*
-* This is what the spec says about DSISR bits (not mentioned = 0):
-*
-* 12:13[DS]Set to bits 30:31
-* 15:16[X] Set to bits 29:30
-* 17 [X] Set to bit 25
-* [D/DS] Set to bit 5
-* 18:21[X] Set to bits 21:24
-* [D/DS] Set to bits 1:4
-* 22:26Set to bits 6:10 (RT/RS/FRT/FRS)
-* 27:31Set to bits 11:15 (RA)
-*/
-
- switch (get_op(inst)) {
- /* D-form */
- case OP_LFS:
- case OP_LFD:
- case OP_STFD:
- case OP_STFS:
- dsisr |= (inst 12) 0x4000; /* bit 17 */
- dsisr |= (inst 17) 0x3c00; /* bits 18:21 */
- break;
- /* X-form */
- case 31:
- dsisr |= (inst 14) 0x18000; /* bits 15:16 */
- dsisr |= (inst 8) 0x04000; /* bit 17 */
- dsisr |= (inst 3) 0x03c00; /* bits 18:21 */
- break;
- default:
-
Re: [PATCH V6 1/2] KVM: PPC: BOOK3S: Always use the saved DAR value
On 12.05.14 13:34, Aneesh Kumar K.V wrote: Although it's optional, IBM POWER cpus always had DAR value set on alignment interrupt. So don't try to compute these values. Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com Thanks, applied both to kvm-ppc-queue. Alex ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] [resend] net: get rid of SET_ETHTOOL_OPS
On Sun, May 11, 2014 at 12:12:32AM +, Wilfried Klaebe wrote: net: get rid of SET_ETHTOOL_OPS Dave Miller mentioned he'd like to see SET_ETHTOOL_OPS gone. This does that. Mostly done via coccinelle script: @@ struct ethtool_ops *ops; struct net_device *dev; @@ - SET_ETHTOOL_OPS(dev, ops); + dev-ethtool_ops = ops; Compile tested only, but I'd seriously wonder if this broke anything. Suggested-by: Dave Miller da...@davemloft.net Signed-off-by: Wilfried Klaebe w-l...@lebenslange-mailadresse.de for drivers/usb/gadget/: Acked-by: Felipe Balbi ba...@ti.com -- balbi signature.asc Description: Digital signature ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH] powerpc: fix build of epapr_paravirt on 64-bit book3s
This fixes an allyesconfig build break introduced by commit
7762b1ed7aaee223230793fcee80672e2e3aa7a8 powerpc: move epapr paravirt
init of power_save to an initcall.
Signed-off-by: Scott Wood scottw...@freescale.com
Cc: Stuart Yoder stuart.yo...@freescale.com
---
arch/powerpc/kernel/epapr_paravirt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/kernel/epapr_paravirt.c
b/arch/powerpc/kernel/epapr_paravirt.c
index 8a7a62c..eab2f2a 100644
--- a/arch/powerpc/kernel/epapr_paravirt.c
+++ b/arch/powerpc/kernel/epapr_paravirt.c
@@ -73,8 +73,10 @@ int __init epapr_paravirt_early_init(void)
static int __init epapr_idle_init(void)
{
+#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
if (epapr_has_idle)
ppc_md.power_save = epapr_ev_idle;
+#endif
return 0;
}
--
1.9.1
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Re: [PATCH] powerpc: Fix attempt to move .org backwards error (again)
On Mon, May 12, 2014 at 03:48:44PM +1000, Benjamin Herrenschmidt wrote: On Sun, 2014-05-11 at 21:52 -0700, Guenter Roeck wrote: Oh well, it was worth a try. Can you give me an example for a failing configuration ? My g5 config which is close to g5_defconfig with PR KVM enabled. In any case, see my other messages. I'm waiting for all my test builders to come back and if it's clear I'll post a new patch. I'll be more than happy to wait. Let me know if I can test something. Thanks, Guenter ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: Bug in reclaim logic with exhausted nodes?
Hi Christoph, Sorry for the delay in my response! On 03.04.2014 [11:41:37 -0500], Christoph Lameter wrote: On Mon, 31 Mar 2014, Nishanth Aravamudan wrote: Yep. The node exists, it's just fully exhausted at boot (due to the presence of 16GB pages reserved at boot-time). Well if you want us to support that then I guess you need to propose patches to address this issue. Yep, that's my plan, I was hoping to get input from developers/experts such as yourself first. Obviously, code speaks louder though... I'd appreciate a bit more guidance? I'm suggesting that in this case the node functionally has no memory. So the page allocator should not allow allocations from it -- except (I need to investigate this still) userspace accessing the 16GB pages on that node, but that, I believe, doesn't go through the page allocator at all, it's all from hugetlb interfaces. It seems to me there is a bug in SLUB that we are noting that we have a useless per-node structure for a given nid, but not actually preventing requests to that node or reclaim because of those allocations. Well if you can address that without impacting the fastpath then we could do this. Otherwise we would need a fake structure here to avoid adding checks to the fastpath Ok, I'll keep thinking about what makes the most sense. I think there is a logical bug (even if it only occurs in this particular corner case) where if reclaim progresses for a THISNODE allocation, we don't check *where* the reclaim is progressing, and thus may falsely be indicating that we have done some progress when in fact the allocation that is causing reclaim will not possibly make any more progress. Ok maybe we could address this corner case. How would you do this? This is where I started to get stumped. It seems like did_some_progress is only checking that any progress is made. It would be more expensive in the reclaim path to check what nodes we made progress on and verify it was on the intended one (if we are reclaiming due to THISNODE). I will try and look at this case specifically more, I apologize it's taking me quite a bit of time to get up-to-speed on the code and design. Thanks, Nish ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc/powernv: Correctly set hypervisor interrupt little endian bit on POWER8
On Thu, 2014-05-08 at 22:31 +1000, Anton Blanchard wrote: HID0 IBM bit 19 is the HILE bit on POWER8. Set it to 0 to take exceptions in big endian and to 1 to take them in little endian. Signed-off-by: Anton Blanchard an...@samba.org --- Let's stick to the variant involving a FW call instead. Cheers, Ben. Index: b/arch/powerpc/include/asm/reg.h === --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -397,6 +397,7 @@ #define SPRN_HASH1 0x3D2 /* Primary Hash Address Register */ #define SPRN_HASH2 0x3D3 /* Secondary Hash Address Resgister */ #define SPRN_HID00x3F0 /* Hardware Implementation Register 0 */ +#define HID0_HILE_SH (63 - 19) /* Hypervisor interrupt little endian */ #define HID0_HDICE_SH(63 - 23) /* 970 HDEC interrupt enable */ #define HID0_EMCP(131) /* Enable Machine Check pin */ #define HID0_EBA (129) /* Enable Bus Address Parity */ Index: b/arch/powerpc/kernel/cpu_setup_power.S === --- a/arch/powerpc/kernel/cpu_setup_power.S +++ b/arch/powerpc/kernel/cpu_setup_power.S @@ -60,6 +60,7 @@ _GLOBAL(__setup_cpu_power8) bl __init_HFSCR bl __init_tlb_power8 bl __init_PMU_HV + bl __init_HILE mtlrr11 blr @@ -78,6 +79,7 @@ _GLOBAL(__restore_cpu_power8) bl __init_HFSCR bl __init_tlb_power8 bl __init_PMU_HV + bl __init_HILE mtlrr11 blr @@ -132,6 +134,26 @@ __init_HFSCR: mtspr SPRN_HFSCR,r3 blr +__init_HILE: + mfspr r3,SPRN_HID0 + li r4,1 + sldir4,r4,HID0_HILE_SH +#ifdef __LITTLE_ENDIAN__ + or r3,r3,r4 +#else + andcr3,r3,r4 +#endif + sync + mtspr SPRN_HID0,r3 + mfspr r3,SPRN_HID0 + mfspr r3,SPRN_HID0 + mfspr r3,SPRN_HID0 + mfspr r3,SPRN_HID0 + mfspr r3,SPRN_HID0 + mfspr r3,SPRN_HID0 + isync + blr + /* * Clear the TLB using the specified IS form of tlbiel instruction * (invalidate by congruence class). P7 has 128 CCs., P8 has 512. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc: Fix attempt to move .org backwards error (again)
On Mon, 2014-05-12 at 08:53 -0700, Guenter Roeck wrote: On Mon, May 12, 2014 at 03:48:44PM +1000, Benjamin Herrenschmidt wrote: On Sun, 2014-05-11 at 21:52 -0700, Guenter Roeck wrote: Oh well, it was worth a try. Can you give me an example for a failing configuration ? My g5 config which is close to g5_defconfig with PR KVM enabled. In any case, see my other messages. I'm waiting for all my test builders to come back and if it's clear I'll post a new patch. I'll be more than happy to wait. Let me know if I can test something. http://patchwork.ozlabs.org/patch/347892/ Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: powerpc/ppc64: Allow allmodconfig to build (finally !)
On Mon, May 12, 2014 at 03:57:34PM +1000, Benjamin Herrenschmidt wrote: This shuffles code around in exceptions-64s.S in order to allow an allmodconfig build to succeed. The main problems were: - We have a fixed hole from 0x7000 to 0x8000 for use by FW, under some circumstances the code before that would grow too big and hit the . = 0x7000 - The various attempts at making space in there would trigger cases where short conditional branches from assembly would no longer be able to reach their target. This is especially nasty when these branches reside in alternate feature sections which are appended at the end of each .o file This fixes it by essentially moving all the second level exception handlers to after the hole and moving a couple of functions near the hole itself so they sit at reachable distance of both the first level handlers (before the hole) and the alternate feature sections (end of file). In the long run, if we start hitting this again, we'll probably have to split the file in two, probably at the hole location, to keep the alt sections used by the first level handlers close to them, and move everything else further away. But for now, this will do. Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org Ben, After applying this patch, I get arch/powerpc/kernel/exceptions-64s.S:269: Error: operand out of range (0x814c is not between 0x8000 and 0x7ffc) arch/powerpc/kernel/exceptions-64s.S:729: Error: operand out of range (0x814c is not between 0x8000 and 0x7ffc) with powerpc:defconfig, powerpc:allmodconfig, powerpc:cell_defconfig, and powerpc:maple_defconfig. This is on top of v3.15-rc5. Any idea what is going on ? Compiler is powerpc64-poky-linux-gcc (GCC) 4.7.2 (from poky 1.4.0-1). Thanks, Guenter ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
linux-next: manual merge of the powerpc tree with the fixes tree
Hi all, Today's linux-next merge of the powerpc tree got a conflict in arch/powerpc/kernel/exceptions-64s.S between commit 0be9d8b61c0c (powerpc/ppc64: Allow allmodconfig to build (finally !)) from the fixes tree and commits b1576fec7f4d (powerpc: No need to use dot symbols when branching to a function) and 354255014a90 (powerpc: Remove dot symbol usage in exception macros) from the powerpc tree. I fixed it up (see below) and can carry the fix as necessary (no action is required). -- Cheers, Stephen Rothwells...@canb.auug.org.au diff --cc arch/powerpc/kernel/exceptions-64s.S index 833a68dc4cc8,20f11eb4dff7.. --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@@ -891,186 -1025,14 +891,186 @@@ END_FTR_SECTION_IFSET(CPU_FTR_CFAR std r12,RESULT(r1) std r11,STACK_FRAME_OVERHEAD-16(r1) 1:addir3,r1,STACK_FRAME_OVERHEAD - bl .kernel_bad_stack + bl kernel_bad_stack b 1b + +#if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) +/* + * Data area reserved for FWNMI option. + * This address (0x7000) is fixed by the RPA. + */ + .= 0x7000 + .globl fwnmi_data_area +fwnmi_data_area: + + /* pseries and powernv need to keep the whole page from + * 0x7000 to 0x8000 free for use by the firmware + */ + . = 0x8000 +#endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */ + /* - * Here r13 points to the paca, r9 contains the saved CR, - * SRR0 and SRR1 are saved in r11 and r12, - * r9 - r13 are saved in paca-exgen. + * Denorm interrupt assist moved out of line to here, where it remains + * close enough to the call site which uses a small conditional branch */ +#ifdef CONFIG_PPC_DENORMALISATION +denorm_assist: +BEGIN_FTR_SECTION +/* + * To denormalise we need to move a copy of the register to itself. + * For POWER6 do that here for all FP regs. + */ + mfmsr r10 + ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1) + xorir10,r10,(MSR_FE0|MSR_FE1) + mtmsrd r10 + sync + +#define FMR2(n) fmr (n), (n) ; fmr n+1, n+1 +#define FMR4(n) FMR2(n) ; FMR2(n+2) +#define FMR8(n) FMR4(n) ; FMR4(n+4) +#define FMR16(n) FMR8(n) ; FMR8(n+8) +#define FMR32(n) FMR16(n) ; FMR16(n+16) + FMR32(0) + +FTR_SECTION_ELSE +/* + * To denormalise we need to move a copy of the register to itself. + * For POWER7 do that here for the first 32 VSX registers only. + */ + mfmsr r10 + orisr10,r10,MSR_VSX@h + mtmsrd r10 + sync + +#define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1) +#define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2) +#define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4) +#define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8) +#define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16) + XVCPSGNDP32(0) + +ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206) + +BEGIN_FTR_SECTION + b denorm_done +END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S) +/* + * To denormalise we need to move a copy of the register to itself. + * For POWER8 we need to do that for all 64 VSX registers + */ + XVCPSGNDP32(32) +denorm_done: + mtspr SPRN_HSRR0,r11 + mtcrf 0x80,r9 + ld r9,PACA_EXGEN+EX_R9(r13) + RESTORE_PPR_PACA(PACA_EXGEN, r10) +BEGIN_FTR_SECTION + ld r10,PACA_EXGEN+EX_CFAR(r13) + mtspr SPRN_CFAR,r10 +END_FTR_SECTION_IFSET(CPU_FTR_CFAR) + ld r10,PACA_EXGEN+EX_R10(r13) + ld r11,PACA_EXGEN+EX_R11(r13) + ld r12,PACA_EXGEN+EX_R12(r13) + ld r13,PACA_EXGEN+EX_R13(r13) + HRFID + b . +#endif + +/* + * An interrupt came in while soft-disabled. We set paca-irq_happened, then: + * - If it was a decrementer interrupt, we bump the dec to max and and return. + * - If it was a doorbell we return immediately since doorbells are edge + * triggered and won't automatically refire. + * - else we hard disable and return. + * This is called with r10 containing the value to OR to the paca field. + * + * Warning: This code is reached using a (small) conditional branch from both + * the 1st level exception handlers below 0x8000 and the alternate feature + * sections of that file which the linker puts right after the text in here. + * + * For that to work, we thus need this code to be roughly near the middle + * so that we can reach it with 32k offsets. Here works... for now. + */ +#define MASKED_INTERRUPT(_H) \ +masked_##_H##interrupt: \ + std r11,PACA_EXGEN+EX_R11(r13); \ + lbz r11,PACAIRQHAPPENED(r13); \ + or r11,r11,r10;\ + stb r11,PACAIRQHAPPENED(r13); \ + cmpwi r10,PACA_IRQ_DEC; \ + bne 1f;
[PATCH] powerpc/pseries: relocate config DTL so KConfig nests properly
Signed-off-by: Cody P Schafer c...@linux.vnet.ibm.com --- arch/powerpc/platforms/pseries/Kconfig | 20 ++-- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig index 2cb8b77..e00dd4d 100644 --- a/arch/powerpc/platforms/pseries/Kconfig +++ b/arch/powerpc/platforms/pseries/Kconfig @@ -33,6 +33,16 @@ config PPC_SPLPAR processors, that is, which share physical processors between two or more partitions. +config DTL + bool Dispatch Trace Log + depends on PPC_SPLPAR DEBUG_FS + help + SPLPAR machines can log hypervisor preempt dispatch events to a + kernel buffer. Saying Y here will enable logging these events, + which are accessible through a debugfs file. + + Say N if you are unsure. + config PSERIES_MSI bool depends on PCI_MSI PPC_PSERIES EEH @@ -122,13 +132,3 @@ config HV_PERF_CTRS systems. 24x7 is available on Power 8 systems. If unsure, select Y. - -config DTL - bool Dispatch Trace Log - depends on PPC_SPLPAR DEBUG_FS - help - SPLPAR machines can log hypervisor preempt dispatch events to a - kernel buffer. Saying Y here will enable logging these events, - which are accessible through a debugfs file. - - Say N if you are unsure. -- 1.9.3 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
